* NGSPICE file created from caravel.ext - technology: sky130A .subckt sky130_fd_sc_hd__nand2b_2 B Y A_N VGND VPWR VNB VPB X0 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND B a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y a_27_93# a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_229_47# a_27_93# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y a_27_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_27_93# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_229_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__dfrtp_4 Q RESET_B D CLK VGND VPWR VNB VPB X0 a_1217_47# a_27_47# a_1108_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X1 a_805_47# a_761_289# a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_1108_47# a_193_47# a_761_289# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X3 a_1283_21# a_1108_47# a_1462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_651_413# a_27_47# a_543_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND RESET_B a_805_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_1283_21# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 a_448_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 Q a_1283_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR a_1283_21# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_761_289# a_543_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X12 Q a_1283_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_1108_47# a_27_47# a_761_289# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_543_47# a_27_47# a_448_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X16 a_1462_47# RESET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_543_47# a_193_47# a_448_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_448_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 VPWR a_1283_21# a_1270_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 VPWR a_1108_47# a_1283_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 Q a_1283_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_1270_413# a_193_47# a_1108_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X24 a_1283_21# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 VGND a_1283_21# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VGND a_1283_21# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR a_761_289# a_651_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 a_639_47# a_193_47# a_543_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X29 VGND a_1283_21# a_1217_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X30 a_651_413# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X31 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X32 a_761_289# a_543_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X33 Q a_1283_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__dfbbn_2 RESET_B VGND CLK_N SET_B Q VPWR D Q_N VNB VPB X0 a_790_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_790_47# a_944_21# a_650_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 Q_N a_1431_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_894_329# a_476_47# a_650_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X4 a_476_47# a_27_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND a_650_21# a_584_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_2236_47# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_650_21# a_560_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_1547_47# a_944_21# a_1431_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X9 VPWR CLK_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X10 Q a_2236_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_1115_329# a_650_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X13 a_476_47# a_193_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X14 a_584_47# a_27_47# a_476_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X15 VPWR a_944_21# a_894_329# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X16 a_1162_47# a_650_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X17 VGND a_1431_21# Q_N VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Q a_2236_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND a_1431_21# a_2236_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 VPWR RESET_B a_944_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X22 Q_N a_1431_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VPWR a_1431_21# a_1343_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 VPWR a_944_21# a_1665_329# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X25 VGND a_1431_21# a_1366_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 VGND a_2236_47# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_1431_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 VPWR a_1431_21# Q_N VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_1366_47# a_193_47# a_1257_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X30 a_1665_329# a_1257_47# a_1431_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X31 a_1257_47# a_27_47# a_1162_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X32 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X33 a_1343_413# a_27_47# a_1257_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X34 a_1547_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X35 a_650_21# a_476_47# a_790_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X36 a_1257_47# a_193_47# a_1115_329# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X37 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X38 a_1431_21# a_1257_47# a_1547_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X39 a_650_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X40 VPWR a_1431_21# a_2236_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X41 VGND RESET_B a_944_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X42 a_560_413# a_193_47# a_476_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X43 VGND CLK_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__inv_2 A Y VPWR VGND VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__buf_16 A X VGND VPWR VNB VPB X0 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X36 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X40 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X41 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X42 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X43 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__mux2_4 X S A0 A1 VPWR VGND VNB VPB X0 a_204_297# A1 a_396_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_396_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_396_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR S a_314_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_204_297# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_396_47# A0 a_314_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_206_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_396_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_396_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_396_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_490_47# A1 a_396_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND S a_490_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_396_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_396_47# A0 a_206_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND a_396_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VPWR S a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_396_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND S a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__clkbuf_16 X A VGND VPWR VNB VPB X0 VPWR A a_110_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_110_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_110_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_110_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND A a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_110_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 VPWR A a_110_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X29 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X30 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X33 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X36 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X37 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X38 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X39 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__and2_0 VPWR VGND X B A VNB VPB X0 VPWR B a_40_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_40_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VGND B a_123_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_40_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_123_47# A a_40_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_40_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__dlygate4sd3_1 A X VGND VPWR VNB VPB X0 VPWR A a_49_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VGND a_285_47# a_391_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X2 X a_391_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A a_49_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR a_285_47# a_391_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X5 a_285_47# a_49_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X6 a_285_47# a_49_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X7 X a_391_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__diode_2 DIODE VGND VPWR VPB VNB D0 VNB DIODE sky130_fd_pr__diode_pw2nd_05v5 pj=2.64e+06 area=4.347e+11 .ends .subckt sky130_fd_sc_hd__decap_3 VPWR VGND VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=590000u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=590000u .ends .subckt sky130_fd_sc_hd__conb_1 LO HI VPB VNB VGND VPWR R0 HI VPWR sky130_fd_pr__res_generic_po w=480000u l=45000u R1 VGND LO sky130_fd_pr__res_generic_po w=480000u l=45000u .ends .subckt sky130_fd_sc_hd__buf_2 VPWR VGND X A VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__or2_0 A X B VGND VPWR VNB VPB X0 VGND A a_68_355# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_150_355# B a_68_355# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_68_355# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_68_355# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR A a_150_355# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_68_355# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u .ends .subckt sky130_fd_sc_hd__nand2_2 Y A B VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nor2_2 B Y A VGND VPWR VNB VPB X0 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__macro_sparecell VGND LO VNB VPB VPWR Xsky130_fd_sc_hd__nand2_2_1 sky130_fd_sc_hd__nor2_2_1/B LO LO VGND VPWR VNB VPB sky130_fd_sc_hd__nand2_2 Xsky130_fd_sc_hd__nand2_2_0 sky130_fd_sc_hd__nor2_2_0/B LO LO VGND VPWR VNB VPB sky130_fd_sc_hd__nand2_2 Xsky130_fd_sc_hd__inv_2_0 sky130_fd_sc_hd__inv_2_0/A sky130_fd_sc_hd__inv_2_0/Y VPWR + VGND VNB VPB sky130_fd_sc_hd__inv_2 Xsky130_fd_sc_hd__inv_2_1 sky130_fd_sc_hd__inv_2_1/A sky130_fd_sc_hd__inv_2_1/Y VPWR + VGND VNB VPB sky130_fd_sc_hd__inv_2 Xsky130_fd_sc_hd__nor2_2_0 sky130_fd_sc_hd__nor2_2_0/B sky130_fd_sc_hd__inv_2_0/A + sky130_fd_sc_hd__nor2_2_0/B VGND VPWR VNB VPB sky130_fd_sc_hd__nor2_2 Xsky130_fd_sc_hd__nor2_2_1 sky130_fd_sc_hd__nor2_2_1/B sky130_fd_sc_hd__inv_2_1/A + sky130_fd_sc_hd__nor2_2_1/B VGND VPWR VNB VPB sky130_fd_sc_hd__nor2_2 Xsky130_fd_sc_hd__conb_1_0 LO sky130_fd_sc_hd__conb_1_0/HI VPB VNB VGND VPWR sky130_fd_sc_hd__conb_1 .ends .subckt sky130_fd_sc_hd__decap_6 VPWR VGND VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=1.97e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=1.97e+06u .ends .subckt sky130_fd_sc_hd__decap_8 VPWR VGND VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=2.89e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=2.89e+06u .ends .subckt sky130_fd_sc_hd__decap_4 VGND VPWR VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=1.05e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=1.05e+06u .ends .subckt gpio_logic_high gpio_logic1 vccd1 vssd1 XFILLER_3_3 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 XFILLER_1_3 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 XPHY_0 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_1 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_2 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_4 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_3 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_5 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_6 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_7 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_8 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XPHY_9 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_4_3 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 XFILLER_2_3 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 Xgpio_logic_high gpio_logic_high/LO gpio_logic1 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_4_9 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_0_3 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 XFILLER_2_9 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_0_9 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 .ends .subckt sky130_fd_sc_hd__and2_2 VPWR VGND A X B VNB VPB X0 X a_61_75# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_61_75# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR B a_61_75# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND B a_147_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 X a_61_75# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND a_61_75# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_61_75# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_147_75# A a_61_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o21ai_4 Y B1 A2 A1 VPWR VGND VNB VPB X0 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_115_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_115_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A2 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y B1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_32_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y B1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A2 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_32_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_32_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_32_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_115_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_32_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_32_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND A2 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y A2 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND A1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_115_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__o21ai_2 B1 Y A2 A1 VGND VPWR VNB VPB X0 VGND A2 a_29_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B1 a_29_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_112_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_29_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A2 a_112_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND A1 a_29_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_112_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_112_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_29_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_29_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and2b_2 VPWR VGND X B A_N VNB VPB X0 VPWR a_212_413# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_297_47# a_27_413# a_212_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_212_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_212_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_212_413# a_27_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR B a_212_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND a_212_413# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_413# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__and3b_2 VGND VPWR B X A_N C VNB VPB X0 a_109_53# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_215_311# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_109_53# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND C a_373_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND a_215_311# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR C a_215_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_215_311# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_215_311# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_301_53# a_109_53# a_215_311# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_215_311# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_373_53# B a_301_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VPWR a_109_53# a_215_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__dfrtp_2 Q RESET_B D CLK VGND VPWR VNB VPB X0 a_1217_47# a_27_47# a_1108_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X1 a_805_47# a_761_289# a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND a_1283_21# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_1108_47# a_193_47# a_761_289# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X4 a_1283_21# a_1108_47# a_1462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_651_413# a_27_47# a_543_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_1283_21# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND RESET_B a_805_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 Q a_1283_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X10 a_448_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_761_289# a_543_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X12 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_1108_47# a_27_47# a_761_289# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_543_47# a_27_47# a_448_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X15 a_1462_47# RESET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 a_543_47# a_193_47# a_448_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_448_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 VPWR a_1283_21# a_1270_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 VPWR a_1108_47# a_1283_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 a_1270_413# a_193_47# a_1108_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X22 a_1283_21# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 VPWR a_761_289# a_651_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 Q a_1283_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_639_47# a_193_47# a_543_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X26 VGND a_1283_21# a_1217_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 a_651_413# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X29 a_761_289# a_543_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u .ends .subckt gpio_control_block gpio_defaults[0] gpio_defaults[10] gpio_defaults[11] gpio_defaults[12] + gpio_defaults[1] gpio_defaults[2] gpio_defaults[3] gpio_defaults[4] gpio_defaults[5] + gpio_defaults[6] gpio_defaults[7] gpio_defaults[8] gpio_defaults[9] mgmt_gpio_in + mgmt_gpio_oeb mgmt_gpio_out one pad_gpio_ana_en pad_gpio_ana_pol pad_gpio_ana_sel + pad_gpio_dm[0] pad_gpio_dm[1] pad_gpio_dm[2] pad_gpio_holdover pad_gpio_ib_mode_sel + pad_gpio_in pad_gpio_inenb pad_gpio_out pad_gpio_outenb pad_gpio_slow_sel pad_gpio_vtrip_sel + resetn resetn_out serial_clock serial_clock_out serial_data_in serial_data_out serial_load + serial_load_out user_gpio_in user_gpio_oeb user_gpio_out vccd vccd1 zero vssd1 vssd X_062_ user_gpio_out _062_/Y _106_/Q vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_131_ hold3/A _086_/A hold4/X _131_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_114_ _084_/X vssd _101__9/Y _085_/Y _114_/Q vccd hold4/X _114_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 X_104__12 _100__8/A _104__12/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 Xoutput7 _116_/Q pad_gpio_ana_en vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xoutput20 _134_/X resetn_out vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 X_094__2 _101__9/A _094__2/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 X_130_ hold4/A _086_/A hold9/X _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_059__14 _130_/CLK _132_/CLK vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 X_061_ _061_/X _106_/Q user_gpio_oeb _060_/X vccd vssd vssd vccd sky130_fd_sc_hd__mux2_4 X_113_ _082_/X vssd _100__8/Y _083_/Y _113_/Q vccd hold9/X _113_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xclkbuf_1_0__f_serial_load _100__8/A clkbuf_0_serial_load/X vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_16 Xoutput8 _118_/Q pad_gpio_ana_pol vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xoutput10 _113_/Q pad_gpio_dm[0] vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xoutput21 _132_/Q serial_data_out vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 X_060_ vccd vssd _060_/X _063_/C _112_/Q vssd vccd sky130_fd_sc_hd__and2_0 X_112_ _080_/X vssd _099__7/Y _081_/Y _112_/Q vccd hold6/X _112_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xhold10 _127_/Q _128_/D vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 Xoutput9 _117_/Q pad_gpio_ana_sel vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xoutput11 _114_/Q pad_gpio_dm[1] vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xoutput22 _067_/X user_gpio_in vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 X_111_ _078_/X vssd _098__6/Y _079_/Y _111_/Q vccd hold8/X _111_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xoutput12 _115_/Q pad_gpio_dm[2] vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xhold11 _126_/Q _127_/D vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__072__B gpio_defaults[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_fanout29_A _082_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_110_ _076_/X vssd _097__5/Y _077_/Y _110_/Q vccd hold7/X _110_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xhold12 _125_/Q _126_/D vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 X_097__5 _101__9/A _097__5/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 Xoutput13 _107_/Q pad_gpio_holdover vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 XANTENNA__080__B gpio_defaults[1] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__075__B gpio_defaults[9] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__083__B gpio_defaults[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xhold13 _124_/Q _125_/D vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__078__B gpio_defaults[4] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_0 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput14 _111_/Q pad_gpio_ib_mode_sel vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 XANTENNA__091__B gpio_defaults[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__086__B gpio_defaults[12] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_1 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput15 _110_/Q pad_gpio_inenb vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 XANTENNA__089__B gpio_defaults[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xconst_source zero_buffer/A one_buffer/A vccd vssd vssd vccd sky130_fd_sc_hd__conb_1 XANTENNA_fanout27_A _082_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_2 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput16 _066_/Y pad_gpio_out vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xoutput17 _061_/X pad_gpio_outenb vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 XPHY_3 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xfanout30 vccd vssd _082_/A fanout31/X vssd vccd sky130_fd_sc_hd__buf_2 XPHY_4 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput18 _108_/Q pad_gpio_slow_sel vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 X_079_ gpio_defaults[4] _079_/Y _088_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 XANTENNA_input4_A resetn vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_100__8 _100__8/A _100__8/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 Xfanout31 vccd vssd fanout31/X input4/X vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA__061__A0 user_gpio_oeb vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_103__11 _100__8/A _103__11/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 Xoutput19 _109_/Q pad_gpio_vtrip_sel vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 X_078_ _088_/A _078_/X gpio_defaults[4] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 XPHY_5 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_6 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_077_ gpio_defaults[3] _077_/Y _076_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_129_ hold9/A _074_/A hold2/X _131_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_093_ gpio_defaults[7] _093_/Y _092_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_076_ _076_/A _076_/X gpio_defaults[3] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xinput1 vccd vssd _063_/C mgmt_gpio_oeb vssd vccd sky130_fd_sc_hd__buf_2 XPHY_7 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_128_ hold2/A _074_/A _128_/D _131_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 Xfanout23 vccd vssd _088_/A _092_/A vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA_input2_A mgmt_gpio_out vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_092_ _092_/A _092_/X gpio_defaults[7] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xinput2 vccd vssd input2/X mgmt_gpio_out vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA_clkbuf_0_serial_load_A serial_load vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_8 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_075_ gpio_defaults[9] _075_/Y _074_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_127_ _127_/Q _092_/A _127_/D _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_095__3 _100__8/A _095__3/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 Xfanout24 vccd vssd _092_/A fanout31/X vssd vccd sky130_fd_sc_hd__buf_2 X_074_ _074_/A _074_/X gpio_defaults[9] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 X_091_ gpio_defaults[6] _091_/Y _088_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 Xinput3 vccd vssd _133_/A pad_gpio_in vssd vccd sky130_fd_sc_hd__buf_2 XPHY_9 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_126_ _126_/Q _088_/A _126_/D _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_109_ _074_/X vssd _096__4/Y _075_/Y _109_/Q vccd hold2/X _109_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xfanout25 vccd vssd _076_/A _080_/A vssd vccd sky130_fd_sc_hd__buf_2 X_090_ _092_/A _090_/X gpio_defaults[6] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xinput4 vccd vssd input4/X resetn vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA__062__B user_gpio_out vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_073_ gpio_defaults[8] _073_/Y _074_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_125_ _125_/Q _088_/A _125_/D _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 XANTENNA__070__B gpio_defaults[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_108_ _072_/X vssd _095__3/Y _073_/Y _108_/Q vccd _128_/D _108_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xfanout26 vccd vssd _080_/A fanout31/X vssd vccd sky130_fd_sc_hd__buf_2 X_072_ _074_/A _072_/X gpio_defaults[8] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xinput5 vccd vssd _119_/D serial_data_in vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA__068__B gpio_defaults[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__073__B gpio_defaults[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_124_ _124_/Q _092_/A hold8/X _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_107_ _070_/X vssd _094__2/Y _071_/Y _107_/Q vccd hold5/X _107_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xfanout27 vccd vssd _074_/A _082_/A vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA__076__B gpio_defaults[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__081__B gpio_defaults[1] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_071_ gpio_defaults[2] _071_/Y _076_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 XANTENNA__084__B gpio_defaults[11] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_098__6 _100__8/A _098__6/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 X_106_ _068_/X vssd _058__1/Y _069_/Y _106_/Q vccd hold1/X _106_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 X_123_ hold8/A _092_/A hold7/X _131_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 XANTENNA__079__B gpio_defaults[4] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xfanout28 vccd vssd _086_/A _082_/A vssd vccd sky130_fd_sc_hd__buf_2 XANTENNA__087__B gpio_defaults[12] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__092__B gpio_defaults[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_070_ _076_/A _070_/X gpio_defaults[2] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xspare_cell vssd spare_cell/LO vssd vccd vccd sky130_fd_sc_hd__macro_sparecell X_122_ hold7/A _076_/A hold5/X _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 Xserial_clock_out_buffer serial_clock_out _131_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_16 Xfanout29 vccd vssd _134_/A _082_/A vssd vccd sky130_fd_sc_hd__buf_2 X_121_ hold5/A _076_/A hold6/X _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_102__10 _101__9/A _102__10/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 X_120_ hold6/A _076_/A hold1/X _130_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 X_058__1 _101__9/A _058__1/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 Xhold1 hold1/A hold1/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_0_serial_load clkbuf_0_serial_load/X serial_load vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_16 Xclkbuf_1_0__f_serial_clock _130_/CLK clkbuf_0_serial_clock/X vssd vccd vssd vccd + sky130_fd_sc_hd__clkbuf_16 Xhold2 hold2/A hold2/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 Xgpio_logic_high _067_/A vccd1 vssd1 gpio_logic_high XPHY_40 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xone_buffer one_buffer/A one vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xhold3 hold3/A hold3/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 X_101__9 _101__9/A _101__9/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XPHY_30 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_41 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_fanout28_A _082_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xhold4 hold4/A hold4/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 XPHY_20 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_31 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xhold5 hold5/A hold5/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 XPHY_10 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_21 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_32 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_089_ gpio_defaults[5] _089_/Y _088_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 Xhold6 hold6/A hold6/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 Xzero_buffer zero_buffer/A zero vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 XANTENNA_input5_A serial_data_in vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_105__13 _100__8/A _105__13/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XPHY_11 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_22 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_33 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xclkbuf_0_serial_clock clkbuf_0_serial_clock/X serial_clock vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_16 X_088_ _088_/A _088_/X gpio_defaults[5] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xhold7 hold7/A hold7/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 X_096__4 _101__9/A _096__4/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XPHY_12 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_23 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_34 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_087_ gpio_defaults[12] _087_/Y _134_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 Xclkbuf_1_1__f_serial_load _101__9/A clkbuf_0_serial_load/X vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_16 Xhold8 hold8/A hold8/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__071__B gpio_defaults[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__082__A _082_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_13 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_24 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_35 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__074__B gpio_defaults[9] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_086_ _086_/A _086_/X gpio_defaults[12] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 Xclkbuf_1_1__f_serial_clock _131_/CLK clkbuf_0_serial_clock/X vssd vccd vssd vccd + sky130_fd_sc_hd__clkbuf_16 XANTENNA__069__B gpio_defaults[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_069_ gpio_defaults[0] _069_/Y _086_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 Xhold9 hold9/A hold9/X vssd vccd vssd vccd sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__082__B gpio_defaults[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__077__B gpio_defaults[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input3_A pad_gpio_in vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_14 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_25 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_36 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__085__B gpio_defaults[11] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__090__B gpio_defaults[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_085_ gpio_defaults[11] _085_/Y _086_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_068_ _086_/A _068_/X gpio_defaults[0] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 XANTENNA__093__B gpio_defaults[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_15 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_26 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_37 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__088__B gpio_defaults[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_099__7 _101__9/A _099__7/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 X_067_ vccd vssd _067_/A _067_/X _133_/A vssd vccd sky130_fd_sc_hd__and2_2 X_084_ _086_/A _084_/X gpio_defaults[11] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 X_119_ hold1/A _080_/A _119_/D _131_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_4 XPHY_16 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_27 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_38 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_083_ gpio_defaults[10] _083_/Y _074_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_066_ _066_/Y _062_/Y _065_/Y _064_/X vccd vssd vssd vccd sky130_fd_sc_hd__o21ai_4 X_118_ _092_/X vssd _105__13/Y _093_/Y _118_/Q vccd _127_/D _118_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 XPHY_17 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_28 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_39 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input1_A mgmt_gpio_oeb vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xserial_load_out_buffer serial_load_out _101__9/A vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_16 X_065_ _106_/Q _065_/Y _064_/B input2/X vssd vccd vssd vccd sky130_fd_sc_hd__o21ai_2 X_082_ _082_/A _082_/X gpio_defaults[10] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 X_134_ vccd vssd _134_/X _134_/A vssd vccd sky130_fd_sc_hd__buf_2 X_117_ _090_/X vssd _104__12/Y _091_/Y _117_/Q vccd _126_/D _117_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 XPHY_18 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_29 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_081_ gpio_defaults[1] _081_/Y _080_/A vssd vccd vssd vccd sky130_fd_sc_hd__nand2b_2 X_064_ vccd vssd _064_/X _064_/B _113_/Q_N vssd vccd sky130_fd_sc_hd__and2b_2 X_133_ vccd vssd _133_/X _133_/A vssd vccd sky130_fd_sc_hd__buf_2 XPHY_19 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_116_ _088_/X vssd _103__11/Y _089_/Y _116_/Q vccd _125_/D _116_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 XANTENNA_clkbuf_0_serial_clock_A serial_clock vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_063_ vssd vccd _114_/Q _064_/B _115_/Q _063_/C vssd vccd sky130_fd_sc_hd__and3b_2 X_080_ _080_/A _080_/X gpio_defaults[1] vssd vccd vssd vccd sky130_fd_sc_hd__or2_0 X_132_ _132_/Q _134_/A hold3/A _132_/CLK vssd vccd vssd vccd sky130_fd_sc_hd__dfrtp_2 X_115_ _086_/X vssd _102__10/Y _087_/Y _115_/Q vccd hold3/X _115_/Q_N vssd vccd sky130_fd_sc_hd__dfbbn_2 Xoutput6 _133_/X mgmt_gpio_in vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 .ends .subckt sky130_fd_sc_hd__decap_12 VGND VPWR VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=4.73e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=4.73e+06u .ends .subckt gpio_defaults_block_0403 VPWR gpio_defaults[0] gpio_defaults[10] gpio_defaults[11] + gpio_defaults[12] gpio_defaults[1] gpio_defaults[2] gpio_defaults[3] gpio_defaults[4] + gpio_defaults[5] gpio_defaults[6] gpio_defaults[7] gpio_defaults[8] gpio_defaults[9] + VGND Xgpio_default_value\[8\] gpio_defaults[8] gpio_default_value\[8\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[6\] gpio_defaults[6] gpio_default_value\[6\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[4\] gpio_defaults[4] gpio_default_value\[4\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[2\] gpio_defaults[2] gpio_default_value\[2\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xgpio_default_value\[12\] gpio_defaults[12] gpio_default_value\[12\]/HI VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[0\] gpio_default_value\[0\]/LO gpio_defaults[0] VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[10\] gpio_default_value\[10\]/LO gpio_defaults[10] VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[9\] gpio_defaults[9] gpio_default_value\[9\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_2_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[7\] gpio_defaults[7] gpio_default_value\[7\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[5\] gpio_defaults[5] gpio_default_value\[5\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_2_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[3\] gpio_defaults[3] gpio_default_value\[3\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[1\] gpio_default_value\[1\]/LO gpio_defaults[1] VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[11\] gpio_defaults[11] gpio_default_value\[11\]/HI VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 .ends .subckt sky130_fd_sc_hd__a211o_2 X A2 A1 B1 C1 VGND VPWR VNB VPB X0 a_79_21# A1 a_348_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_79_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_79_21# C1 a_585_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_299_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_585_297# B1 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_348_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__xnor2_2 VGND VPWR Y A B VNB VPB X0 a_27_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_560_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND B a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B a_474_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y a_27_297# a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_474_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_27_47# B a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_474_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_560_47# a_27_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR A a_474_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR a_27_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_560_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__clkinv_1 Y A VGND VPWR VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u .ends .subckt sky130_fd_sc_hd__o21a_2 A1 B1 A2 X VGND VPWR VNB VPB X0 VPWR A1 a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_384_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_470_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_384_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_384_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__einvp_2 A Z TE VGND VPWR VNB VPB X0 VPWR a_27_47# a_215_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X1 a_204_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR TE a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 Z A a_204_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_215_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Z A a_215_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_204_47# TE VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND TE a_204_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_215_309# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X9 VGND TE a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__einvn_8 A TE_B Z VGND VPWR VNB VPB X0 a_204_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_215_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Z A a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_204_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X7 a_204_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR TE_B a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X10 Z A a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_204_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X12 a_215_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Z A a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_215_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_215_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR TE_B a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X17 a_215_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_204_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X19 a_215_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_215_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_204_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR TE_B a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X23 a_204_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X24 Z A a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Z A a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 Z A a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_204_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 Z A a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 VPWR TE_B a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X30 Z A a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_215_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 VPWR TE_B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VGND TE_B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__mux2_2 VGND VPWR A1 A0 S X VNB VPB X0 VPWR S a_591_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X1 a_591_369# A0 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_79_21# A1 a_306_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X4 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND S a_578_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_306_369# a_257_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X7 a_79_21# A0 a_288_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_288_47# a_257_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_257_199# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_578_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_257_199# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X13 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o2111a_2 D1 C1 A2 A1 B1 X VGND VPWR VNB VPB X0 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_80_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_80_21# D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR C1 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 X a_80_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_80_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_674_297# A2 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_386_47# D1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_674_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_566_47# B1 a_458_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A2 a_566_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_566_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_458_47# C1 a_386_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a21o_2 X B1 A1 A2 VGND VPWR VNB VPB X0 VPWR a_80_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_80_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_80_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_386_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_80_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_80_199# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_386_297# B1 a_80_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_458_47# A1 a_80_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A1 a_386_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_458_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__einvn_4 TE_B Z A VGND VPWR VNB VPB X0 VGND a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_204_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR TE_B a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X4 Z A a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_204_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X6 a_215_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Z A a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Z A a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR TE_B a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X10 a_204_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X11 a_215_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_215_47# A Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_215_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_204_309# A Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR TE_B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Z A a_204_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND TE_B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o31a_2 X A1 A2 B1 A3 VGND VPWR VNB VPB X0 a_108_21# B1 a_346_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_346_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_108_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_108_21# A3 a_430_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_430_297# A2 a_346_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_108_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_346_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A2 a_346_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_108_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR B1 a_108_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND a_108_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_346_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o211a_2 C1 B1 A2 A1 X VPWR VGND VNB VPB X0 a_27_47# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR C1 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_373_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_182_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_182_47# B1 a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_373_297# A2 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_110_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A1 a_182_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__clkbuf_2 A X VGND VPWR VNB VPB X0 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o22a_2 A2 X B1 A1 B2 VGND VPWR VNB VPB X0 a_301_47# B2 a_81_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A2 a_301_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_383_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_81_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_301_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND a_81_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_81_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_81_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_579_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_81_21# B1 a_301_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_579_297# A2 a_81_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_81_21# B2 a_383_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nand3b_2 Y C A_N B VGND VPWR VNB VPB X0 a_408_47# B a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_408_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y a_27_47# a_408_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND C a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_218_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_218_47# B a_408_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__clkbuf_1 VGND VPWR X A VNB VPB X0 VPWR a_75_212# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=790000u l=150000u X1 a_75_212# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=520000u l=150000u X2 a_75_212# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=790000u l=150000u X3 VGND a_75_212# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=520000u l=150000u .ends .subckt sky130_fd_sc_hd__nand4b_2 D C B Y A_N VGND VPWR VNB VPB X0 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_465_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND D a_655_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_215_47# B a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_655_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_655_47# C a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_465_47# C a_655_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nand3_2 A Y B C VGND VPWR VNB VPB X0 VGND C a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_277_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_47# B a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_277_47# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a22o_2 A1 A2 X B2 B1 VPWR VGND VNB VPB X0 VPWR a_27_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A2 a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_27_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_381_47# A1 a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_109_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_109_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__xor2_2 VPWR VGND X B A VNB VPB X0 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_470_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_470_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_112_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_470_47# B X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_112_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND B a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_470_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_112_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR B a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND a_112_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND A a_470_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_27_297# B a_112_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_112_47# a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_470_297# a_112_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 X B a_470_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_112_47# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a21boi_2 VPWR VGND B1_N A2 A1 Y VNB VPB X0 Y a_61_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A2 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_217_297# a_61_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_479_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_217_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y a_61_47# a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_61_47# B1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND A2 a_637_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND a_61_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A1 a_479_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B1_N a_61_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_217_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_637_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a32o_2 B2 X A2 A3 A1 B1 VGND VPWR VNB VPB X0 VPWR A3 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_299_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_352_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_549_47# A1 a_21_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_21_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_21_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_665_47# A2 a_549_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A1 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_299_297# B1 a_21_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_21_199# B2 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND A3 a_665_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_21_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_21_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_21_199# B1 a_352_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o2bb2a_2 A1_N X A2_N B2 B1 VGND VPWR VNB VPB X0 a_294_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A2_N a_295_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VPWR B1 a_665_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 VGND a_84_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_84_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_581_47# a_295_369# a_84_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_84_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_665_369# B2 a_84_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 VGND B2 a_581_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_295_369# A2_N a_294_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 X a_84_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_84_21# a_295_369# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X12 a_295_369# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X13 a_581_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__einvp_1 TE A Z VPWR VGND VNB VPB X0 a_276_297# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Z A a_204_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR TE a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 Z A a_276_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_204_47# TE VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND TE a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_ef_sc_hd__decap_12 VGND VPWR VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=4.73e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=4.73e+06u .ends .subckt sky130_fd_sc_hd__a21oi_2 B1 A2 A1 Y VGND VPWR VNB VPB X0 VGND A2 a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A1 a_114_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_114_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_285_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and4b_2 VPWR VGND X A_N D C B VNB VPB X0 VPWR a_193_413# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_297_47# a_27_413# a_193_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_369_47# B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_193_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR D a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND D a_469_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND a_193_413# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR B a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_193_413# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 X a_193_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_193_413# a_27_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_469_47# C a_369_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_27_413# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o221a_2 B2 A2 X B1 C1 A1 VGND VPWR VNB VPB X0 VPWR a_38_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A1 a_497_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_38_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_141_47# B2 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_497_297# A2 a_38_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A1 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR C1 a_38_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_237_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_38_47# B2 a_237_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_225_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_38_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_141_47# C1 a_38_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_38_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_225_47# B1 a_141_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and3_2 B X A C VPWR VGND VNB VPB X0 VPWR a_29_311# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_29_311# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A a_29_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND a_29_311# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_184_53# B a_112_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR C a_29_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_29_311# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_112_53# A a_29_311# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_29_311# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND C a_184_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o21ba_2 B1_N A1 X A2 VGND VPWR VNB VPB X0 VGND B1_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VGND A2 a_478_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_478_47# a_27_93# a_174_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_478_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A1 a_574_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR B1_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_574_297# A2 a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_174_21# a_27_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__o32a_2 B1 B2 A3 A2 A1 X VGND VPWR VNB VPB X0 a_429_297# A2 a_345_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A2 a_345_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_345_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_345_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_629_297# B2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B1 a_629_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_79_21# B2 a_345_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_345_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_79_21# A3 a_429_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_345_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a31o_2 X B1 A3 A1 A2 VGND VPWR VNB VPB X0 VPWR A2 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_277_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_79_21# B1 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_277_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_361_47# A2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_277_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_79_21# A1 a_361_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__clkinv_2 Y A VPWR VGND VNB VPB X0 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__clkinv_8 Y A VGND VPWR VNB VPB X0 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__or2_2 B X A VPWR VGND VNB VPB X0 a_121_297# B a_39_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_39_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_39_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_39_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_39_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A a_121_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND A a_39_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_39_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nand4_2 B A Y D C VGND VPWR VNB VPB X0 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_471_47# B a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_47# C a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_277_47# B a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y A a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_277_47# C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_471_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND D a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt digital_pll clockp[1] dco div[0] div[1] div[2] div[3] div[4] enable ext_trim[0] + ext_trim[10] ext_trim[11] ext_trim[12] ext_trim[13] ext_trim[14] ext_trim[15] ext_trim[16] + ext_trim[17] ext_trim[18] ext_trim[19] ext_trim[1] ext_trim[20] ext_trim[21] ext_trim[22] + ext_trim[23] ext_trim[24] ext_trim[25] ext_trim[2] ext_trim[3] ext_trim[4] ext_trim[5] + ext_trim[6] ext_trim[7] ext_trim[8] ext_trim[9] osc resetb VPWR clockp[0] VGND X_432_ _433_/B _432_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_13_177 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_363_ _363_/X ext_trim[2] _348_/X _398_/B _362_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__a211o_2 X_294_ VGND VPWR _313_/A _397_/A _325_/A VGND VPWR sky130_fd_sc_hd__xnor2_2 Xringosc.dstage\[1\].id.delayint0 ringosc.dstage\[1\].id.delayen0/A ringosc.dstage\[1\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 XFILLER_10_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_346_ VPWR VGND _456_/D _346_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_415_ _468_/Q _416_/B _370_/A _376_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 X_277_ _302_/A _278_/D _420_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_0_24 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_329_ _463_/Q _328_/Y _291_/X _463_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_2 Xringosc.dstage\[11\].id.delayen1 ringosc.dstage\[11\].id.delayen1/A ringosc.dstage\[11\].id.delayen1/Z + _423_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__392__A2 ext_trim[13] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__383__A2 ext_trim[9] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xringosc.dstage\[10\].id.delayenb0 ringosc.dstage\[10\].id.delayenb1/A _385_/X ringosc.dstage\[10\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 XFILLER_13_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[9\].id.delayenb0 ringosc.dstage\[9\].id.delayenb1/A _383_/X ringosc.dstage\[9\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 X_362_ _438_/A _362_/Y _397_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_431_ _433_/B _431_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_13_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_293_ VPWR VGND _328_/B _293_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_345_ VGND VPWR _456_/Q _455_/Q _345_/S _346_/A VGND VPWR sky130_fd_sc_hd__mux2_2 XANTENNA__410__A1 _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_276_ _465_/Q _302_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_414_ _413_/X _403_/B _359_/A _406_/B _371_/Y _414_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o2111a_2 X_328_ _328_/Y _463_/Q _328_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_259_ _259_/X _258_/X _288_/B _288_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 Xringosc.dstage\[9\].id.delayenb1 _421_/X ringosc.dstage\[9\].id.delayen1/Z ringosc.dstage\[9\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[10\].id.delayenb1 _422_/X ringosc.dstage\[10\].id.delayen1/Z ringosc.dstage\[10\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 XFILLER_15_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_361_ dco _398_/B _367_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_430_ _433_/B _430_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_13_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_292_ _293_/A _397_/A _325_/A _291_/X _278_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_2 XFILLER_3_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_275_ _466_/Q _420_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_344_ VPWR VGND _457_/D _344_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_413_ _412_/X _386_/Y _367_/Y _301_/Y _413_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 XANTENNA__410__A2 ext_trim[18] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_2_112 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[4\].id.delayen0 ringosc.dstage\[4\].id.delayen0/A ringosc.dstage\[4\].id.delayen0/Z + _369_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_258_ VPWR VGND div[1] _258_/X _258_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_327_ VPWR VGND _464_/D _327_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_16_166 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[5\].id.delayenb0 ringosc.dstage\[5\].id.delayenb1/A _373_/X ringosc.ibufp10/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 Xringosc.dstage\[9\].id.delaybuf0 ringosc.dstage\[8\].id.delayen0/Z ringosc.dstage\[9\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xringosc.dstage\[10\].id.delaybuf0 ringosc.dstage\[9\].id.delayen0/Z ringosc.dstage\[10\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_291_ VGND VPWR _291_/B _291_/X _285_/X _291_/C VGND VPWR sky130_fd_sc_hd__and3b_2 XFILLER_9_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_360_ _360_/X _403_/A _352_/X ext_trim[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 XANTENNA__244__A div[2] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_12_24 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_343_ VGND VPWR _457_/Q _456_/Q _345_/S _344_/A VGND VPWR sky130_fd_sc_hd__mux2_2 X_274_ VPWR VGND _464_/Q _324_/B _463_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_412_ _283_/B _412_/X _381_/A _420_/B _376_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_2 Xringosc.dstage\[4\].id.delayen1 ringosc.dstage\[4\].id.delayen1/A ringosc.dstage\[4\].id.delayen1/Z + _409_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_326_ VGND VPWR _325_/X _464_/Q _328_/B _327_/A VGND VPWR sky130_fd_sc_hd__mux2_2 X_257_ _288_/C _257_/C div[0] _257_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_2 XANTENNA__252__A div[1] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__427__A _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_309_ VPWR VGND _309_/A _309_/X _309_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_15_13 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[5\].id.delayenb1 _410_/X ringosc.dstage\[5\].id.delayen1/Z ringosc.dstage\[5\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[9\].id.delaybuf1 VGND VPWR ringosc.dstage\[9\].id.delayen1/A ringosc.dstage\[9\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xringosc.dstage\[10\].id.delaybuf1 VGND VPWR ringosc.dstage\[10\].id.delayen1/A ringosc.dstage\[10\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XANTENNA__350__A ext_trim[0] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__422__A1 _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_290_ _290_/D _290_/C _290_/B _291_/C _266_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4b_2 XANTENNA__404__A1 _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_342_ _342_/A _458_/D _347_/B _342_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_273_ VPWR VGND _376_/A _467_/Q VGND VPWR sky130_fd_sc_hd__buf_2 X_411_ _379_/X ext_trim[19] _411_/X _403_/B _403_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_256_ _256_/A _257_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_0_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_325_ VPWR VGND _325_/X _325_/B _325_/A VGND VPWR sky130_fd_sc_hd__xor2_2 X_308_ VGND VPWR _309_/B _420_/A _325_/A VGND VPWR sky130_fd_sc_hd__xnor2_2 X_239_ _239_/B _240_/C _262_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 XFILLER_20_14 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__348__A dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_15_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__258__A div[1] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_22_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__422__A2 ext_trim[23] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xringosc.dstage\[5\].id.delaybuf0 ringosc.dstage\[4\].id.delayen0/Z ringosc.dstage\[5\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XANTENNA__404__A2 ext_trim[16] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_341_ VPWR VGND _347_/B _340_/Y _342_/C _459_/D VGND VPWR sky130_fd_sc_hd__a21boi_2 X_272_ VPWR VGND _325_/A _302_/B VGND VPWR sky130_fd_sc_hd__buf_2 X_410_ _410_/X _398_/X _428_/A ext_trim[18] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 Xringosc.dstage\[1\].id.delayenb0 ringosc.dstage\[1\].id.delayenb1/A _360_/X ringosc.dstage\[1\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 XFILLER_5_134 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[8\].id.delayint0 ringosc.dstage\[8\].id.delayen0/A ringosc.dstage\[8\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 X_255_ _473_/Q _256_/A _342_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_324_ _324_/B _325_/B _324_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XANTENNA__266__A div[4] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_1_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_238_ _239_/B _461_/Q _476_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_307_ _325_/A _309_/A _316_/A _316_/B _313_/A _398_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a32o_2 XFILLER_20_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_22_117 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__361__B dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xringosc.dstage\[1\].id.delayenb1 _396_/X ringosc.dstage\[1\].id.delayen1/Z ringosc.dstage\[1\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[5\].id.delaybuf1 VGND VPWR ringosc.dstage\[5\].id.delayen1/A ringosc.dstage\[5\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_340_ VGND VPWR _340_/Y _459_/Q _342_/A VGND VPWR sky130_fd_sc_hd__xnor2_2 X_271_ _302_/B _260_/X _266_/X _290_/C _267_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_2 X_469_ _469_/Q _445_/Y _469_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xringosc.dstage\[1\].id.delayen0 ringosc.dstage\[1\].id.delayen0/A ringosc.dstage\[1\].id.delayen0/Z + _360_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__389__A2 ext_trim[12] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_254_ _257_/B _342_/A _473_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_13_81 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_323_ _328_/B _465_/D _322_/Y _291_/X _465_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__o2bb2a_2 X_237_ _476_/Q _262_/A _461_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_306_ _401_/B _398_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XANTENNA__289__A1 div[3] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_13_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_19_145 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_270_ _269_/Y _268_/Y _266_/B div[4] _290_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 X_399_ _379_/X ext_trim[15] _399_/X _398_/X _397_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_468_ _468_/Q _444_/Y _468_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xringosc.dstage\[1\].id.delayen1 ringosc.dstage\[1\].id.delayen1/A ringosc.dstage\[1\].id.delayen1/Z + _396_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_322_ VGND VPWR _322_/Y _322_/A _322_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 Xringosc.dstage\[1\].id.delaybuf0 ringosc.dstage\[0\].id.delayen0/Z ringosc.dstage\[1\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_253_ _253_/B _288_/B _258_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 Xringosc.dstage\[4\].id.delayint0 ringosc.dstage\[4\].id.delayen0/A ringosc.dstage\[4\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 X_305_ _325_/A _316_/B _322_/A _322_/B _301_/Y _406_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__a32o_2 X_236_ _240_/B _251_/B _251_/A _247_/B _235_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a211o_2 X_219_ VGND VPWR _476_/Q _461_/Q _345_/S _220_/A VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_16_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.dstage\[9\].id.delayen0 ringosc.dstage\[9\].id.delayen0/A ringosc.dstage\[9\].id.delayen0/Z + _383_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_398_ VPWR VGND _398_/A _398_/X _398_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_4_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_467_ _467_/Q _442_/Y _467_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xringosc.dstage\[1\].id.delaybuf1 VGND VPWR ringosc.dstage\[1\].id.delayen1/A ringosc.dstage\[1\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_252_ div[1] _253_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_321_ VGND VPWR _466_/D _420_/B _321_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 X_235_ VPWR VGND _459_/Q _235_/X _474_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_304_ _322_/B _324_/B _302_/B _303_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 XFILLER_1_20 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_82 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_218_ VPWR VGND _477_/D _218_/A VGND VPWR sky130_fd_sc_hd__buf_2 Xringosc.dstage\[9\].id.delayen1 ringosc.dstage\[9\].id.delayen1/A ringosc.dstage\[9\].id.delayen1/Z + _421_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XFILLER_15_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_22_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__270__A1 div[4] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_397_ _397_/Y _397_/A _397_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_466_ _466_/Q _441_/Y _466_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_13_62 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_320_ _293_/A _319_/X _322_/B _302_/A _321_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 X_251_ VGND VPWR _258_/B _251_/A _251_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 X_449_ _451_/B _449_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_303_ _324_/A _303_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_234_ VPWR VGND _460_/Q _247_/B _475_/Q VGND VPWR sky130_fd_sc_hd__and2_2 Xringosc.dstage\[0\].id.delayint0 ringosc.dstage\[0\].id.delayen0/A ringosc.dstage\[0\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 Xringosc.iss.reseten0 _433_/B ringosc.iss.const1/HI ringosc.ibufp00/A VPWR VGND VGND + VPWR sky130_fd_sc_hd__einvp_1 X_217_ VGND VPWR _477_/Q _462_/Q _347_/B _218_/A VGND VPWR sky130_fd_sc_hd__mux2_2 XANTENNA__470__D osc VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__419__A1 _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_114 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_396_ _379_/X ext_trim[14] _396_/X _395_/X _372_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_465_ _465_/Q _440_/Y _465_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xringosc.dstage\[8\].id.delayenb0 ringosc.dstage\[8\].id.delayenb1/A _380_/X ringosc.dstage\[8\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 X_250_ _250_/Y _250_/A _250_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_448_ _451_/B _448_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_1_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_379_ VPWR VGND _379_/X dco VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_1_99 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_302_ VGND VPWR _322_/A _302_/A _302_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 X_233_ VPWR VGND _251_/B _474_/Q _459_/Q VGND VPWR sky130_fd_sc_hd__xor2_2 XFILLER_19_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_216_ VPWR VGND _347_/B _345_/S VGND VPWR sky130_fd_sc_hd__buf_2 XANTENNA__419__A2 ext_trim[21] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xringosc.iss.delayint0 ringosc.iss.delayen0/A ringosc.iss.delayen1/Z VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkinv_1 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_21_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_133 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_464_ _464_/Q _439_/Y _464_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_395_ VGND VPWR _395_/B _395_/X _376_/B _395_/C VGND VPWR sky130_fd_sc_hd__and3b_2 XFILLER_4_173 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.dstage\[8\].id.delayenb1 _419_/X ringosc.dstage\[8\].id.delayen1/Z ringosc.dstage\[8\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 XFILLER_1_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_378_ _378_/X _377_/X _352_/X ext_trim[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_447_ VPWR VGND _454_/A dco VGND VPWR sky130_fd_sc_hd__buf_2 X_232_ VPWR VGND _458_/Q _251_/A _473_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_301_ _301_/Y _406_/C _381_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_1_45 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__373__A2 ext_trim[5] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_215_ VPWR VGND _345_/S _215_/A VGND VPWR sky130_fd_sc_hd__buf_2 Xringosc.dstage\[6\].id.delayen0 ringosc.dstage\[6\].id.delayen0/A ringosc.dstage\[6\].id.delayen0/Z + _375_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__364__A2 ext_trim[3] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_15_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_6 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_394_ _420_/C _395_/C _278_/D _420_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 X_463_ _463_/Q _437_/Y _463_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_446_ _451_/B _446_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_377_ _406_/C _403_/A _376_/Y _377_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_2 Xringosc.dstage\[4\].id.delayenb0 ringosc.dstage\[4\].id.delayenb1/A _369_/X ringosc.dstage\[4\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 Xringosc.dstage\[8\].id.delaybuf0 ringosc.dstage\[7\].id.delayen0/Z ringosc.dstage\[8\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_300_ _381_/A _370_/A _465_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_231_ _231_/B _240_/A _460_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 X_429_ VPWR VGND _437_/A _438_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_10_99 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[10\].id.delayen0 ringosc.dstage\[10\].id.delayen0/A ringosc.dstage\[10\].id.delayen0/Z + _385_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_214_ VGND VPWR _215_/A _472_/D _472_/Q VGND VPWR sky130_fd_sc_hd__xnor2_2 Xringosc.dstage\[6\].id.delayen1 ringosc.dstage\[6\].id.delayen1/A ringosc.dstage\[6\].id.delayen1/Z + _411_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XPHY_7 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_172 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_393_ _395_/B _406_/C _468_/Q _376_/A _367_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a211o_2 X_462_ _462_/Q _436_/Y _462_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_445_ _451_/B _445_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_376_ _376_/Y _376_/A _376_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 Xringosc.dstage\[4\].id.delayenb1 _409_/X ringosc.dstage\[4\].id.delayen1/Z ringosc.dstage\[4\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[8\].id.delaybuf1 VGND VPWR ringosc.dstage\[8\].id.delayen1/A ringosc.dstage\[8\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_230_ _475_/Q _231_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_428_ _433_/B _428_/Y _428_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_359_ VPWR VGND _359_/A _403_/A _359_/B VGND VPWR sky130_fd_sc_hd__and2_2 Xringosc.dstage\[10\].id.delayen1 ringosc.dstage\[10\].id.delayen1/A ringosc.dstage\[10\].id.delayen1/Z + _422_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XFILLER_19_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_8 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_21_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__421__B1 ext_trim[22] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_7_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_392_ _392_/X _391_/X _428_/A ext_trim[13] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_461_ _461_/Q _435_/Y _461_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_444_ _451_/B _444_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_375_ _375_/X _374_/Y _352_/X ext_trim[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_358_ _358_/B _359_/B dco VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_427_ _433_/B _427_/Y _428_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_289_ _250_/Y _249_/X _242_/Y div[3] _290_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 Xringosc.dstage\[4\].id.delaybuf0 ringosc.dstage\[3\].id.delayen0/Z ringosc.dstage\[4\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_10_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[0\].id.delayenb0 ringosc.dstage\[0\].id.delayenb1/A _351_/Y ringosc.dstage\[0\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 Xringosc.dstage\[7\].id.delayint0 ringosc.dstage\[7\].id.delayen0/A ringosc.dstage\[7\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 XFILLER_18_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__267__A1 div[3] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__425__A enable VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_391_ _370_/A _403_/A _376_/Y _391_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_2 X_460_ _460_/Q _433_/Y _460_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_1_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_374_ dco _358_/B _420_/B _374_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 X_443_ VPWR VGND _451_/B _454_/B VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_6_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_357_ _398_/A _358_/B _469_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_288_ VPWR VGND _290_/B _258_/X _288_/D _288_/C _288_/B VGND VPWR sky130_fd_sc_hd__and4b_2 X_426_ VPWR VGND _433_/B _454_/B VGND VPWR sky130_fd_sc_hd__buf_2 Xringosc.dstage\[3\].id.delayen0 ringosc.dstage\[3\].id.delayen0/A ringosc.dstage\[3\].id.delayen0/Z + _364_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 Xringosc.dstage\[0\].id.delayenb1 _392_/X ringosc.dstage\[0\].id.delayen1/Z ringosc.dstage\[0\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[4\].id.delaybuf1 VGND VPWR ringosc.dstage\[4\].id.delayen1/A ringosc.dstage\[4\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XANTENNA__428__A _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_409_ _348_/X _409_/X _407_/X _408_/X _405_/Y ext_trim[17] VGND VPWR VGND VPWR sky130_fd_sc_hd__a32o_2 XFILLER_2_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.iss.delayenb0 ringosc.iss.delayenb1/A ringosc.iss.ctrlen0/X ringosc.ibufp00/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 XFILLER_15_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_68 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__425__B resetb VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_ringosc.dstage\[0\].id.delaybuf0_A ringosc.ibufp00/A VGND VPWR VPWR VGND + sky130_fd_sc_hd__diode_2 XFILLER_7_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_160 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_390_ VPWR VGND _428_/A _438_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_13_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_442_ _442_/B _442_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_373_ _373_/X _372_/X _352_/X ext_trim[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_356_ _371_/B _359_/A _386_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_425_ _454_/B enable resetb VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_287_ div[0] _288_/D _256_/A _251_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 Xringosc.dstage\[3\].id.delayen1 ringosc.dstage\[3\].id.delayen1/A ringosc.dstage\[3\].id.delayen1/Z + _404_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_408_ _406_/B _365_/Y _408_/X _401_/Y _403_/B _420_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o221a_2 X_339_ VPWR VGND _460_/D _339_/A VGND VPWR sky130_fd_sc_hd__buf_2 Xringosc.dstage\[0\].id.delaybuf0 ringosc.ibufp00/A ringosc.dstage\[0\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xringosc.iss.delayenb1 _424_/X ringosc.iss.delayen1/Z ringosc.iss.delayenb1/A VGND + VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[3\].id.delayint0 ringosc.dstage\[3\].id.delayen0/A ringosc.dstage\[3\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 XANTENNA__349__A dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_8_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_441_ _442_/B _441_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_372_ _371_/Y _359_/B _367_/Y _301_/Y _372_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 XANTENNA__447__A dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_355_ _397_/A _371_/B _367_/A _467_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 X_286_ VPWR VGND _291_/B _215_/A _456_/Q _457_/Q _455_/Q VGND VPWR sky130_fd_sc_hd__and4b_2 X_424_ _379_/X ext_trim[25] _424_/X _407_/C _403_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_19_14 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_338_ VPWR VGND _347_/B _339_/A _338_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_269_ _269_/Y _462_/Q _477_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_407_ _407_/B _407_/X _407_/A _407_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 Xringosc.dstage\[0\].id.delaybuf1 VGND VPWR ringosc.dstage\[0\].id.delayen1/A ringosc.dstage\[0\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_11_81 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_107 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.iss.delaybuf0 VGND VPWR ringosc.iss.delayen1/A ringosc.iss.delayenb1/A VGND + VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_4_147 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_440_ _442_/B _440_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_371_ _371_/Y _397_/B _371_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_354_ VPWR VGND _386_/B _376_/B _467_/Q VGND VPWR sky130_fd_sc_hd__and2b_2 X_285_ _285_/B _285_/X _302_/B _324_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 X_423_ _379_/X ext_trim[24] _423_/X _420_/A _362_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_4_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_268_ _268_/Y _268_/A _268_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_337_ _342_/C _338_/B _335_/Y _331_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 X_406_ _407_/C _406_/C _401_/Y _406_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_2 XANTENNA__424__A2 ext_trim[25] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_8_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_370_ _465_/Q _397_/B _370_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_284_ _463_/Q _324_/A _464_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_353_ _397_/A _376_/B _469_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_422_ _422_/X _398_/B _428_/A ext_trim[23] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 Xringosc.dstage\[0\].id.delayen0 ringosc.dstage\[0\].id.delayen0/A ringosc.dstage\[0\].id.delayen0/Z + _351_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XFILLER_10_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_336_ _342_/C _462_/Q _336_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_18_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_267_ _249_/X div[3] _267_/X _242_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_2 X_405_ _420_/A _405_/Y _406_/B _420_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 Xringosc.dstage\[7\].id.delayenb0 ringosc.dstage\[7\].id.delayenb1/A _378_/X ringosc.dstage\[7\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 XANTENNA__379__A dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_21_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__409__B1 ext_trim[17] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_11_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_139 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_319_ VGND VPWR _324_/A _465_/Q _325_/A _319_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XANTENNA__360__A2 ext_trim[1] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_20_120 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__260__A1 div[3] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_17_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_0_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_421_ _348_/X _421_/X _408_/X _420_/Y _407_/X ext_trim[22] VGND VPWR VGND VPWR sky130_fd_sc_hd__a32o_2 Xringosc.dstage\[0\].id.delayen1 ringosc.dstage\[0\].id.delayen1/A ringosc.dstage\[0\].id.delayen1/Z + _392_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_283_ _283_/B _285_/B _298_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_352_ VPWR VGND _352_/X _438_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_266_ VPWR VGND div[4] _266_/X _266_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_335_ _460_/Q _342_/A _459_/Q _335_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 X_404_ _404_/X _403_/X _428_/A ext_trim[16] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 Xringosc.dstage\[7\].id.delayenb1 _417_/X ringosc.dstage\[7\].id.delayen1/Z ringosc.dstage\[7\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 XFILLER_11_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_318_ VPWR VGND _467_/D _318_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_249_ _250_/A _250_/B _242_/B _242_/A _243_/Y _249_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o32a_2 XFILLER_11_143 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[8\].id.delayen0 ringosc.dstage\[8\].id.delayen0/A ringosc.dstage\[8\].id.delayen0/Z + _380_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XFILLER_8_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclockp_buffer_0 clockp[0] _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XANTENNA_ringosc.ibufp00_A ringosc.ibufp00/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_0_175 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_282_ _283_/B _367_/A _401_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_351_ _350_/Y _351_/Y _285_/B _348_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 X_420_ _420_/A _420_/Y _420_/B _420_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_334_ _347_/B _333_/Y _331_/B _461_/Q _461_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 X_403_ _403_/B _403_/X _403_/A _407_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 X_265_ VGND VPWR _266_/B _268_/A _268_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 XFILLER_11_30 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_317_ VGND VPWR _316_/X _376_/A _328_/B _318_/A VGND VPWR sky130_fd_sc_hd__mux2_2 X_248_ VGND VPWR _250_/B _248_/A _248_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 Xringosc.dstage\[3\].id.delayenb0 ringosc.dstage\[3\].id.delayenb1/A _364_/X ringosc.dstage\[3\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 Xringosc.dstage\[7\].id.delaybuf0 ringosc.dstage\[6\].id.delayen0/Z ringosc.dstage\[7\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xringosc.dstage\[11\].id.delayint0 ringosc.dstage\[11\].id.delayen0/A ringosc.dstage\[11\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 Xclockp_buffer_1 clockp[1] ringosc.ibufp11/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xringosc.dstage\[8\].id.delayen1 ringosc.dstage\[8\].id.delayen1/A ringosc.dstage\[8\].id.delayen1/Z + _419_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__384__A_N ext_trim[10] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_281_ _467_/Q _401_/B _468_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_350_ _350_/Y ext_trim[0] _438_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_14_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__257__A_N div[0] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_17_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_333_ _336_/B _333_/Y _462_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 X_264_ _268_/B _263_/X _240_/B _262_/Y _240_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_2 X_402_ _376_/Y _407_/B _401_/Y _381_/A _406_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_2 XANTENNA__363__A2 ext_trim[2] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_247_ _247_/B _248_/B _247_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_14_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_316_ VPWR VGND _316_/X _316_/B _316_/A VGND VPWR sky130_fd_sc_hd__xor2_2 Xringosc.dstage\[3\].id.delayenb1 _404_/X ringosc.dstage\[3\].id.delayen1/Z ringosc.dstage\[3\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[7\].id.delaybuf1 VGND VPWR ringosc.dstage\[7\].id.delayen1/A ringosc.dstage\[7\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_11_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_98 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_122 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_280_ _469_/Q _367_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_14_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_263_ VPWR VGND _461_/Q _263_/X _476_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_401_ _401_/Y _469_/Q _401_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XPHY_30 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_41 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_332_ _462_/Q _347_/B _336_/B _462_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_2 X_246_ _475_/Q _247_/A _460_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_14_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_315_ VPWR VGND _468_/D _315_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_22_20 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_229_ _468_/Q _397_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xringosc.dstage\[3\].id.delaybuf0 ringosc.dstage\[2\].id.delayen0/Z ringosc.dstage\[3\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xringosc.dstage\[6\].id.delayint0 ringosc.dstage\[6\].id.delayen0/A ringosc.dstage\[6\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 XFILLER_0_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xringosc.ibufp10 ringosc.ibufp11/A ringosc.ibufp10/A VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 X_477_ _477_/Q _454_/Y _477_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_262_ _262_/A _262_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_331_ VPWR VGND _461_/Q _336_/B _331_/B VGND VPWR sky130_fd_sc_hd__and2_2 XPHY_20 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_31 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_400_ _406_/B _403_/B _376_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 XFILLER_2_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_314_ VGND VPWR _313_/Y _468_/Q _328_/B _315_/A VGND VPWR sky130_fd_sc_hd__mux2_2 X_245_ _235_/X _251_/B _251_/A _248_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 Xringosc.dstage\[5\].id.delayen0 ringosc.dstage\[5\].id.delayen0/A ringosc.ibufp10/A + _373_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XFILLER_22_76 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_228_ VPWR VGND _420_/A _469_/Q VGND VPWR sky130_fd_sc_hd__buf_2 Xringosc.dstage\[3\].id.delaybuf1 VGND VPWR ringosc.dstage\[3\].id.delayen1/A ringosc.dstage\[3\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_3_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_0_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__375__A2 ext_trim[6] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xringosc.ibufp11 ringosc.ibufp11/Y ringosc.ibufp11/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_8 Xringosc.ibufp00 ringosc.ibufp01/A ringosc.ibufp00/A VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_14_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_476_ _476_/Q _453_/Y _476_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XPHY_10 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_32 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_43 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_330_ _459_/Q _331_/B _460_/Q _342_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 X_261_ VPWR VGND _268_/A _477_/Q _462_/Q VGND VPWR sky130_fd_sc_hd__xor2_2 X_459_ _459_/Q _432_/Y _459_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_11_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_244_ div[2] _250_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_313_ VGND VPWR _313_/Y _313_/A _313_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 Xringosc.dstage\[5\].id.delayen1 ringosc.dstage\[5\].id.delayen1/A ringosc.dstage\[5\].id.delayen1/Z + _410_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XFILLER_7_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_99 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_130 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_24 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_227_ VPWR VGND _473_/D _227_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_17_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_99 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__387__B1 ext_trim[11] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xringosc.dstage\[2\].id.delayint0 ringosc.dstage\[2\].id.delayen0/A ringosc.dstage\[2\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 Xringosc.ibufp01 _477_/CLK ringosc.ibufp01/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_8 XFILLER_14_56 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_475_ _475_/Q _452_/Y _475_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XPHY_11 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_33 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_44 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_260_ _259_/X _250_/Y _242_/Y div[3] _249_/X _260_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o2111a_2 XANTENNA__243__A div[3] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_389_ _389_/X _388_/X _352_/X ext_trim[12] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_458_ _458_/Q _431_/Y _458_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_243_ div[3] _243_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_14_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_312_ _297_/B _316_/B _316_/A _313_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 X_226_ VGND VPWR _473_/Q _342_/A _345_/S _227_/A VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_6_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.dstage\[11\].id.delayenb0 ringosc.dstage\[11\].id.delayenb1/A _387_/X ringosc.iss.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 XANTENNA__411__A2 ext_trim[19] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_474_ _474_/Q _451_/Y _474_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XANTENNA__287__B1 div[0] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_2_38 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_23 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_34 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_388_ _370_/A _359_/B _367_/Y _388_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_2 X_457_ _457_/Q _430_/Y _457_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_242_ _242_/B _242_/Y _242_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_311_ _328_/B _469_/D _309_/X _420_/A _310_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_2 XFILLER_11_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_225_ VPWR VGND _342_/A _458_/Q VGND VPWR sky130_fd_sc_hd__buf_2 Xringosc.dstage\[11\].id.delayenb1 _423_/X ringosc.dstage\[11\].id.delayen1/Z ringosc.dstage\[11\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 XFILLER_17_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__396__A2 ext_trim[14] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_0_60 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__378__A2 ext_trim[7] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__369__A2 ext_trim[4] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_473_ _473_/Q _450_/Y _473_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XPHY_13 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_24 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_35 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_387_ _348_/X _387_/X _359_/B _386_/Y _367_/Y ext_trim[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__a32o_2 X_456_ _456_/Q _428_/Y _456_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_14_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_310_ _328_/B _310_/Y _309_/B _309_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 X_439_ _442_/B _439_/Y _446_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_241_ _240_/C _240_/B _240_/A _242_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 Xringosc.dstage\[2\].id.delayen0 ringosc.dstage\[2\].id.delayen0/A ringosc.dstage\[2\].id.delayen0/Z + _363_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 Xringosc.iss.const1 ringosc.iss.const1/LO ringosc.iss.const1/HI VPWR VGND VGND VPWR + sky130_fd_sc_hd__conb_1 XFILLER_6_100 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_224_ VPWR VGND _474_/D _224_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_3_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.dstage\[6\].id.delayenb0 ringosc.dstage\[6\].id.delayenb1/A _375_/X ringosc.dstage\[6\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 Xringosc.dstage\[11\].id.delaybuf0 ringosc.dstage\[10\].id.delayen0/Z ringosc.dstage\[11\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_0_72 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_0_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_472_ _472_/Q _449_/Y _472_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XANTENNA__358__A dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_36 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_386_ _386_/Y _406_/B _386_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_17_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_455_ _455_/Q _427_/Y _455_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XANTENNA__423__A2 ext_trim[24] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_240_ _240_/B _242_/A _240_/A _240_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 Xringosc.dstage\[2\].id.delayen1 ringosc.dstage\[2\].id.delayen1/A ringosc.dstage\[2\].id.delayen1/Z + _399_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 X_369_ _369_/X _407_/A _352_/X ext_trim[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_438_ VPWR VGND _446_/A _438_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_223_ VGND VPWR _474_/Q _459_/Q _345_/S _224_/A VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_10_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.dstage\[6\].id.delayenb1 _411_/X ringosc.dstage\[6\].id.delayen1/Z ringosc.dstage\[6\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[11\].id.delaybuf1 VGND VPWR ringosc.dstage\[11\].id.delayen1/A ringosc.dstage\[11\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_17_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_471_ _472_/D _448_/Y _471_/D _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XPHY_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_26 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_454_ _454_/B _454_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_17_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_385_ _385_/X _348_/X _283_/B _384_/Y _278_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_2 Xringosc.iss.delayen0 ringosc.iss.delayen0/A ringosc.ibufp00/A _389_/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__417__B1 ext_trim[20] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_437_ _442_/B _437_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_3_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_368_ _359_/B _367_/Y _365_/Y _370_/A _407_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 X_299_ VPWR VGND _370_/A _466_/Q VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_10_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_222_ VPWR VGND _475_/D _222_/A VGND VPWR sky130_fd_sc_hd__buf_2 XANTENNA__399__A2 ext_trim[15] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_3_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xringosc.dstage\[2\].id.delayenb0 ringosc.dstage\[2\].id.delayenb1/A _363_/X ringosc.dstage\[2\].id.delayen0/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_8 Xringosc.dstage\[6\].id.delaybuf0 ringosc.ibufp10/A ringosc.dstage\[6\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_470_ _471_/D _446_/Y osc _477_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xringosc.dstage\[9\].id.delayint0 ringosc.dstage\[9\].id.delayen0/A ringosc.dstage\[9\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 Xringosc.dstage\[10\].id.delayint0 ringosc.dstage\[10\].id.delayen0/A ringosc.dstage\[10\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 XPHY_16 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_38 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_453_ _454_/B _453_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_384_ _438_/A _384_/Y ext_trim[10] VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 Xringosc.iss.delayen1 ringosc.iss.delayen1/A ringosc.iss.delayen1/Z _424_/X VGND VPWR + VGND VPWR sky130_fd_sc_hd__einvp_2 X_436_ _442_/B _436_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_367_ _367_/Y _367_/A _420_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_298_ VPWR VGND _406_/C _298_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_221_ VGND VPWR _475_/Q _460_/Q _345_/S _222_/A VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_6_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_419_ _419_/X _418_/X _428_/A ext_trim[21] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 XFILLER_22_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xringosc.dstage\[2\].id.delayenb1 _399_/X ringosc.dstage\[2\].id.delayen1/Z ringosc.dstage\[2\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__einvn_4 Xringosc.dstage\[6\].id.delaybuf1 VGND VPWR ringosc.dstage\[6\].id.delayen1/A ringosc.dstage\[6\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_6_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_28 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_452_ _454_/B _452_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_17_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_383_ _379_/X ext_trim[9] _383_/X _382_/X _372_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_297_ _297_/B _316_/A _297_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_435_ _442_/B _435_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_366_ VPWR VGND _397_/A _420_/C _376_/A VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_9_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_145 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_220_ VPWR VGND _476_/D _220_/A VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_17_18 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_349_ VPWR VGND _438_/A dco VGND VPWR sky130_fd_sc_hd__buf_2 X_418_ _418_/X _370_/A _302_/A _403_/X _401_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_2 XFILLER_2_173 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_63 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xringosc.iss.ctrlen0 _389_/X ringosc.iss.ctrlen0/X _433_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__or2_2 XFILLER_18_72 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_20_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__380__A2 ext_trim[8] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_18 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.dstage\[2\].id.delaybuf0 ringosc.dstage\[1\].id.delayen0/Z ringosc.dstage\[2\].id.delayenb1/A + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_451_ _451_/B _451_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_382_ _365_/Y _382_/X _367_/Y _406_/C _406_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_2 Xringosc.dstage\[5\].id.delayint0 ringosc.dstage\[5\].id.delayen0/A ringosc.dstage\[5\].id.delayen1/Z + VGND VPWR VGND VPWR sky130_fd_sc_hd__clkinv_1 XFILLER_14_109 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_365_ _386_/B _365_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_296_ VPWR VGND _467_/Q _297_/B _302_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_22_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_434_ VPWR VGND _442_/B _454_/B VGND VPWR sky130_fd_sc_hd__buf_2 X_279_ _298_/A _420_/B _302_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_348_ VPWR VGND _348_/X dco VGND VPWR sky130_fd_sc_hd__buf_2 X_417_ _348_/X _417_/X _414_/X _416_/Y _374_/Y ext_trim[20] VGND VPWR VGND VPWR sky130_fd_sc_hd__a32o_2 Xringosc.dstage\[7\].id.delayen0 ringosc.dstage\[7\].id.delayen0/A ringosc.dstage\[7\].id.delayen0/Z + _378_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__374__B1 dco VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_19 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xringosc.dstage\[2\].id.delaybuf1 VGND VPWR ringosc.dstage\[2\].id.delayen1/A ringosc.dstage\[2\].id.delayenb1/A + VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_450_ _451_/B _450_/Y _454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_381_ VPWR VGND _406_/B _381_/A VGND VPWR sky130_fd_sc_hd__buf_2 X_433_ _433_/B _433_/Y _437_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_22_154 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_295_ _302_/B _297_/A _376_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_364_ _364_/X _359_/B _352_/X ext_trim[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 X_416_ _416_/Y _420_/A _416_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_347_ _347_/B _455_/D _455_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 X_278_ _376_/A _469_/Q _278_/Y _278_/D _324_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4_2 Xringosc.dstage\[11\].id.delayen0 ringosc.dstage\[11\].id.delayen0/A ringosc.iss.delayenb1/A + _387_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 Xringosc.dstage\[7\].id.delayen1 ringosc.dstage\[7\].id.delayen1/A ringosc.dstage\[7\].id.delayen1/Z + _417_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__einvp_2 XANTENNA__392__A1 _428_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_20_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_380_ _379_/X ext_trim[8] _380_/X _371_/Y _359_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 .ends .subckt sky130_fd_io__com_ctl_ls_octl OUT_H_N OUT_H IN RST_H SET_H HLD_H_N VPB a_992_934# + VCC_IO a_181_1305# a_n17_1379# X0 a_361_1391# a_181_1305# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X1 VCC_IO a_130_181# OUT_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_128_1391# a_181_1305# a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X3 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_361_1391# HLD_H_N a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X6 a_634_829# a_992_934# a_181_1305# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X7 a_361_1391# a_181_1305# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X8 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 OUT_H_N a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X10 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_65_861# HLD_H_N a_957_1391# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 OUT_H a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_65_861# a_130_181# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X17 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_n17_1379# a_65_861# a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X19 a_181_1305# IN a_992_934# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X20 a_957_1391# a_181_1305# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_n17_1379# IN a_992_934# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X22 a_n17_1379# a_65_861# OUT_H_N a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 a_130_181# a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X24 a_724_1391# a_181_1305# a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X25 a_957_1391# a_181_1305# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X26 a_65_861# a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X27 a_634_829# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X28 a_130_181# SET_H a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X29 a_724_1391# a_181_1305# a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X30 a_n17_1379# RST_H a_65_861# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X31 a_128_1391# a_181_1305# a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u .ends .subckt sky130_fd_io__gpiov2_octl DM_H[0] DM_H[2] DM_H_N[0] DM_H_N[1] DM_H_N[2] PUEN_2OR1_H + DM_H[1] PDEN_H_N[1] PDEN_H_N[0] OD_H SLOW SLOW_H HLD_I_H_N a_n8755_2384# a_n9051_2020# + VCC_IO_uq1 w_n9346_2317# a_n9227_2020# a_n9283_2046# a_5840_3586# m1_n8913_3102# + VPWR VCC_IO_uq0 a_n8875_2020# a_4338_3622# a_3924_6676# a_n8931_2384# a_4514_3388# + SLOW_H_N VCC_IO VGND a_5813_4576# Xsky130_fd_io__com_ctl_ls_octl_0 SLOW_H_N SLOW_H SLOW OD_H VGND HLD_I_H_N VPWR m2_5755_2254# + VCC_IO_uq0 VPWR VGND sky130_fd_io__com_ctl_ls_octl X0 a_4667_4619# a_3966_4619# a_4491_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X1 a_5720_3560# a_5315_3924# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X2 VCC_IO DM_H[2] a_3933_3414# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X3 a_4282_3414# DM_H[2] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X4 VCC_IO_uq1 DM_H_N[0] a_4520_6066# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X5 a_3871_7368# a_3924_6676# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X6 a_n8755_2384# a_n9280_2384# a_n8755_2046# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X7 a_n9107_2384# a_n9227_2020# a_n9280_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X8 a_4634_3414# a_4514_3388# a_4458_3414# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X9 a_4872_6702# DM_H_N[2] VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 VCC_IO DM_H[2] a_3966_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X11 a_4996_5728# a_4520_6066# PUEN_2OR1_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X12 VCC_IO_uq1 a_4347_7368# a_5651_5728# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X13 VCC_IO_uq1 a_5052_5702# PUEN_2OR1_H VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X14 a_5488_3924# DM_H_N[1] a_5315_3924# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_5813_4576# a_5693_4550# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X16 VCC_IO a_5720_3560# a_5840_3586# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X17 VCC_IO_uq1 DM_H[0] a_5052_5702# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X18 a_4282_3816# DM_H[2] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X19 VCC_IO_uq1 DM_H_N[0] a_5175_7368# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X20 a_4634_3816# a_3933_3414# a_4458_3414# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X21 a_4491_4619# a_4371_4587# a_4315_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X22 a_5513_4576# a_3871_7368# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 PDEN_H_N[1] a_5651_6702# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X24 a_5315_3924# DM_H_N[1] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X25 VCC_IO DM_H[1] a_4667_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X26 a_n8931_2384# a_n9051_2020# a_n9107_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X27 a_4044_6066# DM_H_N[1] a_3871_6066# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X28 a_n8755_2046# a_n8875_2020# a_n9283_2046# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X29 PDEN_H_N[0] a_5651_5728# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X30 a_4520_6066# a_3871_6066# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X31 a_4347_7368# DM_H[0] VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X32 a_n8931_2384# a_n9280_2384# a_n8755_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X33 VCC_IO a_4458_3414# a_5488_3924# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X34 a_5513_4576# a_3871_7368# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X35 a_4371_4587# DM_H[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X36 VGND a_4458_3414# a_5315_3924# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X37 VCC_IO a_5693_4550# a_5813_4576# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X38 a_4338_3622# DM_H[0] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X39 PUEN_2OR1_H a_4520_6066# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X40 VGND PUEN_2OR1_H a_4044_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X41 PDEN_H_N[1] a_5651_6702# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X42 a_5348_7368# a_4872_6702# a_5175_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X43 VCC_IO_uq1 DM_H_N[0] a_4520_6066# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X44 VGND a_5651_6702# PDEN_H_N[1] VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X45 VCC_IO_uq1 DM_H[1] a_4347_7368# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X46 VCC_IO_uq1 DM_H_N[1] a_4872_6702# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X47 a_n8755_2384# a_n8875_2020# a_n8931_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X48 a_5840_3586# a_5720_3560# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X49 a_4458_3414# a_4338_3622# a_4282_3816# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X50 a_4315_5349# DM_H[2] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X51 VCC_IO_uq1 a_5175_7368# a_5651_6702# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X52 VCC_IO_uq1 a_4347_7368# a_5651_5728# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X53 a_4338_3622# DM_H[0] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X54 VGND a_5693_4550# a_5813_4576# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X55 a_4667_5349# a_4371_4587# a_4491_4619# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X56 VGND DM_H_N[2] a_3871_6066# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X57 a_5813_4576# a_5693_4550# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X58 a_5840_3586# a_5720_3560# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X59 a_5348_5728# a_4491_4619# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X60 VGND a_5651_5728# PDEN_H_N[0] VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X61 VGND a_3933_3414# a_4634_3414# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X62 a_4315_4619# DM_H[2] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X63 a_5693_4550# a_5513_4576# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X64 a_4667_4619# a_3966_4619# a_4491_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X65 PDEN_H_N[0] a_5651_5728# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X66 a_4044_6066# DM_H_N[1] a_3871_6066# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X67 VGND DM_H_N[0] a_5348_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X68 a_3871_7368# a_3924_6676# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X69 a_4872_6702# DM_H_N[2] VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X70 VCC_IO a_5720_3560# a_5840_3586# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X71 a_4282_3816# DM_H[2] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X72 VCC_IO DM_H[0] a_4634_3816# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X73 VCC_IO_uq1 PUEN_2OR1_H a_3871_7368# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X74 a_4634_3816# a_3933_3414# a_4458_3414# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X75 a_5813_4576# a_5693_4550# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X76 a_4491_4619# DM_H[1] a_4315_5349# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X77 a_n9280_2384# a_n9227_2020# a_n9283_2046# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X78 VGND a_3966_4619# a_4667_5349# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X79 VGND a_5052_5702# a_4996_5728# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X80 a_5175_7368# a_4872_6702# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X81 VGND a_5720_3560# a_5840_3586# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X82 VCC_IO_uq1 a_5651_6702# PDEN_H_N[1] VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X83 a_n8931_2384# a_n9280_2384# a_n8755_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X84 a_5052_5702# DM_H[0] a_5348_5728# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X85 VGND DM_H[2] a_3933_3414# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X86 a_4491_4619# a_4371_4587# a_4315_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X87 a_5720_3560# a_5315_3924# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X88 VCC_IO DM_H[1] a_4667_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X89 a_4520_7368# DM_H[0] a_4347_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X90 VCC_IO DM_H[2] a_3966_4619# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X91 PUEN_2OR1_H a_4520_6066# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X92 VCC_IO DM_H[2] a_3933_3414# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X93 VCC_IO_uq1 DM_H_N[2] a_4044_6066# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X94 a_n9283_2046# a_n9051_2020# a_n9280_2384# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X95 a_4371_4587# DM_H[1] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X96 a_5052_5702# a_4491_4619# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X97 a_4520_5728# a_3871_6066# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X98 VCC_IO_uq1 a_5651_5728# PDEN_H_N[0] VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X99 VCC_IO_uq1 DM_H_N[0] a_5175_7368# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X100 a_n8755_2384# a_n8875_2020# a_n8931_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X101 a_5488_3924# DM_H_N[1] a_5315_3924# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X102 a_4371_4587# DM_H[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X103 a_n9107_2384# a_n9227_2020# a_n9280_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X104 VGND DM_H[1] a_4520_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X105 a_4872_6702# DM_H_N[1] a_4872_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X106 VGND a_5175_7368# a_5651_6702# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X107 a_5693_4550# a_5513_4576# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X108 PDEN_H_N[0] a_5651_5728# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X109 PDEN_H_N[1] a_5651_6702# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X110 a_4338_3622# DM_H[0] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X111 VCC_IO_uq1 a_5052_5702# PUEN_2OR1_H VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X112 a_4347_7368# DM_H[0] VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X113 a_4520_6066# DM_H_N[0] a_4520_5728# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X114 VCC_IO_uq1 DM_H[0] a_5052_5702# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X115 a_5513_4576# a_3871_7368# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X116 VGND a_4347_7368# a_5651_5728# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X117 VCC_IO a_4458_3414# a_5488_3924# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X118 a_n8931_2384# a_n9051_2020# a_n9107_2384# w_n9346_2317# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X119 a_4044_7368# a_3924_6676# a_3871_7368# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X120 a_4872_7368# DM_H_N[2] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X121 a_5693_4550# a_5513_4576# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X122 VCC_IO DM_H[0] a_4634_3816# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X123 a_4458_3414# DM_H[0] a_4282_3414# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X124 a_4520_6066# a_3871_6066# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X125 VCC_IO_uq1 DM_H[1] a_4347_7368# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X126 a_3871_6066# DM_H_N[1] VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X127 VCC_IO_uq1 DM_H_N[1] a_4872_6702# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X128 VCC_IO_uq1 a_5175_7368# a_5651_6702# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X129 VCC_IO_uq1 DM_H_N[2] a_4044_6066# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X130 VCC_IO_uq1 PUEN_2OR1_H a_3871_7368# VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X131 a_5052_5702# a_4491_4619# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X132 a_5720_3560# a_5315_3924# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X133 a_5840_3586# a_5720_3560# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X134 VCC_IO a_5693_4550# a_5813_4576# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X135 a_5175_7368# a_4872_6702# VCC_IO_uq1 VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X136 VCC_IO_uq1 a_5651_5728# PDEN_H_N[0] VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X137 a_4458_3414# a_4338_3622# a_4282_3816# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X138 VCC_IO_uq1 a_5651_6702# PDEN_H_N[1] VCC_IO_uq1 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X139 a_4315_4619# DM_H[2] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X140 VGND DM_H[2] a_3966_4619# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u .ends .subckt sky130_fd_io__gpio_dat_ls_1v2 IN OUT_H_N RST_H SET_H HLD_H_N OUT_H VPWR_KA + VGND VCC_IO X0 a_2251_36# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X1 a_28_633# SET_H VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_1720_1202# HLD_H_N a_28_14# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X3 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X4 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X5 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X7 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR_KA a_2251_2228# a_2251_36# VPWR_KA sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X11 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X12 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X13 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X14 a_28_633# a_28_14# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X15 VGND IN a_2251_2228# VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X16 OUT_H a_28_633# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X17 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X20 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X22 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VGND a_28_633# OUT_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_2251_2228# IN VGND VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X27 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X28 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X29 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X31 a_2251_2228# IN VPWR_KA VPWR_KA sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X32 VGND a_28_633# a_28_14# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X33 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X35 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 VGND a_2251_2228# a_2251_36# VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X37 a_28_633# a_28_14# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X38 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 a_28_14# a_28_633# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X40 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X41 a_1251_128# HLD_H_N a_28_633# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X42 VCC_IO a_28_14# OUT_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X43 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X44 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X45 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X46 VGND RST_H a_28_14# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X47 OUT_H_N a_28_14# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X48 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X49 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_io__gpio_dat_lsv2 IN OUT_H_N RST_H SET_H HLD_H_N OUT_H VPWR_KA a_28_14# + VGND VCC_IO X0 a_2251_36# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X1 a_28_633# SET_H VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_1720_1202# HLD_H_N a_28_14# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X3 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X4 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X5 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X7 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR_KA a_2251_2228# a_2251_36# VPWR_KA sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X11 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X12 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X13 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X14 a_28_633# a_28_14# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X15 VGND IN a_2251_2228# VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X16 OUT_H a_28_633# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X17 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X20 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X22 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VGND a_28_633# OUT_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_2251_2228# IN VGND VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X27 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X28 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X29 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X31 a_2251_2228# IN VPWR_KA VPWR_KA sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X32 VGND a_28_633# a_28_14# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X33 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 a_1484_128# VPWR_KA a_1251_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X35 VGND a_2251_36# a_1484_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 VGND a_2251_2228# a_2251_36# VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X37 a_28_633# a_28_14# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X38 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 a_28_14# a_28_633# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X40 a_1251_128# VPWR_KA a_1484_128# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X41 a_1251_128# HLD_H_N a_28_633# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X42 VCC_IO a_28_14# OUT_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X43 a_1484_128# a_2251_36# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X44 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X45 a_2080_128# VPWR_KA a_1720_1202# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X46 VGND RST_H a_28_14# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X47 OUT_H_N a_28_14# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X48 a_2080_128# a_2251_2228# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X49 VGND a_2251_2228# a_2080_128# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_io__com_cclat PU_DIS_H OE_H_N DRVHI_H_uq5 PD_DIS_H_uq1 DRVLO_H_N_uq5 + VGND VCC_IO X0 a_947_1193# DRVLO_H_N_uq5 VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X1 VCC_IO a_505_1193# a_3417_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 VCC_IO a_505_1193# a_3417_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X3 a_3417_1193# DRVHI_H_uq5 a_4762_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X4 a_4762_1193# DRVHI_H_uq5 a_3417_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X5 VGND DRVHI_H_uq5 a_2361_1095# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X6 VCC_IO PU_DIS_H a_638_279# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X7 VCC_IO a_2361_1095# DRVLO_H_N_uq5 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X8 DRVLO_H_N_uq5 a_2361_1095# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X9 DRVHI_H_uq5 a_947_1193# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X10 a_2361_1095# DRVHI_H_uq5 VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X11 VCC_IO a_947_1193# DRVHI_H_uq5 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X12 DRVLO_H_N_uq5 a_2361_1095# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X13 VCC_IO a_2361_1095# DRVLO_H_N_uq5 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X14 DRVHI_H_uq5 a_947_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X15 VCC_IO a_947_1193# DRVHI_H_uq5 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X16 VGND PU_DIS_H a_638_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X17 a_4762_1193# DRVHI_H_uq5 a_3417_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X18 a_2361_1095# PD_DIS_H_uq1 a_4762_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X19 VGND PD_DIS_H_uq1 a_2361_1095# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X20 a_505_1193# a_176_279# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X21 VCC_IO a_638_279# a_947_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X22 a_3417_1193# DRVHI_H_uq5 a_4762_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X23 a_2361_1095# PD_DIS_H_uq1 VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X24 VGND a_947_1193# DRVHI_H_uq5 VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X25 DRVLO_H_N_uq5 a_2361_1095# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X26 VGND a_947_1193# DRVHI_H_uq5 VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X27 a_987_279# a_176_279# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X28 DRVHI_H_uq5 a_947_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X29 a_4762_1193# PD_DIS_H_uq1 a_2361_1095# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X30 DRVHI_H_uq5 a_947_1193# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X31 VCC_IO OE_H_N a_176_279# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X32 a_3417_1193# a_505_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X33 a_2361_1095# PD_DIS_H_uq1 a_4762_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X34 a_987_279# DRVLO_H_N_uq5 a_1628_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X35 VGND a_2361_1095# DRVLO_H_N_uq5 VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X36 DRVHI_H_uq5 a_947_1193# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X37 a_947_1193# a_176_279# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X38 VGND OE_H_N a_176_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X39 VCC_IO a_947_1193# DRVHI_H_uq5 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X40 VCC_IO a_2361_1095# DRVLO_H_N_uq5 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X41 DRVLO_H_N_uq5 a_2361_1095# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X42 VCC_IO a_505_1193# a_3417_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X43 DRVHI_H_uq5 a_947_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X44 VCC_IO a_505_1193# a_3417_1193# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X45 a_4762_1193# PD_DIS_H_uq1 a_2361_1095# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X46 VGND a_176_279# a_987_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X47 VGND a_947_1193# DRVHI_H_uq5 VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X48 a_947_1193# a_638_279# a_1628_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X49 VGND a_2361_1095# DRVLO_H_N_uq5 VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X50 DRVLO_H_N_uq5 a_2361_1095# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X51 a_1628_279# DRVLO_H_N_uq5 a_987_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X52 a_3417_1193# a_505_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X53 a_505_1193# a_176_279# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X54 DRVLO_H_N_uq5 a_2361_1095# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X55 VGND a_505_1193# a_2361_1095# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X56 a_3417_1193# a_505_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X57 VGND a_176_279# a_987_279# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X58 a_3417_1193# a_505_1193# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X59 VGND a_2361_1095# DRVLO_H_N_uq5 VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X60 a_2361_1095# a_505_1193# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X61 a_987_279# a_176_279# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X62 a_1628_279# a_638_279# a_947_1193# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u .ends .subckt sky130_fd_io__com_opath_datoev2 OUT DRVHI_H DRVLO_H_N VCC_IO HLD_I_OVR_H OE_H + OD_H a_5565_99# OE_N sky130_fd_io__gpio_dat_ls_1v2_0/OUT_H VPWR_KA li_5565_99# sky130_fd_io__gpio_dat_ls_1v2_0/SET_H + VGND Xsky130_fd_io__gpio_dat_ls_1v2_0 OUT sky130_fd_io__com_cclat_0/PU_DIS_H VGND sky130_fd_io__gpio_dat_ls_1v2_0/SET_H + HLD_I_OVR_H sky130_fd_io__gpio_dat_ls_1v2_0/OUT_H VPWR_KA VGND VCC_IO sky130_fd_io__gpio_dat_ls_1v2 Xsky130_fd_io__gpio_dat_lsv2_0 OE_N OE_H VGND OD_H HLD_I_OVR_H sky130_fd_io__com_cclat_0/OE_H_N + VPWR_KA a_28_1762# VGND VCC_IO sky130_fd_io__gpio_dat_lsv2 Xsky130_fd_io__com_cclat_0 sky130_fd_io__com_cclat_0/PU_DIS_H sky130_fd_io__com_cclat_0/OE_H_N + DRVHI_H sky130_fd_io__gpio_dat_ls_1v2_0/OUT_H DRVLO_H_N VGND VCC_IO sky130_fd_io__com_cclat .ends .subckt sky130_fd_io__com_pdpredrvr_weakv2 DRVLO_H_N PDEN_H_N PD_H VGND_IO VCC_IO X0 PD_H DRVLO_H_N a_73_866# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X1 a_73_866# PDEN_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 PD_H PDEN_H_N VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X3 VGND_IO DRVLO_H_N PD_H VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X4 VCC_IO PDEN_H_N a_73_866# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u .ends .subckt sky130_fd_io__gpiov2_octl_mux SEL_H_N A_H Y_H B_H SEL_H a_1266_1185# w_1191_2415# X0 Y_H SEL_H A_H a_1266_1185# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X1 A_H SEL_H_N Y_H w_1191_2415# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X2 Y_H SEL_H B_H w_1191_2415# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X3 B_H SEL_H_N Y_H a_1266_1185# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u .ends .subckt sky130_fd_io__gpiov2_pdpredrvr_strong sky130_fd_io__gpiov2_octl_mux_0/SEL_H + sky130_fd_io__gpiov2_octl_mux_0/B_H sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N sky130_fd_io__gpiov2_octl_mux_0/w_1191_2415# + sky130_fd_io__gpiov2_octl_mux_0/A_H sky130_fd_io__gpiov2_octl_mux_0/Y_H VSUBS Xsky130_fd_io__gpiov2_octl_mux_0 sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N sky130_fd_io__gpiov2_octl_mux_0/A_H + sky130_fd_io__gpiov2_octl_mux_0/Y_H sky130_fd_io__gpiov2_octl_mux_0/B_H sky130_fd_io__gpiov2_octl_mux_0/SEL_H + VSUBS sky130_fd_io__gpiov2_octl_mux_0/w_1191_2415# sky130_fd_io__gpiov2_octl_mux .ends .subckt sky130_fd_io__feascom_pupredrvr_nbiasv2 EN_H_N DRVHI_H PUEN_H NBIAS_uq3 PU_H_N_uq1 + EN_H_uq1 a_261_220# VGND_IO_uq2 a_2821_220# a_2874_118# VCC_IO a_1772_220# X0 VCC_IO DRVHI_H a_207_1014# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X1 VCC_IO a_250_1898# a_1507_1397# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X2 VGND_IO_uq2 a_261_220# a_261_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X3 a_1507_1397# a_250_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X4 a_261_220# a_261_220# VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X5 a_1672_194# a_207_1014# VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X6 NBIAS_uq3 a_250_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X7 a_250_1898# a_562_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X8 VGND_IO_uq2 a_1672_194# a_1772_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R0 a_562_1898# m1_2838_1831# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R1 NBIAS_uq3 m1_1014_127# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X9 VCC_IO a_250_1898# a_2874_118# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X10 NBIAS_uq3 NBIAS_uq3 a_261_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R2 NBIAS_uq3 m1_1014_800# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X11 VGND_IO_uq2 a_1672_194# a_1772_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R3 EN_H_uq1 m1_575_1252# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X12 VCC_IO DRVHI_H a_562_1898# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X13 a_261_220# a_261_220# VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R4 a_620_1263# m1_2838_1794# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R5 m1_612_1252# a_620_1263# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X14 a_250_1898# DRVHI_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X15 VGND_IO_uq2 DRVHI_H a_207_1014# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X16 VGND_IO_uq2 a_207_1014# NBIAS_uq3 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X17 VGND_IO_uq2 a_250_1898# a_1004_990# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X18 NBIAS_uq3 NBIAS_uq3 a_261_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R6 NBIAS_uq3 m1_1409_1332# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X19 VCC_IO a_250_1898# NBIAS_uq3 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X20 a_2874_118# a_250_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X21 a_583_914# EN_H_uq1 VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X22 a_2821_220# a_2874_118# a_2874_118# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R7 m1_1608_646# a_1772_220# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X23 a_1772_220# a_1672_194# VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X24 NBIAS_uq3 a_250_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X25 a_207_1014# DRVHI_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X26 a_250_1898# a_562_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R8 a_2421_2014# m1_2596_1928# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X27 a_261_220# NBIAS_uq3 NBIAS_uq3 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X28 NBIAS_uq3 EN_H_N VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X29 VCC_IO a_250_1898# a_1507_1397# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X30 VCC_IO a_562_1898# a_250_1898# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X31 a_1772_220# a_1672_194# VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X32 a_2821_220# a_2821_220# a_1672_194# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R9 m1_2596_1928# a_250_1898# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R10 PU_H_N_uq1 m1_702_1715# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R11 m1_1409_1332# a_1507_1397# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X33 a_1507_1397# a_250_1898# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u R12 m1_1046_126# a_261_220# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X34 VCC_IO EN_H_uq1 a_250_1898# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X35 a_562_1898# PUEN_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X36 a_2421_2014# PU_H_N_uq1 VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=8e+06u X37 a_737_914# a_620_1263# a_583_914# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u R13 m1_702_1715# a_620_1263# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R14 m1_1014_800# a_1004_990# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X38 VCC_IO a_250_1898# NBIAS_uq3 VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X39 a_261_220# NBIAS_uq3 NBIAS_uq3 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X40 VGND_IO_uq2 a_261_220# a_261_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R15 a_261_220# m1_1608_646# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X41 VCC_IO a_562_1898# a_250_1898# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X42 a_250_1898# DRVHI_H a_737_914# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X43 a_1672_194# a_2821_220# a_2821_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X44 a_562_1898# a_620_1263# a_620_1263# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X45 a_1672_194# VCC_IO VGND_IO_uq2 VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=8e+06u X46 a_2874_118# a_2874_118# a_2821_220# VGND_IO_uq2 sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u .ends .subckt sky130_fd_io__gpiov2_pupredrvr_strong_nd2 DRVHI_H PUEN_H EN_FAST[0] EN_FAST[1] + EN_FAST[2] EN_FAST[3] PU_H_N VGND_IO a_158_632# VCC_IO R0 m1_1184_866# PU_H_N sky130_fd_pr__res_generic_m1 w=260000u l=10000u X0 VCC_IO DRVHI_H PU_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 a_311_632# DRVHI_H a_158_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X2 VGND_IO EN_FAST[3] a_311_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u R1 a_158_632# m1_1184_866# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X3 PU_H_N DRVHI_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 PU_H_N PUEN_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 VCC_IO DRVHI_H PU_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u R2 PU_H_N a_1008_2434# sky130_fd_pr__res_generic_po w=330000u l=4e+06u X6 a_158_632# DRVHI_H a_809_1060# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u R3 a_158_632# a_1008_2434# sky130_fd_pr__res_generic_po w=330000u l=1.1e+07u X7 a_809_632# EN_FAST[2] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u X8 a_158_632# DRVHI_H a_809_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X9 a_311_1060# DRVHI_H a_158_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X10 VGND_IO EN_FAST[0] a_311_1060# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u X11 PU_H_N DRVHI_H a_158_109# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X12 VGND_IO PUEN_H a_158_109# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X13 a_809_1060# EN_FAST[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u .ends .subckt sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a DRVHI_H PUEN_H EN_FAST[0] EN_FAST[1] + EN_FAST[2] EN_FAST[3] PU_H_N VGND_IO a_353_606# a_609_606# VCC_IO R0 m1_1184_866# PU_H_N sky130_fd_pr__res_generic_m1 w=260000u l=10000u X0 VCC_IO DRVHI_H PU_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 a_311_632# DRVHI_H a_158_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X2 VGND_IO a_353_606# a_311_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u X3 VGND_IO PUEN_H a_158_199# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u R1 a_158_632# m1_1184_866# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X4 PU_H_N DRVHI_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 PU_H_N PUEN_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X6 VCC_IO DRVHI_H PU_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u R2 PU_H_N a_1008_2434# sky130_fd_pr__res_generic_po w=330000u l=4e+06u X7 a_158_632# DRVHI_H a_809_1060# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u R3 a_158_632# a_1008_2434# sky130_fd_pr__res_generic_po w=330000u l=1.1e+07u X8 a_809_632# a_609_606# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u X9 a_158_632# DRVHI_H a_809_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X10 a_311_1060# DRVHI_H a_158_632# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X11 VGND_IO EN_FAST[0] a_311_1060# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u X12 PU_H_N DRVHI_H a_158_199# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X13 a_809_1060# EN_FAST[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=1e+06u .ends .subckt sky130_fd_io__gpio_pupredrvr_strongv2 VCC_IO PU_H_N[3] SLOW_H_N PU_H_N[2] + PUEN_H sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# DRVHI_H sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + VSUBS Xsky130_fd_io__feascom_pupredrvr_nbiasv2_0 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_N + DRVHI_H PUEN_H sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 PU_H_N[2] sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_uq1 + sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# VSUBS sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# VCC_IO sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + sky130_fd_io__feascom_pupredrvr_nbiasv2 Xsky130_fd_io__gpiov2_pupredrvr_strong_nd2_0 DRVHI_H PUEN_H sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[0] + sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[1] sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[2] + sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[3] PU_H_N[3] VSUBS sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + VCC_IO sky130_fd_io__gpiov2_pupredrvr_strong_nd2 Xsky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0 DRVHI_H PUEN_H sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] + sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] + sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] PU_H_N[2] VSUBS sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] + sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] VCC_IO sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a R0 sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[0] m1_6556_1365# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R1 VSUBS m1_6555_1273# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X0 VCC_IO PUEN_H sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R2 m1_6299_1273# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[1] sky130_fd_pr__res_generic_m1 w=650000u l=10000u R3 VSUBS m1_6266_605# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R4 m1_5759_509# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[3] sky130_fd_pr__res_generic_m1 w=260000u l=10000u X1 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_N SLOW_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R5 m1_4777_1326# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] sky130_fd_pr__res_generic_m1 w=260000u l=10000u R6 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 m1_5786_421# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R7 m1_4655_1468# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/EN_FAST[3] sky130_fd_pr__res_generic_m1 w=260000u l=10000u R8 sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[2] m1_6266_568# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R9 m1_5786_421# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[3] sky130_fd_pr__res_generic_m1 w=260000u l=10000u R10 sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[3] m1_6300_1402# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X2 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_uq1 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R11 m1_6265_477# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[2] sky130_fd_pr__res_generic_m1 w=650000u l=10000u R12 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_uq1 m1_5722_509# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R13 VSUBS m1_6299_1273# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R14 sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[1] m1_6300_1365# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R15 m1_6555_1273# sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[0] sky130_fd_pr__res_generic_m1 w=650000u l=10000u R16 sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[3] m1_6265_477# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X3 VSUBS PUEN_H a_483_1179# VSUBS sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X4 a_483_1179# SLOW_H_N sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_N VSUBS sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X5 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_uq1 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_N VSUBS VSUBS sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R17 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/EN_H_uq1 m1_4740_1326# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R18 sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/EN_FAST[3] m1_6556_1402# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R19 sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 m1_4655_1468# sky130_fd_pr__res_generic_m1 w=260000u l=10000u .ends .subckt sky130_fd_io__gpiov2_obpredrvr sky130_fd_io__gpio_pupredrvr_strongv2_0/SLOW_H_N + sky130_fd_io__com_pdpredrvr_weakv2_0/PDEN_H_N sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# + sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N + sky130_fd_io__com_pdpredrvr_weakv2_0/VCC_IO sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/A_H sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H + sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + sky130_fd_io__com_pdpredrvr_weakv2_0/PD_H sky130_fd_io__gpio_pupredrvr_strongv2_0/PU_H_N[2] + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + sky130_fd_io__gpio_pupredrvr_strongv2_0/DRVHI_H sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + sky130_fd_io__gpio_pupredrvr_strongv2_0/PU_H_N[3] sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/w_1191_2415# + sky130_fd_io__com_pdpredrvr_weakv2_0/DRVLO_H_N sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/B_H + VSUBS sky130_fd_io__gpio_pupredrvr_strongv2_0/VCC_IO Xsky130_fd_io__com_pdpredrvr_weakv2_0 sky130_fd_io__com_pdpredrvr_weakv2_0/DRVLO_H_N + sky130_fd_io__com_pdpredrvr_weakv2_0/PDEN_H_N sky130_fd_io__com_pdpredrvr_weakv2_0/PD_H + VSUBS sky130_fd_io__com_pdpredrvr_weakv2_0/VCC_IO sky130_fd_io__com_pdpredrvr_weakv2 Xsky130_fd_io__gpiov2_pdpredrvr_strong_0 sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H + sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/B_H sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N + sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/w_1191_2415# + sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/A_H sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H + VSUBS sky130_fd_io__gpiov2_pdpredrvr_strong Xsky130_fd_io__gpio_pupredrvr_strongv2_0 sky130_fd_io__gpio_pupredrvr_strongv2_0/VCC_IO + sky130_fd_io__gpio_pupredrvr_strongv2_0/PU_H_N[3] sky130_fd_io__gpio_pupredrvr_strongv2_0/SLOW_H_N + sky130_fd_io__gpio_pupredrvr_strongv2_0/PU_H_N[2] sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + sky130_fd_io__gpio_pupredrvr_strongv2_0/DRVHI_H sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + VSUBS sky130_fd_io__gpio_pupredrvr_strongv2 .ends .subckt sky130_fd_io__gpiov2_octl_dat VPWR_KA VGND SLOW HLD_I_H_N HLD_I_OVR_H OD_H + SLOW_H_N DRVHI_H PU_H_N[2] PU_H_N[1] PU_H_N[0] PD_H[1] PD_H[0] PD_H[4] DRVLO_H_N + DM_H_N[2] DM_H[1] DM_H[0] OUT PD_H[3] PD_H[2] a_1106_3203# a_3125_3203# a_4416_3253# + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# + a_n433_1745# a_8354_4056# VGND_IO sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H + DM_H[1]_uq0 DM_H_N[0] DM_H_N[1] DM_H[2] a_1415_3203# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + OE_N sky130_fd_io__com_opath_datoev2_0/li_5565_99# a_9656_1708# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + VPWR a_1528_3203# a_2205_3177# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + VCC_IO PU_H_N[3] Xsky130_fd_io__gpiov2_octl_0 DM_H[0] DM_H[2] DM_H_N[0] DM_H_N[1] DM_H_N[2] sky130_fd_io__gpiov2_octl_0/PUEN_2OR1_H + DM_H[1]_uq0 sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] sky130_fd_io__gpiov2_octl_0/PDEN_H_N[0] + OD_H SLOW sky130_fd_io__gpiov2_octl_0/SLOW_H HLD_I_H_N sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N + DM_H[1] VCC_IO VCC_IO DM_H[0] VGND a_7799_1681# VCC_IO VPWR VCC_IO DM_H[2] a_13335_4479# + VCC_IO VCC_IO a_13335_4479# SLOW_H_N VCC_IO VGND sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H + sky130_fd_io__gpiov2_octl Xsky130_fd_io__com_opath_datoev2_0 OUT DRVHI_H DRVLO_H_N VCC_IO HLD_I_OVR_H sky130_fd_io__com_opath_datoev2_0/OE_H + OD_H VGND OE_N sky130_fd_io__com_opath_datoev2_0/sky130_fd_io__gpio_dat_ls_1v2_0/OUT_H + VPWR_KA sky130_fd_io__com_opath_datoev2_0/li_5565_99# OD_H VGND sky130_fd_io__com_opath_datoev2 Xsky130_fd_io__gpiov2_obpredrvr_0 SLOW_H_N sky130_fd_io__gpiov2_octl_0/PDEN_H_N[0] + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N + VCC_IO sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/A_H + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H + sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + PD_H[0] PU_H_N[2] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + DRVHI_H sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + PU_H_N[3] VCC_IO DRVLO_H_N DRVLO_H_N VGND_IO VCC_IO sky130_fd_io__gpiov2_obpredrvr X0 PD_H[4] DRVLO_H_N a_12137_3347# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X1 VCC_IO a_n461_1863# a_10398_443# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X2 VCC_IO sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_8876_944# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X3 a_8354_4056# PD_H[4] a_8354_3203# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X4 a_3125_3203# a_1415_3203# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X5 a_1528_3203# a_2205_3177# a_2205_3177# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X6 a_1415_3203# a_1528_3203# a_1528_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X7 VCC_IO a_1415_3203# a_3125_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X8 VCC_IO DRVLO_H_N a_1159_3105# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X9 VGND_IO a_7610_2597# a_1106_3203# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u R0 a_7462_4229# m1_10510_2769# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X10 PU_H_N[0] a_7799_1681# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X11 a_2205_3177# a_2205_3177# a_1528_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X12 a_1528_3203# a_1528_3203# a_1415_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X13 VGND_IO a_7799_1681# a_7743_1707# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 VCC_IO a_4416_3253# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X15 a_11758_843# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H PD_H[3] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=2e+06u X16 VCC_IO DRVHI_H PU_H_N[1] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X17 sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X18 a_1106_3203# a_1106_3203# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X19 a_4416_3253# a_4416_3253# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X20 PD_H[3] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R1 m1_10351_2626# m1_10378_2704# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R2 a_7610_2597# m1_8330_3159# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X21 VCC_IO a_n461_1863# a_9290_3718# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X22 VGND PD_H[4] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/A_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X23 a_1415_3203# a_1159_3105# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u R3 a_1106_3203# m1_10312_2627# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X24 PD_H[3] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H a_11053_559# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X25 a_7161_3177# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R4 a_7512_2477# m1_8994_2542# sky130_fd_pr__res_generic_m1 w=2.5e+06u l=10000u X26 a_n408_4001# sky130_fd_io__gpiov2_octl_0/SLOW_H a_n112_4027# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u R5 a_7462_4229# m1_7727_3684# sky130_fd_pr__res_generic_m1 w=640000u l=10000u X27 VCC_IO DRVHI_H PU_H_N[1] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X28 VCC_IO a_7610_2597# a_8026_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X29 a_7462_4229# a_7161_3177# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X30 a_9290_3718# a_1106_3203# a_9882_3718# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R6 a_7462_4229# m1_10378_2741# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R7 m1_8330_3159# a_8354_3203# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R8 m1_10312_2627# m1_10351_2626# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R9 VCC_IO m1_10523_1531# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X31 a_10564_1155# a_11085_1123# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X32 a_n408_1837# sky130_fd_io__gpiov2_octl_0/SLOW_H a_n112_1863# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u R10 a_1106_3203# m1_9138_2849# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X33 a_8876_944# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X34 VCC_IO sky130_fd_io__gpiov2_octl_0/SLOW_H a_n408_1837# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X35 VCC_IO a_n461_4027# a_9935_2938# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X36 a_4416_3253# a_1106_3203# a_1106_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X37 a_1106_3203# a_1106_3203# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X38 a_7512_2477# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X39 a_11053_559# a_10919_675# a_10398_443# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X40 a_1106_3203# a_1106_3203# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u R11 m1_10523_1531# a_11085_1123# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X41 a_4416_3253# a_1106_3203# a_1106_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X42 PD_H[2] DRVLO_H_N a_10194_3718# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X43 a_9656_1708# DRVHI_H PU_H_N[1] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X44 a_3125_3203# a_1415_3203# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X45 a_12137_3347# DRVLO_H_N PD_H[4] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X46 a_1159_3105# DRVLO_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X47 VGND a_n408_4001# a_n461_4027# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X48 PD_H[3] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X49 VCC_IO sky130_fd_io__gpiov2_octl_0/SLOW_H a_n408_4001# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X50 VGND_IO a_7610_2597# a_9179_2770# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X51 PD_H[3] sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R12 m1_10547_2769# a_10919_675# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X52 VCC_IO a_1415_3203# a_3125_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X53 a_7613_3603# a_7462_4229# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X54 a_3125_3203# a_1415_3203# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X55 sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X56 a_10873_1155# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H PD_H[3] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X57 VGND a_n408_1837# a_n461_1863# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X58 VCC_IO a_1159_3105# a_1106_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X59 PD_H[2] DRVLO_H_N VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X60 VCC_IO a_n408_1837# a_n461_1863# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X61 PD_H[3] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H a_10564_1155# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X62 PD_H[4] sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X63 a_11862_3305# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_11009_3305# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X64 a_8876_944# DRVLO_H_N PD_H[1] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R13 m1_4181_3684# a_4416_3253# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X65 a_7755_3603# a_7638_3476# a_7613_3603# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X66 PD_H[2] DRVLO_H_N a_9882_3718# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X67 VCC_IO PD_H[4] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/A_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X68 sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X69 a_11009_3305# DRVLO_H_N PD_H[2] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X70 a_9656_1708# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X71 a_n112_4027# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u R14 m1_7764_3684# a_7638_3476# sky130_fd_pr__res_generic_m1 w=640000u l=10000u X72 VGND_IO sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H PD_H[3] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X73 VCC_IO sky130_fd_io__gpiov2_octl_0/SLOW_H a_n408_1837# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X74 a_7610_2597# DRVLO_H_N a_7755_3603# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R15 a_1106_3203# m1_5837_4210# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X75 VGND_IO sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H PD_H[3] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X76 a_9179_2770# a_7610_2597# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X77 VGND_IO DRVLO_H_N PD_H[2] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X78 VGND_IO a_n461_4027# a_7161_3177# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X79 a_n112_1863# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X80 a_n408_1837# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X81 VCC_IO a_n408_4001# a_n461_4027# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R16 m1_9138_2849# a_9179_2770# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X82 VGND_IO sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] PD_H[2] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X83 a_4416_3253# a_4416_3253# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X84 a_8354_4056# PD_H[4] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X85 a_1106_3203# a_7610_2597# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X86 a_4416_3253# a_1106_3203# a_1106_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X87 a_1106_3203# a_1106_3203# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X88 a_10194_3718# DRVLO_H_N PD_H[2] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X89 PU_H_N[1] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X90 a_1528_3203# a_2205_3177# a_2205_3177# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X91 a_7638_3476# a_7638_3476# a_7512_2477# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X92 a_1415_3203# a_1528_3203# a_1528_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X93 VGND_IO sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/PUEN_H a_9656_1708# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X94 a_2205_3177# a_2205_3177# a_1528_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X95 a_1106_3203# a_7161_3177# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X96 PU_H_N[0] DRVHI_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X97 VGND_IO sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H PD_H[3] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X98 VCC_IO a_4416_3253# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X99 VCC_IO a_4416_3253# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u R17 a_1106_3203# m1_10375_2471# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R18 a_3125_3203# m1_4181_3684# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X100 a_4416_3253# a_4416_3253# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X101 a_9290_3718# a_n461_1863# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X102 VCC_IO sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_11009_3747# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X103 PU_H_N[1] DRVHI_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u R19 a_8026_3203# m1_8014_3310# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X104 a_n408_4001# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X105 VCC_IO a_n408_1837# a_n461_1863# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X106 VCC_IO sky130_fd_io__gpiov2_octl_0/SLOW_H a_n408_4001# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X107 VGND_IO DRVLO_H_N a_7512_2477# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R20 m1_10375_2471# a_10919_675# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X108 VCC_IO a_1106_3203# a_12137_3347# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u R21 PD_H[4] m1_9297_3844# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X109 PD_H[3] sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H a_10849_843# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=2e+06u X110 VCC_IO VGND_IO a_1415_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=8e+06u X111 VGND_IO sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] PD_H[3] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R22 m1_8014_3310# a_1106_3203# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X112 a_7610_2597# a_7512_2477# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X113 a_10398_443# a_n461_1863# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X114 a_4416_3253# a_1106_3203# a_1106_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u R23 m1_9297_3844# a_7638_3476# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X115 a_10398_443# a_11085_1123# a_11053_559# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X116 a_n408_1837# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X117 VGND_IO DRVLO_H_N a_1159_3105# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R24 m1_5874_4210# a_4416_3253# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X118 VCC_IO DRVHI_H PU_H_N[0] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X119 VGND_IO DRVLO_H_N PD_H[4] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X120 PD_H[2] a_n461_1863# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X121 VGND_IO DRVLO_H_N a_7610_2597# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X122 PD_H[1] sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X123 a_11862_3305# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_9290_3718# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X124 a_4416_3253# a_4416_3253# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X125 VCC_IO a_1415_3203# a_3125_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X126 VCC_IO a_1415_3203# a_3125_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X127 a_9290_3718# a_n461_1863# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X128 a_3125_3203# a_1415_3203# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X129 a_11053_559# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H PD_H[3] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X130 a_9935_2938# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_7161_3177# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X131 VCC_IO a_n408_4001# a_n461_4027# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X132 a_1528_3203# a_1528_3203# a_1415_3203# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u R25 a_11085_1123# m1_10778_2548# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X133 VCC_IO a_10919_675# a_10873_1155# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X134 a_7462_4229# a_7161_3177# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X135 a_10398_443# sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_11758_843# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=2e+06u X136 VCC_IO a_4416_3253# a_4416_3253# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X137 a_10194_3718# a_1106_3203# a_9290_3718# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X138 PU_H_N[1] DRVHI_H a_9656_1708# VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X139 PD_H[1] DRVLO_H_N a_8876_944# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X140 a_7610_2597# a_7462_4229# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X141 VGND_IO DRVLO_H_N PD_H[1] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X142 PD_H[4] DRVLO_H_N VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X143 a_7743_1707# DRVHI_H PU_H_N[0] VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u R26 a_7638_3476# m1_8994_2579# sky130_fd_pr__res_generic_m1 w=2.5e+06u l=10000u X144 a_2205_3177# a_7610_2597# VGND_IO VGND_IO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X145 a_9882_3718# DRVLO_H_N PD_H[2] VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X146 VCC_IO sky130_fd_io__gpiov2_octl_0/PDEN_H_N[1] a_10849_843# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u R27 a_10919_675# m1_10778_2585# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X147 PD_H[4] DRVLO_H_N a_11009_3747# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=4e+06u X148 a_n408_4001# sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/SEL_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u .ends .subckt sky130_fd_io__com_res_weak_bentbigres a_419_6804# a_419_8054# a_n256_8772# + a_419_8146# a_n258_6046# a_419_9396# a_n2_6046# R0 a_n258_6046# a_n256_8772# sky130_fd_pr__res_generic_po w=800000u l=1.2e+07u R1 a_419_8146# a_419_9396# sky130_fd_pr__res_generic_po w=800000u l=6e+06u R2 a_n258_6046# a_n2_6046# sky130_fd_pr__res_generic_po w=800000u l=5e+07u R3 a_419_6804# a_419_8054# sky130_fd_pr__res_generic_po w=800000u l=6e+06u .ends .subckt sky130_fd_io__com_res_weak RB RA sky130_fd_io__com_res_weak_bentbigres_0/a_n258_6046# + a_n160_10423# li_n135_8054# li_n135_6820# a_n160_9488# Xsky130_fd_io__com_res_weak_bentbigres_0 li_n135_6820# li_n135_8054# li_n135_6820# + li_n135_8054# sky130_fd_io__com_res_weak_bentbigres_0/a_n258_6046# a_n160_9488# + RA sky130_fd_io__com_res_weak_bentbigres R0 a_n160_9838# a_n160_10423# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R1 a_n160_9488# a_n160_9838# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R2 m1_n147_10115# a_n160_10423# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R3 m1_n147_8777# a_n160_9488# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R4 m1_532_10115# a_n160_10423# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R5 m1_532_9534# a_517_9818# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R6 li_n135_8054# m1_n147_8777# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R7 a_n160_9838# m1_n147_10115# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R8 a_517_9818# m1_532_10115# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R9 RB a_517_9818# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R10 RB m1_532_9534# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R11 m1_n147_9555# a_n160_9838# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R12 li_n135_8054# m1_n146_7735# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R13 a_517_9818# a_n160_10423# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R14 a_n160_9488# m1_n147_9555# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R15 li_n135_6820# m1_n146_7434# sky130_fd_pr__res_generic_m1 w=660000u l=10000u .ends .subckt sky130_fd_io__pfet_con_diff_wo_abt_270v2 w_415_600# a_2303_1380# a_13777_1380# + a_8817_1380# a_4287_1380# a_7263_1380# a_12223_1380# a_9247_1380# a_2865_1380# a_5841_1380# + a_4849_1380# a_10801_1380# a_14135_1380# a_1311_1380# a_12785_1380# a_7825_1380# + a_3295_1380# a_9809_1380# a_1001_1552# a_6271_1380# a_5279_1380# a_11231_1380# a_10239_1380# + a_8255_1380# a_1873_1380# a_13215_1380# a_3857_1380# a_11793_1380# a_881_1380# a_6833_1380# X0 a_1001_1552# a_13777_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 a_1001_1552# a_4849_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 a_1001_1552# a_8817_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X3 w_415_600# a_10239_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 a_1001_1552# a_1873_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 w_415_600# a_3295_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X6 w_415_600# a_14135_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X7 a_1001_1552# a_5841_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X8 w_415_600# a_2303_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X9 w_415_600# a_7263_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X10 a_1001_1552# a_4849_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X11 w_415_600# a_11231_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X12 a_1001_1552# a_12785_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X13 w_415_600# a_10239_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X14 a_1001_1552# a_8817_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X15 w_415_600# a_3295_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X16 w_415_600# a_2303_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X17 w_415_600# a_7263_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X18 a_1001_1552# a_12785_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X19 a_1001_1552# a_3857_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X20 a_1001_1552# a_7825_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X21 w_415_600# a_13215_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X22 w_415_600# a_1311_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X23 w_415_600# a_6271_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X24 a_1001_1552# a_3857_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X25 w_415_600# a_5279_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X26 a_1001_1552# a_11793_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X27 a_1001_1552# a_7825_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X28 w_415_600# a_9247_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X29 a_1001_1552# a_10801_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X30 w_415_600# a_13215_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X31 w_415_600# a_1311_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X32 w_415_600# a_6271_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X33 a_1001_1552# a_881_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X34 a_1001_1552# a_2865_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X35 w_415_600# a_5279_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X36 a_1001_1552# a_11793_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X37 a_1001_1552# a_10801_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X38 a_1001_1552# a_6833_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X39 w_415_600# a_9247_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X40 w_415_600# a_12223_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X41 a_1001_1552# a_881_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X42 a_1001_1552# a_9809_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X43 a_1001_1552# a_2865_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X44 w_415_600# a_4287_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X45 a_1001_1552# a_6833_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X46 w_415_600# a_8255_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X47 w_415_600# a_12223_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X48 a_1001_1552# a_13777_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X49 a_1001_1552# a_9809_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X50 a_1001_1552# a_1873_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X51 w_415_600# a_4287_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X52 w_415_600# a_14135_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X53 w_415_600# a_8255_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X54 a_1001_1552# a_5841_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X55 w_415_600# a_11231_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u .ends .subckt sky130_fd_io__gpio_pudrvr_strongv2 PU_H_N[3] PU_H_N[2] VCC_IO TIE_HI_ESD m1_1330_n459# + m1_6027_281# VCC_IO_uq0 m1_3418_50# VNB a_14575_n157# m1_6652_281# m1_3028_333# + PAD m1_14880_n614# li_9083_n155# Xsky130_fd_io__pfet_con_diff_wo_abt_270v2_0 VCC_IO_uq0 PU_H_N[2] m1_14229_1478# m1_8837_1478# + PU_H_N[3] PU_H_N[3] m1_11745_1478# m1_8837_1478# PU_H_N[2] PU_H_N[3] PU_H_N[3] m1_10391_1478# + m1_14229_1478# PU_H_N[2] PU_H_N[2] PU_H_N[3] PU_H_N[2] m1_10391_1478# PAD PU_H_N[3] + PU_H_N[3] m1_11745_1478# m1_10391_1478# m1_8837_1478# PU_H_N[2] m1_13667_1478# PU_H_N[3] + m1_11745_1478# PU_H_N[2] PU_H_N[3] sky130_fd_io__pfet_con_diff_wo_abt_270v2 R0 m1_14229_1478# m2_14532_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R1 m1_13667_1478# m2_13593_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R2 PU_H_N[2] m2_12849_n185# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R3 m2_10673_n208# m1_8837_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R4 m1_10391_1478# m2_10945_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R5 PU_H_N[2] m2_11422_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R6 m1_13667_1478# m2_14075_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R7 PU_H_N[2] m2_10673_n208# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R8 TIE_HI_ESD m2_10197_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R9 m1_11745_1478# m2_12608_116# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R10 TIE_HI_ESD m2_10945_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R11 m1_10391_1478# m2_11422_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R12 m1_11745_1478# m2_12849_116# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R13 PU_H_N[3] m2_12608_n185# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R14 PU_H_N[2] m2_14769_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R15 PU_H_N[3] m2_11186_n208# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R16 PU_H_N[3] m2_13837_658# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R17 TIE_HI_ESD a_14575_n157# sky130_fd_pr__res_generic_po w=500000u l=1.02e+07u R18 TIE_HI_ESD m2_14286_658# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R19 m1_8837_1478# m2_10197_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R20 m1_8837_1478# m2_10439_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R21 PU_H_N[3] m2_14532_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R22 m2_11186_n208# m1_10391_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R23 TIE_HI_ESD m2_13593_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R24 m2_13837_658# m1_13667_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R25 m1_14229_1478# m2_14769_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R26 m2_12365_n184# m1_11745_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R27 PU_H_N[3] m2_10439_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R28 TIE_HI_ESD m2_12365_n184# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R29 m2_14286_658# m1_14229_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R30 PU_H_N[2] m2_14075_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u .ends .subckt sky130_fd_io__nfet_con_diff_wo_abt_270v2 VCC_IO PAD a_10282_1285# a_5322_1285# + a_12266_1285# a_7306_1285# VSSIO a_3900_1285# a_2908_1285# a_5884_1285# a_14178_1285# + a_10844_1285# a_1354_1285# a_7868_1285# a_12828_1285# a_8860_1285# a_13820_1285# + a_4330_1285# a_3338_1285# a_11274_1285# a_6314_1285# a_8298_1285# a_13258_1285# + a_9290_1285# a_1916_1285# a_4892_1285# a_6876_1285# a_924_1285# a_11836_1285# a_2346_1285# + a_9852_1285# X0 VSSIO a_5322_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 PAD a_9852_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 VSSIO a_11274_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X3 PAD a_10844_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 PAD a_6876_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 VSSIO a_2346_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X6 PAD a_1916_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X7 VSSIO a_12266_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X8 VSSIO a_6314_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X9 PAD a_11836_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X10 VSSIO a_9290_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X11 PAD a_4892_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X12 VSSIO a_10282_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X13 VSSIO a_4330_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X14 PAD a_3900_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X15 PAD a_8860_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X16 VSSIO a_3338_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X17 VSSIO a_8298_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X18 PAD a_924_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X19 VSSIO a_7306_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X20 PAD a_13820_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X21 PAD a_2908_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X22 PAD a_7868_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X23 VSSIO a_13258_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X24 PAD a_12828_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X25 VSSIO a_14178_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X26 VSSIO a_1354_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X27 PAD a_5884_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X28 VSSIO a_11274_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X29 VSSIO a_5322_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X30 PAD a_9852_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X31 PAD a_10844_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X32 VSSIO a_2346_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X33 PAD a_6876_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X34 VSSIO a_6314_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X35 PAD a_1916_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X36 VSSIO a_12266_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X37 PAD a_11836_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X38 PAD a_4892_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X39 VSSIO a_4330_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X40 VSSIO a_9290_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X41 PAD a_8860_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X42 VSSIO a_10282_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X43 PAD a_924_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X44 PAD a_3900_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X45 VSSIO a_3338_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X46 VSSIO a_8298_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X47 PAD a_2908_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X48 PAD a_7868_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X49 VSSIO a_13258_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X50 VSSIO a_7306_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X51 PAD a_13820_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X52 PAD a_12828_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X53 VSSIO a_1354_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X54 VSSIO a_14178_1285# PAD VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X55 PAD a_5884_1285# VSSIO VSSIO sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u .ends .subckt sky130_fd_io__gpiov2_pddrvr_strong sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_3338_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_4330_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_10282_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_6314_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_12266_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_8298_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_9290_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_1916_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/VSSIO + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_4892_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/VCC_IO + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_10844_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/PAD + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_6876_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_14178_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_2346_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_12828_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_924_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_13820_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_9852_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_5322_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_11274_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_7306_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_13258_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_3900_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_2908_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_5884_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_1354_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_7868_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_11836_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_8860_1285# Xsky130_fd_io__nfet_con_diff_wo_abt_270v2_0 sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/VCC_IO + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/PAD sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_10282_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_5322_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_12266_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_7306_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/VSSIO + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_3900_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_2908_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_5884_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_14178_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_10844_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_1354_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_7868_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_12828_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_8860_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_13820_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_4330_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_3338_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_11274_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_6314_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_8298_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_13258_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_9290_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_1916_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_4892_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_6876_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_924_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_11836_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_2346_1285# sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/a_9852_1285# + sky130_fd_io__nfet_con_diff_wo_abt_270v2 .ends .subckt sky130_fd_io__com_pudrvr_weakv2 PU_H_N PAD w_258_n30# a_756_297# X0 PAD PU_H_N w_258_n30# w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X1 PAD PU_H_N w_258_n30# w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X2 w_258_n30# PU_H_N a_756_297# w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X3 w_258_n30# PU_H_N a_756_297# w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X4 w_258_n30# PU_H_N PAD w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X5 w_258_n30# PU_H_N PAD w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X6 a_756_297# PU_H_N w_258_n30# w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X7 a_756_297# PU_H_N w_258_n30# w_258_n30# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u .ends .subckt sky130_fd_io__res250_sub_small a_10_2# a_2142_2# R0 a_10_2# a_2142_2# sky130_fd_pr__res_generic_po w=2e+06u l=1.007e+07u .ends .subckt sky130_fd_io__res250only_small PAD ROUT Xsky130_fd_io__res250_sub_small_0 PAD ROUT sky130_fd_io__res250_sub_small .ends .subckt sky130_fd_io__gpio_pddrvr_weakv2 PD_H PAD dw_n122_84# w_168_168# X0 w_168_168# PD_H PAD w_168_168# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 w_168_168# PD_H PAD w_168_168# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 w_168_168# PD_H PAD w_168_168# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X3 w_168_168# PD_H PAD w_168_168# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 w_168_168# PD_H PAD w_168_168# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 w_168_168# PD_H PAD w_168_168# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u .ends .subckt sky130_fd_io__gpio_odrvr_subv2 VGND PD_H[0] PD_H[2] PD_H[1] PD_H[3] VCC_IO + PAD TIE_LO_ESD FORCE_HI_H_N FORCE_LO_H FORCE_LOVOL_H PU_H_N[0] PU_H_N[1] PU_H_N[2] + PU_H_N[3] VSSIO_AMX VGND_IO PAD_uq0 PAD_uq1 w_588_14893# m3_6107_13425# w_n915_9930# + li_5884_n9263# VCC_IO_uq2 VCC_IO_uq0 m2_8191_n10933# sky130_fd_io__gpiov2_pddrvr_strong_0/sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/VSSIO + sky130_fd_io__gpio_pudrvr_strongv2_0/m1_14880_n614# sky130_fd_io__gpio_pudrvr_strongv2_0/li_9083_n155# + TIE_HI_ESD m1_2782_13727# w_5497_14893# Xsky130_fd_io__com_res_weak_0 sky130_fd_io__com_res_weak_0/RB sky130_fd_io__com_res_weak_0/RA + sky130_fd_io__com_res_weak_0/sky130_fd_io__com_res_weak_bentbigres_0/a_n258_6046# + sky130_fd_io__com_res_weak_0/a_n160_10423# sky130_fd_io__com_res_weak_0/li_n135_8054# + sky130_fd_io__com_res_weak_0/li_n135_6820# sky130_fd_io__com_res_weak_0/a_n160_9488# + sky130_fd_io__com_res_weak Xsky130_fd_io__gpio_pudrvr_strongv2_0 PU_H_N[3] PU_H_N[2] VCC_IO TIE_HI_ESD VCC_IO + VCC_IO VCC_IO_uq2 PU_H_N[0] VGND VCC_IO_uq0 VCC_IO VCC_IO PAD_uq0 sky130_fd_io__gpio_pudrvr_strongv2_0/m1_14880_n614# + sky130_fd_io__gpio_pudrvr_strongv2_0/li_9083_n155# sky130_fd_io__gpio_pudrvr_strongv2 Xsky130_fd_io__gpiov2_pddrvr_strong_0 m1_11278_13727# m1_9854_13727# PD_H[3] m1_8317_13727# + m1_2782_13727# PD_H[2] PD_H[3] m1_12832_13727# sky130_fd_io__gpiov2_pddrvr_strong_0/sky130_fd_io__nfet_con_diff_wo_abt_270v2_0/VSSIO + m1_9854_13727# VCC_IO_uq2 PD_H[3] PAD m1_8317_13727# m1_870_13727# m1_12832_13727# + m1_2220_13727# m1_12832_13727# m1_870_13727# PD_H[3] m1_9854_13727# PD_H[3] m1_7742_13727# + m1_870_13727# m1_11278_13727# m1_11278_13727# m1_8317_13727# m1_12832_13727# PD_H[2] + PD_H[3] PD_H[2] sky130_fd_io__gpiov2_pddrvr_strong Xsky130_fd_io__com_pudrvr_weakv2_0 PU_H_N[0] sky130_fd_io__com_res_weak_0/RA VCC_IO + sky130_fd_io__com_res_weak_0/RA sky130_fd_io__com_pudrvr_weakv2 Xsky130_fd_io__res250only_small_0 PAD_uq1 sky130_fd_io__com_res_weak_0/RB sky130_fd_io__res250only_small Xsky130_fd_io__gpio_pddrvr_weakv2_0 PD_H[0] sky130_fd_io__com_res_weak_0/RA VCC_IO_uq2 + w_5497_14893# sky130_fd_io__gpio_pddrvr_weakv2 R0 a_10314_7886# sky130_fd_io__com_res_weak_0/RB sky130_fd_pr__res_generic_po w=2e+06u l=2e+06u R1 TIE_LO_ESD m2_1933_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R2 m1_870_13727# m2_982_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R3 PD_H[2] m2_10071_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R4 m1_12832_13727# m2_12848_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R5 a_9612_7886# a_10314_7886# sky130_fd_pr__res_generic_po w=2e+06u l=3e+06u X0 VCC_IO PU_H_N[1] a_782_15260# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R6 TIE_LO_ESD m2_9451_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R7 m2_7318_15817# PD_H[3] sky130_fd_pr__res_generic_m2 w=650000u l=10000u R8 m1_12832_13727# m2_13278_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X1 a_782_15260# PD_H[1] w_588_14893# w_588_14893# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 a_782_15260# PU_H_N[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R9 TIE_LO_ESD m2_499_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R10 PD_H[2] m2_6889_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R11 m1_11278_13727# m2_11414_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R12 TIE_LO_ESD m2_10931_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X3 a_782_15260# PD_H[1] w_588_14893# w_588_14893# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 a_782_15260# PD_H[1] w_588_14893# w_588_14893# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u R13 m1_2220_13727# m2_1933_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R14 m1_9854_13727# m2_10071_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R15 m1_8317_13727# m2_9451_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R16 PD_H[3] m2_1650_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R17 m1_7742_13727# m2_7318_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R18 m2_1345_15817# PD_H[2] sky130_fd_pr__res_generic_m2 w=650000u l=10000u R19 m1_870_13727# m2_499_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R20 m1_7742_13727# m2_6889_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X5 a_782_15260# PU_H_N[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R21 m1_9854_13727# m2_10931_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R22 m1_9882_7996# a_10314_7886# sky130_fd_pr__res_generic_m1 w=1.32e+06u l=10000u R23 m2_9020_15817# PD_H[3] sky130_fd_pr__res_generic_m2 w=650000u l=10000u R24 m2_13707_15817# TIE_LO_ESD sky130_fd_pr__res_generic_m2 w=650000u l=10000u R25 m1_2220_13727# m2_1650_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R26 PD_H[2] m2_8591_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R27 m2_740_15817# PD_H[3] sky130_fd_pr__res_generic_m2 w=650000u l=10000u R28 a_9612_7886# m1_9882_7996# sky130_fd_pr__res_generic_m1 w=1.32e+06u l=10000u R29 m1_2220_13727# m2_1345_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X6 a_782_15260# PU_H_N[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R30 m2_10500_15817# PD_H[3] sky130_fd_pr__res_generic_m2 w=650000u l=10000u R31 m2_11843_15817# PD_H[3] sky130_fd_pr__res_generic_m2 w=650000u l=10000u R32 m1_12832_13727# m2_13707_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X7 VCC_IO PU_H_N[1] a_782_15260# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R33 m1_8317_13727# m2_9020_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R34 m1_8317_13727# m2_8591_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R35 TIE_LO_ESD m2_12274_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R36 m1_870_13727# m2_740_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R37 TIE_LO_ESD m2_7749_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R38 m1_9854_13727# m2_10500_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R39 m1_11278_13727# m2_11843_15817# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X8 a_782_15260# PD_H[1] w_588_14893# w_588_14893# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X9 VCC_IO PU_H_N[1] a_782_15260# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X10 a_782_15260# PU_H_N[1] VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R40 PD_H[2] m2_982_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R41 PD_H[2] m2_12848_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R42 m1_11278_13727# m2_12274_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u X11 VCC_IO PU_H_N[1] a_782_15260# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R43 a_782_15260# a_9612_7886# sky130_fd_pr__res_generic_po w=2e+06u l=5e+06u R44 PD_H[3] m2_13278_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R45 TIE_LO_ESD VGND_IO sky130_fd_pr__res_generic_po w=500000u l=1.02e+07u R46 m1_7742_13727# m2_7749_15816# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R47 PD_H[2] m2_11414_16117# sky130_fd_pr__res_generic_m2 w=650000u l=10000u .ends .subckt sky130_fd_io__gpio_odrvrv2 PAD PD_H[0] PD_H[1] PD_H[2] PD_H[3] TIE_LO_ESD + PU_H_N[0] PU_H_N[1] PU_H_N[2] PU_H_N[3] FORCE_HI_H_N FORCE_LO_H FORCE_LOVOL_H VSSIO_AMX + PAD_uq0 PAD_uq1 w_n915_9930# sky130_fd_io__gpio_odrvr_subv2_0/m3_6107_13425# TIE_HI_ESD + VGND_IO w_5497_14893# sky130_fd_io__gpio_odrvr_subv2_0/li_5884_n9263# sky130_fd_io__gpio_odrvr_subv2_0/m2_8191_n10933# + sky130_fd_io__gpio_odrvr_subv2_0/sky130_fd_io__gpio_pudrvr_strongv2_0/li_9083_n155# + w_588_14893# sky130_fd_io__gpio_odrvr_subv2_0/sky130_fd_io__gpio_pudrvr_strongv2_0/m1_14880_n614# + VGND sky130_fd_io__gpio_odrvr_subv2_0/m1_2782_13727# VCC_IO VGND_IO_uq0 Xsky130_fd_io__gpio_odrvr_subv2_0 VGND PD_H[0] PD_H[2] PD_H[1] PD_H[3] VCC_IO PAD + TIE_LO_ESD FORCE_HI_H_N FORCE_LO_H FORCE_LOVOL_H PU_H_N[0] PU_H_N[1] PU_H_N[2] PU_H_N[3] + VSSIO_AMX VGND_IO PAD_uq0 PAD_uq1 w_588_14893# sky130_fd_io__gpio_odrvr_subv2_0/m3_6107_13425# + w_n915_9930# sky130_fd_io__gpio_odrvr_subv2_0/li_5884_n9263# VCC_IO VCC_IO sky130_fd_io__gpio_odrvr_subv2_0/m2_8191_n10933# + VGND_IO_uq0 sky130_fd_io__gpio_odrvr_subv2_0/sky130_fd_io__gpio_pudrvr_strongv2_0/m1_14880_n614# + sky130_fd_io__gpio_odrvr_subv2_0/sky130_fd_io__gpio_pudrvr_strongv2_0/li_9083_n155# + TIE_HI_ESD sky130_fd_io__gpio_odrvr_subv2_0/m1_2782_13727# w_5497_14893# sky130_fd_io__gpio_odrvr_subv2 .ends .subckt sky130_fd_io__gpio_opathv2 VGND_IO HLD_I_H_N OD_H SLOW VCC_IO VPWR PAD DM_H[1] + HLD_I_OVR_H OUT TIE_LO_ESD VGND_IO_uq0 VGND_IO_uq1 PAD_uq0 PAD_uq1 sky130_fd_io__gpiov2_octl_dat_0/a_1528_3203# + sky130_fd_io__gpiov2_octl_dat_0/a_2205_3177# sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H + OE_N DM_H[0] DM_H_N[0] sky130_fd_io__gpiov2_octl_dat_0/a_1106_3203# DM_H[2] DM_H_N[1] + m1_4747_14860# sky130_fd_io__gpio_odrvrv2_0/sky130_fd_io__gpio_odrvr_subv2_0/sky130_fd_io__gpio_pudrvr_strongv2_0/li_9083_n155# + sky130_fd_io__gpiov2_octl_dat_0/a_3125_3203# sky130_fd_io__gpiov2_octl_dat_0/a_4416_3253# + sky130_fd_io__gpio_odrvrv2_0/PU_H_N[2] m2_2157_n626# sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + TIE_HI_ESD m1_5007_14796# sky130_fd_io__gpiov2_octl_dat_0/DM_H[1] sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + sky130_fd_io__gpiov2_octl_dat_0/a_8354_4056# w_5597_30124# sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + DM_H_N[2] sky130_fd_io__gpiov2_octl_dat_0/a_1415_3203# VSSIO_AMX VGND_IO_uq2 sky130_fd_io__gpiov2_octl_dat_0/a_9656_1708# + sky130_fd_io__gpio_odrvrv2_0/sky130_fd_io__gpio_odrvr_subv2_0/m3_6107_13425# VPWR_KA + w_688_30124# VGND VCC_IO_uq9 sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# + VGND_IO_uq9 Xsky130_fd_io__gpiov2_octl_dat_0 VPWR_KA VGND SLOW HLD_I_H_N HLD_I_OVR_H OD_H sky130_fd_io__gpiov2_octl_dat_0/SLOW_H_N + sky130_fd_io__gpiov2_octl_dat_0/DRVHI_H sky130_fd_io__gpio_odrvrv2_0/PU_H_N[2] sky130_fd_io__gpio_odrvrv2_0/PU_H_N[1] + sky130_fd_io__gpio_odrvrv2_0/PU_H_N[0] sky130_fd_io__gpio_odrvrv2_0/PD_H[1] sky130_fd_io__gpio_odrvrv2_0/PD_H[0] + sky130_fd_io__gpiov2_octl_dat_0/PD_H[4] sky130_fd_io__gpiov2_octl_dat_0/DRVLO_H_N + DM_H_N[2] sky130_fd_io__gpiov2_octl_dat_0/DM_H[1] DM_H[0] OUT sky130_fd_io__gpio_odrvrv2_0/PD_H[3] + sky130_fd_io__gpio_odrvrv2_0/PD_H[2] sky130_fd_io__gpiov2_octl_dat_0/a_1106_3203# + sky130_fd_io__gpiov2_octl_dat_0/a_3125_3203# sky130_fd_io__gpiov2_octl_dat_0/a_4416_3253# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_261_220# + VGND sky130_fd_io__gpiov2_octl_dat_0/a_8354_4056# VGND_IO_uq9 sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2821_220# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H + DM_H[1] DM_H_N[0] DM_H_N[1] DM_H[2] sky130_fd_io__gpiov2_octl_dat_0/a_1415_3203# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_2874_118# + OE_N VGND sky130_fd_io__gpiov2_octl_dat_0/a_9656_1708# sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + VPWR sky130_fd_io__gpiov2_octl_dat_0/a_1528_3203# sky130_fd_io__gpiov2_octl_dat_0/a_2205_3177# + sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/a_1772_220# + VCC_IO sky130_fd_io__gpio_odrvrv2_0/PU_H_N[3] sky130_fd_io__gpiov2_octl_dat Xsky130_fd_io__gpio_odrvrv2_0 PAD sky130_fd_io__gpio_odrvrv2_0/PD_H[0] sky130_fd_io__gpio_odrvrv2_0/PD_H[1] + sky130_fd_io__gpio_odrvrv2_0/PD_H[2] sky130_fd_io__gpio_odrvrv2_0/PD_H[3] TIE_LO_ESD + sky130_fd_io__gpio_odrvrv2_0/PU_H_N[0] sky130_fd_io__gpio_odrvrv2_0/PU_H_N[1] sky130_fd_io__gpio_odrvrv2_0/PU_H_N[2] + sky130_fd_io__gpio_odrvrv2_0/PU_H_N[3] VSSIO_AMX VSSIO_AMX VSSIO_AMX VSSIO_AMX PAD_uq0 + PAD_uq1 w_n815_25161# sky130_fd_io__gpio_odrvrv2_0/sky130_fd_io__gpio_odrvr_subv2_0/m3_6107_13425# + TIE_HI_ESD VGND_IO_uq2 w_5597_30124# VGND VGND sky130_fd_io__gpio_odrvrv2_0/sky130_fd_io__gpio_odrvr_subv2_0/sky130_fd_io__gpio_pudrvr_strongv2_0/li_9083_n155# + w_688_30124# sky130_fd_io__gpio_odrvrv2_0/PU_H_N[1] VGND sky130_fd_io__gpiov2_octl_dat_0/PD_H[4] + VCC_IO_uq9 VGND_IO_uq2 sky130_fd_io__gpio_odrvrv2 .ends .subckt sky130_fd_io__amux_switch_1v2b AMUXBUS_HV PAD_HV_P0 PG_AMX_VDDA_H_N NG_AMX_VPMP_H + NG_PAD_VPMP_H PAD_HV_P1 PG_PAD_VDDIOQ_H_N PAD_HV_N0 PAD_HV_N1 VSSD PAD_HV_N2 PAD_HV_N3 + VDDIO w_7010_315# w_3919_213# VDDA X0 PAD_HV_N0 NG_PAD_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X1 AMUXBUS_HV NG_AMX_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X2 PAD_HV_N1 NG_PAD_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X3 w_3919_213# PG_PAD_VDDIOQ_H_N PAD_HV_P0 VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X4 w_7010_315# NG_PAD_VPMP_H PAD_HV_N2 w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X5 AMUXBUS_HV PG_AMX_VDDA_H_N w_3919_213# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X6 w_3919_213# PG_AMX_VDDA_H_N AMUXBUS_HV VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X7 w_3919_213# NG_PAD_VPMP_H PAD_HV_N1 w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X8 PAD_HV_N2 NG_PAD_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X9 w_3919_213# NG_AMX_VPMP_H AMUXBUS_HV w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X10 w_3919_213# PG_AMX_VDDA_H_N AMUXBUS_HV VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X11 w_3919_213# NG_PAD_VPMP_H PAD_HV_N0 w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X12 w_7010_315# NG_AMX_VPMP_H AMUXBUS_HV w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X13 w_7010_315# NG_PAD_VPMP_H PAD_HV_N3 w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X14 w_3919_213# NG_PAD_VPMP_H PAD_HV_N1 w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X15 AMUXBUS_HV NG_AMX_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X16 AMUXBUS_HV NG_AMX_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X17 w_3919_213# PG_PAD_VDDIOQ_H_N PAD_HV_P0 VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X18 w_7010_315# NG_AMX_VPMP_H AMUXBUS_HV w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X19 AMUXBUS_HV PG_AMX_VDDA_H_N w_3919_213# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X20 PAD_HV_N3 NG_PAD_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X21 AMUXBUS_HV NG_AMX_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X22 PAD_HV_P1 PG_PAD_VDDIOQ_H_N w_3919_213# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X23 PAD_HV_P1 PG_PAD_VDDIOQ_H_N w_3919_213# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X24 PAD_HV_N2 NG_PAD_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X25 AMUXBUS_HV NG_AMX_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X26 PAD_HV_N3 NG_PAD_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X27 w_3919_213# NG_AMX_VPMP_H AMUXBUS_HV w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X28 PAD_HV_N1 NG_PAD_VPMP_H w_3919_213# w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X29 w_7010_315# NG_PAD_VPMP_H PAD_HV_N2 w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X30 w_7010_315# NG_AMX_VPMP_H AMUXBUS_HV w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X31 w_7010_315# NG_AMX_VPMP_H AMUXBUS_HV w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X32 w_3919_213# PG_PAD_VDDIOQ_H_N PAD_HV_P1 VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X33 w_3919_213# PG_AMX_VDDA_H_N AMUXBUS_HV VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X34 PAD_HV_P0 PG_PAD_VDDIOQ_H_N w_3919_213# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X35 w_3919_213# NG_AMX_VPMP_H AMUXBUS_HV w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X36 w_3919_213# NG_PAD_VPMP_H PAD_HV_N0 w_3919_213# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X37 AMUXBUS_HV NG_AMX_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X38 AMUXBUS_HV NG_AMX_VPMP_H w_7010_315# w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X39 w_7010_315# NG_PAD_VPMP_H PAD_HV_N3 w_7010_315# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u .ends .subckt sky130_fd_io__res75only_small PAD ROUT R0 PAD ROUT sky130_fd_pr__res_generic_po w=2e+06u l=3.15e+06u .ends .subckt sky130_fd_io__inv_1 VPWR VGND Y A VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u X1 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u .ends .subckt sky130_fd_io__nor2_1 VPWR VGND B Y A VNB VPB X0 a_116_368# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u X1 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u X2 Y B a_116_368# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u X3 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u .ends .subckt sky130_fd_io__nand2_1 VPWR VGND B Y A VNB VPB X0 a_117_74# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u X1 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u X2 Y A a_117_74# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u X3 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u .ends .subckt sky130_fd_io__gpiov2_amux_decoder sky130_fd_io__inv_1_8/A sky130_fd_io__inv_1_0/Y + sky130_fd_io__inv_1_11/A sky130_fd_io__inv_1_2/Y sky130_fd_io__inv_1_13/A sky130_fd_io__nor2_1_0/Y + sky130_fd_io__inv_1_4/Y sky130_fd_io__nand2_1_0/Y sky130_fd_io__inv_1_1/A sky130_fd_io__nor2_1_2/Y + sky130_fd_io__nand2_1_2/Y sky130_fd_io__inv_1_6/Y sky130_fd_io__inv_1_3/A sky130_fd_io__nor2_1_1/B + sky130_fd_io__inv_1_8/Y sky130_fd_io__nand2_1_1/B sky130_fd_io__nor2_1_1/A sky130_fd_io__inv_1_11/Y + sky130_fd_io__inv_1_5/A sky130_fd_io__nand2_1_1/A sky130_fd_io__nor2_1_3/B sky130_fd_io__nor2_1_3/A + sky130_fd_io__inv_1_13/Y sky130_fd_io__nand2_1_3/B sky130_fd_io__inv_1_7/A sky130_fd_io__inv_1_10/A + sky130_fd_io__nand2_1_3/A sky130_fd_io__inv_1_1/Y sky130_fd_io__inv_1_12/A sky130_fd_io__inv_1_9/A + sky130_fd_io__inv_1_8/VGND sky130_fd_io__inv_1_3/Y sky130_fd_io__inv_1_14/A sky130_fd_io__tap_1_1/VGND + sky130_fd_io__tap_1_2/VPWR sky130_fd_io__inv_1_0/A sky130_fd_io__nor2_1_1/Y sky130_fd_io__nand2_1_1/Y + sky130_fd_io__inv_1_5/Y sky130_fd_io__tap_1_2/VPB sky130_fd_io__nor2_1_0/B sky130_fd_io__nor2_1_3/Y + sky130_fd_io__inv_1_2/A sky130_fd_io__nor2_1_0/A sky130_fd_io__inv_1_7/Y sky130_fd_io__nand2_1_3/Y + sky130_fd_io__inv_1_10/Y sky130_fd_io__nand2_1_0/B sky130_fd_io__inv_1_4/A sky130_fd_io__nand2_1_0/A + sky130_fd_io__nor2_1_2/B sky130_fd_io__inv_1_9/Y sky130_fd_io__nor2_1_2/A sky130_fd_io__inv_1_12/Y + sky130_fd_io__inv_1_6/A sky130_fd_io__nand2_1_2/B sky130_fd_io__tap_1_2/VGND sky130_fd_io__nand2_1_2/A + VSUBS sky130_fd_io__inv_1_14/Y Xsky130_fd_io__inv_1_10 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__inv_1_10/Y + sky130_fd_io__inv_1_10/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_11 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__inv_1_11/Y + sky130_fd_io__inv_1_11/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_12 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__inv_1_8/VGND sky130_fd_io__inv_1_12/Y + sky130_fd_io__inv_1_12/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_13 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__inv_1_8/VGND sky130_fd_io__inv_1_13/Y + sky130_fd_io__inv_1_13/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_14 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_14/Y + sky130_fd_io__inv_1_14/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_0 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_0/Y + sky130_fd_io__inv_1_0/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_1 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_1/Y + sky130_fd_io__inv_1_1/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_2 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_2/Y + sky130_fd_io__inv_1_2/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_3 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_3/Y + sky130_fd_io__inv_1_3/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_4 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_4/Y + sky130_fd_io__inv_1_4/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_5 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__inv_1_5/Y + sky130_fd_io__inv_1_5/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_6 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__inv_1_6/Y + sky130_fd_io__inv_1_6/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__nor2_1_0 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__nor2_1_0/B + sky130_fd_io__nor2_1_0/Y sky130_fd_io__nor2_1_0/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nor2_1 Xsky130_fd_io__inv_1_7 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__inv_1_7/Y + sky130_fd_io__inv_1_7/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__nor2_1_2 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__nor2_1_2/B + sky130_fd_io__nor2_1_2/Y sky130_fd_io__nor2_1_2/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nor2_1 Xsky130_fd_io__nor2_1_1 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__nor2_1_1/B + sky130_fd_io__nor2_1_1/Y sky130_fd_io__nor2_1_1/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nor2_1 Xsky130_fd_io__nor2_1_3 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_1/VGND sky130_fd_io__nor2_1_3/B + sky130_fd_io__nor2_1_3/Y sky130_fd_io__nor2_1_3/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nor2_1 Xsky130_fd_io__inv_1_8 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__inv_1_8/VGND sky130_fd_io__inv_1_8/Y + sky130_fd_io__inv_1_8/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__inv_1_9 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__inv_1_9/Y + sky130_fd_io__inv_1_9/A VSUBS sky130_fd_io__tap_1_2/VPB sky130_fd_io__inv_1 Xsky130_fd_io__nand2_1_0 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__nand2_1_0/B + sky130_fd_io__nand2_1_0/Y sky130_fd_io__nand2_1_0/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nand2_1 Xsky130_fd_io__nand2_1_1 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__inv_1_8/VGND sky130_fd_io__nand2_1_1/B + sky130_fd_io__nand2_1_1/Y sky130_fd_io__nand2_1_1/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nand2_1 Xsky130_fd_io__nand2_1_2 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__nand2_1_2/B + sky130_fd_io__nand2_1_2/Y sky130_fd_io__nand2_1_2/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nand2_1 Xsky130_fd_io__nand2_1_3 sky130_fd_io__tap_1_2/VPWR sky130_fd_io__tap_1_2/VGND sky130_fd_io__nand2_1_3/B + sky130_fd_io__nand2_1_3/Y sky130_fd_io__nand2_1_3/A VSUBS sky130_fd_io__tap_1_2/VPB + sky130_fd_io__nand2_1 .ends .subckt sky130_fd_io__gpiov2_amux_ctl_logic sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPB sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y + sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VPWR sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPWR + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_1/VGND sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y + sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VPB sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VGND + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/VGND sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VGND + VSUBS sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/Y Xsky130_fd_io__gpiov2_amux_decoder_0 sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/VGND + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_1/VGND sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPWR + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPB sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/Y + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/A sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/A + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/B sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VGND + sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/A VSUBS sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y + sky130_fd_io__gpiov2_amux_decoder .ends .subckt sky130_fd_io__gpiov2_amux sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_P0 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__res75only_small_0/ROUT sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/A + sky130_fd_io__res75only_small_1/PAD sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N3 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/A + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N2 sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N1 sky130_fd_io__res75only_small_7/ROUT + sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N0 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B + sky130_fd_io__res75only_small_8/PAD sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/A + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_P1 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/A + sky130_fd_io__res75only_small_13/PAD sky130_fd_io__amux_switch_1v2b_1/PAD_HV_P0 + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y + sky130_fd_io__res75only_small_4/ROUT sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y + sky130_fd_io__res75only_small_2/PAD sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B + sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/Y + sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y + sky130_fd_io__amux_switch_1v2b_1/VDDA sky130_fd_io__res75only_small_8/ROUT sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A + sky130_fd_io__res75only_small_9/PAD sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/Y + sky130_fd_io__res75only_small_13/ROUT sky130_fd_io__res75only_small_5/ROUT sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y + sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPB + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__res75only_small_10/ROUT sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VPWR + sky130_fd_io__res75only_small_0/PAD sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPWR + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/A + sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_1/VGND + sky130_fd_io__res75only_small_9/ROUT w_8674_6609# sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y + sky130_fd_io__amux_switch_1v2b_0/AMUXBUS_HV sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VPB + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N3 sky130_fd_io__res75only_small_6/ROUT + sky130_fd_io__res75only_small_7/PAD sky130_fd_io__amux_switch_1v2b_1/AMUXBUS_HV + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N2 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N1 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/A + w_11765_6609# sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y + w_8674_4393# w_11765_4495# sky130_fd_io__res75only_small_3/ROUT sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VGND + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VGND + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N0 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/A + sky130_fd_io__res75only_small_5/PAD sky130_fd_io__amux_switch_1v2b_0/VDDIO sky130_fd_io__amux_switch_1v2b_0/PAD_HV_P1 + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/VGND + sky130_fd_io__amux_switch_1v2b_1/VDDIO VSUBS Xsky130_fd_io__amux_switch_1v2b_0 sky130_fd_io__amux_switch_1v2b_0/AMUXBUS_HV sky130_fd_io__amux_switch_1v2b_0/PAD_HV_P0 + sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H + sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H sky130_fd_io__amux_switch_1v2b_0/PAD_HV_P1 + sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N0 + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N1 VSUBS sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N2 + sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N3 sky130_fd_io__amux_switch_1v2b_0/VDDIO + w_11765_6609# w_8674_6609# sky130_fd_io__amux_switch_1v2b_1/VDDA sky130_fd_io__amux_switch_1v2b Xsky130_fd_io__amux_switch_1v2b_1 sky130_fd_io__amux_switch_1v2b_1/AMUXBUS_HV sky130_fd_io__amux_switch_1v2b_1/PAD_HV_P0 + sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H + sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H sky130_fd_io__amux_switch_1v2b_1/PAD_HV_P1 + sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N0 + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N1 VSUBS sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N2 + sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N3 sky130_fd_io__amux_switch_1v2b_1/VDDIO + w_11765_4495# w_8674_4393# sky130_fd_io__amux_switch_1v2b_1/VDDA sky130_fd_io__amux_switch_1v2b Xsky130_fd_io__res75only_small_10 sky130_fd_io__res75only_small_10/PAD sky130_fd_io__res75only_small_10/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_11 sky130_fd_io__res75only_small_2/PAD sky130_fd_io__res75only_small_10/PAD + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_13 sky130_fd_io__res75only_small_13/PAD sky130_fd_io__res75only_small_13/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_12 sky130_fd_io__res75only_small_1/PAD sky130_fd_io__res75only_small_13/PAD + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_0 sky130_fd_io__res75only_small_0/PAD sky130_fd_io__res75only_small_0/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_1 sky130_fd_io__res75only_small_1/PAD sky130_fd_io__res75only_small_3/PAD + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_2 sky130_fd_io__res75only_small_2/PAD sky130_fd_io__res75only_small_0/PAD + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_3 sky130_fd_io__res75only_small_3/PAD sky130_fd_io__res75only_small_3/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_4 sky130_fd_io__res75only_small_5/PAD sky130_fd_io__res75only_small_4/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__gpiov2_amux_ctl_logic_0 sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPB + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VPWR + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPWR + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_1/VGND + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/B + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VPB + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_ls_0/sky130_fd_io__tap_1_0/VGND + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/VGND + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VGND + VSUBS sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/A + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y + sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/Y + sky130_fd_io__gpiov2_amux_ctl_logic Xsky130_fd_io__res75only_small_5 sky130_fd_io__res75only_small_5/PAD sky130_fd_io__res75only_small_5/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_7 sky130_fd_io__res75only_small_7/PAD sky130_fd_io__res75only_small_7/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_6 sky130_fd_io__res75only_small_8/PAD sky130_fd_io__res75only_small_6/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_8 sky130_fd_io__res75only_small_8/PAD sky130_fd_io__res75only_small_8/ROUT + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_9 sky130_fd_io__res75only_small_9/PAD sky130_fd_io__res75only_small_9/ROUT + sky130_fd_io__res75only_small .ends .subckt sky130_fd_io__gpiov2_ipath_hvls OUT OUT_B MODE_NORMAL_N IN_VCCHIB INB_VCCHIB + IN_VDDIO MODE_VCCHIB_N MODE_NORMAL MODE_VCCHIB VSSD VDDIO_Q X0 a_1290_2876# MODE_VCCHIB_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X1 VSSD OUT_B OUT VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X2 a_1752_1955# a_1175_2172# OUT_B VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X3 a_602_2876# IN_VCCHIB a_1930_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X4 VDDIO_Q OUT_B OUT VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X5 a_1930_201# MODE_VCCHIB VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X6 VDDIO_Q OUT_B OUT VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X7 a_621_2778# MODE_VCCHIB_N VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X8 a_2024_2876# MODE_NORMAL_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X9 OUT OUT_B VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X10 VDDIO_Q MODE_VCCHIB_N a_1290_2876# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X11 a_1930_201# IN_VCCHIB a_602_2876# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X12 a_621_2778# INB_VCCHIB a_881_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X13 a_881_201# MODE_VCCHIB VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X14 OUT OUT_B VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X15 VSSD MODE_VCCHIB a_1752_1955# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X16 VSSD MODE_VCCHIB a_1930_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X17 VSSD MODE_VCCHIB a_1930_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X18 a_621_2778# a_602_2876# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X19 VSSD OUT_B OUT VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X20 a_1290_2876# a_1175_2172# OUT_B VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X21 VDDIO_Q MODE_NORMAL_N a_2024_2876# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X22 a_1752_2267# MODE_NORMAL VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X23 a_881_201# MODE_VCCHIB VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X24 a_881_201# INB_VCCHIB a_621_2778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X25 a_1175_2172# a_602_2876# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X26 VDDIO_Q MODE_NORMAL a_2911_2876# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X27 VDDIO_Q OUT_B OUT VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X28 VSSD MODE_VCCHIB a_881_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X29 VDDIO_Q a_621_2778# a_602_2876# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X30 a_2024_2876# IN_VDDIO OUT_B VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X31 OUT_B a_1175_2172# a_1290_2876# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X32 OUT_B IN_VDDIO a_1752_2267# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X33 VSSD MODE_VCCHIB a_881_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X34 a_881_201# INB_VCCHIB a_621_2778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X35 a_602_2876# IN_VCCHIB a_1930_201# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X36 a_2911_2876# MODE_VCCHIB OUT_B VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X37 OUT OUT_B VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X38 a_1930_201# MODE_VCCHIB VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X39 OUT_B IN_VDDIO a_2024_2876# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X40 a_1175_2172# a_602_2876# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u .ends .subckt sky130_fd_io__gpiov2_vcchib_in_buf IN_H MODE_VCCHIB_LV_N OUT OUT_N VSSD VCCHIB X0 VCCHIB MODE_VCCHIB_LV_N a_612_2476# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X1 VSSD VSSD VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X2 a_612_2476# MODE_VCCHIB_LV_N VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X3 VCCHIB MODE_VCCHIB_LV_N a_612_2476# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X4 OUT OUT_N VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X5 a_538_595# a_591_563# a_751_595# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X6 a_446_3055# MODE_VCCHIB_LV_N VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X7 VCCHIB a_446_3055# OUT_N VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X8 VSSD a_446_3055# OUT_N VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X9 VSSD OUT_N OUT VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X10 a_751_595# IN_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X11 a_751_595# a_591_563# a_538_595# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X12 VCCHIB MODE_VCCHIB_LV_N a_612_3332# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X13 VSSD MODE_VCCHIB_LV_N a_446_3055# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X14 a_446_3055# a_591_563# a_612_3332# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X15 a_612_3332# a_591_563# a_446_3055# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X16 a_446_3055# a_591_563# VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X17 a_751_595# a_591_563# a_538_595# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X18 VSSD OUT_N OUT VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X19 VSSD IN_H a_751_595# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X20 a_751_595# IN_H a_591_563# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X21 a_591_563# IN_H a_612_2476# VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X22 a_591_563# IN_H a_751_595# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X23 a_538_595# MODE_VCCHIB_LV_N VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X24 VSSD VSSD VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X25 a_612_2476# IN_H a_591_563# VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X26 VSSD a_591_563# a_446_3055# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X27 OUT OUT_N VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u .ends .subckt sky130_fd_io__gpiov2_in_buf OUT OUT_N IN_H IN_VT VTRIP_SEL_H VTRIP_SEL_H_N + MODE_NORMAL_N_uq1 VSSD VDDIO_Q m1_n467_n748# X0 a_1761_1865# a_973_1767# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X1 a_249_n802# IN_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X2 a_2073_1865# a_36_n802# a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X3 VSSD a_36_n802# a_2651_1865# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X4 VDDIO_Q VDDIO_Q VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X5 a_249_n802# IN_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X6 VDDIO_Q MODE_NORMAL_N_uq1 a_219_1865# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X7 a_249_n802# IN_H a_36_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X8 a_219_1865# MODE_NORMAL_N_uq1 VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X9 a_3531_2403# MODE_NORMAL_N_uq1 a_3358_2403# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 a_36_n802# IN_H a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X11 VSSD VSSD VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X12 a_3358_2403# MODE_NORMAL_N_uq1 VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X13 a_2385_1865# MODE_NORMAL_N_uq1 VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X14 a_36_n802# IN_H a_219_1865# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X15 VDDIO_Q MODE_NORMAL_N_uq1 a_2073_1865# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X16 VDDIO_Q VTRIP_SEL_H a_3531_2403# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X17 a_249_n802# a_36_n802# a_2073_1865# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X18 VSSD VTRIP_SEL_H a_3358_2403# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X19 a_917_1865# a_973_1767# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X20 VSSD IN_H a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X21 VDDIO_Q a_2651_1865# OUT_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X22 OUT OUT_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X23 VSSD IN_H a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X24 a_973_1767# a_3358_2403# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 a_2651_1865# a_36_n802# a_2385_1865# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X26 VDDIO_Q a_973_1767# a_1761_1865# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X27 a_2073_1865# MODE_NORMAL_N_uq1 VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X28 a_973_1767# a_3358_2403# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X29 a_249_n802# IN_H a_36_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X30 a_2651_1865# MODE_NORMAL_N_uq1 VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X31 a_249_n802# IN_H a_36_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X32 a_36_n802# IN_H a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X33 a_1761_1865# a_36_n802# a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X34 a_249_n802# a_36_n802# a_1761_1865# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X35 a_2073_1865# a_36_n802# a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X36 a_249_n802# a_36_n802# a_2073_1865# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X37 a_249_n802# IN_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X38 a_3531_2403# MODE_NORMAL_N_uq1 a_3358_2403# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X39 VSSD IN_VT a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X40 VSSD IN_H a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X41 VSSD VTRIP_SEL_H_N IN_VT VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=1e+06u X42 VDDIO_Q VTRIP_SEL_H a_3531_2403# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X43 VSSD VSSD VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X44 VDDIO_Q a_973_1767# a_917_1865# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X45 a_249_n802# a_36_n802# a_1761_1865# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X46 a_917_1865# IN_H a_36_n802# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X47 a_973_1767# a_3358_2403# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X48 a_1761_1865# a_36_n802# a_249_n802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X49 VSSD MODE_NORMAL_N_uq1 a_2651_1865# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X50 a_2651_1865# a_36_n802# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X51 VSSD a_2651_1865# OUT_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X52 OUT OUT_N VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u .ends .subckt sky130_fd_io__gpiov2_inbuf_lvinv_x1 IN OUT VPWR VGND X0 VPWR IN OUT VPWR sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X1 VGND IN OUT VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u .ends .subckt sky130_fd_io__gpiov2_ipath_lvls IN_VCCHIB IN_VDDIO MODE_NORMAL_LV MODE_NORMAL_LV_N + MODE_VCCHIB_LV MODE_VCCHIB_LV_N OUT OUT_B VSSD a_323_2354# VCCHIB X0 VSSD OUT_B OUT VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X1 VCCHIB MODE_NORMAL_LV_N a_436_2754# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X2 VCCHIB MODE_VCCHIB_LV_N a_1504_2754# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X3 a_823_n317# MODE_NORMAL_LV VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X4 a_1679_n317# IN_VCCHIB OUT_B VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X5 OUT OUT_B VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X6 a_114_2354# IN_VDDIO VCCHIB VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X7 a_1504_2754# IN_VCCHIB OUT_B VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X8 a_323_2354# a_114_2354# VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X9 a_436_2754# MODE_NORMAL_LV_N VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X10 OUT_B a_323_2354# a_436_2754# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X11 VCCHIB OUT_B OUT VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X12 VCCHIB MODE_NORMAL_LV a_114_2354# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X13 VCCHIB OUT_B OUT VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X14 a_823_n317# a_323_2354# OUT_B VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X15 a_1679_n317# MODE_VCCHIB_LV VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X16 a_2141_2754# MODE_NORMAL_LV OUT_B VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X17 a_1504_2754# MODE_VCCHIB_LV_N VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X18 VSSD MODE_NORMAL_LV a_823_n317# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X19 VSSD MODE_VCCHIB_LV a_1679_n317# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X20 a_316_n17# IN_VDDIO a_114_2354# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X21 VCCHIB MODE_VCCHIB_LV a_2141_2754# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X22 VCCHIB IN_VDDIO a_114_2354# VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X23 OUT_B IN_VCCHIB a_1504_2754# VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X24 VSSD MODE_NORMAL_LV a_316_n17# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X25 OUT OUT_B VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X26 a_436_2754# a_323_2354# OUT_B VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X27 a_323_2354# a_114_2354# VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=250000u X28 OUT OUT_B VCCHIB VCCHIB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X29 OUT_B a_323_2354# a_823_n317# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u X30 OUT_B IN_VCCHIB a_1679_n317# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=250000u .ends .subckt sky130_fd_io__gpiov2_ibuf_se VTRIP_SEL_H_N VCCHIB ENABLE_VDDIO_LV MODE_NORMAL_N + IBUFMUX_OUT IN_VT IN_H VTRIP_SEL_H MODE_VCCHIB_N IBUFMUX_OUT_H sky130_fd_io__gpiov2_in_buf_0/m1_n467_n748# + VDDIO_Q VSSD sky130_fd_io__gpiov2_ipath_lvls_0/a_323_2354# Xsky130_fd_io__gpiov2_ipath_hvls_0 IBUFMUX_OUT_H sky130_fd_io__gpiov2_ipath_hvls_0/OUT_B + MODE_NORMAL_N sky130_fd_io__gpiov2_vcchib_in_buf_0/OUT sky130_fd_io__gpiov2_vcchib_in_buf_0/OUT_N + sky130_fd_io__gpiov2_in_buf_0/OUT MODE_VCCHIB_N sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL + sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB VSSD VDDIO_Q sky130_fd_io__gpiov2_ipath_hvls Xsky130_fd_io__gpiov2_vcchib_in_buf_0 IN_H sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN + sky130_fd_io__gpiov2_vcchib_in_buf_0/OUT sky130_fd_io__gpiov2_vcchib_in_buf_0/OUT_N + VSSD VCCHIB sky130_fd_io__gpiov2_vcchib_in_buf Xsky130_fd_io__gpiov2_in_buf_0 sky130_fd_io__gpiov2_in_buf_0/OUT sky130_fd_io__gpiov2_in_buf_0/OUT_N + IN_H IN_VT VTRIP_SEL_H VTRIP_SEL_H_N MODE_NORMAL_N VSSD VDDIO_Q sky130_fd_io__gpiov2_in_buf_0/m1_n467_n748# + sky130_fd_io__gpiov2_in_buf Xsky130_fd_io__gpiov2_inbuf_lvinv_x1_0 sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/OUT + VCCHIB VSSD sky130_fd_io__gpiov2_inbuf_lvinv_x1 Xsky130_fd_io__gpiov2_ipath_lvls_0 sky130_fd_io__gpiov2_vcchib_in_buf_0/OUT sky130_fd_io__gpiov2_in_buf_0/OUT + sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/OUT sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN + sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/OUT sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN + IBUFMUX_OUT sky130_fd_io__gpiov2_ipath_lvls_0/OUT_B VSSD sky130_fd_io__gpiov2_ipath_lvls_0/a_323_2354# + VCCHIB sky130_fd_io__gpiov2_ipath_lvls Xsky130_fd_io__gpiov2_inbuf_lvinv_x1_1 sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/OUT + VCCHIB VSSD sky130_fd_io__gpiov2_inbuf_lvinv_x1 X0 VCCHIB ENABLE_VDDIO_LV sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X1 VCCHIB sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X2 VSSD MODE_NORMAL_N sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X3 sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB VCCHIB VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X4 sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN ENABLE_VDDIO_LV VCCHIB VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X5 sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB MODE_VCCHIB_N VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X6 VDDIO_Q MODE_NORMAL_N sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X7 VCCHIB ENABLE_VDDIO_LV sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X8 VCCHIB sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X9 sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB MODE_VCCHIB_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB VCCHIB VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X11 sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN ENABLE_VDDIO_LV VCCHIB VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X12 VDDIO_Q MODE_NORMAL_N sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X13 sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB MODE_VCCHIB_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X14 VSSD ENABLE_VDDIO_LV a_10411_1726# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X15 sky130_fd_io__gpiov2_inbuf_lvinv_x1_0/IN sky130_fd_io__gpiov2_ipath_hvls_0/MODE_NORMAL a_10763_1726# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X16 a_10411_1726# sky130_fd_io__gpiov2_ipath_hvls_0/MODE_VCCHIB sky130_fd_io__gpiov2_inbuf_lvinv_x1_1/IN VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X17 a_10763_1726# ENABLE_VDDIO_LV VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u .ends .subckt sky130_fd_io__signal_5_sym_hv_local_5term GATE NWELLRING VGND IN m1_204_67# + NBODY X0 IN GATE VGND NBODY sky130_fd_pr__esd_nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5.75e+06u l=600000u R0 NBODY m1_534_67# sky130_fd_pr__res_generic_m1 w=20000u l=5000u R1 NWELLRING m1_204_67# sky130_fd_pr__res_generic_m1 w=20000u l=5000u .ends .subckt sky130_fd_io__gpiov2_buf_localesd VTRIP_SEL_H OUT_VT VDDIO_Q VSSD OUT_H IN_H Xsky130_fd_io__signal_5_sym_hv_local_5term_0 VSSD VDDIO_Q VSSD OUT_H VDDIO_Q VSSD + sky130_fd_io__signal_5_sym_hv_local_5term Xsky130_fd_io__signal_5_sym_hv_local_5term_1 VSSD VDDIO_Q OUT_H VDDIO_Q VDDIO_Q VSSD + sky130_fd_io__signal_5_sym_hv_local_5term Xsky130_fd_io__res250only_small_0 IN_H OUT_H sky130_fd_io__res250only_small X0 OUT_H VTRIP_SEL_H OUT_VT VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=1e+06u .ends .subckt sky130_fd_io__gpiov2_ipath ENABLE_VDDIO_LV OUT_H MODE_VCCHIB_N VCCHIB DM_H_N[1] + DM_H_N[0] DM_H_N[2] INP_DIS_H_N IB_MODE_SEL_H IB_MODE_SEL_H_N VTRIP_SEL_H_N MODE_VCCHIB_N_uq1 + PAD VDDIO_Q OUT VSSD m1_2058_35701# VDDIO_Q_uq0 Xsky130_fd_io__gpiov2_ibuf_se_0 sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H_N VCCHIB + ENABLE_VDDIO_LV sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N OUT sky130_fd_io__gpiov2_ibuf_se_0/IN_VT + sky130_fd_io__gpiov2_ibuf_se_0/IN_H sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H MODE_VCCHIB_N + OUT_H PAD VDDIO_Q_uq0 VSSD m2_15184_37210# sky130_fd_io__gpiov2_ibuf_se Xsky130_fd_io__gpiov2_buf_localesd_0 sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H sky130_fd_io__gpiov2_ibuf_se_0/IN_VT + VDDIO_Q_uq0 VSSD sky130_fd_io__gpiov2_ibuf_se_0/IN_H PAD sky130_fd_io__gpiov2_buf_localesd X0 VDDIO_Q a_9920_140# sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X1 VDDIO_Q DM_H_N[2] a_10749_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X2 a_10749_140# a_11211_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X3 VSSD a_9920_140# a_9864_832# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X4 VSSD DM_H_N[2] a_11331_832# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X5 a_11331_832# a_11211_140# a_10749_140# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X6 VDDIO_Q sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X7 a_9399_166# VTRIP_SEL_H_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X8 a_10573_140# a_10749_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X9 VDDIO_Q a_10573_140# a_9920_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 a_11211_140# a_11563_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X11 VSSD a_10573_140# a_9920_140# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X12 a_11211_140# a_11563_140# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X13 sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N a_9399_166# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X14 VDDIO_Q INP_DIS_H_N a_10573_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 MODE_VCCHIB_N_uq1 a_9920_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X16 VDDIO_Q sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X17 a_9399_166# VTRIP_SEL_H_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X18 a_10573_140# a_10749_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X19 VSSD sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X20 sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H VTRIP_SEL_H_N VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X21 a_10869_832# a_10749_140# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X22 sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N IB_MODE_SEL_H_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 VDDIO_Q DM_H_N[1] a_11563_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X24 a_11563_140# DM_H_N[0] VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 VDDIO_Q IB_MODE_SEL_H MODE_VCCHIB_N_uq1 VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X26 sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N a_9399_166# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X27 VDDIO_Q INP_DIS_H_N a_10573_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X28 VSSD sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N sky130_fd_io__gpiov2_ibuf_se_0/VTRIP_SEL_H VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X29 a_10573_140# INP_DIS_H_N a_10869_832# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X30 VDDIO_Q a_9920_140# sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X31 VDDIO_Q DM_H_N[2] a_10749_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X32 MODE_VCCHIB_N_uq1 a_9920_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X33 a_10749_140# a_11211_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X34 a_10216_832# a_9920_140# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X35 sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N IB_MODE_SEL_H_N VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X36 VDDIO_Q DM_H_N[1] a_11563_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X37 a_9864_832# IB_MODE_SEL_H_N sky130_fd_io__gpiov2_ibuf_se_0/MODE_NORMAL_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X38 VDDIO_Q a_10573_140# a_9920_140# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X39 VSSD DM_H_N[1] a_11969_832# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X40 VDDIO_Q IB_MODE_SEL_H MODE_VCCHIB_N_uq1 VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X41 a_11563_140# DM_H_N[0] VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X42 a_11211_140# a_11563_140# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X43 a_11969_832# DM_H_N[0] a_11563_140# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X44 MODE_VCCHIB_N_uq1 IB_MODE_SEL_H a_10216_832# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u .ends .subckt sky130_fd_io__com_ctl_ls_en_1_v2 DM[1] VPB OUT_H_N OUT_H RST_H SET_H VPWR + HLD_H_N a_1150_n777# w_1114_n948# VCC_IO a_1762_n1276# a_n17_1379# X0 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X1 VCC_IO a_130_181# OUT_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X3 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_361_1391# HLD_H_N a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X6 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X7 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 OUT_H_N a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X9 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_1150_n777# DM[1] a_992_934# w_1114_n948# sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X11 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_65_861# HLD_H_N a_957_1391# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 OUT_H a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_65_861# a_130_181# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X17 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_n17_1379# a_65_861# a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X19 a_634_829# a_992_934# a_1150_n777# w_1114_n948# sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X20 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_n17_1379# a_65_861# OUT_H_N a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X22 a_130_181# a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X23 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X24 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X25 a_65_861# a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X26 a_130_181# SET_H a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X27 a_1762_n1276# DM[1] a_992_934# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X28 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X29 a_n17_1379# RST_H a_65_861# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X30 a_634_829# a_992_934# a_1762_n1276# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X31 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u .ends .subckt sky130_fd_io__com_ctl_ls_v2 OUT_H_N OUT_H IN RST_H SET_H VPWR HLD_H_N VPB + VCC_IO a_n17_1379# X0 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X1 VCC_IO a_130_181# OUT_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X3 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_361_1391# HLD_H_N a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X6 a_634_829# a_992_934# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X7 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X8 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 OUT_H_N a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X10 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_65_861# HLD_H_N a_957_1391# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 OUT_H a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_65_861# a_130_181# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X17 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_n17_1379# a_65_861# a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X19 VPWR IN a_992_934# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X20 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_n17_1379# IN a_992_934# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X22 a_n17_1379# a_65_861# OUT_H_N a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 a_130_181# a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X24 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X25 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X26 a_65_861# a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X27 a_634_829# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X28 a_130_181# SET_H a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X29 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X30 a_n17_1379# RST_H a_65_861# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X31 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u .ends .subckt sky130_fd_io__com_ctl_lsv2 SET_H HLD_H_N OUT_H OUT_H_N RST_H IN VPWR VGND_uq0 + m1_5675_1428# w_5775_333# w_4727_n1281# VGND m1_5585_1428# VCC_IO X0 a_4739_1530# HLD_H_N a_4700_968# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X1 OUT_H a_4739_1530# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 OUT_H_N a_4793_n866# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X3 a_4700_638# VPWR a_4933_638# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X4 VGND SET_H a_4739_1530# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X5 VGND a_4739_1530# OUT_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X6 VCC_IO a_4793_n866# a_4739_1530# w_4727_n1281# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X7 a_4700_968# VPWR a_4933_968# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X8 a_4933_968# a_4944_2840# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_4793_n866# RST_H VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X10 VGND_uq0 IN a_4944_2496# VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X11 a_4933_968# a_4944_2840# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_4933_638# VPWR a_4700_638# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X13 a_4933_638# HLD_H_N a_4793_n866# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 a_4933_968# VPWR a_4700_968# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X15 a_4700_968# VPWR a_4933_968# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X16 VCC_IO a_4793_n866# OUT_H_N VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X17 VGND a_4944_2840# a_4933_968# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND a_4944_2496# a_4700_638# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND a_4944_2496# a_4700_638# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_4944_2840# a_4944_2496# VPWR w_5775_333# sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X21 a_4933_638# VPWR a_4700_638# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X22 VCC_IO a_4739_1530# a_4793_n866# w_4727_n1281# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X23 a_4739_1530# a_4793_n866# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X24 a_4933_638# VPWR a_4700_638# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X25 a_4944_2840# a_4944_2496# VGND_uq0 VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X26 VGND a_4944_2840# a_4933_968# VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_4793_n866# a_4739_1530# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X28 a_4933_968# VPWR a_4700_968# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X29 VPWR IN a_4944_2496# w_5775_333# sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X30 a_4700_638# a_4944_2496# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_4700_638# a_4944_2496# VGND VGND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_io__com_ctl_ls_1v2 OUT_H_N OUT_H IN RST_H SET_H VPWR HLD_H_N VPB + VCC_IO a_n17_1379# X0 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X1 VCC_IO a_130_181# OUT_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X3 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_361_1391# HLD_H_N a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X6 a_634_829# a_992_934# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X7 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X8 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 OUT_H_N a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X10 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_65_861# HLD_H_N a_957_1391# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 OUT_H a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_65_861# a_130_181# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X17 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_n17_1379# a_65_861# a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X19 VPWR IN a_992_934# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X20 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_n17_1379# IN a_992_934# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X22 a_n17_1379# a_65_861# OUT_H_N a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 a_130_181# a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X24 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X25 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X26 a_65_861# a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X27 a_634_829# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X28 a_130_181# SET_H a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X29 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X30 a_n17_1379# RST_H a_65_861# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X31 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u .ends .subckt sky130_fd_io__gpiov2_ctl_lsbank VTRIP_SEL_H VTRIP_SEL INP_DIS INP_DIS_H DM[0] + DM_H[0] DM_H[2] DM_H_N[2] DM[1] VCC_IO STARTUP_ST_H STARTUP_RST_H HLD_I_H_N OD_I_H + IB_MODE_SEL_H_N sky130_fd_io__com_ctl_ls_en_1_v2_0/a_1762_n1276# sky130_fd_io__com_ctl_lsv2_0/VCC_IO + DM_H[1] INP_DIS_H_N w_15552_2653# m1_2266_545# DM_H_N[1] DM_H_N[0] VTRIP_SEL_H_N + IB_MODE_SEL VGND IB_MODE_SEL_H VPWR DM[2] Xsky130_fd_io__com_ctl_ls_en_1_v2_0 DM[1] VPWR DM_H_N[1] DM_H[1] sky130_fd_io__com_ctl_ls_en_1_v2_0/RST_H + sky130_fd_io__com_ctl_ls_en_1_v2_0/SET_H VPWR HLD_I_H_N VPWR VPWR VCC_IO sky130_fd_io__com_ctl_ls_en_1_v2_0/a_1762_n1276# + VGND sky130_fd_io__com_ctl_ls_en_1_v2 Xsky130_fd_io__com_ctl_ls_v2_0 DM_H_N[2] DM_H[2] DM[2] sky130_fd_io__com_ctl_ls_v2_0/RST_H + sky130_fd_io__com_ctl_ls_v2_0/SET_H VPWR HLD_I_H_N VPWR VCC_IO VGND sky130_fd_io__com_ctl_ls_v2 Xsky130_fd_io__com_ctl_ls_v2_1 INP_DIS_H_N INP_DIS_H INP_DIS sky130_fd_io__com_ctl_ls_v2_1/RST_H + sky130_fd_io__com_ctl_ls_v2_1/SET_H VPWR HLD_I_H_N VPWR VCC_IO VGND sky130_fd_io__com_ctl_ls_v2 Xsky130_fd_io__com_ctl_ls_v2_2 DM_H_N[0] DM_H[0] DM[0] sky130_fd_io__com_ctl_ls_v2_2/RST_H + sky130_fd_io__com_ctl_ls_v2_2/SET_H VPWR HLD_I_H_N VPWR VCC_IO VGND sky130_fd_io__com_ctl_ls_v2 Xsky130_fd_io__com_ctl_lsv2_0 sky130_fd_io__com_ctl_lsv2_0/SET_H HLD_I_H_N IB_MODE_SEL_H + IB_MODE_SEL_H_N sky130_fd_io__com_ctl_lsv2_0/RST_H IB_MODE_SEL VPWR VGND VGND VPWR + w_15552_2653# VGND VGND sky130_fd_io__com_ctl_lsv2_0/VCC_IO sky130_fd_io__com_ctl_lsv2 Xsky130_fd_io__com_ctl_ls_1v2_0 VTRIP_SEL_H_N VTRIP_SEL_H VTRIP_SEL sky130_fd_io__com_ctl_ls_1v2_0/RST_H + sky130_fd_io__com_ctl_ls_1v2_0/SET_H VPWR HLD_I_H_N VPWR VCC_IO VGND sky130_fd_io__com_ctl_ls_1v2 R0 m1_2266_320# sky130_fd_io__com_ctl_ls_en_1_v2_0/SET_H sky130_fd_pr__res_generic_m1 w=260000u l=10000u R1 m1_14183_362# sky130_fd_io__com_ctl_ls_1v2_0/RST_H sky130_fd_pr__res_generic_m1 w=230000u l=10000u R2 STARTUP_ST_H m1_6620_334# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R3 sky130_fd_io__com_ctl_lsv2_0/SET_H m2_15089_329# sky130_fd_pr__res_generic_m2 w=260000u l=10000u R4 m1_6420_507# STARTUP_RST_H sky130_fd_pr__res_generic_m1 w=260000u l=10000u R5 STARTUP_RST_H m1_5875_412# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R6 STARTUP_ST_H m1_6148_320# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R7 sky130_fd_io__com_ctl_ls_v2_0/SET_H m1_10303_506# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R8 m1_6620_334# sky130_fd_io__com_ctl_ls_v2_1/RST_H sky130_fd_pr__res_generic_m1 w=230000u l=10000u R9 OD_I_H m1_14183_362# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R10 m1_6148_320# sky130_fd_io__com_ctl_ls_v2_2/SET_H sky130_fd_pr__res_generic_m1 w=260000u l=10000u R11 OD_I_H m1_10303_543# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R12 OD_I_H m1_10029_412# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R13 m2_15027_104# sky130_fd_io__com_ctl_lsv2_0/SET_H sky130_fd_pr__res_generic_m2 w=260000u l=10000u R14 sky130_fd_io__com_ctl_ls_v2_1/RST_H m1_6707_412# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R15 STARTUP_ST_H m1_6421_319# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R16 sky130_fd_io__com_ctl_ls_1v2_0/SET_H m1_14456_624# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R17 STARTUP_ST_H m1_5955_333# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R18 OD_I_H m1_14457_430# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R19 OD_I_H m2_14799_410# sky130_fd_pr__res_generic_m2 w=260000u l=10000u R20 sky130_fd_io__com_ctl_ls_v2_1/SET_H m1_6421_356# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R21 m2_14799_410# sky130_fd_io__com_ctl_lsv2_0/RST_H sky130_fd_pr__res_generic_m2 w=260000u l=10000u R22 m2_15089_329# VGND sky130_fd_pr__res_generic_m2 w=260000u l=10000u R23 m1_14456_624# VGND sky130_fd_pr__res_generic_m1 w=260000u l=10000u R24 sky130_fd_io__com_ctl_ls_v2_2/RST_H m1_5955_370# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R25 sky130_fd_io__com_ctl_ls_1v2_0/SET_H m1_14457_467# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R26 VGND m1_10109_333# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R27 VGND m1_10302_320# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R28 m1_2553_412# m1_2266_545# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R29 sky130_fd_io__com_ctl_ls_v2_0/RST_H m1_10109_370# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R30 m1_10302_320# sky130_fd_io__com_ctl_ls_v2_0/SET_H sky130_fd_pr__res_generic_m1 w=260000u l=10000u R31 sky130_fd_io__com_ctl_ls_en_1_v2_0/SET_H m1_2267_506# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R32 sky130_fd_io__com_ctl_ls_1v2_0/RST_H m1_14263_617# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R33 VGND m1_2467_333# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R34 m1_2266_545# m1_2267_543# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R35 VGND m1_14263_654# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R36 sky130_fd_io__com_ctl_ls_en_1_v2_0/RST_H m1_2467_370# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R37 sky130_fd_io__com_ctl_ls_v2_2/SET_H m1_6149_506# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R38 sky130_fd_io__com_ctl_lsv2_0/RST_H m1_14911_509# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R39 m1_10029_412# sky130_fd_io__com_ctl_ls_v2_0/RST_H sky130_fd_pr__res_generic_m1 w=230000u l=10000u R40 OD_I_H m2_14990_104# sky130_fd_pr__res_generic_m2 w=260000u l=10000u R41 STARTUP_RST_H m1_6149_543# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R42 sky130_fd_io__com_ctl_ls_en_1_v2_0/RST_H m1_2553_412# sky130_fd_pr__res_generic_m1 w=230000u l=10000u R43 VGND m1_14911_546# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R44 m1_6744_412# STARTUP_RST_H sky130_fd_pr__res_generic_m1 w=230000u l=10000u R45 VGND m1_2266_320# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R46 m1_5875_412# sky130_fd_io__com_ctl_ls_v2_2/RST_H sky130_fd_pr__res_generic_m1 w=230000u l=10000u R47 sky130_fd_io__com_ctl_ls_v2_1/SET_H m1_6420_507# sky130_fd_pr__res_generic_m1 w=260000u l=10000u .ends .subckt sky130_fd_io__com_ctl_ls OUT_H_N OUT_H IN RST_H SET_H VPWR HLD_H_N VPB VCC_IO + a_n17_1379# X0 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X1 VCC_IO a_130_181# OUT_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X2 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X3 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_361_1391# HLD_H_N a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X6 a_634_829# a_992_934# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X7 a_361_1391# VPWR a_128_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X8 a_n17_1379# a_634_829# a_128_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 OUT_H_N a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X10 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_128_1391# a_634_829# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_65_861# HLD_H_N a_957_1391# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X14 OUT_H a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_n17_1379# a_992_934# a_724_1391# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_65_861# a_130_181# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X17 a_724_1391# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_n17_1379# a_65_861# a_130_181# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X19 VPWR IN a_992_934# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X20 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X21 a_n17_1379# IN a_992_934# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X22 a_n17_1379# a_65_861# OUT_H_N a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 a_130_181# a_65_861# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X24 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X25 a_957_1391# VPWR a_724_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X26 a_65_861# a_130_181# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X27 a_634_829# a_992_934# a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X28 a_130_181# SET_H a_n17_1379# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X29 a_724_1391# VPWR a_957_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X30 a_n17_1379# RST_H a_65_861# a_n17_1379# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=600000u X31 a_128_1391# VPWR a_361_1391# a_n17_1379# sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u .ends .subckt sky130_fd_io__com_ctl_hldv2 HLD_OVR HLD_I_H_N OD_I_H VPWR HLD_I_H VPWR_uq0 + VGND_uq0 VCC_IO_uq0 sky130_fd_io__com_ctl_ls_0/VCC_IO sky130_fd_io__com_ctl_ls_0/VPB + m2_3556_4196# a_8218_3918# a_3023_3554# VGND m1_3684_4201# VCC_IO a_2671_3554# m2_3665_4182# Xsky130_fd_io__com_ctl_ls_0 sky130_fd_io__com_ctl_ls_0/OUT_H_N sky130_fd_io__com_ctl_ls_0/OUT_H + HLD_OVR sky130_fd_io__com_ctl_ls_0/RST_H VGND VPWR sky130_fd_io__com_ctl_ls_0/HLD_H_N + sky130_fd_io__com_ctl_ls_0/VPB sky130_fd_io__com_ctl_ls_0/VCC_IO VGND sky130_fd_io__com_ctl_ls X0 a_2967_3580# a_2671_3554# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X1 sky130_fd_io__com_ctl_ls_0/HLD_H_N a_2967_3918# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X2 a_3743_3580# sky130_fd_io__com_ctl_ls_0/HLD_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X3 VCC_IO sky130_fd_io__com_ctl_ls_0/HLD_H_N a_3743_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X4 VGND a_3743_3580# a_4447_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X5 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X6 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X7 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X8 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X9 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X11 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X12 VCC_IO sky130_fd_io__com_ctl_ls_0/RST_H a_7214_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X13 OD_I_H a_7214_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X14 VCC_IO a_7214_3580# OD_I_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 VCC_IO OD_I_H a_8391_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X16 VGND a_2671_3554# sky130_fd_io__com_ctl_ls_0/RST_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X17 VCC_IO a_3023_3554# a_2967_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X18 VGND sky130_fd_io__com_ctl_ls_0/HLD_H_N a_3743_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X19 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X20 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X21 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X22 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X23 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X24 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 OD_I_H a_7214_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X26 a_8391_3918# a_8271_3554# a_8218_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X27 VCC_IO a_7214_3580# OD_I_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X28 a_8743_3918# sky130_fd_io__com_ctl_ls_0/HLD_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X29 a_2967_3918# a_2671_3554# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X30 a_3743_3580# sky130_fd_io__com_ctl_ls_0/HLD_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X31 a_3743_3580# sky130_fd_io__com_ctl_ls_0/HLD_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X32 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X33 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R0 HLD_I_H a_3743_3580# sky130_fd_pr__res_generic_m1 w=230000u l=10000u X34 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X35 a_8271_3554# sky130_fd_io__com_ctl_ls_0/OUT_H a_8743_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X36 VCC_IO a_2671_3554# sky130_fd_io__com_ctl_ls_0/RST_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X37 a_5855_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X38 VGND a_3743_3580# a_4447_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X39 a_5855_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X40 sky130_fd_io__com_ctl_ls_0/HLD_H_N a_2967_3918# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X41 VCC_IO sky130_fd_io__com_ctl_ls_0/HLD_H_N a_3743_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X42 VGND sky130_fd_io__com_ctl_ls_0/RST_H a_7214_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X43 VGND a_7214_3580# OD_I_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X44 VCC_IO sky130_fd_io__com_ctl_ls_0/HLD_H_N a_3743_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X45 VGND OD_I_H a_8218_3918# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X46 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X47 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X48 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X49 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X50 OD_I_H a_7214_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X51 a_2967_3918# a_3023_3554# a_2967_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X52 a_4447_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X53 VGND a_3743_3580# a_5855_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X54 VGND a_3743_3580# a_5855_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X55 OD_I_H a_7214_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X56 a_3743_3580# sky130_fd_io__com_ctl_ls_0/HLD_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X57 a_8218_3918# a_8271_3554# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X58 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X59 a_8271_3554# sky130_fd_io__com_ctl_ls_0/HLD_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u R1 a_4447_3580# HLD_I_H_N sky130_fd_pr__res_generic_m1 w=230000u l=25000u X60 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X61 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R2 HLD_I_H_N a_5855_3580# sky130_fd_pr__res_generic_m1 w=230000u l=25000u X62 VCC_IO a_7214_3580# OD_I_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X63 a_4447_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X64 VGND a_3743_3580# a_4447_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X65 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X66 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X67 a_2967_3918# a_2671_3554# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X68 a_5855_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X69 VCC_IO sky130_fd_io__com_ctl_ls_0/RST_H a_7214_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X70 a_3743_3580# sky130_fd_io__com_ctl_ls_0/HLD_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X71 VCC_IO a_7214_3580# OD_I_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X72 VGND sky130_fd_io__com_ctl_ls_0/OUT_H a_8271_3554# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X73 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X74 VCC_IO OD_I_H a_8391_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X75 VCC_IO a_3023_3554# a_2967_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X76 sky130_fd_io__com_ctl_ls_0/HLD_H_N a_2967_3918# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X77 VGND sky130_fd_io__com_ctl_ls_0/HLD_H_N a_3743_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X78 a_4447_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X79 VGND a_3743_3580# a_4447_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X80 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X81 a_5855_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X82 VCC_IO a_2671_3554# sky130_fd_io__com_ctl_ls_0/RST_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X83 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X84 VGND a_3743_3580# a_5855_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X85 VCC_IO sky130_fd_io__com_ctl_ls_0/HLD_H_N a_3743_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X86 VCC_IO a_3743_3580# a_5855_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X87 OD_I_H a_7214_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X88 OD_I_H a_7214_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X89 a_8391_3918# a_8271_3554# a_8218_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X90 a_8743_3918# sky130_fd_io__com_ctl_ls_0/HLD_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X91 a_4447_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X92 a_4447_3580# a_3743_3580# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X93 VCC_IO a_3743_3580# a_4447_3580# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X94 a_5855_3580# a_3743_3580# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X95 VGND a_3743_3580# a_5855_3580# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X96 VGND a_7214_3580# OD_I_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X97 a_3743_3580# sky130_fd_io__com_ctl_ls_0/HLD_H_N VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X98 a_8271_3554# sky130_fd_io__com_ctl_ls_0/OUT_H a_8743_3918# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u .ends .subckt sky130_fd_io__gpiov2_ctl VTRIP_SEL_H_N DM[0] DM[2] DM_H[0] HLD_OVR DM_H[2] + DM_H_N[1] DM_H_N[2] INP_DIS INP_DIS_H_N VTRIP_SEL_H VTRIP_SEL HLD_H_N OD_I_H INP_STARTUP_EN_H + IB_MODE_SEL_H_N DM[1] ENABLE_INP_H ENABLE_H a_11799_3638# li_18199_5031# DM_H_N[0] + IB_MODE_SEL_H sky130_fd_io__gpiov2_ctl_lsbank_0/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_1762_n1276# + DM_H[1] VPWR IB_MODE_SEL VCC_IO HLD_I_H_N HLD_I_OVR_H sky130_fd_io__com_ctl_hldv2_0/HLD_I_H + VGND VCC_IO_uq0 Xsky130_fd_io__gpiov2_ctl_lsbank_0 VTRIP_SEL_H VTRIP_SEL INP_DIS sky130_fd_io__gpiov2_ctl_lsbank_0/INP_DIS_H + DM[0] DM_H[0] DM_H[2] DM_H_N[2] DM[1] VCC_IO_uq0 INP_STARTUP_EN_H sky130_fd_io__gpiov2_ctl_lsbank_0/STARTUP_RST_H + HLD_I_H_N OD_I_H IB_MODE_SEL_H_N sky130_fd_io__gpiov2_ctl_lsbank_0/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_1762_n1276# + VCC_IO DM_H[1] INP_DIS_H_N VCC_IO OD_I_H DM_H_N[1] DM_H_N[0] VTRIP_SEL_H_N IB_MODE_SEL + VGND IB_MODE_SEL_H VPWR DM[2] sky130_fd_io__gpiov2_ctl_lsbank Xsky130_fd_io__com_ctl_hldv2_0 HLD_OVR HLD_I_H_N OD_I_H VPWR sky130_fd_io__com_ctl_hldv2_0/HLD_I_H + VPWR VGND VCC_IO_uq0 VCC_IO_uq0 VPWR OD_I_H HLD_I_OVR_H HLD_H_N VGND OD_I_H VCC_IO + ENABLE_H OD_I_H sky130_fd_io__com_ctl_hldv2 X0 INP_STARTUP_EN_H a_11094_4330# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X1 VCC_IO ENABLE_INP_H a_11919_3664# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X2 a_11919_3664# a_11799_3638# sky130_fd_io__gpiov2_ctl_lsbank_0/STARTUP_RST_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X3 sky130_fd_io__gpiov2_ctl_lsbank_0/STARTUP_RST_H a_11799_3638# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X4 VCC_IO ENABLE_INP_H a_11919_3664# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X5 a_11094_4330# ENABLE_INP_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X6 VGND ENABLE_INP_H sky130_fd_io__gpiov2_ctl_lsbank_0/STARTUP_RST_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X7 VCC_IO OD_I_H a_11094_4330# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X8 INP_STARTUP_EN_H a_11094_4330# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X9 a_11094_4330# ENABLE_INP_H VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 a_11267_4330# ENABLE_INP_H a_11094_4330# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X11 VCC_IO OD_I_H a_11094_4330# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X12 a_11919_3664# a_11799_3638# sky130_fd_io__gpiov2_ctl_lsbank_0/STARTUP_RST_H VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X13 VGND OD_I_H a_11267_4330# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X14 INP_STARTUP_EN_H a_11094_4330# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u .ends .subckt sky130_fd_io__top_gpiov2 VSSIO_Q PAD_A_NOESD_H ANALOG_POL ENABLE_VDDIO IN_H + IN ANALOG_EN OUT TIE_HI_ESD PAD_A_ESD_1_H DM[0] DM[1] DM[2] HLD_H_N HLD_OVR INP_DIS + ENABLE_VDDA_H VTRIP_SEL OE_N SLOW TIE_LO_ESD PAD_A_ESD_0_H ANALOG_SEL ENABLE_INP_H + ENABLE_H IB_MODE_SEL ENABLE_VSWITCH_H VSWITCH AMUXBUS_B sky130_fd_io__overlay_gpiov2_m4_0/sky130_fd_io__top_gpio_pad_0/b_1500_19531# + w_9674_16869# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N + w_12765_16869# w_12765_14755# w_9674_14653# VSSA_uq6 VSSA PAD VDDIO_Q VSSIO_uq2 + VDDIO VSSIO VCCHIB AMUXBUS_A VDDA VDDIO_uq2 VCCD VSSD Xsky130_fd_io__gpio_opathv2_0 VSSIO_uq2 sky130_fd_io__gpiov2_ctl_0/HLD_I_H_N sky130_fd_io__gpiov2_ctl_0/OD_I_H + SLOW VDDIO VCCD PAD sky130_fd_io__gpiov2_ctl_0/DM_H[1] sky130_fd_io__gpiov2_ctl_0/HLD_I_OVR_H + OUT TIE_LO_ESD VSSIO_uq2 VSSIO_uq2 PAD PAD li_3442_6400# li_3302_6400# li_7854_5377# + sky130_fd_io__gpio_opathv2_0/sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpiov2_pdpredrvr_strong_0/sky130_fd_io__gpiov2_octl_mux_0/Y_H + OE_N sky130_fd_io__gpiov2_ctl_0/DM_H[0] sky130_fd_io__gpiov2_ctl_0/DM_H_N[0] li_7943_6398# + sky130_fd_io__gpiov2_ctl_0/DM_H[2] sky130_fd_io__gpiov2_ctl_0/DM_H_N[1] VSSD PAD + li_4745_6400# li_7636_6398# sky130_fd_io__gpio_opathv2_0/sky130_fd_io__gpio_odrvrv2_0/PU_H_N[2] + sky130_fd_io__gpiov2_ctl_0/VTRIP_SEL_H_N li_5278_5352# TIE_HI_ESD VSSD sky130_fd_io__gpiov2_ctl_0/DM_H[1] + li_5245_3919# li_9062_7268# VSSIO_uq2 sky130_fd_io__gpio_opathv2_0/sky130_fd_io__gpiov2_octl_dat_0/sky130_fd_io__gpiov2_obpredrvr_0/sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__feascom_pupredrvr_nbiasv2_0/NBIAS_uq3 + sky130_fd_io__gpiov2_ctl_0/DM_H_N[2] li_2678_6400# VDDA VSSIO_uq2 li_10974_4971# + VSSIO_uq2 VCCHIB VSSIO_uq2 VSSD VDDIO_uq2 li_3958_5352# li_3334_5352# VSSIO sky130_fd_io__gpio_opathv2 Xsky130_fd_io__gpiov2_amux_0 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_13/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_0/ROUT ANALOG_EN PAD ANALOG_POL + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_10/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_10/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_3/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_7/ROUT + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_3/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B + VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_0/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y + PAD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_13/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y + PAD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y + VDDA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_8/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A + VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_13/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H VCCD + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_10/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B + ANALOG_SEL sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A + VCCD PAD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y + VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N VSSD + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_9/ROUT w_9674_16869# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y + AMUXBUS_A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y + VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_10/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_6/ROUT + VSSA AMUXBUS_B sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_10/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y + sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_3/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y + w_12765_16869# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y + w_9674_14653# w_12765_14755# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_3/ROUT + VSSD VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_3/ROUT OUT PAD + VDDIO_Q sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_0/ROUT sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B + VSSD VDDIO_Q VSSD sky130_fd_io__gpiov2_amux Xsky130_fd_io__res75only_small_0 PAD_A_ESD_1_H sky130_fd_io__res75only_small_1/PAD + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_1 sky130_fd_io__res75only_small_1/PAD PAD sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_2 PAD_A_ESD_0_H sky130_fd_io__res75only_small_3/PAD + sky130_fd_io__res75only_small Xsky130_fd_io__res75only_small_3 sky130_fd_io__res75only_small_3/PAD PAD sky130_fd_io__res75only_small Xsky130_fd_io__gpiov2_ipath_0 ENABLE_VDDIO IN_H sky130_fd_io__gpiov2_ipath_0/MODE_VCCHIB_N + VCCHIB sky130_fd_io__gpiov2_ctl_0/DM_H_N[1] sky130_fd_io__gpiov2_ctl_0/DM_H_N[0] + sky130_fd_io__gpiov2_ctl_0/DM_H_N[2] sky130_fd_io__gpiov2_ctl_0/INP_DIS_H_N sky130_fd_io__gpiov2_ctl_0/IB_MODE_SEL_H + sky130_fd_io__gpiov2_ctl_0/IB_MODE_SEL_H_N sky130_fd_io__gpiov2_ctl_0/VTRIP_SEL_H_N + sky130_fd_io__gpiov2_ipath_0/MODE_VCCHIB_N PAD VDDIO_Q IN VSSD VDDIO_uq2 VDDIO_Q + sky130_fd_io__gpiov2_ipath Xsky130_fd_io__gpiov2_ctl_0 sky130_fd_io__gpiov2_ctl_0/VTRIP_SEL_H_N DM[0] DM[2] sky130_fd_io__gpiov2_ctl_0/DM_H[0] + HLD_OVR sky130_fd_io__gpiov2_ctl_0/DM_H[2] sky130_fd_io__gpiov2_ctl_0/DM_H_N[1] + sky130_fd_io__gpiov2_ctl_0/DM_H_N[2] INP_DIS sky130_fd_io__gpiov2_ctl_0/INP_DIS_H_N + sky130_fd_io__gpiov2_ctl_0/VTRIP_SEL_H VTRIP_SEL HLD_H_N sky130_fd_io__gpiov2_ctl_0/OD_I_H + sky130_fd_io__gpiov2_ctl_0/INP_STARTUP_EN_H sky130_fd_io__gpiov2_ctl_0/IB_MODE_SEL_H_N + DM[1] ENABLE_INP_H ENABLE_H ENABLE_H PAD sky130_fd_io__gpiov2_ctl_0/DM_H_N[0] sky130_fd_io__gpiov2_ctl_0/IB_MODE_SEL_H + VSSD sky130_fd_io__gpiov2_ctl_0/DM_H[1] VCCD IB_MODE_SEL VDDIO_Q sky130_fd_io__gpiov2_ctl_0/HLD_I_H_N + sky130_fd_io__gpiov2_ctl_0/HLD_I_OVR_H sky130_fd_io__gpiov2_ctl_0/sky130_fd_io__com_ctl_hldv2_0/HLD_I_H + VSSD VDDIO_Q sky130_fd_io__gpiov2_ctl X0 a_3218_11709# a_282_14802# a_1024_11940# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X1 VSWITCH a_1225_14186# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X2 a_13902_2778# VCCD a_14397_2496# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X3 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X4 a_14053_2496# VCCD a_14092_2778# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X5 a_8765_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X6 a_7015_11461# a_6895_11435# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X7 a_382_14828# a_231_9686# a_497_17084# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X8 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y a_6895_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X9 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H a_478_17182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X10 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT a_2250_17651# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X11 a_14092_2778# a_13902_2778# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X12 VCCD a_6895_11435# a_7015_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X13 a_3462_14827# a_3642_14801# a_620_18182# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X14 a_10924_13064# a_334_12102# a_10768_13064# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X15 a_10350_10272# VCCD a_10583_10272# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X16 VSSA a_377_12820# a_2162_14426# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X17 VSSA a_478_17182# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X18 VSSD a_231_9686# a_178_9778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X19 a_9877_11799# a_8765_11461# a_8067_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X20 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H a_1225_12852# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X21 a_10768_13064# a_2250_17651# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X22 a_2159_13760# a_689_12820# a_1024_12357# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X23 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A a_12443_12112# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X24 a_9406_11799# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 VDDA a_184_18182# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X26 a_8699_10272# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VSSD VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VSWITCH a_1024_12357# a_387_12076# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=2e+06u X28 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X29 a_324_14186# a_689_12820# a_789_14186# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X30 a_620_17850# a_178_9778# a_2080_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X31 VDDA a_497_17084# a_229_14828# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X32 a_10406_10767# a_7173_10183# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X33 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N a_184_18182# VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X34 a_1072_12852# VCCD a_593_13378# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X35 w_12765_16869# sky130_fd_io__gpiov2_ctl_0/sky130_fd_io__com_ctl_hldv2_0/HLD_I_H VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X36 a_789_14186# a_689_12820# a_324_14186# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X37 VSSA a_478_17182# a_184_18182# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u R0 PAD_A_NOESD_H PAD sky130_fd_pr__res_generic_m3 w=1.07e+06u l=35000u X38 w_9674_14653# a_6367_11435# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_6/ROUT VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X39 a_620_18182# a_184_18182# VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X40 a_1079_9778# a_282_14802# a_926_9778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X41 a_6367_11435# a_6543_11435# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X42 a_1225_14186# a_689_12820# a_1072_14186# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X43 a_11173_10272# VCCD a_10940_10272# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X44 a_9067_10698# VCCD a_8699_10272# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X45 a_2250_17651# a_7173_10183# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X46 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X47 VSSD ANALOG_EN a_13816_1289# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u X48 a_3218_11709# ENABLE_VSWITCH_H VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X49 a_1077_11842# a_1024_11940# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X50 VSSA VSSA a_387_12076# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X51 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H a_1225_14186# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X52 VSSD a_6895_11435# a_7015_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X53 VDDA ENABLE_VDDA_H a_195_17182# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X54 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A a_11131_11430# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X55 a_643_12102# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X56 a_8067_11435# a_8765_11461# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X57 a_229_14828# a_282_14802# a_382_14828# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X58 a_2749_13760# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y VSSA VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X59 a_7367_11461# a_7015_11461# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X60 w_9674_14653# sky130_fd_io__gpiov2_ctl_0/sky130_fd_io__com_ctl_hldv2_0/HLD_I_H VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X61 a_593_13760# VCCD a_1072_14186# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X62 a_2982_13760# a_689_12820# a_2162_14426# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X63 a_6895_11435# a_7539_11435# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X64 VSWITCH a_387_12076# a_334_12102# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X65 a_643_12102# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X66 a_14092_2778# VCCD a_14053_2496# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X67 a_13970_2496# a_13760_1103# a_14053_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u R1 PAD_A_NOESD_H PAD sky130_fd_pr__res_generic_m4 w=1.237e+07u l=35000u X68 a_7539_11435# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X69 VSSA a_387_12076# a_334_12102# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X70 VSWITCH a_1225_12852# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X71 VSWITCH a_1024_12357# a_2162_14426# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X72 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X73 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_8765_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X74 a_14397_2496# VCCD a_13902_2778# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X75 VCCD a_10643_12610# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X76 VSSA a_787_17182# a_2080_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X77 a_9350_10698# VCCD a_8871_10272# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X78 a_6543_11435# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X79 a_324_14186# a_377_12820# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X80 a_593_13760# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y VSSA VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X81 a_2392_13760# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y VSSA VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X82 VSSA a_377_12820# a_324_14186# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X83 a_2080_14827# a_1079_9778# a_184_17734# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X84 VSSD a_7173_10183# a_2250_17651# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X85 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N a_184_18182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X86 VSSA a_195_17182# w_12765_16869# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X87 a_1072_12852# a_689_12820# a_1225_12852# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X88 VDDIO_Q a_2250_17651# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X89 a_178_9778# a_282_14802# a_643_9778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X90 VCCD a_6367_11435# a_6314_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X91 VSSA sky130_fd_io__gpiov2_ctl_0/sky130_fd_io__com_ctl_hldv2_0/HLD_I_H w_9674_16869# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X92 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H a_231_9686# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X93 a_178_9778# a_1079_9778# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X94 VSWITCH a_1077_11842# a_1024_11940# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X95 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A a_11131_11430# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X96 a_2159_13760# VCCD a_2392_13760# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X97 a_11523_13190# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X98 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H a_1225_14186# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X99 VSSA a_231_9686# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X100 a_421_13760# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VSSA VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X101 VCCD ANALOG_EN a_13816_1289# VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X102 a_787_17182# a_229_14828# VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X103 VSSD a_10643_12610# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X104 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X105 a_7659_11461# a_7539_11435# a_6895_11435# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X106 VSSD a_3642_14801# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X107 a_2250_17651# a_7173_10183# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u R2 PAD_A_NOESD_H PAD sky130_fd_pr__res_generic_m3 w=1.237e+07u l=35000u X108 VSSA a_195_17182# w_9674_14653# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X109 VDDA a_620_18182# a_184_18182# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X110 a_789_12852# VCCD a_421_13378# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X111 a_689_12820# a_1024_11940# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X112 a_14397_2496# a_13816_1289# a_13970_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X113 VSSA sky130_fd_io__gpiov2_ctl_0/sky130_fd_io__com_ctl_hldv2_0/HLD_I_H w_12765_14755# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X114 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y a_10940_10272# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X115 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y a_7370_13247# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X116 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y a_7625_13629# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X117 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_178_9778# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X118 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_3642_14801# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X119 a_7621_13247# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y VCCD VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.26e+06u l=150000u X120 a_7625_13629# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X121 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_10705_12172# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X122 a_10643_12610# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X123 a_14053_2496# VCCD a_14092_2778# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X124 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X125 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X126 VSSD a_6367_11435# a_6314_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X127 a_7621_13247# a_7370_13247# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.26e+06u l=150000u X128 a_1024_12357# a_2162_14426# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X129 a_14053_2496# a_13760_1103# a_13970_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X130 a_12162_13064# a_334_12102# a_12006_13064# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X131 a_324_14186# a_1225_14186# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X132 VDDA a_497_17084# a_478_17182# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X133 VSSD a_178_9778# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X134 a_2250_17651# a_7173_10183# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X135 a_10705_12172# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_10705_12016# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X136 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H a_1225_12852# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X137 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X138 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X139 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y a_8871_10272# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X140 a_13970_2496# a_13816_1289# a_14397_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X141 a_10705_11704# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X142 VSSD a_11131_11430# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X143 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_8300_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X144 VSSA ENABLE_VSWITCH_H a_342_11805# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X145 a_421_13378# VCCD a_789_12852# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X146 a_14397_2496# a_13816_1289# a_13970_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X147 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A a_12443_12112# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X148 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_12897_12172# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X149 VCCD a_6895_11435# a_7015_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X150 a_8699_10272# VCCD a_9067_10698# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X151 a_447_9352# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y VSSD VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X152 a_620_17850# a_184_17734# VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X153 VSSD a_7173_10183# a_2250_17651# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X154 a_9877_11799# a_8765_11461# a_8067_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X155 VSSD a_7173_10183# a_2250_17651# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X156 a_2250_17651# a_7173_10183# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X157 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT a_2250_17651# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X158 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H a_1225_12852# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X159 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A a_8699_10272# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X160 VSSD sky130_fd_io__gpiov2_ctl_0/HLD_I_H_N a_13970_2496# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X161 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X162 a_497_17084# a_195_17182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X163 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X164 a_2080_14827# a_178_9778# a_620_17850# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X165 a_2080_14827# a_1079_9778# a_184_17734# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X166 a_9406_11799# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X167 a_7173_10183# a_231_9686# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X168 VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y a_593_13378# VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X169 a_12897_12172# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_12897_12016# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X170 a_620_17850# a_178_9778# a_2080_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X171 a_1072_14186# VCCD a_593_13760# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X172 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A a_12443_12112# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X173 VDDIO_Q a_3642_14801# a_4110_14801# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X174 a_12897_11704# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X175 VCCD a_8067_11435# a_6543_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X176 a_13970_2496# a_13816_1289# a_14397_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X177 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT a_2250_17651# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X178 a_447_9352# VCCD a_926_9778# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X179 a_497_17084# a_231_9686# a_382_14828# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X180 VDDIO_Q a_2250_17651# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X181 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_8473_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X182 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y a_447_9352# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X183 VCCD a_6543_11435# a_6367_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X184 w_9674_16869# a_195_17182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X185 VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A a_421_13378# VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X186 a_3642_14801# a_282_14802# a_9067_10698# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X187 a_14053_2496# a_13760_1103# a_13970_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X188 VSSA a_1225_12852# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X189 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A a_11523_13190# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X190 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y a_7453_13247# VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.26e+06u l=150000u X191 VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y a_2749_13760# VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X192 a_643_9778# a_282_14802# a_178_9778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X193 a_275_9352# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A VSSD VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X194 a_7453_13247# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y a_7370_13247# VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.26e+06u l=150000u X195 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H a_1225_14186# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X196 a_13902_2778# VCCD a_14397_2496# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X197 a_195_17182# ENABLE_VDDA_H VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X198 a_6895_11435# a_7539_11435# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X199 a_10643_12610# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X200 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H a_9877_11799# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X201 VSSA a_1225_14186# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X202 a_7173_10183# a_282_14802# a_11173_10272# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X203 w_12765_14755# a_195_17182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X204 a_324_12852# a_689_12820# a_789_12852# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X205 VSSD a_13816_1289# a_13760_1103# VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u X206 a_787_17182# a_229_14828# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X207 a_184_17734# a_1079_9778# a_2080_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X208 a_6543_11435# a_8067_11435# a_8011_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X209 a_387_12076# a_1024_12357# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=2e+06u X210 a_11173_10272# a_282_14802# a_7173_10183# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X211 a_10406_10767# a_282_14802# a_10350_10272# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X212 a_789_12852# a_689_12820# a_324_12852# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X213 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X214 VSSA a_497_17084# a_478_17182# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X215 a_926_9778# VCCD a_447_9352# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X216 a_7539_11435# a_8300_11461# a_9406_11799# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X217 a_13970_2496# a_13760_1103# a_14053_2496# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X218 a_11850_13064# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X219 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X220 a_1225_12852# a_689_12820# a_1072_12852# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X221 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A a_275_9352# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X222 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A a_2250_17651# a_12162_13064# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X223 VSWITCH ENABLE_VSWITCH_H a_342_11805# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X224 VSSD a_6543_11435# a_6367_11435# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X225 VCCD a_6367_11435# a_6314_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X226 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y a_10583_10272# VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X227 VSWITCH a_324_14186# a_1225_14186# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X228 VDDA a_620_17850# a_184_17734# VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X229 a_9350_10698# a_282_14802# a_4110_14801# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X230 a_1077_11842# a_342_11805# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X231 a_324_12852# a_1225_12852# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X232 VDDIO_Q a_13902_2778# a_231_9686# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X233 w_12765_14755# a_6367_11435# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_7/ROUT VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X234 a_9067_10698# a_282_14802# a_3642_14801# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X235 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H a_1225_14186# VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X236 a_10940_10272# VCCD a_11173_10272# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X237 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X238 a_8300_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X239 a_184_17734# a_478_17182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X240 VSSA a_1225_14186# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_AMX_VPMP_H VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X241 a_497_17084# a_229_14828# VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X242 VSSA a_184_17734# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X243 a_2982_13760# VCCD a_2749_13760# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X244 a_789_14186# VCCD a_421_13760# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X245 a_7015_11461# a_6895_11435# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X246 VSWITCH a_1077_11842# a_377_12820# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X247 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H a_8067_11435# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X248 a_8765_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X249 a_1077_11842# a_231_9686# a_3218_11709# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X250 a_2250_17651# a_7173_10183# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X251 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y a_6895_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X252 a_643_9778# VCCD a_275_9352# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X253 VDDIO_Q a_7173_10183# a_2250_17651# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X254 a_324_12852# a_377_12820# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X255 a_14092_2778# VCCD a_14053_2496# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X256 VSSD a_8300_11461# a_7539_11435# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X257 VSSA a_377_12820# a_324_12852# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X258 a_184_18182# a_4110_14801# a_3462_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X259 VCCD a_13816_1289# a_13760_1103# VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=250000u X260 a_11080_13064# a_6314_11461# a_10924_13064# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X261 a_2162_14426# a_377_12820# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X262 a_10350_10272# a_282_14802# a_10406_10767# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X263 a_13970_2496# sky130_fd_io__gpiov2_ctl_0/HLD_I_H_N VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X264 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A a_10643_12610# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X265 VSSA ENABLE_VDDA_H a_382_14828# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X266 a_3462_14827# a_4110_14801# a_184_18182# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X267 a_3642_14801# a_4110_14801# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X268 a_7370_13247# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y VSSD VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X269 a_4110_14801# a_282_14802# a_9350_10698# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X270 a_12443_12112# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X271 a_3642_14801# a_231_9686# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X272 VDDIO_Q a_3642_14801# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X273 a_275_9352# VCCD a_643_9778# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X274 a_8473_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N a_8300_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X275 VDDIO_Q a_178_9778# a_1079_9778# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X276 VSSD a_231_9686# a_3642_14801# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X277 a_6367_11435# a_6543_11435# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X278 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X279 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X280 a_10583_10272# VCCD a_10350_10272# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X281 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_8300_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X282 VSSA a_1024_11940# a_689_12820# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X283 a_8938_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N a_8765_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X284 a_7015_11461# a_6895_11435# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X285 a_421_13760# VCCD a_789_14186# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X286 a_1072_14186# a_689_12820# a_1225_14186# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X287 a_3218_11709# a_231_9686# a_1077_11842# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X288 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y a_7659_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X289 a_178_9778# a_231_9686# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X290 w_12765_16869# a_7015_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_9/ROUT VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X291 a_8871_10272# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y VSSD VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X292 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A a_11131_11430# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X293 a_497_17084# a_231_9686# a_382_14828# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X294 VSSD a_7370_13247# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B VSSD sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X295 a_7367_11461# a_7015_11461# VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X296 VSSD a_231_9686# a_7173_10183# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X297 a_4259_12681# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X298 a_184_18182# a_4110_14801# a_3462_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X299 a_382_14828# a_282_14802# a_229_14828# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X300 VSSD a_12443_12112# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X301 a_593_13378# VCCD a_1072_12852# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X302 VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y a_593_13760# VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X303 VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y a_2392_13760# VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X304 VSSA a_1225_12852# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_PAD_VPMP_H VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X305 a_2162_14426# a_689_12820# a_2982_13760# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X306 a_8871_10272# VCCD a_9350_10698# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X307 a_926_9778# a_282_14802# a_1079_9778# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X308 VDDIO_Q a_178_9778# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X309 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_8765_11461# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X310 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A a_11080_13064# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X311 a_12006_13064# a_7367_11461# a_11850_13064# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X312 a_1024_12357# a_689_12820# a_2159_13760# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X313 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X314 VSSD a_11523_13190# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X315 a_10705_12016# a_643_12102# a_10705_11860# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X316 a_6543_11435# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X317 a_3462_14827# a_787_17182# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X318 a_2250_17651# a_7173_10183# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X319 a_2749_13760# VCCD a_2982_13760# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X320 VCCD a_8067_11435# a_6543_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X321 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X322 a_342_11805# ENABLE_VSWITCH_H VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X323 a_6367_11435# a_6543_11435# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X324 a_387_12076# a_231_9686# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X325 a_13902_2778# a_14092_2778# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X326 a_593_13378# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y VSSA VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X327 VSSA sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A a_421_13760# VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X328 VCCD a_6543_11435# a_6367_11435# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X329 VSWITCH a_324_12852# a_1225_12852# VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X330 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_PAD_VDDIOQ_H_N a_178_9778# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X331 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_3642_14801# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X332 a_14397_2496# VCCD a_13902_2778# VSSD sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X333 VDDIO_Q a_7173_10183# a_2250_17651# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X334 VDDIO_Q a_7173_10183# a_2250_17651# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X335 a_13902_2778# sky130_fd_io__gpiov2_ctl_0/sky130_fd_io__com_ctl_hldv2_0/HLD_I_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X336 VSWITCH a_1225_12852# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X337 a_10705_11860# a_4259_12681# a_10705_11704# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X338 a_1077_11842# a_231_9686# a_3218_11709# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X339 a_387_12076# a_1024_12357# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X340 VSSD a_14092_2778# a_282_14802# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X341 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A a_11523_13190# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X342 VSSD sky130_fd_io__gpiov2_ctl_0/HLD_I_H_N a_13970_2496# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X343 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A a_11523_13190# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X344 a_7367_11461# a_7015_11461# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X345 a_421_13378# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A VSSA VSSA sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X346 a_13970_2496# sky130_fd_io__gpiov2_ctl_0/HLD_I_H_N VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X347 a_11131_11430# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X348 a_12897_12016# a_643_12102# a_12897_11860# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X349 a_195_17182# ENABLE_VDDA_H VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X350 a_2250_17651# a_7173_10183# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X351 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H a_9877_11799# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X352 VCCD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y a_7621_13247# VCCD sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.26e+06u l=150000u X353 a_382_14828# a_282_14802# a_229_14828# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X354 VSSD sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_PAD_VDDIOQ_H_N a_8938_11461# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X355 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_8/ROUT a_7015_11461# w_9674_16869# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X356 VSWITCH a_1225_14186# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X357 a_3462_14827# a_3642_14801# a_620_18182# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X358 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X359 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X360 a_8011_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X361 VDDIO_Q a_10406_10767# a_7173_10183# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X362 a_620_18182# a_3642_14801# a_3462_14827# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X363 VSSIO_Q a_387_12076# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X364 a_7539_11435# a_8300_11461# a_9406_11799# VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X365 a_282_14802# a_14092_2778# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X366 a_2392_13760# VCCD a_2159_13760# VSSA sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X367 a_12897_11860# a_4259_12681# a_12897_11704# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X368 a_10940_10272# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y VSSD VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X369 VSSA a_1077_11842# a_377_12820# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X370 a_2250_17651# a_7173_10183# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X371 a_4259_12681# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/NG_PAD_VPMP_H VSWITCH VSWITCH sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X372 VDDA a_184_17734# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X373 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT a_2250_17651# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X374 a_3218_11709# a_282_14802# a_1024_11940# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X375 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N a_184_17734# VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X376 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_4/ROUT a_387_12076# VSSIO_Q VSSIO_Q sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X377 VDDIO_Q a_2250_17651# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__res75only_small_5/ROUT VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+07u l=500000u X378 a_231_9686# a_13902_2778# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X379 a_1024_11940# a_282_14802# a_3218_11709# VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X380 sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/NG_AMX_VPMP_H a_1225_12852# VSSA VSSA sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=600000u X381 a_8300_11461# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_0/PG_AMX_VDDA_H_N VCCD VCCD sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X382 a_10583_10272# sky130_fd_io__gpiov2_amux_0/sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y VSSD VSSD sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_ef_io__gpiov2_pad ANALOG_EN ANALOG_POL ANALOG_SEL DM[2] DM[1] DM[0] + ENABLE_H ENABLE_INP_H ENABLE_VDDA_H ENABLE_VDDIO ENABLE_VSWITCH_H HLD_H_N HLD_OVR + IB_MODE_SEL IN IN_H INP_DIS OE_N OUT PAD_A_ESD_0_H PAD_A_ESD_1_H PAD_A_NOESD_H SLOW + TIE_HI_ESD TIE_LO_ESD VCCHIB VDDA VSSIO_Q VTRIP_SEL VCCD VDDIO VDDIO_uq6 VSWITCH + VDDIO_Q w_9674_16462# w_12765_14348# w_9674_14246# w_12765_16462# PAD AMUXBUS_A + VSSA_uq9 VSSIO VSSIO_uq4 VSSA VSSD AMUXBUS_B Xsky130_fd_io__top_gpiov2_0 VSSIO_Q PAD_A_NOESD_H ANALOG_POL ENABLE_VDDIO IN_H IN + ANALOG_EN OUT TIE_HI_ESD PAD_A_ESD_1_H DM[0] DM[1] DM[2] HLD_H_N HLD_OVR INP_DIS + ENABLE_VDDA_H VTRIP_SEL OE_N SLOW TIE_LO_ESD PAD_A_ESD_0_H ANALOG_SEL ENABLE_INP_H + ENABLE_H IB_MODE_SEL ENABLE_VSWITCH_H VSWITCH AMUXBUS_B sky130_fd_io__top_gpiov2_0/sky130_fd_io__overlay_gpiov2_m4_0/sky130_fd_io__top_gpio_pad_0/b_1500_19531# + w_9674_16462# sky130_fd_io__top_gpiov2_0/sky130_fd_io__gpiov2_amux_0/sky130_fd_io__amux_switch_1v2b_1/PG_AMX_VDDA_H_N + w_12765_16462# w_12765_14348# w_9674_14246# VSSA_uq9 VSSA PAD VDDIO_Q VSSIO_uq4 + VDDIO VSSIO VCCHIB AMUXBUS_A VDDA VDDIO_uq6 VCCD VSSD sky130_fd_io__top_gpiov2 .ends .subckt sky130_ef_io__gpiov2_pad_wrapped ANALOG_EN ANALOG_POL ANALOG_SEL DM[2] DM[1] + DM[0] ENABLE_H ENABLE_INP_H ENABLE_VDDA_H ENABLE_VDDIO ENABLE_VSWITCH_H HLD_H_N + HLD_OVR IB_MODE_SEL IN IN_H INP_DIS OE_N OUT PAD_A_ESD_0_H PAD_A_ESD_1_H PAD_A_NOESD_H + SLOW TIE_HI_ESD TIE_LO_ESD VDDA VTRIP_SEL VDDIO gpio/VDDIO AMUXBUS_B AMUXBUS_A gpio/VSSA_uq9 + w_9674_19062# VSSIO_Q PAD w_12765_19062# gpio/VSSIO_uq4 VSSIO VDDIO_Q w_12765_16948# + VSSA w_9674_16846# VSSD VCCHIB VCCD VSWITCH Xgpio ANALOG_EN ANALOG_POL ANALOG_SEL DM[2] DM[1] DM[0] ENABLE_H ENABLE_INP_H ENABLE_VDDA_H + ENABLE_VDDIO ENABLE_VSWITCH_H HLD_H_N HLD_OVR IB_MODE_SEL IN IN_H INP_DIS OE_N OUT + PAD_A_ESD_0_H PAD_A_ESD_1_H PAD_A_NOESD_H SLOW TIE_HI_ESD TIE_LO_ESD VCCHIB VDDA + VSSIO_Q VTRIP_SEL VCCD gpio/VDDIO VDDIO VSWITCH VDDIO_Q w_9674_19062# w_12765_16948# + w_9674_16846# w_12765_19062# PAD AMUXBUS_A gpio/VSSA_uq9 VSSIO gpio/VSSIO_uq4 VSSA + VSSD AMUXBUS_B sky130_ef_io__gpiov2_pad .ends .subckt sky130_fd_io__pad_esd m5_1354_20520# m4_960_20253# R0 m4_960_20253# m5_1354_20520# sky130_fd_pr__res_generic_m5 w=2.5284e+08u l=100000u .ends .subckt sky130_fd_io__com_busses_esd sky130_fd_io__com_bus_hookup_0/VCCHIB sky130_fd_io__pad_esd_0/m4_960_20253# + sky130_fd_io__pad_esd_0/m5_1354_20520# sky130_fd_io__com_bus_hookup_0/VSSD sky130_fd_io__com_bus_hookup_0/VSSA + sky130_fd_io__com_bus_hookup_0/VDDIO sky130_fd_io__com_bus_hookup_0/VSSIO sky130_fd_io__com_bus_hookup_0/AMUXBUS_A + sky130_fd_io__com_bus_hookup_0/VCCD sky130_fd_io__com_bus_hookup_0/AMUXBUS_B sky130_fd_io__com_bus_hookup_0/VDDIO_uq0 + sky130_fd_io__com_bus_hookup_0/VSSA_uq7 sky130_fd_io__com_bus_hookup_0/VSSIO_uq0 + sky130_fd_io__com_bus_hookup_0/VSSA_uq3 sky130_fd_io__com_bus_hookup_0/VSWITCH sky130_fd_io__com_bus_hookup_0/VDDA + sky130_fd_io__com_bus_hookup_0/VSSA_uq1 sky130_fd_io__com_bus_hookup_0/VDDIO_Q sky130_fd_io__com_bus_hookup_0/VSSIO_Q Xsky130_fd_io__pad_esd_0 sky130_fd_io__pad_esd_0/m5_1354_20520# sky130_fd_io__pad_esd_0/m4_960_20253# + sky130_fd_io__pad_esd .ends .subckt sky130_fd_io__top_power_lvc_wpad VSSA VSSIO_Q VCCHIB VDDA P_PAD OGC_LVC VSSIO_uq6 + VSWITCH VDDIO_Q AMUXBUS_B P_CORE VSSIO DRN_LVC2 DRN_LVC1 VSSA_uq9 SRC_BDY_LVC2 SRC_BDY_LVC1 + VDDIO_uq6 BDY2_B2B VDDIO VSSD VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD Xsky130_fd_io__com_busses_esd_0 VCCHIB P_CORE P_PAD VSSD VSSA_uq8 VDDIO_uq6 VSSIO_uq6 + AMUXBUS_A VCCD AMUXBUS_B VDDIO VSSA_uq9 VSSIO VSSA_uq6 VSWITCH VDDA VSSA VDDIO_Q + VSSIO_Q sky130_fd_io__com_busses_esd X0 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X1 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X2 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X3 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X4 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X5 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X6 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X7 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X8 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X9 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X10 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X11 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X12 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X13 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X14 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X15 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X16 SRC_BDY_LVC2 a_2595_15129# a_2872_5340# SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X17 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X18 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X19 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X20 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X21 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X22 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R0 DRN_LVC1 a_414_306# sky130_fd_pr__res_generic_po w=330000u l=1.95e+09u X23 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X24 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X25 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X26 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X27 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X28 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X29 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X30 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X31 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X32 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X33 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X34 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X35 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X36 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X37 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X38 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X39 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X40 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R1 a_2183_16816# a_2595_15129# sky130_fd_pr__res_generic_po w=330000u l=2e+08u X41 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X42 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X43 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X44 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X45 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X46 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X47 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X48 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X49 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X50 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X51 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X52 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X53 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R2 a_1871_4484# a_13955_3836# sky130_fd_pr__res_generic_po w=330000u l=3e+08u X54 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X55 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X56 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X57 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X58 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X59 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X60 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X61 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X62 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X63 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X64 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X65 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X66 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X67 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X68 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X69 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X70 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X71 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X72 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X73 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X74 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X75 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X76 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X77 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X78 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X79 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D0 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X80 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X81 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X82 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X83 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X84 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X85 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X86 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X87 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D1 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X88 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X89 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X90 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X91 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X92 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X93 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X94 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X95 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X96 SRC_BDY_LVC1 a_414_306# a_450_404# SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X97 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X98 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X99 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X100 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X101 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X102 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X103 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X104 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X105 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X106 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X107 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X108 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X109 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X110 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X111 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X112 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X113 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X114 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X115 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X116 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X117 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X118 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X119 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X120 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X121 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X122 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X123 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X124 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X125 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X126 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X127 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X128 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X129 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X130 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X131 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X132 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X133 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X134 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X135 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X136 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X137 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X138 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X139 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X140 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X141 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X142 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X143 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X144 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X145 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X146 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X147 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X148 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X149 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X150 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X151 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X152 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X153 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X154 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X155 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X156 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X157 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X158 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D2 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X159 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X160 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X161 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X162 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X163 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X164 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X165 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X166 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X167 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X168 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X169 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X170 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X171 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X172 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X173 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X174 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X175 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X176 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X177 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X178 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X179 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X180 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X181 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X182 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X183 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X184 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X185 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X186 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X187 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X188 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X189 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X190 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X191 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X192 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X193 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X194 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X195 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X196 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D3 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X197 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X198 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X199 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X200 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X201 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X202 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X203 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X204 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X205 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X206 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X207 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X208 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X209 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X210 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X211 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R3 a_13955_3836# DRN_LVC2 sky130_fd_pr__res_generic_po w=330000u l=9e+08u X212 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X213 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X214 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R4 a_2183_16816# a_1871_4484# sky130_fd_pr__res_generic_po w=330000u l=7.2e+08u X215 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X216 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X217 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X218 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X219 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X220 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X221 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X222 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X223 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X224 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X225 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X226 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X227 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X228 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X229 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X230 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X231 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X232 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X233 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X234 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X235 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X236 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X237 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X238 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X239 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X240 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X241 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X242 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X243 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X244 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X245 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X246 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X247 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X248 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X249 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X250 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X251 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X252 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X253 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X254 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X255 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X256 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X257 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X258 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X259 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X260 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X261 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X262 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X263 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X264 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D4 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X265 SRC_BDY_LVC2 a_2595_15129# a_2872_5340# SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X266 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X267 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X268 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X269 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X270 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X271 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X272 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X273 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X274 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X275 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X276 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X277 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X278 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X279 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X280 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X281 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X282 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X283 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X284 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X285 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X286 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X287 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X288 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X289 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X290 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X291 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X292 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X293 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X294 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X295 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X296 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X297 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X298 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X299 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X300 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X301 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X302 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X303 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X304 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X305 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D5 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X306 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X307 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X308 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X309 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X310 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X311 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X312 SRC_BDY_LVC1 a_414_306# a_450_404# SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X313 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X314 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X315 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X316 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X317 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X318 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X319 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X320 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X321 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X322 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X323 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X324 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X325 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X326 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X327 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X328 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X329 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X330 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X331 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X332 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X333 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X334 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X335 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X336 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X337 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X338 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X339 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D6 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X340 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X341 SRC_BDY_LVC1 a_414_306# a_450_404# SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X342 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X343 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X344 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X345 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X346 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X347 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X348 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X349 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X350 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X351 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X352 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X353 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X354 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X355 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X356 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X357 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X358 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X359 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X360 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X361 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X362 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X363 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X364 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X365 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X366 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X367 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X368 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X369 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X370 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X371 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X372 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X373 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X374 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X375 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X376 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X377 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X378 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X379 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X380 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X381 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X382 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X383 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X384 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X385 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X386 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X387 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X388 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X389 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X390 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X391 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X392 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X393 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X394 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X395 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X396 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D7 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X397 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X398 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X399 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X400 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X401 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X402 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X403 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X404 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X405 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X406 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X407 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X408 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X409 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X410 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X411 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X412 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X413 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X414 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X415 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X416 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X417 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X418 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X419 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X420 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X421 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X422 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X423 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X424 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X425 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X426 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X427 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X428 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X429 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X430 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X431 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=4e+06u X432 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X433 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X434 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X435 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X436 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X437 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X438 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X439 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X440 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X441 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X442 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X443 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X444 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X445 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X446 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X447 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X448 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X449 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X450 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X451 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X452 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u .ends .subckt sky130_ef_io__vccd_lvc_clamped_pad VDDA VCCHIB VSSIO VSSIO_Q VCCD VDDIO VDDIO_uq6 + VSWITCH VSSA_uq8 VSSA_uq6 VSSA_uq9 VDDIO_Q AMUXBUS_B AMUXBUS_A VSSIO_uq4 VSSD VSSA + VCCD_PAD Xsky130_fd_io__top_power_lvc_wpad_0 VSSA VSSIO_Q VCCHIB VDDA VCCD_PAD VSSA VSSIO_uq4 + VSWITCH VDDIO_Q AMUXBUS_B VCCD VSSIO VCCD VCCD VSSA_uq9 VSSD VSSIO_uq4 VDDIO_uq6 + VSSA VDDIO VSSD VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD sky130_fd_io__top_power_lvc_wpad .ends .subckt constant_block one vccd zero vssd Xconst_zero_buf const_source/LO zero vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 Xconst_source const_source/LO const_source/HI vccd vssd vssd vccd sky130_fd_sc_hd__conb_1 Xconst_one_buf const_source/HI one vssd vccd vssd vccd sky130_fd_sc_hd__buf_16 .ends .subckt sky130_fd_io__sio_clamp_pcap_4x5 a_36_36# a_229_118# X0 a_36_36# a_229_118# a_36_36# a_36_36# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=4e+06u .ends .subckt sky130_fd_io__esd_rcclamp_nfetcap a_179_100# a_n14_18# X0 a_n14_18# a_179_100# a_n14_18# a_n14_18# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u .ends .subckt sky130_fd_io__hvc_clampv2 m2_5179_0# w_1040_5785# m3_10082_12712# sky130_fd_io__com_busses_esd_0/sky130_fd_io__pad_esd_0/m5_1354_20520# + m3_103_12712# sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_uq0 + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_Q sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_B + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_Q w_2676_441# + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA_uq7 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA_uq1 + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCHIB + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDA + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_uq0 m3_99_0# + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSD sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSWITCH + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA_uq3 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_A sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCD Xsky130_fd_io__sio_clamp_pcap_4x5_0[0] w_2676_441# a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__sio_clamp_pcap_4x5_0[1] w_2676_441# a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__sio_clamp_pcap_4x5_0[2] w_2676_441# a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__com_busses_esd_0 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCHIB + m3_99_0# sky130_fd_io__com_busses_esd_0/sky130_fd_io__pad_esd_0/m5_1354_20520# sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSD + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_A + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCD sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_B + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_uq0 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA_uq7 + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_uq0 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA_uq3 + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSWITCH sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDA + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA_uq1 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_Q + sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_Q sky130_fd_io__com_busses_esd Xsky130_fd_io__sio_clamp_pcap_4x5_1 w_2676_441# a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|0] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|0] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|0] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|1] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|1] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|1] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|2] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|2] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|2] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|3] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|3] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|3] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|4] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|4] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|4] a_1268_5934# w_2676_441# sky130_fd_io__esd_rcclamp_nfetcap X0 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X1 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X2 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X3 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X4 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X5 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X6 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X7 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X8 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X9 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X10 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X11 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X12 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X13 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X14 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X15 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X16 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X17 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X18 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X19 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X20 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X21 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X22 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X23 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X24 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X25 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X26 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X27 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X28 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X29 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X30 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X31 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X32 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X33 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X34 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X35 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X36 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X37 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X38 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X39 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X40 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X41 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X42 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X43 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X44 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X45 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X46 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X47 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X48 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X49 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X50 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X51 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X52 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X53 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X54 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X55 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X56 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X57 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X58 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X59 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X60 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X61 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X62 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X63 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X64 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X65 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X66 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X67 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X68 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X69 w_2676_441# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=4e+06u X70 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X71 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X72 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X73 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X74 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X75 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X76 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X77 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X78 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X79 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X80 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X81 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u R0 a_1672_8570# a_1268_5934# sky130_fd_pr__res_generic_po w=330000u l=4.7e+08u X82 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X83 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X84 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X85 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X86 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X87 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X88 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X89 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X90 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X91 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X92 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X93 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X94 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X95 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X96 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X97 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X98 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X99 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X100 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X101 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X102 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X103 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X104 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X105 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X106 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X107 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X108 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X109 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X110 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X111 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X112 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X113 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X114 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X115 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X116 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X117 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X118 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X119 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X120 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X121 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X122 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X123 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X124 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X125 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X126 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X127 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u R1 m3_99_0# m3_103_12712# sky130_fd_pr__res_generic_m3 w=1.2125e+07u l=10000u X128 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X129 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X130 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X131 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X132 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u R2 a_214_8570# w_1040_5785# sky130_fd_pr__res_generic_po w=330000u l=7e+08u X133 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X134 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X135 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X136 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X137 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X138 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X139 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X140 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X141 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X142 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X143 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X144 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X145 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X146 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X147 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X148 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X149 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X150 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X151 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R3 a_214_8570# a_1672_8570# sky130_fd_pr__res_generic_po w=330000u l=1.55e+09u X152 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X153 w_2676_441# a_1268_5934# a_1368_5960# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X154 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X155 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X156 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X157 a_1368_5960# a_1268_5934# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X158 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X159 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X160 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X161 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X162 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X163 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X164 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X165 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X166 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X167 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X168 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X169 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X170 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u R4 m3_99_0# m3_10082_12712# sky130_fd_pr__res_generic_m3 w=1.2125e+07u l=10000u X171 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X172 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X173 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X174 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X175 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X176 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X177 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X178 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X179 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X180 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X181 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X182 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X183 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X184 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X185 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X186 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X187 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X188 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X189 w_1040_5785# a_1268_5934# a_1368_5960# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X190 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X191 a_1368_5960# a_1268_5934# w_1040_5785# w_1040_5785# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X192 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X193 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X194 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X195 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X196 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X197 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X198 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X199 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X200 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X201 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X202 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X203 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X204 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X205 w_1040_5785# a_1368_5960# w_2676_441# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X206 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X207 w_2676_441# a_1368_5960# w_1040_5785# w_2676_441# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u .ends .subckt sky130_fd_io__top_power_hvc_wpadv2 PADISOR PADISOL SRC_BDY_HVC OGC_HVC VSSA + VSSIO_Q P_PAD VDDIO_Q AMUXBUS_B P_CORE DRN_HVC sky130_fd_io__hvc_clampv2_0/m3_103_12712# + sky130_fd_io__hvc_clampv2_0/m3_10082_12712# VSSA_uq9 VSSIO VCCHIB VDDIO_uq6 VSSA_uq8 + VDDA VCCD VSWITCH VSSA_uq6 VDDIO VSSD AMUXBUS_A VSSIO_uq6 Xsky130_fd_io__hvc_clampv2_0 OGC_HVC DRN_HVC sky130_fd_io__hvc_clampv2_0/m3_10082_12712# + P_PAD sky130_fd_io__hvc_clampv2_0/m3_103_12712# VSSIO VDDIO_Q AMUXBUS_B VSSIO_Q + SRC_BDY_HVC VSSA_uq9 VSSA VDDIO_uq6 VCCHIB VSSIO_uq6 VDDA VDDIO P_CORE VSSD VSWITCH + VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD sky130_fd_io__hvc_clampv2 .ends .subckt sky130_ef_io__vddio_hvc_clamped_pad VDDIO_PAD VSSA VDDA VCCHIB VSSD VSSIO_Q + VCCD VDDIO VSWITCH VSSA_uq8 VSSA_uq6 VSSA_uq9 VDDIO_Q AMUXBUS_B AMUXBUS_A VSSIO Xsky130_fd_io__top_power_hvc_wpadv2_0 VDDIO_Q VDDIO_Q VSSIO VDDIO VSSA VSSIO_Q VDDIO_PAD + VDDIO_Q AMUXBUS_B VDDIO VDDIO VDDIO_Q VDDIO_Q VSSA_uq9 VSSIO VCCHIB VDDIO VSSA_uq8 + VDDA VCCD VSWITCH VSSA_uq6 VDDIO VSSD AMUXBUS_A VSSIO sky130_fd_io__top_power_hvc_wpadv2 .ends .subckt sky130_fd_io__top_ground_hvc_wpad G_PAD VSSA VCCHIB VDDA VSSIO_Q PADISOR PADISOL + OGC_HVC G_CORE VSSIO_uq6 VSWITCH VDDIO_Q AMUXBUS_B DRN_HVC VSSIO VSSA_uq9 VDDIO_uq6 + VDDIO VSSD VSSA_uq6 VSSA_uq8 SRC_BDY_HVC AMUXBUS_A VCCD Xsky130_fd_io__sio_clamp_pcap_4x5_0 SRC_BDY_HVC a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__com_busses_esd_0 VCCHIB G_CORE G_PAD VSSD VSSA_uq8 VDDIO_uq6 VSSIO_uq6 + AMUXBUS_A VCCD AMUXBUS_B VDDIO VSSA_uq9 VSSIO VSSA_uq6 VSWITCH VDDA VSSA VDDIO_Q + VSSIO_Q sky130_fd_io__com_busses_esd Xsky130_fd_io__sio_clamp_pcap_4x5_1[0] SRC_BDY_HVC a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__sio_clamp_pcap_4x5_1[1] SRC_BDY_HVC a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__sio_clamp_pcap_4x5_1[2] SRC_BDY_HVC a_1268_5934# sky130_fd_io__sio_clamp_pcap_4x5 Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|0] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|0] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|0] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|1] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|1] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|1] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|2] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|2] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|2] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|3] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|3] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|3] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[0|4] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[1|4] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap Xsky130_fd_io__esd_rcclamp_nfetcap_0[2|4] a_1268_5934# SRC_BDY_HVC sky130_fd_io__esd_rcclamp_nfetcap X0 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X1 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X2 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X3 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X4 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X5 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X6 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X7 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X8 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X9 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X10 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X11 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X12 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X13 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X14 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X15 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X16 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X17 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X18 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X19 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X20 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X21 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X22 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X23 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X24 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X25 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X26 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X27 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X28 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X29 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X30 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X31 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X32 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X33 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X34 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X35 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X36 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X37 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X38 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X39 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X40 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X41 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X42 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X43 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X44 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X45 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X46 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X47 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X48 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X49 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X50 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X51 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X52 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X53 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u R0 G_CORE PADISOL sky130_fd_pr__res_generic_m3 w=1.1825e+07u l=10000u X54 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X55 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X56 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X57 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X58 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X59 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X60 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X61 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X62 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X63 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X64 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X65 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X66 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X67 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X68 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X69 SRC_BDY_HVC a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=4e+06u X70 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X71 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X72 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X73 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X74 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X75 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X76 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X77 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X78 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X79 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X80 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X81 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X82 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X83 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X84 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X85 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X86 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X87 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X88 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X89 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X90 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X91 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X92 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X93 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X94 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X95 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X96 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X97 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X98 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X99 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u R1 G_CORE PADISOR sky130_fd_pr__res_generic_m3 w=1.1825e+07u l=10000u X100 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X101 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X102 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X103 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X104 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X105 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X106 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X107 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X108 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X109 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X110 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X111 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X112 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X113 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X114 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X115 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X116 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X117 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X118 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X119 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X120 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X121 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X122 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X123 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X124 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X125 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X126 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X127 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X128 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X129 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X130 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X131 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X132 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u R2 a_214_8638# DRN_HVC sky130_fd_pr__res_generic_po w=330000u l=7e+08u X133 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X134 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X135 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X136 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X137 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X138 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X139 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X140 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X141 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X142 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X143 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X144 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X145 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X146 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X147 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X148 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X149 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X150 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X151 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R3 a_214_8638# a_1672_8638# sky130_fd_pr__res_generic_po w=330000u l=1.55e+09u X152 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X153 SRC_BDY_HVC a_1268_5934# a_1368_5960# SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X154 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X155 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X156 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X157 a_1368_5960# a_1268_5934# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X158 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u R4 a_1672_8638# a_1268_5934# sky130_fd_pr__res_generic_po w=330000u l=4.7e+08u X159 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X160 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X161 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X162 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X163 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X164 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X165 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X166 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X167 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X168 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X169 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X170 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X171 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X172 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X173 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X174 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X175 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X176 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X177 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X178 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X179 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X180 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X181 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X182 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X183 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X184 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X185 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X186 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X187 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X188 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X189 DRN_HVC a_1268_5934# a_1368_5960# DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X190 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X191 a_1368_5960# a_1268_5934# DRN_HVC DRN_HVC sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=500000u X192 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X193 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X194 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X195 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X196 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X197 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X198 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X199 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X200 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X201 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X202 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X203 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X204 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X205 DRN_HVC a_1368_5960# SRC_BDY_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=500000u X206 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u X207 SRC_BDY_HVC a_1368_5960# DRN_HVC SRC_BDY_HVC sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+07u l=500000u .ends .subckt sky130_ef_io__vssio_hvc_clamped_pad VSSA VDDA VCCHIB VSSD VSSIO_Q VCCD VDDIO + VSSIO VSWITCH VSSA_uq8 VSSA_uq6 VSSA_uq9 VDDIO_Q AMUXBUS_B AMUXBUS_A VSSIO_PAD Xsky130_fd_io__top_ground_hvc_wpad_0 VSSIO_PAD VSSA VCCHIB VDDA VSSIO_Q VSSIO_Q VSSIO_Q + VDDIO VSSIO VSSIO VSWITCH VDDIO_Q AMUXBUS_B VDDIO VSSIO VSSA_uq9 VDDIO VDDIO VSSD + VSSA_uq6 VSSA_uq8 VSSIO AMUXBUS_A VCCD sky130_fd_io__top_ground_hvc_wpad .ends .subckt sky130_ef_io__vdda_hvc_clamped_pad VDDA VCCHIB VSSIO VSSD VSSIO_Q VCCD VDDIO + VDDIO_uq6 VSWITCH VSSA_uq8 VSSA_uq6 VSSA_uq9 VDDIO_Q AMUXBUS_B AMUXBUS_A VDDA_PAD + VSSIO_uq4 VSSA Xsky130_fd_io__top_power_hvc_wpadv2_0 sky130_fd_io__top_power_hvc_wpadv2_0/PADISOR + sky130_fd_io__top_power_hvc_wpadv2_0/PADISOL VSSA VDDIO VSSA VSSIO_Q VDDA_PAD VDDIO_Q + AMUXBUS_B VDDA VDDA sky130_fd_io__top_power_hvc_wpadv2_0/sky130_fd_io__hvc_clampv2_0/m3_103_12712# + sky130_fd_io__top_power_hvc_wpadv2_0/sky130_fd_io__hvc_clampv2_0/m3_10082_12712# + VSSA_uq9 VSSIO VCCHIB VDDIO_uq6 VSSA_uq8 VDDA VCCD VSWITCH VSSA_uq6 VDDIO VSSD AMUXBUS_A + VSSIO_uq4 sky130_fd_io__top_power_hvc_wpadv2 .ends .subckt sky130_fd_io__top_ground_lvc_wpad VSSA VSSIO_Q VCCHIB VDDA G_PAD G_CORE OGC_LVC + VSSIO_uq6 VSWITCH VDDIO_Q AMUXBUS_B VSSIO DRN_LVC2 DRN_LVC1 VSSA_uq9 SRC_BDY_LVC2 + SRC_BDY_LVC1 VDDIO_uq6 BDY2_B2B VDDIO VSSD VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD Xsky130_fd_io__com_busses_esd_0 VCCHIB G_CORE G_PAD VSSD VSSA_uq8 VDDIO_uq6 VSSIO_uq6 + AMUXBUS_A VCCD AMUXBUS_B VDDIO VSSA_uq9 VSSIO VSSA_uq6 VSWITCH VDDA VSSA VDDIO_Q + VSSIO_Q sky130_fd_io__com_busses_esd X0 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X1 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X2 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X3 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X4 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X5 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X6 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X7 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X8 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X9 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X10 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X11 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X12 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X13 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X14 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X15 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X16 SRC_BDY_LVC2 a_2595_15129# a_2872_5340# SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X17 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X18 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X19 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X20 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X21 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X22 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R0 DRN_LVC1 a_414_306# sky130_fd_pr__res_generic_po w=330000u l=1.95e+09u X23 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X24 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X25 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X26 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X27 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X28 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X29 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X30 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X31 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X32 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X33 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X34 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X35 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X36 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X37 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X38 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X39 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X40 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R1 a_2183_16816# a_2595_15129# sky130_fd_pr__res_generic_po w=330000u l=2e+08u X41 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X42 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X43 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X44 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X45 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X46 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X47 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X48 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X49 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X50 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X51 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X52 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X53 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R2 a_1871_4484# a_13955_3836# sky130_fd_pr__res_generic_po w=330000u l=3e+08u X54 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X55 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X56 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X57 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X58 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X59 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X60 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X61 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X62 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X63 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X64 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X65 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X66 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X67 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X68 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X69 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X70 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X71 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X72 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X73 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X74 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X75 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X76 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X77 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X78 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X79 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D0 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X80 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X81 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X82 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X83 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X84 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X85 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X86 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X87 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D1 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X88 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X89 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X90 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X91 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X92 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X93 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X94 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X95 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X96 SRC_BDY_LVC1 a_414_306# a_450_404# SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X97 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X98 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X99 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X100 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X101 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X102 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X103 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X104 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X105 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X106 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X107 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X108 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X109 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X110 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X111 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X112 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X113 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X114 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X115 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X116 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X117 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X118 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X119 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X120 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X121 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X122 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X123 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X124 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X125 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X126 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X127 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X128 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X129 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X130 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X131 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X132 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X133 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X134 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X135 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X136 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X137 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X138 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X139 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X140 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X141 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X142 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X143 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X144 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X145 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X146 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X147 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X148 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X149 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X150 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X151 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X152 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X153 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X154 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X155 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X156 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X157 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X158 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D2 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X159 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X160 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X161 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X162 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X163 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X164 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X165 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X166 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X167 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X168 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X169 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X170 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X171 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X172 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X173 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X174 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X175 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X176 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X177 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X178 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X179 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X180 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X181 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X182 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X183 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X184 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X185 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X186 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X187 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X188 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X189 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X190 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X191 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X192 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X193 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X194 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X195 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X196 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D3 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X197 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X198 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X199 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X200 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X201 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X202 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X203 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X204 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X205 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X206 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X207 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X208 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X209 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X210 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X211 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R3 a_13955_3836# DRN_LVC2 sky130_fd_pr__res_generic_po w=330000u l=9e+08u X212 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X213 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X214 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u R4 a_2183_16816# a_1871_4484# sky130_fd_pr__res_generic_po w=330000u l=7.2e+08u X215 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X216 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X217 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X218 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X219 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X220 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X221 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X222 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X223 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X224 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X225 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X226 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X227 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X228 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X229 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X230 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X231 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X232 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X233 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X234 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X235 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X236 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X237 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X238 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X239 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X240 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X241 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X242 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X243 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X244 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X245 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X246 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X247 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X248 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X249 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X250 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X251 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X252 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X253 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X254 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X255 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X256 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X257 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X258 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X259 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X260 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X261 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X262 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X263 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X264 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D4 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X265 SRC_BDY_LVC2 a_2595_15129# a_2872_5340# SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X266 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X267 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X268 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X269 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X270 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X271 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X272 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X273 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X274 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X275 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X276 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X277 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X278 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X279 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X280 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X281 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X282 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X283 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X284 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X285 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X286 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X287 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X288 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X289 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X290 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X291 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X292 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X293 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X294 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X295 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X296 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X297 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X298 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X299 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X300 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X301 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X302 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X303 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X304 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X305 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D5 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X306 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X307 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X308 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X309 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X310 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X311 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X312 SRC_BDY_LVC1 a_414_306# a_450_404# SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X313 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X314 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X315 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X316 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X317 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X318 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X319 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X320 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X321 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X322 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X323 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X324 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X325 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X326 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X327 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X328 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X329 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X330 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X331 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X332 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X333 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X334 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X335 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X336 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X337 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X338 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X339 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D6 SRC_BDY_LVC1 BDY2_B2B sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X340 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X341 SRC_BDY_LVC1 a_414_306# a_450_404# SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X342 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X343 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X344 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X345 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X346 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X347 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X348 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X349 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X350 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X351 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X352 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X353 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X354 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X355 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X356 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X357 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X358 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X359 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X360 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X361 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X362 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X363 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X364 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X365 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X366 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X367 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X368 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X369 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X370 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X371 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X372 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X373 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X374 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X375 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X376 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X377 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X378 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X379 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X380 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X381 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X382 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X383 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X384 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X385 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X386 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X387 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X388 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X389 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X390 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X391 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X392 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X393 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X394 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X395 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X396 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u D7 BDY2_B2B SRC_BDY_LVC1 sky130_fd_pr__diode_pd2nw_05v5 pj=3.3e+07 area=2.25e+13 X397 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X398 a_450_404# a_414_306# DRN_LVC1 DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X399 a_2872_5340# a_2595_15129# DRN_LVC2 DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X400 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X401 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X402 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X403 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X404 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X405 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X406 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X407 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X408 SRC_BDY_LVC1 a_414_306# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=8e+06u X409 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X410 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X411 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X412 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X413 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=8e+06u X414 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X415 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X416 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X417 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X418 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X419 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X420 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X421 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X422 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X423 DRN_LVC1 a_414_306# a_450_404# DRN_LVC1 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X424 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X425 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X426 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X427 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X428 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X429 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X430 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X431 SRC_BDY_LVC2 a_2595_15129# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=4e+06u X432 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X433 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X434 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X435 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X436 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X437 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X438 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X439 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X440 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X441 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X442 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X443 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X444 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X445 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X446 SRC_BDY_LVC2 a_2872_5340# DRN_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X447 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X448 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X449 DRN_LVC2 a_2595_15129# a_2872_5340# DRN_LVC2 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X450 DRN_LVC2 a_2872_5340# SRC_BDY_LVC2 SRC_BDY_LVC2 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=5e+06u l=180000u X451 SRC_BDY_LVC1 a_450_404# DRN_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u X452 DRN_LVC1 a_450_404# SRC_BDY_LVC1 SRC_BDY_LVC1 sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=7e+06u l=180000u .ends .subckt sky130_ef_io__vssd_lvc_clamped3_pad VSSA VDDA VCCHIB VSSD VSSIO_Q VCCD1 VCCD + VDDIO VDDIO_uq6 VSWITCH VSSA_uq8 VSSA_uq6 VDDIO_Q AMUXBUS_B AMUXBUS_A VSSA_uq9 VSSD_PAD + VSSIO VSSD1 Xsky130_fd_io__top_ground_lvc_wpad_0 VSSA VSSIO_Q VCCHIB VDDA VSSD_PAD VSSD1 VSSIO + VSSIO VSWITCH VDDIO_Q AMUXBUS_B VSSIO VCCD1 VCCD1 VSSA_uq9 VSSD1 VSSD1 VDDIO_uq6 + VSSIO VDDIO VSSD VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD sky130_fd_io__top_ground_lvc_wpad .ends .subckt sky130_ef_io__vssd_lvc_clamped_pad VDDA VCCHIB VSSIO VSSIO_Q VCCD VDDIO VDDIO_uq6 + VSWITCH VSSA_uq8 VSSA_uq6 VSSA_uq9 VDDIO_Q AMUXBUS_B AMUXBUS_A VSSD_PAD VSSA VSSD + VSSIO_uq4 Xsky130_fd_io__top_ground_lvc_wpad_0 VSSA VSSIO_Q VCCHIB VDDA VSSD_PAD VSSD VSSA VSSIO_uq4 + VSWITCH VDDIO_Q AMUXBUS_B VSSIO VCCD VCCD VSSA_uq9 VSSD VSSIO_uq4 VDDIO_uq6 VSSA + VDDIO VSSD VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD sky130_fd_io__top_ground_lvc_wpad .ends .subckt sky130_ef_io__vccd_lvc_clamped3_pad VSSA VDDA VCCHIB VSSD VSSIO_Q VSSD1 VCCD + VDDIO VDDIO_uq6 VSWITCH VSSA_uq8 VSSA_uq6 VSSA_uq9 VDDIO_Q AMUXBUS_B AMUXBUS_A VCCD1 + VSSIO VCCD_PAD Xsky130_fd_io__top_power_lvc_wpad_0 VSSA VSSIO_Q VCCHIB VDDA VCCD_PAD VSSIO VSSIO + VSWITCH VDDIO_Q AMUXBUS_B VCCD1 VSSIO VCCD1 VCCD1 VSSA_uq9 VSSD1 VSSD1 VDDIO_uq6 + VSSIO VDDIO VSSD VSSA_uq6 VSSA_uq8 AMUXBUS_A VCCD sky130_fd_io__top_power_lvc_wpad .ends .subckt sky130_ef_io__vssa_hvc_clamped_pad VSSA VDDA VCCHIB VSSIO VSSD VSSIO_Q VCCD + VDDIO VDDIO_uq6 VSWITCH VDDIO_Q AMUXBUS_B AMUXBUS_A VSSIO_uq4 VSSA_PAD Xsky130_fd_io__top_ground_hvc_wpad_0 VSSA_PAD VSSA VCCHIB VDDA VSSIO_Q sky130_fd_io__top_ground_hvc_wpad_0/PADISOR + sky130_fd_io__top_ground_hvc_wpad_0/PADISOL VDDIO VSSA VSSIO_uq4 VSWITCH VDDIO_Q + AMUXBUS_B VDDA VSSIO VSSA VDDIO_uq6 VDDIO VSSD VSSA VSSA VSSA AMUXBUS_A VCCD sky130_fd_io__top_ground_hvc_wpad .ends .subckt sky130_fd_io__com_res_weak_v2 a_n281_1306# a_534_6146# R0 a_n13_3671# m1_3_3617# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R1 a_n283_2797# a_n283_3382# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R2 a_n283_2797# m1_n268_3094# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R3 a_n281_1306# m1_n268_1364# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R4 a_n13_2329# m1_3_3580# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R5 a_n13_2329# a_n13_3671# sky130_fd_pr__res_generic_po w=800000u l=6e+06u R6 a_n283_2447# a_n283_2797# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R7 m1_n268_1924# a_n283_2447# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R8 m1_n268_2513# a_n283_2797# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R9 a_n283_3382# a_n13_2329# sky130_fd_pr__res_generic_po w=800000u l=6e+06u R10 m1_2_2233# a_n13_2329# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R11 a_n281_1656# m1_n268_1924# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R12 a_n13_6243# a_534_6146# sky130_fd_pr__res_generic_po w=800000u l=5e+07u R13 a_n13_3671# a_n13_6243# sky130_fd_pr__res_generic_po w=800000u l=1.2e+07u R14 a_n283_2447# m1_n268_2513# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R15 a_n283_3382# m1_2_2233# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R16 a_n281_1656# a_n283_2447# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u R17 m1_n268_3094# a_n283_3382# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R18 m1_n268_1364# a_n281_1656# sky130_fd_pr__res_generic_m1 w=660000u l=10000u R19 a_n281_1306# a_n281_1656# sky130_fd_pr__res_generic_po w=800000u l=1.5e+06u .ends .subckt sky130_fd_io__xres4v2_in_buf IN_H VNORMAL VNORMAL_B PAD ENABLE_HV IN_H_N ENABLE_VDDIO_LV + VDDIO a_n445_2580# m2_288_2575# w_4058_2188# a_n32352_n9635# VCCHIB VGND Xsky130_fd_io__inv_1_0 VCCHIB VGND sky130_fd_io__inv_1_0/Y ENABLE_VDDIO_LV VGND VCCHIB + sky130_fd_io__inv_1 X0 a_n445_2580# sky130_fd_io__inv_1_0/Y VCCHIB VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X1 VDDIO VNORMAL a_157_2580# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X2 a_469_2037# a_n176_869# a_n232_901# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X3 a_n29280_n8739# VNORMAL_B a_n31524_n8739# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X4 a_n11573_n8777# a_111_449# VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X5 VGND a_n176_869# a_2300_3398# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X6 a_1560_2580# ENABLE_HV VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X7 VGND IN_H_N IN_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X8 VGND PAD a_n232_901# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X9 a_n232_901# a_n176_869# a_469_2037# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X10 a_2165_2545# a_n176_869# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X11 VGND a_2165_2545# a_2356_3115# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X12 VDDIO a_2356_3115# a_2300_3398# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X13 IN_H_N a_2300_3398# VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X14 a_5826_2675# ENABLE_HV VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 a_n176_869# PAD w_5030_2188# w_5030_2188# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X16 a_n16_901# a_n176_869# a_n232_901# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X17 a_1560_2580# ENABLE_HV VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X18 a_n232_901# PAD VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X19 IN_H IN_H_N VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X20 VDDIO a_5826_2675# a_111_449# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X21 IN_H_N a_2300_3398# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X22 VGND a_5826_2675# a_111_449# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X23 a_2356_3115# a_2165_2545# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X24 VDDIO a_111_449# a_n29280_n8739# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X25 VDDIO VNORMAL_B a_5826_2675# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X26 a_n176_869# PAD a_n232_901# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X27 a_n9813_4210# VNORMAL_B a_n11573_n8777# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X28 VGND VNORMAL_B a_5852_3096# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X29 a_2300_3398# a_n176_869# VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X30 w_4058_2188# a_111_449# a_n445_2580# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X31 VGND VGND VGND VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+07u l=900000u X32 a_2165_2545# a_n176_869# w_4058_2188# w_4058_2188# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X33 IN_H IN_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X34 IN_H IN_H_N VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X35 a_469_2037# a_n176_869# a_n232_901# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X36 a_n31524_n8739# a_n29280_n8739# VGND sky130_fd_pr__res_generic_nd__hv w=290000u l=1.07719e+09u X37 VDDIO IN_H_N IN_H VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X38 a_n232_901# PAD a_n176_869# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X39 a_n757_2580# a_111_449# w_5030_2188# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+07u l=900000u X40 a_n16_901# VNORMAL_B VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X41 VCCHIB sky130_fd_io__inv_1_0/Y a_n757_2580# VCCHIB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u R0 a_n11573_n8777# a_n9813_4210# sky130_fd_pr__res_generic_po w=400000u l=7.13695e+08u X42 w_5030_2188# w_5030_2188# w_5030_2188# w_5030_2188# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=800000u X43 a_n232_901# a_n176_869# a_469_2037# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=800000u X44 a_5826_2675# ENABLE_HV VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X45 VDDIO a_5826_2675# a_111_449# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X46 a_n176_869# PAD a_n31524_n8739# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X47 a_2165_2545# a_n176_869# a_n9813_4210# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X48 a_469_2037# PAD a_157_2580# VGND sky130_fd_pr__nfet_05v0_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=900000u X49 a_5852_3096# ENABLE_HV a_5826_2675# VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X50 IN_H IN_H_N VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X51 VDDIO VNORMAL_B a_5826_2675# VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X52 a_2356_3115# a_2300_3398# VDDIO VDDIO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u .ends .subckt sky130_fd_io__xres_inv_hysv2 OUT_H VSSD a_122_112# a_322_144# a_322_604# VCC_IO X0 a_578_144# a_122_112# a_322_604# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=1e+06u X1 a_322_144# OUT_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X2 a_322_144# a_122_112# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X3 a_578_144# a_122_112# a_322_144# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X4 OUT_H a_578_144# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X5 VCC_IO OUT_H a_322_604# VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u X6 OUT_H a_578_144# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=500000u X7 a_322_604# a_122_112# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=1e+06u .ends .subckt sky130_fd_io__gpio_buf_localesdv2 VTRIP_SEL_H OUT_H OUT_VT sky130_fd_io__res250only_small_0/PAD + VGND VCC_IO Xsky130_fd_io__signal_5_sym_hv_local_5term_0 VGND VCC_IO OUT_VT VCC_IO VCC_IO VGND + sky130_fd_io__signal_5_sym_hv_local_5term Xsky130_fd_io__signal_5_sym_hv_local_5term_1 VGND VCC_IO VGND OUT_VT VCC_IO VGND sky130_fd_io__signal_5_sym_hv_local_5term Xsky130_fd_io__signal_5_sym_hv_local_5term_2 VGND VCC_IO OUT_H VCC_IO VCC_IO VGND + sky130_fd_io__signal_5_sym_hv_local_5term Xsky130_fd_io__signal_5_sym_hv_local_5term_3 VGND VCC_IO VGND OUT_H VCC_IO VGND sky130_fd_io__signal_5_sym_hv_local_5term Xsky130_fd_io__res250only_small_0 sky130_fd_io__res250only_small_0/PAD OUT_H sky130_fd_io__res250only_small X0 OUT_VT VTRIP_SEL_H OUT_H VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=1e+06u .ends .subckt sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2 VCC_IO a_10282_1285# a_5322_1285# + a_8980_1457# a_7988_1457# a_2036_1457# a_13940_1457# a_12948_1457# a_12266_1285# + a_7306_1285# a_5012_1457# a_3900_1285# a_2908_1285# a_5884_1285# a_14178_1285# a_10844_1285# + a_1354_1285# a_7868_1285# a_12828_1285# a_8860_1285# a_13820_1285# a_4330_1285# + a_3338_1285# a_6996_1457# a_11956_1457# a_1044_1457# a_11274_1285# a_6314_1285# + w_469_785# a_9972_1457# a_4020_1457# a_3028_1457# a_8298_1285# a_13258_1285# a_9290_1285# + a_1916_1285# a_6004_1457# a_4892_1285# a_6876_1285# a_924_1285# a_11836_1285# a_2346_1285# + a_9852_1285# a_10964_1457# X0 w_469_785# a_5322_1285# a_5012_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 a_9972_1457# a_9852_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 w_469_785# a_11274_1285# a_10964_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X3 a_10964_1457# a_10844_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 a_6996_1457# a_6876_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 w_469_785# a_2346_1285# a_2036_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X6 a_2036_1457# a_1916_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X7 w_469_785# a_12266_1285# a_11956_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X8 w_469_785# a_6314_1285# a_6004_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X9 a_11956_1457# a_11836_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X10 w_469_785# a_9290_1285# a_8980_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X11 a_5012_1457# a_4892_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X12 w_469_785# a_10282_1285# a_9972_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X13 w_469_785# a_4330_1285# a_4020_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X14 a_4020_1457# a_3900_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X15 a_8980_1457# a_8860_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X16 w_469_785# a_3338_1285# a_3028_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X17 w_469_785# a_8298_1285# a_7988_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X18 a_1044_1457# a_924_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X19 w_469_785# a_7306_1285# a_6996_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X20 a_13940_1457# a_13820_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X21 a_3028_1457# a_2908_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X22 a_7988_1457# a_7868_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X23 w_469_785# a_13258_1285# a_12948_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X24 a_12948_1457# a_12828_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X25 w_469_785# a_14178_1285# a_13940_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X26 w_469_785# a_1354_1285# a_1044_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X27 a_6004_1457# a_5884_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X28 w_469_785# a_11274_1285# a_10964_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X29 w_469_785# a_5322_1285# a_5012_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X30 a_9972_1457# a_9852_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X31 a_10964_1457# a_10844_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X32 w_469_785# a_2346_1285# a_2036_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X33 a_6996_1457# a_6876_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X34 w_469_785# a_6314_1285# a_6004_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X35 a_2036_1457# a_1916_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X36 w_469_785# a_12266_1285# a_11956_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X37 a_11956_1457# a_11836_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X38 a_5012_1457# a_4892_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X39 w_469_785# a_4330_1285# a_4020_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X40 w_469_785# a_9290_1285# a_8980_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X41 a_8980_1457# a_8860_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X42 w_469_785# a_10282_1285# a_9972_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X43 a_1044_1457# a_924_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X44 a_4020_1457# a_3900_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X45 w_469_785# a_3338_1285# a_3028_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X46 w_469_785# a_8298_1285# a_7988_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X47 a_3028_1457# a_2908_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X48 a_7988_1457# a_7868_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X49 w_469_785# a_13258_1285# a_12948_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X50 w_469_785# a_7306_1285# a_6996_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X51 a_13940_1457# a_13820_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X52 a_12948_1457# a_12828_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X53 w_469_785# a_1354_1285# a_1044_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X54 w_469_785# a_14178_1285# a_13940_1457# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X55 a_6004_1457# a_5884_1285# w_469_785# w_469_785# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u .ends .subckt sky130_fd_io__gpio_pddrvr_strong_xres4v2 PD_H[2] PD_H[3] TIE_LO_ESD VGND_IO + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_11956_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_6996_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_1044_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_9972_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_3028_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_4020_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_6004_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_10964_1457# + w_335_3259# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_12948_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_7988_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_13940_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_8980_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_2036_1457# m1_785_3898# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_5012_1457# + VCC_IO Xsky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0 VCC_IO PD_H[3] m1_9769_3903# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_8980_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_7988_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_2036_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_13940_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_12948_1457# + m1_2697_3903# m1_7657_3903# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_5012_1457# + m1_11193_3903# m1_11193_3903# m1_8232_3903# m1_785_3898# PD_H[3] m1_12747_3903# + PD_H[2] m1_2135_3903# PD_H[2] m1_785_3898# m1_9769_3903# m1_11193_3903# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_6996_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_11956_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_1044_1457# + PD_H[3] m1_8232_3903# w_335_3259# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_9972_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_4020_1457# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_3028_1457# + PD_H[2] m1_785_3898# PD_H[3] m1_12747_3903# sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_6004_1457# + m1_9769_3903# m1_8232_3903# m1_12747_3903# PD_H[3] m1_12747_3903# PD_H[3] sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2_0/a_10964_1457# + sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2 R0 PD_H[2] m2_6804_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R1 PD_H[2] m2_12763_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R2 m1_2135_3903# m2_1848_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R3 TIE_LO_ESD m2_13622_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R4 m1_12747_3903# m2_12763_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R5 PD_H[2] m2_1260_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R6 m1_7657_3903# m2_6804_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R7 PD_H[2] m2_897_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R8 m2_13622_1100# m1_12747_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R9 m2_1260_1100# m1_2135_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R10 m1_785_3898# m2_897_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R11 TIE_LO_ESD m2_12189_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R12 PD_H[2] m2_9986_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R13 TIE_LO_ESD m2_413_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R14 PD_H[3] m2_3095_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R15 TIE_LO_ESD m2_9366_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R16 m1_11193_3903# m2_12189_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R17 m1_9769_3903# m2_9986_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R18 m2_413_1100# m1_785_3898# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R19 m1_2697_3903# m2_3095_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R20 m1_8232_3903# m2_9366_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R21 PD_H[3] m2_11758_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R22 m2_11758_1100# m1_11193_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R23 PD_H[3] m2_8935_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R24 TIE_LO_ESD m2_10846_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R25 PD_H[3] m2_656_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R26 PD_H[2] m2_11329_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R27 PD_H[3] m2_1565_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R28 TIE_LO_ESD m2_3378_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R29 m2_8935_1100# m1_8232_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R30 m1_9769_3903# m2_10846_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R31 m1_11193_3903# m2_11329_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R32 PD_H[2] m2_8506_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R33 PD_H[3] m2_10415_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R34 m1_785_3898# m2_656_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R35 TIE_LO_ESD m2_7664_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R36 m1_2135_3903# m2_1565_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R37 m1_2697_3903# m2_3378_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R38 m1_8232_3903# m2_8506_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R39 m2_10415_1100# m1_9769_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R40 m1_7657_3903# m2_7664_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R41 PD_H[3] m2_7233_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R42 PD_H[3] m2_13193_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R43 PD_H[2] m2_2790_1100# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R44 m2_7233_1100# m1_7657_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R45 m1_12747_3903# m2_13193_1400# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R46 TIE_LO_ESD VGND_IO sky130_fd_pr__res_generic_po w=500000u l=1.02e+07u R47 TIE_LO_ESD m2_1848_1099# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R48 m2_2790_1100# m1_2697_3903# sky130_fd_pr__res_generic_m2 w=650000u l=10000u .ends .subckt sky130_fd_io__tk_tie_r_out_esd A B R0 A B sky130_fd_pr__res_generic_po w=500000u l=1.02e+07u .ends .subckt sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2 w_415_600# a_4969_1552# a_2303_1380# + a_5961_1552# a_13777_1380# a_8817_1380# a_4287_1380# a_10921_1552# a_7945_1552# + a_12905_1552# a_7263_1380# a_12223_1380# a_9929_1552# a_9247_1380# a_2865_1380# + a_1993_1552# a_5841_1380# a_4849_1380# a_10801_1380# a_14135_1380# a_1311_1380# + a_3977_1552# a_12785_1380# a_7825_1380# a_3295_1380# a_6953_1552# a_9809_1380# a_11913_1552# + a_1001_1552# a_6271_1380# a_5279_1380# a_11231_1380# a_10239_1380# a_13897_1552# + a_8937_1552# a_8255_1380# a_1873_1380# a_13215_1380# a_3857_1380# a_2985_1552# a_11793_1380# + a_881_1380# a_6833_1380# X0 a_13897_1552# a_13777_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X1 a_4969_1552# a_4849_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X2 a_8937_1552# a_8817_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X3 w_415_600# a_10239_1380# a_9929_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X4 a_1993_1552# a_1873_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X5 w_415_600# a_3295_1380# a_2985_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X6 w_415_600# a_14135_1380# a_13897_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X7 a_5961_1552# a_5841_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X8 w_415_600# a_2303_1380# a_1993_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X9 w_415_600# a_7263_1380# a_6953_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X10 a_4969_1552# a_4849_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X11 w_415_600# a_11231_1380# a_10921_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X12 a_12905_1552# a_12785_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X13 w_415_600# a_10239_1380# a_9929_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X14 a_8937_1552# a_8817_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X15 w_415_600# a_3295_1380# a_2985_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X16 w_415_600# a_2303_1380# a_1993_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X17 w_415_600# a_7263_1380# a_6953_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X18 a_12905_1552# a_12785_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X19 a_3977_1552# a_3857_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X20 a_7945_1552# a_7825_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X21 w_415_600# a_13215_1380# a_12905_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X22 w_415_600# a_1311_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X23 w_415_600# a_6271_1380# a_5961_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X24 a_3977_1552# a_3857_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X25 w_415_600# a_5279_1380# a_4969_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X26 a_11913_1552# a_11793_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X27 a_7945_1552# a_7825_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X28 w_415_600# a_9247_1380# a_8937_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X29 a_10921_1552# a_10801_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X30 w_415_600# a_13215_1380# a_12905_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X31 w_415_600# a_1311_1380# a_1001_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X32 w_415_600# a_6271_1380# a_5961_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X33 a_1001_1552# a_881_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X34 a_2985_1552# a_2865_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X35 w_415_600# a_5279_1380# a_4969_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X36 a_11913_1552# a_11793_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X37 a_10921_1552# a_10801_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X38 a_6953_1552# a_6833_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X39 w_415_600# a_9247_1380# a_8937_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X40 w_415_600# a_12223_1380# a_11913_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X41 a_1001_1552# a_881_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X42 a_9929_1552# a_9809_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X43 a_2985_1552# a_2865_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X44 w_415_600# a_4287_1380# a_3977_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X45 a_6953_1552# a_6833_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X46 w_415_600# a_8255_1380# a_7945_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X47 w_415_600# a_12223_1380# a_11913_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X48 a_13897_1552# a_13777_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X49 a_9929_1552# a_9809_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X50 a_1993_1552# a_1873_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X51 w_415_600# a_4287_1380# a_3977_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X52 w_415_600# a_14135_1380# a_13897_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X53 w_415_600# a_8255_1380# a_7945_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X54 a_5961_1552# a_5841_1380# w_415_600# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u X55 w_415_600# a_11231_1380# a_10921_1552# w_415_600# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=600000u .ends .subckt sky130_fd_io__gpio_pudrvr_strong_axres4v2 PU_H_N[3] PU_H_N[2] TIE_HI_ESD sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_11913_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_8937_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_13897_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_2985_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_4969_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_5961_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_10921_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_7945_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_12905_1552# + VNB sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_9929_1552# li_11868_461# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_1993_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_3977_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/w_415_600# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_6953_1552# + a_14575_48# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_1001_1552# Xsky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0 sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/w_415_600# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_4969_1552# PU_H_N[2] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_5961_1552# + m1_14229_1478# m1_8837_1478# PU_H_N[3] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_10921_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_7945_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_12905_1552# + PU_H_N[3] m1_11745_1478# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_9929_1552# + m1_8837_1478# PU_H_N[2] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_1993_1552# + PU_H_N[3] PU_H_N[3] m1_10391_1478# m1_14229_1478# PU_H_N[2] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_3977_1552# + PU_H_N[2] PU_H_N[3] PU_H_N[2] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_6953_1552# + m1_10391_1478# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_11913_1552# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_1001_1552# + PU_H_N[3] PU_H_N[3] m1_11745_1478# m1_10391_1478# sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_13897_1552# + sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_8937_1552# m1_8837_1478# PU_H_N[2] + m1_13667_1478# PU_H_N[3] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2_0/a_2985_1552# + m1_11745_1478# PU_H_N[2] PU_H_N[3] sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2 R0 m1_14229_1478# m2_14532_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R1 m1_13667_1478# m2_13593_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R2 TIE_HI_ESD a_14575_48# sky130_fd_pr__res_generic_po w=500000u l=1.02e+07u R3 PU_H_N[2] m2_9839_n208# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R4 m1_10391_1478# m2_10945_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R5 PU_H_N[2] m2_11422_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R6 m1_13667_1478# m2_14075_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R7 m2_12267_n279# m1_11745_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R8 m1_11745_1478# m2_12510_21# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R9 m1_8837_1478# m2_9605_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R10 TIE_HI_ESD m2_10945_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R11 m1_8837_1478# m2_9363_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R12 m1_10391_1478# m2_11422_92# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R13 PU_H_N[3] m2_9605_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R14 PU_H_N[3] m2_12510_n280# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R15 PU_H_N[2] m2_14769_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R16 PU_H_N[3] m2_11186_n208# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R17 PU_H_N[3] m2_13837_658# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R18 TIE_HI_ESD m2_14286_658# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R19 PU_H_N[3] m2_14532_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R20 m2_11186_n208# m1_10391_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R21 TIE_HI_ESD m2_13593_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R22 PU_H_N[2] m2_12751_n280# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R23 m2_13837_658# m1_13667_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R24 m1_14229_1478# m2_14769_958# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R25 m1_11745_1478# m2_12751_21# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R26 TIE_HI_ESD m2_9363_n209# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R27 TIE_HI_ESD m2_12267_n279# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R28 m2_9839_n208# m1_8837_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R29 m2_14286_658# m1_14229_1478# sky130_fd_pr__res_generic_m2 w=650000u l=10000u R30 PU_H_N[2] m2_14075_657# sky130_fd_pr__res_generic_m2 w=650000u l=10000u .ends .subckt sky130_fd_io__xres2v2_rcfilter_lpfv2 IN a_9105_2295# a_1381_4189# a_7373_4189# + a_3949_4189# a_2237_4189# a_525_4189# a_472_471# a_7393_2295# a_472_1087# a_8249_2295# + a_5661_4189# a_472_779# a_336_26# a_472_317# a_472_1549# a_6517_4189# a_6537_2295# + a_9941_4189# a_472_163# a_3093_4189# a_472_1395# a_4805_4189# a_9961_2295# a_9085_4189# + VCC_IO a_472_1857# X0 a_472_317# a_472_1087# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X1 a_9941_4189# a_9941_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R0 a_11618_2147# m1_14480_2172# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R1 a_11618_3071# m1_14484_3300# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R2 a_7373_4189# m1_14480_4922# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R3 IN m1_14484_4202# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R4 a_7373_4189# m1_11613_5471# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R5 m1_14328_5846# a_5661_4189# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X2 a_3382_6882# a_7373_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X3 a_7373_4189# a_7373_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R6 a_472_6420# m1_3338_6444# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R7 a_5661_4189# m1_14480_5846# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R8 m1_3363_1728# a_3382_1703# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R9 a_11618_3071# m1_14480_3096# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R10 a_7373_4189# m1_14484_5126# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R11 a_472_317# m1_3338_341# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R12 a_472_7344# m1_3338_7368# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R13 a_472_1395# m1_467_1384# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R14 a_472_779# m1_467_769# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X4 VCC_IO a_2237_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X5 a_11618_3379# a_11618_3379# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R15 a_472_1087# m1_3334_1112# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R16 a_472_1857# m1_5939_1932# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R17 m1_3363_496# a_3382_471# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X6 a_472_7036# a_3382_7190# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X7 a_472_317# a_12884_625# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R18 a_11618_2455# m1_14484_2684# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X8 a_9085_4189# a_9085_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R19 a_472_1395# m1_10927_1419# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X9 a_6517_4189# a_6517_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R20 a_472_6728# m1_3338_6752# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X10 a_472_6728# a_472_6728# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R21 a_7373_4189# m1_14484_5434# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R22 a_472_317# m1_5624_734# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X11 a_472_317# a_7393_2295# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R23 a_472_7652# m1_3338_7676# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X12 a_11618_3687# a_11618_3687# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R24 a_472_317# m1_6480_426# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R25 m1_3363_1112# a_3382_1087# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X13 a_3382_7190# a_9085_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X14 a_472_317# a_12884_933# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R26 a_11618_2763# m1_14484_2992# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R27 a_472_1395# m1_14299_5846# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R28 a_472_317# m1_467_432# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R29 a_472_317# m1_4825_1042# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X15 VCC_IO a_7373_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R30 a_472_317# m1_6537_426# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R31 a_472_317# m1_4768_1042# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X16 a_472_6728# a_12884_6728# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X17 a_472_1549# a_3382_1703# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R32 a_6517_4189# m1_14484_5742# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X18 a_472_6112# a_472_6112# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X19 a_7373_4189# a_7373_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X20 a_472_317# a_8249_2295# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R33 a_472_7036# m1_3338_7060# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X21 a_472_7036# a_472_7036# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R34 a_472_471# m1_467_461# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R35 a_472_7344# m1_3338_7419# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X22 a_472_1087# a_3382_1087# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R36 a_472_1549# m1_2201_1652# sky130_fd_pr__res_generic_m1 w=290000u l=10000u R37 a_472_317# m1_3338_700# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X23 VCC_IO a_7373_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X24 a_3382_1703# a_11618_2147# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R38 a_472_779# m1_10929_804# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X25 a_472_6420# a_472_6420# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X26 a_472_6112# a_12884_6112# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X27 a_472_779# a_3382_779# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R39 a_7373_4189# m1_11741_5169# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R40 a_472_6728# m1_3338_6803# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X28 a_472_7344# a_472_7344# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X29 a_472_7036# a_12884_7036# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R41 a_472_7652# m1_3338_7727# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X30 a_472_1395# a_3382_1395# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R42 a_472_317# m1_2201_1681# sky130_fd_pr__res_generic_m1 w=290000u l=10000u X31 a_472_317# a_472_779# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X32 a_3382_1087# a_11618_2763# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R43 a_472_163# m1_10929_188# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X33 a_11618_2147# a_12884_1857# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R44 a_472_1549# m1_466_1664# sky130_fd_pr__res_generic_m1 w=290000u l=310000u X34 a_472_317# a_472_1857# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X35 a_472_317# a_472_471# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R45 a_472_6112# m1_3338_6187# sky130_fd_pr__res_generic_m1 w=290000u l=310000u R46 a_472_6728# m1_3334_6907# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X36 a_472_6420# a_12884_6420# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X37 a_472_7652# a_472_7652# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X38 a_472_7344# a_12884_7344# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X39 a_472_163# a_3382_163# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X40 VCC_IO a_3949_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X41 VCC_IO a_5661_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X42 a_3382_1395# a_11618_2455# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R47 a_472_471# m1_10929_496# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X43 a_11618_2455# a_12884_1549# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R48 a_472_7036# m1_3338_7111# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X44 a_11618_3379# a_12884_625# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R49 a_472_6420# m1_3338_6495# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R50 a_472_317# m1_3338_392# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X45 a_7373_4189# a_12884_6728# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X46 a_472_317# a_6537_2295# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R51 m1_3363_6907# a_3382_6882# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X47 a_472_7652# a_12884_7652# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X48 a_9085_4189# a_12884_7344# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R52 a_11618_2147# m1_14484_2325# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X49 a_472_471# a_3382_471# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R53 m1_10958_804# a_472_1395# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R54 a_11618_3071# m1_14484_3249# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R55 a_472_7036# m1_3334_7215# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R56 a_472_317# m1_3338_1265# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X50 a_11618_2763# a_12884_1241# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R57 a_472_1395# m1_10927_1470# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X51 VCC_IO a_6517_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R58 a_472_6420# m1_3334_6599# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X52 a_11618_3687# a_12884_317# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R59 a_472_317# m1_3113_1350# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R60 a_9941_4189# m1_14484_4459# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X53 a_3382_779# a_11618_3071# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X54 a_6517_4189# a_12884_6420# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R61 a_472_317# m1_3056_1350# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R62 m1_10958_188# a_472_1395# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X55 a_7373_4189# a_12884_7036# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X56 a_472_317# a_9105_2295# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R63 a_11618_2455# m1_14484_2633# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X57 a_472_317# a_472_1549# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R64 a_11618_3379# m1_14484_3557# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X58 a_472_317# a_472_1395# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R65 a_472_1549# m1_3338_1573# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X59 a_472_1549# a_472_1549# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R66 a_472_7344# m1_3334_7523# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R67 a_5661_4189# m1_11613_5808# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R68 m1_3363_7215# a_3382_7190# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R69 m1_14509_2480# a_12884_1549# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R70 m1_3363_6599# a_3382_6574# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R71 a_472_1549# m1_10929_1728# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R72 a_9085_4189# m1_14484_4767# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X60 VCC_IO a_3093_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R73 m1_14509_4306# a_12884_7652# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R74 a_472_779# m1_3334_804# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R75 a_472_317# m1_3338_1008# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X61 VCC_IO a_525_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X62 a_5661_4189# a_12884_6112# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X63 a_11618_3071# a_12884_933# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R76 m1_10958_496# a_472_1395# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R77 a_11618_2763# m1_14484_2941# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R78 a_9941_4189# m1_11613_4547# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R79 m1_14509_5230# a_12884_6728# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X64 a_472_7652# a_3382_7806# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R80 a_472_1857# m1_1345_1960# sky130_fd_pr__res_generic_m1 w=290000u l=10000u X65 a_3382_163# a_11618_3687# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X66 a_472_317# a_472_317# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R81 a_472_1857# m1_3338_1881# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R82 a_11618_3687# m1_14484_3865# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X67 a_472_1857# a_472_1857# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X68 a_472_1549# a_12884_1549# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R83 a_472_7652# m1_3334_7831# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R84 m1_14509_3404# a_12884_625# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X69 a_9941_4189# a_12884_7652# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X70 a_11618_2455# a_11618_2455# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R85 m1_3363_7523# a_3382_7498# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R86 a_472_163# m1_3334_188# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R87 m1_14509_2788# a_12884_1241# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X71 a_472_6112# a_3382_6266# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R88 a_472_1549# m1_595_1664# sky130_fd_pr__res_generic_m1 w=290000u l=310000u X72 a_472_317# a_472_163# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R89 m1_14509_4614# a_12884_7344# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R90 a_472_6112# m1_3334_6291# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R91 a_472_317# m1_3338_1316# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R92 m1_10958_1728# a_472_1395# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R93 a_9085_4189# m1_11613_4576# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R94 a_472_317# m1_1345_1989# sky130_fd_pr__res_generic_m1 w=290000u l=10000u R95 a_472_1087# m1_10929_1112# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R96 IN m1_14484_4151# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R97 a_9085_4189# m1_11613_4855# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R98 m1_14509_5538# a_12884_6420# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X73 a_3382_7806# IN a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X74 a_3382_471# a_11618_3379# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R99 a_11618_2455# m1_14480_2480# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R100 a_9941_4189# m1_14484_4510# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R101 a_7373_4189# m1_14484_5075# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R102 a_6517_4189# m1_11613_5779# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X75 a_472_317# a_472_317# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X76 a_472_1857# a_12884_1857# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R103 m1_14509_3712# a_12884_317# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R104 a_472_317# m1_3338_649# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X77 VCC_IO a_4805_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X78 a_11618_2763# a_11618_2763# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R105 m1_3363_7831# a_3382_7806# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R106 a_9941_4189# m1_14480_4306# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R107 a_472_1857# m1_5939_1881# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R108 a_472_471# m1_3334_496# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X79 a_472_6420# a_3382_6574# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X80 a_3382_6266# a_6517_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X81 a_472_317# a_472_317# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R109 a_472_1395# m1_3334_1420# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R110 a_7373_4189# m1_14480_5230# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R111 a_11618_3379# m1_14484_3608# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R112 a_6517_4189# m1_11613_5500# sky130_fd_pr__res_generic_m1 w=650000u l=10000u X82 a_472_7344# a_3382_7498# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R113 a_472_1549# m1_3338_1624# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R114 m1_14509_2172# a_12884_1857# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R115 m1_14509_4922# a_12884_7036# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R116 a_472_317# m1_467_1047# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R117 a_7373_4189# m1_11613_4884# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R118 a_472_317# m1_5681_734# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R119 m1_3363_6291# a_3382_6266# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R120 a_11618_3379# m1_14480_3404# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R121 m1_14509_5846# a_12884_6112# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R122 m1_14509_3096# a_12884_933# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R123 m1_10958_1112# a_472_1395# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R124 a_11618_2763# m1_14480_2788# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R125 a_9085_4189# m1_14484_4818# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X83 a_472_317# a_9961_2295# a_472_317# a_336_26# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X84 a_472_317# a_472_317# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R126 a_7373_4189# m1_14484_5383# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R127 a_472_317# m1_3338_957# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X85 IN IN a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R128 a_9085_4189# m1_14480_4614# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R129 m1_3363_804# a_3382_779# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X86 VCC_IO a_9085_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X87 a_472_6728# a_3382_6882# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u X88 a_3382_6574# a_7373_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R130 a_472_1549# m1_3334_1728# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X89 a_472_317# a_12884_1241# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R131 a_472_6112# m1_3338_6136# sky130_fd_pr__res_generic_m1 w=290000u l=310000u R132 a_6517_4189# m1_14480_5538# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X90 VCC_IO a_1381_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u X91 a_11618_2147# a_11618_2147# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R133 a_472_1857# m1_3338_1932# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R134 m1_3363_1420# a_3382_1395# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R135 a_472_1087# m1_467_1076# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R136 a_11618_3687# m1_14484_3916# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X92 a_3382_7498# a_9941_4189# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u X93 VCC_IO a_9941_4189# VCC_IO VCC_IO sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=7e+06u l=4e+06u R137 a_472_317# m1_467_1355# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R138 a_7373_4189# m1_11612_5169# sky130_fd_pr__res_generic_m1 w=260000u l=310000u X94 a_11618_3071# a_11618_3071# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=1.4e+07u R139 a_11618_3687# m1_14480_3712# sky130_fd_pr__res_generic_m1 w=260000u l=10000u R140 a_472_317# m1_467_740# sky130_fd_pr__res_generic_m1 w=650000u l=10000u R141 m1_3363_188# a_3382_163# sky130_fd_pr__res_generic_m1 w=260000u l=10000u X95 a_472_317# a_12884_317# a_336_26# sky130_fd_pr__res_generic_nd w=500000u l=4.7e+07u R142 a_11618_2147# m1_14484_2376# sky130_fd_pr__res_generic_m1 w=260000u l=310000u R143 a_6517_4189# m1_14484_5691# sky130_fd_pr__res_generic_m1 w=260000u l=310000u .ends .subckt sky130_fd_io__top_xres4v2 PAD_A_ESD_H XRES_H_N FILT_IN_H ENABLE_VDDIO TIE_WEAK_HI_H + ENABLE_H PULLUP_H EN_VDDIO_SIG_H TIE_LO_ESD TIE_HI_ESD DISABLE_PULLUP_H INP_SEL_H + VSSIO VSSA VSSD VDDA VCCHIB VSSIO_Q PAD VCCD VDDIO VDDIO_uq6 VSSIO_uq6 VSWITCH VSSA_uq8 + VSSA_uq6 VDDIO_Q AMUXBUS_B AMUXBUS_A VSSA_uq9 Xsky130_fd_io__com_res_weak_v2_0 PULLUP_H a_5670_7125# sky130_fd_io__com_res_weak_v2 Xsky130_fd_io__com_res_weak_0 sky130_fd_io__com_res_weak_0/RB VDDIO_uq6 li_7794_26629# + li_12154_26629# li_9658_25954# li_8568_25954# li_11000_25954# sky130_fd_io__com_res_weak Xsky130_fd_io__xres4v2_in_buf_0 sky130_fd_io__xres4v2_in_buf_0/IN_H EN_VDDIO_SIG_H + sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B sky130_fd_io__xres4v2_in_buf_0/PAD ENABLE_H + sky130_fd_io__xres4v2_in_buf_0/IN_H_N ENABLE_VDDIO VDDIO_Q m1_3250_3609# EN_VDDIO_SIG_H + m1_1351_2970# VSSD VCCHIB VSSD sky130_fd_io__xres4v2_in_buf Xsky130_fd_io__xres_inv_hysv2_0 sky130_fd_io__xres_inv_hysv2_0/OUT_H VSSD m1_6377_8979# + li_6043_2944# li_5552_2976# VDDIO_Q sky130_fd_io__xres_inv_hysv2 Xsky130_fd_io__gpio_buf_localesdv2_0 VSSD sky130_fd_io__xres4v2_in_buf_0/PAD sky130_fd_io__gpio_buf_localesdv2_0/OUT_VT + PAD VSSD VDDIO_uq6 sky130_fd_io__gpio_buf_localesdv2 Xsky130_fd_io__gpio_pddrvr_strong_xres4v2_0 sky130_fd_io__gpio_pddrvr_strong_xres4v2_0/PD_H[3] + sky130_fd_io__gpio_pddrvr_strong_xres4v2_0/PD_H[3] sky130_fd_io__gpio_pddrvr_strong_xres4v2_0/PD_H[3] + VSSIO_uq6 PAD PAD PAD PAD PAD PAD PAD PAD VSSIO_uq6 PAD PAD PAD PAD PAD m1_915_33059# + PAD VDDIO_uq6 sky130_fd_io__gpio_pddrvr_strong_xres4v2 Xsky130_fd_io__tk_tie_r_out_esd_0 VDDIO TIE_HI_ESD sky130_fd_io__tk_tie_r_out_esd Xsky130_fd_io__tk_tie_r_out_esd_1 VSSIO TIE_LO_ESD sky130_fd_io__tk_tie_r_out_esd Xsky130_fd_io__res250only_small_0 TIE_WEAK_HI_H sky130_fd_io__com_res_weak_0/RB sky130_fd_io__res250only_small Xsky130_fd_io__res250only_small_1 PAD PAD_A_ESD_H sky130_fd_io__res250only_small Xsky130_fd_io__gpio_pudrvr_strong_axres4v2_0 sky130_fd_io__gpio_pudrvr_strong_axres4v2_0/PU_H_N[3] + sky130_fd_io__gpio_pudrvr_strong_axres4v2_0/PU_H_N[3] sky130_fd_io__gpio_pudrvr_strong_axres4v2_0/PU_H_N[3] + PAD PAD PAD PAD PAD PAD PAD PAD PAD VSSD PAD VSSD PAD PAD VDDIO_uq6 PAD VDDIO_uq6 + PAD sky130_fd_io__gpio_pudrvr_strong_axres4v2 Xsky130_fd_io__xres2v2_rcfilter_lpfv2_0 sky130_fd_io__xres2v2_rcfilter_lpfv2_0/IN + m1_10468_10072# m1_6377_8979# m1_10468_9216# m1_10468_4936# m1_10468_3224# m1_10468_1512# + m1_10468_4936# m1_10468_9216# m1_10468_3224# m1_10468_9216# m1_10468_6648# m1_10468_4080# + VSSD VSSD m1_10468_1512# m1_10468_7504# m1_10468_7504# m1_10468_10928# m1_10468_5792# + m1_10468_4080# m1_6377_8979# m1_10468_5792# m1_10468_10928# m1_10468_10072# VDDIO_Q + m1_10468_6648# sky130_fd_io__xres2v2_rcfilter_lpfv2 X0 a_5670_7125# a_5551_5929# VDDIO_uq6 VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X1 XRES_H_N a_5556_4246# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X2 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X3 FILT_IN_H a_3226_2008# sky130_fd_io__xres2v2_rcfilter_lpfv2_0/IN VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X4 VDDIO_Q EN_VDDIO_SIG_H sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X5 VSSD DISABLE_PULLUP_H a_5525_5809# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X6 VSSD a_5525_5809# a_5551_5929# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X7 VSSD INP_SEL_H a_3226_2008# VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X8 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X9 a_5525_5809# DISABLE_PULLUP_H VDDIO_uq6 VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X10 a_5525_5809# DISABLE_PULLUP_H VDDIO_uq6 VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X11 a_3226_2008# INP_SEL_H VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X12 VSSD a_5556_4246# XRES_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X13 a_5551_5929# a_5525_5809# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X14 a_5556_4246# sky130_fd_io__xres_inv_hysv2_0/OUT_H VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X15 XRES_H_N a_5556_4246# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X16 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X17 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X18 VDDIO_uq6 a_5551_5929# a_5670_7125# VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X19 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X20 VSSD a_5556_4246# XRES_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X21 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X22 sky130_fd_io__xres2v2_rcfilter_lpfv2_0/IN a_3226_2008# sky130_fd_io__xres4v2_in_buf_0/IN_H VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X23 XRES_H_N a_5556_4246# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X24 VDDIO_Q EN_VDDIO_SIG_H sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X25 sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B EN_VDDIO_SIG_H VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X26 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X27 VDDIO_uq6 a_5525_5809# a_5551_5929# VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X28 VDDIO_uq6 a_5525_5809# a_5551_5929# VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X29 VDDIO_uq6 a_5551_5929# a_5670_7125# VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X30 a_5670_7125# a_5551_5929# VDDIO_uq6 VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=5e+06u l=500000u X31 VDDIO_uq6 DISABLE_PULLUP_H a_5525_5809# VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X32 VDDIO_uq6 DISABLE_PULLUP_H a_5525_5809# VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X33 a_5556_4246# sky130_fd_io__xres_inv_hysv2_0/OUT_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X34 a_3226_2008# INP_SEL_H VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X35 VDDIO_Q INP_SEL_H a_3226_2008# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X36 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X37 a_5551_5929# a_5525_5809# VDDIO_uq6 VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X38 a_5551_5929# a_5525_5809# VDDIO_uq6 VDDIO_uq6 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X39 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X40 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X41 VSSD a_5556_4246# XRES_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X42 FILT_IN_H INP_SEL_H sky130_fd_io__xres2v2_rcfilter_lpfv2_0/IN VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X43 VSSD EN_VDDIO_SIG_H sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X44 sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B EN_VDDIO_SIG_H VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X45 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X46 a_3226_2008# INP_SEL_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X47 a_5525_5809# DISABLE_PULLUP_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X48 sky130_fd_io__xres2v2_rcfilter_lpfv2_0/IN INP_SEL_H sky130_fd_io__xres4v2_in_buf_0/IN_H VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=3e+06u l=500000u X49 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X50 VDDIO_Q INP_SEL_H a_3226_2008# VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X51 VSSD a_5556_4246# XRES_H_N VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X52 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X53 a_5556_4246# sky130_fd_io__xres_inv_hysv2_0/OUT_H VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X54 XRES_H_N a_5556_4246# VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X55 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X56 VDDIO_Q a_5556_4246# XRES_H_N VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u X57 sky130_fd_io__xres4v2_in_buf_0/VNORMAL_B EN_VDDIO_SIG_H VSSD VSSD sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=700000u l=600000u X58 XRES_H_N a_5556_4246# VDDIO_Q VDDIO_Q sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u .ends .subckt chip_io xresloop xres_vss_loop clock clock_core por flash_clk_core flash_clk_oeb_core + flash_csb flash_csb_core flash_csb_oeb_core flash_io0_di_core flash_io0_do_core + flash_io0_ieb_core flash_io0_oeb_core flash_io1_di_core flash_io1_do_core flash_io1_ieb_core + flash_io1_oeb_core gpio gpio_in_core gpio_inenb_core gpio_mode0_core gpio_mode1_core + gpio_out_core gpio_outenb_core vccd_pad vdda_pad vddio_pad vssa_pad vssio_pad vssio_pad2 + mprj_io[0] mprj_io_analog_en[0] mprj_io_analog_pol[0] mprj_io_analog_sel[0] mprj_io_dm[0] + mprj_io_dm[1] mprj_io_dm[2] mprj_io_holdover[0] mprj_io_ib_mode_sel[0] mprj_io_inp_dis[0] + mprj_io_oeb[0] mprj_io_out[0] mprj_io_slow_sel[0] mprj_io_vtrip_sel[0] mprj_io_in[0] + mprj_analog_io[3] mprj_io_analog_en[10] mprj_io_analog_pol[10] mprj_io_analog_sel[10] + mprj_io_dm[30] mprj_io_dm[31] mprj_io_dm[32] mprj_io_holdover[10] mprj_io_ib_mode_sel[10] + mprj_io_inp_dis[10] mprj_io_oeb[10] mprj_io_out[10] mprj_io_slow_sel[10] mprj_io_vtrip_sel[10] + mprj_io_in[10] mprj_analog_io[4] mprj_io_analog_en[11] mprj_io_analog_pol[11] mprj_io_analog_sel[11] + mprj_io_dm[33] mprj_io_dm[34] mprj_io_dm[35] mprj_io_holdover[11] mprj_io_ib_mode_sel[11] + mprj_io_inp_dis[11] mprj_io_oeb[11] mprj_io_out[11] mprj_io_slow_sel[11] mprj_io_vtrip_sel[11] + mprj_io_in[11] mprj_analog_io[5] mprj_io_analog_en[12] mprj_io_analog_pol[12] mprj_io_analog_sel[12] + mprj_io_dm[36] mprj_io_dm[37] mprj_io_dm[38] mprj_io_holdover[12] mprj_io_ib_mode_sel[12] + mprj_io_inp_dis[12] mprj_io_oeb[12] mprj_io_out[12] mprj_io_slow_sel[12] mprj_io_vtrip_sel[12] + mprj_io_in[12] mprj_analog_io[6] mprj_io_analog_en[13] mprj_io_analog_pol[13] mprj_io_analog_sel[13] + mprj_io_dm[39] mprj_io_dm[40] mprj_io_dm[41] mprj_io_holdover[13] mprj_io_ib_mode_sel[13] + mprj_io_inp_dis[13] mprj_io_oeb[13] mprj_io_out[13] mprj_io_slow_sel[13] mprj_io_vtrip_sel[13] + mprj_io_in[13] mprj_analog_io[7] mprj_io_analog_en[14] mprj_io_analog_pol[14] mprj_io_analog_sel[14] + mprj_io_dm[42] mprj_io_dm[43] mprj_io_dm[44] mprj_io_holdover[14] mprj_io_ib_mode_sel[14] + mprj_io_inp_dis[14] mprj_io_oeb[14] mprj_io_out[14] mprj_io_slow_sel[14] mprj_io_vtrip_sel[14] + mprj_io_in[14] mprj_analog_io[8] mprj_io_analog_en[15] mprj_io_analog_pol[15] mprj_io_analog_sel[15] + mprj_io_dm[45] mprj_io_dm[46] mprj_io_dm[47] mprj_io_holdover[15] mprj_io_ib_mode_sel[15] + mprj_io_inp_dis[15] mprj_io_oeb[15] mprj_io_out[15] mprj_io_slow_sel[15] mprj_io_vtrip_sel[15] + mprj_io_in[15] mprj_analog_io[9] mprj_io[16] mprj_io_analog_en[16] mprj_io_analog_pol[16] + mprj_io_analog_sel[16] mprj_io_dm[48] mprj_io_dm[49] mprj_io_dm[50] mprj_io_holdover[16] + mprj_io_ib_mode_sel[16] mprj_io_inp_dis[16] mprj_io_oeb[16] mprj_io_out[16] mprj_io_slow_sel[16] + mprj_io_vtrip_sel[16] mprj_io_in[16] mprj_analog_io[10] mprj_io[17] mprj_io_analog_en[17] + mprj_io_analog_pol[17] mprj_io_analog_sel[17] mprj_io_dm[51] mprj_io_dm[52] mprj_io_dm[53] + mprj_io_holdover[17] mprj_io_ib_mode_sel[17] mprj_io_inp_dis[17] mprj_io_oeb[17] + mprj_io_out[17] mprj_io_slow_sel[17] mprj_io_vtrip_sel[17] mprj_io_in[17] mprj_analog_io[11] + mprj_io_analog_en[18] mprj_io_analog_pol[18] mprj_io_analog_sel[18] mprj_io_dm[54] + mprj_io_dm[55] mprj_io_dm[56] mprj_io_holdover[18] mprj_io_ib_mode_sel[18] mprj_io_inp_dis[18] + mprj_io_oeb[18] mprj_io_out[18] mprj_io_slow_sel[18] mprj_io_vtrip_sel[18] mprj_io_in[18] + mprj_io[1] mprj_io_analog_en[1] mprj_io_analog_pol[1] mprj_io_analog_sel[1] mprj_io_dm[3] + mprj_io_dm[4] mprj_io_dm[5] mprj_io_holdover[1] mprj_io_ib_mode_sel[1] mprj_io_inp_dis[1] + mprj_io_oeb[1] mprj_io_out[1] mprj_io_slow_sel[1] mprj_io_vtrip_sel[1] mprj_io_in[1] + mprj_io[2] mprj_io_analog_en[2] mprj_io_analog_pol[2] mprj_io_analog_sel[2] mprj_io_dm[6] + mprj_io_dm[7] mprj_io_dm[8] mprj_io_holdover[2] mprj_io_ib_mode_sel[2] mprj_io_inp_dis[2] + mprj_io_oeb[2] mprj_io_out[2] mprj_io_slow_sel[2] mprj_io_vtrip_sel[2] mprj_io_in[2] + mprj_io[3] mprj_io_analog_en[3] mprj_io_analog_pol[3] mprj_io_analog_sel[3] mprj_io_dm[10] + mprj_io_dm[11] mprj_io_dm[9] mprj_io_holdover[3] mprj_io_ib_mode_sel[3] mprj_io_inp_dis[3] + mprj_io_oeb[3] mprj_io_out[3] mprj_io_slow_sel[3] mprj_io_vtrip_sel[3] mprj_io_in[3] + mprj_io[4] mprj_io_analog_en[4] mprj_io_analog_pol[4] mprj_io_analog_sel[4] mprj_io_dm[12] + mprj_io_dm[13] mprj_io_dm[14] mprj_io_holdover[4] mprj_io_ib_mode_sel[4] mprj_io_inp_dis[4] + mprj_io_oeb[4] mprj_io_out[4] mprj_io_slow_sel[4] mprj_io_vtrip_sel[4] mprj_io_in[4] + mprj_io[5] mprj_io_analog_en[5] mprj_io_analog_pol[5] mprj_io_analog_sel[5] mprj_io_dm[15] + mprj_io_dm[16] mprj_io_dm[17] mprj_io_holdover[5] mprj_io_ib_mode_sel[5] mprj_io_inp_dis[5] + mprj_io_oeb[5] mprj_io_out[5] mprj_io_slow_sel[5] mprj_io_vtrip_sel[5] mprj_io_in[5] + mprj_io[6] mprj_io_analog_en[6] mprj_io_analog_pol[6] mprj_io_analog_sel[6] mprj_io_dm[18] + mprj_io_dm[19] mprj_io_dm[20] mprj_io_holdover[6] mprj_io_ib_mode_sel[6] mprj_io_inp_dis[6] + mprj_io_oeb[6] mprj_io_out[6] mprj_io_slow_sel[6] mprj_io_vtrip_sel[6] mprj_io_in[6] + mprj_analog_io[0] mprj_io_analog_en[7] mprj_io_analog_pol[7] mprj_io_analog_sel[7] + mprj_io_dm[21] mprj_io_dm[22] mprj_io_dm[23] mprj_io_holdover[7] mprj_io_ib_mode_sel[7] + mprj_io_inp_dis[7] mprj_io_oeb[7] mprj_io_out[7] mprj_io_slow_sel[7] mprj_io_vtrip_sel[7] + mprj_io_in[7] mprj_analog_io[1] mprj_io_analog_en[8] mprj_io_analog_pol[8] mprj_io_analog_sel[8] + mprj_io_dm[24] mprj_io_dm[25] mprj_io_dm[26] mprj_io_holdover[8] mprj_io_ib_mode_sel[8] + mprj_io_inp_dis[8] mprj_io_oeb[8] mprj_io_out[8] mprj_io_slow_sel[8] mprj_io_vtrip_sel[8] + mprj_io_in[8] mprj_analog_io[2] mprj_io_analog_en[9] mprj_io_analog_pol[9] mprj_io_analog_sel[9] + mprj_io_dm[27] mprj_io_dm[28] mprj_io_dm[29] mprj_io_holdover[9] mprj_io_ib_mode_sel[9] + mprj_io_inp_dis[9] mprj_io_oeb[9] mprj_io_out[9] mprj_io_slow_sel[9] mprj_io_vtrip_sel[9] + mprj_io_in[9] mprj_analog_io[12] mprj_io[19] mprj_io_analog_en[19] mprj_io_analog_pol[19] + mprj_io_analog_sel[19] mprj_io_dm[57] mprj_io_dm[58] mprj_io_dm[59] mprj_io_holdover[19] + mprj_io_ib_mode_sel[19] mprj_io_inp_dis[19] mprj_io_oeb[19] mprj_io_out[19] mprj_io_slow_sel[19] + mprj_io_vtrip_sel[19] mprj_io_in[19] mprj_analog_io[22] mprj_io_analog_en[29] mprj_io_analog_pol[29] + mprj_io_analog_sel[29] mprj_io_dm[87] mprj_io_dm[88] mprj_io_dm[89] mprj_io_holdover[29] + mprj_io_ib_mode_sel[29] mprj_io_inp_dis[29] mprj_io_oeb[29] mprj_io_out[29] mprj_io_slow_sel[29] + mprj_io_vtrip_sel[29] mprj_io_in[29] mprj_analog_io[23] mprj_io[30] mprj_io_analog_en[30] + mprj_io_analog_pol[30] mprj_io_analog_sel[30] mprj_io_dm[90] mprj_io_dm[91] mprj_io_dm[92] + mprj_io_holdover[30] mprj_io_ib_mode_sel[30] mprj_io_inp_dis[30] mprj_io_oeb[30] + mprj_io_out[30] mprj_io_slow_sel[30] mprj_io_vtrip_sel[30] mprj_io_in[30] mprj_analog_io[24] + mprj_io_analog_en[31] mprj_io_analog_pol[31] mprj_io_analog_sel[31] mprj_io_dm[93] + mprj_io_dm[94] mprj_io_dm[95] mprj_io_holdover[31] mprj_io_ib_mode_sel[31] mprj_io_inp_dis[31] + mprj_io_oeb[31] mprj_io_out[31] mprj_io_slow_sel[31] mprj_io_vtrip_sel[31] mprj_io_in[31] + mprj_analog_io[25] mprj_io[32] mprj_io_analog_en[32] mprj_io_analog_pol[32] mprj_io_analog_sel[32] + mprj_io_dm[96] mprj_io_dm[97] mprj_io_dm[98] mprj_io_holdover[32] mprj_io_ib_mode_sel[32] + mprj_io_inp_dis[32] mprj_io_oeb[32] mprj_io_out[32] mprj_io_slow_sel[32] mprj_io_vtrip_sel[32] + mprj_io_in[32] mprj_analog_io[26] mprj_io[33] mprj_io_analog_en[33] mprj_io_analog_pol[33] + mprj_io_analog_sel[33] mprj_io_dm[100] mprj_io_dm[101] mprj_io_dm[99] mprj_io_holdover[33] + mprj_io_ib_mode_sel[33] mprj_io_inp_dis[33] mprj_io_oeb[33] mprj_io_out[33] mprj_io_slow_sel[33] + mprj_io_vtrip_sel[33] mprj_io_in[33] mprj_analog_io[27] mprj_io[34] mprj_io_analog_en[34] + mprj_io_analog_pol[34] mprj_io_analog_sel[34] mprj_io_dm[102] mprj_io_dm[103] mprj_io_dm[104] + mprj_io_holdover[34] mprj_io_ib_mode_sel[34] mprj_io_inp_dis[34] mprj_io_oeb[34] + mprj_io_out[34] mprj_io_slow_sel[34] mprj_io_vtrip_sel[34] mprj_io_in[34] mprj_analog_io[28] + mprj_io[35] mprj_io_analog_en[35] mprj_io_analog_pol[35] mprj_io_analog_sel[35] + mprj_io_dm[105] mprj_io_dm[106] mprj_io_dm[107] mprj_io_holdover[35] mprj_io_ib_mode_sel[35] + mprj_io_inp_dis[35] mprj_io_oeb[35] mprj_io_out[35] mprj_io_slow_sel[35] mprj_io_vtrip_sel[35] + mprj_io_in[35] mprj_io_analog_en[36] mprj_io_analog_pol[36] mprj_io_analog_sel[36] + mprj_io_dm[108] mprj_io_dm[109] mprj_io_dm[110] mprj_io_holdover[36] mprj_io_ib_mode_sel[36] + mprj_io_inp_dis[36] mprj_io_oeb[36] mprj_io_out[36] mprj_io_slow_sel[36] mprj_io_vtrip_sel[36] + mprj_io_in[36] mprj_io_analog_en[37] mprj_io_analog_pol[37] mprj_io_analog_sel[37] + mprj_io_dm[111] mprj_io_dm[112] mprj_io_dm[113] mprj_io_holdover[37] mprj_io_ib_mode_sel[37] + mprj_io_inp_dis[37] mprj_io_oeb[37] mprj_io_out[37] mprj_io_slow_sel[37] mprj_io_vtrip_sel[37] + mprj_io_in[37] mprj_analog_io[13] mprj_io_analog_en[20] mprj_io_analog_pol[20] mprj_io_analog_sel[20] + mprj_io_dm[60] mprj_io_dm[61] mprj_io_dm[62] mprj_io_holdover[20] mprj_io_ib_mode_sel[20] + mprj_io_inp_dis[20] mprj_io_oeb[20] mprj_io_out[20] mprj_io_slow_sel[20] mprj_io_vtrip_sel[20] + mprj_io_in[20] mprj_analog_io[14] mprj_io_analog_en[21] mprj_io_analog_pol[21] mprj_io_analog_sel[21] + mprj_io_dm[63] mprj_io_dm[64] mprj_io_dm[65] mprj_io_holdover[21] mprj_io_ib_mode_sel[21] + mprj_io_inp_dis[21] mprj_io_oeb[21] mprj_io_out[21] mprj_io_slow_sel[21] mprj_io_vtrip_sel[21] + mprj_io_in[21] mprj_analog_io[15] mprj_io_analog_en[22] mprj_io_analog_pol[22] mprj_io_analog_sel[22] + mprj_io_dm[66] mprj_io_dm[67] mprj_io_dm[68] mprj_io_holdover[22] mprj_io_ib_mode_sel[22] + mprj_io_inp_dis[22] mprj_io_oeb[22] mprj_io_out[22] mprj_io_slow_sel[22] mprj_io_vtrip_sel[22] + mprj_io_in[22] mprj_analog_io[16] mprj_io_analog_en[23] mprj_io_analog_pol[23] mprj_io_analog_sel[23] + mprj_io_dm[69] mprj_io_dm[70] mprj_io_dm[71] mprj_io_holdover[23] mprj_io_ib_mode_sel[23] + mprj_io_inp_dis[23] mprj_io_oeb[23] mprj_io_out[23] mprj_io_slow_sel[23] mprj_io_vtrip_sel[23] + mprj_io_in[23] mprj_analog_io[17] mprj_io_analog_en[24] mprj_io_analog_pol[24] mprj_io_analog_sel[24] + mprj_io_dm[72] mprj_io_dm[73] mprj_io_dm[74] mprj_io_holdover[24] mprj_io_ib_mode_sel[24] + mprj_io_inp_dis[24] mprj_io_oeb[24] mprj_io_out[24] mprj_io_slow_sel[24] mprj_io_vtrip_sel[24] + mprj_io_in[24] mprj_analog_io[18] mprj_io_analog_en[25] mprj_io_analog_pol[25] mprj_io_analog_sel[25] + mprj_io_dm[75] mprj_io_dm[76] mprj_io_dm[77] mprj_io_holdover[25] mprj_io_ib_mode_sel[25] + mprj_io_inp_dis[25] mprj_io_oeb[25] mprj_io_out[25] mprj_io_slow_sel[25] mprj_io_vtrip_sel[25] + mprj_io_in[25] mprj_analog_io[19] mprj_io_analog_en[26] mprj_io_analog_pol[26] mprj_io_analog_sel[26] + mprj_io_dm[78] mprj_io_dm[79] mprj_io_dm[80] mprj_io_holdover[26] mprj_io_ib_mode_sel[26] + mprj_io_inp_dis[26] mprj_io_oeb[26] mprj_io_out[26] mprj_io_slow_sel[26] mprj_io_vtrip_sel[26] + mprj_io_in[26] mprj_analog_io[20] mprj_io_analog_en[27] mprj_io_analog_pol[27] mprj_io_analog_sel[27] + mprj_io_dm[81] mprj_io_dm[82] mprj_io_dm[83] mprj_io_holdover[27] mprj_io_ib_mode_sel[27] + mprj_io_inp_dis[27] mprj_io_oeb[27] mprj_io_out[27] mprj_io_slow_sel[27] mprj_io_vtrip_sel[27] + mprj_io_in[27] mprj_analog_io[21] mprj_io_analog_en[28] mprj_io_analog_pol[28] mprj_io_analog_sel[28] + mprj_io_dm[84] mprj_io_dm[85] mprj_io_dm[86] mprj_io_holdover[28] mprj_io_ib_mode_sel[28] + mprj_io_inp_dis[28] mprj_io_oeb[28] mprj_io_out[28] mprj_io_slow_sel[28] mprj_io_vtrip_sel[28] + mprj_io_in[28] resetb resetb_core_h vdda vccd1_pad vdda1_pad2 vccd1 vccd2_pad vdda2_pad + vssa2_pad vccd2 vdda2 vssd2_pad mprj_io_one[0] mprj_io_one[1] mprj_io_one[2] mprj_io_one[3] + mprj_io_one[4] mprj_io_one[5] mprj_io_one[6] mprj_io_one[7] mprj_io_one[8] mprj_io_one[9] + mprj_io_one[10] mprj_io_one[11] mprj_io_one[12] mprj_io_one[13] mprj_io_one[14] + mprj_io_one[15] mprj_io_one[16] mprj_io_one[17] mprj_io_one[18] mprj_io_one[19] + mprj_io_one[20] mprj_io_one[21] mprj_io_one[22] mprj_io_one[23] mprj_io_one[24] + mprj_io_one[25] mprj_io_one[26] mprj_io_one[27] mprj_io_one[28] mprj_io_one[29] + mprj_io_one[30] mprj_io_one[31] mprj_io_one[32] mprj_io_one[33] mprj_io_one[34] + mprj_io_one[35] mprj_io_one[36] mprj_io_one[37] porb_h vdda1 w_694469_865869# w_23367_407274# + w_694469_100152# w_23367_534874# w_137274_1012253# w_188674_1014469# w_404752_21253# + w_459552_23367# w_485565_1014469# w_291674_1014469# w_638765_1014469# w_23367_280765# + w_692253_776670# w_23367_710765# w_692355_547952# w_23367_537965# w_21151_364074# + w_21253_966965# w_694469_145352# w_459552_21253# w_692355_593152# w_485565_1012355# + w_694469_951752# w_694469_190352# w_638765_1012355# w_349952_23367# w_692355_325552# + w_189869_23367# w_21151_794074# w_694469_235552# w_692355_683352# w_21253_194365# + w_85874_1014469# w_694469_280552# w_21253_624365# w_482474_1012253# w_295152_23367# + w_635674_1012253# w_349952_21253# w_23367_578074# w_692253_551270# w_694469_370752# + w_189869_21253# w_21151_277674# w_692253_641470# w_692253_955070# w_294765_1014469# + w_295152_21253# w_21151_707674# w_23367_234474# w_692355_100152# w_694469_776669# + w_393474_1014469# w_21151_963874# w_692253_596470# w_692253_731670# w_21253_280765# + w_692253_328870# w_23367_410365# w_21253_710765# w_294765_1012355# w_462869_23367# + w_23367_237565# w_21253_537965# w_23367_664474# w_692253_686670# w_21151_191274# + w_692253_374070# w_21151_621274# w_692355_145352# w_692355_951752# w_692355_190352# + w_694469_862552# w_88965_1014469# w_188674_1012253# w_291674_1012253# w_462869_21253# + w_23367_667565# w_692355_235552# w_694469_551269# w_23367_320874# w_692355_280552# + w_88965_1012355# w_692253_103470# w_140365_1014469# w_694469_641469# w_694469_955069# + w_692355_370752# w_23367_323965# w_23367_750874# w_396565_1014469# w_240074_1014469# + mprj_io[29] w_694469_596469# w_23367_581165# w_694469_731669# w_21151_407274# w_186552_23367# + w_517669_23367# w_21151_534874# w_85874_1012253# w_694469_328869# w_140365_1012355# + flash_clk w_692253_148670# w_23367_753965# mprj_io[7] w_694469_686669# w_692253_193670# + w_694469_374069# w_396565_1012355# vssd1_pad mprj_io[20] w_21253_410365# w_694469_638152# + w_186552_21253# w_517669_21253# w_21253_237565# w_692253_238870# w_23367_364074# + vssd2 w_692253_283870# w_533874_1014469# w_694469_728352# mprj_io[8] w_692355_862552# + w_393474_1012253# w_694469_773352# mprj_io[10] w_23367_367165# w_21253_667565# w_23367_794074# + w_694469_103469# mprj_io[24] w_137274_1014469# w_353269_23367# mprj_io[25] w_21151_578074# + mprj_io[9] flash_io1 w_243165_1014469# w_23367_797165# mprj_io[11] w_21253_323965# + w_353269_21253# mprj_io[21] mprj_io[22] flash_io0 w_23367_277674# w_694469_148669# + w_21253_581165# w_694469_193669# w_23367_707674# vdda1_pad w_21151_234474# mprj_io[31] + vddio_pad2 w_243165_1012355# w_23367_963874# mprj_io[27] vddio w_694469_238869# + w_21253_753965# w_694469_283869# mprj_io[12] w_692253_865870# w_536965_1014469# + w_298469_23367# w_191765_1014469# w_482474_1014469# w_694469_547952# w_692355_638152# + w_635674_1014469# mprj_io[23] w_21151_664474# mprj_io[28] w_23367_966965# w_23367_191274# + vssd_pad w_240074_1012253# w_408069_23367# mprj_io[18] w_694469_593152# w_23367_621274# + vssa1_pad w_692355_728352# w_514352_23367# w_694469_325552# w_536965_1012355# w_692355_773352# + mprj_io[13] w_298469_21253# w_191765_1012355# w_694469_683352# mprj_io[37] w_21253_367165# + w_23367_194365# w_21151_320874# w_408069_21253# w_23367_624365# mprj_io[15] vssd1 + mprj_io[26] vssa w_514352_21253# w_533874_1012253# vccd vssa1 w_404752_23367# vssa1_pad2 + mprj_io[14] vssd gpio_pad/VSSIO_Q w_21253_797165# vssio w_21151_750874# vssa2 mprj_io[36] Xclock_pad clock_pad/OUT clock_pad/OUT clock_pad/OUT clock_pad/OUT clock_pad/OUT clock_pad/OE_N + porb_h clock_pad/TIE_LO_ESD porb_h clock_pad/OE_N clock_pad/TIE_LO_ESD clock_pad/HLD_H_N + clock_pad/OUT clock_pad/OUT clock_core clock_pad/IN_H por clock_pad/OE_N clock_pad/OUT + clock_pad/PAD_A_ESD_0_H clock_pad/PAD_A_ESD_1_H clock_pad/PAD_A_NOESD_H clock_pad/OUT + clock_pad/HLD_H_N clock_pad/TIE_LO_ESD vdda clock_pad/OUT vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa w_189869_21253# gpio_pad/VSSIO_Q clock w_186552_21253# vssio + vssio gpio_pad/VDDIO_Q w_186552_23367# vssa w_189869_23367# vssd vccd vccd vddio + sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[17\] mprj_io_analog_en[36] mprj_io_analog_pol[36] mprj_io_analog_sel[36] + mprj_io_dm[110] mprj_io_dm[109] mprj_io_dm[108] porb_h mprj_pads.area2_io_pad\[17\]/TIE_LO_ESD + porb_h mprj_io_one[36] mprj_pads.area2_io_pad\[17\]/TIE_LO_ESD mprj_pads.area2_io_pad\[17\]/HLD_H_N + mprj_io_holdover[36] mprj_io_ib_mode_sel[36] mprj_io_in[36] mprj_pads.area2_io_pad\[17\]/IN_H + mprj_io_inp_dis[36] mprj_io_oeb[36] mprj_io_out[36] mprj_pads.area2_io_pad\[17\]/PAD_A_ESD_0_H + mprj_pads.area2_io_pad\[17\]/PAD_A_ESD_1_H mprj_pads.area2_io_pad\[17\]/PAD_A_NOESD_H + mprj_io_slow_sel[36] mprj_pads.area2_io_pad\[17\]/HLD_H_N mprj_pads.area2_io_pad\[17\]/TIE_LO_ESD + vdda2 mprj_io_vtrip_sel[36] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 + w_21151_234474# gpio_pad/VSSIO_Q mprj_io[36] w_21253_237565# vssio vssio gpio_pad/VDDIO_Q + w_23367_237565# vssa2 w_23367_234474# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmgmt_vccd_lvclamp_pad vdda vccd vssio gpio_pad/VSSIO_Q vccd vddio vddio vddio vssa + vssa vssa gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio vssd vssa + vccd_pad sky130_ef_io__vccd_lvc_clamped_pad Xmprj_pads.area2_io_pad\[7\] mprj_io_analog_en[26] mprj_io_analog_pol[26] mprj_io_analog_sel[26] + mprj_io_dm[80] mprj_io_dm[79] mprj_io_dm[78] porb_h mprj_pads.area2_io_pad\[7\]/TIE_LO_ESD + porb_h mprj_io_one[26] mprj_pads.area2_io_pad\[7\]/TIE_LO_ESD mprj_pads.area2_io_pad\[7\]/HLD_H_N + mprj_io_holdover[26] mprj_io_ib_mode_sel[26] mprj_io_in[26] mprj_pads.area2_io_pad\[7\]/IN_H + mprj_io_inp_dis[26] mprj_io_oeb[26] mprj_io_out[26] mprj_analog_io[19] mprj_pads.area2_io_pad\[7\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[7\]/PAD_A_NOESD_H mprj_io_slow_sel[26] mprj_pads.area2_io_pad\[7\]/HLD_H_N + mprj_pads.area2_io_pad\[7\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[26] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_21151_750874# gpio_pad/VSSIO_Q mprj_io[26] w_21253_753965# + vssio vssio gpio_pad/VDDIO_Q w_23367_753965# vssa2 w_23367_750874# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_2 constant_block_2/one vccd flash_io0_pad/SLOW vssd constant_block Xmprj_pads.area1_io_pad\[7\] mprj_io_analog_en[7] mprj_io_analog_pol[7] mprj_io_analog_sel[7] + mprj_io_dm[23] mprj_io_dm[22] mprj_io_dm[21] porb_h mprj_pads.area1_io_pad\[7\]/TIE_LO_ESD + porb_h mprj_io_one[7] mprj_pads.area1_io_pad\[7\]/TIE_LO_ESD mprj_pads.area1_io_pad\[7\]/HLD_H_N + mprj_io_holdover[7] mprj_io_ib_mode_sel[7] mprj_io_in[7] mprj_pads.area1_io_pad\[7\]/IN_H + mprj_io_inp_dis[7] mprj_io_oeb[7] mprj_io_out[7] mprj_analog_io[0] mprj_pads.area1_io_pad\[7\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[7\]/PAD_A_NOESD_H mprj_io_slow_sel[7] mprj_pads.area1_io_pad\[7\]/HLD_H_N + mprj_pads.area1_io_pad\[7\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[7] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa1 w_694469_551269# gpio_pad/VSSIO_Q mprj_io[7] w_694469_547952# + vssio vssio gpio_pad/VDDIO_Q w_692355_547952# vssa1 w_692253_551270# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_3 flash_clk_pad/DM[2] vccd flash_clk_pad/SLOW vssd constant_block Xmprj_pads.area1_io_pad\[11\] mprj_io_analog_en[11] mprj_io_analog_pol[11] mprj_io_analog_sel[11] + mprj_io_dm[35] mprj_io_dm[34] mprj_io_dm[33] porb_h mprj_pads.area1_io_pad\[11\]/TIE_LO_ESD + porb_h mprj_io_one[11] mprj_pads.area1_io_pad\[11\]/TIE_LO_ESD mprj_pads.area1_io_pad\[11\]/HLD_H_N + mprj_io_holdover[11] mprj_io_ib_mode_sel[11] mprj_io_in[11] mprj_pads.area1_io_pad\[11\]/IN_H + mprj_io_inp_dis[11] mprj_io_oeb[11] mprj_io_out[11] mprj_analog_io[4] mprj_pads.area1_io_pad\[11\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[11\]/PAD_A_NOESD_H mprj_io_slow_sel[11] mprj_pads.area1_io_pad\[11\]/HLD_H_N + mprj_pads.area1_io_pad\[11\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[11] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_694469_731669# gpio_pad/VSSIO_Q mprj_io[11] + w_694469_728352# vssio vssio gpio_pad/VDDIO_Q w_692355_728352# vssa1 w_692253_731670# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_4 flash_csb_pad/DM[2] vccd flash_csb_pad/SLOW vssd constant_block Xmprj_pads.area2_io_pad\[15\] mprj_io_analog_en[34] mprj_io_analog_pol[34] mprj_io_analog_sel[34] + mprj_io_dm[104] mprj_io_dm[103] mprj_io_dm[102] porb_h mprj_pads.area2_io_pad\[15\]/TIE_LO_ESD + porb_h mprj_io_one[34] mprj_pads.area2_io_pad\[15\]/TIE_LO_ESD mprj_pads.area2_io_pad\[15\]/HLD_H_N + mprj_io_holdover[34] mprj_io_ib_mode_sel[34] mprj_io_in[34] mprj_pads.area2_io_pad\[15\]/IN_H + mprj_io_inp_dis[34] mprj_io_oeb[34] mprj_io_out[34] mprj_analog_io[27] mprj_pads.area2_io_pad\[15\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[15\]/PAD_A_NOESD_H mprj_io_slow_sel[34] mprj_pads.area2_io_pad\[15\]/HLD_H_N + mprj_pads.area2_io_pad\[15\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[34] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_320874# gpio_pad/VSSIO_Q mprj_io[34] + w_21253_323965# vssio vssio gpio_pad/VDDIO_Q w_23367_323965# vssa2 w_23367_320874# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_5 clock_pad/OE_N vccd clock_pad/OUT vssd constant_block Xmprj_pads.area2_io_pad\[5\] mprj_io_analog_en[24] mprj_io_analog_pol[24] mprj_io_analog_sel[24] + mprj_io_dm[74] mprj_io_dm[73] mprj_io_dm[72] porb_h mprj_pads.area2_io_pad\[5\]/TIE_LO_ESD + porb_h mprj_io_one[24] mprj_pads.area2_io_pad\[5\]/TIE_LO_ESD mprj_pads.area2_io_pad\[5\]/HLD_H_N + mprj_io_holdover[24] mprj_io_ib_mode_sel[24] mprj_io_in[24] mprj_pads.area2_io_pad\[5\]/IN_H + mprj_io_inp_dis[24] mprj_io_oeb[24] mprj_io_out[24] mprj_analog_io[17] mprj_pads.area2_io_pad\[5\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[5\]/PAD_A_NOESD_H mprj_io_slow_sel[24] mprj_pads.area2_io_pad\[5\]/HLD_H_N + mprj_pads.area2_io_pad\[5\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[24] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_21151_963874# gpio_pad/VSSIO_Q mprj_io[24] w_21253_966965# + vssio vssio gpio_pad/VDDIO_Q w_23367_966965# vssa2 w_23367_963874# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[5\] mprj_io_analog_en[5] mprj_io_analog_pol[5] mprj_io_analog_sel[5] + mprj_io_dm[17] mprj_io_dm[16] mprj_io_dm[15] porb_h mprj_pads.area1_io_pad\[5\]/TIE_LO_ESD + porb_h mprj_io_one[5] mprj_pads.area1_io_pad\[5\]/TIE_LO_ESD mprj_pads.area1_io_pad\[5\]/HLD_H_N + mprj_io_holdover[5] mprj_io_ib_mode_sel[5] mprj_io_in[5] mprj_pads.area1_io_pad\[5\]/IN_H + mprj_io_inp_dis[5] mprj_io_oeb[5] mprj_io_out[5] mprj_pads.area1_io_pad\[5\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[5\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[5\]/PAD_A_NOESD_H + mprj_io_slow_sel[5] mprj_pads.area1_io_pad\[5\]/HLD_H_N mprj_pads.area1_io_pad\[5\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[5] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_328869# gpio_pad/VSSIO_Q mprj_io[5] w_694469_325552# vssio vssio gpio_pad/VDDIO_Q + w_692355_325552# vssa1 w_692253_328870# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_6 constant_block_6/one vccd constant_block_6/zero vssd constant_block Xmgmt_vddio_hvclamp_pad\[0\] vddio_pad vssa vdda vccd vssd gpio_pad/VSSIO_Q vccd vddio + vddio vssa vssa vssa gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio + sky130_ef_io__vddio_hvc_clamped_pad Xmprj_pads.area2_io_pad\[13\] mprj_io_analog_en[32] mprj_io_analog_pol[32] mprj_io_analog_sel[32] + mprj_io_dm[98] mprj_io_dm[97] mprj_io_dm[96] porb_h mprj_pads.area2_io_pad\[13\]/TIE_LO_ESD + porb_h mprj_io_one[32] mprj_pads.area2_io_pad\[13\]/TIE_LO_ESD mprj_pads.area2_io_pad\[13\]/HLD_H_N + mprj_io_holdover[32] mprj_io_ib_mode_sel[32] mprj_io_in[32] mprj_pads.area2_io_pad\[13\]/IN_H + mprj_io_inp_dis[32] mprj_io_oeb[32] mprj_io_out[32] mprj_analog_io[25] mprj_pads.area2_io_pad\[13\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[13\]/PAD_A_NOESD_H mprj_io_slow_sel[32] mprj_pads.area2_io_pad\[13\]/HLD_H_N + mprj_pads.area2_io_pad\[13\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[32] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_407274# gpio_pad/VSSIO_Q mprj_io[32] + w_21253_410365# vssio vssio gpio_pad/VDDIO_Q w_23367_410365# vssa2 w_23367_407274# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmgmt_vssio_hvclamp_pad\[1\] vssa2 vdda2 vccd vssd gpio_pad/VSSIO_Q vccd vddio vssio + vddio vssa2 vssa2 vssa2 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio_pad2 + sky130_ef_io__vssio_hvc_clamped_pad Xmprj_pads.area2_io_pad\[3\] mprj_io_analog_en[22] mprj_io_analog_pol[22] mprj_io_analog_sel[22] + mprj_io_dm[68] mprj_io_dm[67] mprj_io_dm[66] porb_h mprj_pads.area2_io_pad\[3\]/TIE_LO_ESD + porb_h mprj_io_one[22] mprj_pads.area2_io_pad\[3\]/TIE_LO_ESD mprj_pads.area2_io_pad\[3\]/HLD_H_N + mprj_io_holdover[22] mprj_io_ib_mode_sel[22] mprj_io_in[22] mprj_pads.area2_io_pad\[3\]/IN_H + mprj_io_inp_dis[22] mprj_io_oeb[22] mprj_io_out[22] mprj_analog_io[15] mprj_pads.area2_io_pad\[3\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[3\]/PAD_A_NOESD_H mprj_io_slow_sel[22] mprj_pads.area2_io_pad\[3\]/HLD_H_N + mprj_pads.area2_io_pad\[3\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[22] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_137274_1014469# gpio_pad/VSSIO_Q mprj_io[22] w_140365_1014469# + vssio vssio gpio_pad/VDDIO_Q w_140365_1012355# vssa2 w_137274_1012253# vssd vccd + vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[3\] mprj_io_analog_en[3] mprj_io_analog_pol[3] mprj_io_analog_sel[3] + mprj_io_dm[11] mprj_io_dm[10] mprj_io_dm[9] porb_h mprj_pads.area1_io_pad\[3\]/TIE_LO_ESD + porb_h mprj_io_one[3] mprj_pads.area1_io_pad\[3\]/TIE_LO_ESD mprj_pads.area1_io_pad\[3\]/HLD_H_N + mprj_io_holdover[3] mprj_io_ib_mode_sel[3] mprj_io_in[3] mprj_pads.area1_io_pad\[3\]/IN_H + mprj_io_inp_dis[3] mprj_io_oeb[3] mprj_io_out[3] mprj_pads.area1_io_pad\[3\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[3\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[3\]/PAD_A_NOESD_H + mprj_io_slow_sel[3] mprj_pads.area1_io_pad\[3\]/HLD_H_N mprj_pads.area1_io_pad\[3\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[3] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_238869# gpio_pad/VSSIO_Q mprj_io[3] w_694469_235552# vssio vssio gpio_pad/VDDIO_Q + w_692355_235552# vssa1 w_692253_238870# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser2_vdda_hvclamp_pad vdda2 vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio vddio vddio + vssa2 vssa2 vssa2 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vdda2_pad + vssio vssa2 sky130_ef_io__vdda_hvc_clamped_pad Xmprj_pads.area1_io_pad\[18\] mprj_io_analog_en[18] mprj_io_analog_pol[18] mprj_io_analog_sel[18] + mprj_io_dm[56] mprj_io_dm[55] mprj_io_dm[54] porb_h mprj_pads.area1_io_pad\[18\]/TIE_LO_ESD + porb_h mprj_io_one[18] mprj_pads.area1_io_pad\[18\]/TIE_LO_ESD mprj_pads.area1_io_pad\[18\]/HLD_H_N + mprj_io_holdover[18] mprj_io_ib_mode_sel[18] mprj_io_in[18] mprj_pads.area1_io_pad\[18\]/IN_H + mprj_io_inp_dis[18] mprj_io_oeb[18] mprj_io_out[18] mprj_analog_io[11] mprj_pads.area1_io_pad\[18\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[18\]/PAD_A_NOESD_H mprj_io_slow_sel[18] mprj_pads.area1_io_pad\[18\]/HLD_H_N + mprj_pads.area1_io_pad\[18\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[18] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_393474_1014469# gpio_pad/VSSIO_Q mprj_io[18] + w_396565_1014469# vssio vssio gpio_pad/VDDIO_Q w_396565_1012355# vssa1 w_393474_1012253# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[11\] mprj_io_analog_en[30] mprj_io_analog_pol[30] mprj_io_analog_sel[30] + mprj_io_dm[92] mprj_io_dm[91] mprj_io_dm[90] porb_h mprj_pads.area2_io_pad\[11\]/TIE_LO_ESD + porb_h mprj_io_one[30] mprj_pads.area2_io_pad\[11\]/TIE_LO_ESD mprj_pads.area2_io_pad\[11\]/HLD_H_N + mprj_io_holdover[30] mprj_io_ib_mode_sel[30] mprj_io_in[30] mprj_pads.area2_io_pad\[11\]/IN_H + mprj_io_inp_dis[30] mprj_io_oeb[30] mprj_io_out[30] mprj_analog_io[23] mprj_pads.area2_io_pad\[11\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[11\]/PAD_A_NOESD_H mprj_io_slow_sel[30] mprj_pads.area2_io_pad\[11\]/HLD_H_N + mprj_pads.area2_io_pad\[11\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[30] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_578074# gpio_pad/VSSIO_Q mprj_io[30] + w_21253_581165# vssio vssio gpio_pad/VDDIO_Q w_23367_581165# vssa2 w_23367_578074# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[1\] mprj_io_analog_en[20] mprj_io_analog_pol[20] mprj_io_analog_sel[20] + mprj_io_dm[62] mprj_io_dm[61] mprj_io_dm[60] porb_h mprj_pads.area2_io_pad\[1\]/TIE_LO_ESD + porb_h mprj_io_one[20] mprj_pads.area2_io_pad\[1\]/TIE_LO_ESD mprj_pads.area2_io_pad\[1\]/HLD_H_N + mprj_io_holdover[20] mprj_io_ib_mode_sel[20] mprj_io_in[20] mprj_pads.area2_io_pad\[1\]/IN_H + mprj_io_inp_dis[20] mprj_io_oeb[20] mprj_io_out[20] mprj_analog_io[13] mprj_pads.area2_io_pad\[1\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[1\]/PAD_A_NOESD_H mprj_io_slow_sel[20] mprj_pads.area2_io_pad\[1\]/HLD_H_N + mprj_pads.area2_io_pad\[1\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[20] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_240074_1014469# gpio_pad/VSSIO_Q mprj_io[20] w_243165_1014469# + vssio vssio gpio_pad/VDDIO_Q w_243165_1012355# vssa2 w_240074_1012253# vssd vccd + vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[1\] mprj_io_analog_en[1] mprj_io_analog_pol[1] mprj_io_analog_sel[1] + mprj_io_dm[5] mprj_io_dm[4] mprj_io_dm[3] porb_h mprj_pads.area1_io_pad\[1\]/TIE_LO_ESD + porb_h mprj_io_one[1] mprj_pads.area1_io_pad\[1\]/TIE_LO_ESD mprj_pads.area1_io_pad\[1\]/HLD_H_N + mprj_io_holdover[1] mprj_io_ib_mode_sel[1] mprj_io_in[1] mprj_pads.area1_io_pad\[1\]/IN_H + mprj_io_inp_dis[1] mprj_io_oeb[1] mprj_io_out[1] mprj_pads.area1_io_pad\[1\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[1\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[1\]/PAD_A_NOESD_H + mprj_io_slow_sel[1] mprj_pads.area1_io_pad\[1\]/HLD_H_N mprj_pads.area1_io_pad\[1\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[1] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_148669# gpio_pad/VSSIO_Q mprj_io[1] w_694469_145352# vssio vssio gpio_pad/VDDIO_Q + w_692355_145352# vssa1 w_692253_148670# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser1_vssd_lvclamp_pad vssa1 vdda1 vccd vssd gpio_pad/VSSIO_Q vccd1 vccd vddio vddio + vddio vssa1 vssa1 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 vssd1_pad + vssio vssd1 sky130_ef_io__vssd_lvc_clamped3_pad Xgpio_pad gpio_pad/SLOW gpio_pad/SLOW gpio_pad/SLOW gpio_mode1_core gpio_mode1_core + gpio_mode0_core porb_h gpio_pad/TIE_LO_ESD porb_h constant_block_0/one gpio_pad/TIE_LO_ESD + gpio_pad/HLD_H_N gpio_pad/SLOW gpio_pad/SLOW gpio_in_core gpio_pad/IN_H gpio_inenb_core + gpio_outenb_core gpio_out_core gpio_pad/PAD_A_ESD_0_H gpio_pad/PAD_A_ESD_1_H gpio_pad/PAD_A_NOESD_H + gpio_pad/SLOW gpio_pad/HLD_H_N gpio_pad/TIE_LO_ESD vdda gpio_pad/SLOW vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa w_517669_21253# gpio_pad/VSSIO_Q gpio + w_514352_21253# vssio vssio gpio_pad/VDDIO_Q w_514352_23367# vssa w_517669_23367# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[16\] mprj_io_analog_en[16] mprj_io_analog_pol[16] mprj_io_analog_sel[16] + mprj_io_dm[50] mprj_io_dm[49] mprj_io_dm[48] porb_h mprj_pads.area1_io_pad\[16\]/TIE_LO_ESD + porb_h mprj_io_one[16] mprj_pads.area1_io_pad\[16\]/TIE_LO_ESD mprj_pads.area1_io_pad\[16\]/HLD_H_N + mprj_io_holdover[16] mprj_io_ib_mode_sel[16] mprj_io_in[16] mprj_pads.area1_io_pad\[16\]/IN_H + mprj_io_inp_dis[16] mprj_io_oeb[16] mprj_io_out[16] mprj_analog_io[9] mprj_pads.area1_io_pad\[16\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[16\]/PAD_A_NOESD_H mprj_io_slow_sel[16] mprj_pads.area1_io_pad\[16\]/HLD_H_N + mprj_pads.area1_io_pad\[16\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[16] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_533874_1014469# gpio_pad/VSSIO_Q mprj_io[16] + w_536965_1014469# vssio vssio gpio_pad/VDDIO_Q w_536965_1012355# vssa1 w_533874_1012253# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser1_vdda_hvclamp_pad\[0\] vdda1 vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio vddio + vddio vssa1 vssa1 vssa1 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vdda1_pad + vssio vssa1 sky130_ef_io__vdda_hvc_clamped_pad Xmgmt_vssd_lvclamp_pad vdda vccd vssio gpio_pad/VSSIO_Q vccd vddio vddio vddio vssa + vssa vssa gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssd_pad vssa vssd + vssio sky130_ef_io__vssd_lvc_clamped_pad Xuser2_vccd_lvclamp_pad vssa2 vdda2 vccd vssd gpio_pad/VSSIO_Q vssd2 vccd vddio vddio + vddio vssa2 vssa2 vssa2 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vccd2 + vssio vccd2_pad sky130_ef_io__vccd_lvc_clamped3_pad Xmgmt_vssa_hvclamp_pad vssa vdda vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio vddio + vddio gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio vssa_pad sky130_ef_io__vssa_hvc_clamped_pad Xuser1_vssa_hvclamp_pad\[1\] vssa1 vdda1 vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio + vddio vddio gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio vssa1_pad2 + sky130_ef_io__vssa_hvc_clamped_pad Xmprj_pads.area1_io_pad\[14\] mprj_io_analog_en[14] mprj_io_analog_pol[14] mprj_io_analog_sel[14] + mprj_io_dm[44] mprj_io_dm[43] mprj_io_dm[42] porb_h mprj_pads.area1_io_pad\[14\]/TIE_LO_ESD + porb_h mprj_io_one[14] mprj_pads.area1_io_pad\[14\]/TIE_LO_ESD mprj_pads.area1_io_pad\[14\]/HLD_H_N + mprj_io_holdover[14] mprj_io_ib_mode_sel[14] mprj_io_in[14] mprj_pads.area1_io_pad\[14\]/IN_H + mprj_io_inp_dis[14] mprj_io_oeb[14] mprj_io_out[14] mprj_analog_io[7] mprj_pads.area1_io_pad\[14\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[14\]/PAD_A_NOESD_H mprj_io_slow_sel[14] mprj_pads.area1_io_pad\[14\]/HLD_H_N + mprj_pads.area1_io_pad\[14\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[14] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_694469_955069# gpio_pad/VSSIO_Q mprj_io[14] + w_694469_951752# vssio vssio gpio_pad/VDDIO_Q w_692355_951752# vssa1 w_692253_955070# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[18\] mprj_io_analog_en[37] mprj_io_analog_pol[37] mprj_io_analog_sel[37] + mprj_io_dm[113] mprj_io_dm[112] mprj_io_dm[111] porb_h mprj_pads.area2_io_pad\[18\]/TIE_LO_ESD + porb_h mprj_io_one[37] mprj_pads.area2_io_pad\[18\]/TIE_LO_ESD mprj_pads.area2_io_pad\[18\]/HLD_H_N + mprj_io_holdover[37] mprj_io_ib_mode_sel[37] mprj_io_in[37] mprj_pads.area2_io_pad\[18\]/IN_H + mprj_io_inp_dis[37] mprj_io_oeb[37] mprj_io_out[37] mprj_pads.area2_io_pad\[18\]/PAD_A_ESD_0_H + mprj_pads.area2_io_pad\[18\]/PAD_A_ESD_1_H mprj_pads.area2_io_pad\[18\]/PAD_A_NOESD_H + mprj_io_slow_sel[37] mprj_pads.area2_io_pad\[18\]/HLD_H_N mprj_pads.area2_io_pad\[18\]/TIE_LO_ESD + vdda2 mprj_io_vtrip_sel[37] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 + w_21151_191274# gpio_pad/VSSIO_Q mprj_io[37] w_21253_194365# vssio vssio gpio_pad/VDDIO_Q + w_23367_194365# vssa2 w_23367_191274# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[8\] mprj_io_analog_en[27] mprj_io_analog_pol[27] mprj_io_analog_sel[27] + mprj_io_dm[83] mprj_io_dm[82] mprj_io_dm[81] porb_h mprj_pads.area2_io_pad\[8\]/TIE_LO_ESD + porb_h mprj_io_one[27] mprj_pads.area2_io_pad\[8\]/TIE_LO_ESD mprj_pads.area2_io_pad\[8\]/HLD_H_N + mprj_io_holdover[27] mprj_io_ib_mode_sel[27] mprj_io_in[27] mprj_pads.area2_io_pad\[8\]/IN_H + mprj_io_inp_dis[27] mprj_io_oeb[27] mprj_io_out[27] mprj_analog_io[20] mprj_pads.area2_io_pad\[8\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[8\]/PAD_A_NOESD_H mprj_io_slow_sel[27] mprj_pads.area2_io_pad\[8\]/HLD_H_N + mprj_pads.area2_io_pad\[8\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[27] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_21151_707674# gpio_pad/VSSIO_Q mprj_io[27] w_21253_710765# + vssio vssio gpio_pad/VDDIO_Q w_23367_710765# vssa2 w_23367_707674# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[8\] mprj_io_analog_en[8] mprj_io_analog_pol[8] mprj_io_analog_sel[8] + mprj_io_dm[26] mprj_io_dm[25] mprj_io_dm[24] porb_h mprj_pads.area1_io_pad\[8\]/TIE_LO_ESD + porb_h mprj_io_one[8] mprj_pads.area1_io_pad\[8\]/TIE_LO_ESD mprj_pads.area1_io_pad\[8\]/HLD_H_N + mprj_io_holdover[8] mprj_io_ib_mode_sel[8] mprj_io_in[8] mprj_pads.area1_io_pad\[8\]/IN_H + mprj_io_inp_dis[8] mprj_io_oeb[8] mprj_io_out[8] mprj_analog_io[1] mprj_pads.area1_io_pad\[8\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[8\]/PAD_A_NOESD_H mprj_io_slow_sel[8] mprj_pads.area1_io_pad\[8\]/HLD_H_N + mprj_pads.area1_io_pad\[8\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[8] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa1 w_694469_596469# gpio_pad/VSSIO_Q mprj_io[8] w_694469_593152# + vssio vssio gpio_pad/VDDIO_Q w_692355_593152# vssa1 w_692253_596470# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xresetb_pad xresloop resetb_core_h xres_vss_loop constant_block_6/one xresloop porb_h + xres_vss_loop xres_vss_loop xres_vss_loop resetb_pad/TIE_HI_ESD xres_vss_loop xres_vss_loop + vssio vssa vssd vdda vccd gpio_pad/VSSIO_Q resetb vccd vddio vddio vssio vddio vssa + vssa gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa sky130_fd_io__top_xres4v2 Xmprj_pads.area1_io_pad\[12\] mprj_io_analog_en[12] mprj_io_analog_pol[12] mprj_io_analog_sel[12] + mprj_io_dm[38] mprj_io_dm[37] mprj_io_dm[36] porb_h mprj_pads.area1_io_pad\[12\]/TIE_LO_ESD + porb_h mprj_io_one[12] mprj_pads.area1_io_pad\[12\]/TIE_LO_ESD mprj_pads.area1_io_pad\[12\]/HLD_H_N + mprj_io_holdover[12] mprj_io_ib_mode_sel[12] mprj_io_in[12] mprj_pads.area1_io_pad\[12\]/IN_H + mprj_io_inp_dis[12] mprj_io_oeb[12] mprj_io_out[12] mprj_analog_io[5] mprj_pads.area1_io_pad\[12\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[12\]/PAD_A_NOESD_H mprj_io_slow_sel[12] mprj_pads.area1_io_pad\[12\]/HLD_H_N + mprj_pads.area1_io_pad\[12\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[12] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_694469_776669# gpio_pad/VSSIO_Q mprj_io[12] + w_694469_773352# vssio vssio gpio_pad/VDDIO_Q w_692355_773352# vssa1 w_692253_776670# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[16\] mprj_io_analog_en[35] mprj_io_analog_pol[35] mprj_io_analog_sel[35] + mprj_io_dm[107] mprj_io_dm[106] mprj_io_dm[105] porb_h mprj_pads.area2_io_pad\[16\]/TIE_LO_ESD + porb_h mprj_io_one[35] mprj_pads.area2_io_pad\[16\]/TIE_LO_ESD mprj_pads.area2_io_pad\[16\]/HLD_H_N + mprj_io_holdover[35] mprj_io_ib_mode_sel[35] mprj_io_in[35] mprj_pads.area2_io_pad\[16\]/IN_H + mprj_io_inp_dis[35] mprj_io_oeb[35] mprj_io_out[35] mprj_analog_io[28] mprj_pads.area2_io_pad\[16\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[16\]/PAD_A_NOESD_H mprj_io_slow_sel[35] mprj_pads.area2_io_pad\[16\]/HLD_H_N + mprj_pads.area2_io_pad\[16\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[35] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_277674# gpio_pad/VSSIO_Q mprj_io[35] + w_21253_280765# vssio vssio gpio_pad/VDDIO_Q w_23367_280765# vssa2 w_23367_277674# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[6\] mprj_io_analog_en[25] mprj_io_analog_pol[25] mprj_io_analog_sel[25] + mprj_io_dm[77] mprj_io_dm[76] mprj_io_dm[75] porb_h mprj_pads.area2_io_pad\[6\]/TIE_LO_ESD + porb_h mprj_io_one[25] mprj_pads.area2_io_pad\[6\]/TIE_LO_ESD mprj_pads.area2_io_pad\[6\]/HLD_H_N + mprj_io_holdover[25] mprj_io_ib_mode_sel[25] mprj_io_in[25] mprj_pads.area2_io_pad\[6\]/IN_H + mprj_io_inp_dis[25] mprj_io_oeb[25] mprj_io_out[25] mprj_analog_io[18] mprj_pads.area2_io_pad\[6\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[6\]/PAD_A_NOESD_H mprj_io_slow_sel[25] mprj_pads.area2_io_pad\[6\]/HLD_H_N + mprj_pads.area2_io_pad\[6\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[25] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_21151_794074# gpio_pad/VSSIO_Q mprj_io[25] w_21253_797165# + vssio vssio gpio_pad/VDDIO_Q w_23367_797165# vssa2 w_23367_794074# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xflash_csb_pad flash_csb_pad/SLOW flash_csb_pad/SLOW flash_csb_pad/SLOW flash_csb_pad/DM[2] + flash_csb_pad/DM[2] flash_csb_pad/SLOW porb_h flash_csb_pad/TIE_LO_ESD porb_h flash_csb_pad/DM[2] + flash_csb_pad/TIE_LO_ESD flash_csb_pad/HLD_H_N flash_csb_pad/SLOW flash_csb_pad/SLOW + flash_csb_pad/IN flash_csb_pad/IN_H flash_csb_pad/SLOW flash_csb_oeb_core flash_csb_core + flash_csb_pad/PAD_A_ESD_0_H flash_csb_pad/PAD_A_ESD_1_H flash_csb_pad/PAD_A_NOESD_H + flash_csb_pad/SLOW flash_csb_pad/HLD_H_N flash_csb_pad/TIE_LO_ESD vdda flash_csb_pad/SLOW + vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa w_298469_21253# gpio_pad/VSSIO_Q + flash_csb w_295152_21253# vssio vssio gpio_pad/VDDIO_Q w_295152_23367# vssa w_298469_23367# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[6\] mprj_io_analog_en[6] mprj_io_analog_pol[6] mprj_io_analog_sel[6] + mprj_io_dm[20] mprj_io_dm[19] mprj_io_dm[18] porb_h mprj_pads.area1_io_pad\[6\]/TIE_LO_ESD + porb_h mprj_io_one[6] mprj_pads.area1_io_pad\[6\]/TIE_LO_ESD mprj_pads.area1_io_pad\[6\]/HLD_H_N + mprj_io_holdover[6] mprj_io_ib_mode_sel[6] mprj_io_in[6] mprj_pads.area1_io_pad\[6\]/IN_H + mprj_io_inp_dis[6] mprj_io_oeb[6] mprj_io_out[6] mprj_pads.area1_io_pad\[6\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[6\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[6\]/PAD_A_NOESD_H + mprj_io_slow_sel[6] mprj_pads.area1_io_pad\[6\]/HLD_H_N mprj_pads.area1_io_pad\[6\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[6] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_374069# gpio_pad/VSSIO_Q mprj_io[6] w_694469_370752# vssio vssio gpio_pad/VDDIO_Q + w_692355_370752# vssa1 w_692253_374070# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[10\] mprj_io_analog_en[10] mprj_io_analog_pol[10] mprj_io_analog_sel[10] + mprj_io_dm[32] mprj_io_dm[31] mprj_io_dm[30] porb_h mprj_pads.area1_io_pad\[10\]/TIE_LO_ESD + porb_h mprj_io_one[10] mprj_pads.area1_io_pad\[10\]/TIE_LO_ESD mprj_pads.area1_io_pad\[10\]/HLD_H_N + mprj_io_holdover[10] mprj_io_ib_mode_sel[10] mprj_io_in[10] mprj_pads.area1_io_pad\[10\]/IN_H + mprj_io_inp_dis[10] mprj_io_oeb[10] mprj_io_out[10] mprj_analog_io[3] mprj_pads.area1_io_pad\[10\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[10\]/PAD_A_NOESD_H mprj_io_slow_sel[10] mprj_pads.area1_io_pad\[10\]/HLD_H_N + mprj_pads.area1_io_pad\[10\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[10] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_694469_686669# gpio_pad/VSSIO_Q mprj_io[10] + w_694469_683352# vssio vssio gpio_pad/VDDIO_Q w_692355_683352# vssa1 w_692253_686670# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xflash_io1_pad flash_io1_pad/SLOW flash_io1_pad/SLOW flash_io1_pad/SLOW flash_io1_ieb_core + flash_io1_ieb_core flash_io1_oeb_core porb_h flash_io1_pad/TIE_LO_ESD porb_h constant_block_1/one + flash_io1_pad/TIE_LO_ESD flash_io1_pad/HLD_H_N flash_io1_pad/SLOW flash_io1_pad/SLOW + flash_io1_di_core flash_io1_pad/IN_H flash_io1_ieb_core flash_io1_oeb_core flash_io1_do_core + flash_io1_pad/PAD_A_ESD_0_H flash_io1_pad/PAD_A_ESD_1_H flash_io1_pad/PAD_A_NOESD_H + flash_io1_pad/SLOW flash_io1_pad/HLD_H_N flash_io1_pad/TIE_LO_ESD vdda flash_io1_pad/SLOW + vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa w_462869_21253# gpio_pad/VSSIO_Q + flash_io1 w_459552_21253# vssio vssio gpio_pad/VDDIO_Q w_459552_23367# vssa w_462869_23367# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmgmt_vddio_hvclamp_pad\[1\] vddio_pad2 vssa2 vdda2 vccd vssd gpio_pad/VSSIO_Q vccd + vddio vddio vssa2 vssa2 vssa2 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A + vssio sky130_ef_io__vddio_hvc_clamped_pad Xmprj_pads.area2_io_pad\[14\] mprj_io_analog_en[33] mprj_io_analog_pol[33] mprj_io_analog_sel[33] + mprj_io_dm[101] mprj_io_dm[100] mprj_io_dm[99] porb_h mprj_pads.area2_io_pad\[14\]/TIE_LO_ESD + porb_h mprj_io_one[33] mprj_pads.area2_io_pad\[14\]/TIE_LO_ESD mprj_pads.area2_io_pad\[14\]/HLD_H_N + mprj_io_holdover[33] mprj_io_ib_mode_sel[33] mprj_io_in[33] mprj_pads.area2_io_pad\[14\]/IN_H + mprj_io_inp_dis[33] mprj_io_oeb[33] mprj_io_out[33] mprj_analog_io[26] mprj_pads.area2_io_pad\[14\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[14\]/PAD_A_NOESD_H mprj_io_slow_sel[33] mprj_pads.area2_io_pad\[14\]/HLD_H_N + mprj_pads.area2_io_pad\[14\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[33] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_364074# gpio_pad/VSSIO_Q mprj_io[33] + w_21253_367165# vssio vssio gpio_pad/VDDIO_Q w_23367_367165# vssa2 w_23367_364074# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[4\] mprj_io_analog_en[23] mprj_io_analog_pol[23] mprj_io_analog_sel[23] + mprj_io_dm[71] mprj_io_dm[70] mprj_io_dm[69] porb_h mprj_pads.area2_io_pad\[4\]/TIE_LO_ESD + porb_h mprj_io_one[23] mprj_pads.area2_io_pad\[4\]/TIE_LO_ESD mprj_pads.area2_io_pad\[4\]/HLD_H_N + mprj_io_holdover[23] mprj_io_ib_mode_sel[23] mprj_io_in[23] mprj_pads.area2_io_pad\[4\]/IN_H + mprj_io_inp_dis[23] mprj_io_oeb[23] mprj_io_out[23] mprj_analog_io[16] mprj_pads.area2_io_pad\[4\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[4\]/PAD_A_NOESD_H mprj_io_slow_sel[23] mprj_pads.area2_io_pad\[4\]/HLD_H_N + mprj_pads.area2_io_pad\[4\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[23] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_85874_1014469# gpio_pad/VSSIO_Q mprj_io[23] w_88965_1014469# + vssio vssio gpio_pad/VDDIO_Q w_88965_1012355# vssa2 w_85874_1012253# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[4\] mprj_io_analog_en[4] mprj_io_analog_pol[4] mprj_io_analog_sel[4] + mprj_io_dm[14] mprj_io_dm[13] mprj_io_dm[12] porb_h mprj_pads.area1_io_pad\[4\]/TIE_LO_ESD + porb_h mprj_io_one[4] mprj_pads.area1_io_pad\[4\]/TIE_LO_ESD mprj_pads.area1_io_pad\[4\]/HLD_H_N + mprj_io_holdover[4] mprj_io_ib_mode_sel[4] mprj_io_in[4] mprj_pads.area1_io_pad\[4\]/IN_H + mprj_io_inp_dis[4] mprj_io_oeb[4] mprj_io_out[4] mprj_pads.area1_io_pad\[4\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[4\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[4\]/PAD_A_NOESD_H + mprj_io_slow_sel[4] mprj_pads.area1_io_pad\[4\]/HLD_H_N mprj_pads.area1_io_pad\[4\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[4] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_283869# gpio_pad/VSSIO_Q mprj_io[4] w_694469_280552# vssio vssio gpio_pad/VDDIO_Q + w_692355_280552# vssa1 w_692253_283870# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser2_vssd_lvclamp_pad vssa2 vdda2 vccd vssd gpio_pad/VSSIO_Q vccd2 vccd vddio vddio + vddio vssa2 vssa2 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 vssd2_pad + vssio vssd2 sky130_ef_io__vssd_lvc_clamped3_pad Xmprj_pads.area2_io_pad\[12\] mprj_io_analog_en[31] mprj_io_analog_pol[31] mprj_io_analog_sel[31] + mprj_io_dm[95] mprj_io_dm[94] mprj_io_dm[93] porb_h mprj_pads.area2_io_pad\[12\]/TIE_LO_ESD + porb_h mprj_io_one[31] mprj_pads.area2_io_pad\[12\]/TIE_LO_ESD mprj_pads.area2_io_pad\[12\]/HLD_H_N + mprj_io_holdover[31] mprj_io_ib_mode_sel[31] mprj_io_in[31] mprj_pads.area2_io_pad\[12\]/IN_H + mprj_io_inp_dis[31] mprj_io_oeb[31] mprj_io_out[31] mprj_analog_io[24] mprj_pads.area2_io_pad\[12\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[12\]/PAD_A_NOESD_H mprj_io_slow_sel[31] mprj_pads.area2_io_pad\[12\]/HLD_H_N + mprj_pads.area2_io_pad\[12\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[31] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_534874# gpio_pad/VSSIO_Q mprj_io[31] + w_21253_537965# vssio vssio gpio_pad/VDDIO_Q w_23367_537965# vssa2 w_23367_534874# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmgmt_vssio_hvclamp_pad\[0\] vssa vdda vccd vssd gpio_pad/VSSIO_Q vccd vddio vssio + vddio vssa vssa vssa gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio_pad + sky130_ef_io__vssio_hvc_clamped_pad Xmprj_pads.area2_io_pad\[2\] mprj_io_analog_en[21] mprj_io_analog_pol[21] mprj_io_analog_sel[21] + mprj_io_dm[65] mprj_io_dm[64] mprj_io_dm[63] porb_h mprj_pads.area2_io_pad\[2\]/TIE_LO_ESD + porb_h mprj_io_one[21] mprj_pads.area2_io_pad\[2\]/TIE_LO_ESD mprj_pads.area2_io_pad\[2\]/HLD_H_N + mprj_io_holdover[21] mprj_io_ib_mode_sel[21] mprj_io_in[21] mprj_pads.area2_io_pad\[2\]/IN_H + mprj_io_inp_dis[21] mprj_io_oeb[21] mprj_io_out[21] mprj_analog_io[14] mprj_pads.area2_io_pad\[2\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[2\]/PAD_A_NOESD_H mprj_io_slow_sel[21] mprj_pads.area2_io_pad\[2\]/HLD_H_N + mprj_pads.area2_io_pad\[2\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[21] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_188674_1014469# gpio_pad/VSSIO_Q mprj_io[21] w_191765_1014469# + vssio vssio gpio_pad/VDDIO_Q w_191765_1012355# vssa2 w_188674_1012253# vssd vccd + vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser2_vssa_hvclamp_pad vssa2 vdda2 vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio vddio + vddio gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio vssa2_pad sky130_ef_io__vssa_hvc_clamped_pad Xmprj_pads.area1_io_pad\[2\] mprj_io_analog_en[2] mprj_io_analog_pol[2] mprj_io_analog_sel[2] + mprj_io_dm[8] mprj_io_dm[7] mprj_io_dm[6] porb_h mprj_pads.area1_io_pad\[2\]/TIE_LO_ESD + porb_h mprj_io_one[2] mprj_pads.area1_io_pad\[2\]/TIE_LO_ESD mprj_pads.area1_io_pad\[2\]/HLD_H_N + mprj_io_holdover[2] mprj_io_ib_mode_sel[2] mprj_io_in[2] mprj_pads.area1_io_pad\[2\]/IN_H + mprj_io_inp_dis[2] mprj_io_oeb[2] mprj_io_out[2] mprj_pads.area1_io_pad\[2\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[2\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[2\]/PAD_A_NOESD_H + mprj_io_slow_sel[2] mprj_pads.area1_io_pad\[2\]/HLD_H_N mprj_pads.area1_io_pad\[2\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[2] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_193669# gpio_pad/VSSIO_Q mprj_io[2] w_694469_190352# vssio vssio gpio_pad/VDDIO_Q + w_692355_190352# vssa1 w_692253_193670# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[17\] mprj_io_analog_en[17] mprj_io_analog_pol[17] mprj_io_analog_sel[17] + mprj_io_dm[53] mprj_io_dm[52] mprj_io_dm[51] porb_h mprj_pads.area1_io_pad\[17\]/TIE_LO_ESD + porb_h mprj_io_one[17] mprj_pads.area1_io_pad\[17\]/TIE_LO_ESD mprj_pads.area1_io_pad\[17\]/HLD_H_N + mprj_io_holdover[17] mprj_io_ib_mode_sel[17] mprj_io_in[17] mprj_pads.area1_io_pad\[17\]/IN_H + mprj_io_inp_dis[17] mprj_io_oeb[17] mprj_io_out[17] mprj_analog_io[10] mprj_pads.area1_io_pad\[17\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[17\]/PAD_A_NOESD_H mprj_io_slow_sel[17] mprj_pads.area1_io_pad\[17\]/HLD_H_N + mprj_pads.area1_io_pad\[17\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[17] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_482474_1014469# gpio_pad/VSSIO_Q mprj_io[17] + w_485565_1014469# vssio vssio gpio_pad/VDDIO_Q w_485565_1012355# vssa1 w_482474_1012253# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser1_vdda_hvclamp_pad\[1\] vdda1 vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio vddio + vddio vssa1 vssa1 vssa1 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vdda1_pad2 + vssio vssa1 sky130_ef_io__vdda_hvc_clamped_pad Xmprj_pads.area2_io_pad\[10\] mprj_io_analog_en[29] mprj_io_analog_pol[29] mprj_io_analog_sel[29] + mprj_io_dm[89] mprj_io_dm[88] mprj_io_dm[87] porb_h mprj_pads.area2_io_pad\[10\]/TIE_LO_ESD + porb_h mprj_io_one[29] mprj_pads.area2_io_pad\[10\]/TIE_LO_ESD mprj_pads.area2_io_pad\[10\]/HLD_H_N + mprj_io_holdover[29] mprj_io_ib_mode_sel[29] mprj_io_in[29] mprj_pads.area2_io_pad\[10\]/IN_H + mprj_io_inp_dis[29] mprj_io_oeb[29] mprj_io_out[29] mprj_analog_io[22] mprj_pads.area2_io_pad\[10\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[10\]/PAD_A_NOESD_H mprj_io_slow_sel[29] mprj_pads.area2_io_pad\[10\]/HLD_H_N + mprj_pads.area2_io_pad\[10\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[29] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa2 w_21151_621274# gpio_pad/VSSIO_Q mprj_io[29] + w_21253_624365# vssio vssio gpio_pad/VDDIO_Q w_23367_624365# vssa2 w_23367_621274# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[0\] mprj_io_analog_en[19] mprj_io_analog_pol[19] mprj_io_analog_sel[19] + mprj_io_dm[59] mprj_io_dm[58] mprj_io_dm[57] porb_h mprj_pads.area2_io_pad\[0\]/TIE_LO_ESD + porb_h mprj_io_one[19] mprj_pads.area2_io_pad\[0\]/TIE_LO_ESD mprj_pads.area2_io_pad\[0\]/HLD_H_N + mprj_io_holdover[19] mprj_io_ib_mode_sel[19] mprj_io_in[19] mprj_pads.area2_io_pad\[0\]/IN_H + mprj_io_inp_dis[19] mprj_io_oeb[19] mprj_io_out[19] mprj_analog_io[12] mprj_pads.area2_io_pad\[0\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[0\]/PAD_A_NOESD_H mprj_io_slow_sel[19] mprj_pads.area2_io_pad\[0\]/HLD_H_N + mprj_pads.area2_io_pad\[0\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[19] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_291674_1014469# gpio_pad/VSSIO_Q mprj_io[19] w_294765_1014469# + vssio vssio gpio_pad/VDDIO_Q w_294765_1012355# vssa2 w_291674_1012253# vssd vccd + vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area1_io_pad\[0\] mprj_io_analog_en[0] mprj_io_analog_pol[0] mprj_io_analog_sel[0] + mprj_io_dm[2] mprj_io_dm[1] mprj_io_dm[0] porb_h mprj_pads.area1_io_pad\[0\]/TIE_LO_ESD + porb_h mprj_io_one[0] mprj_pads.area1_io_pad\[0\]/TIE_LO_ESD mprj_pads.area1_io_pad\[0\]/HLD_H_N + mprj_io_holdover[0] mprj_io_ib_mode_sel[0] mprj_io_in[0] mprj_pads.area1_io_pad\[0\]/IN_H + mprj_io_inp_dis[0] mprj_io_oeb[0] mprj_io_out[0] mprj_pads.area1_io_pad\[0\]/PAD_A_ESD_0_H + mprj_pads.area1_io_pad\[0\]/PAD_A_ESD_1_H mprj_pads.area1_io_pad\[0\]/PAD_A_NOESD_H + mprj_io_slow_sel[0] mprj_pads.area1_io_pad\[0\]/HLD_H_N mprj_pads.area1_io_pad\[0\]/TIE_LO_ESD + vdda1 mprj_io_vtrip_sel[0] vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 + w_694469_103469# gpio_pad/VSSIO_Q mprj_io[0] w_694469_100152# vssio vssio gpio_pad/VDDIO_Q + w_692355_100152# vssa1 w_692253_103470# vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmgmt_vdda_hvclamp_pad vdda vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio vddio vddio + vssa vssa vssa gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vdda_pad vssio + vssa sky130_ef_io__vdda_hvc_clamped_pad Xmprj_pads.area1_io_pad\[15\] mprj_io_analog_en[15] mprj_io_analog_pol[15] mprj_io_analog_sel[15] + mprj_io_dm[47] mprj_io_dm[46] mprj_io_dm[45] porb_h mprj_pads.area1_io_pad\[15\]/TIE_LO_ESD + porb_h mprj_io_one[15] mprj_pads.area1_io_pad\[15\]/TIE_LO_ESD mprj_pads.area1_io_pad\[15\]/HLD_H_N + mprj_io_holdover[15] mprj_io_ib_mode_sel[15] mprj_io_in[15] mprj_pads.area1_io_pad\[15\]/IN_H + mprj_io_inp_dis[15] mprj_io_oeb[15] mprj_io_out[15] mprj_analog_io[8] mprj_pads.area1_io_pad\[15\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[15\]/PAD_A_NOESD_H mprj_io_slow_sel[15] mprj_pads.area1_io_pad\[15\]/HLD_H_N + mprj_pads.area1_io_pad\[15\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[15] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_635674_1014469# gpio_pad/VSSIO_Q mprj_io[15] + w_638765_1014469# vssio vssio gpio_pad/VDDIO_Q w_638765_1012355# vssa1 w_635674_1012253# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xmprj_pads.area2_io_pad\[9\] mprj_io_analog_en[28] mprj_io_analog_pol[28] mprj_io_analog_sel[28] + mprj_io_dm[86] mprj_io_dm[85] mprj_io_dm[84] porb_h mprj_pads.area2_io_pad\[9\]/TIE_LO_ESD + porb_h mprj_io_one[28] mprj_pads.area2_io_pad\[9\]/TIE_LO_ESD mprj_pads.area2_io_pad\[9\]/HLD_H_N + mprj_io_holdover[28] mprj_io_ib_mode_sel[28] mprj_io_in[28] mprj_pads.area2_io_pad\[9\]/IN_H + mprj_io_inp_dis[28] mprj_io_oeb[28] mprj_io_out[28] mprj_analog_io[21] mprj_pads.area2_io_pad\[9\]/PAD_A_ESD_1_H + mprj_pads.area2_io_pad\[9\]/PAD_A_NOESD_H mprj_io_slow_sel[28] mprj_pads.area2_io_pad\[9\]/HLD_H_N + mprj_pads.area2_io_pad\[9\]/TIE_LO_ESD vdda2 mprj_io_vtrip_sel[28] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa2 w_21151_664474# gpio_pad/VSSIO_Q mprj_io[28] w_21253_667565# + vssio vssio gpio_pad/VDDIO_Q w_23367_667565# vssa2 w_23367_664474# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xflash_io0_pad flash_io0_pad/SLOW flash_io0_pad/SLOW flash_io0_pad/SLOW flash_io0_ieb_core + flash_io0_ieb_core flash_io0_oeb_core porb_h flash_io0_pad/TIE_LO_ESD porb_h constant_block_2/one + flash_io0_pad/TIE_LO_ESD flash_io0_pad/HLD_H_N flash_io0_pad/SLOW flash_io0_pad/SLOW + flash_io0_di_core flash_io0_pad/IN_H flash_io0_ieb_core flash_io0_oeb_core flash_io0_do_core + flash_io0_pad/PAD_A_ESD_0_H flash_io0_pad/PAD_A_ESD_1_H flash_io0_pad/PAD_A_NOESD_H + flash_io0_pad/SLOW flash_io0_pad/HLD_H_N flash_io0_pad/TIE_LO_ESD vdda flash_io0_pad/SLOW + vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa w_408069_21253# gpio_pad/VSSIO_Q + flash_io0 w_404752_21253# vssio vssio gpio_pad/VDDIO_Q w_404752_23367# vssa w_408069_23367# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xuser1_vssa_hvclamp_pad\[0\] vssa1 vdda1 vccd vssio vssd gpio_pad/VSSIO_Q vccd vddio + vddio vddio gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssio vssa1_pad + sky130_ef_io__vssa_hvc_clamped_pad Xmprj_pads.area1_io_pad\[9\] mprj_io_analog_en[9] mprj_io_analog_pol[9] mprj_io_analog_sel[9] + mprj_io_dm[29] mprj_io_dm[28] mprj_io_dm[27] porb_h mprj_pads.area1_io_pad\[9\]/TIE_LO_ESD + porb_h mprj_io_one[9] mprj_pads.area1_io_pad\[9\]/TIE_LO_ESD mprj_pads.area1_io_pad\[9\]/HLD_H_N + mprj_io_holdover[9] mprj_io_ib_mode_sel[9] mprj_io_in[9] mprj_pads.area1_io_pad\[9\]/IN_H + mprj_io_inp_dis[9] mprj_io_oeb[9] mprj_io_out[9] mprj_analog_io[2] mprj_pads.area1_io_pad\[9\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[9\]/PAD_A_NOESD_H mprj_io_slow_sel[9] mprj_pads.area1_io_pad\[9\]/HLD_H_N + mprj_pads.area1_io_pad\[9\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[9] vddio vddio gpio_pad/AMUXBUS_B + gpio_pad/AMUXBUS_A vssa1 w_694469_641469# gpio_pad/VSSIO_Q mprj_io[9] w_694469_638152# + vssio vssio gpio_pad/VDDIO_Q w_692355_638152# vssa1 w_692253_641470# vssd vccd vccd + vddio sky130_ef_io__gpiov2_pad_wrapped Xflash_clk_pad flash_clk_pad/SLOW flash_clk_pad/SLOW flash_clk_pad/SLOW flash_clk_pad/DM[2] + flash_clk_pad/DM[2] flash_clk_pad/SLOW porb_h flash_clk_pad/TIE_LO_ESD porb_h flash_clk_pad/DM[2] + flash_clk_pad/TIE_LO_ESD flash_clk_pad/HLD_H_N flash_clk_pad/SLOW flash_clk_pad/SLOW + flash_clk_pad/IN flash_clk_pad/IN_H flash_clk_pad/SLOW flash_clk_oeb_core flash_clk_core + flash_clk_pad/PAD_A_ESD_0_H flash_clk_pad/PAD_A_ESD_1_H flash_clk_pad/PAD_A_NOESD_H + flash_clk_pad/SLOW flash_clk_pad/HLD_H_N flash_clk_pad/TIE_LO_ESD vdda flash_clk_pad/SLOW + vddio vddio gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa w_353269_21253# gpio_pad/VSSIO_Q + flash_clk w_349952_21253# vssio vssio gpio_pad/VDDIO_Q w_349952_23367# vssa w_353269_23367# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_0 constant_block_0/one vccd gpio_pad/SLOW vssd constant_block Xuser1_vccd_lvclamp_pad vssa1 vdda1 vccd vssd gpio_pad/VSSIO_Q vssd1 vccd vddio vddio + vddio vssa1 vssa1 vssa1 gpio_pad/VDDIO_Q gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vccd1 + vssio vccd1_pad sky130_ef_io__vccd_lvc_clamped3_pad Xmprj_pads.area1_io_pad\[13\] mprj_io_analog_en[13] mprj_io_analog_pol[13] mprj_io_analog_sel[13] + mprj_io_dm[41] mprj_io_dm[40] mprj_io_dm[39] porb_h mprj_pads.area1_io_pad\[13\]/TIE_LO_ESD + porb_h mprj_io_one[13] mprj_pads.area1_io_pad\[13\]/TIE_LO_ESD mprj_pads.area1_io_pad\[13\]/HLD_H_N + mprj_io_holdover[13] mprj_io_ib_mode_sel[13] mprj_io_in[13] mprj_pads.area1_io_pad\[13\]/IN_H + mprj_io_inp_dis[13] mprj_io_oeb[13] mprj_io_out[13] mprj_analog_io[6] mprj_pads.area1_io_pad\[13\]/PAD_A_ESD_1_H + mprj_pads.area1_io_pad\[13\]/PAD_A_NOESD_H mprj_io_slow_sel[13] mprj_pads.area1_io_pad\[13\]/HLD_H_N + mprj_pads.area1_io_pad\[13\]/TIE_LO_ESD vdda1 mprj_io_vtrip_sel[13] vddio vddio + gpio_pad/AMUXBUS_B gpio_pad/AMUXBUS_A vssa1 w_694469_865869# gpio_pad/VSSIO_Q mprj_io[13] + w_694469_862552# vssio vssio gpio_pad/VDDIO_Q w_692355_862552# vssa1 w_692253_865870# + vssd vccd vccd vddio sky130_ef_io__gpiov2_pad_wrapped Xconstant_block_1 constant_block_1/one vccd flash_io1_pad/SLOW vssd constant_block .ends .subckt NF_sky130_fd_sc_hd__decap_8 VPWR VGND VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=2.89e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=2.89e+06u .ends .subckt NF_sky130_fd_sc_hd__decap_4 VGND VPWR VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=1.05e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=1.05e+06u .ends .subckt NF_sky130_ef_sc_hd__decap_12 VGND VPWR VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=4.73e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=4.73e+06u .ends .subckt NF_sky130_fd_sc_hd__diode_2 DIODE VGND VPWR VPB VNB D0 VNB DIODE sky130_fd_pr__diode_pw2nd_05v5 pj=2.64e+06 area=4.347e+11 .ends .subckt NF_sky130_fd_sc_hd__clkbuf_16 X A VGND VPWR VNB VPB X0 VPWR A a_110_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_110_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_110_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_110_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND A a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_110_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 VPWR A a_110_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X29 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X30 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X33 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X36 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X37 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X38 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X39 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__decap_6 VPWR VGND VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=1.97e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=1.97e+06u .ends .subckt NF_sky130_fd_sc_hd__decap_3 VPWR VGND VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=870000u l=590000u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=550000u l=590000u .ends .subckt NF_sky130_fd_sc_hd__a211o_1 VGND VPWR X A2 B1 A1 C1 VNB VPB X0 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_80_21# C1 a_472_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A2 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND B1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_300_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_217_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_80_21# A1 a_300_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_472_297# B1 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_80_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__mux2_1 VGND VPWR S A1 A0 X VNB VPB X0 VPWR a_505_21# a_535_374# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_505_21# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_218_374# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND a_505_21# a_439_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_76_199# A0 a_218_374# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_505_21# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_439_47# A0 a_76_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_535_374# A1 a_76_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_76_199# A1 a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_218_47# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_76_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_76_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a211oi_2 A2 C1 B1 Y A1 VPWR VGND VNB VPB X0 VGND A2 a_485_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A1 a_292_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_37_297# B1 a_292_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_485_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_292_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_292_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_485_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_37_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A1 a_485_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y C1 a_37_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_292_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_292_297# B1 a_37_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o211a_1 C1 B1 A2 A1 X VGND VPWR VNB VPB X0 VGND A1 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_510_47# B1 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_79_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_79_21# A2 a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_297_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_79_21# C1 a_510_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_215_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4b_1 VGND VPWR C A_N X D B VNB VPB X0 a_297_47# a_27_47# a_193_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_369_47# B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VPWR D a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_193_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND D a_469_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_193_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_193_413# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_193_413# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_469_47# C a_369_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__buf_6 VPWR VGND X A VNB VPB X0 VPWR a_161_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_161_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_161_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_161_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A a_161_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_161_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_161_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND a_161_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_161_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_161_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_161_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_161_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_161_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR A a_161_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND a_161_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_161_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o41a_1 A1 A2 A3 A4 B1 X VGND VPWR VNB VPB X0 VGND A4 a_321_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_321_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_103_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_103_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_103_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_321_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_321_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_511_297# A3 a_393_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_619_297# A2 a_511_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_321_47# B1 a_103_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_393_297# A4 a_103_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR A1 a_619_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a221o_1 X B1 A1 B2 A2 VGND VPWR C1 VNB VPB X0 a_465_47# A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_109_297# B1 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_205_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_193_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# B1 a_205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_109_297# C1 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A2 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a32o_1 X A3 B2 B1 A1 A2 VGND VPWR VNB VPB X0 a_93_21# A1 a_346_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_93_21# B1 a_250_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_584_47# B1 a_93_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_93_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND B2 a_584_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_256_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_250_297# B2 a_93_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_93_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_250_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A2 a_250_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_250_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_346_47# A2 a_256_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor2_1 B Y A VGND VPWR VNB VPB X0 VPWR A a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_109_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__buf_12 A X VGND VPWR VNB VPB X0 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__buf_4 VPWR VGND X A VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o31a_4 X B1 A3 A2 A1 VGND VPWR VNB VPB X0 VPWR A1 a_926_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A1 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_926_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A3 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_102_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_926_297# A2 a_672_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_102_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_496_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_102_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_102_21# B1 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_102_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_102_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_102_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_102_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_672_297# A3 a_102_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_496_47# B1 a_102_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_102_21# A3 a_672_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND a_102_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_102_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_496_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR B1 a_102_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_496_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_672_297# A2 a_926_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dfxtp_1 Q CLK D VPWR VGND VNB VPB X0 Q a_1059_315# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_891_413# a_193_47# a_634_159# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X2 a_561_413# a_27_47# a_466_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X4 Q a_1059_315# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND a_634_159# a_592_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR a_891_413# a_1059_315# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_466_413# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VPWR a_634_159# a_561_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_634_159# a_466_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X11 a_634_159# a_466_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=750000u l=150000u X12 a_975_413# a_193_47# a_891_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VGND a_1059_315# a_1017_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_891_413# a_27_47# a_634_159# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 a_592_47# a_193_47# a_466_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X17 a_1017_47# a_27_47# a_891_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X18 VPWR a_1059_315# a_975_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_466_413# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X20 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X21 VGND a_891_413# a_1059_315# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dlygate4sd3_1 A X VGND VPWR VNB VPB X0 VPWR A a_49_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VGND a_285_47# a_391_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X2 X a_391_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A a_49_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR a_285_47# a_391_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X5 a_285_47# a_49_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X6 a_285_47# a_49_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X7 X a_391_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dfxtp_2 Q CLK D VPWR VGND VNB VPB X0 Q a_1059_315# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_891_413# a_193_47# a_634_159# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X2 VPWR a_1059_315# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_561_413# a_27_47# a_466_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X5 Q a_1059_315# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND a_634_159# a_592_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND a_1059_315# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_891_413# a_1059_315# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_466_413# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VPWR a_634_159# a_561_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_634_159# a_466_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X13 a_634_159# a_466_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=750000u l=150000u X14 a_975_413# a_193_47# a_891_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 VGND a_1059_315# a_1017_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_891_413# a_27_47# a_634_159# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_592_47# a_193_47# a_466_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X19 a_1017_47# a_27_47# a_891_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X20 VPWR a_1059_315# a_975_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 a_466_413# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X22 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X23 VGND a_891_413# a_1059_315# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkbuf_8 X A VGND VPWR VNB VPB X0 VPWR A a_110_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_110_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND A a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_110_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or4b_4 D_N B C A X VGND VPWR VNB VPB X0 X a_215_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND a_215_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_215_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_109_93# D_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_215_297# a_109_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND C a_215_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A a_215_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_215_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_215_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_109_93# D_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR A a_487_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_215_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_487_297# B a_403_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_403_297# C a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_215_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 X a_215_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 X a_215_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_297_297# a_109_93# a_215_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__buf_8 A X VGND VPWR VNB VPB X0 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_27_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2_1 Y B A VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A a_113_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_113_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a31o_1 A2 B1 A1 A3 X VGND VPWR VNB VPB X0 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_209_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_303_47# A2 a_209_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_209_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND B1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_80_21# A1 a_303_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_209_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_80_21# B1 a_209_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_209_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21bo_1 X A1 B1_N A2 VGND VPWR VNB VPB X0 a_298_297# a_27_413# a_215_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_215_297# a_27_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_298_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_215_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR B1_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_215_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_382_47# A1 a_215_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B1_N a_27_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR A1 a_298_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_382_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21a_2 A1 B1 A2 X VGND VPWR VNB VPB X0 VPWR A1 a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_384_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_470_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_384_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_384_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and3_4 A B C X VGND VPWR VNB VPB X0 VPWR A a_94_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_294_47# B a_185_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_185_47# A a_94_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_94_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND C a_294_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_94_47# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_94_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_94_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR C a_94_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_94_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND a_94_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_94_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND a_94_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_94_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21a_1 X A1 B1 A2 VGND VPWR VNB VPB X0 VPWR A1 a_382_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_297_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_297_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_382_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a211oi_4 A2 A1 C1 Y B1 VPWR VGND VNB VPB X0 Y A1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_949_297# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y C1 a_949_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_781_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_297# B1 a_781_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_781_297# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_1301_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y C1 a_781_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_109_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_109_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_109_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_27_297# B1 a_1301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_109_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o221a_1 A2 X B1 C1 A1 B2 VGND VPWR VNB VPB X0 a_240_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_51_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A1 a_240_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_51_297# B2 a_245_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_149_47# C1 a_51_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_240_47# B1 a_149_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A1 a_512_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_51_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_149_47# B2 a_240_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_245_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR C1 a_51_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_512_297# A2 a_51_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o311a_1 X A1 A2 A3 B1 C1 VGND VPWR VNB VPB X0 a_585_47# B1 a_266_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A2 a_266_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_81_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_81_21# C1 a_585_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_81_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_266_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_368_297# A2 a_266_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_266_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_266_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_81_21# A3 a_368_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_81_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR B1 a_81_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21o_1 A2 A1 B1 X VPWR VGND VNB VPB X0 a_81_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_299_297# B1 a_81_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR a_81_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_81_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_384_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_299_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_384_47# A1 a_81_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a41o_1 VGND VPWR A3 A4 A2 X B1 A1 VNB VPB X0 a_465_47# A2 a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A4 a_561_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A3 a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_297_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_297_297# A4 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A1 a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_381_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_297_297# B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_79_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_561_47# A3 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a31oi_1 VGND VPWR Y B1 A2 A1 A3 VNB VPB X0 Y A1 a_181_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_181_47# A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dfxtp_4 VGND VPWR D CLK Q VNB VPB X0 Q a_1062_300# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_1020_47# a_27_47# a_891_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X2 a_572_47# a_193_47# a_475_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X3 VPWR a_1062_300# a_975_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_634_183# a_475_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X5 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X6 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_475_413# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X8 VGND a_1062_300# a_1020_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VPWR a_634_183# a_568_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 Q a_1062_300# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_568_413# a_27_47# a_475_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_634_183# a_475_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=750000u l=150000u X13 a_975_413# a_193_47# a_891_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_891_413# a_27_47# a_634_183# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 Q a_1062_300# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND a_891_413# a_1062_300# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR a_1062_300# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND a_1062_300# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Q a_1062_300# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X22 VGND a_1062_300# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 VPWR a_891_413# a_1062_300# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_891_413# a_193_47# a_634_183# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X26 a_475_413# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 VGND a_634_183# a_572_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X29 VPWR a_1062_300# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a22o_1 A1 A2 X B2 B1 VPWR VGND VNB VPB X0 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_27_297# B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A2 a_373_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_373_47# A1 a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_27_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_109_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_109_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and3_1 VGND VPWR X B A C VNB VPB X0 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR C a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_181_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND C a_181_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_27_47# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or3b_1 A C_N X B VGND VPWR VNB VPB X0 a_109_93# C_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_215_53# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND a_109_93# a_215_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND A a_215_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR A a_369_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_369_297# B a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_215_53# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_297_297# a_109_93# a_215_53# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_109_93# C_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 X a_215_53# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and3_2 B X A C VPWR VGND VNB VPB X0 VPWR a_29_311# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_29_311# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A a_29_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND a_29_311# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_184_53# B a_112_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR C a_29_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_29_311# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_112_53# A a_29_311# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_29_311# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND C a_184_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o22a_1 A2 X B1 A1 B2 VGND VPWR VNB VPB X0 a_78_199# B1 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A1 a_493_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_493_297# A2 a_78_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_78_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A2 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_78_199# B2 a_292_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_215_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_215_47# B2 a_78_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_292_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_78_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a22o_2 A1 A2 X B2 B1 VPWR VGND VNB VPB X0 VPWR a_27_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A2 a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_27_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_381_47# A1 a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_109_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_109_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and2b_1 X A_N B VGND VPWR VNB VPB X0 VPWR B a_207_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_207_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_297_47# a_27_413# a_207_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_207_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_207_413# a_27_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_27_413# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and2_1 VPWR VGND X B A VNB VPB X0 VPWR B a_59_75# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_59_75# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND B a_145_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_59_75# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 X a_59_75# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_145_75# A a_59_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21ai_1 VGND VPWR A2 A1 B1 Y VNB VPB X0 Y A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=700000u l=150000u X2 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4_1 X C A B D VGND VPWR VNB VPB X0 a_27_47# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_197_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_303_47# C a_197_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR D a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND D a_303_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21ai_2 B1 Y A2 A1 VGND VPWR VNB VPB X0 VGND A2 a_29_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B1 a_29_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_112_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_29_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A2 a_112_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND A1 a_29_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_112_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_112_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_29_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_29_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o31a_1 X A2 B1 A1 A3 VGND VPWR VNB VPB X0 a_103_199# B1 a_253_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR a_103_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_337_297# A2 a_253_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_103_199# A3 a_337_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_253_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B1 a_103_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_103_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_253_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_253_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND A2 a_253_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a311oi_4 Y B1 A1 A3 C1 A2 VPWR VGND VNB VPB X0 a_27_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_1139_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_109_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A3 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# B1 a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_1139_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_445_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_109_297# B1 a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_445_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VPWR A3 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_1139_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 Y C1 a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_1139_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 Y A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 a_445_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 a_109_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 Y C1 a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 a_445_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X36 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X38 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkbuf_4 X A VGND VPWR VNB VPB X0 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__inv_2 A Y VPWR VGND VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a311o_1 A1 A2 X B1 C1 A3 VGND VPWR VNB VPB X0 a_75_199# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_208_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_315_47# A2 a_208_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND B1 a_75_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_75_199# A1 a_315_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_75_199# C1 a_544_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_544_297# B1 a_201_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_75_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_201_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A2 a_201_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_201_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_75_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__mux2_4 X S A0 A1 VPWR VGND VNB VPB X0 a_204_297# A1 a_396_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_396_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_396_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR S a_314_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_204_297# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_396_47# A0 a_314_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_206_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_396_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_396_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_396_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_490_47# A1 a_396_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND S a_490_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_396_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_396_47# A0 a_206_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND a_396_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VPWR S a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_396_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND S a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__mux4_1 S0 A1 X S1 A2 A0 A3 VGND VPWR VNB VPB X0 a_277_47# a_247_21# a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VGND S0 a_247_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_834_97# a_247_21# a_750_97# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND A3 a_668_97# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_1290_413# S1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_834_97# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_750_97# S0 a_757_363# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_27_47# S0 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 X a_1478_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR S0 a_247_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 X a_1478_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_193_47# A0 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_750_97# a_1290_413# a_1478_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_1478_413# S1 a_277_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_1290_413# S1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 a_277_47# a_247_21# a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_750_97# S0 a_668_97# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_923_363# a_247_21# a_750_97# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_757_363# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 VPWR A3 a_923_363# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 a_277_47# a_1290_413# a_1478_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 a_193_413# A0 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 a_193_413# S0 a_277_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 a_1478_413# S1 a_750_97# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and3b_4 A_N X C B VGND VPWR VNB VPB X0 a_98_199# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_56_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_56_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_56_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_98_199# a_56_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_56_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_56_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_257_47# B a_152_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_56_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_56_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_152_47# a_98_199# a_56_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR C a_56_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_98_199# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_56_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND C a_257_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 X a_56_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2111o_1 VGND VPWR B1 X D1 A1 A2 C1 VNB VPB X0 VGND A2 a_660_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND C1 a_85_193# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_414_297# C1 a_334_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_85_193# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_334_297# D1 a_85_193# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_516_297# B1 a_414_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_516_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_660_47# A1 a_85_193# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_85_193# D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_516_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_85_193# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_85_193# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor4_1 D C Y A B VGND VPWR VNB VPB X0 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_191_297# C a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_297_297# B a_191_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21ba_1 B1_N A1 X A2 VGND VPWR VNB VPB X0 a_222_93# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A1 a_544_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_79_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_222_93# B1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A2 a_448_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_448_47# a_222_93# a_79_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_79_199# a_222_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_544_297# A2 a_79_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_448_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_79_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a31oi_4 Y B1 A1 A3 A2 VPWR VGND VNB VPB X0 a_27_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_445_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_445_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_445_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_445_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand4_1 C B Y D A VPWR VGND VNB VPB X0 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_193_47# C a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y A a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_277_47# B a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or4b_1 B D_N A X C VPWR VGND VNB VPB X0 X a_215_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_109_53# D_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_215_297# a_109_53# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_215_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_392_297# C a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_465_297# B a_392_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_215_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR A a_465_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_297_297# a_109_53# a_215_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_109_53# D_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VGND C a_215_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND A a_215_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a211oi_1 A1 C1 B1 Y A2 VPWR VGND VNB VPB X0 a_56_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A2 a_56_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_139_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_311_297# B1 a_56_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y C1 a_311_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A1 a_139_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor3_1 C Y A B VGND VPWR VNB VPB X0 VPWR A a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_193_297# B a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_109_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor2_2 B Y A VGND VPWR VNB VPB X0 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or2_2 B X A VPWR VGND VNB VPB X0 a_121_297# B a_39_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_39_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_39_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_39_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_39_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A a_121_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND A a_39_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_39_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2_8 A B Y VGND VPWR VNB VPB X0 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a311oi_2 C1 A3 Y B1 A1 A2 VGND VPWR VNB VPB X0 Y A1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_641_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_109_297# B1 a_641_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_277_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A3 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_47# A2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_641_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_277_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y C1 a_641_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a221o_4 A1 B1 C1 B2 X A2 VPWR VGND VNB VPB X0 VGND A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B2 a_1053_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_804_297# B1 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_79_21# A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_445_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_804_297# C1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_445_297# B1 a_804_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_1053_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_79_21# C1 a_804_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_1053_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_445_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND C1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_804_297# B2 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_79_21# B1 a_1053_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_79_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_445_297# B2 a_804_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_445_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_445_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR A2 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VPWR A1 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkinv_16 Y A VGND VPWR VNB VPB X0 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X32 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X33 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X35 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X37 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand3_1 Y A C B VGND VPWR VNB VPB X0 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_193_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a221o_2 X B1 A1 B2 A2 VGND VPWR C1 VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_465_47# A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_109_297# B1 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_205_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_193_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_47# B1 a_205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_109_297# C1 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A2 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or4b_2 C A X B D_N VPWR VGND VNB VPB X0 a_176_21# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VGND D_N a_27_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND a_176_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_176_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_176_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_555_297# C a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_176_21# a_27_53# a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 X a_176_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_387_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_483_297# B a_387_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VGND B a_176_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND a_27_53# a_176_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 VPWR D_N a_27_53# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_176_21# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2_2 Y A B VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2bb2o_1 VGND VPWR B1 A1_N A2_N X B2 VNB VPB X0 a_226_47# A2_N a_226_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_489_413# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_226_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR B2 a_489_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_489_413# a_226_47# a_76_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_76_199# a_226_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND B1 a_556_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_556_47# B2 a_76_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND A2_N a_226_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_226_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_76_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_76_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21boi_1 Y A1 B1_N A2 VPWR VGND VNB VPB X0 a_300_297# a_27_413# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A2 a_384_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B1_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 Y a_27_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_300_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_384_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND B1_N a_27_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_300_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21oi_4 B1 A2 A1 Y VGND VPWR VNB VPB X0 a_28_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_462_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y B1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_462_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_28_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_462_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A1 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_28_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A2 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND A2 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_28_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_28_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND A2 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VPWR A2 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_28_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y A1 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_462_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VPWR A1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21bai_1 A1 Y B1_N A2 VPWR VGND VNB VPB X0 a_388_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_105_352# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_297_47# a_105_352# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_297_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_388_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR B1_N a_105_352# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 Y a_105_352# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o211a_2 C1 B1 A2 A1 X VPWR VGND VNB VPB X0 a_27_47# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR C1 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_373_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_182_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_182_47# B1 a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_373_297# A2 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_110_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A1 a_182_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21oi_1 A1 B1 Y A2 VPWR VGND VNB VPB X0 a_199_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_113_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A1 a_113_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_113_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_199_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or4bb_1 A X B D_N C_N VPWR VGND VNB VPB X0 VGND A a_311_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A a_561_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_393_413# a_205_93# a_311_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND C_N a_27_410# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR C_N a_27_410# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_311_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_410# a_311_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_561_297# B a_489_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_205_93# D_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_205_93# D_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_489_297# a_27_410# a_393_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_311_413# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_311_413# a_205_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 X a_311_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a221oi_4 A2 Y C1 A1 B2 B1 VPWR VGND VNB VPB X0 Y A1 a_1241_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_453_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y B1 a_453_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A1 a_1241_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y C1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_471_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y B1 a_453_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND A2 a_1241_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A2 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_453_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_471_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND B2 a_453_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_1241_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_27_297# B2 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_453_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_1241_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_1241_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VPWR A2 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_471_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_471_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_471_297# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR A1 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 Y C1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_27_297# B1 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND A2 a_1241_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_471_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_27_297# B1 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_1241_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 a_471_297# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 VPWR A1 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 a_27_297# B2 a_471_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 a_471_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 a_27_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 a_453_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 VGND B2 a_453_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__mux2_2 VGND VPWR A1 A0 S X VNB VPB X0 VPWR S a_591_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X1 a_591_369# A0 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_79_21# A1 a_306_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X4 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND S a_578_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_306_369# a_257_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X7 a_79_21# A0 a_288_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_288_47# a_257_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_257_199# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_578_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_257_199# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X13 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or2_1 A X B VGND VPWR VNB VPB X0 VGND A a_68_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_68_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_68_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A a_150_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 X a_68_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_150_297# B a_68_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkinv_8 Y A VGND VPWR VNB VPB X0 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o211ai_1 A1 A2 Y C1 B1 VGND VPWR VNB VPB X0 a_110_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A2 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_326_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y C1 a_326_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkinv_4 A Y VPWR VGND VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a311oi_1 A3 Y C1 B1 A2 A1 VPWR VGND VNB VPB X0 Y A1 a_194_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_194_47# A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y C1 a_376_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_376_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2111ai_1 D1 C1 A2 A1 B1 Y VGND VPWR VNB VPB X0 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_235_47# C1 a_163_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_343_47# B1 a_235_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_454_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_454_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_163_47# D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND A2 a_343_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_343_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2b_1 Y A_N B VGND VPWR VNB VPB X0 VGND A_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 Y a_27_93# a_206_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_206_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_93# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or4bb_4 D_N B A C_N X VGND VPWR VNB VPB X0 VPWR a_315_380# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_315_380# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_315_380# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND C_N a_27_410# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR C_N a_27_410# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A a_583_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_410# a_315_380# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_583_297# B a_499_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND A a_315_380# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_397_297# a_205_93# a_315_380# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_315_380# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_315_380# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_499_297# a_27_410# a_397_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VPWR a_315_380# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_205_93# D_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_205_93# D_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 VGND a_315_380# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND a_315_380# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_315_380# a_205_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_315_380# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and2_2 VPWR VGND A X B VNB VPB X0 X a_61_75# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_61_75# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR B a_61_75# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND B a_147_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 X a_61_75# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND a_61_75# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_61_75# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_147_75# A a_61_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4b_4 X D C B A_N VGND VPWR VNB VPB X0 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_815_47# B a_701_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR C a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_174_21# a_27_47# a_815_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_701_47# C a_617_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_174_21# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_174_21# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR a_27_47# a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_617_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2111a_1 X D1 C1 B1 A2 A1 VPWR VGND VNB VPB X0 a_676_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_512_47# B1 a_409_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_306_47# D1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_512_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR C1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_676_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_512_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_409_47# C1 a_306_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_79_21# D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2bb2o_4 B1 B2 X A1_N A2_N VGND VPWR VNB VPB X0 VGND a_415_21# a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_415_21# A2_N a_717_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_717_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A2_N a_415_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_193_47# a_415_21# a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_193_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_193_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_193_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_415_21# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_415_21# A2_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_193_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_297# B2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_193_47# B2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_193_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A1_N a_415_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND a_193_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_109_47# B2 a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_193_47# a_415_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR a_193_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_27_297# a_415_21# a_193_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 X a_193_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR A1_N a_717_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_717_297# A2_N a_415_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_109_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__mux4_2 VGND VPWR X S0 A2 A3 S1 A1 A0 VNB VPB X0 a_600_345# S1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X1 a_788_316# S1 a_288_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VPWR A3 a_372_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 a_872_316# a_600_345# a_788_316# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR S0 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X5 a_1279_413# S0 a_872_316# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND a_788_316# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_1060_369# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 a_872_316# a_27_47# a_1060_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_1281_47# a_27_47# a_872_316# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X10 a_193_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_1064_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_872_316# S1 a_788_316# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=540000u l=150000u X13 a_872_316# S0 a_1064_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X14 X a_788_316# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_788_316# a_600_345# a_288_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=540000u l=150000u X16 a_372_413# a_27_47# a_288_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VGND A3 a_397_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_600_345# S1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_193_369# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X20 VPWR a_788_316# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_288_47# S0 a_193_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 a_397_47# S0 a_288_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X23 VGND A0 a_1281_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 a_288_47# a_27_47# a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X25 X a_788_316# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND S0 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 VPWR A0 a_1279_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4bb_1 VGND VPWR A_N D X C B_N VNB VPB X0 VPWR D a_343_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_223_47# B_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_515_93# a_223_47# a_429_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_223_47# B_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_343_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_429_93# a_27_47# a_343_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND D a_615_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_343_93# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_343_93# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_615_93# C a_515_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 X a_343_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR a_223_47# a_343_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__xnor2_1 VGND VPWR B Y A VNB VPB X0 a_377_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_47_47# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_129_47# B a_47_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_285_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y a_47_47# a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A a_129_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A a_47_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_47_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y B a_377_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_285_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4_2 X C A B D VGND VPWR VNB VPB X0 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND D a_304_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_198_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_27_47# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_304_47# C a_198_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR D a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand4_4 A D C B Y VPWR VGND VNB VPB X0 a_27_47# C a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# C a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_445_47# B a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_445_47# B a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_27_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y A a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_803_47# B a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_803_47# B a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND D a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_445_47# C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_803_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_445_47# C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_803_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND D a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkbuf_1 VGND VPWR X A VNB VPB X0 VPWR a_75_212# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=790000u l=150000u X1 a_75_212# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=520000u l=150000u X2 a_75_212# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=790000u l=150000u X3 VGND a_75_212# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=520000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__buf_2 VPWR VGND X A VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkbuf_2 A X VGND VPWR VNB VPB X0 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dlymetal6s2s_1 VPWR VGND A X VNB VPB X0 a_558_47# a_381_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND X a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_841_47# a_664_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A a_62_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A a_62_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_558_47# a_381_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_62_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR X a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_841_47# a_664_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_62_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_558_47# a_664_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND a_558_47# a_664_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a31o_4 B1 A2 A3 A1 X VGND VPWR VNB VPB X0 VPWR a_277_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_277_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_277_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_277_47# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_277_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_277_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_193_47# A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_361_47# A1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_277_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND A3 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 X a_277_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_277_47# A1 a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_445_47# A2 a_361_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND B1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_297# B1 a_277_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR a_277_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_277_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__xor2_1 B X A VPWR VGND VNB VPB X0 X a_35_297# a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X B a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_35_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_117_297# B a_35_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR B a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A a_35_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND a_35_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_285_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A a_117_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_285_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4_4 X C A B D VGND VPWR VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_188_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND D a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR D a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_27_47# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_285_47# C a_188_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor3_2 C Y A B VGND VPWR VNB VPB X0 Y C a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_281_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_281_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_297# B a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o32a_1 X A3 A1 A2 B1 B2 VPWR VGND VNB VPB X0 a_77_199# B2 a_227_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_323_297# A2 a_227_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_227_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_227_47# B1 a_77_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_77_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B1 a_539_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_227_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_77_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_77_199# A3 a_323_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_227_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_227_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_539_297# B2 a_77_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a22oi_4 A2 B2 A1 B1 Y VGND VPWR VNB VPB X0 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y A1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A2 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_803_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_803_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_803_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_803_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 VGND A2 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor2_8 Y A B VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a31o_2 X B1 A3 A1 A2 VGND VPWR VNB VPB X0 VPWR A2 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_277_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_79_21# B1 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_277_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_361_47# A2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_277_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_79_21# A1 a_361_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and2_4 X B A VGND VPWR VNB VPB X0 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND B a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_110_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2bb2a_1 A1_N X A2_N B2 B1 VPWR VGND VNB VPB X0 a_206_369# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_206_369# A2_N a_205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND B2 a_489_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_585_369# B2 a_76_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_489_47# a_206_369# a_76_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_489_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR A2_N a_206_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_76_199# a_206_369# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_205_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VPWR a_76_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR B1 a_585_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND a_76_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and3b_1 A_N B X C VGND VPWR VNB VPB X0 a_109_93# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_209_311# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_109_93# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_296_53# a_109_93# a_209_311# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR C a_209_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_368_53# B a_296_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_209_311# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_209_311# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR a_109_93# a_209_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND C a_368_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2111oi_1 B1 D1 C1 Y A2 A1 VPWR VGND VNB VPB X0 a_316_297# C1 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_420_297# B1 a_316_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A1 a_420_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_568_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_420_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_217_297# D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_568_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2111ai_2 A1 A2 B1 C1 D1 Y VPWR VGND VNB VPB X0 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_298_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A1 a_497_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_664_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A2 a_497_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_298_47# B1 a_497_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_497_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y D1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_497_47# B1 a_298_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y A2 a_664_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_27_47# C1 a_298_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_47# D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_497_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A1 a_664_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_664_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o22ai_4 A1 Y A2 B1 B2 VGND VPWR VNB VPB X0 a_33_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A1 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A2 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_33_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_797_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A2 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_797_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y B2 a_797_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_115_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR B1 a_797_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_33_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A1 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_33_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_33_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y A2 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_33_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_797_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_115_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR B1 a_797_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND A2 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_33_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_797_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR A1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 Y B2 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 Y B2 a_797_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y B1 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 Y B2 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_115_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 Y B1 a_33_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_33_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_115_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a211o_4 VGND VPWR C1 B1 X A2 A1 VNB VPB X0 X a_79_204# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A1 a_473_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_473_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_79_204# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND C1 a_79_204# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_79_204# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR a_79_204# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_473_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_473_297# B1 a_727_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_79_204# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND B1 a_79_204# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_79_204# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_79_204# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_1123_47# A1 a_79_204# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_555_297# B1 a_473_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A2 a_473_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND A2 a_1123_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_951_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR a_79_204# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND a_79_204# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_79_204# A1 a_951_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_79_204# C1 a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_727_297# C1 a_79_204# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 X a_79_204# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21oi_2 B1 A2 A1 Y VGND VPWR VNB VPB X0 VGND A2 a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A1 a_114_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_114_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_285_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a32oi_2 B2 A3 A2 A1 Y B1 VGND VPWR VNB VPB X0 Y A1 a_478_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_478_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_478_47# A2 a_730_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND A3 a_730_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_730_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_730_47# A2 a_478_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4b_2 VPWR VGND X A_N D C B VNB VPB X0 VPWR a_193_413# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_297_47# a_27_413# a_193_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_369_47# B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_193_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR D a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND D a_469_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND a_193_413# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR B a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_193_413# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 X a_193_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_193_413# a_27_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_469_47# C a_369_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_27_413# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21o_4 A2 A1 X B1 VGND VPWR VNB VPB X0 VGND B1 a_84_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_741_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_84_21# A1 a_741_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_901_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_84_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_483_297# B1 a_84_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_84_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_84_21# B1 a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_84_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_84_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_483_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A1 a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND a_84_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 X a_84_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_84_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_483_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 X a_84_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_901_47# A1 a_84_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_84_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2bb2ai_4 A1_N B1 B2 A2_N Y VGND VPWR VNB VPB X0 a_1241_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_113_47# A2_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_807_47# a_113_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND B2 a_807_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_113_47# A2_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND B2 a_807_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A2_N a_113_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B1 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y a_113_47# a_807_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_1241_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y B2 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y a_113_47# a_807_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_27_47# A2_N a_113_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_807_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR A1_N a_113_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_113_47# A2_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# A2_N a_113_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_807_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_27_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_807_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_1241_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR a_113_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_27_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_807_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_113_47# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y B2 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y a_113_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VPWR a_113_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_113_47# A2_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_1241_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VGND A1_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND B1 a_807_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 Y a_113_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VGND A1_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X34 VGND B1 a_807_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 VPWR B1 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 VPWR A1_N a_113_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 a_113_47# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 VPWR A2_N a_113_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 a_807_47# a_113_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or3b_2 A B C_N X VPWR VGND VNB VPB X0 a_388_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR C_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND a_176_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_176_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_176_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND B a_176_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_176_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_176_21# a_27_47# a_472_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_472_297# B a_388_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_176_21# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_176_21# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND C_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or3b_4 A B C_N X VGND VPWR VNB VPB X0 a_176_21# a_27_47# a_626_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_626_297# B a_542_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR C_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND a_176_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_542_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_176_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_176_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_176_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_176_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_176_21# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_176_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_176_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_176_21# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND a_176_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND B a_176_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND C_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or2_4 X A B VGND VPWR VNB VPB X0 a_121_297# B a_35_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_35_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_35_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_35_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_35_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR a_35_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_35_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_35_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A a_121_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_35_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A a_35_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_35_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2bb2o_2 VGND VPWR B1 A1_N A2_N X B2 VNB VPB X0 VPWR a_82_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_646_47# B2 a_82_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_574_369# a_313_47# a_82_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 a_574_369# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X4 VGND a_82_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B2 a_574_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X6 X a_82_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_82_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_313_47# A2_N a_313_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X9 a_313_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_313_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X11 VGND A2_N a_313_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_82_21# a_313_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VGND B1 a_646_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a22o_4 B1 B2 X A2 A1 VGND VPWR VNB VPB X0 a_484_297# B2 a_96_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND B2 a_566_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_96_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_96_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_96_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_96_21# B1 a_484_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_96_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_96_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND a_96_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_484_297# B1 a_96_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_484_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A2 a_918_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_96_21# B2 a_484_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_96_21# B1 a_566_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_484_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A1 a_484_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_96_21# A1 a_918_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VPWR A2 a_484_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_566_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_918_47# A1 a_96_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_566_47# B1 a_96_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_918_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 X a_96_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND a_96_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o31a_2 X A1 A2 B1 A3 VGND VPWR VNB VPB X0 a_108_21# B1 a_346_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_346_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_108_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_108_21# A3 a_430_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_430_297# A2 a_346_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_108_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_346_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A2 a_346_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_108_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR B1 a_108_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND a_108_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_346_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o311a_2 X A2 A3 A1 B1 C1 VPWR VGND VNB VPB X0 X a_91_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_91_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_360_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR B1 a_91_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_360_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_360_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_360_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_91_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_91_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_91_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_677_47# B1 a_360_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_460_297# A2 a_360_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_91_21# C1 a_677_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_91_21# A3 a_460_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o211ai_4 A1 B1 A2 C1 Y VGND VPWR VNB VPB X0 VPWR A1 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A2 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_806_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_110_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_110_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_110_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# B1 a_1314_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y A2 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y C1 a_978_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Y C1 a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_27_47# B1 a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_110_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_806_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_978_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_1314_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4bb_2 VGND VPWR A_N C B_N X D VNB VPB X0 a_174_21# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_174_21# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_476_47# a_27_47# a_174_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_548_47# a_505_280# a_476_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR D a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND D a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_505_280# a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_505_280# B_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_505_280# B_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_639_47# C a_548_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o41ai_4 A1 A2 A3 A4 Y B1 VGND VPWR VNB VPB X0 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_467_297# A4 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A1 a_1243_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y A4 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A4 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_1243_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A4 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A1 a_1243_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_467_297# A4 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_1243_297# A2 a_885_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y A4 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_885_297# A2 a_1243_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_1243_297# A2 a_885_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_467_297# A3 a_885_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_885_297# A2 a_1243_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 a_885_297# A3 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 a_467_297# A3 a_885_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 a_1243_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 a_885_297# A3 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21ba_2 B1_N A1 X A2 VGND VPWR VNB VPB X0 VGND B1_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VGND A2 a_478_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_478_47# a_27_93# a_174_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_478_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A1 a_574_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR B1_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_574_297# A2 a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_174_21# a_27_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a31oi_2 A3 B1 Y A1 A2 VPWR VGND VNB VPB X0 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_277_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_27_47# A2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_277_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a211o_2 X A2 A1 B1 C1 VGND VPWR VNB VPB X0 a_79_21# A1 a_348_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_79_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_79_21# C1 a_585_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_299_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_585_297# B1 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_348_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21o_2 X B1 A1 A2 VGND VPWR VNB VPB X0 VPWR a_80_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_80_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_80_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_386_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_80_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_80_199# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_386_297# B1 a_80_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_458_47# A1 a_80_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A1 a_386_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_458_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2_4 Y A B VGND VPWR VNB VPB X0 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand3_2 A Y B C VGND VPWR VNB VPB X0 VGND C a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_277_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_47# B a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_277_47# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand4_2 B A Y D C VGND VPWR VNB VPB X0 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_471_47# B a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_47# C a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_277_47# B a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y A a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_277_47# C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_471_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND D a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o311ai_1 Y A1 A2 A3 B1 C1 VGND VPWR VNB VPB X0 VGND A2 a_138_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_138_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_138_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y A3 a_222_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y C1 a_458_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_222_297# A2 a_138_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_458_47# B1 a_138_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_138_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor4b_1 C B A D_N Y VGND VPWR VNB VPB X0 Y a_91_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_91_199# D_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A a_341_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_245_297# C a_161_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_341_297# B a_245_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_91_199# D_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_161_297# a_91_199# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o31ai_1 Y A2 A1 A3 B1 VPWR VGND VNB VPB X0 Y B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y A3 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_193_297# A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor4_2 C D Y A B VGND VPWR VNB VPB X0 a_281_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_475_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y D a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND D Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_475_297# C a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_281_297# C a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_297# B a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o22ai_1 A2 B1 Y A1 B2 VGND VPWR VNB VPB X0 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A1 a_307_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_307_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21bai_4 Y B1_N A1 A2 VGND VPWR VNB VPB X0 Y a_33_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_225_47# a_33_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_33_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_33_297# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y a_33_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A2 a_561_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y a_33_297# a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y a_33_297# a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND A2 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND A2 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_561_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_225_47# a_33_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR A1 a_561_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_225_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_225_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_225_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_225_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VPWR A1 a_561_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_561_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR B1_N a_33_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_561_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VGND A1 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y A2 a_561_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND A1 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_561_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VPWR a_33_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2b_2 B Y A_N VGND VPWR VNB VPB X0 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND B a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y a_27_93# a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_229_47# a_27_93# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y a_27_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_27_93# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_229_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a22oi_1 B1 A1 B2 A2 Y VPWR VGND VNB VPB X0 Y B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_381_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_109_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND A2 a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__inv_6 Y A VPWR VGND VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2111ai_4 A1 A2 B1 C1 D1 Y VGND VPWR VNB VPB X0 a_27_47# C1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_803_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_47# C1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_1163_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND A2 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y A2 a_1163_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_1163_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_445_47# B1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_445_47# B1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A1 a_1163_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_47# D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_1163_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_803_47# B1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR A1 a_1163_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_803_47# B1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 Y D1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_445_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 a_803_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_1163_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 Y A2 a_1163_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_445_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X34 a_803_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 a_803_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X37 VPWR D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 Y D1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 VGND A1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor4_4 A C Y D B VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_807_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y D a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_807_297# C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND D Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND D Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_807_297# C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_449_297# C a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_449_297# C a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_807_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 Y D a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__inv_12 A Y VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__clkinv_2 Y A VPWR VGND VNB VPB X0 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21bo_2 B1_N A2 X A1 VGND VPWR VNB VPB X0 VPWR A1 a_485_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_485_297# a_297_93# a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_297_93# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_581_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_79_21# a_297_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A2 a_581_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_297_93# B1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_485_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a41o_4 X A4 A3 A2 A1 B1 VGND VPWR VNB VPB X0 a_639_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_639_47# A2 a_889_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A3 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_889_47# A2 a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_889_47# A3 a_1079_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_467_297# A4 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_467_297# B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_467_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A4 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_1079_47# A3 a_889_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_79_21# B1 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_79_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_1079_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VPWR A2 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_467_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_79_21# A1 a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VPWR A1 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_467_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VGND A4 a_1079_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o311ai_4 Y C1 B1 A3 A2 A1 VGND VPWR VNB VPB X0 a_39_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A1 a_39_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_125_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_125_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_125_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_1163_47# B1 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_39_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_1163_47# B1 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A3 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A1 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A3 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_39_297# A2 a_461_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A1 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_125_47# B1 a_1163_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_125_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND A2 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_125_47# B1 a_1163_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND A2 a_125_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y C1 a_1163_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y C1 a_1163_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_461_297# A2 a_39_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y A3 a_461_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 Y A3 a_461_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_125_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 VPWR A1 a_39_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_461_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_461_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 a_125_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 a_1163_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X36 a_1163_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X37 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 a_39_297# A2 a_461_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 a_461_297# A2 a_39_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2111a_2 D1 C1 A2 A1 B1 X VGND VPWR VNB VPB X0 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_80_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_80_21# D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR C1 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 X a_80_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_80_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_674_297# A2 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_386_47# D1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_674_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_566_47# B1 a_458_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A2 a_566_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_566_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_458_47# C1 a_386_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a22oi_2 A1 A2 B1 B2 Y VPWR VGND VNB VPB X0 a_109_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_467_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_467_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A1 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A2 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_109_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21ai_4 Y B1 A2 A1 VPWR VGND VNB VPB X0 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_115_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_115_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A2 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y B1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_32_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y B1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A2 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_32_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_32_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_32_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_115_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_32_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_32_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND A2 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y A2 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND A1 a_32_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_115_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o221ai_4 B1 B2 A2 C1 Y A1 VGND VPWR VNB VPB X0 a_471_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_471_47# B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_471_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A1 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_471_47# B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_471_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_1241_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_27_47# B2 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR B1 a_553_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A2 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_553_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_47# B2 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND A2 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A1 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_1241_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR B1 a_553_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR A1 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 Y B2 a_553_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_1241_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_553_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_471_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 Y A2 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_553_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_27_47# B1 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND A1 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 Y B2 a_553_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_1241_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 a_27_47# B1 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 a_553_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 Y A2 a_1241_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 a_471_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 a_471_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2bb2a_4 A2_N A1_N X B2 B1 VGND VPWR VNB VPB X0 a_27_47# a_415_21# a_193_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A2_N a_415_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_415_21# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_415_21# A2_N a_717_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_193_297# a_415_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_193_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_193_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_109_297# B2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_193_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_717_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_717_47# A2_N a_415_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_193_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_27_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_193_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A1_N a_717_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND a_193_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_193_297# a_415_21# a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR a_193_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR a_415_21# a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 X a_193_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR A1_N a_415_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_109_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_415_21# A2_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VGND B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand2b_4 B A_N Y VGND VPWR VNB VPB X0 VGND B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_215_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_215_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__mux2_8 S A1 VPWR VGND A0 X VNB VPB X0 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_79_21# A0 a_792_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_1259_199# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_1302_47# A0 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_792_297# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_1259_199# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND a_1259_199# a_1302_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X14 a_79_21# A1 a_792_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X15 a_79_21# A0 a_1302_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X16 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR S a_792_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_792_297# A0 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_1302_47# a_1259_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X23 VPWR a_1259_199# a_1302_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_1302_297# a_1259_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_792_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X27 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_1302_297# A1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND S a_792_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X30 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_79_21# A1 a_1302_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 a_792_47# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor2_4 Y A B VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a32o_4 A3 X A2 B1 B2 A1 VGND VPWR VNB VPB X0 VGND A3 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_445_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A2 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_635_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_445_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_445_297# B2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_79_21# B1 a_1142_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_79_21# B2 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_445_47# A2 a_635_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_79_21# A1 a_635_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_445_297# B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_1142_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND B2 a_1142_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_635_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_445_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_79_21# B1 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_1142_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VPWR A3 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_445_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR A1 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2111o_4 C1 B1 A1 A2 X D1 VGND VPWR VNB VPB X0 a_30_297# C1 a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND C1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_44_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND a_44_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_477_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_44_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_44_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_44_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_477_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_285_297# B1 a_477_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND D1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_770_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_44_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_30_297# D1 a_44_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A2 a_770_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_44_47# D1 a_30_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_477_297# B1 a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_770_47# A1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_477_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR a_44_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_285_297# C1 a_30_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_44_47# D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_44_47# A1 a_770_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VGND a_44_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR A2 a_477_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 X a_44_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_44_47# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a311o_2 VGND VPWR X C1 B1 A1 A2 A3 VNB VPB X0 a_79_21# C1 a_635_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A2 a_319_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_417_47# A2 a_319_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_79_21# A1 a_417_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_319_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_319_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_319_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_79_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_635_297# B1 a_319_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a311o_4 VGND VPWR C1 A1 A2 A3 X B1 VNB VPB X0 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_277_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_861_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B1 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_1059_47# A2 a_861_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_1059_47# A1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_277_297# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# C1 a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A3 a_861_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND C1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_109_47# A1 a_1059_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_109_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 VPWR A3 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR A2 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_109_47# C1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR A1 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_277_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_277_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_109_47# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_861_47# A2 a_1059_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a221oi_1 Y C1 A1 A2 B2 B1 VGND VPWR VNB VPB X0 a_465_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_109_297# B1 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_204_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND A2 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_193_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y B1 a_204_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_109_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o41a_4 A1 A2 A3 A4 B1 X VGND VPWR VNB VPB X0 a_467_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_467_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A1 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_467_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_467_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_1083_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_1083_297# A2 a_889_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A3 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_79_21# B1 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_889_297# A2 a_1083_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_639_297# A3 a_889_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND A2 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_889_297# A3 a_639_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_639_297# A4 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND A4 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_1083_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_79_21# A4 a_639_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_467_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o22a_2 A2 X B1 A1 B2 VGND VPWR VNB VPB X0 a_301_47# B2 a_81_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A2 a_301_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_383_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_81_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_301_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND a_81_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_81_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_81_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_579_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_81_21# B1 a_301_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_579_297# A2 a_81_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_81_21# B2 a_383_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21bai_2 B1_N Y A2 A1 VGND VPWR VNB VPB X0 a_397_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR B1_N a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 Y A2 a_397_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A2 a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND A1 a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_28_297# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 Y a_28_297# a_229_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_28_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_397_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_229_47# a_28_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y a_28_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_229_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_229_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR A1 a_397_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and2b_2 VPWR VGND X B A_N VNB VPB X0 VPWR a_212_413# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_297_47# a_27_413# a_212_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_212_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_212_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_212_413# a_27_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR B a_212_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND a_212_413# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_413# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand4b_4 D C B Y A_N VGND VPWR VNB VPB X0 a_991_47# C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_991_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_991_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND D a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND D a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_633_47# C a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_633_47# C a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_991_47# C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2bb2ai_1 Y A1_N A2_N B2 B1 VGND VPWR VNB VPB X0 VPWR A2_N a_112_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y a_112_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND B2 a_394_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_112_297# A2_N a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_112_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_112_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR B1 a_478_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_394_47# a_112_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_394_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_478_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o41a_2 A1 A2 A3 A4 B1 X VGND VPWR VNB VPB X0 VGND A2 a_393_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_496_297# A4 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_393_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A1 a_697_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A4 a_393_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_697_297# A2 a_597_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_393_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_393_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_597_297# A3 a_496_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__conb_1 LO HI VPB VNB VGND VPWR R0 HI VPWR sky130_fd_pr__res_generic_po w=480000u l=45000u R1 VGND LO sky130_fd_pr__res_generic_po w=480000u l=45000u .ends .subckt NF_sky130_fd_sc_hd__xor2_4 X B A VGND VPWR VNB VPB X0 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_806_47# B X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_806_47# B X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_112_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B a_112_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_806_297# a_112_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_112_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X B a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_112_47# a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_112_47# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_806_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X B a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_806_297# a_112_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_112_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_806_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR B a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VGND B a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VGND B a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VPWR B a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_806_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_806_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 a_27_297# B a_112_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_112_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 VGND a_112_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 a_806_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_112_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_112_47# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 VPWR A a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 X a_112_47# a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 a_806_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 X a_112_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X38 X a_112_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 VPWR A a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a32o_2 B2 X A2 A3 A1 B1 VGND VPWR VNB VPB X0 VPWR A3 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_299_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_352_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_549_47# A1 a_21_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_21_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_21_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_665_47# A2 a_549_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A1 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_299_297# B1 a_21_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_21_199# B2 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND A3 a_665_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_21_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_21_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_21_199# B1 a_352_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o211ai_2 A1 A2 B1 Y C1 VGND VPWR VNB VPB X0 a_286_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_286_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A2 a_487_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A1 a_286_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A2 a_286_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_487_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# B1 a_286_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A1 a_487_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_487_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_286_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and2b_4 B X A_N VGND VPWR VNB VPB X0 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_33_199# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_33_199# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# a_33_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_109_47# a_33_199# a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__xor2_2 VPWR VGND X B A VNB VPB X0 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_470_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_470_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_112_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_470_47# B X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_112_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND B a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_470_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_112_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR B a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND a_112_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND A a_470_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_27_297# B a_112_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_112_47# a_470_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_470_297# a_112_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 X B a_470_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_112_47# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o221a_2 B2 A2 X B1 C1 A1 VGND VPWR VNB VPB X0 VPWR a_38_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A1 a_497_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_38_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_141_47# B2 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_497_297# A2 a_38_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A1 a_225_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR C1 a_38_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_237_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_38_47# B2 a_237_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_225_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_38_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_141_47# C1 a_38_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_38_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_225_47# B1 a_141_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand3b_1 B C A_N Y VGND VPWR VNB VPB X0 Y a_53_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_232_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A_N a_53_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A_N a_53_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_316_47# B a_232_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y a_53_93# a_316_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o22a_4 B2 B1 X A1 A2 VGND VPWR VNB VPB X0 VPWR B1 a_566_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_484_47# B1 a_96_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_96_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_96_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_96_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_566_297# B2 a_96_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_96_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_96_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND a_96_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_96_21# B2 a_566_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A1 a_918_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_484_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_566_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_484_47# B2 a_96_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_96_21# A2 a_918_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_918_297# A2 a_96_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_484_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_918_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_96_21# B1 a_484_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND A2 a_484_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_96_21# B2 a_484_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND A1 a_484_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 X a_96_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND a_96_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2bb2oi_2 A2_N A1_N Y B2 B1 VGND VPWR VNB VPB X0 a_54_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_442_21# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B2 a_54_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_442_21# A2_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y B2 a_136_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A1_N a_662_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_54_297# B2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_136_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND A1_N a_442_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND A2_N a_442_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_136_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y a_442_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR B1 a_54_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_662_297# A2_N a_442_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND B1 a_136_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_442_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_442_21# A2_N a_662_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_662_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_54_297# a_442_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y a_442_21# a_54_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2bb2oi_4 Y A2_N B2 A1_N B1 VGND VPWR VNB VPB X0 Y B2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND a_751_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_751_21# A2_N a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_1139_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND A2_N a_751_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_27_297# B2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1_N a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y a_751_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_1139_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_27_297# a_751_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y a_751_21# a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A1_N a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_751_21# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_27_297# a_751_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y B2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Y a_751_21# a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_1139_297# A2_N a_751_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_751_21# A2_N a_1139_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VGND A1_N a_751_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VGND A1_N a_751_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 a_109_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VGND A2_N a_751_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_109_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 VPWR B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_109_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 Y a_751_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 a_27_297# B2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_751_21# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X34 a_751_21# A2_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 a_1139_297# A2_N a_751_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 a_109_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X38 VGND a_751_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 a_751_21# A2_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a41o_2 B1 A1 X A2 A4 A3 VGND VPWR VNB VPB X0 a_381_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A2 a_381_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_465_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_549_47# A3 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_665_47# A2 a_549_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_381_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A4 a_381_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_381_297# B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_79_21# A1 a_665_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o221ai_1 A2 Y B1 C1 A1 B2 VGND VPWR VNB VPB X0 a_109_47# B1 a_213_123# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B2 a_295_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A1 a_493_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_213_123# B2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_295_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_493_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A2 a_213_123# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_213_123# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_109_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__inv_4 Y A VPWR VGND VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a221oi_2 B2 C1 A2 A1 B1 Y VGND VPWR VNB VPB X0 Y B1 a_383_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_301_297# B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_301_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND B2 a_383_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y A1 a_735_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_297# B2 a_301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A2 a_735_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_301_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y C1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR A2 a_301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_383_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_383_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_735_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_301_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_735_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_297# B1 a_301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2bb2a_2 A1_N X A2_N B2 B1 VGND VPWR VNB VPB X0 a_294_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A2_N a_295_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VPWR B1 a_665_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 VGND a_84_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_84_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_581_47# a_295_369# a_84_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_84_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_665_369# B2 a_84_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 VGND B2 a_581_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_295_369# A2_N a_294_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 X a_84_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_84_21# a_295_369# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X12 a_295_369# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X13 a_581_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a41oi_2 A4 A3 A2 B1 A1 Y VPWR VGND VNB VPB X0 a_149_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_757_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_757_47# A3 a_567_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A3 a_149_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B1 a_149_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_567_47# A3 a_757_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND A4 a_757_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A4 a_149_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_149_297# A4 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_317_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_317_47# A2 a_567_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_149_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_149_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y A1 a_317_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VPWR A2 a_149_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_567_47# A2 a_317_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_149_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VPWR A1 a_149_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand4b_1 Y C D A_N B VGND VPWR VNB VPB X0 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_232_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A_N a_41_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR a_41_93# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_316_47# C a_232_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y a_41_93# a_423_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_423_47# B a_316_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A_N a_41_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__inv_8 A Y VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o22ai_2 B2 B1 Y A1 A2 VGND VPWR VNB VPB X0 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_475_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A1 a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_475_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y A2 a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2bb2oi_1 A1_N Y VGND VPWR B2 B1 A2_N VNB VPB X0 a_109_47# A2_N a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_397_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR B2 a_397_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A2_N a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_397_297# a_109_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_481_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B1 a_481_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_109_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_109_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor3_4 A C B Y VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_449_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_449_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor3b_2 C_N Y A B VGND VPWR VNB VPB X0 a_281_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_531_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR C_N a_531_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_281_297# a_531_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y a_531_21# a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND C_N a_531_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_27_297# B a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y a_531_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor4b_4 B A D_N C Y VGND VPWR VNB VPB X0 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND D_N a_1191_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_803_297# a_1191_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_445_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y a_1191_21# a_803_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_803_297# a_1191_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y a_1191_21# a_803_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y a_1191_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR D_N a_1191_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_27_297# B a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 VGND a_1191_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND a_1191_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_445_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_803_297# C a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_27_297# B a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_445_297# C a_803_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_803_297# C a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 Y a_1191_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_445_297# C a_803_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o32ai_1 A2 Y A1 A3 B2 B1 VGND VPWR VNB VPB X0 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_333_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A1 a_461_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_461_297# A2 a_333_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and4bb_4 C A_N D X B_N VGND VPWR VNB VPB X0 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_174_21# a_832_21# a_766_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_832_21# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_766_47# a_27_47# a_652_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_652_47# C a_556_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_832_21# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_556_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_174_21# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR C a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VPWR a_832_21# a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_174_21# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND B_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand3b_2 Y C A_N B VGND VPWR VNB VPB X0 a_408_47# B a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_408_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y a_27_47# a_408_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND C a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_218_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_218_47# B a_408_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__and3b_2 VGND VPWR B X A_N C VNB VPB X0 a_109_53# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_215_311# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_109_53# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND C a_373_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND a_215_311# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR C a_215_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_215_311# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_215_311# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_301_53# a_109_53# a_215_311# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_215_311# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_373_53# B a_301_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VPWR a_109_53# a_215_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor3b_4 A C_N B Y VGND VPWR VNB VPB X0 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A a_197_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_555_297# a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_197_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_197_297# B a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND C_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y a_27_47# a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y a_27_47# a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR C_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_555_297# a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_555_297# B a_197_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_197_297# B a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_555_297# B a_197_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR A a_197_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_197_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 Y a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o32ai_2 A1 B1 A2 A3 Y B2 VGND VPWR VNB VPB X0 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_475_297# A2 a_729_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_729_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A1 a_729_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_729_297# A2 a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_475_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y A3 a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__ebufn_4 A Z TE_B VGND VPWR VNB VPB X0 a_214_47# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Z a_27_47# a_320_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_214_47# a_393_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_320_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X4 VGND a_214_47# a_393_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR TE_B a_320_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X6 a_320_309# TE_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X7 a_393_47# a_214_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Z a_27_47# a_393_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR TE_B a_320_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=940000u l=150000u X10 a_393_47# a_214_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Z a_27_47# a_393_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_393_47# a_27_47# Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_214_47# TE_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Z a_27_47# a_320_309# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_320_309# a_27_47# Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_393_47# a_27_47# Z VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_320_309# a_27_47# Z VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dlclkp_1 GATE GCLK CLK VGND VPWR VNB VPB X0 a_381_369# GATE VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X1 a_476_413# a_193_47# a_381_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_957_369# a_642_307# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X4 a_1042_47# a_642_307# a_957_369# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 GCLK a_957_369# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND CLK a_1042_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_651_47# a_193_47# a_476_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=390000u l=150000u X9 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X10 GCLK a_957_369# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_642_307# a_600_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_476_413# a_27_47# a_396_119# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VPWR CLK a_957_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X14 a_642_307# a_476_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_600_413# a_27_47# a_476_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 VPWR a_476_413# a_642_307# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND a_642_307# a_651_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_396_119# GATE VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__dlxtp_1 D GATE Q VGND VPWR VNB VPB X0 a_560_47# a_193_47# a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X1 VPWR D a_299_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VGND a_713_21# a_659_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X3 Q a_713_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_465_47# a_299_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR GATE a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X6 a_659_47# a_27_47# a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X7 VGND a_560_47# a_713_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_713_21# a_644_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_560_47# a_713_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X12 Q a_713_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND D a_299_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_644_413# a_193_47# a_560_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_465_369# a_299_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X16 a_560_47# a_27_47# a_465_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VGND GATE a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__inv_1 Y A VGND VPWR VNB VPB X0 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor4b_2 D_N Y C A B VGND VPWR VNB VPB X0 VPWR D_N a_694_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_27_297# B a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_474_297# a_694_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_277_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y a_694_21# a_474_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND D_N a_694_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_474_297# C a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y a_694_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_277_297# C a_474_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND a_694_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_RAM128 A0[0] A0[1] A0[2] A0[3] A0[4] A0[5] A0[6] CLK Di0[0] Di0[10] Di0[11] + Di0[12] Di0[13] Di0[14] Di0[15] Di0[16] Di0[17] Di0[18] Di0[19] Di0[1] Di0[20] Di0[21] + Di0[22] Di0[23] Di0[24] Di0[25] Di0[26] Di0[27] Di0[28] Di0[29] Di0[2] Di0[30] Di0[31] + Di0[3] Di0[4] Di0[5] Di0[6] Di0[7] Di0[8] Di0[9] Do0[0] Do0[10] Do0[11] Do0[12] + Do0[13] Do0[14] Do0[15] Do0[16] Do0[17] Do0[18] Do0[19] Do0[1] Do0[20] Do0[21] Do0[22] + Do0[23] Do0[24] Do0[25] Do0[26] Do0[27] Do0[28] Do0[29] Do0[2] Do0[30] Do0[31] Do0[3] + Do0[4] Do0[5] Do0[6] Do0[7] Do0[8] Do0[9] EN0 WE0[0] WE0[1] WE0[2] WE0[3] VPWR VGND XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X BLOCK\[0\].RAM32.CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] Do0MUX.M\[3\].MUX\[1\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] Do0MUX.M\[2\].MUX\[6\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_33_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[4\].__cell___A DIBUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[1\].__cell___A DIBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND3_B DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_27_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.DIBUF\[12\].__cell__ BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X DIBUF\[12\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_324 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BLOCK\[3\].RAM32.DEC0.AND2/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_105_797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__ BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_61 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_108_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[24\].__cell___A DIBUF\[24\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.EN0BUF.__cell__ DEC0.AND2/X BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.A0BUF\[4\].__cell___A A0BUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]_A BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_23_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.A0BUF\[1\].__cell___A A0BUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] Do0MUX.M\[1\].MUX\[2\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.DIBUF\[24\].__cell__ BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X DIBUF\[24\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_119_653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_4_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[28\].__cell__ BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X DIBUF\[28\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_DIBUF\[2\].__cell___A Di0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\] BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.A0BUF\[1\].__cell__ A0BUF\[1\].__cell__/X BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[12\].__cell___A DIBUF\[12\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X BLOCK\[3\].RAM32.CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_80_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[9\].__cell___A DIBUF\[9\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[6\].__cell___A DIBUF\[6\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_153_762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__ BLOCK\[3\].RAM32.CLKBUF.__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XA0BUF\[6\].__cell__ A0[6] DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__ BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_139_523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_A0BUF\[2\].__cell___A A0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[29\].__cell___A DIBUF\[29\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_67_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[31\].__cell___A DIBUF\[31\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__ DEC0.AND0/Y BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_92_822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[7\].__cell__ BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X DIBUF\[7\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XDo0MUX.M\[3\].MUX\[2\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[2\]/A1 Do0[26] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[2\]/A2 Do0MUX.M\[3\].MUX\[2\]/A0 Do0MUX.M\[3\].MUX\[2\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.WEBUF\[0\].__cell___A WEBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND3_C DEC0.AND3/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.TIE0\[0\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO BLOCK\[3\].RAM32.TIE0\[0\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XDo0MUX.M\[2\].MUX\[4\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[4\]/A1 Do0[20] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[4\]/A2 Do0MUX.M\[2\].MUX\[4\]/A0 Do0MUX.M\[2\].MUX\[4\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[14\].__cell__ BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X DIBUF\[14\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[7\].__cell___A Di0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell___A BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_41_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_115_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_25_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[1\].MUX\[6\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[6\]/A1 Do0[14] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[6\]/A2 Do0MUX.M\[1\].MUX\[6\]/A0 Do0MUX.M\[1\].MUX\[6\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[17\].__cell___A DIBUF\[17\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.WEBUF\[3\].__cell__ WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.WEBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF_A BLOCK\[2\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_28_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.A0BUF\[1\].__cell__ A0BUF\[1\].__cell__/X BLOCK\[3\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] Do0MUX.M\[3\].MUX\[1\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] Do0MUX.M\[2\].MUX\[6\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.TIE0\[2\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO BLOCK\[2\].RAM32.TIE0\[2\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.DIBUF\[18\].__cell__ BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X DIBUF\[18\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_65_652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__ BLOCK\[3\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[24\].__cell__ DIBUF\[24\].__cell__/X Di0[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_97_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[3\].__cell__ BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X DIBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] Do0MUX.M\[1\].MUX\[2\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] Do0MUX.M\[0\].MUX\[7\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_6_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__ BLOCK\[0\].RAM32.CLKBUF.__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_688 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[31\].__cell__ BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X DIBUF\[31\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_80_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[8\].__cell__ DIBUF\[8\].__cell__/X Di0[8] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_110_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_48_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_125_262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_62_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_50_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__ BLOCK\[3\].RAM32.CLKBUF.__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[24\].__cell___A DIBUF\[24\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BLOCK\[0\].RAM32.DEC0.AND0/Y BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\] BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_107_295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[0\].__cell___A DIBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_72_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_73_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__ BLOCK\[1\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell___A DEC0.AND3/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_104_232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] Do0MUX.M\[1\].MUX\[0\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_108_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.CLKBUF.__cell___A CLKBUF.__cell__/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_102_769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\] BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell___A DEC0.AND1/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.A0BUF\[0\].__cell___A A0BUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_59 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XDIBUF\[14\].__cell__ DIBUF\[14\].__cell__/X Di0[14] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[3\].__cell__ BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X DIBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_70_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell___A DEC0.AND2/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_93_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[29\].__cell___A DIBUF\[29\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[21\].__cell__ BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X DIBUF\[21\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_21_1002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_66 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] Do0MUX.M\[2\].MUX\[6\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_91_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[5\].__cell___A DIBUF\[5\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[31\].__cell___A DIBUF\[31\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[13\].__cell___A DIBUF\[13\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell___A DEC0.AND0/Y VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_117_989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_122_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_155 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_15_78 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_67_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_50_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_2_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__ BLOCK\[0\].RAM32.CLKBUF.__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_604 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BLOCK\[3\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_67_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] Do0MUX.M\[1\].MUX\[2\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] Do0MUX.M\[0\].MUX\[7\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_27 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] Do0MUX.M\[2\].MUX\[4\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_846 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]_A BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.A0BUF\[4\].__cell__ A0BUF\[4\].__cell__/X BLOCK\[2\].RAM32.DEC0.AND3/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_DEC0.AND1_B DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_127_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[18\].__cell___A DIBUF\[18\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_882 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[11\].__cell__ BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X DIBUF\[11\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_25_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[20\].__cell___A DIBUF\[20\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell___A BLOCK\[2\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__ BLOCK\[2\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_88_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] Do0MUX.M\[1\].MUX\[0\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BLOCK\[2\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[23\].__cell__ BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X DIBUF\[23\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_135_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_134_423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_121_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_88_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_33 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_113_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.WEBUF\[1\].__cell___A WEBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\] BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DIBUF\[27\].__cell__ BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X DIBUF\[27\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_108_902 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell___A BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.A0BUF\[0\].__cell__ A0BUF\[0\].__cell__/X BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XPHY_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_42_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XA0BUF\[5\].__cell__ A0[5] DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_150_510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] Do0MUX.M\[2\].MUX\[6\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_38 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[25\].__cell___A DIBUF\[25\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\] BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_146_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_145_359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND0_C_N DEC0.AND3/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DEC0.AND0 BLOCK\[2\].RAM32.DEC0.AND3/C BLOCK\[2\].RAM32.DEC0.AND0/Y + BLOCK\[2\].RAM32.DEC0.AND3/B BLOCK\[2\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDo0MUX.M\[3\].MUX\[0\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[0\]/A1 Do0[24] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[0\]/A2 Do0MUX.M\[3\].MUX\[0\]/A0 Do0MUX.M\[3\].MUX\[0\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_91_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND1_C DEC0.AND3/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_142_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__ DEC0.AND0/Y BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[6\].__cell__ BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X DIBUF\[6\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XDo0MUX.M\[2\].MUX\[2\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[2\]/A1 Do0[18] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[2\]/A2 Do0MUX.M\[2\].MUX\[2\]/A0 Do0MUX.M\[2\].MUX\[2\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.SEL0BUF\[2\] DEC0.AND3/B Do0MUX.SEL0BUF\[2\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_128_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XDo0MUX.M\[1\].MUX\[4\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[4\]/A1 Do0[12] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[4\]/A2 Do0MUX.M\[1\].MUX\[4\]/A0 Do0MUX.M\[1\].MUX\[4\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] Do0MUX.M\[0\].MUX\[7\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.DIBUF\[13\].__cell__ BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X DIBUF\[13\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[13\].__cell___A DIBUF\[13\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] Do0MUX.M\[2\].MUX\[4\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[6\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[6\]/A1 Do0[6] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[6\]/A2 Do0MUX.M\[0\].MUX\[6\]/A0 Do0MUX.M\[0\].MUX\[6\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_109_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.WEBUF\[2\].__cell__ WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.A0BUF\[0\].__cell__ A0BUF\[0\].__cell__/X BLOCK\[3\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.TIE0\[1\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO BLOCK\[2\].RAM32.TIE0\[1\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_1_71 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_34_894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[17\].__cell__ BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X DIBUF\[17\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_152_276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[1\].__cell___A DIBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_103_118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_57_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__ BLOCK\[3\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.TIE0\[3\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO BLOCK\[1\].RAM32.TIE0\[3\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[23\].__cell__ DIBUF\[23\].__cell__/X Di0[23] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.DIBUF\[29\].__cell__ BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X DIBUF\[29\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_17_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DIBUF\[10\].__cell___A Di0[10] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] Do0MUX.M\[1\].MUX\[0\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] Do0MUX.M\[0\].MUX\[5\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_742 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.DIBUF\[2\].__cell__ BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X DIBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_79 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.A0BUF\[1\].__cell___A A0BUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[30\].__cell__ BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X DIBUF\[30\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[18\].__cell___A DIBUF\[18\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDIBUF\[7\].__cell__ DIBUF\[7\].__cell__/X Di0[7] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_82_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DEC0.AND1 VGND VPWR BLOCK\[2\].RAM32.DEC0.AND3/B BLOCK\[2\].RAM32.DEC0.AND1/X + BLOCK\[2\].RAM32.DEC0.AND3/A BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[20\].__cell___A DIBUF\[20\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_71_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_146_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XWEBUF\[3\].__cell__ WE0[3] WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_575 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_117_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[6\].__cell___A DIBUF\[6\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell___A BLOCK\[1\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_DIBUF\[15\].__cell___A Di0[15] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\] BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_1_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]_A BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BLOCK\[3\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XDIBUF\[13\].__cell__ DIBUF\[13\].__cell__/X Di0[13] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[19\].__cell__ BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X DIBUF\[19\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[2\].__cell__ BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X DIBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_43_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.WEBUF\[0\].__cell___A WEBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] Do0MUX.M\[0\].MUX\[7\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[25\].__cell___A DIBUF\[25\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] Do0MUX.M\[2\].MUX\[4\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.DIBUF\[20\].__cell__ BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X DIBUF\[20\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_153_542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF_A BLOCK\[1\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_0 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]_A BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DEC0.AND2 VGND VPWR BLOCK\[2\].RAM32.DEC0.AND3/A BLOCK\[2\].RAM32.DEC0.AND2/X + BLOCK\[2\].RAM32.DEC0.AND3/B BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_35 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.SEL0BUF\[1\]_A DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_14_459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[13\].__cell___A DIBUF\[13\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[22\].__cell___A Di0[22] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] Do0MUX.M\[1\].MUX\[0\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] Do0MUX.M\[0\].MUX\[5\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[9\].__cell__ BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X DIBUF\[9\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_239 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] Do0MUX.M\[2\].MUX\[2\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_133_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.WEBUF\[2\].__cell___A WEBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_20_259 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_68_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_56_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.A0BUF\[3\].__cell__ A0BUF\[3\].__cell__/X BLOCK\[2\].RAM32.DEC0.AND3/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_115_72 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__ BLOCK\[0\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.EN0BUF.__cell___A DEC0.AND1/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_88_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_719 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[10\].__cell__ BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X DIBUF\[10\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[0\].__cell___A DIBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_20 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_132_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BLOCK\[3\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_21_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[18\].__cell___A DIBUF\[18\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DIBUF\[27\].__cell___A Di0[27] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_WEBUF\[3\].__cell___A WE0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[22\].__cell__ BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X DIBUF\[22\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[20\].__cell___A DIBUF\[20\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.A0BUF\[0\].__cell___A A0BUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_150_546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_79_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[26\].__cell__ BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X DIBUF\[26\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_94_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.DEC0.AND3 BLOCK\[2\].RAM32.DEC0.AND3/B BLOCK\[2\].RAM32.DEC0.AND3/X + BLOCK\[2\].RAM32.DEC0.AND3/A BLOCK\[2\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell___A BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BLOCK\[0\].RAM32.DEC0.AND3/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] Do0MUX.M\[2\].MUX\[4\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\] BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_57_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell___A BLOCK\[0\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] Do0MUX.M\[3\].MUX\[6\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XA0BUF\[4\].__cell__ A0[4] A0BUF\[4\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_83_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[5\].__cell___A DIBUF\[5\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[2\].__cell___A DIBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_9_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[2\].MUX\[0\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[0\]/A1 Do0[16] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[0\]/A2 Do0MUX.M\[2\].MUX\[0\]/A0 Do0MUX.M\[2\].MUX\[0\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL0BUF\[0\] DEC0.AND3/B Do0MUX.SEL0BUF\[0\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_46_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[25\].__cell___A DIBUF\[25\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_903 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__ DEC0.AND0/Y BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_53_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[2\].RAM32.DIBUF\[5\].__cell__ BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X DIBUF\[5\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XDo0MUX.M\[1\].MUX\[2\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[2\]/A1 Do0[10] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[2\]/A2 Do0MUX.M\[1\].MUX\[2\]/A0 Do0MUX.M\[1\].MUX\[2\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] Do0MUX.M\[0\].MUX\[5\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.A0BUF\[2\].__cell___A A0BUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] Do0MUX.M\[2\].MUX\[2\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_137_232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BLOCK\[1\].RAM32.DEC0.AND2/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[4\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[4\]/A1 Do0[4] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[4\]/A2 Do0MUX.M\[0\].MUX\[4\]/A0 Do0MUX.M\[0\].MUX\[4\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.DIBUF\[12\].__cell__ BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X DIBUF\[12\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_86_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_38_455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.WEBUF\[1\].__cell__ WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.TIE0\[0\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO BLOCK\[2\].RAM32.TIE0\[0\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_DIBUF\[3\].__cell___A Di0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.DIBUF\[16\].__cell__ BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X DIBUF\[16\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_16_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[13\].__cell___A DIBUF\[13\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__ BLOCK\[1\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_54_767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[7\].__cell___A DIBUF\[7\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__ BLOCK\[1\].RAM32.CLKBUF.__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] Do0MUX.M\[0\].MUX\[3\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.TIE0\[2\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO BLOCK\[1\].RAM32.TIE0\[2\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDIBUF\[22\].__cell__ DIBUF\[22\].__cell__/X Di0[22] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[28\].__cell__ BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X DIBUF\[28\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_A0BUF\[3\].__cell___A A0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BLOCK\[2\].RAM32.DEC0.AND1/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_10_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_66 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_103_260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_92 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[1\].__cell__ BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X DIBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_127_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDIBUF\[6\].__cell__ DIBUF\[6\].__cell__/X Di0[6] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_123_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.WEBUF\[1\].__cell___A WEBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_47_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]_A BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_Do0MUX.SEL1BUF\[0\]_A DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[8\].__cell___A Di0[8] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XWEBUF\[2\].__cell__ WE0[2] WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[18\].__cell___A DIBUF\[18\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_53_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] Do0MUX.M\[3\].MUX\[6\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_88_504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_110_380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[20\].__cell___A DIBUF\[20\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BLOCK\[3\].RAM32.DEC0.AND0/Y BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_30_367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_2_290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_125_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_67_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell___A BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[12\].__cell__ DIBUF\[12\].__cell__/X Di0[12] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[18\].__cell__ BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X DIBUF\[18\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[1\].__cell__ BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X DIBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_144_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] Do0MUX.M\[0\].MUX\[5\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.CLKBUF.__cell__ BLOCK\[0\].RAM32.CLKBUF.__cell__/X CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] Do0MUX.M\[2\].MUX\[2\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] Do0MUX.M\[1\].MUX\[7\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_680 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__ DEC0.AND1/X BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__ BLOCK\[1\].RAM32.CLKBUF.__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_13_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[25\].__cell___A DIBUF\[25\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_17_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__ BLOCK\[2\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_63_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_111_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_10_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[1\].__cell___A DIBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.DIBUF\[31\].__cell__ BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X DIBUF\[31\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] Do0MUX.M\[0\].MUX\[3\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell___A DEC0.AND3/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_68_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] Do0MUX.M\[2\].MUX\[0\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[8\].__cell__ BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X DIBUF\[8\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.EN0BUF.__cell__ DEC0.AND1/X BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_21_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell___A DEC0.AND1/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.A0BUF\[1\].__cell___A A0BUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_259 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_30_335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.A0BUF\[2\].__cell__ A0BUF\[2\].__cell__/X BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_40 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__ BLOCK\[0\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_94 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_4 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_44_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_129_565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BLOCK\[3\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] Do0MUX.M\[3\].MUX\[6\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[6\].__cell___A DIBUF\[6\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_46 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[14\].__cell___A DIBUF\[14\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell___A DEC0.AND0/Y VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_68_839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[21\].__cell__ BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X DIBUF\[21\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_4_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_117_376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_99_761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_69 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DIBUF\[25\].__cell__ BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X DIBUF\[25\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] Do0MUX.M\[2\].MUX\[2\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] Do0MUX.M\[1\].MUX\[7\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_55_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] Do0MUX.M\[3\].MUX\[4\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BLOCK\[2\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_59_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_7_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XA0BUF\[3\].__cell__ A0[3] A0BUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[31\].__cell__ DIBUF\[31\].__cell__/X Di0[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF_A BLOCK\[0\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_40_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[19\].__cell___A DIBUF\[19\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__ BLOCK\[3\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[21\].__cell___A DIBUF\[21\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[1\].MUX\[0\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[0\]/A1 Do0[8] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[0\]/A2 Do0MUX.M\[1\].MUX\[0\]/A0 Do0MUX.M\[1\].MUX\[0\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] Do0MUX.M\[0\].MUX\[3\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__ DEC0.AND0/Y BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] Do0MUX.M\[2\].MUX\[0\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[4\].__cell__ BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X DIBUF\[4\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XDo0MUX.M\[0\].MUX\[2\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[2\]/A1 Do0[2] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[2\]/A2 Do0MUX.M\[0\].MUX\[2\]/A0 Do0MUX.M\[0\].MUX\[2\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_21_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_5 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_81_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.DIBUF\[11\].__cell__ BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X DIBUF\[11\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.WEBUF\[2\].__cell___A WEBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.WEBUF\[0\].__cell__ WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[3\].MUX\[7\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[7\]/A1 Do0[31] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[7\]/A2 Do0MUX.M\[3\].MUX\[7\]/A0 Do0MUX.M\[3\].MUX\[7\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_54_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.DIBUF\[15\].__cell__ BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X DIBUF\[15\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_63 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__ BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] Do0MUX.M\[0\].MUX\[1\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_Do0MUX.SEL1BUF\[3\]_A DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]_A BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] Do0MUX.M\[3\].MUX\[6\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.TIE0\[1\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO BLOCK\[1\].RAM32.TIE0\[1\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[21\].__cell__ DIBUF\[21\].__cell__/X Di0[21] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[26\].__cell___A DIBUF\[26\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[27\].__cell__ BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X DIBUF\[27\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell___A BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_127_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_118_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[0\].__cell__ BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X DIBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.SEL1BUF\[3\] DEC0.AND3/A Do0MUX.SEL1BUF\[3\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_938 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.TIE0\[3\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO BLOCK\[0\].RAM32.TIE0\[3\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[5\].__cell__ DIBUF\[5\].__cell__/X Di0[5] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_28_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] Do0MUX.M\[1\].MUX\[7\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[14\].__cell___A DIBUF\[14\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] Do0MUX.M\[3\].MUX\[4\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XWEBUF\[1\].__cell__ WE0[1] WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_6 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_1015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_135_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[2\].__cell___A DIBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_43_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] Do0MUX.M\[0\].MUX\[3\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_135_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[11\].__cell__ DIBUF\[11\].__cell__/X Di0[11] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_DIBUF\[11\].__cell___A Di0[11] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.DIBUF\[17\].__cell__ BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X DIBUF\[17\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.DIBUF\[0\].__cell__ BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X DIBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] Do0MUX.M\[2\].MUX\[0\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] Do0MUX.M\[1\].MUX\[5\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_49_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_1010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.A0BUF\[2\].__cell___A A0BUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_55_844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_76 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_108_378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X BLOCK\[2\].RAM32.CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[29\].__cell__ BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X DIBUF\[29\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[19\].__cell___A DIBUF\[19\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__ DEC0.AND1/X BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_52_836 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[21\].__cell___A DIBUF\[21\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BLOCK\[3\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_1_24 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__ BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_18_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] Do0MUX.M\[0\].MUX\[1\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DEC0.AND0 BLOCK\[0\].RAM32.DEC0.AND3/C BLOCK\[0\].RAM32.DEC0.AND0/Y + BLOCK\[0\].RAM32.DEC0.AND3/B BLOCK\[0\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[30\].__cell__ BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X DIBUF\[30\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_65_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[7\].__cell___A DIBUF\[7\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_75 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_111_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_663 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[7\].__cell__ BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X DIBUF\[7\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[16\].__cell___A Di0[16] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.CLKBUF.__cell___A CLKBUF.__cell__/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_75_599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_7 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_156_387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_112_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.WEBUF\[3\].__cell__ WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.WEBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_85_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.WEBUF\[1\].__cell___A WEBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__ BLOCK\[2\].RAM32.CLKBUF.__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_153_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.A0BUF\[1\].__cell__ A0BUF\[1\].__cell__/X BLOCK\[2\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] Do0MUX.M\[1\].MUX\[7\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_129_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_98_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[26\].__cell___A DIBUF\[26\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__ BLOCK\[0\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_10_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] Do0MUX.M\[3\].MUX\[4\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[19\].__cell__ BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X DIBUF\[19\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_68_639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_848 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__ BLOCK\[0\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_151_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_38_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_9_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[20\].__cell__ BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X DIBUF\[20\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_839 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[14\].__cell___A DIBUF\[14\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[23\].__cell___A Di0[23] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] Do0MUX.M\[2\].MUX\[0\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_1013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] Do0MUX.M\[1\].MUX\[5\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_94 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_114_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DEC0.AND1 VGND VPWR BLOCK\[0\].RAM32.DEC0.AND3/B BLOCK\[0\].RAM32.DEC0.AND1/X + BLOCK\[0\].RAM32.DEC0.AND3/A BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.DIBUF\[24\].__cell__ BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X DIBUF\[24\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] Do0MUX.M\[3\].MUX\[2\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.WEBUF\[3\].__cell___A WEBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XA0BUF\[2\].__cell__ A0[2] A0BUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[30\].__cell__ DIBUF\[30\].__cell__/X Di0[30] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XPHY_128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_21_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_79_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BLOCK\[3\].RAM32.DEC0.AND3/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_43_431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_8 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__ BLOCK\[3\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] Do0MUX.M\[0\].MUX\[1\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[1\].__cell___A DIBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_154_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_98 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[0\].MUX\[0\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[0\]/A1 Do0[0] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[0\]/A2 Do0MUX.M\[0\].MUX\[0\]/A0 Do0MUX.M\[0\].MUX\[0\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_134_583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell___A BLOCK\[2\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_67_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[3\].__cell__ BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X DIBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[19\].__cell___A DIBUF\[19\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[28\].__cell___A Di0[28] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]_A BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_72_345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[21\].__cell___A DIBUF\[21\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[30\].__cell___A Di0[30] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[10\].__cell__ BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X DIBUF\[10\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[3\].MUX\[5\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[5\]/A1 Do0[29] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[5\]/A2 Do0MUX.M\[3\].MUX\[5\]/A0 Do0MUX.M\[3\].MUX\[5\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__ BLOCK\[2\].RAM32.CLKBUF.__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.A0BUF\[1\].__cell___A A0BUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_27 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[2\].MUX\[7\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[7\]/A1 Do0[23] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[7\]/A2 Do0MUX.M\[2\].MUX\[7\]/A0 Do0MUX.M\[2\].MUX\[7\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_71 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.DIBUF\[14\].__cell__ BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X DIBUF\[14\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell___A BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__ BLOCK\[1\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] Do0MUX.M\[3\].MUX\[4\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_28 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_92_226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.DEC0.AND2 VGND VPWR BLOCK\[0\].RAM32.DEC0.AND3/A BLOCK\[0\].RAM32.DEC0.AND2/X + BLOCK\[0\].RAM32.DEC0.AND3/B BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.TIE0\[0\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO BLOCK\[1\].RAM32.TIE0\[0\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[6\].__cell___A DIBUF\[6\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[20\].__cell__ DIBUF\[20\].__cell__/X Di0[20] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[26\].__cell__ BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X DIBUF\[26\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_117_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[3\].__cell___A DIBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_771 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell___A BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL1BUF\[1\] DEC0.AND3/A Do0MUX.SEL1BUF\[1\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__ BLOCK\[1\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_69_554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.TIE0\[2\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO BLOCK\[0\].RAM32.TIE0\[2\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[26\].__cell___A DIBUF\[26\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_9 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[4\].__cell__ DIBUF\[4\].__cell__/X Di0[4] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] Do0MUX.M\[1\].MUX\[5\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_21_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.A0BUF\[3\].__cell___A A0BUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] Do0MUX.M\[3\].MUX\[2\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.A0BUF\[4\].__cell__ A0BUF\[4\].__cell__/X BLOCK\[1\].RAM32.DEC0.AND3/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_113_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XWEBUF\[0\].__cell__ WE0[0] WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[4\].__cell___A Di0[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\] BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[14\].__cell___A DIBUF\[14\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] Do0MUX.M\[0\].MUX\[1\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[8\].__cell___A DIBUF\[8\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] Do0MUX.M\[1\].MUX\[3\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDIBUF\[10\].__cell__ DIBUF\[10\].__cell__/X Di0[10] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[16\].__cell__ BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X DIBUF\[16\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_A0BUF\[4\].__cell___A A0[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_108_112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.DEC0.AND3 BLOCK\[0\].RAM32.DEC0.AND3/B BLOCK\[0\].RAM32.DEC0.AND3/X + BLOCK\[0\].RAM32.DEC0.AND3/A BLOCK\[0\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_28 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[28\].__cell__ BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X DIBUF\[28\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.WEBUF\[2\].__cell___A WEBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BLOCK\[0\].RAM32.DEC0.AND1/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__ DEC0.AND1/X BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_83_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[9\].__cell___A Di0[9] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__ BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[19\].__cell___A DIBUF\[19\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_7_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_59_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_46_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[21\].__cell___A DIBUF\[21\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_13_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell___A BLOCK\[1\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__ BLOCK\[2\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.DIBUF\[6\].__cell__ BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X DIBUF\[6\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_71_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_156_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BLOCK\[1\].RAM32.DEC0.AND0/Y BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_60_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] Do0MUX.M\[1\].MUX\[5\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.WEBUF\[2\].__cell__ WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.A0BUF\[0\].__cell__ A0BUF\[0\].__cell__/X BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] Do0MUX.M\[3\].MUX\[2\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] Do0MUX.M\[2\].MUX\[7\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_151_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__ BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_36_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell___A BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[18\].__cell__ BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X DIBUF\[18\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_133_606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell___A DEC0.AND2/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_53_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_155_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[26\].__cell___A DIBUF\[26\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]_A BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__ BLOCK\[0\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[2\].__cell___A DIBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[10\].__cell___A DIBUF\[10\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] Do0MUX.M\[1\].MUX\[3\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_66_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_76_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell___A DEC0.AND3/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] Do0MUX.M\[3\].MUX\[0\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DIBUF\[23\].__cell__ BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X DIBUF\[23\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_19_453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_99_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell___A DEC0.AND1/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.A0BUF\[2\].__cell___A A0BUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\] BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_97_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_94_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.CLKBUF.__cell__ BLOCK\[3\].RAM32.CLKBUF.__cell__/X CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_32_927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]_A BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XA0BUF\[1\].__cell__ A0[1] A0BUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_14_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.SEL0BUF\[0\]_A DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_41_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__ BLOCK\[3\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.EN0BUF.__cell___A DEC0.AND0/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[7\].__cell___A DIBUF\[7\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__ DEC0.AND2/X BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[15\].__cell___A DIBUF\[15\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[2\].__cell__ BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X DIBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_142_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BLOCK\[2\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__ BLOCK\[3\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[3\].MUX\[3\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[3\]/A1 Do0[27] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[3\]/A2 Do0MUX.M\[3\].MUX\[3\]/A0 Do0MUX.M\[3\].MUX\[3\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_17_595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_81_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[2\].MUX\[5\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[5\]/A1 Do0[21] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[5\]/A2 Do0MUX.M\[2\].MUX\[5\]/A0 Do0MUX.M\[2\].MUX\[5\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_6_720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[1\].MUX\[7\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[7\]/A1 Do0[15] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[7\]/A2 Do0MUX.M\[1\].MUX\[7\]/A0 Do0MUX.M\[1\].MUX\[7\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_59_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] Do0MUX.M\[3\].MUX\[2\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] Do0MUX.M\[2\].MUX\[7\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.DIBUF\[13\].__cell__ BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X DIBUF\[13\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_109_412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_90 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__ BLOCK\[1\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_143_779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_36_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DEC0.AND0 BLOCK\[3\].RAM32.DEC0.AND3/C BLOCK\[3\].RAM32.DEC0.AND0/Y + BLOCK\[3\].RAM32.DEC0.AND3/B BLOCK\[3\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_28_443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[25\].__cell__ BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X DIBUF\[25\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_34_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell___A BLOCK\[0\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__ BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DIBUF\[9\].__cell__ BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X DIBUF\[9\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_72 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[22\].__cell___A DIBUF\[22\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] Do0MUX.M\[1\].MUX\[3\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_54_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.TIE0\[1\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO BLOCK\[0\].RAM32.TIE0\[1\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] Do0MUX.M\[3\].MUX\[0\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_134_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDIBUF\[3\].__cell__ DIBUF\[3\].__cell__/X Di0[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_79 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_1015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_91_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.A0BUF\[3\].__cell__ A0BUF\[3\].__cell__/X BLOCK\[1\].RAM32.DEC0.AND3/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_82_603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.WEBUF\[3\].__cell___A WEBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_78 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\] BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[10\].__cell___A DIBUF\[10\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_555 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] Do0MUX.M\[1\].MUX\[1\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_115_619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_28_614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[27\].__cell___A DIBUF\[27\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\] BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.DIBUF\[9\].__cell__ BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X DIBUF\[9\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[15\].__cell__ BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X DIBUF\[15\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_46_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_80 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XPHY_91 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DEC0.AND1 VGND VPWR BLOCK\[3\].RAM32.DEC0.AND3/B BLOCK\[3\].RAM32.DEC0.AND1/X + BLOCK\[3\].RAM32.DEC0.AND3/A BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.EN0BUF.__cell__ DEC0.AND0/Y BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_29_923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.DIBUF\[27\].__cell__ BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X DIBUF\[27\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__ DEC0.AND1/X BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_88_119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] Do0MUX.M\[2\].MUX\[7\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_43_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[15\].__cell___A DIBUF\[15\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_3_362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_19_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__ BLOCK\[2\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_EN0BUF.__cell___A EN0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__ BLOCK\[3\].RAM32.CLKBUF.__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[3\].__cell___A DIBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__ BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_104_514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.DIBUF\[5\].__cell__ BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X DIBUF\[5\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_154_436 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BLOCK\[3\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] Do0MUX.M\[1\].MUX\[3\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_67_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_40 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]_A BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_39_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_DIBUF\[12\].__cell___A Di0[12] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] Do0MUX.M\[3\].MUX\[0\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] Do0MUX.M\[2\].MUX\[5\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.WEBUF\[1\].__cell__ WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_30_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.A0BUF\[3\].__cell___A A0BUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND2_B DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_114_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[17\].__cell__ BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X DIBUF\[17\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_18_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_70 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_92 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_743 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[22\].__cell___A DIBUF\[22\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DEC0.AND2 VGND VPWR BLOCK\[3\].RAM32.DEC0.AND3/A BLOCK\[3\].RAM32.DEC0.AND2/X + BLOCK\[3\].RAM32.DEC0.AND3/B BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_71_702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_62_46 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__ BLOCK\[0\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] Do0MUX.M\[1\].MUX\[1\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.DIBUF\[29\].__cell__ BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X DIBUF\[29\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_143_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_759 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[8\].__cell___A DIBUF\[8\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_175 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.SEL0BUF\[3\]_A DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_DIBUF\[17\].__cell___A Di0[17] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__ BLOCK\[0\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_97_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_31_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\] BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.DIBUF\[22\].__cell__ BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X DIBUF\[22\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[10\].__cell___A DIBUF\[10\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__ BLOCK\[0\].RAM32.CLKBUF.__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.WEBUF\[2\].__cell___A WEBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_86_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XA0BUF\[0\].__cell__ A0[0] A0BUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] Do0MUX.M\[2\].MUX\[7\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_23_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[27\].__cell___A DIBUF\[27\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\] BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_5_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__ BLOCK\[3\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_68_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_811 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__ BLOCK\[3\].RAM32.CLKBUF.__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__ DEC0.AND2/X BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[3\].MUX\[1\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[1\]/A1 Do0[25] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[1\]/A2 Do0MUX.M\[3\].MUX\[1\]/A0 Do0MUX.M\[3\].MUX\[1\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND2_C DEC0.AND3/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_102_827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.DIBUF\[1\].__cell__ BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X DIBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__ BLOCK\[3\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_13_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[2\].MUX\[3\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[3\]/A1 Do0[19] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[3\]/A2 Do0MUX.M\[2\].MUX\[3\]/A0 Do0MUX.M\[2\].MUX\[3\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_133_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL0BUF\[3\] DEC0.AND3/B Do0MUX.SEL0BUF\[3\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_104_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_60 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_82 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[19\].__cell__ BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X DIBUF\[19\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[1\].MUX\[5\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[5\]/A1 Do0[13] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[5\]/A2 Do0MUX.M\[1\].MUX\[5\]/A0 Do0MUX.M\[1\].MUX\[5\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_52_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[15\].__cell___A DIBUF\[15\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DEC0.AND3 BLOCK\[3\].RAM32.DEC0.AND3/B BLOCK\[3\].RAM32.DEC0.AND3/X + BLOCK\[3\].RAM32.DEC0.AND3/A BLOCK\[3\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DIBUF\[24\].__cell___A Di0[24] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_43_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] Do0MUX.M\[3\].MUX\[0\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] Do0MUX.M\[2\].MUX\[5\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_WEBUF\[0\].__cell___A WE0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[0\].MUX\[7\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[7\]/A1 Do0[7] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[7\]/A2 Do0MUX.M\[0\].MUX\[7\]/A0 Do0MUX.M\[0\].MUX\[7\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_19_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XCLKBUF.__cell__ CLKBUF.__cell__/X CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DIBUF\[12\].__cell__ BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X DIBUF\[12\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__ BLOCK\[1\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_71_555 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_87 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_74_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND2_A_N DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[29\].__cell__ DIBUF\[29\].__cell__/X Di0[29] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_27 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.DIBUF\[24\].__cell__ BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X DIBUF\[24\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__ BLOCK\[1\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XPHY_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] Do0MUX.M\[1\].MUX\[1\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] Do0MUX.M\[0\].MUX\[6\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[8\].__cell__ BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X DIBUF\[8\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[2\].__cell___A DIBUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.EN0BUF.__cell___A DEC0.AND3/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.TIE0\[0\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO BLOCK\[0\].RAM32.TIE0\[0\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_150_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BLOCK\[1\].RAM32.DEC0.AND3/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[2\].__cell__ DIBUF\[2\].__cell__/X Di0[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[29\].__cell___A Di0[29] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__ BLOCK\[1\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_82_447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.A0BUF\[2\].__cell__ A0BUF\[2\].__cell__/X BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[22\].__cell___A DIBUF\[22\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__ BLOCK\[0\].RAM32.CLKBUF.__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[31\].__cell___A Di0[31] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.A0BUF\[2\].__cell___A A0BUF\[2\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_50 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_83 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_94 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_69_517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_959 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_65_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_60_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DEC0.AND0_A DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DIBUF\[0\].__cell___A Di0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_52_995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\] BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BLOCK\[2\].RAM32.DEC0.AND2/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[10\].__cell___A DIBUF\[10\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_14_163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[7\].__cell___A DIBUF\[7\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDIBUF\[19\].__cell__ DIBUF\[19\].__cell__/X Di0[19] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BLOCK\[3\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[8\].__cell__ BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X DIBUF\[8\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.DIBUF\[14\].__cell__ BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X DIBUF\[14\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[4\].__cell___A DIBUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell___A BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_57_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_34_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_A0BUF\[0\].__cell___A A0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[27\].__cell___A DIBUF\[27\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_5_608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.DIBUF\[26\].__cell__ BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X DIBUF\[26\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] Do0MUX.M\[2\].MUX\[5\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell___A BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_399 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.A0BUF\[4\].__cell___A A0BUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]_A BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.SEL1BUF\[2\]_A DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BLOCK\[3\].RAM32.DEC0.AND1/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_369 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_79_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_63_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_50_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_DIBUF\[5\].__cell___A Di0[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_434 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[15\].__cell___A DIBUF\[15\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__ BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.DIBUF\[4\].__cell__ BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X DIBUF\[4\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] Do0MUX.M\[1\].MUX\[1\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[9\].__cell___A DIBUF\[9\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[31\].__cell__ BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X DIBUF\[31\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] Do0MUX.M\[0\].MUX\[6\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_99_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_23_301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] Do0MUX.M\[2\].MUX\[3\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_61_407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_40 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_62 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_84 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_84 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_95 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_A0BUF\[5\].__cell___A A0[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.WEBUF\[0\].__cell__ WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_DEC0.AND0_B DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__ BLOCK\[2\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_127_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_294 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_137_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_46_245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_14_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_19 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.WEBUF\[3\].__cell___A WEBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[16\].__cell__ BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X DIBUF\[16\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_114_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_51_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_65_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_70 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_30_465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_81_822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__ BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_80_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_88_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.DIBUF\[28\].__cell__ BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X DIBUF\[28\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XPHY_265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_4_664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[22\].__cell___A DIBUF\[22\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__ BLOCK\[0\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_89_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[21\].__cell__ BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X DIBUF\[21\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.CLKBUF.__cell___A CLKBUF.__cell__/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_117_610 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] Do0MUX.M\[2\].MUX\[5\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\] BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] Do0MUX.M\[3\].MUX\[7\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_911 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_105_679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_30 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_52 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_63 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_96 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_839 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_130_969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__ DEC0.AND2/X BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell___A DEC0.AND2/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_51_463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDo0MUX.M\[2\].MUX\[1\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[1\]/A1 Do0[17] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[1\]/A2 Do0MUX.M\[2\].MUX\[1\]/A0 Do0MUX.M\[2\].MUX\[1\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDo0MUX.SEL0BUF\[1\] DEC0.AND3/B Do0MUX.SEL0BUF\[1\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_4_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[27\].__cell___A DIBUF\[27\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_62_717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_128_546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.DIBUF\[0\].__cell__ BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X DIBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__ BLOCK\[3\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[1\].MUX\[3\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[3\]/A1 Do0[11] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[3\]/A2 Do0MUX.M\[1\].MUX\[3\]/A0 Do0MUX.M\[1\].MUX\[3\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] Do0MUX.M\[0\].MUX\[6\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[3\].__cell___A DIBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell___A BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[11\].__cell___A DIBUF\[11\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[18\].__cell__ BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X DIBUF\[18\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] Do0MUX.M\[2\].MUX\[3\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell___A DEC0.AND0/Y VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_125_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[0\].MUX\[5\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[5\]/A1 Do0[5] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[5\]/A2 Do0MUX.M\[0\].MUX\[5\]/A0 Do0MUX.M\[0\].MUX\[5\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDEC0.AND0 DEC0.AND3/C DEC0.AND0/Y DEC0.AND3/B DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X BLOCK\[1\].RAM32.CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_128_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_116_516 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_84_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__ BLOCK\[3\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_130_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.DIBUF\[11\].__cell__ BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X DIBUF\[11\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XPHY_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell___A DEC0.AND1/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_67_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.A0BUF\[3\].__cell___A A0BUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BLOCK\[2\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_16_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_28_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDIBUF\[28\].__cell__ DIBUF\[28\].__cell__/X Di0[28] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] Do0MUX.M\[0\].MUX\[4\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[23\].__cell__ BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X DIBUF\[23\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_106_390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_94_299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__ BLOCK\[1\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_54_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_26_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[7\].__cell__ BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X DIBUF\[7\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[8\].__cell___A DIBUF\[8\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_13_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell___A BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[16\].__cell___A DIBUF\[16\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_36_675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDIBUF\[1\].__cell__ DIBUF\[1\].__cell__/X Di0[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_58_233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_20 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_86 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__ BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.WEBUF\[3\].__cell__ WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.WEBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell___A BLOCK\[2\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.A0BUF\[1\].__cell__ A0BUF\[1\].__cell__/X BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_3_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_86_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_37_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_93_876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_134_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] Do0MUX.M\[3\].MUX\[7\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_118_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XDEC0.AND1 VGND VPWR DEC0.AND3/B DEC0.AND1/X DEC0.AND3/A DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BLOCK\[3\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_65_397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_103_767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]_A BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XDIBUF\[18\].__cell__ DIBUF\[18\].__cell__/X Di0[18] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XPHY_267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.DIBUF\[7\].__cell__ BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X DIBUF\[7\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_100 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[13\].__cell__ BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X DIBUF\[13\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] Do0MUX.M\[0\].MUX\[6\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__ BLOCK\[1\].RAM32.CLKBUF.__cell__/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[23\].__cell___A DIBUF\[23\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_134_177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] Do0MUX.M\[2\].MUX\[3\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.WEBUF\[3\].__cell__ WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.WEBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__ DEC0.AND3/X BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_39_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[25\].__cell__ BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X DIBUF\[25\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_91_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_CLKBUF.__cell___A CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_142_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_99_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_10 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_43 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_54 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_41_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_135_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[11\].__cell___A DIBUF\[11\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] Do0MUX.M\[0\].MUX\[4\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__ BLOCK\[2\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] Do0MUX.M\[2\].MUX\[1\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_11_78 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.DIBUF\[3\].__cell__ BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X DIBUF\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.DIBUF\[30\].__cell__ BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X DIBUF\[30\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_123_275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_77_395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[28\].__cell___A DIBUF\[28\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[30\].__cell___A DIBUF\[30\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__ BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDEC0.AND2 VGND VPWR DEC0.AND3/A DEC0.AND2/X DEC0.AND3/B DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_83_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_79_435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_35_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[15\].__cell__ BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X DIBUF\[15\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BLOCK\[3\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DEC0.AND0 BLOCK\[1\].RAM32.DEC0.AND3/C BLOCK\[1\].RAM32.DEC0.AND0/Y + BLOCK\[1\].RAM32.DEC0.AND3/B BLOCK\[1\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_80_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_688 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.CLKBUF.__cell__ BLOCK\[2\].RAM32.CLKBUF.__cell__/X CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] Do0MUX.M\[3\].MUX\[7\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[16\].__cell___A DIBUF\[16\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_72_633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_125_156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.DIBUF\[27\].__cell__ BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X DIBUF\[27\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_116_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_85_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_14_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_108_679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_424 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__ BLOCK\[1\].RAM32.CLKBUF.__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_666 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[4\].__cell___A DIBUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__ BLOCK\[0\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_50_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.DIBUF\[20\].__cell__ BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X DIBUF\[20\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell___A BLOCK\[1\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_22 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_33 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_44 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_55 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_66 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_88 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_99 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.A0BUF\[4\].__cell__ A0BUF\[4\].__cell__/X BLOCK\[0\].RAM32.DEC0.AND3/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_41_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_136_730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] Do0MUX.M\[2\].MUX\[3\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_123_457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_799 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_DIBUF\[13\].__cell___A Di0[13] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] Do0MUX.M\[3\].MUX\[5\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_37_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__ BLOCK\[0\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.EN0BUF.__cell__ DEC0.AND3/X BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_105_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_46_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_14_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.A0BUF\[4\].__cell___A A0BUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_21_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_51_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_19_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDEC0.AND3 DEC0.AND3/B DEC0.AND3/X DEC0.AND3/A DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__ DEC0.AND2/X BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[23\].__cell___A DIBUF\[23\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDo0MUX.M\[1\].MUX\[1\] Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[1\]/A1 Do0[9] Do0MUX.SEL1BUF\[1\]/X + Do0MUX.M\[1\].MUX\[1\]/A2 Do0MUX.M\[1\].MUX\[1\]/A0 Do0MUX.M\[1\].MUX\[1\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] Do0MUX.M\[0\].MUX\[4\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__ BLOCK\[3\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XPHY_236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] Do0MUX.M\[2\].MUX\[1\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.TIE0\[3\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO BLOCK\[3\].RAM32.TIE0\[3\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_126_839 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[0\].MUX\[3\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[3\]/A1 Do0[3] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[3\]/A2 Do0MUX.M\[0\].MUX\[3\]/A0 Do0MUX.M\[0\].MUX\[3\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[9\].__cell___A DIBUF\[9\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.DIBUF\[17\].__cell__ BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X DIBUF\[17\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_112_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.DEC0.AND1 VGND VPWR BLOCK\[1\].RAM32.DEC0.AND3/B BLOCK\[1\].RAM32.DEC0.AND1/X + BLOCK\[1\].RAM32.DEC0.AND3/A BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_134_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_DIBUF\[18\].__cell___A Di0[18] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.A0BUF\[4\].__cell__ A0BUF\[4\].__cell__/X BLOCK\[3\].RAM32.DEC0.AND3/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__ BLOCK\[3\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_715 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_156_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[11\].__cell___A DIBUF\[11\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.DIBUF\[10\].__cell__ BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X DIBUF\[10\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_100_514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_DIBUF\[20\].__cell___A Di0[20] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_130_160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.CLKBUF.__cell___A CLKBUF.__cell__/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_40_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]_A BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] Do0MUX.M\[0\].MUX\[2\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_36_601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.WEBUF\[3\].__cell___A WEBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XDIBUF\[27\].__cell__ DIBUF\[27\].__cell__/X Di0[27] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.WEBUF\[0\].__cell___A WEBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_12 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] Do0MUX.M\[3\].MUX\[7\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_23 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_45 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_56 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_67 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.DIBUF\[22\].__cell__ BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X DIBUF\[22\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XPHY_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_89 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[28\].__cell___A DIBUF\[28\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.DIBUF\[6\].__cell__ BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X DIBUF\[6\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[30\].__cell___A DIBUF\[30\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_63_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_2_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDIBUF\[0\].__cell__ DIBUF\[0\].__cell__/X Di0[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__ BLOCK\[1\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.WEBUF\[2\].__cell__ WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_95_150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.A0BUF\[0\].__cell__ A0BUF\[0\].__cell__/X BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]_A BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[16\].__cell___A DIBUF\[16\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[25\].__cell___A Di0[25] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] Do0MUX.M\[3\].MUX\[5\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_111_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_WEBUF\[1\].__cell___A WE0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__ BLOCK\[1\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_20_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_125_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_74_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.DEC0.AND2 VGND VPWR BLOCK\[1\].RAM32.DEC0.AND3/A BLOCK\[1\].RAM32.DEC0.AND2/X + BLOCK\[1\].RAM32.DEC0.AND3/B BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_71 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_4_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_79_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_442 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[17\].__cell__ DIBUF\[17\].__cell__/X Di0[17] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] Do0MUX.M\[0\].MUX\[4\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_39_621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[6\].__cell__ BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X DIBUF\[6\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_82_900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[12\].__cell__ BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X DIBUF\[12\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] Do0MUX.M\[2\].MUX\[1\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] Do0MUX.M\[1\].MUX\[6\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[1\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell___A BLOCK\[0\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[3\].__cell___A DIBUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_48_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_50_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[0\].__cell___A DIBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell___A BLOCK\[2\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.WEBUF\[2\].__cell__ WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_26_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_13 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_24 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_46 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_68 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__ DEC0.AND3/X BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_79 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.DIBUF\[24\].__cell__ BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X DIBUF\[24\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[23\].__cell___A DIBUF\[23\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_59 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BLOCK\[3\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_100_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_89 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.A0BUF\[3\].__cell___A A0BUF\[3\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.A0BUF\[0\].__cell___A A0BUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] Do0MUX.M\[0\].MUX\[2\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_22_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_156_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.DIBUF\[2\].__cell__ BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X DIBUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_DIBUF\[1\].__cell___A Di0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[11\].__cell___A DIBUF\[11\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[8\].__cell___A DIBUF\[8\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_31 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[5\].__cell___A DIBUF\[5\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.DEC0.AND3 BLOCK\[1\].RAM32.DEC0.AND3/B BLOCK\[1\].RAM32.DEC0.AND3/X + BLOCK\[1\].RAM32.DEC0.AND3/A BLOCK\[1\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__ BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__ BLOCK\[2\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_28_79 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_44_89 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BLOCK\[0\].RAM32.DEC0.AND2/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_A0BUF\[1\].__cell___A A0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[28\].__cell___A DIBUF\[28\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] Do0MUX.M\[3\].MUX\[5\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__ BLOCK\[1\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.DIBUF\[14\].__cell__ BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X DIBUF\[14\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_89_555 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell___A BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[30\].__cell___A DIBUF\[30\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_55_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__ BLOCK\[2\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_154_733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_110_836 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_91_797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_1014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_14 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_58 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_69 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[26\].__cell__ BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X DIBUF\[26\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell___A BLOCK\[2\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[6\].__cell___A Di0[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[16\].__cell___A DIBUF\[16\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_70_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_42_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BLOCK\[1\].RAM32.DEC0.AND1/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__ BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] Do0MUX.M\[2\].MUX\[1\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] Do0MUX.M\[1\].MUX\[6\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_69_823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.A0BUF\[3\].__cell__ A0BUF\[3\].__cell__/X BLOCK\[0\].RAM32.DEC0.AND3/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_96_675 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] Do0MUX.M\[3\].MUX\[3\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_118_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_19_208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_A0BUF\[6\].__cell___A A0[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_574 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__ BLOCK\[0\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[31\].__cell__ BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X DIBUF\[31\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_80_895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_59_196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_43 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] Do0MUX.M\[0\].MUX\[2\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_55_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_69_472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BLOCK\[2\].RAM32.DEC0.AND0/Y BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[1\] Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[1\]/A1 Do0[1] Do0MUX.SEL1BUF\[0\]/X + Do0MUX.M\[0\].MUX\[1\]/A2 Do0MUX.M\[0\].MUX\[1\]/A0 Do0MUX.M\[0\].MUX\[1\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_4_435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_133_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[9\].__cell__ BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X DIBUF\[9\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]_A BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_144_458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.TIE0\[2\].__cell__ BLOCK\[3\].RAM32.TIE0\[2\].__cell__/LO BLOCK\[3\].RAM32.TIE0\[2\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[16\].__cell__ BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X DIBUF\[16\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__ BLOCK\[1\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_29_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[23\].__cell___A DIBUF\[23\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_154_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell___A BLOCK\[1\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[3\].MUX\[6\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[6\]/A1 Do0[30] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[6\]/A2 Do0MUX.M\[3\].MUX\[6\]/A0 Do0MUX.M\[3\].MUX\[6\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_82_732 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[3\].RAM32.A0BUF\[3\].__cell__ A0BUF\[3\].__cell__/X BLOCK\[3\].RAM32.DEC0.AND3/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_26 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_81_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_37 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__ BLOCK\[3\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell___A DEC0.AND3/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XEN0BUF.__cell__ EN0 DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] Do0MUX.M\[0\].MUX\[0\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] Do0MUX.M\[3\].MUX\[5\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_78_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__ BLOCK\[3\].RAM32.WEBUF\[3\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDIBUF\[26\].__cell__ DIBUF\[26\].__cell__/X Di0[26] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.DIBUF\[21\].__cell__ BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X DIBUF\[21\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_69_835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.SEL0BUF\[2\]_A DEC0.AND3/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_86_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL1BUF\[2\] DEC0.AND3/A Do0MUX.SEL1BUF\[2\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[5\].__cell__ BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X DIBUF\[5\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_7_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell___A DEC0.AND2/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_103_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_97_930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[28\].__cell___A DIBUF\[28\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_153_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_106_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__ BLOCK\[1\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.WEBUF\[1\].__cell__ WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_109_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] Do0MUX.M\[1\].MUX\[6\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[4\].__cell___A DIBUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.DIBUF\[30\].__cell___A DIBUF\[30\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[12\].__cell___A DIBUF\[12\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] Do0MUX.M\[3\].MUX\[3\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell___A DEC0.AND0/Y VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_84_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_33 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_85_87 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__ BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell___A BLOCK\[1\].RAM32.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.A0BUF\[4\].__cell___A A0BUF\[4\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_139_776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_154_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__ BLOCK\[2\].RAM32.CLKBUF.__cell__/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_95_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] Do0MUX.M\[0\].MUX\[2\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_100_326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_16 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_38 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_67 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] Do0MUX.M\[1\].MUX\[4\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XDIBUF\[16\].__cell__ DIBUF\[16\].__cell__/X Di0[16] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.DIBUF\[5\].__cell__ BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X DIBUF\[5\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_70 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.DIBUF\[11\].__cell__ BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X DIBUF\[11\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_50_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[9\].__cell___A DIBUF\[9\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.EN0BUF.__cell___A DEC0.AND2/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[17\].__cell___A DIBUF\[17\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_127_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.WEBUF\[1\].__cell__ WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.WEBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_155_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__ DEC0.AND3/X BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.DIBUF\[23\].__cell__ BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X DIBUF\[23\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BLOCK\[3\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_101_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] Do0MUX.M\[0\].MUX\[0\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DEC0.AND1_A_N DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell___A BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_79 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_156_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_20 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_93_488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.WEBUF\[0\].__cell___A WEBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_47 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.DIBUF\[1\].__cell__ BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X DIBUF\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell___A BLOCK\[0\].RAM32.CLKBUF.__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_110_817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_48_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__ BLOCK\[2\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] Do0MUX.M\[1\].MUX\[6\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[24\].__cell___A DIBUF\[24\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_17 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_28 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_22_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] Do0MUX.M\[3\].MUX\[3\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[13\].__cell__ BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X DIBUF\[13\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_17_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__ BLOCK\[2\].RAM32.CLKBUF.__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__ BLOCK\[2\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_35_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_97_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.DIBUF\[25\].__cell__ BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X DIBUF\[25\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_42_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[12\].__cell___A DIBUF\[12\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_124_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] Do0MUX.M\[1\].MUX\[4\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_604 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] Do0MUX.M\[3\].MUX\[1\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_52_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[29\].__cell__ BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X DIBUF\[29\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_134_845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_803 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__ BLOCK\[3\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_114_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[2\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_11_420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.A0BUF\[2\].__cell__ A0BUF\[2\].__cell__/X BLOCK\[0\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[29\].__cell___A DIBUF\[29\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_34_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[0\].__cell___A DIBUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]_A BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_Do0MUX.SEL1BUF\[1\]_A DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_25_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_80_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_22 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.DIBUF\[31\].__cell___A DIBUF\[31\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__ BLOCK\[0\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__ BLOCK\[0\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_23 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.DIBUF\[30\].__cell__ BLOCK\[1\].RAM32.DIBUF\[30\].__cell__/X DIBUF\[30\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_4_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_26_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] Do0MUX.M\[0\].MUX\[0\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__ BLOCK\[2\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.A0BUF\[0\].__cell___A A0BUF\[0\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_29_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_18 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[17\].__cell___A DIBUF\[17\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.DIBUF\[8\].__cell__ BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X DIBUF\[8\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_151_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\]_A BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.TIE0\[1\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO BLOCK\[3\].RAM32.TIE0\[1\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BLOCK\[2\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_135_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[3\].MUX\[4\] Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[4\]/A1 Do0[28] Do0MUX.SEL1BUF\[3\]/X + Do0MUX.M\[3\].MUX\[4\]/A2 Do0MUX.M\[3\].MUX\[4\]/A0 Do0MUX.M\[3\].MUX\[4\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[15\].__cell__ BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X DIBUF\[15\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_74_1012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDo0MUX.M\[2\].MUX\[6\] Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[6\]/A1 Do0[22] Do0MUX.SEL1BUF\[2\]/X + Do0MUX.M\[2\].MUX\[6\]/A2 Do0MUX.M\[2\].MUX\[6\]/A0 Do0MUX.M\[2\].MUX\[6\]/A3 VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_784 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[5\].__cell___A DIBUF\[5\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.A0BUF\[2\].__cell__ A0BUF\[2\].__cell__/X BLOCK\[3\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_138_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__ BLOCK\[3\].RAM32.WEBUF\[0\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.TIE0\[3\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO BLOCK\[2\].RAM32.TIE0\[3\].__cell__/HI + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.DIBUF\[19\].__cell__ BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X DIBUF\[19\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] Do0MUX.M\[3\].MUX\[3\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_103_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_24_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__ BLOCK\[0\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[14\].__cell___A Di0[14] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_627 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_64_384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__ BLOCK\[3\].RAM32.WEBUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[25\].__cell__ DIBUF\[25\].__cell__/X Di0[25] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.SEL1BUF\[0\] DEC0.AND3/A Do0MUX.SEL1BUF\[0\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.DIBUF\[20\].__cell__ BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X DIBUF\[20\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_94 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.DIBUF\[4\].__cell__ BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X DIBUF\[4\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[24\].__cell___A DIBUF\[24\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_35 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_16_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__ BLOCK\[0\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] Do0MUX.M\[1\].MUX\[4\]/A2 BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_113_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_3_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_59_91 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDIBUF\[9\].__cell__ DIBUF\[9\].__cell__/X Di0[9] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__ BLOCK\[3\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_144_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] Do0MUX.M\[3\].MUX\[1\]/A1 BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_118_1015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.WEBUF\[0\].__cell__ WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_97_582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_37 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_20_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_29_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__ BLOCK\[2\].RAM32.TIE0\[3\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[3\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_19 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DIBUF\[19\].__cell___A Di0[19] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__ BLOCK\[1\].RAM32.WEBUF\[1\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_154_546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\] BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_108_996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[12\].__cell___A DIBUF\[12\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_72_91 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DIBUF\[21\].__cell___A Di0[21] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] Do0MUX.M\[0\].MUX\[0\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__ BLOCK\[3\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\]_A BLOCK\[1\].RAM32.A0BUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_75 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] Do0MUX.M\[1\].MUX\[2\]/A0 BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BLOCK\[1\].RAM32.A0BUF\[0\].__cell__/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_13_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.WEBUF\[1\].__cell___A WEBUF\[1\].__cell__/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DEC0.AND3_A DEC0.AND3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDIBUF\[15\].__cell__ DIBUF\[15\].__cell__/X Di0[15] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[29\].__cell___A DIBUF\[29\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.DIBUF\[4\].__cell__ BLOCK\[3\].RAM32.DIBUF\[4\].__cell__/X DIBUF\[4\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_55_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.DIBUF\[10\].__cell__ BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X DIBUF\[10\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_5_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_101_980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.DIBUF\[31\].__cell___A DIBUF\[31\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.WEBUF\[0\].__cell__ WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.WEBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_83_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_812 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__ DEC0.AND3/X BLOCK\[3\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.DIBUF\[22\].__cell__ BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X DIBUF\[22\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[12\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_0_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[24\].__cell__/X BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[12\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_574 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[0\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[31\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[4\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[26\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[19\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[9\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[27\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.DIBUF\[17\].__cell___A DIBUF\[17\].__cell__/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__ BLOCK\[1\].RAM32.TIE0\[0\].__cell__/LO + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].__cell__/Z BLOCK\[1\].RAM32.FBUFENBUF0\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DIBUF\[26\].__cell___A Di0[26] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\]_A BLOCK\[0\].RAM32.A0BUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_603 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__ BLOCK\[0\].RAM32.TIE0\[1\].__cell__/LO + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].__cell__/Z BLOCK\[0\].RAM32.FBUFENBUF0\[1\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_61_1015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BLOCK\[0\].RAM32.A0BUF\[1\].__cell__/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[15\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_81_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_WEBUF\[2\].__cell___A WE0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[11\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[3\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[26\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_153_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[30\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BLOCK\[2\].RAM32.DEC0.AND3/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[22\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[4\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[10\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[5\].__cell__/X BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.CLKBUF.__cell__ BLOCK\[1\].RAM32.CLKBUF.__cell__/X CLKBUF.__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[17\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[18\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__ BLOCK\[2\].RAM32.TIE0\[2\].__cell__/LO + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].__cell__/Z BLOCK\[2\].RAM32.FBUFENBUF0\[2\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.DIBUF\[0\].__cell__ BLOCK\[1\].RAM32.DIBUF\[0\].__cell__/X DIBUF\[0\].__cell__/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[25\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[6\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[1\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[9\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND VPWR VGND BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].__cell__/X BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_135_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[15\].__cell__/X BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[5\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[2\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[29\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[27\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[14\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[13\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.__cell__/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[23\].__cell__/X BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[24\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].__cell__/Z + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0_A + BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[7\].__cell__/X BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[20\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[17\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[10\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[0\].RAM32.DIBUF\[19\].__cell__/X BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[28\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BLOCK\[3\].RAM32.A0BUF\[2\].__cell__/X + BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].__cell__/Z BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND VPWR VGND BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].__cell__/X BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[3\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_16_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BLOCK\[0\].RAM32.DIBUF\[21\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[2\].RAM32.DIBUF\[8\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] Do0MUX.M\[1\].MUX\[4\]/A3 BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].__cell__/Z VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].__cell__/Z BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[28\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[16\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].__cell__/Z BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].__cell__/Z BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[2\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BLOCK\[3\].RAM32.DIBUF\[11\].__cell__/X BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BLOCK\[2\].RAM32.DIBUF\[29\].__cell__/X BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].__cell__/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BLOCK\[1\].RAM32.DIBUF\[1\].__cell__/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 .ends .subckt NF_sky130_fd_sc_hd__nand3_4 Y A B C VGND VPWR VNB VPB X0 a_27_47# B a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# B a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_445_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_445_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_445_47# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_445_47# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__xnor2_4 Y B A VGND VPWR VNB VPB X0 VGND A a_902_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y a_38_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_38_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_820_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_38_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A a_902_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND B a_902_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B a_902_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y B a_820_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_38_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_38_297# B a_38_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A a_38_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_902_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_820_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_902_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VPWR A a_38_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y a_38_297# a_902_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y a_38_297# a_902_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_38_47# B a_38_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_38_47# B a_38_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_38_297# B a_38_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_38_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VPWR B a_38_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_38_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_902_47# a_38_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_902_47# a_38_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 Y B a_820_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_38_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_820_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VPWR A a_38_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VGND A a_38_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VPWR A a_820_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_902_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 a_820_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 Y a_38_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 a_902_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X36 a_38_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 VPWR A a_820_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 VPWR a_38_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 VPWR B a_38_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2111oi_4 D1 C1 B1 A2 A1 Y VGND VPWR VNB VPB X0 Y D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_455_297# B1 a_821_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_28_297# D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_821_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_28_297# C1 a_455_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_455_297# C1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A2 a_821_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y D1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_821_297# B1 a_455_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y D1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_1205_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_28_297# C1 a_455_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_1205_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_821_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y A1 a_1205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR A1 a_821_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y A1 a_1205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_1205_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_28_297# D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND A2 a_1205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_455_297# B1 a_821_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_821_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_1205_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 VGND A2 a_1205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X34 VPWR A1 a_821_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 a_821_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 VPWR A2 a_821_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 a_455_297# C1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 a_821_297# B1 a_455_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X39 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o21a_4 A1 A2 B1 X VPWR VGND VNB VPB X0 X a_80_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_475_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_80_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_762_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_475_47# B1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A2 a_475_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_80_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_80_21# A2 a_762_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_80_21# B1 a_475_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_80_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_475_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 X a_80_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A1 a_934_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_934_297# A2 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR B1 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A1 a_475_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nand3b_4 A_N Y B C VGND VPWR VNB VPB X0 VGND C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_633_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_633_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__xnor2_2 VGND VPWR Y A B VNB VPB X0 a_27_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_560_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND B a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B a_474_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y a_27_297# a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_474_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A a_560_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_27_47# B a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_474_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_560_47# a_27_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR A a_474_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR a_27_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_560_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2111a_4 X A1 A2 C1 B1 D1 VPWR VGND VNB VPB X0 VGND A1 a_361_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# A2 a_852_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_27_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_27_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_852_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_361_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR C1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND A2 a_361_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_27_297# D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_27_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_47# D1 a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_361_47# B1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_361_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_277_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_445_47# B1 a_361_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_27_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_27_297# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_681_297# A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_27_47# C1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VGND a_27_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VPWR D1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VPWR a_27_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR A1 a_681_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_27_297# D1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o211a_4 A1 X C1 A2 B1 VGND VPWR VNB VPB X0 VGND A1 a_474_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A1 a_1122_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR C1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_950_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_557_47# B1 a_474_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_474_47# B1 a_748_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A2 a_474_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_79_21# C1 a_557_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_474_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_79_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_748_47# C1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_474_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VPWR B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_79_21# A2 a_950_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_1122_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o41ai_1 A1 A2 A3 A4 Y B1 VGND VPWR VNB VPB X0 a_348_297# A3 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_109_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_193_297# A4 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_432_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A4 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_432_297# A2 a_348_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_109_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o31ai_4 A3 A2 A1 Y B1 VGND VPWR VNB VPB X0 Y A3 a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_449_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A3 a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A1 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y B1 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_449_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y B1 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_31_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_297# A2 a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A1 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_31_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_31_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_31_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_449_297# A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND A2 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND A2 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VGND A3 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_31_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_27_297# A2 a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND A3 a_31_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_31_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_449_297# A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_31_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_31_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a32oi_4 A3 A2 A1 B1 Y B2 VGND VPWR VNB VPB X0 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_1249_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_1249_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_803_47# A2 a_1249_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_803_47# A2 a_1249_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y A1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 Y A1 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_1249_47# A2 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_27_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 a_1249_47# A2 a_803_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_803_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_803_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X35 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 VGND A3 a_1249_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X37 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 VGND A3 a_1249_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 VGND B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__or4bb_2 A X B D_N C_N VPWR VGND VNB VPB X0 a_398_413# a_206_93# a_316_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR a_316_413# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_316_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_316_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND C_N a_27_410# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR C_N a_27_410# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND a_27_410# a_316_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VGND A a_316_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND a_316_413# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_566_297# B a_494_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_206_93# D_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_316_413# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_206_93# D_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_494_297# a_27_410# a_398_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_316_413# a_206_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 VPWR A a_566_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o311a_4 A1 A2 A3 B1 C1 X VPWR VGND VNB VPB X0 a_79_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_467_47# C1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A2 a_717_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_467_47# B1 a_717_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND A1 a_717_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_79_21# C1 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_717_47# B1 a_467_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A3 a_717_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_1147_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A1 a_1147_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_1147_297# A2 a_875_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_79_21# A3 a_875_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_875_297# A3 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_875_297# A2 a_1147_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_717_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_717_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_717_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR C1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a32oi_1 A2 Y A1 B2 B1 A3 VGND VPWR VNB VPB X0 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A3 a_383_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_309_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_383_47# A2 a_309_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_109_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a21boi_4 Y A1 B1_N A2 VGND VPWR VNB VPB X0 a_223_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A1 a_658_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B1_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_223_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_658_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_223_297# a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A2 a_223_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_658_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR A1 a_223_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_223_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_658_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y a_27_47# a_223_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_223_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A2 a_223_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A1 a_223_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_658_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND B1_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_223_297# a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_658_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND A2 a_658_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VGND a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VGND a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 Y A1 a_658_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 Y a_27_47# a_223_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_RAM256 A0[0] A0[1] A0[2] A0[3] A0[4] A0[5] A0[6] A0[7] CLK Di0[0] Di0[10] + Di0[11] Di0[12] Di0[13] Di0[14] Di0[15] Di0[16] Di0[17] Di0[18] Di0[19] Di0[1] Di0[20] + Di0[21] Di0[22] Di0[23] Di0[24] Di0[25] Di0[26] Di0[27] Di0[28] Di0[29] Di0[2] Di0[30] + Di0[31] Di0[3] Di0[4] Di0[5] Di0[6] Di0[7] Di0[8] Di0[9] Do0[0] Do0[10] Do0[11] + Do0[12] Do0[13] Do0[14] Do0[15] Do0[16] Do0[17] Do0[18] Do0[19] Do0[1] Do0[20] Do0[21] + Do0[22] Do0[23] Do0[24] Do0[25] Do0[26] Do0[27] Do0[28] Do0[29] Do0[2] Do0[30] Do0[31] + Do0[3] Do0[4] Do0[5] Do0[6] Do0[7] Do0[8] Do0[9] EN0 WE0[0] WE0[1] WE0[2] WE0[3] + VPWR VGND XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell_A BANK128\[1\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell_A BANK128\[1\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_3_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_23_1694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_22_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_50_453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_109_717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_786 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A1 Do0MUX.M\[3\].MUX\[0\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.DEC0.AND2/X + BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell_A BANK128\[0\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_159_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_1158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_1562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_851 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_1535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_33_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_177_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell_A BANK128\[1\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_105_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A1 Do0MUX.M\[2\].MUX\[2\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_55_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_1554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[2\].MUX\[3\]_A0 Do0MUX.M\[2\].MUX\[3\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_1148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A1 Do0MUX.M\[1\].MUX\[4\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X + BANK128\[1\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_1507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X + BANK128\[0\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell_A BANK128\[1\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell_A BANK128\[1\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A1 Do0MUX.M\[0\].MUX\[6\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_14_1402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_144_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.A0BUF\[2\].cell A0[2] BANK128\[1\].RAM128.A0BUF\[2\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell BANK128\[0\].RAM128.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_58_1351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_135_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_1584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_1027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_78_445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell_A BANK128\[1\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_526 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X + BANK128\[1\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_1531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_100_1493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_139_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_1237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_179_1450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_859 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_133_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X + BANK128\[0\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_184_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X + BANK128\[0\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell BANK128\[1\].RAM128.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_66_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell_A BANK128\[1\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_1557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_1612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_1039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.DIBUF\[14\].cell BANK128\[1\].RAM128.DIBUF\[14\].cell/X Di0[14] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[3\].MUX\[5\]_A0 Do0MUX.M\[3\].MUX\[5\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[26\].cell_A Di0[26] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.WEBUF\[0\].cell_A WE0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_1368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_0_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_62_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.A0BUF\[6\].cell A0[6] BANK128\[0\].RAM128.DEC0.AND3/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[1\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell BANK128\[1\].RAM128.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.A0BUF\[4\].cell_A A0[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_34_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X + BANK128\[1\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_1601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_1082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell_A BANK128\[0\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X + BANK128\[1\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_22_871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_1263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_1097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_31_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_548 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_63 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_1655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[3\].cell_A BANK128\[0\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_185_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[0\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_1123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_125_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DIBUF\[18\].cell BANK128\[0\].RAM128.DIBUF\[18\].cell/X Di0[18] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_67_576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_1015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_22_112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_1059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[3\].cell BANK128\[0\].RAM128.A0BUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_1395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_178_1504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_175_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell_A BANK128\[1\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.DEC0.AND3 BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.DEC0.AND3/X + BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.DEC0.AND3/C VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__and3_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_1126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X + BANK128\[1\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_139_320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_158_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_784 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell_A BANK128\[0\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_7_1111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[3\].MUX\[2\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[2\]/A1 + Do0MUX.M\[3\].MUX\[2\]/A0 Do0[26] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_32_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_162_1349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_160_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell_A BANK128\[0\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_178_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[2\].MUX\[4\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[4\]/A1 + Do0MUX.M\[2\].MUX\[4\]/A0 Do0[20] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_78_616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X + BANK128\[1\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_93_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_971 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell_A BANK128\[0\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X + BANK128\[0\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_1081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_15_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_95 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_10_660 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_92_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDo0MUX.M\[1\].MUX\[6\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[6\]/A1 + Do0MUX.M\[1\].MUX\[6\]/A0 Do0[14] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_127_890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_47_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell_A BANK128\[1\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[19\].cell_A Di0[19] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\] BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_1377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell_A BANK128\[0\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_87_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_124_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_180_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell_A BANK128\[1\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_1441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X + BANK128\[1\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_70_1095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_10_490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_65_630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X + BANK128\[1\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_1602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_27_1638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[1\].cell_A Di0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_1529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_48_619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_112_1354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_54_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_19_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_124_101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_166_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_182_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X + BANK128\[0\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_188_863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A1 Do0MUX.M\[0\].MUX\[0\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_1226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_69_254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_25 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_164_1049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_1347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_14_1041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_1708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_240 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_134_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_103_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_112_1162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_186_1241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell BANK128\[1\].RAM128.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.DIBUF\[20\].cell BANK128\[1\].RAM128.DIBUF\[20\].cell/X Di0[20] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_12_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell_A BANK128\[0\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell_A BANK128\[0\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_125_498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_67_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_1328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_1208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_163_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_28_1700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_1059 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X + BANK128\[1\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_68 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_25_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A1 Do0MUX.M\[3\].MUX\[5\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_148_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_21_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_135_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_1243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[0\].MUX\[2\]_A0 Do0MUX.M\[0\].MUX\[2\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell_A BANK128\[0\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_1612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_160_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DEC0.AND1_A_N BANK128\[1\].RAM128.DEC0.AND3/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell_A BANK128\[1\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A1 Do0MUX.M\[2\].MUX\[7\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_99_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_1690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell BANK128\[1\].RAM128.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_36_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_1464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_1191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_190_143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_186_427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_10_820 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[10\].cell_A Di0[10] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[24\].cell BANK128\[0\].RAM128.DIBUF\[24\].cell/X Di0[24] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell_A BANK128\[0\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_162_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[8\].cell BANK128\[1\].RAM128.DIBUF\[8\].cell/X Di0[8] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.DIBUF\[7\].cell_A Di0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X + BANK128\[0\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_1195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_1502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_137_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_1393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell_A BANK128\[1\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_1601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_186_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell_A BANK128\[1\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_110_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_1644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[3\].cell_A BANK128\[1\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell_A BANK128\[0\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_DEC0.AND1_A A0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_99_241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_1307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_165_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_Do0MUX.M\[1\].MUX\[4\]_A0 Do0MUX.M\[1\].MUX\[4\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_192_794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_133_872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_0_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_1155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell_A BANK128\[1\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_156_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell_A BANK128\[0\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_97_789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_133_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[1\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_107_1605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_118_154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell_A BANK128\[0\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_88_778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_28_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_44_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X + BANK128\[1\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_184_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_171_219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X + BANK128\[1\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell_A BANK128\[1\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell_A BANK128\[0\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_1278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_1423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_156_783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_57_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell BANK128\[0\].RAM128.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_111_37 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_23 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_1138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X + BANK128\[0\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_103_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell_A BANK128\[1\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_1546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell_A BANK128\[0\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_184_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_172_539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X + BANK128\[0\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_176_801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_178_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell_A BANK128\[0\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_116_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_116_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_1038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_36 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_148_1568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_Do0MUX.M\[2\].MUX\[6\]_A0 Do0MUX.M\[2\].MUX\[6\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_185_119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_1292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_159_1675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell BANK128\[1\].RAM128.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_1179 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]_A BANK128\[1\].RAM128.DEC0.AND3/B + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_29_461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_157_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_158_1196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X + BANK128\[1\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_1491 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_27_409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_91_1364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\] BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_191_656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_65_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_1507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_13_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_22_670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell_A BANK128\[1\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_70_1459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_174_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_1_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_104_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X + BANK128\[0\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_932 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell_A BANK128\[1\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X + BANK128\[0\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell_A BANK128\[0\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_141_586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DEC0.AND0 BANK128\[0\].RAM128.DEC0.AND3/C BANK128\[0\].RAM128.DEC0.AND0/Y + BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.DEC0.AND3/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__nor3b_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_167_1207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_1431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.DIBUF\[30\].cell BANK128\[0\].RAM128.DIBUF\[30\].cell/X Di0[30] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_36_751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_1464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_12_68 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_156_1601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X + BANK128\[1\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_139_163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell_A BANK128\[1\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A1 Do0MUX.M\[2\].MUX\[0\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_DEC0.AND1_B EN0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_161_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X + BANK128\[0\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell_A BANK128\[1\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.WEBUF\[0\].cell WE0[0] BANK128\[0\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_136_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[28\].cell_A Di0[28] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X + BANK128\[0\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_1494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_132_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_160_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A1 Do0MUX.M\[1\].MUX\[2\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_34_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_159_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_147_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_128_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_157_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell BANK128\[0\].RAM128.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_65_654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_129_1319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_185_1671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_1527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A1 Do0MUX.M\[0\].MUX\[4\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_105_1363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_1582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_1052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_34_33 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_1170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_133_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X + BANK128\[1\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_62 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_1516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_91_50 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_50_1479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell BANK128\[1\].RAM128.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_48_1353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_97_565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell_A BANK128\[1\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_80_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X + BANK128\[1\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_935 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_175_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_135_968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_1442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell_A BANK128\[0\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_6_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X + BANK128\[1\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_1531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X + BANK128\[0\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X + BANK128\[0\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_79_576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell_A BANK128\[1\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.A0BUF\[1\].cell_A A0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_113_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_1563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DIBUF\[1\].cell BANK128\[0\].RAM128.DIBUF\[1\].cell/X Di0[1] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_179_1080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell BANK128\[0\].RAM128.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_1035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_60_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_1352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_177_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_184_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_125_275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell_A BANK128\[1\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_98_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_45_1378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell_A BANK128\[1\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_1472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_104_1406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_163_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_190_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_39_1694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_816 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_1252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_1632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_92_847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell_A BANK128\[1\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell_A BANK128\[0\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_1305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.EN0BUF.cell BANK128\[0\].RAM128.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X + BANK128\[1\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_1333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_1472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_59_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_1494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.DEC0.AND1/X + BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_3_1545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_1533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_1233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_1687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_77_107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_73_302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_183_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_169_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_167_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_1702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_154_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell BANK128\[1\].RAM128.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[26\].cell BANK128\[1\].RAM128.DIBUF\[26\].cell/X Di0[26] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_40_1050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDo0MUX.M\[3\].MUX\[0\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[0\]/A1 + Do0MUX.M\[3\].MUX\[0\]/A0 Do0[24] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell_A BANK128\[1\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_21_917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_1152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_116_1641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_1240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_1038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_168_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[29\].cell_A Di0[29] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.WEBUF\[3\].cell_A WE0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_39 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[2\].MUX\[2\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[2\]/A1 + Do0MUX.M\[2\].MUX\[2\]/A0 Do0[18] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_136_178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDo0MUX.SEL0BUF\[2\] A0[7] Do0MUX.SEL0BUF\[2\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_63_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_98_1179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.EN0BUF.cell_A BANK128\[0\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_124_896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XDo0MUX.M\[1\].MUX\[4\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[4\]/A1 + Do0MUX.M\[1\].MUX\[4\]/A0 Do0[12] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X + BANK128\[0\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_21_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_1610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1223 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_130_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell_A BANK128\[0\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.CLKBUF.cell BANK128\[1\].RAM128.CLKBUF.cell/X CLK VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\] BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_51_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_71_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_1139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_32_1303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_1363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_165_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[0\].MUX\[6\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[6\]/A1 + Do0MUX.M\[0\].MUX\[6\]/A0 Do0[6] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[0\].MUX\[5\]_A0 Do0MUX.M\[0\].MUX\[5\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell BANK128\[0\].RAM128.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.A0BUF\[1\].cell A0[1] BANK128\[0\].RAM128.A0BUF\[1\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_128_1342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_141_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_100_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_1251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.EN0BUF.cell BANK128\[1\].RAM128.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_1088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X + BANK128\[1\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_136_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_142_490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell_A BANK128\[1\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_1263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_1567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_185_847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X + BANK128\[1\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[12\].cell_A Di0[12] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_152_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_79_599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_90_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_61_1384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell_A BANK128\[0\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_81_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DIBUF\[13\].cell BANK128\[0\].RAM128.DIBUF\[13\].cell/X Di0[13] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_1081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_1182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_139_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X + BANK128\[0\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell BANK128\[1\].RAM128.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_159_1600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1268 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[4\].cell_A BANK128\[0\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_8_367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_1471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_1313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_171_1321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_39_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_171_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_129_582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_1571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell_A BANK128\[1\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_1312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_57_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A1 Do0MUX.M\[3\].MUX\[3\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_1526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell BANK128\[0\].RAM128.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_35_1548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.M\[1\].MUX\[7\]_A0 Do0MUX.M\[1\].MUX\[7\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[3\].cell_A BANK128\[0\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_33 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X + BANK128\[1\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_1536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A1 Do0MUX.M\[2\].MUX\[5\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_112_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.DEC0.AND2/X + BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_1584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_1051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]_A BANK128\[1\].RAM128.DEC0.AND3/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[4\].cell_A Di0[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_78 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_183_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A1 Do0MUX.M\[1\].MUX\[7\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_35_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X + BANK128\[0\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_10_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_100_1635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_1698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_135_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_51_1180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_951 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell_A BANK128\[1\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_51_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X + BANK128\[1\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_36_1643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_158_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell_A BANK128\[1\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XFILLER_167_1551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_1180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_171_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell_A BANK128\[0\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_1477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_1602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_9_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[4\].cell BANK128\[1\].RAM128.A0BUF\[4\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X + BANK128\[0\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_173_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_1644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_49 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.WEBUF\[2\].cell WE0[2] BANK128\[1\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[0\].cell_A Di0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell BANK128\[0\].RAM128.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_33 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_1051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_19_358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_1267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_163_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_1230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_94_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X + BANK128\[0\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_181_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_107_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_31_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_186_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_1087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_1535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_101_84 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X + BANK128\[1\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X + BANK128\[1\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[13\].cell_A Di0[13] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell_A BANK128\[0\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_1504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_43_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_50_1278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_1395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_107_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_1479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_884 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X + BANK128\[0\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_35 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell_A BANK128\[0\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_44_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_1139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_80_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell_A BANK128\[1\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X + BANK128\[0\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XPHY_0 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell_A BANK128\[0\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[3\].cell BANK128\[1\].RAM128.DIBUF\[3\].cell/X Di0[3] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_102_1176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_1288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_1414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_1515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_154_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_26_412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X + BANK128\[0\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_104_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_13_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_12_172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell_A BANK128\[0\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.DEC0.AND3 BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.DEC0.AND3/X + BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.DEC0.AND3/C VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__and3_2 XFILLER_82_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell BANK128\[0\].RAM128.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\] BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.SEL0BUF\[1\]_A A0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_1463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_128_829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_42_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[4\].cell_A BANK128\[1\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell_A BANK128\[0\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_64_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_1335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_23_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_124_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.DIBUF\[7\].cell BANK128\[0\].RAM128.DIBUF\[7\].cell/X Di0[7] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_156_1467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_19_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_74_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_1402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[3\].cell_A BANK128\[1\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_39 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell_A BANK128\[0\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_70_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_13_92 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X + BANK128\[1\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_133_1264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell BANK128\[1\].RAM128.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[0\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_177_1191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell_A BANK128\[0\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_1033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_99_1435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_164_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_78_215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A1 Do0MUX.M\[1\].MUX\[0\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_1603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_28_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_42_340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1296 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X + BANK128\[1\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X + BANK128\[0\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_94_1365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_1455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A1 Do0MUX.M\[0\].MUX\[2\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_18_1182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_119_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_106_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_157_1584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_71_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell_A BANK128\[1\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.A0BUF\[3\].cell A0[3] BANK128\[1\].RAM128.A0BUF\[3\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_105_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_42 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[21\].cell_A Di0[21] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell BANK128\[0\].RAM128.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_1142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell_A BANK128\[0\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_1194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_38_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X + BANK128\[1\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_34_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_146_1263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_107_1225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_31_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_107_415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_1128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A1 Do0MUX.M\[3\].MUX\[7\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_186_1076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_181_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_21_70 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_134_790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_171_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_1319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X + BANK128\[0\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_156_381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X + BANK128\[0\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_86_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_1235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_161_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell_A BANK128\[1\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_5_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[15\].cell BANK128\[1\].RAM128.DIBUF\[15\].cell/X Di0[15] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_1649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_190_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_1127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_1340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_1516 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_141_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1240 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell BANK128\[1\].RAM128.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_1015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_176_1097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_100_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_1081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X + BANK128\[1\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_14_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_1085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X + BANK128\[0\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_1160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_57_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_1109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DEC0.AND0_A_N A0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell_A BANK128\[1\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_130_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_19_1309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_1650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell_A BANK128\[1\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_191_1315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_663 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.DIBUF\[19\].cell BANK128\[0\].RAM128.DIBUF\[19\].cell/X Di0[19] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_82_1643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_161_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[4\].cell BANK128\[0\].RAM128.A0BUF\[4\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_70_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_22 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell_A BANK128\[0\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_183_766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_87_1598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DEC0.AND2_B BANK128\[1\].RAM128.DEC0.AND3/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_46_850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_61_875 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X + BANK128\[1\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_61_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell_A BANK128\[1\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_47_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_161_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_114_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.A0BUF\[4\].cell_A A0[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_24_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_1188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_1431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[2\].MUX\[0\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[0\]/A1 + Do0MUX.M\[2\].MUX\[0\]/A0 Do0[16] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL0BUF\[0\] A0[7] Do0MUX.SEL0BUF\[0\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_134_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_8_1086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_189_1096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell_A BANK128\[1\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X + BANK128\[1\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_96_1609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X + BANK128\[0\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[1\].MUX\[2\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[2\]/A1 + Do0MUX.M\[1\].MUX\[2\]/A0 Do0[10] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_168_1158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X + BANK128\[0\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_1052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_29_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_160_1409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[0\].MUX\[4\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[4\]/A1 + Do0MUX.M\[0\].MUX\[4\]/A0 Do0[4] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_72 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[22\].cell_A Di0[22] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_19_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell_A BANK128\[1\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_1618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_1312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_13_1080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_39_934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.A0BUF\[0\].cell_A A0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X + BANK128\[1\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_190_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_79_1604 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_25_650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell_A BANK128\[0\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_138_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X + BANK128\[1\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_97_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_80_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_62_1630 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell_A BANK128\[1\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[1\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X + BANK128\[0\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_42_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_74_1534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_1662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_1613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]_A BANK128\[1\].RAM128.DEC0.AND3/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_1_535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_1070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_1035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_1106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_123_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_95 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_57_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_1145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell_A BANK128\[1\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_190_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_95_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_1190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_23_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_1100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell BANK128\[1\].RAM128.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[21\].cell BANK128\[1\].RAM128.DIBUF\[21\].cell/X Di0[21] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_108_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_104_1207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_150_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A1 Do0MUX.M\[3\].MUX\[1\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_1323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[0\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_100_1605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_185_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_48_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X + BANK128\[1\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_177_219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_177_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A1 Do0MUX.M\[2\].MUX\[3\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_1364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_1673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.WEBUF\[2\].cell_A WE0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_1024 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_1201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[3\].cell BANK128\[1\].RAM128.A0BUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_520 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_73_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A1 Do0MUX.M\[1\].MUX\[5\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell BANK128\[0\].RAM128.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_54_1702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_1571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[15\].cell_A Di0[15] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DEC0.AND2_C BANK128\[1\].RAM128.DEC0.AND3/C VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_150_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_146_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_21_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.DIBUF\[25\].cell BANK128\[0\].RAM128.DIBUF\[25\].cell/X Di0[25] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_159_764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_86_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A1 Do0MUX.M\[0\].MUX\[7\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_1003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell_A BANK128\[0\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[9\].cell BANK128\[1\].RAM128.DIBUF\[9\].cell/X Di0[9] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_1159 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_1454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell_A BANK128\[0\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_118_694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X + BANK128\[0\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_1168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_1395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_145_1671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_1407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_1633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_124_664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_1219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_152_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_93_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_147_756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell_A BANK128\[0\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell_A BANK128\[1\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_1418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_386 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X + BANK128\[0\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_0_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_66 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_1269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.DIBUF\[30\].cell_A Di0[30] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_91 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_1008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_1461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell_A BANK128\[0\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[7\].cell_A Di0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_5_1079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_1693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_851 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_1699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_1423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X + BANK128\[1\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X + BANK128\[1\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_116_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell_A BANK128\[1\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell BANK128\[0\].RAM128.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_144_1703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[3\].MUX\[1\]_A0 Do0MUX.M\[3\].MUX\[1\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_1619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X + BANK128\[0\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell_A BANK128\[1\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_34_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_1203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[3\].cell_A Di0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_1059 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_53_59 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_1483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_543 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_73_874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_9_488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_1320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell BANK128\[1\].RAM128.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_1348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_1080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_116_1624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell_A BANK128\[1\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell_A BANK128\[0\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_183_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[16\].cell_A Di0[16] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell_A BANK128\[0\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_1245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_1623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_186_595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X + BANK128\[0\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell_A BANK128\[0\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_24_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_153_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X + BANK128\[0\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_47_1562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[31\].cell BANK128\[0\].RAM128.DIBUF\[31\].cell/X Di0[31] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_74_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell_A BANK128\[0\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_126_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DEC0.AND0_A BANK128\[1\].RAM128.DEC0.AND3/B VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_65_1651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X + BANK128\[1\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_111_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_111_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_93_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell_A BANK128\[0\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_111_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_71_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_51_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_836 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_178_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_10_1447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell BANK128\[1\].RAM128.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_126_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[1\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X + BANK128\[0\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[31\].cell_A Di0[31] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.WEBUF\[1\].cell WE0[1] BANK128\[0\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_169_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X + BANK128\[0\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_183_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_1150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.DEC0.AND0_C_N BANK128\[1\].RAM128.DEC0.AND3/C VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_1120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_1142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_1435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A1 Do0MUX.M\[0\].MUX\[0\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_72_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_1586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_175_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_1384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell_A BANK128\[0\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell_A BANK128\[1\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_125_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_142_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_10_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_40 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_133_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_169_1222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_1_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_29_980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_189_911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_4 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_1531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[0\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_1155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_157_863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_172_844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X + BANK128\[1\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_74_1503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_34_460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell BANK128\[1\].RAM128.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_163_822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell_A BANK128\[1\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_192_1050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_172_1679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A1 Do0MUX.M\[3\].MUX\[5\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_44_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_103_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_107_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_1377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell_A BANK128\[0\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell_A BANK128\[1\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_114_1585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_189_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_188_273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A1 Do0MUX.M\[2\].MUX\[7\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X + BANK128\[1\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_191_416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X + BANK128\[0\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_160_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\] BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X + BANK128\[0\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_182_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_835 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_134_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.DIBUF\[2\].cell BANK128\[0\].RAM128.DIBUF\[2\].cell/X Di0[2] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_131_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_57_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_16_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_1600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[3\].cell BANK128\[0\].RAM128.A0BUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_5_695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_184_1303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_58_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_98_1108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_55_831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_99 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_1534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_69 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_17_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[24\].cell_A Di0[24] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_1545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_118_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_155_1471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell_A BANK128\[0\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_1190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X + BANK128\[1\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_162_1431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_1551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.EN0BUF.cell BANK128\[0\].RAM128.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_1582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\] BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_75_959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_100_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.DEC0.AND0_B BANK128\[1\].RAM128.DEC0.AND3/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_26_1636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.CLKBUF.cell_A CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_152_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_77_296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_92_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_74_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_57_1191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_92_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_1164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[27\].cell BANK128\[1\].RAM128.DIBUF\[27\].cell/X Di0[27] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XPHY_306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_36_1275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1267 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell_A BANK128\[1\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell_A BANK128\[1\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_37 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_1360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_43_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_95_1667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_176_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_1304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_1476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_28_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_Do0MUX.M\[1\].MUX\[0\]_A0 Do0MUX.M\[1\].MUX\[0\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell_A BANK128\[0\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[1\].MUX\[0\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[0\]/A1 + Do0MUX.M\[1\].MUX\[0\]/A0 Do0[8] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_111_1171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell_A BANK128\[0\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_153_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_115_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_44_1522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_1582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell_A BANK128\[1\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X + BANK128\[0\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_1050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_820 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_1643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_138_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.M\[0\].MUX\[2\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[2\]/A1 + Do0MUX.M\[0\].MUX\[2\]/A0 Do0[2] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_1611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_153_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.DIBUF\[10\].cell BANK128\[1\].RAM128.DIBUF\[10\].cell/X Di0[10] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_112_1480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_5 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_1437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_91_1328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_1516 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_182_1456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_8_852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_1277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell BANK128\[0\].RAM128.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_35_962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.A0BUF\[2\].cell A0[2] BANK128\[0\].RAM128.A0BUF\[2\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_22_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell_A BANK128\[1\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell_A BANK128\[1\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_164_1164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_1361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X + BANK128\[1\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.EN0BUF.cell BANK128\[1\].RAM128.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_171_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_62_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_1406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_94_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_21_1171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XDo0MUX.M\[3\].MUX\[7\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[7\]/A1 + Do0MUX.M\[3\].MUX\[7\]/A0 Do0[31] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_1395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X + BANK128\[1\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_85_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_50_762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_1446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_1706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_151_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_1417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_134_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DIBUF\[14\].cell BANK128\[0\].RAM128.DIBUF\[14\].cell/X Di0[14] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X + BANK128\[0\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell BANK128\[1\].RAM128.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_Do0MUX.M\[2\].MUX\[2\]_A0 Do0MUX.M\[2\].MUX\[2\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_126_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_1506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_149_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_182_1050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_172_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.EN0BUF.cell_A BANK128\[0\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_67 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_42_559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_1637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_30 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_2_677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[25\].cell_A Di0[25] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell BANK128\[0\].RAM128.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell_A BANK128\[1\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_1040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X + BANK128\[1\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A1 Do0MUX.M\[2\].MUX\[1\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_69_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[1\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.A0BUF\[3\].cell_A A0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_1428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_189_1034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A1 Do0MUX.M\[1\].MUX\[3\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_54_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_187_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_1535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_180_1576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell_A BANK128\[0\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_164_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_48_1306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_61_1517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_19_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_1462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_185_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_80_429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_1446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell_A BANK128\[1\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_1168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell BANK128\[1\].RAM128.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A1 Do0MUX.M\[0\].MUX\[5\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_64_1196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_69_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_1226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell_A BANK128\[0\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_77_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[1\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_1073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XPHY_318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[0\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_165_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_20_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_84_1506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_548 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X + BANK128\[1\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[3\].MUX\[4\]_A0 Do0MUX.M\[3\].MUX\[4\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_1067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X + BANK128\[1\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell_A BANK128\[1\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_1431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_21_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_1571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_1691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell_A BANK128\[0\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_192_1222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_1567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_1409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_186_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XPHY_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_162_1081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X + BANK128\[0\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_115_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_171_1339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.WEBUF\[3\].cell WE0[3] BANK128\[1\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_6 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_1416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell BANK128\[0\].RAM128.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell_A BANK128\[0\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_97_134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_26_1286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_1166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_61_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1076 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_1202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_37_1393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_120_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_162_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_1096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_57_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_16_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X + BANK128\[0\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_186_916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell_A BANK128\[1\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[18\].cell_A Di0[18] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_134_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_90_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_34_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X + BANK128\[1\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell_A BANK128\[1\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X + BANK128\[1\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_157_651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_117_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_1553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_1695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_67_874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_6_1199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell_A BANK128\[0\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_1693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_162_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_150_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_129_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_1252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[0\].cell_A Di0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X + BANK128\[0\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_190_1578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_1283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_76_660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_82_129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_63_387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DIBUF\[20\].cell BANK128\[0\].RAM128.DIBUF\[20\].cell/X Di0[20] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell_A BANK128\[0\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_708 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_167_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_10_402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_1277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.DIBUF\[4\].cell BANK128\[1\].RAM128.DIBUF\[4\].cell/X Di0[4] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_87_1526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_8_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_132_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X + BANK128\[0\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_33_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_141_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_83_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_48_181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_52_847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell_A BANK128\[0\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell_A BANK128\[0\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_1586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_115_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_1002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_145_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_104_1350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell BANK128\[0\].RAM128.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_156_63 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_1435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_1507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_120_896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_61_622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_105_1103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_105_1136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_770 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_1407 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell_A BANK128\[0\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_1222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell_A BANK128\[1\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_1179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_1393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_180_1352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_128_259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_1180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_95 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[8\].cell BANK128\[0\].RAM128.DIBUF\[8\].cell/X Di0[8] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell_A BANK128\[0\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_1608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_88_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_135_1652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X + BANK128\[1\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_130_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[6\].cell_A Di0[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_1423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_181_1683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell BANK128\[1\].RAM128.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_106_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_1448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_7 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_176_608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_788 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_Do0MUX.M\[0\].MUX\[1\]_A0 Do0MUX.M\[0\].MUX\[1\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_1219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_1631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell_A BANK128\[1\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_147_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell_A BANK128\[1\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X + BANK128\[1\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_76_319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_1482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell_A BANK128\[0\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_29_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_85_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X + BANK128\[0\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.DIBUF\[19\].cell_A Di0[19] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_10_1088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_180_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_93 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_34_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_184_460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_1559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_144_324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.A0BUF\[4\].cell A0[4] BANK128\[1\].RAM128.A0BUF\[4\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell BANK128\[0\].RAM128.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell_A BANK128\[1\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell_A BANK128\[0\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_136_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_1118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_123_519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_1443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[1\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_131_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A1 Do0MUX.M\[3\].MUX\[3\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_131_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X + BANK128\[1\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell_A BANK128\[0\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_1220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_1291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_1106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_126_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_23_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_58_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_56_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_182_1085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A1 Do0MUX.M\[2\].MUX\[5\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell_A BANK128\[1\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_118_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell_A BANK128\[0\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_115_1116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\] BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X + BANK128\[0\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_104_1543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_100_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_1549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X + BANK128\[0\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A1 Do0MUX.M\[1\].MUX\[7\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_1571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[1\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[1\].MUX\[3\]_A0 Do0MUX.M\[1\].MUX\[3\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.DIBUF\[16\].cell BANK128\[1\].RAM128.DIBUF\[16\].cell/X Di0[16] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell_A BANK128\[0\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_23_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_1106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_146_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_156_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_41_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell BANK128\[1\].RAM128.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell_A BANK128\[0\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_168_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell BANK128\[0\].RAM128.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_138_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_155_205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_156_739 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_123_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_1349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_137_1171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_1647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_63_1390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_1322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_1366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X + BANK128\[1\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_109_1262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_187_875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_161_219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_182_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X + BANK128\[0\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_116_1255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_1297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell_A BANK128\[1\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_56 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\] BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_142_55 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_7_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_1067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_93_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell_A BANK128\[1\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_118_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell_A BANK128\[1\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_77_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X + BANK128\[1\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_0_1685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_1130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_47_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]_A BANK128\[1\].RAM128.DEC0.AND3/B + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_99_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XPHY_8 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[2\].MUX\[5\]_A0 Do0MUX.M\[2\].MUX\[5\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_1137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_141_1134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_1219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_1525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_16_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_38_236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_146_1056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell_A BANK128\[1\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_1381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_1248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X + BANK128\[1\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_157_1196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X + BANK128\[0\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_85_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_1631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X + BANK128\[0\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_856 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[0\].MUX\[0\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[0\]/A1 + Do0MUX.M\[0\].MUX\[0\]/A0 Do0[0] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_1113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_10_1067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_180_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_169_1023 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell_A BANK128\[1\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_932 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[27\].cell_A Di0[27] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_182_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_1576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_1527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_171_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_100_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell_A BANK128\[0\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_1034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_175_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_987 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_104_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.EN0BUF.cell_A BANK128\[1\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X + BANK128\[1\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_175_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_1263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[3\].MUX\[5\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[5\]/A1 + Do0MUX.M\[3\].MUX\[5\]/A0 Do0[29] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_44_581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X + BANK128\[1\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_1442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_89_38 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[2\].MUX\[7\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[7\]/A1 + Do0MUX.M\[2\].MUX\[7\]/A0 Do0[23] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell_A BANK128\[1\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_24_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[3\].MUX\[7\]_A0 Do0MUX.M\[3\].MUX\[7\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X + BANK128\[0\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_166_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_1690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_142_604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_29_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_81_1650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell_A BANK128\[0\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_1678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_166_1571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_166_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_1468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell_A BANK128\[0\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_1291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_846 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell_A BANK128\[1\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_70_613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_1319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_1647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.DIBUF\[22\].cell BANK128\[1\].RAM128.DIBUF\[22\].cell/X Di0[22] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_145_1655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_1314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.A0BUF\[0\].cell_A A0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_164_795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_174_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_1_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_61_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_187_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_155_762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X + BANK128\[1\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_7_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_36_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell_A BANK128\[1\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell_A BANK128\[1\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_101_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_151_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_163_1029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A1 Do0MUX.M\[1\].MUX\[1\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_136_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_3_753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[4\].cell BANK128\[1\].RAM128.A0BUF\[4\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_73_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell BANK128\[0\].RAM128.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A1 Do0MUX.M\[0\].MUX\[3\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell_A BANK128\[1\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell_A BANK128\[0\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_97_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_576 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DIBUF\[26\].cell BANK128\[0\].RAM128.DIBUF\[26\].cell/X Di0[26] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_21_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_127_1171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_1609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_175_1423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XFILLER_49_1437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_28_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_9 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_147_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_1110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_827 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X + BANK128\[0\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_171_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_79_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_1267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_1215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X + BANK128\[1\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell_A BANK128\[1\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_67_19 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_131_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_69_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_77_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_144_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_1411 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_1387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_106_275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[28\].cell_A Di0[28] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.WEBUF\[2\].cell_A WE0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_73_73 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_1006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X + BANK128\[0\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_1334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[1\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_1119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.A0BUF\[6\].cell_A A0[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_1663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_190_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_79 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_41_799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell_A BANK128\[0\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_76_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_160_1385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X + BANK128\[1\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_1506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_81_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_1105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_17_1531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_24 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X + BANK128\[1\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_135_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_109_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_1246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_14_788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_103_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_771 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_6_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_1123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell_A BANK128\[1\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_123_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell BANK128\[0\].RAM128.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_110_524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_24_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_1247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[11\].cell_A Di0[11] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_149_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[4\].cell_A BANK128\[0\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_138_1641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X + BANK128\[0\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_99_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_68_961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_124_605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell_A BANK128\[0\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_77_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_1_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_98 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_1308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_148_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_1171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X + BANK128\[1\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_1240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_Do0MUX.M\[0\].MUX\[4\]_A0 Do0MUX.M\[0\].MUX\[4\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[3\].cell_A BANK128\[0\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_1612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_1689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_20_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_165_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell BANK128\[1\].RAM128.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_161_799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_19_23 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_58_1461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_1344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell_A BANK128\[1\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell BANK128\[1\].RAM128.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_19_644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_18_176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell_A BANK128\[0\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_94_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_14_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_190_828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_115_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_24 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_1465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_1170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X + BANK128\[0\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_43_1048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_134_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_7_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_1431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[3\].cell_A Di0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X + BANK128\[0\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_7_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_90 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_188_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X + BANK128\[1\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_171_883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_170_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell_A BANK128\[1\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_68 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_379 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell_A BANK128\[1\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_48_547 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.EN0BUF.cell DEC0.AND0/X BANK128\[0\].RAM128.DEC0.AND3/C VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_1248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_157_600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.M\[1\].MUX\[6\]_A0 Do0MUX.M\[1\].MUX\[6\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_1310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell BANK128\[1\].RAM128.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_1087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X + BANK128\[0\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_1429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.WEBUF\[2\].cell WE0[2] BANK128\[0\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_37_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell_A BANK128\[0\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_1120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_1191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X + BANK128\[0\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_176_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_1408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_76_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_1003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_1069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XPHY_280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_51_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_1316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_1562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_164_901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_1265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_172_1235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X + BANK128\[1\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A1 Do0MUX.M\[3\].MUX\[1\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_16_1064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell BANK128\[1\].RAM128.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_182_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_1414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_122_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_27_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_1147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[12\].cell_A Di0[12] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_1459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A1 Do0MUX.M\[2\].MUX\[3\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell_A BANK128\[0\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_1563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_140_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[9\].cell_A Di0[9] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_191_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_191_583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X + BANK128\[0\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_59_940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A1 Do0MUX.M\[1\].MUX\[5\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_770 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X + BANK128\[0\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_90 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell_A BANK128\[0\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_44_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DIBUF\[3\].cell BANK128\[0\].RAM128.DIBUF\[3\].cell/X Di0[3] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A1 Do0MUX.M\[0\].MUX\[7\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell_A BANK128\[1\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_1584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_118_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_10_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[4\].cell BANK128\[0\].RAM128.A0BUF\[4\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_19_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_1090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_1634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_1697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell_A BANK128\[0\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_1168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_3_733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]_A BANK128\[1\].RAM128.DEC0.AND3/B + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_178_108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_1546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_192_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_142_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1179 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_164_1307 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[4\].cell_A BANK128\[1\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell_A BANK128\[0\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_101_1302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_97_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_133_299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[1\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_887 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_60_1352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_1544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_44_913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_186_1543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X + BANK128\[1\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_178_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X + BANK128\[0\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_171_306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_39_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.EN0BUF.cell BANK128\[0\].RAM128.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_159_196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[3\].cell_A BANK128\[1\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_1617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_1390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell_A BANK128\[0\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_22_1623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell_A BANK128\[1\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_55_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_1252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_164_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_122_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[28\].cell BANK128\[1\].RAM128.DIBUF\[28\].cell/X Di0[28] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_1227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_71_540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_1218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X + BANK128\[1\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_12_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_1549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_7_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_171_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_119_1426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_119_1459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell_A BANK128\[1\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_1391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell_A BANK128\[0\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_165_1413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_50_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_144_840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_Do0MUX.SEL0BUF\[0\]_A A0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[0\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1070 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_1021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell_A BANK128\[0\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_1096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_1367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X + BANK128\[0\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell BANK128\[1\].RAM128.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_1346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_1395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_99_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.DIBUF\[11\].cell BANK128\[1\].RAM128.DIBUF\[11\].cell/X Di0[11] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_62_381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_22_223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_1536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_46_827 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_1366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.A0BUF\[3\].cell A0[3] BANK128\[0\].RAM128.A0BUF\[3\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_1362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_1603 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_1073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_139_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_1464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_1041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_95_84 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell_A BANK128\[1\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_184_1118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[3\].MUX\[3\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[3\]/A1 + Do0MUX.M\[3\].MUX\[3\]/A0 Do0[27] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X + BANK128\[1\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_118_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[20\].cell_A Di0[20] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_117_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_1518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.EN0BUF.cell BANK128\[1\].RAM128.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_145_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_1647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X + BANK128\[1\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_23_598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell_A BANK128\[0\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[2\].MUX\[5\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[5\]/A1 + Do0MUX.M\[2\].MUX\[5\]/A0 Do0[21] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_172_1022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_1130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell_A BANK128\[0\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_124_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_96_557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.DIBUF\[15\].cell BANK128\[0\].RAM128.DIBUF\[15\].cell/X Di0[15] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[1\].MUX\[7\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[7\]/A1 + Do0MUX.M\[1\].MUX\[7\]/A0 Do0[15] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X + BANK128\[0\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[3\].cell BANK128\[1\].RAM128.A0BUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell BANK128\[0\].RAM128.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_146_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_64_1670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_1507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_1608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_1441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_1591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\] BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_1647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_1134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell_A BANK128\[1\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1631 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_1544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_90 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_110_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_1466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell BANK128\[0\].RAM128.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_1584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X + BANK128\[1\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_130_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_1470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_21_1315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_1233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X + BANK128\[0\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_34_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_39 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_187_484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A1 Do0MUX.M\[0\].MUX\[1\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_97_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell BANK128\[1\].RAM128.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell_A BANK128\[1\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_1161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_32_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_1347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_574 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_1642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_184_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X + BANK128\[1\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_117_1140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell_A BANK128\[0\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X + BANK128\[1\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_190_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_190_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_144_885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_98_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell_A BANK128\[1\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_168_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A1 Do0MUX.M\[3\].MUX\[6\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_185_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_135_874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.A0BUF\[3\].cell_A A0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_1460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_63_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_189_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X + BANK128\[0\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_181_991 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_Do0MUX.M\[0\].MUX\[7\]_A0 Do0MUX.M\[0\].MUX\[7\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_1235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_98_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_67_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell BANK128\[0\].RAM128.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_180_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_109_808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell_A BANK128\[1\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_1218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell_A BANK128\[1\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_6_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_14_714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_1385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_1645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_6_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_1104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_1479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_1097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1351 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_658 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_17_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_12_1431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[21\].cell_A Di0[21] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell_A BANK128\[1\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_19_1629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X + BANK128\[1\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_1047 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_51_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_1391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_903 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_1310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X + BANK128\[1\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_61_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_57_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_1182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_121_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_1450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_29_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_188_1030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_36_168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_90_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X + BANK128\[0\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_19_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell_A BANK128\[1\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1658 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_3_1473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[21\].cell BANK128\[0\].RAM128.DIBUF\[21\].cell/X Di0[21] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_1290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_1151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_1237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_111_1113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_80 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_91 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[5\].cell BANK128\[1\].RAM128.DIBUF\[5\].cell/X Di0[5] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_97_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_110_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X + BANK128\[0\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell_A BANK128\[1\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_1331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_24_672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_178_45 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell_A BANK128\[0\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_94_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[0\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_146_1039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_15_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell BANK128\[0\].RAM128.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_1332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1051 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_65_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_90_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_134_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_1276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]_A BANK128\[1\].RAM128.DEC0.AND3/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.WEBUF\[1\].cell_A WE0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_165_1437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[14\].cell_A Di0[14] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_163_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DIBUF\[9\].cell BANK128\[0\].RAM128.DIBUF\[9\].cell/X Di0[9] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_24_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_58_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_15 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_40_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell_A BANK128\[0\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X + BANK128\[1\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell_A BANK128\[0\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell BANK128\[1\].RAM128.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_185_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_136_1572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_17_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_1161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\] BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_175_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_190_222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_1352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X + BANK128\[0\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_13_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_10_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_1048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X + BANK128\[1\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell_A BANK128\[1\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_62_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_1480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X + BANK128\[0\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_189_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_172_288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_1116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_1504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_178_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.A0BUF\[5\].cell A0[5] BANK128\[1\].RAM128.DEC0.AND3/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_2_438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell_A BANK128\[0\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_24_1336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[3\].cell BANK128\[0\].RAM128.A0BUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_81_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_121_95 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_1582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_127_458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[6\].cell_A Di0[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_799 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_1127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_170_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_1_482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X + BANK128\[1\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A1 Do0MUX.M\[2\].MUX\[1\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_60_1536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_3_1430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_1571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_1414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_65_1469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell_A BANK128\[1\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A1 Do0MUX.M\[1\].MUX\[3\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_4_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_1611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X + BANK128\[0\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_92_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_167_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_70 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_92 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_175_807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_48_1612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X + BANK128\[0\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_111_623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_75_1086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A1 Do0MUX.M\[0\].MUX\[5\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_162_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[17\].cell BANK128\[1\].RAM128.DIBUF\[17\].cell/X Di0[17] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_58_1240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_180_1178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_109_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_180_832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[2\].cell_A Di0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_80_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_185_1012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_1045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell BANK128\[0\].RAM128.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_1431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_1350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_1547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X + BANK128\[0\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_1698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.SEL0BUF\[3\]_A A0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_169_420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell_A BANK128\[0\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_1393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell BANK128\[0\].RAM128.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_78_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[15\].cell_A Di0[15] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_97_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.M\[3\].MUX\[0\]_A0 Do0MUX.M\[3\].MUX\[0\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell_A BANK128\[0\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_1280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_1658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_43_26 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_1123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_37 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_1_878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell_A BANK128\[0\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_1651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_5_1196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X + BANK128\[1\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell_A BANK128\[0\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_1592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_95_944 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_82_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell_A BANK128\[1\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_1375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_1332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_1302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_1422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_182_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X + BANK128\[1\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X + BANK128\[0\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X + BANK128\[0\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_14_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[30\].cell_A Di0[30] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_1521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_1522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_46_616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_148_1252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_6_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell_A BANK128\[1\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_1437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[3\].MUX\[1\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[1\]/A1 + Do0MUX.M\[3\].MUX\[1\]/A0 Do0[25] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_90 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X + BANK128\[1\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_144_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_9_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_1713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell_A BANK128\[0\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[0\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_24_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_1171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[2\].MUX\[3\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[3\]/A1 + Do0MUX.M\[2\].MUX\[3\]/A0 Do0[19] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_151_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_43_1713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL0BUF\[3\] A0[7] Do0MUX.SEL0BUF\[3\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_60 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_1528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_1577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_14_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_82 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_1391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_116_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_1250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XDo0MUX.M\[1\].MUX\[5\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[5\]/A1 + Do0MUX.M\[1\].MUX\[5\]/A0 Do0[13] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_92_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell_A BANK128\[0\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XFILLER_75_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_127_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell_A BANK128\[1\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_1156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_39 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X + BANK128\[0\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_5_1504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_43_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_93_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_52_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\] BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell_A BANK128\[0\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[7\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[7\]/A1 + Do0MUX.M\[0\].MUX\[7\]/A0 Do0[7] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_191_1264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell BANK128\[1\].RAM128.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_87_891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_62_703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[23\].cell BANK128\[1\].RAM128.DIBUF\[23\].cell/X Di0[23] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_72_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_115_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_1454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_178_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_1171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_1248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X + BANK128\[1\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_1137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_186_1399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_117_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_26_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.EN0BUF.cell_A BANK128\[1\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_1614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_8_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[23\].cell_A Di0[23] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell BANK128\[0\].RAM128.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_65_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell_A BANK128\[0\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_89_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_1568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_1_1028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_189_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DIBUF\[27\].cell BANK128\[0\].RAM128.DIBUF\[27\].cell/X Di0[27] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_125_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_1445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_173_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_39_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_47_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_163_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X + BANK128\[0\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_172_961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_61_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_1336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A1 Do0MUX.M\[3\].MUX\[4\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_68_1413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X + BANK128\[1\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell_A BANK128\[0\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_0_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_45_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell_A BANK128\[1\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell_A BANK128\[1\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_1674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_138_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_1073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A1 Do0MUX.M\[2\].MUX\[6\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_1292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_114_1691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[10\].cell BANK128\[0\].RAM128.DIBUF\[10\].cell/X Di0[10] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell_A BANK128\[0\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X + BANK128\[0\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_1050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_80_1690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_27_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_57_1158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell_A BANK128\[0\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_161_1486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell_A BANK128\[1\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_1107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_1_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_1386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_13_580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_1381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1630 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_1423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_1314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_736 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_104_110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_104_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_1408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X + BANK128\[1\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_1198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_26_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_50 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_83 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell_A BANK128\[1\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_94 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X + BANK128\[1\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_124_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_1576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_1666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_17_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_1172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XFILLER_94_1689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_14_1304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_1498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_88_826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_1138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_93_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_165_875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_1713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_164_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X + BANK128\[0\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.A0BUF\[6\].cell_A A0[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_42_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_128_1498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_1613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_52_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_1692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_1351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_96_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X + BANK128\[1\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell_A BANK128\[1\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_114_282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_112_1255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_1504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_52_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_137_341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_152_1068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_92 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_129_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.DIBUF\[24\].cell_A Di0[24] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell BANK128\[1\].RAM128.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell_A BANK128\[1\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_1168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_1447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_81_854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_59_1381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_178_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.A0BUF\[2\].cell_A A0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_29_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[5\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_91_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_1041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_1498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_10_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_169_1362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell_A BANK128\[0\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_143_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X + BANK128\[0\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_Do0MUX.M\[2\].MUX\[1\]_A0 Do0MUX.M\[2\].MUX\[1\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_48_1082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell_A BANK128\[1\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_31 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_181_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X + BANK128\[1\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell_A BANK128\[0\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[1\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.CLKBUF.cell BANK128\[0\].RAM128.CLKBUF.cell/X CLK VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[0\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_92_916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_3_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_1192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_1086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell_A BANK128\[1\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_1067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\] BANK128\[0\].RAM128.DEC0.AND3/B BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell BANK128\[1\].RAM128.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_28_1464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_24_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X + BANK128\[0\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_59_979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell_A BANK128\[0\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_1164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.WEBUF\[3\].cell WE0[3] BANK128\[0\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_1189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_1530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X + BANK128\[0\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_35_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_1479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_1670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_1316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_173_578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_160_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[0\].cell BANK128\[1\].RAM128.DIBUF\[0\].cell/X Di0[0] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_1180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_768 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_164_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_1471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_1493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_59_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_31 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_40 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_14_334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_62 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_84 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_95 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_170_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DEC0.AND3_A BANK128\[1\].RAM128.DEC0.AND3/A VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X + BANK128\[1\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[3\].MUX\[3\]_A0 Do0MUX.M\[3\].MUX\[3\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell_A BANK128\[1\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.DIBUF\[17\].cell_A Di0[17] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell BANK128\[1\].RAM128.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_DEC0.AND0_B EN0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1379 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell BANK128\[0\].RAM128.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_88_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_45 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_548 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_1304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_1359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell_A BANK128\[0\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A1 Do0MUX.M\[1\].MUX\[1\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_93_307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell_A BANK128\[1\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell_A BANK128\[0\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_183_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_887 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X + BANK128\[0\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_1363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_97_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_65_510 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_1342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_34_941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_1307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A1 Do0MUX.M\[0\].MUX\[3\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_138_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[7\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_164_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_118_1668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[4\].cell BANK128\[0\].RAM128.DIBUF\[4\].cell/X Di0[4] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_28_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_12_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_1057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_145_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_138_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell_A BANK128\[0\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_76_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_1263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_1368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_187_1600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_80_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_181_1265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_178_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1071 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_175_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell_A BANK128\[0\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell_A BANK128\[0\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_91_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_1493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_9_915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_61 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[9\].cell_A Di0[9] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_10_1396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X + BANK128\[1\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_176_724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_148_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_143_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X + BANK128\[0\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_157_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_15_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_116_312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_131_359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_86_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_882 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_1638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_2_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell_A BANK128\[0\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_108_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_81_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_135_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.A0BUF\[0\].cell A0[0] BANK128\[1\].RAM128.A0BUF\[0\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell_A BANK128\[1\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_1378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[29\].cell BANK128\[1\].RAM128.DIBUF\[29\].cell/X Di0[29] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_95_766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_165_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_1330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X + BANK128\[1\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_117_632 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_1142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_104_359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_1039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_1367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell_A BANK128\[0\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_189_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_1406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_182_502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_182_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_1226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[5\].cell_A Di0[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_122_156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_144_1631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_1288 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_1479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X + BANK128\[0\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_186_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell BANK128\[1\].RAM128.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_132_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_24_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_164_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_1437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.DIBUF\[12\].cell BANK128\[1\].RAM128.DIBUF\[12\].cell/X Di0[12] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_100_340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell_A BANK128\[1\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_1451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_30 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_52 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_63 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_96 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_35_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell_A BANK128\[1\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell_A BANK128\[0\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_135_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell_A BANK128\[1\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DEC0.AND3_B BANK128\[1\].RAM128.DEC0.AND3/B VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_94 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_1226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.A0BUF\[4\].cell A0[4] BANK128\[0\].RAM128.A0BUF\[4\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_166_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[18\].cell_A Di0[18] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_159_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_1288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X + BANK128\[1\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_125_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XDo0MUX.M\[2\].MUX\[1\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[1\]/A1 + Do0MUX.M\[2\].MUX\[1\]/A0 Do0[17] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell_A BANK128\[1\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_160_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XDo0MUX.SEL0BUF\[1\] A0[7] Do0MUX.SEL0BUF\[1\]/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell_A BANK128\[0\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_1609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_61_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X + BANK128\[1\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.EN0BUF.cell BANK128\[1\].RAM128.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1656 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_7_876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell_A BANK128\[0\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XDo0MUX.M\[1\].MUX\[3\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[3\]/A1 + Do0MUX.M\[1\].MUX\[3\]/A0 Do0[11] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_105_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_1535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_1095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_680 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.DIBUF\[16\].cell BANK128\[0\].RAM128.DIBUF\[16\].cell/X Di0[16] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_831 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_Do0MUX.M\[0\].MUX\[0\]_A0 Do0MUX.M\[0\].MUX\[0\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X + BANK128\[0\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[4\].cell BANK128\[1\].RAM128.A0BUF\[4\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_145_1022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell_A BANK128\[0\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_125_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell BANK128\[0\].RAM128.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_138_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[5\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[5\]/A1 + Do0MUX.M\[0\].MUX\[5\]/A0 Do0[5] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_68 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_78_102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDEC0.AND0 VPWR VGND DEC0.AND0/X EN0 A0[7] VGND VPWR NF_sky130_fd_sc_hd__and2b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_16_997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[1\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_170_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_1559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell_A BANK128\[0\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_143_891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_1218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell BANK128\[0\].RAM128.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XPHY_222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X + BANK128\[1\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_125_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell_A BANK128\[0\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_959 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell_A BANK128\[1\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_94_447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X + BANK128\[1\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X + BANK128\[0\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_1324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell_A BANK128\[0\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_100_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_41_539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_150_614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_1_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell_A BANK128\[1\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_60_61 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell BANK128\[1\].RAM128.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_132_1238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_1020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X + BANK128\[1\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_116_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell_A BANK128\[1\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[1\].MUX\[2\]_A0 Do0MUX.M\[1\].MUX\[2\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_1471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_1198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_1171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X + BANK128\[1\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A1 Do0MUX.M\[3\].MUX\[2\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_22_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell_A BANK128\[1\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_1470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_46_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_118_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_73 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_1050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_1553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_1526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A1 Do0MUX.M\[2\].MUX\[4\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_114_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_52_1014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X + BANK128\[0\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_17_1156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_188_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_178_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_192_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_160_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_130_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_1168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[0\].cell_A BANK128\[1\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_20 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell BANK128\[0\].RAM128.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XPHY_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A1 Do0MUX.M\[1\].MUX\[6\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XPHY_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_86 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_128_717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X + BANK128\[0\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_159_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DEC0.AND3_C BANK128\[1\].RAM128.DEC0.AND3/C VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_1120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_1039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_1473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_1498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell BANK128\[1\].RAM128.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_1348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_192_1703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_1086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[26\].cell_A Di0[26] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_58 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_149_1384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_51_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_145_1237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell_A BANK128\[0\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_1339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_1574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_28_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_59_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_28_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_27_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_167_1440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X + BANK128\[1\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_54_291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_1484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_14_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_180_1684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_171_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X + BANK128\[1\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_1456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_179_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.M\[2\].MUX\[4\]_A0 Do0MUX.M\[2\].MUX\[4\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_88_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XFILLER_99_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell BANK128\[1\].RAM128.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_24_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_125_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X + BANK128\[0\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_138_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_764 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_102_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_1418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_16_932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XDEC0.AND1 VPWR VGND A0[7] DEC0.AND1/X EN0 VGND VPWR NF_sky130_fd_sc_hd__and2_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell_A BANK128\[1\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell_A BANK128\[1\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.DIBUF\[22\].cell BANK128\[0\].RAM128.DIBUF\[22\].cell/X Di0[22] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_116_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_1263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_1488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_1556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[6\].cell BANK128\[1\].RAM128.DIBUF\[6\].cell/X Di0[6] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_159_491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_119_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell_A BANK128\[0\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_103_723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X + BANK128\[0\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_266 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_8_438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_1531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell_A BANK128\[1\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_1589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_130_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_1584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_1052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_1506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_1304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_81_621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_39_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_1072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_1638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_21_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell BANK128\[0\].RAM128.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[3\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell_A BANK128\[1\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_158_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell_A BANK128\[1\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_153_431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_1656 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_45_1225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_68_927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_85_70 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_92 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.M\[3\].MUX\[6\]_A0 Do0MUX.M\[3\].MUX\[6\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_1048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_1_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_176_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_163_239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_1139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_39_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_39_1563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell_A BANK128\[1\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_1206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_81_1403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_1515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_40_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_73_974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_1459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X + BANK128\[1\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[3\].cell BANK128\[1\].RAM128.A0BUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_1638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_191_356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_154_1250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_63_1166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_10 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_43 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_54 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_186_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_1273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell_A BANK128\[1\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_83_1509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_2_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_1_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X + BANK128\[0\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[27\].cell_A Di0[27] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.WEBUF\[1\].cell_A WE0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_1554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X + BANK128\[0\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[1\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.A0BUF\[5\].cell_A A0[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_189_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_36_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_42_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_14_145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.A0BUF\[6\].cell A0[6] BANK128\[1\].RAM128.DEC0.AND3/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_816 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_135_1418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_38_705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[4\].cell BANK128\[0\].RAM128.A0BUF\[4\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell_A BANK128\[0\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_14_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_179_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_138_1042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X + BANK128\[1\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_760 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_25_988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_178_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[4\].cell_A BANK128\[0\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_27_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_176_1529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_1231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_26_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X + BANK128\[0\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_22_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_21_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell_A BANK128\[1\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A1 Do0MUX.M\[0\].MUX\[1\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[1\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[5\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_1312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[0\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X + BANK128\[0\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[10\].cell_A Di0[10] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_72_847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[3\].cell_A BANK128\[0\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_66 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_56 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_1531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_24_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.DIBUF\[18\].cell BANK128\[1\].RAM128.DIBUF\[18\].cell/X Di0[18] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_32_1079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_106_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X + BANK128\[1\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_61 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_62_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell_A BANK128\[0\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1179 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_97_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_115_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_1340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_54_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell BANK128\[0\].RAM128.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell_A BANK128\[0\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_1502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_134_178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_1164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_1183 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A1 Do0MUX.M\[3\].MUX\[6\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_176_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X + BANK128\[0\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_1609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell_A BANK128\[1\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_34_1686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.EN0BUF.cell_A BANK128\[0\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell_A BANK128\[0\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell BANK128\[0\].RAM128.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_61_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_1494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_49_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_1262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_1377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_189_137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_183_1683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_1432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X + BANK128\[1\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[2\].cell_A Di0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_71_1606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_1136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_192_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[0\].MUX\[3\]_A0 Do0MUX.M\[0\].MUX\[3\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_22 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_33 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_44 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_55 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_66 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_88 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_99 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_165_1391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_17_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_182_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1267 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_4_1713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_178_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DEC0.AND2_A_N BANK128\[1\].RAM128.DEC0.AND3/B VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_56_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X + BANK128\[1\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X + BANK128\[0\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_1487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X + BANK128\[0\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_23_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_1553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_123_1515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_137_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_30_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_1204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_191_1248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_154_1070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\] BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_101_652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell_A BANK128\[0\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_14_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_141_1637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_128_527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_6_345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_170_338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.DEC0.AND1_B BANK128\[1\].RAM128.DEC0.AND3/B VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell BANK128\[0\].RAM128.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_4_1532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_34_934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_185_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_144_1294 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X + BANK128\[1\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell_A BANK128\[0\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_178_994 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_32_1228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_23 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_106_722 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_154_33 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell_A BANK128\[1\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_37_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_168_460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_139_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_1175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_0_1226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XDo0MUX.M\[1\].MUX\[1\] VGND VPWR Do0MUX.SEL0BUF\[1\]/X Do0MUX.M\[1\].MUX\[1\]/A1 + Do0MUX.M\[1\].MUX\[1\]/A0 Do0[9] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_92_185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_1386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_1518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_Do0MUX.M\[1\].MUX\[5\]_A0 Do0MUX.M\[1\].MUX\[5\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[11\].cell_A Di0[11] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_25_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell_A BANK128\[0\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[3\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[3\]/A1 + Do0MUX.M\[0\].MUX\[3\]/A0 Do0[3] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_10_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_1367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X + BANK128\[0\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[8\].cell_A Di0[8] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_110_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_129_688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_48_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell BANK128\[1\].RAM128.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_22_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_1322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[24\].cell BANK128\[1\].RAM128.DIBUF\[24\].cell/X Di0[24] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_34_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_0_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_21_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_1198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_76_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_29_355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell_A BANK128\[1\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_73_1158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_103_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[4\].cell_A BANK128\[1\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell_A BANK128\[0\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X + BANK128\[1\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_156_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_144_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_158_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_1349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_41_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_38_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_1163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_1547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[3\].cell_A BANK128\[1\].RAM128.A0BUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XFILLER_190_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_57_461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[3\].cell BANK128\[0\].RAM128.A0BUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell_A BANK128\[0\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell_A BANK128\[1\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_153_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_68_759 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell_A BANK128\[0\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_63_475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.DIBUF\[28\].cell BANK128\[0\].RAM128.DIBUF\[28\].cell/X Di0[28] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_51_659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_Do0MUX.M\[2\].MUX\[7\]_A0 Do0MUX.M\[2\].MUX\[7\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell BANK128\[0\].RAM128.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_105_628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_132_436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_1244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_1293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_100_388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_12 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_23 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell_A BANK128\[1\].RAM128.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_1657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_45 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_56 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_67 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A1 Do0MUX.M\[3\].MUX\[0\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_89 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell_A BANK128\[0\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_859 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_190_380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X + BANK128\[1\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell_A BANK128\[1\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]_A BANK128\[1\].RAM128.DEC0.AND3/B + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X + BANK128\[1\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_103_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_66_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_115_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A1 Do0MUX.M\[2\].MUX\[2\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_64_1455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_190_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_20_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell_A BANK128\[1\].RAM128.A0BUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell_A BANK128\[0\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_1506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_153_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A1 Do0MUX.M\[1\].MUX\[4\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[11\].cell BANK128\[0\].RAM128.DIBUF\[11\].cell/X Di0[11] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_98 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X + BANK128\[0\].RAM128.DIBUF\[23\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DEC0.AND1_C BANK128\[1\].RAM128.DEC0.AND3/C VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[0\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_120_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell_A BANK128\[0\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_168_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_72 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_60_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_61_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_159_642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_1219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_114_233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A1 Do0MUX.M\[0\].MUX\[6\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_1214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_1105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.EN0BUF.cell_A BANK128\[1\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_84_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_184_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_1310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_1470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_156_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_155_188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X + BANK128\[1\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_59_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_1272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_107_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X + BANK128\[1\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell_A BANK128\[1\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_1181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_152_136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_1133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell_A BANK128\[0\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_50_1137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_7_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_1396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X + BANK128\[0\].RAM128.DIBUF\[27\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell_A BANK128\[0\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_1375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell_A BANK128\[0\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_37_1482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_116_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1491 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell_A BANK128\[1\].RAM128.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_53_860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_25_573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_44_99 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_1571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X + BANK128\[1\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_5_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_1391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.DIBUF\[30\].cell BANK128\[1\].RAM128.DIBUF\[30\].cell/X Di0[30] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_122_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_44_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_116_114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_89_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_171_286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell_A BANK128\[1\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.DIBUF\[29\].cell_A Di0[29] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_86_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_259 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_1659 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_108_615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_147_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell BANK128\[1\].RAM128.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X + BANK128\[0\].RAM128.DIBUF\[10\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_79 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_46_1559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[1\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.WEBUF\[0\].cell WE0[0] BANK128\[1\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_72_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_144_1614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_71_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_12_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_138_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_35_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_193_1291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_73_207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_752 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_13 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XPHY_24 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_46 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_68 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_79 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X + BANK128\[0\].RAM128.DIBUF\[6\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_9_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_104_651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell_A BANK128\[1\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_173_304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X + BANK128\[1\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_58_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_102_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_1449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_816 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_1588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_11_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_117_231 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell_A BANK128\[0\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_189_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_80_1291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_1338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_35_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_161_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_7_815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell BANK128\[1\].RAM128.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_184_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_543 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_174_1459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell_A BANK128\[1\].RAM128.DIBUF\[6\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X + BANK128\[0\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_61_1618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X + BANK128\[0\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_57_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.A0BUF\[2\].cell_A A0[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_3_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_36_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_1385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_164_134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.DIBUF\[1\].cell BANK128\[1\].RAM128.DIBUF\[1\].cell/X Di0[1] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_1337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_1673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_56 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_43_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell_A BANK128\[1\].RAM128.DIBUF\[5\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_56_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell_A BANK128\[1\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_100 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_6_122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.CLKBUF.cell_A CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_174_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_179_1112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_1156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_57_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_77_1433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_64_390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.DIBUF\[20\].cell_A Di0[20] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_40_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_1707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell_A BANK128\[1\].RAM128.DIBUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_138_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X + BANK128\[1\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_4_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell BANK128\[0\].RAM128.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_160_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_1228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_94_931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_1081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_1128 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_1079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X + BANK128\[0\].RAM128.DIBUF\[9\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[3\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_Do0MUX.M\[0\].MUX\[6\]_A0 Do0MUX.M\[0\].MUX\[6\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_1235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_135_1560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XFILLER_131_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_1589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell_A BANK128\[1\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_1548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_165_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_1611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.DIBUF\[5\].cell BANK128\[0\].RAM128.DIBUF\[5\].cell/X Di0[5] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_125_70 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_5_1470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_186_1480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_1347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_1604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_89_1134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_939 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_1402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_67_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell_A BANK128\[1\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_133_1508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A1 Do0MUX.M\[3\].MUX\[4\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_111_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_129_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_13_555 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_186_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_4_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_122_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_64_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_1018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_56_1166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell_A BANK128\[0\].RAM128.DIBUF\[28\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A1 Do0MUX.M\[2\].MUX\[6\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_118_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[0\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_99_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\] BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X + BANK128\[1\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_14 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_58 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_69 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X + BANK128\[0\].RAM128.DIBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_1_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_1368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_2_1473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_1322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_14_842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_31_1637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.A0BUF\[1\].cell A0[1] BANK128\[1\].RAM128.A0BUF\[1\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.WEBUF\[0\].cell_A WE0[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_23_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_1200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_1168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_176_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_1652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[13\].cell_A Di0[13] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_55_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X + BANK128\[1\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_33 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_30_1692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_97_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_46_1198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_133_1168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_65_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_1507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell_A BANK128\[0\].RAM128.DIBUF\[24\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_1259 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_831 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_1202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_188_1180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_1367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_1337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X + BANK128\[0\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_1143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]_A BANK128\[1\].RAM128.DEC0.AND3/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\] BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X + BANK128\[0\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell BANK128\[1\].RAM128.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_168_452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_109_596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_117_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.DIBUF\[13\].cell BANK128\[1\].RAM128.DIBUF\[13\].cell/X Di0[13] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_1618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_1135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_1534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_18_1064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell_A BANK128\[1\].RAM128.DIBUF\[16\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[4\].cell_A BANK128\[0\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.A0BUF\[5\].cell A0[5] BANK128\[0\].RAM128.DEC0.AND3/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_84_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_20_1691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell BANK128\[1\].RAM128.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XPHY_239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_133_374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_66 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_45 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.CLKBUF.cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_30_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_54_1242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X + BANK128\[1\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_141_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_102_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell_A BANK128\[0\].RAM128.DIBUF\[20\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_183_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_1073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_17_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[7\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_80_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X + BANK128\[1\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[5\].cell_A Di0[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_148_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_162_403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_134_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_192_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XFILLER_192_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[0\].MUX\[1\] VGND VPWR Do0MUX.SEL0BUF\[0\]/X Do0MUX.M\[0\].MUX\[1\]/A1 + Do0MUX.M\[0\].MUX\[1\]/A0 Do0[1] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_134_650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_88_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.DIBUF\[17\].cell BANK128\[0\].RAM128.DIBUF\[17\].cell/X Di0[17] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_153_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_1588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X + BANK128\[0\].RAM128.DIBUF\[29\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell BANK128\[0\].RAM128.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_15_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell_A BANK128\[1\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_172_767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell_A BANK128\[1\].RAM128.DIBUF\[31\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_22_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_159_1325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_1599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_131_675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_103_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_1263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_1332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_107_1471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_1218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_126_425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_126_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_121_152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_23_1336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_1576 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XDo0MUX.M\[3\].MUX\[6\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[6\]/A1 + Do0MUX.M\[3\].MUX\[6\]/A0 Do0[30] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_91_798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_44_681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_182_1164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.DIBUF\[1\].cell_A Di0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X + BANK128\[1\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_81_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XPHY_26 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_15 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X + BANK128\[0\].RAM128.DIBUF\[12\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_37 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_22_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_157_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_137_1486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_1441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_51_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[0\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_182_862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_126_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_192_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_110_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_1480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell_A BANK128\[0\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_938 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell BANK128\[1\].RAM128.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_121_1210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.DIBUF\[14\].cell_A Di0[14] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_143_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell_A BANK128\[0\].RAM128.DIBUF\[26\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_70_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_161_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X + BANK128\[1\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_77_76 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X + BANK128\[1\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_18_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_158_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A1 Do0MUX.M\[2\].MUX\[0\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_3_1079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_60_790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell_A BANK128\[0\].RAM128.DIBUF\[12\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_161_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_69_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_47_1464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_792 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_82_1377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_Do0MUX.SEL0BUF\[2\]_A A0[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_1_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell_A BANK128\[1\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A1 Do0MUX.M\[1\].MUX\[2\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_145_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X + BANK128\[0\].RAM128.DIBUF\[16\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_120_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Root_CLKBUF/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_187_762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X + BANK128\[0\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_162_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_895 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_155_681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A1 Do0MUX.M\[0\].MUX\[4\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_9_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_64_1052 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_124_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_84_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_33_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell BANK128\[1\].RAM128.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_127_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_37 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_1146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_192_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_21_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell_A BANK128\[0\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_8_912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_32_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_156_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[6\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_174_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_1312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_1451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_4_1130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X + BANK128\[1\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_1026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_61 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_115_342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_1540 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_85_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_38 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_51_1405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_1533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_1476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell_A BANK128\[0\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[0\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_95 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_0_675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_1567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_75_443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_149_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell BANK128\[1\].RAM128.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_169_592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_540 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_141_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_172_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_1164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_113_1189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.DIBUF\[23\].cell BANK128\[0\].RAM128.DIBUF\[23\].cell/X Di0[23] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[4\].cell_A BANK128\[1\].RAM128.A0BUF\[4\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell_A BANK128\[0\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_129_1196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DIBUF\[7\].cell BANK128\[1\].RAM128.DIBUF\[7\].cell/X Di0[7] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_138_231 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_138_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_60 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X + BANK128\[0\].RAM128.DIBUF\[5\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[0\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_152_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell_A BANK128\[0\].RAM128.DIBUF\[18\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_77_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_119_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_167_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_16 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XPHY_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_38 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XPHY_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_1347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_126_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_117_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_103_131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_79_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_1687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_59_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_22 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_92_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell BANK128\[0\].RAM128.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_51_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_95_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_68_538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_20_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_543 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_12_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_173_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell_A BANK128\[1\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_82_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_93_1655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[22\].cell_A Di0[22] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_91_1390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_1431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_104_1475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_1448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_123_215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_81_1036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_137_1295 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell_A BANK128\[0\].RAM128.DIBUF\[14\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_158_134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_1278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_75_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_1112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X + BANK128\[1\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_86_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_63_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[4\].cell BANK128\[1\].RAM128.A0BUF\[4\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_179_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_168_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_144_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_152_844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_124_546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell BANK128\[0\].RAM128.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_146_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_33_257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_174_457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_179_1148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_115_546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_64_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell_A BANK128\[1\].RAM128.DIBUF\[25\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell_A BANK128\[1\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X + BANK128\[0\].RAM128.DIBUF\[22\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_178_730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_1521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_133_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X + BANK128\[0\].RAM128.DIBUF\[8\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_59_187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_112_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_16_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell_A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell_A BANK128\[0\].RAM128.DIBUF\[10\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_1659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_169_774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_1367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_193_1646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_79_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_103_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell BANK128\[1\].RAM128.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_131_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_1361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_92_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_129_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_181_758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_161_482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X + BANK128\[1\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_169_1169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_19_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_106_1197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_22_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell_A BANK128\[1\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_74_1417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_14_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_11_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[1\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_11_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_115_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_83_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_1393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X + BANK128\[0\].RAM128.DIBUF\[26\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_1394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_1416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_1711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_101_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X + BANK128\[0\].RAM128.DIBUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_116_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell_A BANK128\[1\].RAM128.DIBUF\[9\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_48_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_177_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.A0BUF\[5\].cell_A A0[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[19\].cell BANK128\[1\].RAM128.DIBUF\[19\].cell/X Di0[19] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_34_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_1426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X + BANK128\[1\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_67_742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_17 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XPHY_28 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_34_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_136_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_1698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_135_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_37 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_172_1346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A1 Do0MUX.M\[3\].MUX\[2\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell BANK128\[0\].RAM128.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_54_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell_A BANK128\[1\].RAM128.DIBUF\[8\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_1183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_510 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_1156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_177_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_82 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_96_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[2\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_3_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_1337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_32_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A1 Do0MUX.M\[2\].MUX\[4\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[2\]/X + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_157_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X + BANK128\[0\].RAM128.DIBUF\[14\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_101_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\] BANK128\[0\].RAM128.DEC0.AND3/A BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[0\]/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_100_168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[23\].cell_A Di0[23] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_136_500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_108_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell_A BANK128\[1\].RAM128.DIBUF\[7\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_117_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_26_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[7\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell BANK128\[0\].RAM128.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\] BANK128\[0\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A1 Do0MUX.M\[1\].MUX\[6\]/A0 BANK128\[0\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A2 BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A0 + BANK128\[0\].RAM128.Do0MUX.M\[1\].MUX\[6\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_115_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_109_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_183_1283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_1218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_1109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.A0BUF\[1\].cell_A A0[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6 VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_97_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_58_1006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_166_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_177_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_180_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_1135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[7\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell_A BANK128\[0\].RAM128.DIBUF\[21\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_41_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X + BANK128\[1\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_168_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_7_638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_10_177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell_A BANK128\[1\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_151_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_1358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_88_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_1588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_191_1585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_78_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_24_1252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_72_1526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell_A BANK128\[0\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X + BANK128\[1\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[1\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_18_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell_A BANK128\[0\].RAM128.DEC0.AND3/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_856 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_29_1196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_168_1554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4 VGND VPWR BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XPHY_209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_52_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X + BANK128\[1\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X + BANK128\[0\].RAM128.DIBUF\[18\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_121_539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_87_431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell_A BANK128\[1\].RAM128.DIBUF\[13\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X + BANK128\[0\].RAM128.DIBUF\[4\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_82_1198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_87_486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_62_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_130_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_172_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_21 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_193_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_1382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_93_401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_111_1030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_55_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[0\].cell BANK128\[0\].RAM128.DIBUF\[0\].cell/X Di0[0] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.DEC0.AND0/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_34_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_116_856 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_157_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_172_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_170_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[0\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell BANK128\[0\].RAM128.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_69_464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_1530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_Do0MUX.M\[2\].MUX\[0\]_A0 Do0MUX.M\[2\].MUX\[0\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.EN0BUF.cell_A BANK128\[0\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_1090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X + BANK128\[1\].RAM128.DIBUF\[19\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_145_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_7_265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_98_504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_66_423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_1147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.WEBUF\[3\].cell_A WE0[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[5\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[5\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_117 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\] BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[1\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_91_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_30_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_102_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_162_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_171_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.EN0BUF.cell BANK128\[0\].RAM128.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND3/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_130_177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.DIBUF\[16\].cell_A Di0[16] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_73_938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\] BANK128\[1\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_80_492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X + BANK128\[1\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_139_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_154_704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_122_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_150_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_27_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_49_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_1557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell_A BANK128\[0\].RAM128.DIBUF\[27\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_91 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell_A BANK128\[0\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_54_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_18 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_176_884 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_191_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_103_100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_172_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_77_518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell BANK128\[1\].RAM128.WEBUF\[2\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_132_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_1041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_46_905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[25\].cell BANK128\[1\].RAM128.DIBUF\[25\].cell/X Di0[25] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_26_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_15_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_1102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_1619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_103_1135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_68_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_49_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[3\].MUX\[4\] VGND VPWR Do0MUX.SEL0BUF\[3\]/X Do0MUX.M\[3\].MUX\[4\]/A1 + Do0MUX.M\[3\].MUX\[4\]/A0 Do0[28] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell_A BANK128\[0\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_36_1519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_31_120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[3\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell_A BANK128\[1\].RAM128.DIBUF\[19\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_39_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[3\].MUX\[2\]_A0 Do0MUX.M\[3\].MUX\[2\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_165_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_163_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XDo0MUX.M\[2\].MUX\[6\] VGND VPWR Do0MUX.SEL0BUF\[2\]/X Do0MUX.M\[2\].MUX\[6\]/A1 + Do0MUX.M\[2\].MUX\[6\]/A0 Do0[22] VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[31\].cell_A Di0[31] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_150_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_98_1535 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_1437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_34 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DEC0.AND0 BANK128\[1\].RAM128.DEC0.AND3/C BANK128\[1\].RAM128.DEC0.AND0/Y + BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.DEC0.AND3/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__nor3b_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_187_913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X + BANK128\[0\].RAM128.DIBUF\[20\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_155_843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell_A BANK128\[0\].RAM128.DIBUF\[23\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell_A BANK128\[0\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[0\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[0\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_77_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[4\].cell BANK128\[0\].RAM128.A0BUF\[4\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DEC0.AND3/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_58_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_33_963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_189_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XANTENNA_BANK128\[0\].RAM128.DIBUF\[8\].cell_A Di0[8] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_173_695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_99_495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_28_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DIBUF\[29\].cell BANK128\[0\].RAM128.DIBUF\[29\].cell/X Di0[29] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_70_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell BANK128\[0\].RAM128.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.A0BUF\[0\].cell A0[0] BANK128\[0\].RAM128.A0BUF\[0\].cell/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_11_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.EN0BUF.cell DEC0.AND1/X BANK128\[1\].RAM128.DEC0.AND3/C VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_148_191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_2_311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_60 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_94_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Root_CLKBUF_A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_146_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_159_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell_A BANK128\[1\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_155_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_6_672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X + BANK128\[1\].RAM128.DIBUF\[21\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_1011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_170_676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ENBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_155_1150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_96_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_168_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0 BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_52_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_140_1452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X + BANK128\[1\].RAM128.DIBUF\[3\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_167_1021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_1538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[0\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A1 Do0MUX.M\[1\].MUX\[0\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[1\]/X + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[1\].MUX\[0\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_30_207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_15_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_184_724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_128_106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_105_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_660 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_74_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.DIBUF\[12\].cell BANK128\[0\].RAM128.DIBUF\[12\].cell/X Di0[12] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[5\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_9_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.DIBUF\[4\].cell_A Di0[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X + BANK128\[0\].RAM128.DIBUF\[24\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_9_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell BANK128\[1\].RAM128.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_175_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_190_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_50_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_128_684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A1 Do0MUX.M\[0\].MUX\[2\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[0\]/X + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[2\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_103_529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_142_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_90_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_88_1331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_101_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_106_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_121_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_62_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_47_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_71_663 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_31_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_54_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_160_1614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_102_1008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[4\]/A3 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_7_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell_A BANK128\[1\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_67_1437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_98_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_38_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_1164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_1216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.A0BUF\[0\].cell_A BANK128\[1\].RAM128.A0BUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_78_1577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_179_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell_A BANK128\[0\].RAM128.DIBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell_A BANK128\[1\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_104_827 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_89_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_118_1059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X + BANK128\[1\].RAM128.DIBUF\[25\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[6\] BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[6\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_135_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.DIBUF\[17\].cell_A Di0[17] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_85_744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_53_641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell_A BANK128\[0\].RAM128.DIBUF\[29\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\] BANK128\[1\].RAM128.Do0MUX.SEL0BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A1 Do0MUX.M\[3\].MUX\[7\]/A1 BANK128\[1\].RAM128.Do0MUX.SEL1BUF\[3\]/X + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A2 BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A0 + BANK128\[1\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_129_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[2\]_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_135_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_1153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_106_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_57_980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_44_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_95_1154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_162_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_1255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_1217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4 VGND VPWR BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND4/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell_A BANK128\[0\].RAM128.DIBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_126_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_125_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_1302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_63_1109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_112_145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_140_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_148_1008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_19 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_104_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell_A BANK128\[0\].RAM128.DIBUF\[15\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X + BANK128\[0\].RAM128.DIBUF\[28\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[0\] BANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[0\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_73_747 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_1712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_51_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_167_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_107_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_181_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_114_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell_A BANK128\[0\].RAM128.DIBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_40_1451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_149_1306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[3\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_45_961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[3\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X + BANK128\[1\].RAM128.DIBUF\[13\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XPHY_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2 VGND VPWR BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.DIBUF\[31\].cell BANK128\[1\].RAM128.DIBUF\[31\].cell/X Di0[31] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_82_1529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_193_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[5\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[5\]/A2 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_36_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[1\].cell_A BANK128\[1\].RAM128.DEC0.AND1/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell_A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_108_1570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_1494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.EN0BUF.cell_A BANK128\[1\].RAM128.DEC0.AND0/Y + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_150_1465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[7\] BANK128\[0\].RAM128.Do0MUX.M\[3\].MUX\[7\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[3\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[2\] BANK128\[1\].RAM128.Do0MUX.M\[2\].MUX\[2\]/A1 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.DEC0.AND1 VGND VPWR BANK128\[1\].RAM128.DEC0.AND3/B BANK128\[1\].RAM128.DEC0.AND1/X + BANK128\[1\].RAM128.DEC0.AND3/A BANK128\[1\].RAM128.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_72_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_41_430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell_A BANK128\[0\].RAM128.DIBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_42_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_109_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.A0BUF\[3\].cell BANK128\[1\].RAM128.A0BUF\[3\].cell/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DEC0.AND3/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_155_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X + BANK128\[0\].RAM128.DIBUF\[11\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_170_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.WEBUF\[1\].cell WE0[1] BANK128\[1\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_18_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[1\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_71_1208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.TIE0\[3\].cell/LO + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_20_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell_A BANK128\[0\].RAM128.DIBUF\[11\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_12_1350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.WEBUF\[2\].cell_A BANK128\[1\].RAM128.WEBUF\[2\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_59_316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_70_547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_1575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell_A BANK128\[0\].RAM128.DIBUF\[30\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_176_490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_163_151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[3\].cell_A BANK128\[0\].RAM128.DEC0.AND2/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_5_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_105_763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_1240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_33_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[7\].cell/X + BANK128\[0\].RAM128.DIBUF\[7\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_53_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_70_1274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_115_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_127_376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_83_1602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_38_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.ABUF\[1\] BANK128\[0\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[1\]_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_151_1048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.WEBUF\[1\].cell_A BANK128\[1\].RAM128.WEBUF\[1\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND4/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_65_875 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6 VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1 VGND VPWR BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND1/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_178_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X + BANK128\[1\].RAM128.DIBUF\[17\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell BANK128\[1\].RAM128.BLOCK\[1\].RAM32.TIE0\[3\].cell/LO + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[3\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_133_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.CLKBUF.cell_A BANK128\[0\].RAM128.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.DEC0.AND6/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[6\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[6\]/A3 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_93_1241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[2\]_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell_A BANK128\[1\].RAM128.DIBUF\[22\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_169_788 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_139_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[1\] BANK128\[1\].RAM128.BLOCK\[1\].RAM32.A0BUF\[1\].cell/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell BANK128\[0\].RAM128.BLOCK\[3\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_165_994 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_178_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_43_1696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_1130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_59_1103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_80_119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_37_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_1139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.WEBUF\[0\].cell_A BANK128\[1\].RAM128.WEBUF\[0\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[3\]/A2 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[0\]_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_159_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[16\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[0\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_156_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[3\] BANK128\[1\].RAM128.Do0MUX.M\[0\].MUX\[3\]/A0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[13\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_116_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_100_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_142_176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X + BANK128\[0\].RAM128.DIBUF\[15\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_111_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_42_1140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_193_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_166_736 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_20_285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_33 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_175_1324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z VGND VPWR VPWR + VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell_A BANK128\[1\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X + BANK128\[0\].RAM128.DIBUF\[30\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_21_1268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_28_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.DEC0.AND2/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[12\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_67_1405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_165_791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_180_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.DIBUF\[2\].cell BANK128\[1\].RAM128.DIBUF\[2\].cell/X Di0[2] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell BANK128\[1\].RAM128.BLOCK\[2\].RAM32.TIE0\[2\].cell/LO + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_94_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[6\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_94_723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[5\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X + BANK128\[0\].RAM128.DIBUF\[0\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_35_878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_90_995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_1220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.DEC0.AND4/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_175_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND2 VGND VPWR BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND2/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/B + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DEC0.AND3/C VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[9\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_89_1641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[8\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[3\]_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_111_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.ENBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DEC0.AND1/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.DEC0.AND7/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_84_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[2\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_25_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[1\].Do_FF\[7\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[0\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.DIBUF\[25\].cell_A Di0[25] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_146_290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_84_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_Do0MUX.M\[1\].MUX\[1\]_A0 Do0MUX.M\[1\].MUX\[1\]/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_42 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_161_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_121_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[31\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[1\]_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_25_1190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[12\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[4\]_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[21\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_17_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell_A BANK128\[0\].RAM128.DIBUF\[17\].cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_147_1278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[26\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X + BANK128\[1\].RAM128.DIBUF\[31\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.CLKBUF.cell_A BANK128\[0\].RAM128.BLOCK\[2\].RAM32.CLKBUF.cell/X + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_185_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[1\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[15\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5 VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND5/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/B BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/A + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell BANK128\[0\].RAM128.WEBUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.WEBUF\[2\].cell/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_172_558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell BANK128\[0\].RAM128.BLOCK\[0\].RAM32.TIE0\[2\].cell/LO + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.FBUFENBUF0\[2\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[24\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_158_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[17\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_113_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[3\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[29\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[1\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[30\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_90 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XFILLER_48_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.Do0_REG.OUTREG_BYTE\[3\].Do_FF\[2\]_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[3\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[21\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.DEC0.AND0/Y + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_50_678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_1692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.ABUF\[2\] BANK128\[0\].RAM128.BLOCK\[0\].RAM32.A0BUF\[2\].cell/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.DEC0.AND7/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[23\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[4\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_31_881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[7\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[22\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[0\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[26\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell BANK128\[0\].RAM128.BLOCK\[1\].RAM32.TIE0\[0\].cell/LO + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.FBUFENBUF0\[0\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[18\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[31\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_143_260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[15\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.OUTREG_BYTE\[0\].Do_FF\[4\] BANK128\[0\].RAM128.Do0MUX.M\[0\].MUX\[4\]/A1 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.Do0_REG.Do_CLKBUF\[0\]/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[4\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[19\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[30\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[3\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[3\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[27\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[9\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_112_691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[14\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[9\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[0\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[1\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[4\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_85_597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[12\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.FBUFENBUF0\[1\].cell/X + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[11\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[10\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_187_1581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[6\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0_A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[22\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[1\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[25\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[27\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CLKINV + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/CLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_185_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[24\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_555 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WEBUF\[0\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[5\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[5\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[20\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.DEC0.AND2/X + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[7\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[1\].FLOATBUF0\[15\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[1\].FLOATBUF0\[10\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.CLKBUF/X + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WEBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_155_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[27\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[0\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WEBUF\[0\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[23\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[1\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/LO + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.TIE0\[1\].cell/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.SEL0INV/Y + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_114_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.OUTREG_BYTE\[2\].Do_FF\[1\] BANK128\[0\].RAM128.Do0MUX.M\[2\].MUX\[1\]/A0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.Do0_REG.Do_CLKBUF\[2\]/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[17\].cell/Z + VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_62_1198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[6\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[23\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_114_1277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[7\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[31\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[5\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[13\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[5\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.BYTE\[2\].FLOATBUF0\[21\].cell/Z BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[6\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[1\].B.BIT\[2\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[10\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[28\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[16\].cell/X BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[0\].FLOATBUF0\[3\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[3\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[2\].FLOATBUF0\[20\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[7\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_75_1526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[6\].genblk1.STORAGE_GATE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/GCLK + VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.CLKBUF/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.CLKBUF.cell/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[23\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[20\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND + VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[2\].B.CGAND/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WEBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[7\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[0\].B.BIT\[7\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_177_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[8\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_60_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/CLK + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlclkp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.BYTE\[2\].FLOATBUF0\[18\].cell/Z BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[2\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[17\].cell/X BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[1\].RAM8.WORD\[1\].W.BYTE\[2\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[0\].B.BIT\[4\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[4\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[1\].B.CGAND_B + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WEBUF\[1\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[22\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XPHY_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[6\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[28\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.BIT\[0\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[0\].FLOATBUF0\[0\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[5\].W.BYTE\[0\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_173_823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND + VPWR VGND BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.CGAND/X + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WEBUF\[3\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X + VGND VPWR NF_sky130_fd_sc_hd__and2_1 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[28\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[4\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.BYTE\[3\].B.SEL0INV/Y + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[4\].W.SEL0BUF/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_1 XFILLER_172_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[2\].B.CGAND_B + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WEBUF\[2\].cell/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[1\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[8\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[18\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[6\].W.BYTE\[2\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[17\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_1701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.DIBUF\[5\].cell/X BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[0\].RAM8.WORD\[2\].W.BYTE\[0\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.BIT\[2\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.BYTE\[3\].FLOATBUF0\[26\].cell/Z BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[1\].RAM8.WORD\[7\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[6\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[1\].FLOATBUF0\[14\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XANTENNA_BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[14\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0 + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.BIT\[0\].OBUF0/A + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.BYTE\[3\].FLOATBUF0\[24\].cell/Z BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[2\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[6\].W.BYTE\[0\].B.BIT\[2\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3 VPWR VGND BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND3/X + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/C BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/A BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.DEC0.AND7/B + VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[1\].B.genblk1.CLKINV_A + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XBANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.DIBUF\[11\].cell/X BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[2\].RAM32.SLICE\[0\].RAM8.WORD\[0\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XBANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].genblk1.STORAGE + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.DIBUF\[29\].cell/X BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.genblk1.CG/GCLK + BANK128\[1\].RAM128.BLOCK\[1\].RAM32.SLICE\[1\].RAM8.WORD\[4\].W.BYTE\[3\].B.BIT\[5\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.BYTE\[2\].B.genblk1.CLKINV_A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[0\].W.CLKBUF/X VGND VPWR + VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.DIBUF\[1\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[3\].RAM32.SLICE\[2\].RAM8.WORD\[4\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[3\].RAM32.DIBUF\[19\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[2\].B.CGAND_A + BANK128\[0\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.SEL0BUF/X VGND + VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XBANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.BIT\[6\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[3\].RAM32.BYTE\[3\].FLOATBUF0\[30\].cell/Z BANK128\[1\].RAM128.BLOCK\[3\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[3\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XFILLER_87_818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[3\].W.BYTE\[2\].B.BIT\[0\].genblk1.STORAGE_D + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[16\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0 + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.BIT\[3\].OBUF0/A + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.BYTE\[1\].FLOATBUF0\[11\].cell/Z BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[1\].B.SEL0INV/Y + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__ebufn_4 XBANK128\[0\].RAM128.DIBUF\[6\].cell BANK128\[0\].RAM128.DIBUF\[6\].cell/X Di0[6] + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[2\].RAM8.WORD\[2\].W.BYTE\[3\].B.BIT\[1\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[25\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.DIBUF\[1\].cell/X BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[2\].RAM32.SLICE\[2\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[1\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XANTENNA_BANK128\[1\].RAM128.BLOCK\[0\].RAM32.SLICE\[3\].RAM8.WORD\[1\].W.BYTE\[0\].B.BIT\[6\].genblk1.STORAGE_D + BANK128\[1\].RAM128.BLOCK\[0\].RAM32.DIBUF\[6\].cell/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].genblk1.STORAGE + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.DIBUF\[19\].cell/X BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.genblk1.CG/GCLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[3\].RAM8.WORD\[5\].W.BYTE\[2\].B.BIT\[3\].OBUF0/A + VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlxtp_1 XFILLER_98_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XBANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CLKINV + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.BYTE\[3\].B.genblk1.CG/CLK + BANK128\[0\].RAM128.BLOCK\[1\].RAM32.SLICE\[0\].RAM8.WORD\[5\].W.CLKBUF/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__inv_1 .ends .subckt NF_sky130_fd_sc_hd__o31ai_2 A1 Y B1 A3 A2 VGND VPWR VNB VPB X0 a_281_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_281_297# A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A3 a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_297# A2 a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o2bb2ai_2 B2 Y A1_N A2_N B1 VGND VPWR VNB VPB X0 a_113_297# A2_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_113_47# A2_N a_113_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B1 a_730_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A2_N a_113_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_730_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_471_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_471_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B2 a_730_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_113_297# A2_N a_113_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_113_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A1_N a_113_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B2 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR a_113_297# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_113_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y a_113_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_730_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y a_113_297# a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_471_47# a_113_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR A1_N a_113_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND B1 a_471_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a2111oi_2 D1 C1 A2 A1 Y B1 VGND VPWR VNB VPB X0 a_467_297# B1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_287_297# D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A2 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_923_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_28_297# B1 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_28_297# C1 a_287_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y A1 a_923_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND A2 a_684_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y D1 a_115_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_467_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR A1 a_467_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_115_297# C1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_467_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_684_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o311ai_2 A1 Y C1 B1 A3 A2 VGND VPWR VNB VPB X0 VPWR A1 a_51_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_55_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y C1 a_729_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_55_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A1 a_55_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_55_47# B1 a_729_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND A2 a_55_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND A3 a_55_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_729_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_51_297# A2 a_301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_729_47# B1 a_55_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_301_297# A2 a_51_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_55_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_51_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y A3 a_301_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_301_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__nor3b_1 C_N Y A B VGND VPWR VNB VPB X0 VGND a_91_199# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A a_245_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_91_199# C_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_245_297# B a_161_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_91_199# C_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_161_297# a_91_199# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt NF_sky130_fd_sc_hd__o32ai_4 A1 A2 A3 B1 Y B2 VGND VPWR VNB VPB X0 a_1224_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A1 a_1224_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_806_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_806_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A3 a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_27_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# B2 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y A3 a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_27_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_806_297# A2 a_1224_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 Y B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 a_1224_297# A2 a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_1224_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 a_806_297# A2 a_1224_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VPWR A1 a_1224_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X34 Y B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X36 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X37 a_1224_297# A2 a_806_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X38 Y B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt NF_sky130_fd_sc_hd__a41oi_4 B1 A2 A1 A4 A3 Y VGND VPWR VNB VPB X0 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A1 a_493_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A4 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A1 a_493_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_911_47# A2 a_493_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_911_47# A3 a_1269_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A4 a_1269_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND A4 a_1269_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_493_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_493_47# A2 a_911_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_493_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_493_47# A2 a_911_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_911_47# A2 a_493_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_1269_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_911_47# A3 a_1269_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_27_297# A4 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 VPWR A4 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_1269_47# A3 a_911_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X34 a_27_297# A4 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X35 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X36 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X37 a_1269_47# A3 a_911_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X38 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X39 a_1269_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt mgmt_core_wrapper VPWR clk_in clk_out core_clk core_rstn debug_in debug_mode + debug_oeb debug_out flash_clk flash_csb flash_io0_di flash_io0_do flash_io0_oeb + flash_io1_di flash_io1_do flash_io1_oeb flash_io2_di flash_io2_do flash_io2_oeb + flash_io3_di flash_io3_do flash_io3_oeb gpio_in_pad gpio_inenb_pad gpio_mode0_pad + gpio_mode1_pad gpio_out_pad gpio_outenb_pad hk_ack_i hk_cyc_o hk_dat_i[0] hk_dat_i[10] + hk_dat_i[11] hk_dat_i[12] hk_dat_i[13] hk_dat_i[14] hk_dat_i[15] hk_dat_i[16] hk_dat_i[17] + hk_dat_i[18] hk_dat_i[19] hk_dat_i[1] hk_dat_i[20] hk_dat_i[21] hk_dat_i[22] hk_dat_i[23] + hk_dat_i[24] hk_dat_i[25] hk_dat_i[26] hk_dat_i[27] hk_dat_i[28] hk_dat_i[29] hk_dat_i[2] + hk_dat_i[30] hk_dat_i[31] hk_dat_i[3] hk_dat_i[4] hk_dat_i[5] hk_dat_i[6] hk_dat_i[7] + hk_dat_i[8] hk_dat_i[9] hk_stb_o irq[0] irq[1] irq[2] irq[3] irq[4] irq[5] la_iena[0] + la_iena[100] la_iena[101] la_iena[102] la_iena[103] la_iena[104] la_iena[105] la_iena[106] + la_iena[107] la_iena[108] la_iena[109] la_iena[10] la_iena[110] la_iena[111] la_iena[112] + la_iena[113] la_iena[114] la_iena[115] la_iena[116] la_iena[117] la_iena[118] la_iena[119] + la_iena[11] la_iena[120] la_iena[121] la_iena[122] la_iena[123] la_iena[124] la_iena[125] + la_iena[126] la_iena[127] la_iena[12] la_iena[13] la_iena[14] la_iena[15] la_iena[16] + la_iena[17] la_iena[18] la_iena[19] la_iena[1] la_iena[20] la_iena[21] la_iena[22] + la_iena[23] la_iena[24] la_iena[25] la_iena[26] la_iena[27] la_iena[28] la_iena[29] + la_iena[2] la_iena[30] la_iena[31] la_iena[32] la_iena[33] la_iena[34] la_iena[35] + la_iena[36] la_iena[37] la_iena[38] la_iena[39] la_iena[3] la_iena[40] la_iena[41] + la_iena[42] la_iena[43] la_iena[44] la_iena[45] la_iena[46] la_iena[47] la_iena[48] + la_iena[49] la_iena[4] la_iena[50] la_iena[51] la_iena[52] la_iena[53] la_iena[54] + la_iena[55] la_iena[56] la_iena[57] la_iena[58] la_iena[59] la_iena[5] la_iena[60] + la_iena[61] la_iena[62] la_iena[63] la_iena[64] la_iena[65] la_iena[66] la_iena[67] + la_iena[68] la_iena[69] la_iena[6] la_iena[70] la_iena[71] la_iena[72] la_iena[73] + la_iena[74] la_iena[75] la_iena[76] la_iena[77] la_iena[78] la_iena[79] la_iena[7] + la_iena[80] la_iena[81] la_iena[82] la_iena[83] la_iena[84] la_iena[85] la_iena[86] + la_iena[87] la_iena[88] la_iena[89] la_iena[8] la_iena[90] la_iena[91] la_iena[92] + la_iena[93] la_iena[94] la_iena[95] la_iena[96] la_iena[97] la_iena[98] la_iena[99] + la_iena[9] la_input[0] la_input[100] la_input[101] la_input[102] la_input[103] la_input[104] + la_input[105] la_input[106] la_input[107] la_input[108] la_input[109] la_input[10] + la_input[110] la_input[111] la_input[112] la_input[113] la_input[114] la_input[115] + la_input[116] la_input[117] la_input[118] la_input[119] la_input[11] la_input[120] + la_input[121] la_input[122] la_input[123] la_input[124] la_input[125] la_input[126] + la_input[127] la_input[12] la_input[13] la_input[14] la_input[15] la_input[16] la_input[17] + la_input[18] la_input[19] la_input[1] la_input[20] la_input[21] la_input[22] la_input[23] + la_input[24] la_input[25] la_input[26] la_input[27] la_input[28] la_input[29] la_input[2] + la_input[30] la_input[31] la_input[32] la_input[33] la_input[34] la_input[35] la_input[36] + la_input[37] la_input[38] la_input[39] la_input[3] la_input[40] la_input[41] la_input[42] + la_input[43] la_input[44] la_input[45] la_input[46] la_input[47] la_input[48] la_input[49] + la_input[4] la_input[50] la_input[51] la_input[52] la_input[53] la_input[54] la_input[55] + la_input[56] la_input[57] la_input[58] la_input[59] la_input[5] la_input[60] la_input[61] + la_input[62] la_input[63] la_input[64] la_input[65] la_input[66] la_input[67] la_input[68] + la_input[69] la_input[6] la_input[70] la_input[71] la_input[72] la_input[73] la_input[74] + la_input[75] la_input[76] la_input[77] la_input[78] la_input[79] la_input[7] la_input[80] + la_input[81] la_input[82] la_input[83] la_input[84] la_input[85] la_input[86] la_input[87] + la_input[88] la_input[89] la_input[8] la_input[90] la_input[91] la_input[92] la_input[93] + la_input[94] la_input[95] la_input[96] la_input[97] la_input[98] la_input[99] la_input[9] + la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104] la_oenb[105] + la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110] la_oenb[111] + la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117] la_oenb[118] + la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123] la_oenb[124] + la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14] la_oenb[15] + la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20] la_oenb[21] + la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27] la_oenb[28] + la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33] la_oenb[34] + la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3] la_oenb[40] + la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46] la_oenb[47] + la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52] la_oenb[53] + la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59] la_oenb[5] + la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65] la_oenb[66] + la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71] la_oenb[72] + la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78] la_oenb[79] + la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84] la_oenb[85] + la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] la_oenb[91] + la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] la_oenb[98] + la_oenb[99] la_oenb[9] la_output[0] la_output[100] la_output[101] la_output[102] + la_output[103] la_output[104] la_output[105] la_output[106] la_output[107] la_output[108] + la_output[109] la_output[10] la_output[110] la_output[111] la_output[112] la_output[113] + la_output[114] la_output[115] la_output[116] la_output[117] la_output[118] la_output[119] + la_output[11] la_output[120] la_output[121] la_output[122] la_output[123] la_output[124] + la_output[125] la_output[126] la_output[127] la_output[12] la_output[13] la_output[14] + la_output[15] la_output[16] la_output[17] la_output[18] la_output[19] la_output[1] + la_output[20] la_output[21] la_output[22] la_output[23] la_output[24] la_output[25] + la_output[26] la_output[27] la_output[28] la_output[29] la_output[2] la_output[30] + la_output[31] la_output[32] la_output[33] la_output[34] la_output[35] la_output[36] + la_output[37] la_output[38] la_output[39] la_output[3] la_output[40] la_output[41] + la_output[42] la_output[43] la_output[44] la_output[45] la_output[46] la_output[47] + la_output[48] la_output[49] la_output[4] la_output[50] la_output[51] la_output[52] + la_output[53] la_output[54] la_output[55] la_output[56] la_output[57] la_output[58] + la_output[59] la_output[5] la_output[60] la_output[61] la_output[62] la_output[63] + la_output[64] la_output[65] la_output[66] la_output[67] la_output[68] la_output[69] + la_output[6] la_output[70] la_output[71] la_output[72] la_output[73] la_output[74] + la_output[75] la_output[76] la_output[77] la_output[78] la_output[79] la_output[7] + la_output[80] la_output[81] la_output[82] la_output[83] la_output[84] la_output[85] + la_output[86] la_output[87] la_output[88] la_output[89] la_output[8] la_output[90] + la_output[91] la_output[92] la_output[93] la_output[94] la_output[95] la_output[96] + la_output[97] la_output[98] la_output[99] la_output[9] mprj_ack_i mprj_adr_o[0] + mprj_adr_o[10] mprj_adr_o[11] mprj_adr_o[12] mprj_adr_o[13] mprj_adr_o[14] mprj_adr_o[15] + mprj_adr_o[16] mprj_adr_o[17] mprj_adr_o[18] mprj_adr_o[19] mprj_adr_o[1] mprj_adr_o[20] + mprj_adr_o[21] mprj_adr_o[22] mprj_adr_o[23] mprj_adr_o[24] mprj_adr_o[25] mprj_adr_o[26] + mprj_adr_o[27] mprj_adr_o[28] mprj_adr_o[29] mprj_adr_o[2] mprj_adr_o[30] mprj_adr_o[31] + mprj_adr_o[3] mprj_adr_o[4] mprj_adr_o[5] mprj_adr_o[6] mprj_adr_o[7] mprj_adr_o[8] + mprj_adr_o[9] mprj_cyc_o mprj_dat_i[0] mprj_dat_i[10] mprj_dat_i[11] mprj_dat_i[12] + mprj_dat_i[13] mprj_dat_i[14] mprj_dat_i[15] mprj_dat_i[16] mprj_dat_i[17] mprj_dat_i[18] + mprj_dat_i[19] mprj_dat_i[1] mprj_dat_i[20] mprj_dat_i[21] mprj_dat_i[22] mprj_dat_i[23] + mprj_dat_i[24] mprj_dat_i[25] mprj_dat_i[26] mprj_dat_i[27] mprj_dat_i[28] mprj_dat_i[29] + mprj_dat_i[2] mprj_dat_i[30] mprj_dat_i[31] mprj_dat_i[3] mprj_dat_i[4] mprj_dat_i[5] + mprj_dat_i[6] mprj_dat_i[7] mprj_dat_i[8] mprj_dat_i[9] mprj_dat_o[0] mprj_dat_o[10] + mprj_dat_o[11] mprj_dat_o[12] mprj_dat_o[13] mprj_dat_o[14] mprj_dat_o[15] mprj_dat_o[16] + mprj_dat_o[17] mprj_dat_o[18] mprj_dat_o[19] mprj_dat_o[1] mprj_dat_o[20] mprj_dat_o[21] + mprj_dat_o[22] mprj_dat_o[23] mprj_dat_o[24] mprj_dat_o[25] mprj_dat_o[26] mprj_dat_o[27] + mprj_dat_o[28] mprj_dat_o[29] mprj_dat_o[2] mprj_dat_o[30] mprj_dat_o[31] mprj_dat_o[3] + mprj_dat_o[4] mprj_dat_o[5] mprj_dat_o[6] mprj_dat_o[7] mprj_dat_o[8] mprj_dat_o[9] + mprj_sel_o[0] mprj_sel_o[1] mprj_sel_o[2] mprj_sel_o[3] mprj_stb_o mprj_wb_iena + mprj_we_o por_l_in por_l_out porb_h_in porb_h_out qspi_enabled resetn_in resetn_out + rstb_l_in rstb_l_out ser_rx ser_tx serial_clock_in serial_clock_out serial_data_2_in + serial_data_2_out serial_load_in serial_load_out serial_resetn_in serial_resetn_out + spi_csb spi_enabled spi_sck spi_sdi spi_sdo spi_sdoenb trap uart_enabled user_irq_ena[0] + user_irq_ena[1] user_irq_ena[2] VGND XFILLER_185_5582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_1948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_3157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30659__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_372_core_clk _30230_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_231_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18243__A0 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27490__S _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2964_A _18656_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25108__A2 _24543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31904__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20212__S _20218_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19440__C1 _28442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_3123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_65_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18869_ VGND VPWR _18869_/X _19357_/B _19367_/B1 _28347_/Q _18868_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_248_4591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_3077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15057__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_2441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2772_A wire2781/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_301_core_clk _30471_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17597__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16254__C1 wire918/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24316__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19991__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20900_ VGND VPWR _20902_/S _30248_/Q _29410_/Q _20900_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_58_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26856__A2 _19563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29951__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_3770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21880_ _21403_/B _21864_/X _21399_/X _21880_/Y _21403_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XFILLER_269_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14804__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_2045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23523__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20831_ VGND VPWR _20837_/S _20830_/Y _29347_/Q _29347_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19338__A3 _19337_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25304__A _31264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18617__S _18617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27222__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26069__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17349__A2 _31916_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27805__A1 _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23550_ VGND VPWR _23560_/S _30471_/Q _30041_/Q _30471_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21551__B _21551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20762_ VGND VPWR _20784_/S _24216_/A0 _29276_/Q _29276_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25023__B _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20353__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24619__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21043__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16021__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22501_ _22509_/C1 _22500_/X _22511_/A2 _17191_/X _30011_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_71_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23481_ VGND VPWR _23525_/S _28379_/Q _30427_/Q _23481_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_3755 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20693_ VGND VPWR _20695_/S _29209_/Q _27236_/A0 _29209_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16137__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14446__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24095__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1071_A _14566_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20167__B _20175_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30039__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25220_ _25595_/A _25219_/X _25264_/A2 hold116/A _31234_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_71_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22432_ VGND VPWR _30285_/Q _18666_/C _29981_/D _23354_/C _22432_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 Xwire709 VPWR VGND wire709/X wire710/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14583__A2 _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15780__A1 _29518_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20882__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18849__A2 _18848_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_3525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22663__A _29728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22645__A3 _22627_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15780__B2 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28086__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23842__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26135__A _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25151_ _31214_/Q _31213_/Q _31212_/Q _31211_/Q _24567_/C _25151_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA_max_length1528_A _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22363_ _29931_/D _22385_/B1 _30470_/Q hold454/A _22356_/B VGND VPWR _22362_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__29331__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25044__A1 _31165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18352__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3578_A _30866_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26241__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22382__B _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24102_ _24102_/X _24186_/A3 _19928_/B _28634_/Q _31112_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_255_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21314_ _21315_/B _21316_/A _21659_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__21279__A _21279_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25082_ _25687_/B1 _25081_/X _25082_/A2 _31184_/Q _31184_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_82_3422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25974__A _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22294_ VGND VPWR _23365_/S _29880_/Q _29139_/Q _29880_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24398__A3 _31000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20183__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30189__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3209 _14407_/X _22512_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_fanout796_A _24892_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4016 VPWR VGND wire4016/X _28714_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_69_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17907__D _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24033_ _30869_/D _24199_/B1 _24032_/X _24031_/X _24028_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 X_28910_ _28910_/Q _32350_/CLK _28910_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26789__B _27070_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4027 wire4028/X wire4027/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31434__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21245_ VGND VPWR _23226_/S _29707_/Q _18580_/A _29707_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold340 hold340/A hold340/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_47_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22802__B1 _30467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25693__B _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29890_ _29890_/Q _30900_/CLK _29890_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xhold351 hold351/A hold351/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19274__A2 _19273_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1503_A wire1506/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4049 VPWR VGND wire4049/X _28667_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_214_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold362 hold362/A hold362/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xfanout2519 VPWR VGND _20717_/S _20690_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold373 hold373/A hold373/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19813__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17285__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29481__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold384 hold384/A hold384/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_28841_ _28841_/Q _30866_/CLK _28841_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27741__A0 wire2248/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26544__A1 _24841_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21176_ VGND VPWR _21201_/S _29618_/Q _27236_/A0 _29618_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24004__C1 _24003_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold395 hold395/A hold395/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_5067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15296__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23358__A1 _30336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2614 _19518_/A _14252_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_80_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_4918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16493__C1 _15774_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15835__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2625 VPWR VGND wire2625/X _14215_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1829 VPWR VGND _27245_/A0 _18237_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_259_960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20127_ _20126_/A _23879_/C _20127_/C _20673_/B _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_189_3056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2636 VPWR VGND _19539_/B wire2636/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire3912_A wire3913/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout842 _20073_/A2 _20106_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28772_ _28772_/Q _32444_/CLK _28772_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19026__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16600__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2647 wire2648/X _19551_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_25984_ VGND VPWR _31507_/D _26015_/A _25983_/Y _19648_/A _26159_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_hold374_A hold374/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout864 _19715_/X _19772_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_265_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32600__A _32600_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21908__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1924 VPWR VGND _18983_/S wire1924/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_4678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout875 _25079_/A _25000_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_41_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31584__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27723_ VGND VPWR _27728_/S wire2242/X _32455_/Q _32455_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1935 VPWR VGND wire1935/X _18688_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_20058_ _20058_/Y _24955_/B wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_24935_ _24935_/Y _24935_/B _24947_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_189_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22030__B2 _22027_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15048__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1872_A _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17588__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1968 VPWR VGND _18982_/S wire1968/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_1818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26847__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1979 VPWR VGND _19267_/S _19090_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_27654_ VGND VPWR _27654_/S wire2234/A _32393_/Q _32393_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_93 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2044_A wire2044/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24866_ _26498_/A _24865_/Y _31078_/Q _24864_/Y _31078_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27413__B _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20592__A1 _27685_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input127_A la_input[59] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_2866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22838__A _22838_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_202 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16260__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26605_ _26605_/X _31848_/Q wire3452/X _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_265_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_213 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23817_ _23817_/X _24317_/A _31850_/Q _19710_/B _31882_/Q _24317_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_265_1531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_224 _17374_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27585_ _31382_/Q _27584_/Y _27582_/Y _27594_/B _27585_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14271__A1 _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24797_ _17475_/C _24795_/X _24796_/X _24809_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA_235 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_3996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18527__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_246 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23530__A1 _23529_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22333__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26029__B _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_257 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29324_ _29324_/Q _32014_/CLK _29324_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_19_2943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_2940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2211_A _25041_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14550_ _14544_/C _18553_/B _14544_/B _14544_/D _14550_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_26536_ _26537_/C _26536_/B _31752_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_268 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20344__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23748_ _23748_/B _23748_/Y _31771_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_205_4995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_3579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16548__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_279 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21541__B1 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_211_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16012__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29255_ _29255_/Q _30783_/CLK _29255_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14481_ _27678_/A _30219_/Q hold244/A _27598_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_26467_ _26467_/X _26463_/Y _26466_/X _26464_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_122_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23679_ _31524_/Q _31555_/Q _31049_/Q _23679_/Y _31048_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_4 XANTENNA__14356__A _14356_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25283__A1 wire3496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24086__A2 wire737/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15220__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3253_A wire3258/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28206_ _28206_/Q _30483_/CLK _28206_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16220_ wire996/X _16220_/X _16219_/X _16722_/C1 _29314_/Q _16722_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_123_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25418_ VGND VPWR _25424_/S _31357_/Q _31288_/Q _31288_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22097__A1 _30026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input92_A la_input[27] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_5314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29186_ _29186_/Q _32359_/CLK _29186_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14574__A2 wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20792__S _20796_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26398_ _26188_/A _26397_/Y _26386_/X _31686_/Q _31686_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_178_4195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_24_0_core_clk clkbuf_opt_24_1_core_clk/A clkbuf_5_23_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23833__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24990__C_N _24925_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16151_ _16151_/X _16151_/A1 _16148_/X _16150_/X _16839_/A1 _16146_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28137_ _28137_/Q _30276_/CLK _28137_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21844__A1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_4332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25349_ _31272_/D _25347_/X _26244_/A _25348_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_clkbuf_leaf_362_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3420_A wire3425/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2678_A wire2679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length841 VPWR VGND _20162_/A2 _20168_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_13_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31101__D _31101_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26378__A4 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15102_ VGND VPWR _15736_/S _29019_/Q _28987_/Q _15102_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28579__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23819__D _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15523__A1 _32067_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28068_ _28068_/Q _30432_/CLK _28068_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16082_ wire989/X _16082_/X _16081_/X _16825_/S _29526_/Q _16832_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__25884__A _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25586__A2 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29824__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15033_ _15614_/A2 _15624_/A1 _28785_/Q _15033_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_26_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19910_ VGND VPWR _20110_/B _20061_/C _25980_/A2 _19910_/X _27075_/C1 _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_27019_ VGND VPWR _27021_/B _31991_/Q _31989_/Q _31990_/Q _27020_/D VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_267_5101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14731__C1 _28809_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14091__A _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_50 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30030_ VGND VPWR _30030_/D _30030_/CLK _30030_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_24_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3754 VPWR VGND _22820_/B _22924_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_272_1557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_2523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19841_ VGND VPWR _26886_/B _19520_/B _19853_/A2 _19841_/X _27091_/C1 _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_133_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[16] _19587_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_3400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26535__A1 _31751_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25338__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3765 VPWR VGND wire3766/A wire3770/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30801__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19670__C1 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31927__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output346_A _13783_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26728__A_N _31779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold3_A hold3/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15826__A2 _16091_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3860 VPWR VGND wire3860/X _29857_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_max_length2009_A _21070_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_1833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19017__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29974__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19772_ _19772_/Y _19772_/B _19772_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_7_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3871 VPWR VGND wire3871/X _29853_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16984_ _16971_/A _30375_/Q _16984_/X _29773_/Q _30372_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_267_4466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24010__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3882 wire3883/X wire3882/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire4059_A wire4060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21128__S _21139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22021__A1 hold267/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25823__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18723_ _18715_/X _18722_/X wire1904/X _18717_/X _18723_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_94_4049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15935_ VGND VPWR wire970/X _29522_/Q _29556_/Q _15935_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_283_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output513_A wire4030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31981_ _31981_/Q _32319_/CLK _31981_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_283_259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18776__A1 wire3770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26299__B1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17579__A2 _17576_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_250_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15126__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19973__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24947__B _24947_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26838__A2 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30951__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30932_ _30932_/Q _32565_/CLK _30932_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18654_ VGND VPWR _18654_/S _18234_/B _28367_/Q _28367_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_285_1929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15866_ VGND VPWR _15866_/X _15866_/B _15866_/A wire920/X VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16787__B1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20583__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20967__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29204__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16251__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17605_ _17605_/A _17470_/B _17605_/X _17605_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_76_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14817_ _14817_/A2 _14817_/X _14816_/X _14822_/B1 _29309_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_55_2609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18585_ _21211_/B _18585_/X _23049_/A _22553_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 X_30863_ _30863_/Q _30863_/CLK wire722/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_92_3061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_149_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15797_ _15797_/X _29037_/Q _16150_/A2 _16832_/A3 wire933/X _15796_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_20_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18437__S _18456_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18528__A1 wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23521__A1 wire4145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19725__B1 _19724_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32602_ VPWR VGND _32602_/X _32602_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14801__A3 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17536_ _17536_/Y _17536_/B _17605_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_109_3282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20335__A1 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14748_ _14728_/X _29137_/D _14737_/X _15612_/B _14747_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__16539__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30794_ _30794_/Q _32436_/CLK _30794_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4540 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_780 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17200__A1 _30212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_791 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32533_ _32533_/Q _32535_/CLK _32533_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_207_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17467_ _26464_/A _26464_/C _17605_/B _17465_/Y _17466_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__29354__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14679_ VGND VPWR _14679_/X _14678_/X wire1202/A _14642_/S _14677_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_14_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24077__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15211__B1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16554__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26471__B1 _26456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17751__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19206_ _19205_/X _19047_/S _19358_/A2 _27976_/Q _19206_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_31_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22088__A1 wire1547/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16418_ _16841_/A2 _16418_/X _16417_/X _16722_/C1 _29535_/Q _16642_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_217_5523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32464_ _32464_/Q _32464_/CLK _32464_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15762__A1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17398_ _17441_/B2 _17398_/A2 _17398_/X _17432_/B2 input188/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19776__B _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23824__A2 wire1808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3271 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27015__A2 _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19137_ _19203_/A2 _27877_/Q wire1942/X _19137_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31415_ _31415_/Q _31522_/CLK _31415_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19268__S _19268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30331__CLK _30452_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16349_ VGND VPWR _16837_/S _28096_/Q _29052_/Q _16349_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_3293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31457__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32395_ _32395_/Q _32395_/CLK _32395_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25026__A1 _31156_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26223__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23729__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21099__A _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14317__A2 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25794__A _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15514__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31346_ _31346_/Q _32358_/CLK _31346_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_220_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19068_ VGND VPWR _19068_/X _19357_/B _19047_/S _28034_/Q _19067_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_9_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20207__S _20211_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_54 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_2738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput401 _13800_/Y la_oenb[23] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_4067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23588__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput412 _13883_/Y la_oenb[33] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27946__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18019_ _23269_/C _30415_/Q _18434_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__14868__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19792__A _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput423 _13873_/Y la_oenb[43] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_2309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30850__D _30850_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31277_ _31277_/Q _31282_/CLK _31277_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19256__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput434 _13863_/Y la_oenb[53] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_64_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_Di0[29] wire2737/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput445 wire3369/X la_oenb[63] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_275_1181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18464__A0 _28238_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput456 _13907_/Y la_oenb[73] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21030_ VGND VPWR _21030_/S _30030_/Q _29495_/Q _29495_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_3767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23518__S _23518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30228_ _30228_/Q _30492_/CLK _30228_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput467 _13897_/Y la_oenb[83] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27723__A0 _32455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25329__A2 _31267_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_2582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22260__B2 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput478 _13887_/Y la_oenb[93] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19661__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22422__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput489 _28651_/Q la_output[102] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23745__C hold196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_5233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16475__C1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15817__A2 _15810_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26121__C _31552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19008__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30159_ hold386/A _30667_/CLK _30159_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_168_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21546__B _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25018__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24001__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18201__A _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1209 VPWR VGND wire1209/X wire1210/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_clkbuf_leaf_188_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17019__A1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_1997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22981_ VGND VPWR _31395_/Q _22980_/X _22979_/X _22981_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_2231 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24552__A3 _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18767__A1 wire1914/X VGND VPWR VPWR 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NF_sky130_fd_sc_hd__diode_2 X_21863_ VGND VPWR _21842_/B _21425_/B _21481_/X _21864_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_120_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18347__S _18357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18519__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15450__B1 _15319_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_2288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23602_ _30765_/D _25881_/D _31089_/Q _26386_/A _24881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_20814_ VGND VPWR _20819_/S _29327_/Q _27703_/A1 _29327_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27370_ VGND VPWR _27375_/S _32223_/Q wire2801/X _32223_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20326__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24582_ _25703_/A _24582_/Y _27854_/C _31406_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XPHY_905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21794_ _21794_/X _21846_/A _18535_/C _21787_/X _14408_/B VGND VPWR _21793_/Y VGND + VPWR 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_23395_/B _23395_/A _23395_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_fanout1620_A _19787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32382__CLK _32402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_4332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_1489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25134_ _25137_/C _31202_/Q _31204_/Q _31203_/Q _25135_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__15505__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22346_ _22346_/Y _18241_/Y _18216_/X _22370_/A2 _22384_/B _18240_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_235_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26765__A1 wire3363/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25568__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30824__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_3017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23579__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_4387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3026_A _18389_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14713__C1 wire1135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28871__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25065_ _25065_/A _24051_/B1 _25065_/X _25065_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_216_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29942_ hold470/A _31914_/CLK _29942_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_156_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22277_ _29838_/Q _29840_/Q _29839_/Q _22278_/D _22277_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__29997__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold491_A hold491/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19247__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_2589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_294_core_clk _28275_/CLK clkbuf_opt_19_3_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17258__A1 wire3562/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18455__A0 _28229_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24016_ _24016_/X _20673_/D _30665_/Q wire3634/X _19926_/B VGND VPWR wire1262/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 Xwire3112 VPWR VGND _23354_/C wire3112/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21228_ VGND VPWR _22448_/C _18661_/A hold384/A _21228_/X _29690_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__17258__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27714__A0 _32447_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold170 hold170/A hold170/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_4720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3123 VPWR VGND _24609_/B wire3124/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29873_ _29873_/Q _32269_/CLK _29873_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_47_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold181 hold181/A hold181/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_130_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold192 hold192/A hold192/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire2400 VPWR VGND _19849_/A _20654_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xclkbuf_leaf_223_core_clk _31536_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xwire3145 VPWR VGND wire3145/X _21708_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_289_2029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_5329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15808__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2411 VPWR VGND wire2411/X _19859_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3156 VPWR VGND _21034_/S _21032_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1615 _24188_/A2 _24178_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_250_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28824_ _28824_/Q _29644_/CLK _28824_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30974__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2161_A _20042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2422 _23879_/B wire2422/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_134_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21159_ VGND VPWR _21172_/S _29602_/Q _27154_/A1 _29602_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_144_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28101__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2433 _27255_/S _27238_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xwire3178 _30318_/D _17914_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_98_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2259_A wire2259/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29227__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18207__A0 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1648 wire1651/A _26335_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_245_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_1894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2455 VPWR VGND _23582_/S _23593_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1659 _19640_/X _19641_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16481__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28755_ _28755_/Q _32355_/CLK _28755_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26966__C _26966_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1732 VPWR VGND wire1732/X wire1733/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25967_ VGND VPWR wire755/X _26781_/B _31499_/Q _31499_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_13981_ _28516_/Q _13981_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_60_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_3578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2488 VPWR VGND wire2488/X _20989_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18758__A1 _27859_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20014__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2499 VPWR VGND _20813_/S _20817_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19955__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27706_ VGND VPWR _27706_/S _27706_/A1 _32440_/Q _32440_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15720_ _15760_/A1 wire1741/X _15720_/X _15760_/B1 _28939_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_24918_ _25076_/C1 _24917_/Y _24955_/A _31103_/Q _31103_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_3949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_4964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_4461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20565__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2426_A wire2427/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_2949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16769__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30204__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28686_ _28686_/Q _31873_/CLK _28686_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20787__S _20788_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25898_ VGND VPWR _31466_/D _25903_/S _25897_/X _19660_/A _25745_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_280_229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1798 _29861_/D _17389_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_199_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17430__A1 _30955_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21472__A _21653_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15651_ wire1072/X wire702/A _15650_/X _15641_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 X_27637_ _32379_/D _27638_/S wire3399/X _19660_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__26150__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28251__CLK _29697_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24849_ _24856_/C _31069_/D _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_205_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29377__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23503__A1 _28390_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19707__B1 _19706_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17161__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16784__A3 _16784_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14602_ _14648_/A _14648_/C _29585_/Q _14602_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_265_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_3061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18370_ VGND VPWR _18399_/S _23272_/A1 _28147_/Q _28147_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_180_4096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20317__A1 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27568_ _25643_/C _32258_/Q _27568_/X _25643_/B _32250_/Q _32266_/Q _32242_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_15582_ _15582_/X _29482_/Q _15581_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_205_4781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29307_ _29307_/Q _32307_/CLK _29307_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17321_ VGND VPWR _17321_/X wire2040/X _17319_/X _17302_/A _17320_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26048__A3 _31531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14533_ _29909_/Q _23348_/B _27678_/A _29908_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_4 XANTENNA__20519__C _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26519_ VGND VPWR _17504_/Y _26519_/X _26539_/B _14059_/Y _14060_/Y _26516_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_141_2612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30354__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30935__D _30935_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_2675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2795_A _27503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17194__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24059__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27499_ VGND VPWR _27506_/S _27692_/A1 _32314_/Q _32314_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_89_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16536__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26599__A4 _23748_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17252_ _30768_/Q _30769_/Q _17252_/Y _30803_/Q _30770_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_122_2033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29238_ _29238_/Q _32127_/CLK _29238_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14464_ _14455_/Y _14464_/Y _14463_/Y _14460_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__14547__A2 _14442_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23806__A2 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16203_ VGND VPWR _16203_/X _16722_/C1 wire1055/X _16202_/X _16201_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27969__CLK _31158_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19088__S _19088_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21817__A1 hold289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_2418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29169_ _29169_/Q _32113_/CLK _29169_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17183_ VGND VPWR _17183_/X _17183_/B _17183_/A _17220_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_100_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14395_ _26539_/A _26509_/C _17424_/C _14399_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_234_4410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25110__C _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26205__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27548__A3 _32240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19340__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31200_ _31200_/Q _32554_/CLK _31200_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_273_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17497__A1 _31614_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16134_ _16129_/X wire901/X _16449_/B1 _16133_/X _16134_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_154_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25818__S _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32180_ _32180_/Q _32537_/CLK _32180_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22490__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21293__A2 _21288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2424 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31131_ VGND VPWR _31131_/D _32529_/CLK _31131_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_152_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16065_ VGND VPWR _16065_/X _16825_/S wire1048/X _16064_/X _16063_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_6_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_3021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23846__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4176_A input42/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_2066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18446__A0 _28220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15016_ _15605_/A2 _15016_/X _15015_/X _15640_/A1 _29219_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_135_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3959 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3540 VPWR VGND wire3541/A _31022_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22242__A1 hold260/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31062_ _31062_/Q _31548_/CLK _31062_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25119__A _31199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3551 VPWR VGND _17432_/B2 _30997_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output630_A _24594_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_4831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20253__A0 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30013_ _30013_/Q _30456_/CLK _30013_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_282_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23990__A1 wire4124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32105__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19824_ _19823_/X _28564_/Q _28564_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_113_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2850 VPWR VGND _21677_/B _21506_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire1261_A _24025_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23990__B2 wire4013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_2668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24958__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_4848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3690 VPWR VGND wire3690/X _30362_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25192__B1 _24543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16472__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2495_A _20921_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19755_ _25904_/A _19754_/Y _19772_/A _28534_/Q _28534_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_250_1674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16967_ _16967_/X _16967_/A1 _16964_/X _16966_/X wire911/X _16962_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_143_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25780__C _31417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18749__A1 wire4156/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16209__C1 wire901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_3_6_1_core_clk clkbuf_3_6_2_core_clk/A clkbuf_3_6_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_59_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18706_ _18706_/Y _18705_/Y wire2275/X _18703_/Y _18702_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XFILLER_78_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15918_ wire1004/X wire1476/X _28407_/Q _15918_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_280_4441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20556__A1 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31964_ VGND VPWR _31964_/D _32421_/CLK _31964_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19686_ _27053_/B _27053_/A _19686_/Y _20100_/B _20061_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__27053__B _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18213__A3 _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20697__S _20708_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16898_ VGND VPWR _16918_/S _29548_/Q _29582_/Q _16898_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_285_1737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_4534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32255__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18675__B _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16224__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17421__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21382__A _30465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24396__C _31000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18637_ VGND VPWR _18649_/S wire3878/X _28350_/Q _28350_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17421__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_5014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30915_ _30915_/Q _32329_/CLK _30915_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15849_ wire1533/X wire3276/X _29166_/Q _15849_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14695__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19961__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14235__A1 _31285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2470_A wire2478/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18167__S _18222_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31895_ _31895_/Q _32582_/CLK _31895_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18234__C_N _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_98_core_clk _32307_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24298__A2 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15432__B1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14235__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26892__B _26892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20308__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30846_ _30846_/Q _32036_/CLK _30846_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18568_ _22620_/A _20982_/B _20914_/C _18568_/X _22620_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_244_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28744__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_27_core_clk _32467_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_244_2168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19174__A1 _27975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2927_A _20407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17519_ _31758_/Q _17518_/Y _17517_/X _26510_/B _26530_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__17185__A0 _17184_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19787__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1895_A wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30777_ _30777_/Q _32422_/CLK _30777_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25247__A1 _29864_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18499_ VGND VPWR _18499_/S _18499_/A1 _28272_/Q _28272_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_124_3588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25247__B2 hold102/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16527__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18921__A1 _28283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17724__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire881_A wire881/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20530_ VGND VPWR _20545_/S _29047_/Q _27689_/A1 _29047_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32516_ _32516_/Q _32545_/CLK _32516_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_5088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire979_A wire979/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25301__B _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26995__A1 _31982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30847__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24455__C1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16932__B1 wire902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21808__A1 hold307/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32447_ _32447_/Q _32547_/CLK _32447_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20461_ VGND VPWR _20473_/S _28980_/Q _27143_/A1 _28980_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28894__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2902_A _20552_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22200_ _22200_/X _29827_/Q _29829_/Q _29828_/Q _22200_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_179_2387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23180_ _23180_/B wire3739/X _23180_/A _23180_/X _29733_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__22481__A1 _17112_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18685__B1 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26747__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20392_ VGND VPWR _20410_/S _24216_/A0 _28914_/Q _28914_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24207__C1 _24206_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32378_ _32378_/Q _32390_/CLK _32378_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1718 _23385_/S _23388_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_174_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_1216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_3599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14443__B _30424_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1729 _23393_/A _21285_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20492__A0 _29010_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15499__B1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22131_ VGND VPWR _22131_/X wire2284/X _22092_/B _30095_/Q _22130_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16696__C1 wire1450/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_3359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31329_ _31329_/Q _32562_/CLK _31329_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30997__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_2554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23756__B _26607_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput220 _14218_/Y flash_csb VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18630__S _18657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3276_A wire3276/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1034_A wire1043/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput231 _14040_/Y la_iena[100] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18437__A0 _28211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput242 _14030_/Y la_iena[110] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23248__S _23248_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21036__A2 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22233__A1 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput253 _14020_/Y la_iena[120] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22062_ _22061_/S hold486/A _22063_/B _22071_/C _21610_/B _21668_/A hold395/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__25029__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22152__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14710__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput264 _13776_/Y la_iena[15] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20244__A0 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput275 _13766_/Y la_iena[25] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput286 _13977_/Y la_iena[35] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21013_ VGND VPWR _21013_/S _29478_/Q _27509_/A1 _29478_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xoutput297 _13967_/Y la_iena[45] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire3443_A _31949_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26870_ _26870_/Y _26870_/B wire752/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_246_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25971__B _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1201_A _14610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20795__A1 _29308_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27172__B2 wire2428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17473__C _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30227__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2322 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25821_ VGND VPWR _25825_/S _25820_/X _31434_/Q _31434_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_74_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23772__A _31793_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28274__CLK _30198_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18020__A_N _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23733__A1 _31570_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15671__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24587__B _24588_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16089__C _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28540_ _28540_/Q _31351_/CLK _28540_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_129_3422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25752_ _25752_/C _25752_/Y _26153_/A _31412_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_261_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21744__A0 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22964_ VGND VPWR _22968_/S _30476_/Q hold478/A _30141_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3708_A _30336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_1323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21987__A2_N _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_5368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18585__B _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_4180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25041__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16215__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24703_ _24703_/B _24704_/B _24706_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_255_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26132__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21915_ _21915_/Y _21942_/S _21915_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_28471_ VGND VPWR _28471_/D _31892_/CLK _28471_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22819__C _23130_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30377__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25683_ VGND VPWR _27395_/B _25673_/X _27597_/B2 _25683_/X _25682_/X _31390_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20400__S _20418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14226__A1 _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18077__S _18077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26505__D_N _31743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22895_ _22895_/Y _22895_/B _22895_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__24289__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14226__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31622__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27422_ _32269_/D _21211_/B _32269_/Q _18585_/X _23049_/A _23057_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_145_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23497__A0 _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24634_ _24634_/X _17895_/B _31551_/Q _31545_/Q _24389_/A VGND VPWR _24633_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_38_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21846_ _21846_/B _21846_/Y _21846_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_231_627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_1692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19165__A1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27353_ VGND VPWR hold144/A _32208_/Q _27417_/A0 _32208_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24565_ _24565_/B _25159_/C _31211_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XPHY_735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30755__D _30755_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21777_ _21777_/B _21777_/Y _21778_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__25238__A1 hold109/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1835_A wire1837/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18912__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_4711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26304_ _26303_/Y _27117_/C1 _31640_/Q _26331_/B _31640_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26307__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23516_ VGND VPWR _23516_/S _23515_/X _31962_/Q _30444_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15187__C1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_3477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20728_ VGND VPWR _20743_/S wire1833/X _29243_/Q _29243_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14529__A2 _14309_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15726__A1 _15706_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27284_ hold143/A _27284_/B _27292_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XFILLER_240_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20180__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24496_ _25416_/B _24576_/B _24496_/Y _24543_/B _31224_/Q _31223_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311oi_2 XPHY_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31772__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_5604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_88_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29023_ _29023_/Q _32355_/CLK _29023_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_205_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22554__C _22554_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26235_ _31606_/Q _24820_/B _26236_/B _32296_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_218_4438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23447_ wire3264/X _23447_/X wire3996/X _29817_/Q _22141_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_10_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20659_ _31189_/Q wire1301/X _20653_/X _31188_/Q _20660_/A wire1353/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_84_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input194_A mprj_dat_i[28] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24461__A2 wire798/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2920 VPWR VGND _20412_/S _20408_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17010__A _17010_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_5377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_3786 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3676 VPWR VGND _23491_/A0 _30432_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22472__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21275__A2 _20837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14180_ _14180_/Y _19573_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_16 XANTENNA__18676__B1 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26166_ _31571_/D _31571_/Q _26165_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 Xmax_length3687 VPWR VGND _22512_/A1 _16970_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23378_ VGND VPWR _23385_/S _30356_/Q _29674_/Q _30356_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_7_4505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3698 VPWR VGND _21465_/A _30343_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_99_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25865__C _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20483__A0 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14353__B _14353_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26323__A _26323_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_404_core_clk _29705_/CLK clkbuf_opt_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xmax_length2964 VPWR VGND _18657_/S _18656_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25117_ _25122_/D _25117_/Y _31198_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__31002__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22329_ _29914_/D wire3160/A _14412_/A _29914_/Q _22338_/B VGND VPWR _22328_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__32128__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16151__A1 _16151_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26097_ VGND VPWR _31544_/Q _26090_/C _31543_/Q _26097_/X _31545_/Q _31542_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_wire2376_A _14180_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18691__A3 _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22224__A1 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25048_ _25810_/C _25047_/X _25086_/A2 _31167_/Q _31167_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29925_ hold385/A _31916_/CLK _29925_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_input55_A la_input[109] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22224__B2 _30108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14701__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_3161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20371__A _24604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20235__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18979__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28617__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23972__A1 _28462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_5525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17870_ _31737_/Q _17870_/A2 _17870_/X _31736_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__27163__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29856_ _29856_/Q _32575_/CLK _29856_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__17100__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25881__B _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20786__A1 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22997__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1423 _27704_/A1 _18308_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_229_4523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2230 _26783_/B _19546_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_278_384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31152__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1434 VPWR VGND _27698_/A1 _18278_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_clkbuf_3_1_0_core_clk_A clkbuf_3_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32278__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2241 VPWR VGND _25027_/B wire2242/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_278_395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25174__B1 _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28807_ _28807_/Q _32398_/CLK _28807_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16821_ _16816_/X wire892/A _16821_/A1 _16820_/X _16821_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_169_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3777_A _18535_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26696__C _31799_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1456 wire1459/X _16805_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_112_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25713__A2 _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_1934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2263 VPWR VGND _27120_/A _19648_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29787_ hold298/A _29788_/CLK _29787_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1467 wire1469/X _16944_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_264_4447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26999_ _26999_/C _31983_/D _26999_/A _26999_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_8_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1478 wire1486/X _16817_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_171_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23724__A1 _31567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24497__B _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19540_ VGND VPWR wire2638/X _26866_/A1 _19632_/A _19540_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_268_3893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_4136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24921__B1 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2296 wire2296/A _26974_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16752_ VGND VPWR _16929_/S _29481_/Q _32135_/Q _16752_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_247_771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28738_ _28738_/Q _30630_/CLK _28738_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__32210__D hold145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21735__A0 _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20538__A1 _29055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13964_ _28533_/Q _13964_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_267_1412 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_3465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1573 VPWR VGND wire1573/X wire1573/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__28767__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26993__A _31981_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_1940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16206__A2 _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17403__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15703_ _15751_/A1 _16910_/A2 _15703_/X _15727_/A2 _29269_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_max_length3944_A _22580_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17403__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19471_ _19471_/Y _19471_/A hold425/A _31345_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_21_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20310__S _20327_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28669_ VGND VPWR _28669_/D _31436_/CLK _28669_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_245_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16683_ _16683_/X _29263_/Q _16934_/A2 _16944_/B2 _16856_/A2 _16682_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_223_4133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13895_ _28602_/Q _13895_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_fanout3752_A _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_2482 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_4718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30700_ hold294/A _32546_/CLK input93/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18422_ VGND VPWR _18423_/S _28197_/Q wire3845/X _28197_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_2335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23488__A0 _31948_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15634_ wire1556/X _15634_/X _29097_/Q wire1489/X wire3246/X _15644_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_164_3880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22448__D _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14768__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15965__A1 _32417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31680_ _31680_/Q _31689_/CLK _31680_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_201_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19156__A1 _19155_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30631_ _30631_/Q _31796_/CLK hold381/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18353_ VGND VPWR _18353_/S wire3851/X _28131_/Q _28131_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_5233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_4491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15565_ _16781_/A2 wire3303/A _29191_/Q _15565_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_258_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_3886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17167__B1 _21966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25229__A1 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_1044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22160__B1 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18903__A1 wire1771/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26426__B1 _31695_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25229__B2 hold133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17304_ wire3562/A _31909_/Q _17308_/B _17446_/B2 wire2126/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_15_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_4475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14516_ VPWR VGND _14516_/X _29454_/Q _30444_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_222_1017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15717__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30562_ hold183/A _30580_/CLK _30562_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18284_ VGND VPWR _18284_/S _28101_/Q _27699_/A1 _28101_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_3818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26977__A1 _31974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output580_A _31097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15496_ _15721_/A2 _15496_/X _15495_/X _15692_/S _32325_/Q wire1515/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_32_3471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22237__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_2584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output678_A wire3120/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21141__S _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32301_ _32301_/Q _32548_/CLK _32301_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17235_ _17235_/X _29773_/Q _30017_/Q _29448_/Q _22512_/A2 VGND VPWR _17234_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_239_2204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14447_ _14447_/X _30432_/Q _30433_/Q _20914_/A _14446_/Y _20909_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_193_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16390__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15193__A2 wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30493_ _30493_/Q _32432_/CLK _30493_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19459__A2 _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14544__A _14544_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28147__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24960__B _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32232_ _32232_/Q _32513_/CLK _32232_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22463__A1 _17038_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3837 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17166_ _30396_/Q _17234_/A1 _17165_/X _17166_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26729__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20980__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14378_ _14383_/C _14388_/A _24424_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__14940__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire881 VPWR VGND wire881/X wire881/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_67_2833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25775__C _27227_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20474__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_145_core_clk _32372_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xwire892 VPWR VGND wire892/X wire892/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16117_ _16088_/X _29661_/D wire890/X _16098_/X _16116_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_256_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21671__C1 _21655_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32163_ _32163_/Q _32536_/CLK _32163_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16142__A1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3712 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17097_ VGND VPWR wire886/X _17096_/X _17095_/X _30387_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18450__S _18456_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1476_A wire1477/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24204__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_4926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_2719 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18419__A0 _23287_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31114_ _31114_/Q _32168_/CLK _31114_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27763__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16048_ VGND VPWR _16837_/S _29462_/Q _32116_/Q _16048_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16693__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15350__C1 _29573_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19616__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22215__B2 _30042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23412__B1 _23415_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32094_ _32094_/Q _32535_/CLK hold397/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_6_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25952__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28297__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20226__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23963__A1 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XANTENNA__20777__A1 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17293__C _17293_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24688__A _31471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16445__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17642__A1 _31717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire727_A wire728/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19807_ wire881/X _19786_/B _20654_/D _19807_/X _27068_/B VPWR VGND VGND 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_29031_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31025__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14916__C1 wire1104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24281_ VGND VPWR _24281_/X _31688_/Q _24281_/A _24281_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__15184__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16381__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3393_A wire3394/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21493_ _21499_/C _21549_/B _30472_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_200_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2774 VGND VPWR VGND VPWR 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NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28454_ _28454_/Q _32552_/CLK _28454_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_207_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2124_A wire2125/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25666_ _25668_/B _31388_/Q _27413_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__15947__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26120__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_1028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input207_A porb_h_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22878_ _22878_/B _22878_/Y _22910_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_252_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19138__A1 _27909_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22846__A _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_3433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27405_ VGND VPWR _27412_/S _32253_/Q _27266_/X _32253_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_3324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_3490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24131__B2 _30707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24617_ _24604_/X _24603_/Y _24593_/X _24592_/Y _24617_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_227_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21829_ _22061_/S hold279/A _21830_/A _21999_/S1 _21410_/A _21436_/B hold298/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XPHY_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17149__B1 _29434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28385_ _28385_/Q _32108_/CLK _28385_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25597_ _25597_/X _25582_/X hold104/A hold101/A _24493_/X VGND VPWR _25596_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_279_3230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19689__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22142__B1 _22141_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19858__C _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3166_A _23040_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18897__A0 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15350_ _15350_/A1 _16646_/A2 _15350_/X _15350_/B1 _29573_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_242_1949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27336_ VGND VPWR _27339_/S _32193_/Q _27274_/X _32193_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22693__A1 _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24548_ _31297_/Q _24548_/X _31296_/Q _31298_/Q _24544_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XPHY_1120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23890__B1 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14301_ _14245_/B _17895_/B _14300_/X _31277_/Q wire3232/X hold353/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_276_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15281_ VGND VPWR _15281_/X _15278_/X _15611_/A1 _15610_/B1 _15280_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27267_ VGND VPWR _27281_/S _32141_/Q _27266_/X _32141_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15175__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24479_ _31036_/D _24478_/Y wire2253/X _24467_/X _25109_/B _24475_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_235_5250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_5592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16372__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17378__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3333_A wire3362/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24780__B _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17020_ VGND VPWR _23348_/C _30189_/Q _30378_/Q _17020_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_5152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29006_ _29006_/Q _32117_/CLK _29006_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_190_4427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18649__A0 _28362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14232_ _13829_/A _14232_/Y _14231_/X _31286_/Q wire3232/X _29516_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 X_26218_ VPWR VGND _31597_/D _26218_/B _26218_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__21248__A2 _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_2284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31518__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14922__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27198_ _27198_/Y _27198_/B hold413/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_257_3594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20456__A0 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_2219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29565__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14163_ VGND VPWR hold75/X hold128/X _14167_/S _14163_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__16124__A1 _16124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26149_ VGND VPWR _14189_/A _19555_/A _26159_/B _26149_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_235_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26187__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17321__B1 _17319_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2783 VPWR VGND _27620_/S _27621_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2758_A _24284_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2794 VPWR VGND _27515_/S _27507_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22460__A4 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24198__A1 _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20032__C_N _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25395__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17872__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18971_ _28253_/Q _18971_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14094_ _14094_/Y _21853_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XFILLER_80_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17872__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20305__S _20323_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20208__A0 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output259_A _14014_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15883__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23945__A1 _31129_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22748__A2 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30542__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17922_ VGND VPWR _17949_/S wire3903/X _27860_/Q _27860_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29908_ _29908_/Q _30330_/CLK hold424/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31668__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27136__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20759__A1 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19613__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26500__B _26508_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_4943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25147__B1 _24561_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1231 VPWR VGND _26936_/B1 wire1235/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21925__A _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17853_ _31653_/Q _14067_/A _17853_/X _17879_/B _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xfanout1242 VPWR VGND _26386_/C wire1244/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29839_ _29839_/Q _30475_/CLK _29839_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_40_3762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_2988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14438__A1 _29385_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23843__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_3267 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2060 VPWR VGND wire2060/X wire2060/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25698__A1 _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23158__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2071 VPWR VGND wire2071/X wire2071/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16804_ _16387_/A _16387_/C _28800_/Q _16804_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17614__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2082 wire2083/X wire2082/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4041_A _28670_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1286 VPWR VGND wire1289/A _20658_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21644__B _21645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2093 wire2094/X wire2093/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_17784_ _31647_/Q _14067_/A _17784_/X _14255_/Y _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xfanout1297 VPWR VGND wire1299/A wire1303/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14996_ VGND VPWR _15750_/S _28784_/Q _28816_/Q _14996_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_229_4397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4139_A _28454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30692__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23173__A2 _23171_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21136__S _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31801_ _31801_/Q _31801_/CLK _31801_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_282_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19523_ VGND VPWR wire2625/X _26866_/A1 _19632_/A _19523_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_127_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_4037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_3565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24370__B2 _32000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16735_ VGND VPWR _16961_/S _28429_/Q _29094_/Q _16735_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_165_2217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_4580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19916__A3 _26323_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1392 VPWR VGND _26017_/A wire1392/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13947_ _28550_/Q _13947_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_53_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17388__B1 wire2025/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14539__A _14539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22381__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_2403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15134__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24955__B _24955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31732_ _31732_/Q _31738_/CLK _31732_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19454_ _28445_/Q _19447_/X _19454_/Y hold479/A _31342_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_160_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15938__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16666_ _16817_/A2 _16817_/A1 _32436_/Q _16666_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_225_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27331__B _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13878_ _28619_/Q _13878_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__20975__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_4597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16060__B1 _16500_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26228__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24122__A1 _28540_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18405_ VGND VPWR _18407_/S _28180_/Q hold475/A _28180_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24122__B2 _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15617_ VGND VPWR _15621_/A2 _29235_/Q _15616_/X _15617_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_201_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25132__A _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31048__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19385_ _27485_/D _27678_/C hold244/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_182_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31663_ _31663_/Q _32319_/CLK _31663_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14973__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16597_ _16592_/X wire891/X wire911/X _16596_/X _16597_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18445__S _18456_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_397_core_clk _30330_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17027__C_N _29879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_1874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29095__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18336_ VGND VPWR _18359_/S wire3912/X _28114_/Q _28114_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_89_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30614_ hold310/A _31873_/CLK _30614_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27758__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15548_ VGND VPWR _15548_/X _15545_/X _15547_/X _15705_/A1 _15749_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18888__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31594_ _31594_/Q _32277_/CLK _31594_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23881__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20695__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_326_core_clk _30384_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_64_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18267_ _18267_/B _18267_/Y _18332_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_30545_ _30545_/Q _32016_/CLK hold452/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_236_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_5069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16363__A1 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1593_A _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15479_ _15474_/X _15470_/Y _15745_/A1 _15478_/X _15479_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_89_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16363__B2 _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29908__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24425__A2 _24424_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24690__B _31471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30072__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31198__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17218_ _17234_/A1 _30403_/Q _17218_/X _17234_/B2 _29443_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_151_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold63_A hk_dat_i[20] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14913__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18198_ _18197_/X wire3174/A _29744_/Q _22332_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__19784__B _19784_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30476_ VGND VPWR _30476_/D _30477_/CLK _30476_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xclkbuf_5_27_1_core_clk clkbuf_5_27_1_core_clk/X clkbuf_5_27_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_239_1311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32443__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20447__A0 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32215_ _32215_/Q _32544_/CLK _32215_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19276__S _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17585__A _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17149_ _17234_/A1 _30394_/Q _17149_/X _17234_/B2 _29434_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_274_1224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_2813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18180__S _18222_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26178__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17312__B1 wire2029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19852__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26898__A wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27493__S _27503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16666__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25386__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20160_ _25567_/B _20159_/Y _20192_/A2 _28724_/Q _28724_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32146_ _32146_/Q _32531_/CLK _32146_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15323__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28932__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20215__S _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_4699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14677__A1 _29458_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26350__D_N _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15874__B1 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23936__A1 wire4092/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23936__B2 _31160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19065__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20091_ _26694_/C _20090_/Y _20122_/A _28691_/Q _28691_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32077_ _32077_/Q _32078_/CLK _32077_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_286_5181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27127__B2 _31491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16418__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25138__B1 _31205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23526__S _23526_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31028_ _31028_/Q _31548_/CLK _31028_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_285_641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18812__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length942_A _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_1607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23753__C _23755_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25689__A1 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17091__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3141_A _23526_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23850_ _23850_/X _23865_/C wire1397/X _31893_/Q _31861_/Q wire1605/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_269_2775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_3790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_42_core_clk _32529_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_247_4497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19368__A1 _19368_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23164__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24361__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22801_ VGND VPWR _22801_/X _22820_/B _29891_/Q _22820_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_32_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18566__D _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23781_ VGND VPWR _23781_/X _31870_/Q _23805_/A _23805_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_91_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17379__B1 _17248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_609 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20993_ VGND VPWR _21018_/S _29458_/Q _27489_/A1 _29458_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22372__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26638__B1 wire3428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25520_ _19428_/X _31339_/D _25519_/Y _25513_/A _31339_/Q _31338_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__18040__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22732_ _22729_/A _22725_/Y _22728_/Y _22741_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_59_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_3327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20885__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20922__A1 hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16051__B1 _16500_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24113__A1 _30647_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23261__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15979__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25451_ _19474_/B _25454_/A _31305_/D _25450_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27850__A2 _25807_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22663_ _22663_/Y _22663_/B _29728_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_0_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2066 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18355__S _18355_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22124__B1 _22123_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_2768 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25861__A1 _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24664__A2 _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1366_A _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24402_ _24402_/X _31002_/Q _31004_/Q _31003_/Q _24401_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_55_2099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21614_ _21613_/X _21612_/Y _22067_/A _21698_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28170_ _28170_/Q _30245_/CLK _28170_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_opt_1_0_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22675__A1 wire3661/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18879__B1 _19069_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25382_ _31279_/D _25380_/X _26242_/A _25379_/X _25381_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__30415__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17479__B _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22594_ _22594_/X _22594_/S wire3699/X _30358_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__21332__D1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_5587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24881__A _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19540__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27121_ _26950_/C _27120_/X _26949_/X _32038_/Q _32038_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_max_length1725_A _23376_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24333_ _24332_/X _24357_/B1 wire1672/X _24353_/A1 _30969_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28462__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21545_ _21676_/D _21599_/A _21903_/B _21545_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_11_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15157__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29588__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20150__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25074__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24416__A2 _24420_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27052_ _32004_/D _32004_/Q _26184_/A _27051_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_24264_ _24264_/X _26333_/B hold481/A _31580_/Q _26335_/B VGND VPWR _24263_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_81_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23624__B1 wire1292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_4138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21476_ _21476_/Y _21476_/B _21480_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14904__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19694__B _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24967__A3 _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24821__C1 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_4149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20914__A _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20438__A0 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout993_A wire996/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26003_ VGND VPWR _19566_/B _19551_/A _26014_/A2 _26003_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_270_3013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23215_ VGND VPWR _23223_/S _30207_/Q hold423/X _30207_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30565__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17495__A _26446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20427_ VGND VPWR _20444_/S _28947_/Q wire2002/A _28947_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3942_A _22586_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18090__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27366__A1 _32220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1700_A wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26169__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24195_ _24195_/X _24205_/B1 _30631_/Q wire3642/X _19926_/B VGND VPWR wire1246/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_189_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17303__B1 wire4179/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31810__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32603__A _32603_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17854__A1 _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23146_ _23191_/C1 _23191_/B1 _23190_/B _23302_/C _23146_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_133_3429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21650__A2 _21651_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26574__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17854__B2 _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20358_ VGND VPWR _20359_/S _27708_/A1 _28898_/Q _28898_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25916__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14668__A1 _30889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23927__A1 _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15219__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1008 _20505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27118__A1 _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23077_ hold307/A wire3171/X _23077_/X _30093_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_1019 _17027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27954_ _27954_/Q _30198_/CLK _27954_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_2_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2074_A wire2074/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20289_ VGND VPWR _20292_/S _27512_/A1 _28831_/Q _28831_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input157_A la_input[86] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_3202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_1948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16409__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17606__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26905_ _26904_/X _26902_/B _26905_/Y _31934_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_22028_ VGND VPWR _22028_/S _21710_/X _21812_/B _22028_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_1_989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27885_ _27885_/Q _31914_/CLK _27885_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__31960__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold30 hk_dat_i[28] hold30/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xhold41 hold41/A hold41/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_185_3828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29624_ _29624_/Q _32342_/CLK _29624_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold52 hk_dat_i[17] hold52/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_14850_ VGND VPWR _15623_/S _28411_/Q _29076_/Q _14850_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26836_ _26893_/C1 _26835_/Y _26835_/A _31868_/Q _31868_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_152_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21464__B _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold63 hk_dat_i[20] hold63/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26341__A2 _26347_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold74 hold74/A hold74/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_264_847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2339_A wire2340/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19359__A1 _19356_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold85 hk_dat_i[7] hold85/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_92_4147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13801_ _31145_/Q _13801_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xhold96 hold96/A hold96/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26974__C _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24352__B2 _31991_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29555_ _29555_/Q _32117_/CLK _29555_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14781_ _14780_/X _14778_/X wire1214/X _14781_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_5_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26767_ _26687_/A wire1299/A _14216_/A _19558_/A _26687_/D _26768_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XFILLER_166_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23979_ wire4081/X _25022_/B _23978_/X _31164_/Q _23979_/X _19995_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_229_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14359__A _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14840__A1 _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22363__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_92_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14840__B2 _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32316__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16520_ _15770_/C wire1733/A _16520_/X _16828_/A2 _29184_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__18031__A1 wire3877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28506_ _28506_/Q _31871_/CLK _28506_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25718_ VGND VPWR _31402_/D _25718_/B _25718_/A _25718_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_129_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_2111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29486_ _29486_/Q _32291_/CLK _29486_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_3667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20913__A1 _29385_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20795__S _20817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_16_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26698_ _26698_/Y _31764_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_74_3880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24104__A1 _31176_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17385__A3 wire3569/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24104__B2 _31144_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24494__C _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16451_ _16423_/X _29670_/D wire894/A _16432_/X _16450_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 X_28437_ _28437_/Q _31966_/CLK hold286/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27841__A2 _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_3571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25649_ _25648_/A _25793_/S _25750_/B _27280_/D _27413_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XFILLER_122_3812 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16593__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15396__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3450_A wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22115__B1 _22114_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28805__CLK _32402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17790__B1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25852__A1 _31446_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30095__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15402_ _15402_/X _15730_/C1 _15395_/X _15397_/X _15401_/X wire1084/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_16_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19170_ _28263_/Q _19170_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__22666__A1 _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21469__A2 _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16382_ _16382_/X _32125_/Q _16818_/A2 _16642_/B2 _16722_/C1 _16381_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28368_ _28368_/Q _30276_/CLK _28368_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_4658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_5624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17389__B _17389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20096__A _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31340__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32466__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27054__B1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18121_ VGND VPWR _18152_/S wire3917/X _28049_/Q _28049_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_107_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3907_A wire3908/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27319_ VGND VPWR _27321_/S _32178_/Q _27276_/X _32178_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15333_ VGND VPWR _15333_/X _29089_/Q _15500_/A _15707_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_220_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15148__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_3509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14094__A _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30908__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28299_ _28299_/Q _30225_/CLK _28299_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_29_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20141__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17542__B1 _24793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_4535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17456__A_N _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30330_ _30330_/Q _30330_/CLK _30330_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18052_ VGND VPWR _18052_/S _18625_/A1 _27984_/Q _27984_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22418__A1 _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15264_ _16956_/A2 wire3302/X _32359_/Q _15264_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16896__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15699__A3 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20429__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25080__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output376_A _13928_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17003_ _29688_/Q hold384/A _17003_/X _16971_/A _30377_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_254_4980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14215_ _14214_/X _14215_/Y _14167_/S hold172/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__18098__A1 wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_5 _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3292 VPWR VGND _15590_/A1 _23393_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_194_3692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30261_ _30261_/Q _31158_/CLK _30261_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23091__A1 _30431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19295__B1 _19294_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27357__A1 _32212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15195_ VGND VPWR _15716_/S _29319_/Q _28757_/Q _15195_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_214_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19834__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4089_A wire4090/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32000_ _32000_/Q _32036_/CLK _32000_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_4986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25368__B1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17845__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14146_ VPWR VGND _30019_/Q _22520_/B _14146_/B VGND VPWR NF_sky130_fd_sc_hd__and2_2 XFILLER_136_2330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30192_ _30192_/Q _30274_/CLK _30192_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25907__A2 _14183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output543_A _28713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14659__A1 _32044_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14659__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15856__B1 wire890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20262__C _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19047__A0 _19045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18954_ _28124_/Q _18954_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14077_ _30438_/Q _18553_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__24040__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15320__A2 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2014_A _18179_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_3879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22197__A3 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17905_ _31413_/Q _31408_/Q _17905_/X _31415_/Q _31407_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_62_2571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21655__A _21655_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_2639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25127__A _25160_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15871__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18885_ _19357_/B _27897_/Q _18884_/X _18885_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_231_2874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19062__A3 _19060_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_55_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26868__B1 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1061 _15766_/X _16949_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21944__A3 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18667__C _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17073__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17836_ _31734_/Q _17870_/A2 _17836_/X _31733_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_247_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26332__A2 _31654_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28335__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1439_A _17913_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1094 wire1096/X _15735_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_75_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16281__B1 wire923/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15084__B2 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23146__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24343__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25561__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2575_A _19419_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16820__A2 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17767_ _17767_/X _17692_/X _17685_/A _17766_/X _17673_/X VGND VPWR _17485_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_75_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14979_ _14978_/X _15368_/S _15515_/A2 _29218_/Q _14979_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_203_5035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24894__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23697__A3 _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19506_ _26763_/B _19507_/D _19507_/C _24388_/A _17884_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_34_4020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18022__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16718_ VGND VPWR _16718_/X _16715_/X _16717_/X _16841_/C1 wire1038/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_222_4935 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30438__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17698_ _17488_/B _17698_/X _17863_/C _17697_/X _17488_/A _17863_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_1_1661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16033__B1 _32307_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18683__B _29812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_5546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21390__A _21879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31715_ _31715_/Q _31730_/CLK _31715_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19437_ _31340_/Q _28441_/Q wire2952/X _31341_/Q _19441_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_160_4072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_4192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28485__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22106__A0 _30381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16649_ _16817_/A2 _16817_/A1 _28964_/Q _16649_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16584__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15387__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17781__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29730__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31014__D _31014_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13901__A _28596_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2307 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14595__B1 wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27488__S _27488_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19368_ _19368_/X _19368_/D1 _28304_/Q _19368_/B1 _19368_/A2 _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__20117__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31646_ _31646_/Q _32567_/CLK _31646_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_121_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_3344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_160_core_clk _31879_/CLK clkbuf_opt_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_277_3745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20668__B1 _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18319_ _18260_/X _18318_/Y _22378_/A _29767_/Q _22370_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_4 XFILLER_255_5467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30588__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_2009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19795__A _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15139__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30853__D wire813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1975_A wire1975/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27596__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19299_ _19379_/B _28045_/Q _19298_/X _19299_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31577_ _31577_/Q _31577_/CLK _31577_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26399__A2 _26555_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25056__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20132__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18903__S _18903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31833__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18730__C1 _27922_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21330_ _21651_/A _21550_/B _21329_/Y _21550_/A _14117_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__23606__A0 _31065_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16887__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27060__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30528_ hold460/A _32582_/CLK input61/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_236_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20683__A3 _19785_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29880__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14898__A1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_2476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18089__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23110__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_5503 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__diode_2 XFILLER_116_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23000_ VGND VPWR _23000_/X _25691_/B _32512_/Q _32504_/Q _25693_/B _32520_/Q _28904_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_63_3036 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_94_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3659 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20212_ VGND VPWR _20218_/S _28757_/Q _24227_/A0 _28757_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_5_4817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25359__B1 _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16639__A2 _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17836__A1 _31734_/Q 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_32129_/Q _32439_/CLK _32129_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_60_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_4068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24031__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23764__B _31785_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26571__A2 hold222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_4827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1114_A wire1118/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25682__D _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29154__D _29154_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2829 VPWR VGND _23288_/S _23295_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18858__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23256__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22042__C1 _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24579__C _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26308__C1 _26307_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25037__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24951_ _24951_/Y _24951_/B _24955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_20074_ VGND VPWR _19551_/B _19555_/A _20106_/A _20074_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_266_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19680__D _26015_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31213__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32339__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23902_ _23902_/X _23900_/X _28519_/Q _24163_/B2 _19718_/B VGND VPWR _23901_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_113_2160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18261__A1 _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26629__B1_N _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27670_ VGND VPWR _27677_/S _32405_/Q _24958_/B _32405_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21284__B _22620_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24882_ VGND VPWR wire2626/X _19503_/A _24881_/X _24882_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__29260__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24876__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15075__B2 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23137__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26621_ _26621_/X _31852_/Q wire3452/X _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_265_2425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16811__A2 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24334__B2 _31982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25531__B1 wire2813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23833_ _19792_/C _23832_/X _31820_/Q wire1624/X _23834_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_184_3850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_2729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_3522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_1987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14283__C1 _31937_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22345__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14822__A1 _28915_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1483_A wire1486/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23688__A3 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_406 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout839_A _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18013__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_417 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29340_ VGND VPWR hold344/X _31961_/CLK _29340_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_272_176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19210__B1 _18661_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26552_ _26182_/A _26551_/Y _26543_/B _31759_/Q _31759_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_428 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22896__A1 _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23764_ _31785_/Q _23765_/D _31786_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_19_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20976_ VGND VPWR _20980_/S _30182_/Q _29441_/Q _29441_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_439 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31363__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20909__A _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32489__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19761__A1 _28537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26087__B2 _24380_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_248_core_clk _31966_/CLK clkbuf_opt_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_108_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_201_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25503_ VGND VPWR _25109_/B hold178/A _31331_/D _25503_/C _19499_/C VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_221_4445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22715_ wire3657/X _22779_/A1 _22712_/X _22716_/B _29733_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_4 X_29271_ _29271_/Q _32379_/CLK _29271_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26483_ _26435_/B _17490_/B _26482_/X _26483_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire3892_A wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15378__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24098__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_3168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23695_ _30807_/D _23807_/B _23695_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_fanout1650_A _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18085__S _18085_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_1178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16575__B2 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17772__B1 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28222_ _28222_/Q _29580_/CLK _28222_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13811__A _31135_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25434_ _25433_/X _25447_/A _31357_/Q _25430_/Y _31297_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27398__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14586__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22648__A1 _22649_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22646_ VGND VPWR _22646_/B _22646_/Y _22646_/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_263_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28978__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_4298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold417_A hold417/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_14_0_core_clk clkbuf_opt_14_1_core_clk/A clkbuf_5_15_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_259_2207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20659__B1 wire1301/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28153_ _28153_/Q _30454_/CLK _28153_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_3233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_5234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25365_ _31274_/Q _31276_/Q _31275_/Q _25363_/D _25365_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_234_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22577_ VGND VPWR _22598_/S hold140/A _22576_/X _30067_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20123__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27587__B2 _27597_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18721__C1 _18720_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27104_ _27104_/X _27116_/B _32030_/Q _27116_/A _27098_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__26315__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24316_ _24313_/X _24357_/B1 wire1668/X _24353_/A1 _30961_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_178_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_4533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_5278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16878__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21528_ _21529_/A _21529_/C _21619_/D _21538_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28084_ _28084_/Q _32110_/CLK _28084_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_3794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25296_ _31262_/D _25294_/X _26498_/A _25295_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_215_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4839 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25062__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14889__A1 _15307_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28208__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27035_ _27036_/C hold500/A _31997_/Q _31996_/Q _27035_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 X_24247_ _30923_/D _26542_/B _31759_/Q _26386_/A _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_194_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2191_A _19752_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21459_ _21459_/A _21459_/D _29883_/Q _21459_/B _21459_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XFILLER_272_2429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_3114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24270__B1 _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15550__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19816__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_3406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20363__B _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23612__A3 wire1877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14000_ _28497_/Q _14000_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_core.RAM128_Di0[7] wire2350/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17827__A1 _31730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22281__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26969__C _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24178_ _24178_/X _20128_/B wire4107/X _28737_/Q _24178_/A2 VGND VPWR wire802/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_232_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26011__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20840__C_N _30424_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26331__A _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19292__A3 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3947 VPWR VGND _23095_/C _29716_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3958 _22610_/S _22613_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_215_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19029__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23129_ _30173_/D _23190_/B _23128_/X _30173_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_150_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15302__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24022__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28358__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28986_ _28986_/Q _29565_/CLK _28986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26562__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25365__A3 _25363_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_4872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29603__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25770__B1 _32098_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15853__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15951_ VGND VPWR _16823_/S _28777_/Q _28809_/Q _15951_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24573__B2 _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27937_ _27937_/Q _30758_/CLK _27937_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_24_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14788__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22584__A0 wire3706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21387__A1 _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23393__C _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput120 VGND VPWR _30652_/D la_input[52] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_267_3936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_2864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18788__C1 _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput131 VGND VPWR _30632_/D la_input[62] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_277_983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14902_ _16791_/A2 _15607_/A1 _29280_/Q _14902_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_226_4301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput142 VGND VPWR _30612_/D la_input[72] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_249_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18252__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_240_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18670_ _23304_/C _18670_/X _18669_/X _30376_/Q _21211_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA_wire2623_A _19522_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput153 VPWR VGND _30592_/D la_input[82] VGND VPWR NF_sky130_fd_sc_hd__buf_2 X_15882_ _16039_/A2 _15882_/X _15881_/X _16039_/C1 _28406_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__27511__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26314__A2 _31645_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27868_ _27868_/Q _30457_/CLK _27868_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xinput164 VGND VPWR _30572_/D la_input[92] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_98_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15904__C wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15066__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput175 mprj_dat_i[10] input175/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__16263__B1 wire890/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23128__A2 _23126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24325__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput186 VPWR VGND mprj_dat_i[20] input186/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 X_17621_ _17539_/C _17620_/X _31716_/D _17783_/B2 _17618_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29607_ _29607_/Q _32436_/CLK _29607_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14833_ VGND VPWR _14833_/X _14830_/X _15631_/A1 _14642_/S _14832_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xinput197 VPWR VGND input197/X mprj_dat_i[30] VGND VPWR NF_sky130_fd_sc_hd__buf_2 X_26819_ _26819_/Y _26819_/B _26833_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_37_3904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21139__A1 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30938__D _30938_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14325__A_N _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27799_ VGND VPWR _27801_/S _25033_/B _32522_/Q _32522_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14089__A _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22336__B1 _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14813__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_139_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29753__CLK _30233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18004__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17552_ VGND VPWR _17552_/S _17551_/Y _17544_/Y _17552_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19201__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29538_ _29538_/Q _32581_/CLK _29538_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_1332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14764_ _14764_/X _15350_/B1 _15356_/A2 _29042_/Q _15355_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_248_1955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_5101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27275__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26078__A1 _31538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16015__B1 _28947_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23840__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18555__A2 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_940 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_3306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16503_ VGND VPWR _16826_/S _28100_/Q _29056_/Q _16503_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_951 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22737__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_962 _17547_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17483_ _26502_/C _26509_/C _17483_/C _26539_/A _26435_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_70_3530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24089__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29469_ _29469_/Q _32067_/CLK _29469_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_31_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16566__A1 _29605_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14695_ VGND VPWR _14818_/S _28407_/Q _29072_/Q _14695_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_973 _28019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16508__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30730__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2080 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_984 _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31856__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19222_ _28233_/Q _19222_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31500_ _31500_/Q _32379_/CLK _31500_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_92_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_995 wire2039/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16434_ _16434_/X _28886_/Q _16434_/A2 _16722_/B2 _16722_/C1 _16433_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14577__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32480_ _32480_/Q _32531_/CLK _32480_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire4004_A wire4004/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output493_A _28655_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18307__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22103__A3 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31431_ _31431_/Q _32498_/CLK _31431_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19153_ _19153_/X _28070_/Q _19109_/S wire1984/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16365_ _16360_/X wire921/X _16364_/X _16816_/B1 _16365_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_139_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21311__A1 _30360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25038__C1 _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23849__B _23849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_4499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_2963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21311__B2 _30475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18104_ VGND VPWR _18110_/S wire3857/X _28033_/Q _28033_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23851__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15316_ _15723_/A2 _15316_/X _15315_/X _15718_/B1 _29475_/Q _15759_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16869__A2 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31362_ _31362_/Q _31923_/CLK _31362_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19084_ _19084_/X _19081_/X _19156_/S _19083_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21862__A2 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26786__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16296_ _16965_/A2 _16952_/A1 _32426_/Q _16296_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_output660_A wire2711/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30880__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26250__A1 wire3465/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30313_ _30313_/Q _30391_/CLK _30313_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29133__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19268__A0 _19266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_4_11_0_core_clk_A clkbuf_3_5_2_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18035_ VGND VPWR _18049_/S _29855_/Q _27967_/Q _27967_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15247_ _15247_/X _15727_/A2 _15740_/B1 _29257_/Q wire1515/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_9_3504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1291_A _20656_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16243__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31293_ _31293_/Q _31363_/CLK _31293_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_215_5484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24261__B1 wire1301/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput605 _28705_/Q la_output[92] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24800__A2 _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput616 _20682_/C mprj_adr_o[12] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17818__A1 _31650_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput627 _14305_/Y mprj_adr_o[23] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30244_ _30244_/Q _30477_/CLK _30244_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_214_3025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23865__A _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21680__A2_N _21649_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17818__B2 _14294_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15178_ _15178_/X _15175_/X _15611_/B1 wire1214/A _15177_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_190_3364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput638 wire2417/X mprj_adr_o[4] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_253_3085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput649 wire2378/X mprj_dat_o[13] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_84_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30110__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31236__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14129_ _14128_/X _14303_/B hold188/X _14133_/A hold189/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA__17863__A _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18491__A1 wire3837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17294__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24013__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30175_ _30175_/Q _32108_/CLK _30175_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1556_A wire1557/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27750__A1 wire2248/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19986_ _19985_/X _28641_/Q _28641_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__27056__B _27122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26553__A2 _14200_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25210__C1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29283__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_178_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27771__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21385__A _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_116_2778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18937_ _18937_/X _19216_/D1 _27868_/Q _19368_/B1 _19368_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_248_5271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold26_A hold26/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27502__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25108__A3 _24546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18868_ _18868_/X _19216_/D1 _27928_/Q _19368_/B1 _19368_/A2 _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_266_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30260__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15057__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31386__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23119__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24316__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19991__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18794__A2 wire1996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_2453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17819_ VGND VPWR _17842_/S _17808_/X _17818_/X _17819_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18799_ _19311_/B _27893_/Q wire1817/X _18799_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_58_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18694__A _30331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_2155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20830_ _20830_/Y _20830_/B _20830_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_93_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_3591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27875__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26069__A1 _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16006__B1 _29213_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20889__A0 _29373_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26069__B2 _31537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19743__A1 _28528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_341_core_clk _30314_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_149_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22342__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23105__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20761_ VGND VPWR _20785_/S wire1833/X _29275_/Q _29275_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_5518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16557__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24619__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15322__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_5190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22500_ VGND VPWR _22512_/A3 _22510_/A4 _22510_/A2 _22500_/X _30011_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_223_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14568__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16021__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23480_ VGND VPWR _23518_/S _23479_/X _31944_/Q _30426_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_1790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23827__B1 _24467_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20692_ VGND VPWR _20695_/S _29208_/Q _27680_/A1 _29208_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14446__B _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22431_ _22431_/Y _30285_/Q _22432_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_12_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31629_ _31629_/Q _31762_/CLK _31629_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20105__A2 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18633__S _18658_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15780__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22663__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26135__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25150_ VGND VPWR _31209_/D _24561_/B _25148_/A _31209_/Q _25149_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_238_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15517__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22362_ _22362_/X wire3213/X _18281_/X wire3712/X _22372_/A2 _29759_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_69_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32011__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25044__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14415__S0 _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24101_ _24101_/X _24099_/X _28538_/Q _24163_/B2 _24184_/A2 VGND VPWR wire808/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_248_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_2836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26241__B2 _32299_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21313_ _21659_/B _21315_/B _21588_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_86_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23055__A1 hold273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25081_ _25081_/A _24951_/B _25081_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_216_4558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19259__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21279__B _30334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22293_ VGND VPWR _23365_/S _29879_/Q _29138_/Q _29879_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3473_A wire3474/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23055__B2 _30088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_4498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15532__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1231_A wire1235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26792__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24398__A4 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20183__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1329_A wire1334/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24032_ _24032_/X _20128_/B wire4121/X _28723_/Q _24188_/A2 VGND VPWR _24024_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__17809__A1 _17796_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28500__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4017 VPWR VGND wire4017/X _28712_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21244_ _23226_/S _29706_/Q _20848_/X _29706_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14740__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold330 hold330/A hold330/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23775__A _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22802__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29626__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26789__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4028 VPWR VGND wire4028/X wire4029/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold341 hold341/A hold341/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_63_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4039 wire4040/X wire4039/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25693__C _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26151__A _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold352 hold352/A hold352/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20813__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23115__D_N _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3305 wire3305/X wire3306/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_21_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout789_A _25022_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold363 hold363/A hold363/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15992__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold374 hold374/A hold374/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18482__A1 wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28840_ _28840_/Q _32112_/CLK _28840_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17285__A2 input200/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32161__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21175_ VGND VPWR _21184_/S _29617_/Q _27680_/A1 _29617_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24004__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold385 hold385/A hold385/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27741__A1 _32470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26544__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold396 hold396/A hold396/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15296__A1 wire3249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16493__B1 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30603__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27681__S _27683_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1819 VPWR VGND _27694_/A1 _18257_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_284_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21295__A _21633_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20126_ _20126_/X _23879_/B _20126_/A _20126_/B _23879_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__31729__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2626 VPWR VGND wire2626/X _14215_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28771_ _28771_/Q _32575_/CLK _28771_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_3660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_1734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20403__S _20408_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25983_ _25983_/Y _26017_/C _31507_/Q _25567_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 Xfanout843 _20061_/X _20073_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__21369__A1 _17010_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22566__A0 _22599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout854 VPWR VGND _19984_/A2 _19928_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2648 VPWR VGND wire2648/X _14197_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21369__B2 _21366_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout956_A wire958/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_5224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28650__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1914 VPWR VGND wire1914/X _19273_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_80_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout865 VPWR VGND _19782_/A _19715_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29776__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27722_ VGND VPWR _27728_/S _19721_/A _32454_/Q _32454_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout876 VPWR VGND _25000_/A wire883/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24934_ _25076_/C1 _24933_/Y _24955_/A _31111_/Q _31111_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_269_3081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20057_ _26771_/A _20056_/Y wire853/X _28675_/Q _28675_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_266_4670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3905_A wire3906/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19431__B1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20041__A1 _28667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16245__B1 _16821_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_3_6_0_core_clk_A clkbuf_3_7_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_4204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19982__A1 _28639_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17442__C1 _17440_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25504__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27653_ VGND VPWR _27654_/S _25029_/B _32392_/Q _32392_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24865_ _24865_/C _24865_/Y _25160_/A _31074_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_262_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30758__D _30758_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15599__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17383__D_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17993__A0 _27927_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27413__C _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27669__C_N _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30753__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22838__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31879__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26604_ _26604_/X wire1275/X wire3461/X wire3462/X _26603_/X _26607_/B VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_280_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_203 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_2665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23816_ _30833_/D _23861_/C _23816_/A _23822_/B _23849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_19_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16260__A3 wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29006__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_214 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27584_ _27584_/Y _27594_/B _27584_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_261_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24796_ _24820_/A _24252_/X _24255_/X _31739_/Q _24796_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XANTENNA_wire2037_A _25197_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_225 _17280_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27257__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_3536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1543 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14271__A2 _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_236 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21234__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29323_ _29323_/Q _32433_/CLK _29323_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_247 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26535_ VGND VPWR _31749_/Q _26533_/D _31750_/Q _26537_/B _31752_/Q _31751_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_74_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_258 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26029__C _26123_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23747_ _23743_/Y _31769_/Q _31768_/Q _31770_/Q _23748_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_278_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20959_ VGND VPWR _20980_/S _30165_/Q _29424_/Q _29424_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_269 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17745__B1 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_5476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3079_A _17951_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29254_ _29254_/Q _32420_/CLK _29254_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31109__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14480_ _14477_/Y _14479_/Y _14476_/X _14478_/X _14480_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_275_4917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26466_ _26466_/X _26453_/A _26453_/B _26453_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_126_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23678_ _25934_/C _31049_/Q _31048_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XFILLER_241_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24086__A3 _24085_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28205_ _28205_/Q _30276_/CLK _28205_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28030__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29156__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25417_ VGND VPWR _25424_/S _31356_/Q _31287_/Q _31287_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_42_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22629_ _22629_/X _29725_/Q _22663_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_196_3039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23294__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29185_ _29185_/Q _32321_/CLK _29185_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22097__A2 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26397_ VGND VPWR _14200_/Y _19503_/A _26386_/X _26397_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_224_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23833__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28136_ _28136_/Q _30269_/CLK _28136_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16150_ _16150_/X _28918_/Q _16150_/A2 _16150_/A3 _16249_/S _16149_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_196_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input85_A la_input[20] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25348_ _25348_/X _25380_/C _31272_/Q _25414_/B1 wire3491/A _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_278_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20374__A _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18170__B1 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15101_ VGND VPWR _15101_/X _15100_/X _15099_/X _15752_/B1 _15749_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__30133__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31259__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16081_ _16081_/A2 wire3276/A _29560_/Q _16081_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28067_ _28067_/Q _30758_/CLK _28067_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25279_ _31258_/Q _31259_/Q _31295_/Q _31257_/Q _25280_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__25884__B _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15523__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3413_A _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32504__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16720__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21057__A0 _29515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28180__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_2237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15032_ _15027_/X _15612_/B _15611_/B1 _15031_/X _15032_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_174_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27018_ _27018_/B _31990_/D _27018_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_215_4068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length897 VPWR VGND _16839_/B1 wire898/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24794__A1 _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14731__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22254__C1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3711 VPWR VGND wire3712/A _22356_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25991__B1 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19265__A3 _19259_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20804__A0 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[15] wire2385/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2740_A _19634_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19840_ _19839_/X _28572_/Q _28572_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_232_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18473__A1 wire3896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3755 _30221_/Q _22733_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__27732__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19670__B1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26535__A2 _31750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25338__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2322 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15287__A1 _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30283__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20280__A1 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22006__C1 _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3850 VPWR VGND wire3850/X wire3852/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_1_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3434 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_1200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3799 _29912_/Q wire3800/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__25743__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19771_ _26687_/B _19770_/X _19782_/A _28542_/Q _28542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_24_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output241_A _13781_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16983_ VGND VPWR _30374_/Q _16976_/Y wire886/A _30374_/D _16982_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__20313__S _20324_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28969_ _28969_/Q _29580_/CLK _28969_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22557__A0 wire3707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3872 VPWR VGND wire3872/X _29852_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_245_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24010__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3883 VPWR VGND wire3883/X _29850_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_7_1133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15407__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18225__A1 _18269_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18722_ _18722_/X _20868_/S _19283_/S _18719_/X _18721_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 Xwire3894 VPWR VGND wire3894/X _29847_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_206_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15934_ _16039_/A2 _15934_/X _15933_/X wire951/X _29211_/Q _16039_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__22021__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19422__B1 wire3536/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31980_ _31980_/Q _32431_/CLK _31980_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27898__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26299__A1 wire3616/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16236__B1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19973__A1 _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18776__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17433__C1 _17432_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30931_ _30931_/Q _32434_/CLK _30931_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26838__A3 _26838_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18653_ VGND VPWR _18656_/S wire3827/X _28366_/Q _28366_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_59_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15865_ VGND VPWR _15866_/B _15862_/X _15864_/X _15957_/S wire1035/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_111_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30668__D _30668_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output506_A wire4047/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27591__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21780__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_15_0_core_clk_A clkbuf_4_7_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17604_ _17603_/Y _17604_/Y _17562_/X _17833_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 X_14816_ wire1533/X _14816_/A1 _28747_/Q _14816_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_261_3321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4121_A _28563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30862_ _30862_/Q _30865_/CLK _30862_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18584_ _21103_/C _22553_/B _14309_/X _22444_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_94_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15796_ _16149_/A2 _16149_/A1 _28081_/Q _15796_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27248__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19725__A1 _28519_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21144__S _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32601_ VGND VPWR _32601_/X _32601_/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_18_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17535_ _17777_/B _17536_/B _17605_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_124_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_5204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14747_ _14747_/Y _15612_/B _14747_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_204_4462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_3166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_5264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27799__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30793_ _30793_/Q _32277_/CLK _30793_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17736__B1 _17735_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25259__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_1638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18933__C1 _18932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_770 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_781 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16003__A3 _15998_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32532_ hold450/A _32532_/CLK _32532_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1304_A wire1305/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17466_ _17466_/X _31052_/Q _26470_/B _17475_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_792 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14678_ VGND VPWR _14935_/S _29587_/Q _29619_/Q _14678_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32034__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15211__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26471__A1 _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26236__A _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19205_ _30275_/Q _19205_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_222_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26471__B2 _31701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16417_ _16417_/A2 wire3281/X _29569_/Q _16417_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_157_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32463_ _32463_/Q _32467_/CLK _32463_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23285__A1 _23285_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22088__A2 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17397_ wire3561/X _31924_/Q _17397_/X _17272_/A wire2084/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__18453__S _18458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24482__B1 _31038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_5535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19776__C _19776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23824__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20099__A1 _28695_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31414_ _31414_/Q _32532_/CLK _31414_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19136_ _19156_/S _19136_/Y _19135_/X _19133_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_157_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28523__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16348_ _16347_/X _16838_/A1 _16815_/A2 _30500_/Q _16348_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14970__B1 wire1113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22493__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29649__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21835__A2 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32394_ _32394_/Q _32394_/CLK _32394_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_3415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25026__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27420__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18700__A2 wire1963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23037__A1 _23036_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24234__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19067_ _19067_/X _19368_/D1 _28002_/Q _19218_/B1 _19368_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 X_31345_ _31345_/Q _31873_/CLK _31345_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32184__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1673_A _18911_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21099__B _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16279_ _16840_/A2 _16279_/X _16841_/A2 wire1450/A _14104_/Y _29018_/Q VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_100_3792 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16711__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15514__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_4878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26774__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21048__A0 _29508_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput402 _13799_/Y la_oenb[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_26_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18018_ VGND VPWR _18018_/S _18499_/A1 _27952_/Q _27952_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30626__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14722__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22245__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput413 _13882_/Y la_oenb[34] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_153_2709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19792__B _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31276_ _31276_/Q _31998_/CLK _31276_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput424 _13872_/Y la_oenb[44] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25427__A_N _31297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[28] wire2394/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput435 _13862_/Y la_oenb[54] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_135_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput446 _13916_/Y la_oenb[64] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28673__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29799__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput457 _13906_/Y la_oenb[74] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_275_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18464__A1 wire3816/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30227_ _30227_/Q _30415_/CLK _30227_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_3888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput468 _13896_/Y la_oenb[84] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25329__A3 _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27723__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput479 _13886_/Y la_oenb[94] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20271__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24537__B2 _31217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30158_ hold416/A _30406_/CLK _30158_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26121__D _26121_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20223__S _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19969_ VGND VPWR wire1317/X wire2308/X _24933_/B _19969_/X _25867_/A _19973_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22548__A0 _30048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_4966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length855_A _19984_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2882_A _20756_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18201__B _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30776__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15317__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17019__A2 _17015_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25577__A_N _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22980_ VGND VPWR _22980_/X _25693_/C _32381_/Q _32373_/Q _23036_/S1 _32389_/Q _32397_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__29029__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30089_ _30089_/Q _32074_/CLK _30089_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_263_5566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27487__A0 _32302_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16227__B1 wire911/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20023__A1 _28658_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_2119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18767__A2 _18763_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23534__S _23536_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21931_ _21931_/X _21626_/X _21930_/X _21625_/Y _22067_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_185_4690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30578__D _30578_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16778__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23761__C _23761_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18628__S _18656_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_2553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21771__B2 wire3991/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24650_ _24666_/B _24650_/D _25895_/A _24650_/B _24684_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__19313__A _28141_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30006__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14789__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21862_ _21817_/S _29788_/Q _21861_/Y _29788_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_110_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27239__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15450__A1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21054__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27851__B1_N _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23601_ _30764_/D _25881_/D _31088_/Q _23601_/B _24881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_max_length1373_A wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20813_ VGND VPWR _20813_/S _29326_/Q _27509_/A1 _29326_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29179__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24581_ _24581_/C _31045_/D _25750_/A _25648_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_205_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21793_ _21793_/B _21793_/Y _21846_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_55_3889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19192__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26320_ _26319_/Y _23599_/B _31648_/Q _26331_/B _31648_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_101_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23532_ VGND VPWR _23532_/S _30453_/Q hold474/X _30453_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20744_ VGND VPWR _20749_/S _27254_/A0 _29259_/Q _29259_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_2682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20893__S _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22674__A _29879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26462__A1 _31701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15202__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_3271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26251_ _31614_/Q _26251_/X _26267_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_279_2936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1638_A _26781_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23276__A1 wire3891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3590_A _30858_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23463_ VGND VPWR _23460_/X _23463_/X _23437_/X _23442_/Y _23443_/X _23462_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_216_5001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20675_ VGND VPWR wire835/A _20680_/B _32335_/Q _20680_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_259_73 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18363__S _18366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24473__B1 _31033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16950__A1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31401__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19686__C _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32527__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1446_A _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23815__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_4950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25202_ _25595_/A _25201_/X _25254_/A2 hold111/A _31226_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21287__B1 _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22414_ VGND VPWR _22613_/S _29970_/Q _21967_/X _29970_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_49_3616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27676__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14961__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26182_ VPWR VGND _31579_/D _26182_/B _26182_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__21826__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23394_ _30433_/Q _30369_/D _23393_/X _22448_/A _23393_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__17487__B _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold115_A hold115/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_3345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27411__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25017__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3858 VPWR VGND wire3857/A wire3859/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17918__D _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25133_ _31203_/D _25131_/X _25181_/B _25132_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_44_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24225__A0 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22345_ _29922_/D _22385_/B1 hold421/X hold446/A _22356_/B VGND VPWR _22344_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__16163__C1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15505__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14192__A _19559_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26765__A2 hold491/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_3621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_5392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24776__A1 _31446_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14713__B1 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25064_ _25676_/B1 _25063_/X _25082_/A2 _31175_/Q _31175_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_47_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3007 VPWR VGND _18426_/S _18401_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29941_ hold393/A _31931_/CLK _29941_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_22276_ wire828/X _29839_/D _22274_/X _22509_/C1 _29839_/Q _22275_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_5_5145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_3321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3018 VPWR VGND _18386_/S wire3027/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22613__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3029 _18358_/S _18366_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_27_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_5444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24015_ _30601_/Q wire1656/A _24015_/X _30537_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23984__C1 wire1264/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17707__S _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21227_ _30332_/D _21226_/X _21223_/Y _17047_/X _29689_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18455__A1 wire3843/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2306 VPWR VGND _26838_/A4 wire2308/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17258__A2 wire3448/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_4252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold160 hold160/A hold160/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_5_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29872_ _29872_/Q _32277_/CLK _29872_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27714__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold171 hold171/A hold171/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26517__A2 _26515_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3124 wire3124/A wire3124/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_hold484_A hold484/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold182 hold182/A hold182/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15269__A1 _29321_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16466__A0 _29055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold193 hold193/A hold193/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15269__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2401 VPWR VGND _20654_/D _19811_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3146 VPWR VGND wire3146/X _21705_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28823_ _28823_/Q _32355_/CLK _28823_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25725__B1 _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2412 VPWR VGND wire2412/X _19859_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21158_ VGND VPWR _21158_/S _29601_/Q _27696_/A1 _29601_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_284_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1616 VPWR VGND _24178_/A2 wire1619/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15735__B _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19207__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2423 VPWR VGND _23879_/B _20666_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_5177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22539__A0 _30039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1627 VPWR VGND wire1629/A _19785_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_95_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1982_A wire1984/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2434 VPWR VGND _27259_/S _27262_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3179 VPWR VGND _30319_/D _17905_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_3_1_core_clk clkbuf_opt_3_1_core_clk/X clkbuf_opt_3_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_265_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18207__A1 _28087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20109_ _27071_/C1 _20108_/Y _20122_/A _28700_/Q _28700_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23200__A1 _30192_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28754_ _28754_/Q _29565_/CLK _28754_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13980_ _28517_/Q _13980_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2154_A _19618_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2467 _23253_/S _23251_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_25966_ VGND VPWR wire754/X _26779_/B _31498_/Q _31498_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_21089_ VGND VPWR _21097_/S _23663_/A1 _29540_/Q _29540_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_189_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_4077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_5043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2478 VPWR VGND wire2478/X _21140_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire1733 VPWR VGND wire1733/X wire1733/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20014__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19955__A1 _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18758__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_263_core_clk _30583_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_189_2175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27705_ VGND VPWR _27709_/S _27705_/A1 _32439_/Q _32439_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24917_ _24950_/A2 _24917_/Y _19574_/B _19628_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_189_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28685_ _28685_/Q _31801_/CLK _28685_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25897_ _25897_/X _25903_/S _31466_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__27573__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21762__A1 hold160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25489__C1 _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_1015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1799 _29856_/D _17360_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_240_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27636_ VGND VPWR _27636_/S _19546_/Y _32378_/Q _32378_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2321_A _14213_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15650_ _15650_/X _15730_/C1 _15647_/X _15649_/X _15745_/A1 _15645_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_248_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24486__D _31352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24848_ _25447_/A _24847_/Y _31068_/Q _24846_/Y _31068_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_73_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_3652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32057__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20369__A _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15441__A1 wire1093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19707__A1 _28514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_1340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14601_ _14600_/X wire1104/X _14882_/A2 _29519_/Q _14601_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_93_3393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15581_ _15581_/X _15609_/B1 _15277_/S _32136_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27567_ VGND VPWR _32337_/Q _27565_/X _27566_/Y _32337_/D _27597_/B2 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_73_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24779_ _24779_/X _24779_/D _25836_/C _25836_/B _24786_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_262_3696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14367__A _29980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22711__B1 _22710_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17320_ _17320_/X wire4177/X _17447_/A1 _17433_/A1 input205/X VGND VPWR wire3094/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_2 X_29306_ _29306_/Q _32417_/CLK _29306_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_4635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14532_ hold430/A hold424/A _14532_/X _23342_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_275_5437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26518_ _26539_/B _17504_/Y _31745_/Q _31745_/D _26515_/X _17508_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 XFILLER_53_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28546__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26989__C1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17194__A1 _29900_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27498_ VGND VPWR _27503_/S wire1826/X _32313_/Q _32313_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24059__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25256__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17194__B2 _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27650__A0 _32389_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3722_A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_3770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17251_ _17251_/B _17249_/Y _30960_/Q _17251_/X _30961_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_141_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29237_ _29237_/Q _32569_/CLK _29237_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14463_ _30438_/Q _14090_/Y _14458_/Y _14461_/Y _14462_/X _14463_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 XANTENNA__31081__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23267__A1 _29515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26449_ _26476_/S _31700_/D _26443_/X _31700_/Q _26448_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_13_3052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14547__A3 wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3530_A _25577_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14401__C1 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3811 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_2389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_2952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16202_ VGND VPWR _16566_/S _28092_/Q _29048_/Q _16202_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_196_2113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21278__B1 _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14952__A0 _30781_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30649__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22475__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17182_ _22510_/A2 _30010_/Q _17181_/X _17183_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29168_ _29168_/Q _30866_/CLK _29168_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_175_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18143__A0 _28071_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14394_ _26470_/B _26509_/C _26539_/A _26123_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__20308__S _20311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26205__B2 _32281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16133_ VGND VPWR _16133_/X _16132_/X _16131_/X _15975_/S wire1043/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_136_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28119_ _28119_/Q _29389_/CLK _28119_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28696__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24216__A0 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17497__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2955_A _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22490__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29099_ _29099_/Q _32569_/CLK _29099_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29941__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_4136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_5219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14533__C _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31130_ VGND VPWR _31130_/D _32532_/CLK _31130_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__25964__A0 _31496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16064_ VGND VPWR _16826_/S _28844_/Q _28876_/Q _16064_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_234_3743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22523__S _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23846__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22778__B1 _30465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15015_ _16721_/A2 wire3298/A _29283_/Q _15015_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_26_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30799__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3530 _25577_/C _25632_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_3563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18446__A1 wire3873/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31061_ _31061_/Q _31375_/CLK _31061_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_26_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22242__A2 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4071_A _28659_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27705__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_1355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4169_A wire4170/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3563 VPWR VGND wire3564/A _30993_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_3077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30012_ _30012_/Q _30399_/CLK _30012_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18997__A2 _18996_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21139__S _21139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19823_ VGND VPWR wire2194/X _19520_/B wire1330/A _19823_/X _27091_/C1 _19520_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__25716__B1 _31402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23990__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout2851 _21506_/A _21674_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_269_577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output623_A _24380_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2658 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_2778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2862 wire2869/X _21136_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_228_4204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_3012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24958__B _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25192__A1 _31224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_3823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19754_ _19754_/Y _19754_/B _19772_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xwire3691 _21505_/A _30356_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__25192__B2 _24546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30029__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1254_A _24111_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16966_ _16966_/X _29196_/Q _16966_/A2 _16966_/A3 _16736_/S _16965_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_238_942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20978__S _20979_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27469__A0 _32292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21202__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20005__A1 _28649_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16209__B1 _16208_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18749__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19946__A1 _28621_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18705_ _21211_/A _18705_/Y _18704_/X _30090_/Q _19218_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 XFILLER_4_2563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28076__CLK _30051_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15917_ VGND VPWR _15917_/X _16040_/A2 wire1052/X _15916_/X _15915_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_253_901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25135__A _31204_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2990 VPWR VGND _18490_/S _18495_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_0_2405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31963_ _31963_/Q _32309_/CLK _31963_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_4270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19685_ _26859_/C1 _19684_/X _19711_/A2 _28503_/Q _28503_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_16897_ _16897_/X _29301_/Q _16947_/A2 _16928_/A3 _16884_/S _16896_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_76_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21753__A1 _17017_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18448__S _18458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27053__C _27053_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_1104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29321__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30914_ _30914_/Q _32318_/CLK _30914_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18636_ VGND VPWR _18646_/S wire3881/X _28349_/Q _28349_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17421__A2 _17421_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21382__B _21486_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15848_ VGND VPWR wire969/X _29304_/Q _28742_/Q _15848_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1519_A wire1519/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31894_ _31894_/Q _31894_/CLK _31894_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19961__A4 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14235__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24974__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24298__A3 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30179__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18567_ _18567_/X _23393_/B _20914_/C _23236_/C _18567_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_30845_ _30845_/Q _32290_/CLK _30845_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15779_ wire1539/X wire3272/X _29552_/Q _15779_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17709__B1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31424__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22702__B1 _21463_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19174__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17518_ _26514_/B _17515_/Y _31749_/Q _13737_/Y _17514_/Y _17518_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XFILLER_222_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold93_A hold93/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_4923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30776_ _30776_/Q _32423_/CLK _30776_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19787__B _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18498_ VGND VPWR _18498_/S wire3814/X _28271_/Q _28271_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29471__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_89 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25247__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3742 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18921__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32515_ _32515_/Q _32531_/CLK _32515_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15196__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23258__A1 _29506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17449_ VGND VPWR _26974_/B _17448_/X _29872_/D _17245_/X _32276_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA__27913__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16393__C1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25301__C _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1888_A _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21269__A0 _22620_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_67_core_clk _31522_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15600__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27496__S _27513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_opt_6_0_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20460_ VGND VPWR _20481_/S _28979_/Q wire2002/A _28979_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32446_ _32446_/Q _32464_/CLK _32446_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18134__A0 _28062_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31574__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20218__S _20218_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2409 VPWR VGND _20654_/C _14141_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_274_3545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19331__C1 _19330_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19119_ _19179_/A2 _28292_/Q wire1942/A _19119_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_257_1807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18685__A1 _18683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30861__D _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24207__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20391_ VGND VPWR _20391_/S wire1833/X _28913_/Q _28913_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_2833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32377_ _32377_/Q _32394_/CLK _32377_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22481__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19882__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1719 VPWR VGND _23385_/S _23539_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_230_5521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20492__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16696__B1 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22130_ _22181_/B2 _22129_/X _22130_/X wire2275/X _22128_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_238_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22218__C1 _22217_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23529__S _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31328_ _31328_/Q _32560_/CLK _31328_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25955__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22769__A0 _29888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput221 _32576_/Q flash_io0_do VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_192_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput232 _14039_/Y la_iena[101] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23966__C1 _23965_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18437__A1 wire3906/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22061_ VGND VPWR _22061_/S hold395/A _21610_/B _22071_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_9_3164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput243 _14029_/Y la_iena[111] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19308__A _28269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3171_A wire3171/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15051__A2_N _15050_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31259_ VGND VPWR _31259_/D _31282_/CLK _31259_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22233__A2 _22241_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput254 _14019_/Y la_iena[121] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25029__B _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput265 _13775_/Y la_iena[16] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22596__A_N _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1027_A wire1030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput276 _13765_/Y la_iena[26] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16448__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21012_ VGND VPWR _21021_/S _29477_/Q _27701_/A1 _29477_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_25_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21441__B1 _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput287 _13976_/Y la_iena[36] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23981__A2 _23979_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput298 _13966_/Y la_iena[46] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16999__A1 _29988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27172__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28419__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17473__D _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21992__A1 _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_4315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_3855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25183__A1 _31221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25820_ VGND VPWR hold488/A _31435_/Q _30151_/Q _25820_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_187_4774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26380__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23772__B _31792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3436_A _32041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1029 VPWR VGND wire1029/X wire1030/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20888__S _20902_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1884 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15671__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1490_A wire1489/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23264__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21573__A _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23733__A2 _26017_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25045__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25751_ _25751_/Y _31365_/Q _31409_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_164_4037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17948__A0 _27886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22963_ VGND VPWR _22965_/S _30475_/Q _30140_/Q _30140_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24980__C_N _19570_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18358__S _18358_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21744__A1 _21713_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24702_ _24703_/B _31473_/Q _31475_/Q _31474_/Q _24701_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__18585__C _22553_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21914_ _21530_/Y _21911_/Y _21561_/Y _21914_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_243_422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28470_ VGND VPWR _28470_/D _31892_/CLK _28470_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_164_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25682_ VGND VPWR _25682_/C _31390_/Q _25682_/X _27413_/C _25682_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__28569__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22894_ VGND VPWR _22878_/B _22893_/X _22892_/Y _22895_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20189__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14226__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15423__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24289__A3 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26683__A1 _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24143__C1 wire806/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29814__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27421_ VGND VPWR _27421_/S _32268_/Q _27280_/X _32268_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24633_ _24595_/X _24594_/Y _24610_/X _24633_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_227_1611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_2979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21845_ _21955_/B _21844_/X wire3146/X _21679_/Y _21846_/B _21843_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_2 XANTENNA__23497__A1 _14101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_2034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14777__A3 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_5560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout919_A wire926/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19165__A2 _19159_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27352_ VGND VPWR hold144/A _32207_/Q wire2801/X _32207_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24564_ _24565_/B _24564_/Y _31211_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_hold232_A hold232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18373__A0 _28150_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17176__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21776_ _21775_/A _21775_/C _21776_/Y _21775_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_103_3618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_5435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20917__A _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25238__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18912__A2 _18906_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26303_ _26303_/Y _26331_/B _26872_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23515_ VGND VPWR _23515_/S _28396_/Q _30444_/Q _23515_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_33_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23249__A1 _29497_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17498__A _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20727_ VGND VPWR _20752_/S _27489_/A1 _29242_/Q _29242_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_4723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27283_ VPWR VGND _27284_/B _31383_/Q _31384_/Q _31386_/Q _27395_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XPHY_1324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3972_A _23224_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18093__S _18118_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24495_ _25571_/C _24576_/B _31366_/Q _25186_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_257_5189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_4455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29964__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1828_A _18237_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15510__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32606__A _32606_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29022_ _29022_/Q _32423_/CLK _29022_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26234_ VPWR VGND _31605_/D _26234_/B _26242_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__24997__A1 _31142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_5492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_4196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22457__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14934__B1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23446_ _22141_/A _23446_/X _13844_/Y _29363_/Q wire3993/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_7_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20658_ _20658_/X wire1666/X _20658_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_205_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_3375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26199__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17010__B _17010_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26165_ _26165_/X _31476_/Q _27131_/B _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_218_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2932 _20348_/S _20338_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_23377_ VGND VPWR _23559_/S _30355_/Q _29673_/Q _30355_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_14_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22472__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18821__S _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20589_ VGND VPWR _20589_/S _27682_/A1 _29104_/Q _29104_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17333__D1 _17332_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30941__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2943 VPWR VGND _20324_/S _20323_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xmax_length3688 VPWR VGND _16970_/A _22448_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_input187_A mprj_dat_i[21] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26323__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25116_ _31197_/Q _31196_/Q _31195_/Q _25149_/B _31198_/Q _25116_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_175_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2965 VPWR VGND _18658_/S _18656_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_22328_ _22328_/B _22328_/Y _22328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_253_2917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_4677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26096_ _26096_/Y _31544_/Q _26100_/D _31545_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_84_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_3331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14162__A1 hold82/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25047_ _25081_/A wire1296/X _25047_/X _25047_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29924_ hold217/A _29928_/CLK _29924_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_114_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22224__A2 _22223_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22259_ _22280_/S _22259_/X _18668_/C _22258_/X _30402_/Q _18664_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_65_2068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16341__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3111_A _14284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2369_A wire2370/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20371__B _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3209_A _14407_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21432__B1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28099__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23972__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_1938 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29855_ VGND VPWR _29855_/D _32435_/CLK _29855_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17100__A1 _29888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input48_A la_input[102] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17100__B2 _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25881__C _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2220 VPWR VGND _19662_/A _19554_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_278_374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1424 VPWR VGND _27703_/A1 _18303_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29344__CLK _30285_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2231 VPWR VGND wire2231/X _19543_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1435 _27253_/A0 _18278_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_16820_ VGND VPWR _16820_/X _16843_/A2 wire1055/A _16819_/X _16818_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28806_ _28806_/Q _32417_/CLK _28806_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2242 VPWR VGND wire2242/X wire2242/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1446 VPWR VGND _17783_/B2 _17524_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29786_ hold465/A _29788_/CLK _29786_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26696__D _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2253 _24454_/B wire2253/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout1457 VPWR VGND wire1459/A _15770_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20798__S _20817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26998_ VGND VPWR _26999_/C _31982_/Q _31983_/Q _27001_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire2264 _19648_/A wire2264/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1468 VPWR VGND wire1470/A _15770_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_229_3823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2275 VPWR VGND wire2275/X _18671_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1479 wire1486/X _16952_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24921__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23724__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2286 VPWR VGND wire2286/X _18665_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire1541 _23355_/A wire1541/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_60_2691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16751_ VGND VPWR _16751_/X _16750_/X _16749_/X _16736_/S wire1058/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_169_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28737_ _28737_/Q _31351_/CLK _28737_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire1552 VPWR VGND wire1552/X wire1552/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13963_ _28534_/Q _13963_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25949_ _25948_/X _26694_/C _31496_/Q _25935_/X _31488_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_1_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1563 wire1563/X wire1564/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__18268__S _18333_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21735__A1 hold273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30321__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26993__B _31980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15702_ VGND VPWR _15702_/S _29035_/Q _29003_/Q _15702_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_60_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_3026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17403__A2 _17403_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18600__A1 wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2703_A _19605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19470_ _31345_/Q _19471_/A _25539_/A hold425/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XFILLER_147_3556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_3507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_1952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16682_ _16878_/A2 _16878_/A1 _28965_/Q _16682_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28668_ _28668_/Q _32549_/CLK _28668_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_262_742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13894_ _28603_/Q _13894_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_267_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29494__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18421_ VGND VPWR _18425_/S _28196_/Q wire3846/X _28196_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15633_ VGND VPWR _15644_/S _32070_/Q _29129_/Q _15633_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27619_ VGND VPWR _27621_/S _27699_/A1 _32361_/Q _32361_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23032__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24685__B1 _31470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28599_ _28599_/Q _31507_/CLK _28599_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_262_3482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3745_A _30223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18352_ VGND VPWR _18359_/S _18644_/A1 _28130_/Q _28130_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30630_ hold316/A _30630_/CLK _30630_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15564_ VGND VPWR _15716_/S _28767_/Q _15563_/X _15564_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__17167__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25402__B _31283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30471__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18364__A0 _28142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31597__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22160__A1 _22181_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_5606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25229__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22160__B2 _30099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19561__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17303_ _17447_/A1 input203/X _17308_/A _17447_/B2 wire4179/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_145_2590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14515_ _14515_/Y _29452_/Q _14515_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_199_3966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15178__B1 _15611_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18283_ _18283_/B _18283_/Y _18316_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_30561_ _30561_/Q _31873_/CLK hold183/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_4320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15495_ _16959_/A2 wire3303/X _28933_/Q _15495_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15717__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16914__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14825__A _14825_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26977__A2 _26979_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32300_ _32300_/Q _32300_/CLK _32300_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19947__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17234_ _17234_/A1 _30405_/Q _17234_/X _17234_/B2 _29445_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14925__B1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14446_ _14446_/Y _20912_/B _23231_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__18116__A0 _28045_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_4247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30492_ _30492_/Q _30492_/CLK _30492_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_214_5505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24733__S _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output573_A _28740_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22999__A0 _22998_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16390__A2 _16817_/A2 VGND VPWR VPWR VGND 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VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 Xwire860 VPWR VGND wire860/X wire860/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22463__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23660__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19864__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire882 wire882/X wire883/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__16678__B1 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16116_ _16116_/X _16115_/X _16107_/X _16102_/X _16522_/B1 _16111_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_256_3297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32162_ _32162_/Q _32525_/CLK _32162_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21658__A _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27793__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17096_ VGND VPWR _18664_/B _30198_/Q _30387_/Q _17096_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_256_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_2536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_3551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_5262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2403_A wire2404/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_4083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31113_ _31113_/Q _32546_/CLK _31113_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14153__A1 hold155/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16047_ VGND VPWR _16047_/X _16044_/X _16046_/X _16068_/S _16834_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_256_1862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15350__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1371_A _19645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23412__A1 _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32093_ _32093_/Q _32535_/CLK _32093_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_252_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1469_A wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25952__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_3888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2309_A wire2316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_185_core_clk _32036_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25564__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31044_ _31044_/Q _31923_/CLK _31044_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_26_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_3287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23963__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32222__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3371 _23155_/A _23180_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19092__A1 _28163_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_5396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_3860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21974__A1 _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_4059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_114_core_clk _32318_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_6_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25165__A1 _25186_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19806_ _27003_/B1 _19805_/X _19852_/A2 wire4126/A _28555_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_113_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_3336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16445__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17642__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26362__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_1450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25704__A3 _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26901__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17998_ VGND VPWR _18012_/S wire3875/X _27932_/Q _27932_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_1_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23176__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15653__A1 _29581_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19919__A1 _28609_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28711__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21393__A _30349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23715__A2 _20671_/C VGND VPWR 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NF_sky130_fd_sc_hd__diode_2 Xfanout1991 wire1995/X _19375_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21726__A1 _23061_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2580_A wire2582/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31017__D _31017_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26114__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13904__A _28593_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31946_ VGND VPWR _31946_/D _32322_/CLK hold457/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19668_ _26773_/C _20128_/A _26793_/B _19668_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_187_1956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14208__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15405__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30814__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26665__B2 _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27080__A _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18619_ VGND VPWR _18624_/S wire3830/X _28333_/Q _28333_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_165_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23479__A1 _28378_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30856__D _30856_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19599_ _27077_/C1 _19598_/Y _19598_/A _28472_/Q _28472_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31877_ _31877_/Q _31877_/CLK _31877_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14759__A3 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18906__S _18906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length818_A _26662_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28861__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19147__A2 _19131_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29987__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17810__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_2589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24140__A2 _24140_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21630_ _21630_/X _21630_/B1 _29900_/Q _29730_/Q _22026_/A2 VGND VPWR _21629_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_146_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_5443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30828_ _30828_/Q _32010_/CLK _30828_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3017_A _18432_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22151__A1 _30033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_2892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15169__B1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21561_ _21546_/Y _21542_/X _21545_/X _21556_/A _21561_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_4 XFILLER_206_2985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16366__C1 wire1449/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24428__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30759_ VGND VPWR hold390/X _31548_/CLK _30759_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15708__A2 wire1496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30964__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27090__A1 _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23300_ VGND VPWR _23300_/S wire3813/X _30282_/Q _30282_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_3476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20512_ VGND VPWR _20512_/S _27624_/A1 _29030_/Q _29030_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24979__A1 _31133_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29217__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18107__A0 _28036_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24280_ _30933_/D _24279_/X _24353_/A1 _20364_/C wire1668/X _23873_/D VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_50_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21492_ _21492_/X _21490_/Y _21503_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_50_2860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15184__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16381__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25640__A2 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23231_ VGND VPWR _23231_/X _23393_/A _23231_/A _23231_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_198_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_4328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length1336_A wire1334/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20443_ VGND VPWR _20452_/S _28963_/Q _23663_/A1 _28963_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18658__A1 _23301_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32429_ _32429_/Q _32429_/CLK _32429_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_5064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30591__D _30592_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22454__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23651__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19855__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18641__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23767__B _31787_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3386_A wire3387/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1144_A wire1152/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22671__B _22671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26143__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23259__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21662__B1 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17866__C1 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23162_ hold255/A _23192_/A2 _23162_/X _30110_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_109_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20374_ _25722_/D _25738_/A _20680_/B _25722_/C _25727_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XFILLER_11_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17330__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28241__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19870__A3 wire2231/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29367__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22113_ VGND VPWR _22180_/S _30292_/Q _30382_/Q _22113_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_69_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22206__A2 _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19607__B1 _19606_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27970_ _27970_/Q _30457_/CLK _27970_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23093_ VGND VPWR _23093_/X _23091_/X _23092_/X _23090_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25982__B _25982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20191__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15892__A1 _28743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26921_ hold225/A wire1573/A _31945_/D wire2352/X wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22044_ VGND VPWR _22044_/X _21586_/B _21591_/Y _21646_/A _22035_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23954__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23783__A _23783_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26797__C _27058_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout771_A _27053_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30344__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_1296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout869_A _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24598__B _24599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_core.RAM256_EN0 wire1685/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29640_ _29640_/Q _31917_/CLK _29640_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26852_ VGND VPWR wire2653/X _19522_/A wire749/A _26852_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_131_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3818_A _29870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28391__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_2656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23167__B1 wire2842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14447__A2 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25803_ _32540_/Q _32541_/Q _27832_/A _25804_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XANTENNA__24903__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23706__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29571_ _29571_/Q _32425_/CLK _29571_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26495__A2_N _26492_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20411__S _20412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26783_ _26783_/B _26694_/B _26791_/A _26783_/X _27076_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_96_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18088__S _18117_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27528__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23995_ wire1633/X _30669_/Q _23994_/X _23995_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27959__CLK _30198_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_3493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_3163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1778_A _18328_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18189__A3 _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19386__A2 _30219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28522_ _28522_/Q _32358_/CLK wire770/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13814__A _31132_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25734_ VGND VPWR _25733_/C _25733_/D _27784_/C _25734_/X _25733_/Y _31404_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_22946_ VGND VPWR _23342_/A _21464_/A hold442/A _30123_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30494__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17397__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17397__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_1165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28453_ _28453_/Q _31815_/CLK _28453_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_73_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_5442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25665_ VPWR VGND _25665_/X _31388_/Q _27413_/C VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__30766__D _30766_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22611__A_N _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22877_ _22877_/A _22910_/A _22877_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__15947__A2 wire1533/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19138__A2 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17720__S _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22846__B _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27404_ _31384_/Q _27404_/B _27395_/C _27412_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XPHY_500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24131__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24616_ _19505_/A _31553_/Q _31554_/Q _19505_/B _24616_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_160_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input102_A la_input[36] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21828_ hold279/A _21817_/S _29785_/D _21827_/X _21826_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_202_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28384_ _28384_/Q _30449_/CLK _28384_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17149__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2117_A wire2118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25596_ _13757_/Y _25629_/A _25596_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XPHY_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17149__B2 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27605__A0 _32347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21242__S _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19858__D _20654_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27335_ VGND VPWR _27339_/S _32192_/Q _27272_/X _32192_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24547_ _24547_/Y _31296_/Q _31297_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XPHY_555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20153__B1 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18897__A1 _27898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21759_ _21758_/X _21999_/S1 _21759_/X _21735_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__22693__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23890__A1 _30625_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21350__C1 _14431_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3061_A _18020_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23890__B2 _30561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15240__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14300_ _14300_/B _14300_/X _14300_/A _29970_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_107_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15280_ _15280_/X _29474_/Q _15279_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_1154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27266_ _27266_/X _31421_/Q hold487/A _27280_/C _27280_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_270_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24478_ _24475_/C _31036_/Q _24478_/Y _24467_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_257_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16372__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25092__B1 _31189_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29005_ _29005_/Q _32422_/CLK _29005_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XPHY_1187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14231_ _13829_/A _14300_/B _14231_/X _29979_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_26217_ hold176/A _26227_/A2 _26218_/B _32287_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_158_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18649__A1 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23429_ _23429_/Y _29378_/Q _29836_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_10_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23642__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27197_ VGND VPWR _32091_/D _27276_/C _27197_/A _27197_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_194_3863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2486_A _21020_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14922__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3326_A _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20456__A1 _28975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_5547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_3847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25919__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26148_ VPWR VGND _31563_/D _26148_/B _26148_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_14162_ _14162_/X _14167_/S hold126/X hold82/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__32245__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17321__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26041__C1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_3602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26988__B _26988_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25395__A1 _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15332__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18970_ _18969_/X _19047_/S _19358_/A2 _28189_/Q _18970_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14093_ _21355_/A _14093_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2653_A _14194_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26592__B1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26079_ VGND VPWR _26102_/C _26077_/X _26079_/X _26123_/D _26079_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__25395__B2 _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14380__A _31015_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_4256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14686__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28734__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17921_ VGND VPWR _17949_/S _23272_/A1 _27859_/Q _27859_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_212_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23945__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29907_ hold430/A _30330_/CLK _29907_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19074__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3887_A wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_30_1_core_clk clkbuf_opt_30_1_core_clk/X clkbuf_opt_30_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_283_5536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23349__D_N _23347_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17085__B1 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_45_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26344__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25147__B2 _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17852_ _17852_/A _17852_/X _17852_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_29838_ VGND VPWR _29838_/D _30395_/CLK _29838_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_264_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1243 VPWR VGND wire1244/A _24251_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_229_5088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2050 VPWR VGND wire2050/X wire2050/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_216_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23158__B1 _23157_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14438__A2 _29384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15635__A1 _28432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14445__C_N _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23843__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24301__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25698__A2 _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2061 wire2062/X wire2061/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__30837__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16832__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16803_ VGND VPWR _16803_/Y _16802_/X _16789_/X wire920/X _16793_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_169_2321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2072 VPWR VGND wire2072/X wire2072/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_144_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1276 _23673_/X _24357_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_266_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17783_ _17539_/C _17782_/X _31730_/D _17783_/B2 _17780_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_53_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20321__S _20321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2083 VPWR VGND wire2083/X wire2083/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29769_ _29769_/Q _31914_/CLK hold476/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27519__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14995_ _14995_/X _14990_/Y _14986_/Y _15226_/B _14994_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_188_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22102__A _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2094 VPWR VGND wire2094/X wire2094/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_260_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22366__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28884__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_2188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19522_ _19522_/X _19522_/A _19522_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_31800_ VGND VPWR _31800_/D _31846_/CLK hold431/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_92_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1371 wire1371/X _19645_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_16734_ VGND VPWR _16961_/S _32067_/Q _29126_/Q _16734_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_286_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24370__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13946_ _28551_/Q _13946_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_264_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4034_A wire4035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17388__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19916__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_1866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_3127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22381__A1 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26647__A1 _31785_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14539__B _14539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31731_ _31731_/Q _32554_/CLK _31731_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19453_ _31342_/Q _19451_/X _19456_/A hold479/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XANTENNA__15399__B1 _29261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25413__A _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16665_ VGND VPWR _16665_/X _16491_/S _16816_/B1 _16664_/X _16663_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_73_3550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13877_ _28620_/Q _13877_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__16596__C1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15938__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26111__A3 _26112_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27331__C _27404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23631__A1_N _31080_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30987__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24662__A_N _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22756__B _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18404_ VGND VPWR _18428_/S _28179_/Q wire3909/X _28179_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_95_1872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24122__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28114__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15616_ _16798_/A2 _15616_/X _29299_/Q wire1488/X _14102_/Y _15623_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_125_3651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4201_A wire4202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19384_ VGND VPWR _29453_/D _21173_/B _27135_/C _29452_/D _29454_/D VGND VPWR NF_sky130_fd_sc_hd__and4b_1 X_31662_ _31662_/Q _32280_/CLK _31662_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25132__B _25142_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18337__A0 _28115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output690_A wire3390/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16596_ VGND VPWR _16596_/X _16595_/X _16594_/X _16736_/S wire1058/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_147_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23330__A0 _17184_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27050__D _27050_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14610__A2 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21152__S _21166_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18335_ VGND VPWR _18339_/S wire3916/X _28113_/Q _28113_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_5004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30613_ _30613_/Q _31873_/CLK hold310/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_1878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15547_ _15547_/X _28107_/Q _15546_/X _15721_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_223_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31593_ _31593_/Q _31937_/CLK _31593_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_121_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23881__B2 _30755_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27072__A1 _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30217__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20695__A1 _29211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16899__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25559__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18266_ VGND VPWR _18260_/X _29756_/Q _22370_/A2 _18267_/B _18265_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_2 X_30544_ hold200/A _31884_/CLK input52/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20991__S _20999_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15478_ VGND VPWR _15478_/X _15475_/X wire1210/X _15705_/A1 _15477_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16363__A2 wire4148/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15020__C1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26244__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25622__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28264__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17217_ _22026_/B1 wire3926/X _21668_/A _21953_/A2 _29903_/Q VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22o_4 X_14429_ _30454_/Q _14429_/X _14429_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_47_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15571__B1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19837__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30475_ VGND VPWR _30475_/D _30475_/CLK _30475_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18197_ _18197_/X _18157_/Y _18194_/X _18196_/X _18195_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XANTENNA__18461__S _18461_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1586_A wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_278_1350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14913__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19301__A2 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32214_ _32214_/Q _32523_/CLK _32214_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_366_core_clk _31955_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__27774__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_84_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17148_ _29894_/Q _22026_/A2 _17148_/X _23135_/B _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_239_1334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_2079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17585__B _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25031__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold56_A hold56/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16115__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17312__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30367__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_303_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_5413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20723__C _27233_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26898__B _26898_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25386__A1 _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24189__A2 wire732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32145_ _32145_/Q _32204_/CLK _32145_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_2393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17079_ _17078_/X _17077_/X _22756_/C _17075_/X _17079_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XFILLER_119_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26583__B1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25386__B2 _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31612__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24699__A _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15874__A1 _29039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14677__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14231__A_N _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23936__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19065__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire837_A wire838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32076_ _32076_/Q _32078_/CLK _32076_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20090_ VGND VPWR wire2678/X _19563_/A _20122_/A _20090_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_45_2962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27127__A2 _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21947__A1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_5035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25138__A1 _31204_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31027_ _31027_/Q _31693_/CLK _31027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18812__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15626__A1 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25689__A2 _25693_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15626__B2 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_5199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31762__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20231__S _20236_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_4427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2962_A _18626_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24897__B1 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14834__C1 wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19368__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22800_ _22820_/B _22820_/C _22800_/X _29721_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__23164__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24361__A2 wire1668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23780_ _30821_/D wire1628/X _23778_/X _26838_/A1 _26687_/A _23777_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_2 XFILLER_165_4187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20992_ VGND VPWR _20999_/S _29457_/Q _27236_/A0 _29457_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_148_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19773__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27835__B1 hold488/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23542__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22731_ _30095_/Q wire1866/A _30095_/D _22730_/X _22729_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__24865__C _24865_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20383__A0 _28907_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25323__A _31267_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31929_ _31929_/Q _31933_/CLK hold415/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30586__D _30586_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16587__C1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15929__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18636__S _18646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32118__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_82_core_clk _31806_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_161_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20922__A2 _18086_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1094_A wire1096/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24113__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25450_ _25450_/Y _31305_/Q hold305/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_22662_ _30088_/D _22659_/X _22661_/X _22679_/S _22660_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_74_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23321__A0 _17112_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22124__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_11_core_clk _32353_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14601__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24401_ _24401_/D _31002_/Q _24401_/Y _31004_/Q _31003_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_33_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21613_ _30220_/Q _21613_/X _21613_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_156_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18879__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20135__B1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28607__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25381_ _31279_/Q _25389_/D _25381_/X _25381_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_181_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22675__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22593_ VGND VPWR _22619_/S hold126/A _22592_/X _30075_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14465__A _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27063__A1 _26781_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17000__B1 _16996_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24881__B _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1359_A wire1362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27120_ _27120_/B _26949_/A _27120_/A _27120_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_69_5599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19540__A2 wire2638/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_342_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24332_ _32013_/Q _27053_/A _24332_/X _31981_/Q wire1346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_30_3943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_5438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21883__B1 _21648_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21544_ _21677_/C _21599_/A _21677_/B _21677_/D _21546_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_195_4862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31142__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32268__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16354__A2 wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_3353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_4726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27051_ _27051_/C _32003_/D _27051_/A _27051_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_max_length1718_A _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24263_ _31682_/Q _26542_/A _24263_/X _31611_/Q _24467_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_219_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15562__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21475_ _21475_/B _21476_/B _21475_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__18371__S _18371_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23624__B2 _24856_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24821__B1 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19694__C _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26002_ _26173_/B1 _26001_/Y _26015_/A _31516_/Q _31516_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_5_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20914__B _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23214_ VGND VPWR _23223_/S _30206_/Q _30136_/Q _30206_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21635__B1 _16987_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28757__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27684__S _27696_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20426_ VGND VPWR _20444_/S _28946_/Q _24216_/A0 _28946_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_4723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24194_ _24281_/A _32583_/Q _24194_/X _19641_/C _30567_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__16106__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17303__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20406__S _20406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17303__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25377__A1 _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23145_ _23180_/B _18535_/B _23145_/A _23145_/X _29726_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__15314__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20357_ VGND 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VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_61 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_1612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23927__A2 _23924_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19056__A1 _28033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_2319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1009 _19539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23076_ _23049_/A _21211_/B _23057_/S _30428_/Q _23076_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27953_ _27953_/Q _32435_/CLK _27953_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_24_3747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20288_ VGND VPWR _20294_/S _27704_/A1 _28830_/Q _28830_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27118__A2 _24779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19642__C_N _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21938__A1 _21484_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_3533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26904_ _26904_/A _26904_/B _26903_/X _26904_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 X_22027_ _21966_/A wire2848/X _21665_/A _22025_/Y _22027_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XANTENNA__26326__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_230_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27884_ VGND VPWR _27884_/D _30471_/CLK _27884_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_wire2067_A wire2068/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold20 hold20/A hold20/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18400__A _30415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold31 hold31/A hold31/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20071__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27135__D _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20610__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21237__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16814__B1 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold42 hk_dat_i[12] hold42/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_29623_ _29623_/Q _32049_/CLK _29623_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26835_ _26835_/Y _26900_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xhold53 hold53/A hold53/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_248_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold64 hold64/A hold64/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_109_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold75 hold75/A hold75/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16290__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19359__A2 _19358_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13800_ _31146_/Q _13800_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20756__A_N _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold86 hold86/A hold86/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_clkbuf_leaf_129_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24352__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28137__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29554_ _29554_/Q _32421_/CLK _29554_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold97 hold97/A hold97/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_wire2234_A wire2234/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14780_ _15228_/A2 _14779_/X _32306_/Q _15228_/A3 _14780_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_26766_ _26687_/A _31835_/Q wire1299/A _26687_/D _26768_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_263_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23978_ wire1621/X _23977_/X _31132_/Q _24081_/A3 _23978_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_268_1552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22363__A1 _30470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23560__A0 _30051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21797__S0 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26329__A _26898_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14359__B _22614_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22363__B2 hold454/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14840__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27826__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28505_ _28505_/Q _31507_/CLK _28505_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_232_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25717_ _25717_/C _25717_/B _25718_/C _31402_/Q _25731_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__24775__C _24775_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_381_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_2101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22929_ _22929_/A _22929_/X _22929_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_243_4885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29485_ _29485_/Q _32557_/CLK _29485_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26697_ _26687_/B wire778/X _31801_/Q _26695_/Y _31801_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_39_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20913__A2 _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16042__A1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24104__A2 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16450_ _16436_/X _16449_/X wire921/X _16440_/X _16450_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28436_ VGND VPWR _28436_/D _32438_/CLK hold285/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25648_ _25648_/A _25648_/B _30761_/Q _27395_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_231_233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23312__A0 _17038_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22115__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18319__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16593__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15396__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17790__A1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15401_ VGND VPWR _15401_/X _15398_/X _15400_/X _15705_/A1 wire1209/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XPHY_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_4014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16381_ _16817_/A2 _16817_/A1 _29471_/Q _16381_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XPHY_341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28367_ _28367_/Q _30279_/CLK _28367_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16066__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22666__A2 _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25579_ _25578_/X _25571_/C _25632_/B _25579_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XPHY_352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4369 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27054__A1 _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20096__B _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_5636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18120_ VGND VPWR _30414_/Q _18626_/B _30413_/Q _18120_/X _30484_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_8_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15332_ _15331_/X _15638_/B1 _15332_/A2 _28857_/Q _15332_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_240_2161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27318_ VGND VPWR _27321_/S _32177_/Q _27274_/X _32177_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21874__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28298_ _28298_/Q _30481_/CLK _28298_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16345__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15148__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26262__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17542__B2 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25604__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18051_ VGND VPWR _18051_/S wire3814/X _27983_/Q _27983_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2770_A wire2771/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27249_ VGND VPWR _27259_/S _32124_/Q _27614_/A1 _32124_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15263_ VGND VPWR _15263_/X _15260_/X _15744_/B1 _15752_/B1 _15262_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_258_1209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23076__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15553__B1 wire1074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22418__A2 _22003_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19819__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3610_A wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31635__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3824 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2868_A _21134_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_4801 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NF_sky130_fd_sc_hd__decap_4 XFILLER_155_3666 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output369_A _13813_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14145_ _30021_/Q _30020_/Q _30019_/Q _14143_/D _14145_/Y _14146_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_4 XANTENNA__15305__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30191_ _30191_/Q _30217_/CLK _30191_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17845__A2 _17798_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_4878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 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NF_sky130_fd_sc_hd__decap_4 XANTENNA__16805__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15608__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21147__S _21151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1051 VPWR VGND wire1053/A _15766_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17835_ _17835_/X _17596_/D _31735_/Q _17490_/B _17829_/X _17834_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_266_2905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_4162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31015__CLK _32580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24879__B1 _31086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15084__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_1349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1095 _14558_/X wire1097/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_97_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24343__A2 wire1668/X VGND VPWR VPWR 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VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14831__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19755__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27817__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23362__S _23366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19505_ _24593_/A _19507_/D _19505_/A _19505_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_207_4460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23697__A4 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16717_ _16717_/X _32134_/Q _16818_/A2 _16841_/B2 _16843_/A2 _16716_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_56_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2568_A _19397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13929_ _28568_/Q _13929_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_235_572 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14984__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16569__C1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_4032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18456__S _18456_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17697_ VGND VPWR _17833_/S _17696_/X _17649_/X _17697_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_147_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16033__A1 wire1477/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17230__A0 _17229_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18683__C _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_3320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1501_A _14546_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31714_ _31714_/Q _32566_/CLK _31714_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19436_ _31341_/Q _28441_/Q _19436_/Y wire2952/X _31340_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XFILLER_160_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27769__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16648_ VGND VPWR _16648_/X _16645_/X _16647_/X _16841_/C1 wire1055/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_222_233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31165__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26635__A4 _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16584__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17781__A1 _31729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24982__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15241__C1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23303__B1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17781__B2 _31728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32410__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2735_A _19631_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14595__A1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15792__A0 _29239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31645_ _31645_/Q _31896_/CLK _31645_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19367_ VGND VPWR _19367_/X _19379_/B _19367_/B1 _28371_/Q _19366_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_16579_ _16579_/X _16565_/X _16578_/X _16573_/X _16569_/X wire923/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_259_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_3908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18318_ _18239_/B wire3175/X _18318_/Y _18295_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__20668__B2 wire1296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23598__A _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31576_ _31576_/Q _32421_/CLK _31576_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19795__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19298_ _19298_/A2 _28013_/Q _19367_/B1 _19298_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17533__A1 _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16336__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18730__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30527_ _30527_/Q _32016_/CLK hold460/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18249_ _30326_/Q _30327_/Q _18249_/X _18249_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_275_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_5110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15544__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1968_A wire1968/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16704__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout2808_A wire2811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32560__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21260_ VGND VPWR _23226_/S _29722_/Q _30438_/Q _29722_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23110__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_22_0_core_clk_A clkbuf_5_23_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30458_ _30458_/Q _30470_/CLK _30458_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_47_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23082__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20226__S _20227_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold501 hold501/A hold501/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_278_1180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_2780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19825__A3 _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20211_ VGND VPWR _20211_/S _28756_/Q _27614_/A1 _28756_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21093__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20453__C _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25359__A1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17836__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21191_ VGND VPWR _21199_/S _29633_/Q _27251_/A0 _29633_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_45_4183 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30389_ _30389_/Q _30390_/CLK _30389_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_173_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26020__A2 _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23909__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23537__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20142_ _28715_/D _19732_/A _20141_/X wire877/A _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_32128_ _32128_/Q _32302_/CLK _32128_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21846__A _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24031__A1 wire4070/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24031__B2 _31169_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17049__A0 _17047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26571__A3 _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_2650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19589__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22042__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26308__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24582__A2 _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24950_ _25718_/A _24949_/Y _24950_/A2 _31119_/Q _31119_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire3251_A _14544_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20073_ _25567_/B _20072_/Y _20073_/A2 _28682_/Q _28682_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32059_ _32059_/Q _32430_/CLK _32059_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_1364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_1987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25037__B _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21396__A2 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1107_A wire1113/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20053__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26859__A1 _31879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29405__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21057__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23901_ _28487_/Q _19646_/B _23901_/X _28679_/Q _24207_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__23790__B1 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_3739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18261__A2 _29857_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24881_ _24881_/X _25881_/D _26542_/A _24888_/B _24881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_230_2385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15075__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26620_ _26620_/X wire1275/X _31795_/Q wire3462/X _26619_/X _23761_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__16272__B2 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24334__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25531__A1 _19471_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23832_ _23832_/X _24317_/A _31855_/Q _26772_/A _31887_/Q _24317_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_58_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20896__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14283__B1 wire3428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23542__A0 _30033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22677__A _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31508__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14822__A2 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22345__B2 hold446/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23272__S _23300_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18874__B _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1999 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_407 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25053__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26551_ VGND VPWR _14203_/Y _19503_/A _26543_/B _26551_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19210__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_418 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23763_ _23763_/B _26643_/B _31783_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_145_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20975_ VGND VPWR _20980_/S _30181_/Q _29440_/Q _29440_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_74_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_429 wire740/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18366__S _18366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22896__A2 _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29555__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16024__B2 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25502_ _31330_/Q _19498_/A _31331_/Q _25503_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_282_2773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18593__C _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19761__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22714_ _22713_/X _29733_/Q _22779_/A1 _29883_/Q _22727_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29270_ _29270_/Q _32291_/CLK _29270_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_282_2784 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27679__S _27683_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26482_ _26509_/C _26482_/X _31703_/Q _26539_/A _26492_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_0_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24098__A1 _30585_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23694_ _20671_/C _23693_/X _31558_/Q wire1609/X _23695_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_hold145_A hold145/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25077__C_N _24947_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24098__B2 _30521_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16575__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17772__A1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25295__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24892__A _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32090__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28221_ _28221_/Q _30269_/CLK _28221_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_3690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14586__A1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25433_ _25430_/A _31297_/Q _24502_/X _24543_/D _25433_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_22645_ _22646_/B _22627_/C _22633_/A _22631_/X _29875_/Q _23140_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_273_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15783__B1 _15782_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22648__A2 _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30532__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14195__A _14195_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3885_A wire3886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31658__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_5081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20659__A1 _31189_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_288_core_clk _30250_/CLK clkbuf_5_23_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_13_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28152_ _28152_/Q _29389_/CLK _28152_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20659__B2 _31188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25364_ _25374_/D _31273_/Q _31275_/Q _31274_/Q _25364_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_259_2219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22576_ VGND VPWR _22578_/S wire3700/X _30349_/Q _22576_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_2492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16327__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22616__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18721__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27103_ _23599_/B _27102_/X wire772/X _32029_/Q _32029_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_217_core_clk _32295_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_13_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24315_ _24357_/B1 _24315_/Y wire1668/X wire2017/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_82_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21527_ _21529_/C _21619_/D _21527_/Y _21529_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__15535__B1 wire1069/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28083_ _28083_/Q _32113_/CLK _28083_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3049_A _18113_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25295_ _25295_/X _25380_/C _31262_/Q _25414_/B1 _31361_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__26795__B1 wire777/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27034_ _27009_/A _31997_/Q _27036_/B _26970_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_191_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_5536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24246_ _30922_/D _26542_/B _31758_/Q _24246_/B _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__30682__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_5254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21458_ _21632_/A _21458_/Y _21777_/B _21444_/A _21454_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 XFILLER_110_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24270__A1 _31659_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21459__C _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21084__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20363__C _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17288__B1 wire4181/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_Di0[6] wire2347/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20409_ VGND VPWR _20412_/S _27701_/A1 _28931_/Q _28931_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[31] _19637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26547__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27854__A_N _25810_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17827__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24177_ wire733/A _24957_/B _31183_/Q _31151_/Q wire1289/X VGND VPWR _24176_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_wire2184_A _19594_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21389_ _21649_/D _21649_/C _21391_/B _21389_/D _21677_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__26969__D _31997_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26011__A2 _14174_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26331__B _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23128_ VGND VPWR _23128_/X _23126_/X _23127_/X _23125_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_1_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3959 _22616_/S _22598_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24022__A1 wire4122/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1198 VPWR VGND _15759_/A2 fanout1194/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28985_ _28985_/Q _32321_/CLK _28985_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_270_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20660__A _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24022__B2 _28722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31038__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_2870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18237__C1 _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15950_ _15950_/X _15936_/X _15949_/X _15944_/X _15940_/X wire917/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__25770__A1 _32095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27936_ _27936_/Q _30269_/CLK _27936_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23059_ VGND VPWR _23059_/X _23057_/X _23058_/X _21101_/A _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2351_A wire2352/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput110 VGND VPWR _30670_/D la_input[43] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__29085__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2449_A _24238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22584__A1 _30353_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21387__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18788__B1 _18779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput121 la_input[53] _30650_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_4_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_5025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_2291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput132 VGND VPWR _30630_/D la_input[63] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_14901_ _29141_/D _14901_/B _14901_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_267_3948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_2876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput143 VGND VPWR _30610_/D la_input[73] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_277_995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15881_ wire1533/X wire3276/X _29071_/Q _15881_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_40_2144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27867_ _27867_/Q _30378_/CLK _27867_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_20_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput154 VPWR VGND la_input[83] _30590_/D VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_249_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16799__C1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput165 _30570_/D la_input[93] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_79_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15066__A2 _15765_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16263__A1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput176 mprj_dat_i[11] input176/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_17620_ _17620_/X _17873_/B1 _31708_/Q _31712_/Q _17874_/A2 VGND VPWR _17619_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_183_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29606_ _29606_/Q _32127_/CLK _29606_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24325__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25522__A1 _28440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14832_ _14832_/X _29462_/Q _14831_/X _15629_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_59_2928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput187 VPWR VGND input187/X mprj_dat_i[21] VGND VPWR NF_sky130_fd_sc_hd__buf_2 X_26818_ _23599_/B _26817_/Y _26835_/A _31859_/Q _31859_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_76_3943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30062__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput198 input198/X mprj_dat_i[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__31188__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27798_ VGND VPWR _27801_/S _25031_/B _32521_/Q _32521_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14274__B1 _25163_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23533__A0 hold231/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22336__A1 _18215_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_2083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19737__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14813__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32433__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20347__A0 _28887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29537_ _29537_/Q _32425_/CLK _29537_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17551_ VGND VPWR _26470_/B _31626_/Q _17550_/X _17551_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_14763_ VGND VPWR _15516_/S _30490_/Q _30776_/Q _14763_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26749_ _26748_/Y _23599_/B _31827_/Q _26754_/B _31827_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_53_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_92_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3560_A _30993_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16015__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_930 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26078__A2 _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16502_ _16502_/X _30790_/Q _16828_/A2 _16832_/A3 _16068_/S _16501_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_246_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_941 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18555__A3 _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17358__A4 _17357_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_952 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17482_ _27230_/C _26539_/A _26509_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_29468_ _29468_/Q _32316_/CLK _29468_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_161_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14694_ VGND VPWR _14694_/X _14693_/X _14692_/X _14823_/A1 _14823_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_264_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_963 _18805_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24089__B2 wire3637/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25286__B1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28922__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_974 _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19221_ _19213_/X _19220_/X _22090_/B1 _19215_/X _19221_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_57_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_985 wire807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16433_ _16817_/A2 _16817_/A1 _28854_/Q _16433_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_122_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28419_ _28419_/Q _32428_/CLK _28419_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14577__A1 _14937_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_996 _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15774__B1 _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29399_ hold471/A _31920_/CLK _29399_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_31_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2985_A _18507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32583__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31430_ _31430_/Q _32464_/CLK _31430_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19152_ _28294_/Q _19152_/X _19180_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_220_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22103__A4 _18683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16364_ _16363_/X _16362_/X _16364_/X _16838_/A1 _16361_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_177_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_5165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16318__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22526__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21311__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output486_A _31091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18712__B1 _18797_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23849__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18103_ VGND VPWR _18109_/S wire3863/X _28032_/Q _28032_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_5018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15315_ _16781_/A2 _15560_/A1 _32129_/Q _15315_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_31_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19083_ _19082_/X _22088_/B1 _19358_/A2 _28162_/Q _19083_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14329__B2 _14326_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15526__B1 _15319_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31361_ VGND VPWR _31361_/D _31923_/CLK _31361_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_275_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16295_ _29178_/Q _16929_/S _16295_/Y _16294_/X _16930_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XANTENNA__16869__A3 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_1006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4199_A wire4200/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26250__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18034_ VGND VPWR _18034_/S wire3869/X _27966_/Q _27966_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30312_ _30312_/Q _30402_/CLK _30312_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15246_ VGND VPWR _15756_/S _29023_/Q _28991_/Q _15246_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19268__A1 wire1813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31292_ _31292_/Q _31763_/CLK _31292_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_3763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24741__S _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output653_A wire2686/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3090 _17947_/S _17946_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_9_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26522__A _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_4077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_3906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput606 _28706_/Q la_output[93] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21075__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31785__D _31785_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17279__B1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput617 _23618_/C mprj_adr_o[13] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30243_ _30243_/Q _30477_/CLK _30243_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26538__B1 _32577_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17818__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15177_ _15177_/X _30501_/Q _15176_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_155_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput628 _24610_/B mprj_adr_o[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_218_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput639 wire2425/X mprj_adr_o[5] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_4_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26002__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28302__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29428__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23357__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14128_ wire3495/X _14127_/A _14128_/X wire3235/X _29492_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_171_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_2607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30174_ _30174_/Q _30392_/CLK _30174_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24013__A1 _24004_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17863__B _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19985_ VGND VPWR wire1319/A wire2308/X _19628_/X _19985_/X _26153_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_4_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27056__C _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_2183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18936_ _28382_/Q _19189_/A2 _28382_/D _18924_/X _18935_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14059_ _31746_/Q _14059_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__21385__B _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20035__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30405__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_288_1714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20586__A0 _29101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19440__A1 wire2952/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18867_ _18867_/X _19374_/B _28056_/Q _19296_/B1 _18866_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XANTENNA_hold19_A hold19/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25108__A4 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15057__A2 _15765_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16254__A1 wire1048/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29578__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23119__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24316__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17818_ _31650_/Q _14067_/A _17818_/X _14294_/X _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19991__A2 _24955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22327__A1 _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18798_ _18798_/X wire1950/X _27861_/Q wire1994/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XANTENNA__23524__A0 _31966_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18694__B _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire702_A wire702/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20338__A0 _28878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17749_ VGND VPWR _17749_/X _17596_/C _17488_/B _17576_/C _17488_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_286_1471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_2167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30555__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2129 VGND 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VPWR _20785_/S _27489_/A1 _29274_/Q _29274_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23105__B _23170_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16557__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17754__A1 _17753_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18951__B1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_1720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19419_ VGND VPWR _19419_/S _27710_/A1 _28435_/Q _28435_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25601__A _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30864__D _30864_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20691_ VGND VPWR _20708_/S _29207_/Q _27234_/A0 _29207_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17916__A_N _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_2498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_381_core_clk _30433_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_121_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22430_ _29690_/Q _30406_/Q _22432_/B _29688_/Q _29449_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_69_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31628_ _31628_/Q _31726_/CLK _31628_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_197_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25320__B _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17506__A1 _31761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18580__D_N _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23759__C _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31950__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_310_core_clk _30225_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_69_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22361_ _29930_/D _22385_/B1 _30469_/Q hold259/A _22356_/B VGND VPWR _22360_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_12_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31559_ _31559_/Q _31846_/CLK _31559_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_248_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16714__C1 wire1060/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_3549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18215__A _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24100_ _28506_/Q _27053_/A wire808/A _28698_/Q _20061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_fanout1057_A wire1060/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26241__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14415__S1 _21550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_3238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21312_ _21659_/B _21312_/A _21674_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_134_4204 VGND VPWR VGND VPWR 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_28710_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_216_3858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32306__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23775__B _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold331 hold331/A hold331/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__22802__A2 _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3466_A _31660_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4029 VPWR VGND wire4029/X _28674_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_119_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1224_A fanout1225/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold342 hold342/A hold342/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_82_2734 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__decap_4 X_21174_ VGND VPWR _21202_/S _29616_/Q _27679_/A1 _29616_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_60_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_2873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold375 hold375/A hold375/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_5_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_60_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24004__B2 _28593_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold386 hold386/A hold386/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_4313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout800 VPWR VGND _27098_/C _24315_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22015__A0 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold397 hold397/A hold397/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16493__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15296__A2 _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2605 VPWR VGND _23813_/D _23849_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_77_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1809 VPWR VGND wire1812/A _19514_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18219__C1 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20125_ _26861_/C1 _20124_/Y _20124_/A _28708_/Q _28708_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_167_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout822 _23307_/Y _23334_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_249_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28770_ _28770_/Q _32442_/CLK _28770_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2627 VPWR VGND _19530_/B _14213_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30085__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25982_ VGND VPWR _25982_/X _25982_/B _25982_/A _26017_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_252_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2638 VPWR VGND wire2638/X _14206_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_4647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout844 _20122_/A _20061_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22566__A1 wire3707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1904 VPWR VGND wire1904/X wire1905/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_232_1746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31330__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27721_ VGND VPWR _27728_/S _25023_/B _32453_/Q _32453_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout866 _19646_/X _19695_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32456__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24933_ _24933_/Y _24933_/B _24955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__20577__A0 _29093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20056_ _20056_/Y _24953_/B wire853/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19431__A1 _19430_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_4_0_0_core_clk clkbuf_5_1_0_core_clk/A clkbuf_4_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout888 _16971_/Y _17238_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_223_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15048__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1948 VPWR VGND wire1948/X wire1948/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16245__A1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout949_A _16124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20041__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17442__B1 hold37/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_4314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3800_A wire3800/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25504__A1 _19498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27652_ VGND VPWR _27654_/S wire2242/X _32391_/Q _32391_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19982__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26701__B1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24864_ _24864_/Y _31034_/Q _31036_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_227_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold262_A hold262/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23515__A0 _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22318__A1 _29904_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17993__A1 wire3894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28945__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1952_A wire1948/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26603_ _26603_/X _31773_/Q _31775_/Q _31774_/Q _26595_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__20329__A0 _28869_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23815_ wire1812/A _23814_/X _31814_/Q wire1625/X _23816_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22838__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_204 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27583_ _25643_/C _32163_/Q _27584_/A _25643_/B _32155_/Q _32171_/Q _32147_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__18096__S _18118_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24795_ _24795_/X _24639_/B _24805_/A _24805_/B _24794_/X _26123_/D VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA_215 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22200__A _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16609__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19195__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_226 _17280_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31480__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1858_A _14404_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_3657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29322_ _29322_/Q _32353_/CLK _29322_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_237 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13822__A _31124_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26534_ _26536_/B _26537_/A _31751_/D _26534_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_243_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_248 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23746_ _31770_/Q _23750_/A _31769_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_20958_ VGND VPWR _20958_/S _30164_/Q _29423_/Q _29423_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_259 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16548__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17745__B2 _31727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18942__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14559__A1 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29253_ _29253_/Q _32067_/CLK _29253_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_141_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25511__A _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17596__A_N _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17013__B _17013_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26465_ _26470_/B _31616_/Q _26465_/X _31620_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_54_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23677_ _23677_/X wire1628/X _31555_/Q _24139_/A2 _31507_/Q _23737_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_278_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_4131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20889_ VGND VPWR _23477_/S _20888_/X _29373_/Q _29373_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_17_3392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_4929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15220__A2 wire1113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28204_ _28204_/Q _30462_/CLK _28204_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25416_ _25416_/A _25416_/B _25416_/C _25424_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_22628_ _29875_/Q _22628_/Y _22649_/B _22663_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 X_29184_ _29184_/Q _32320_/CLK _29184_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_4271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26396_ _27117_/C1 _26395_/Y _26386_/X _31685_/Q _31685_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_161_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20655__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21250__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21924__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28135_ _28135_/Q _30272_/CLK _28135_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15508__B1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25347_ _25413_/A _25346_/Y _25354_/D _31272_/Q _25347_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_30_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22559_ VGND VPWR _22619_/S hold210/A wire3703/X _30056_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_158_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18170__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length821 VPWR VGND wire820/A _23317_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_178_3485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20374__B _25722_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_2341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_1949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15100_ VGND VPWR _15702_/S _30499_/Q _30785_/Q _15100_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28325__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16080_ VGND VPWR _16826_/S _29215_/Q _29279_/Q _16080_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28066_ _28066_/Q _30454_/CLK _28066_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_4648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25278_ _31259_/Q _31295_/Q _25289_/A _31257_/Q _31258_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA_input78_A la_input[14] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_48_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22870__A _22870_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16720__A2 wire996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25440__B1 _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25884__C _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14372__B _31005_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_1602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21057__A1 _30050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15031_ VGND VPWR _15031_/X _15277_/S _15640_/C1 _15030_/X _15029_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27017_ _31989_/Q _27028_/A _31990_/Q _27020_/D _27018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xmax_length887 VPWR VGND _17089_/S wire886/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14731__A1 wire3249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24229_ VGND VPWR _24232_/S _30905_/Q _27697_/A1 _30905_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25991__A1 _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_4973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_3677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3723 VPWR VGND _18201_/A _30327_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30428__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21486__A _30473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_Di0[14] _14174_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_3084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3745 VGND VPWR wire3746/A _30223_/Q VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_117_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19670__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_4979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26535__A3 _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28475__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15287__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16484__A1 _16956_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3778 VPWR VGND _14408_/A _14407_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_113_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_289_2724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25743__A1 _25567_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19770_ _19776_/B _20128_/A _19770_/A _19770_/X _19770_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA_wire2733_A _14153_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29720__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3851 wire3852/X wire3851/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16982_ wire886/A _13831_/Y _16979_/B _16979_/A _16982_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26940__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28968_ _28968_/Q _32309_/CLK _28968_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_5303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20017__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3873 VPWR VGND wire3873/X wire3873/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18721_ VGND VPWR _18721_/X _19379_/B _19367_/B1 _28340_/Q _18720_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xwire3884 VPWR VGND wire3884/X _29849_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15933_ _16081_/A2 wire3276/X _29275_/Q _15933_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_232_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3967_A _23221_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3895 VPWR VGND wire3895/X wire3896/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_27919_ _27919_/Q _30279_/CLK _27919_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19422__A1 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_20_3_core_clk_A clkbuf_opt_20_3_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA__23346__B_N _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output234_A _14037_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28899_ _28899_/Q _32569_/CLK _28899_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30578__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3775_A _23061_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16236__A1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_4179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19390__S _19415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27496__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26299__A2 _14170_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17433__B1 wire2021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2900_A _20615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19973__A2 _24937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30930_ VGND VPWR _30930_/D _31966_/CLK _30930_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_265_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18652_ VGND VPWR _18657_/S wire3831/X _28365_/Q _28365_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_59_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31823__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15864_ _15864_/X _32111_/Q _16448_/A2 _16448_/A3 _16120_/S _15863_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_248_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26838__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14247__B1 _29511_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16787__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27591__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17603_ _17603_/Y _17720_/S _17603_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_163_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29870__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14815_ _14815_/X wire1202/X _14812_/X _14814_/X wire1089/X _14810_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14798__A1 _30491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18583_ _18582_/X _30421_/Q _18573_/X wire3682/X _21103_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 X_30861_ _30861_/Q _31577_/CLK _30861_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_280_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15795_ VGND VPWR _15795_/X _16249_/S wire1032/X _15792_/X _15794_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22110__A _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_2329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32600_ _32600_/A _32600_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_106_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19725__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_3074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17534_ _26441_/A _17536_/B _17563_/A _17462_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21bai_1 XANTENNA_wire1032_A wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14746_ _14747_/A wire1221/X _14743_/X _14745_/X _14919_/C1 _14741_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_1 XFILLER_166_2187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4114_A _28570_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30792_ _30792_/Q _32359_/CLK _30792_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16539__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17736__A1 _31718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25259__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_760 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18933__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26613__B1_N wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5227 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18019__B _18434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_139_core_clk _30503_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_232_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31973__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_771 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32531_ _32531_/Q _32531_/CLK _32531_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_2561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2266_A _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17465_ _31050_/Q _31052_/Q _17465_/Y _17465_/D _31684_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_35_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_782 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30684__D _30684_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_4504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29100__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14677_ _14676_/X wire1104/X _14882_/A2 _29458_/Q _14677_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_70_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16944__C1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_793 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19204_ _19204_/X _19201_/X _22090_/B1 _19203_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__26471__A2 _26441_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16416_ _16815_/A2 _16416_/X _16415_/X _15975_/S _29224_/Q _16722_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_239_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32462_ _32462_/Q _32473_/CLK _32462_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17396_ _30949_/Q _30983_/Q wire3565/X _30843_/Q wire3192/X _17400_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__22088__A3 wire2273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24482__A1 _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21160__S _21168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20099__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19135_ _19134_/X _19318_/B1 _19203_/A2 _28165_/Q _19135_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31413_ _31413_/Q _32310_/CLK _31413_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16347_ wire3237/A _23395_/B _16347_/X _16814_/B1 _30786_/Q _14544_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_217_4813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26759__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31203__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32393_ _32393_/Q _32401_/CLK _32393_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32329__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18161__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26223__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19066_ VGND VPWR _19066_/X _19357_/B _22088_/B1 _27906_/Q _19065_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__29250__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23876__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31344_ _31344_/Q _31803_/CLK _31344_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_31_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16278_ VGND VPWR _16842_/S _29252_/Q _16277_/X _16278_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_26_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21099__C _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16711__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2600_A _24612_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21048__A1 _30043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18017_ VGND VPWR _18017_/S wire3814/X _27951_/Q _27951_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_9_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_3706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput403 _13798_/Y la_oenb[25] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28818__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15229_ VGND VPWR _15229_/X _28926_/Q _15575_/A _15575_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14722__A1 _29041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31275_ _31275_/Q _32294_/CLK _31275_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_83_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput414 _13881_/Y la_oenb[35] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_135_3834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1666_A _19511_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19792__C _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_Di0[27] wire2731/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput425 _13871_/Y la_oenb[45] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_174_3894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2506_A wire2513/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput436 wire3367/X la_oenb[55] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_42_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23993__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_1014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27782__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30226_ _30226_/Q _30446_/CLK _30226_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31353__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput447 _13915_/Y la_oenb[65] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32479__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19661__A1 _28491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput458 _13905_/Y la_oenb[75] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_96_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20504__S _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_3195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput469 _13895_/Y la_oenb[85] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_253_2171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16475__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30157_ hold199/A _32269_/CLK _30157_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_1872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26931__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19968_ _19967_/X _28632_/Q _28632_/D _19968_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_7_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14486__B1 _14464_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22548__A1 _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15683__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28968__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18201__C _18249_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire917_A wire918/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24942__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20559__A0 _29075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18919_ _28350_/Q _19185_/S wire1924/A _18919_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_263_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17019__A3 _21661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19413__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30088_ VGND VPWR _30088_/D _31971_/CLK _30088_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_267_4980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30859__D _30859_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19899_ _19898_/X _28599_/Q _28599_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__27293__C_N _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24500__A _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16227__A1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27487__A1 wire1837/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20023__A2 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_4221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19964__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18767__A3 _18765_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21220__B2 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21930_ _21674_/B _21626_/C _21930_/X _21712_/X _21925_/B _21626_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_77_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_3518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17975__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_6_0_core_clk clkbuf_opt_6_1_core_clk/A clkbuf_5_2_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_181_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14789__A1 _29558_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21861_ _21960_/A _21860_/X _21861_/Y _21859_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_129_2926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19313__B _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27992__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19177__B1 _19177_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24170__B1 wire1328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23600_ _30763_/D _25881_/D _31087_/Q _26386_/A _24881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_270_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20812_ VGND VPWR _20813_/S _29325_/Q _27701_/A1 _29325_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_1815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24580_ _25750_/B _27280_/C _24581_/C _31414_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_36_2511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21792_ _21793_/B _21791_/X _21640_/X _21708_/B wire743/A _21708_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__17727__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22181__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_3384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_3838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18924__B1 _18923_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17727__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14457__B _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2814 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_2863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23550__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23531_ VGND VPWR _23532_/S _30452_/Q _30022_/Q _30452_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25331__A _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20743_ VGND VPWR _20743_/S _27698_/A1 _29258_/Q _29258_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18644__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22674__B _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15202__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_2749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26462__A2 _26476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28348__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26250_ _26509_/D _26249_/X _26263_/A wire3465/X _31613_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_101_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_4063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23462_ _23462_/X wire3993/X _22141_/C _13844_/Y wire3996/X VGND VPWR _23461_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_14_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28064__D _28064_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20674_ _29199_/D _25738_/C _20672_/X _20673_/X _20671_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XANTENNA__22166__S _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24473__A1 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_4209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_88_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25670__B1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21070__S _21077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19686__D _20100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25201_ _24572_/B _25200_/X _31357_/Q _25416_/A _25201_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_259_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22413_ VGND VPWR _22619_/S _29969_/Q _21955_/A _29969_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_2121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21287__B2 _29773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22484__B1 _30003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14961__A1 _15350_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26181_ _31579_/Q _24820_/B _26182_/B _32107_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_274_4962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23393_ VGND VPWR _23393_/X _23393_/B _23393_/A _23393_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_wire3583_A wire3584/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14473__A hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18152__A1 _18499_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_2320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20194__B _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25132_ _25142_/B _25132_/Y _31203_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_22344_ _22344_/Y _18236_/Y _18216_/X _22372_/A2 _22384_/B _18235_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_197_1947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_4050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold108_A hold108/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28498__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14713__A1 _29211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25063_ _25079_/A wire1296/X _25063_/X _25063_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_212_4209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29940_ hold284/A _30911_/CLK _29940_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_62_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22275_ _22272_/X wire826/X _22243_/A _22243_/C _22275_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15910__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29743__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_4401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3848_A wire3849/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2066 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19101__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24014_ _28466_/Q _24139_/A2 _24014_/X _28594_/Q _24046_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__23984__B1 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27692__S _27709_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21226_ VGND VPWR _22448_/C _18661_/A hold384/A _21226_/X _29689_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 Xhold150 hold150/A hold150/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_112_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3103 VPWR VGND _17223_/S _18664_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20798__A0 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27175__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29871_ VGND VPWR _29871_/D _31998_/CLK _29871_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_134_3355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2307 VPWR VGND wire2308/A fanout2307/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold161 hold161/A hold161/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20414__S _20414_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_2050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold172 hold172/A hold172/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15269__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16466__A1 _28099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold183 hold183/A hold183/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_4733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_2072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3136 VPWR VGND _23516_/S _23530_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold194 hold194/A hold194/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_28822_ _28822_/Q _32134_/CLK _28822_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13817__A _31129_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30720__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2402 VPWR VGND wire2402/X wire2404/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21157_ VGND VPWR _21168_/S _29600_/Q wire1792/X _29600_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1606 wire1609/A _23805_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire3147 _19429_/D _19428_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__31846__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26922__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_2878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2413 _19788_/D _19859_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_154_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1617 VPWR VGND wire1619/A _19788_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_4717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19721__D_N wire1376/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22539__A1 _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2424 VPWR VGND wire2424/X _19784_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_232_1532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1639 wire1643/A _27122_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_112_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20108_ _20108_/Y _26884_/B _20122_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_95_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_A0[7] wire2599/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29893__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28753_ _28753_/Q _32302_/CLK _28753_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19404__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1712 VPWR VGND _23533_/S _23532_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_4466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2457 VPWR VGND _23593_/S _23573_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21088_ VGND VPWR _21090_/S _27507_/A1 _29539_/Q _29539_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25965_ VGND VPWR wire754/X _27058_/B _31497_/Q _31497_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_98_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30769__D _30769_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2468 VPWR VGND _21744_/S _21643_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27478__A1 _32297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20014__A2 wire2660/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17415__B1 input191/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27704_ VGND VPWR _27710_/S _27704_/A1 _32438_/Q _32438_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19955__A2 _19955_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20039_ _25676_/B1 _20038_/X wire847/A _28666_/Q _28666_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_24916_ _25776_/C _24915_/Y _24941_/A _31102_/Q _31102_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19504__A _24594_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input132_A la_input[63] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28684_ VGND VPWR _28684_/D _31577_/CLK _28684_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14229__B1 hold374/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2147_A _19774_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25896_ VGND VPWR _26153_/A _25895_/Y _31465_/D _25903_/S _19546_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_4 Xwire1767 VPWR VGND _20654_/A _24467_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17966__A1 wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25489__B1 _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16769__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27573__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21762__A2 _14405_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21245__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30870__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_2031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31996__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27635_ VGND VPWR _27636_/S wire2234/A _32377_/Q _32377_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26150__A1 _31564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24847_ _24847_/C _24847_/Y _26539_/B _31064_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_262_3631 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20970__A0 _29435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17430__A3 _30883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29123__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_4008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14648__A _14648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20369__B _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14600_ wire3249/A _15770_/A _14600_/X _15296_/B1 _29553_/Q wire1693/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_145_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19707__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14490__A2_N _14086_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3189_A _17248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15580_ VGND VPWR _15627_/S _29611_/Q _29643_/Q _15580_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_5386 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27566_ VGND VPWR _27560_/X _31382_/Q _25682_/B _27566_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_261_467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24778_ _24778_/C _24786_/C _24786_/B _24777_/Y _24779_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_1 XFILLER_240_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18915__B1 wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22711__A1 _30093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14367__B _14367_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29305_ _29305_/Q _32548_/CLK _29305_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_232_core_clk _31363_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_14531_ VGND VPWR _14309_/X _22444_/B _29981_/Q _21103_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_279_4851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26517_ _26515_/X _17508_/X _17504_/Y _26537_/A _26539_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_4 XFILLER_180_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20722__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30100__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23729_ _30817_/D _23807_/B _23729_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_223_2936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26989__B1 _27000_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31226__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27497_ VGND VPWR _27517_/S _27690_/A1 _32312_/Q _32312_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_5449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18391__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17194__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3356_A _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27650__A1 wire2259/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17250_ _30959_/Q _17251_/B _30927_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_29236_ _29236_/Q _30507_/CLK _29236_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14462_ _14462_/X _14456_/Y _14457_/Y _14459_/X _14089_/Y _30436_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 X_26448_ _26448_/Y _26446_/Y _17481_/Y _26447_/X _26476_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XANTENNA__29273__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20385__A _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14401__B1 _14367_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16201_ _16201_/X _30782_/Q _16818_/A2 _16722_/B2 _16720_/C1 _16200_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_30_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18679__C1 _19069_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17181_ _17234_/A1 _30398_/Q _17181_/X wire3791/X _29438_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29167_ _29167_/Q _32403_/CLK _29167_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2683_A wire2684/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14393_ _17424_/C _31053_/Q _26470_/B _14393_/B _31052_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_256_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26379_ _26378_/X _31677_/Q _31677_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_224_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25895__B _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18143__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3523_A _31047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_1919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26205__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19340__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27402__A1 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_1979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16132_ VGND VPWR _16443_/S _29014_/Q _28982_/Q _16132_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28118_ _28118_/Q _30425_/CLK _28118_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31376__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24216__A1 _30892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29098_ _29098_/Q _30425_/CLK _29098_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19891__A1 _28595_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22490__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14704__A1 _32304_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22227__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16063_ _16063_/X _28812_/Q _16828_/A2 _16832_/A3 _16068_/S _16062_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28049_ _28049_/Q _30254_/CLK _28049_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_215_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25964__A1 _26775_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15901__B1 _29587_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_4148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2948_A _20282_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22778__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23846__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24304__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15014_ wire1065/X _29144_/D _14995_/X _15013_/X _15004_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 Xfanout3520 VPWR VGND _26539_/A _31056_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23975__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31060_ _31060_/Q _32295_/CLK _31060_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_174_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3531 wire3536/A _25577_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_152_4189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20324__S _20324_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3542 _14300_/B _14303_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_117_3575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3553 VPWR VGND wire3555/A _30995_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_117_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30011_ _30011_/Q _30399_/CLK _30011_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17654__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19822_ _19821_/X _28563_/Q _28563_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__25716__A1 _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18997__A3 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15665__C1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23727__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24924__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2874 VPWR VGND _21092_/S wire2877/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_231_1020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19753_ _25904_/A _19752_/Y _19772_/A _28533_/Q _28533_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire3681 VPWR VGND _18580_/A _30423_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25416__A _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25192__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2885 _20618_/X _20638_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16965_ _16965_/A2 _16725_/C _30918_/Q _16965_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire3692 VPWR VGND wire3692/X _30354_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_output616_A _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16209__A1 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27469__A1 _32291_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20005__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18704_ VGND VPWR _23304_/C _30289_/Q _30379_/Q _18704_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_94_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15680__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19946__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15916_ VGND VPWR wire969/X _28840_/Q _28872_/Q _15916_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire2980 VPWR VGND _18523_/S _18512_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_182_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31962_ _31962_/Q _31962_/CLK _31962_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19684_ _27070_/C _20061_/A _20165_/B _19684_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__25135__B _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1247_A _24171_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16896_ wire1010/X wire1482/X _29237_/Q _16896_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17957__A1 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22950__A1 _21404_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32001__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21155__S _21158_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4574 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18635_ VGND VPWR _18654_/S wire3885/X _28348_/Q _28348_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30913_ _30913_/Q _32327_/CLK _30913_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15847_ _15847_/B _15847_/X _15847_/A wire917/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_0_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15968__B1 _15950_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31893_ _31893_/Q _32280_/CLK _31893_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_76_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16249__S _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24152__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24974__B _25039_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15432__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2289_A _26435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18566_ _18567_/D _18566_/C _23236_/D _22620_/D _23393_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_30844_ _30844_/Q _31937_/CLK _30844_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_2700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20994__S _21018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15778_ VGND VPWR _16443_/S _29207_/Q _29271_/Q _15778_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17709__A1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22702__A1 _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29616__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2550_A _20261_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23370__S _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17517_ _13739_/Y _31746_/Q _17517_/X _26543_/A _31745_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_220_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20713__A0 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14729_ _14648_/A _14648_/C _28841_/Q _14729_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23105__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30775_ _30775_/Q _32350_/CLK _30775_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18497_ VGND VPWR _18497_/S wire3818/X _28270_/Q _28270_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18464__S _18464_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16917__C1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18382__A1 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32151__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19787__C _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_590 _22554_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27641__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32514_ _32514_/Q _32523_/CLK _32514_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15196__A1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27777__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17448_ VGND VPWR _17448_/X wire2061/X _17446_/X _17302_/A hold35/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_144_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold86_A hold86/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24455__A1 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24990__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31719__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21269__A1 _29731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_3964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14943__A1 _15266_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32445_ _32445_/Q _32464_/CLK _32445_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28640__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17379_ _30946_/Q _30980_/Q wire3570/X _30840_/Q _17248_/X _17383_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__21808__A3 hold279/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29766__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18134__A1 wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_4280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19331__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19118_ _19180_/B _28036_/Q _19117_/X _19118_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_1789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16145__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20390_ VGND VPWR _20391_/S _27237_/A0 _28912_/Q _28912_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24207__A1 _28548_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32376_ _32376_/Q _32388_/CLK _32376_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19882__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24207__B2 wire4020/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16696__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22218__B1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31327_ _31327_/Q _31363_/CLK _31327_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_5533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1950_A wire1951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19049_ _19049_/X _27969_/Q _19109_/S wire1984/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25955__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30743__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31869__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_4256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19744__D_N wire1376/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22769__A1 _21392_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_36_core_clk _32531_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xoutput222 _32578_/Q flash_io0_oeb VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23966__B1 _23964_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28790__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput233 _14038_/Y la_iena[102] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22060_ _22059_/X _21708_/Y _22060_/X _22057_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_31258_ VGND VPWR _31258_/D _31282_/CLK _31258_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xoutput244 _14028_/Y la_iena[112] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20234__S _20249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19308__B _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_3176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput255 _14018_/Y la_iena[122] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_4765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput266 _13774_/Y la_iena[17] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21011_ VGND VPWR _21013_/S _29476_/Q _27507_/A1 _29476_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_83_2884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_5055 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput277 _13764_/Y la_iena[27] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30209_ _30209_/Q _30471_/CLK _30209_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_211_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput288 _13975_/Y la_iena[37] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_211_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23981__A3 _23980_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31189_ _31189_/Q _32578_/CLK _31189_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput299 _13965_/Y la_iena[47] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_2475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_2125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16999__A2 wire3733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23718__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15656__C1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21992__A2 _21672_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23545__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30893__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_3620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26380__A1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25326__A _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28020__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19398__A0 _28414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23772__C _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29146__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18639__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_5473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_5364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15671__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25750_ _25750_/B _31414_/D _25750_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_wire3331_A wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24930__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22962_ VGND VPWR _22965_/S _30474_/Q hold233/A _30139_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25045__B _25069_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3429_A wire3430/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17948__A1 wire3816/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22941__A1 _30453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24701_ _31473_/Q _24701_/D _24706_/B _31475_/Q _31474_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 X_21913_ _21913_/X _21902_/A _21890_/B _21890_/A _21561_/Y _21530_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__26132__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20952__A0 _29417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25681_ _25680_/X _25681_/B1 _31390_/Q _25661_/X _31390_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30123__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31249__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22893_ _22910_/A _22893_/X _22910_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_149_2160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20189__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24143__B1 _24141_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27420_ VGND VPWR _27421_/S _32267_/Q _27278_/X _32267_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26683__A2 _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24632_ _24389_/A _17895_/B _24632_/Y _31551_/Q _31545_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_1 XFILLER_38_2639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21844_ VGND VPWR _21844_/S _21956_/A _21812_/B _21844_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29296__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22154__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25891__B1 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23280__S _23283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27351_ VGND VPWR hold144/A _32206_/Q _27268_/X _32206_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25061__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20704__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24563_ _24565_/B _24567_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_77_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21775_ VGND VPWR _21775_/X _21775_/B _21775_/A _21775_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_164_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18374__S _18399_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3798_A _21389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18373__A1 hold271/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17176__A2 _21674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27093__C1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26302_ _26301_/Y _27117_/C1 _31639_/Q _26301_/B _31639_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_279_2701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27632__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23514_ VGND VPWR _23514_/S _23513_/X hold433/X _30443_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_5447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30273__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27687__S _27696_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20726_ VGND VPWR _20752_/S _27236_/A0 _29241_/Q _29241_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27282_ _31383_/Q _31384_/Q _27358_/A _27413_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__31399__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15187__B2 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16384__B1 wire921/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17498__B _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24494_ VGND VPWR _31368_/Q _31369_/Q _25186_/D _25632_/B _31367_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA_hold225_A hold225/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20409__S _20412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29021_ _29021_/Q _32125_/CLK _29021_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_1347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_4746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1915_A wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26233_ _31605_/Q _24820_/B _26234_/B _32295_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_279_2756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14934__A1 _32422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19994__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23445_ _29838_/Q _23445_/X _29380_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_257_3733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_3966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24997__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20657_ _20658_/B _20657_/C _23879_/A _23876_/B _20657_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__18125__A1 wire3902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19322__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_61 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27888__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2911 VPWR VGND _20458_/S _20473_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_99_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26164_ _26164_/Y _26164_/A _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__16136__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3667 VPWR VGND _18546_/A _30443_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xmax_length2922 _20410_/S _20406_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_23376_ VGND VPWR _23376_/S _30354_/Q _29672_/Q _30354_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26199__B2 _32278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17010__C _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28522__D wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19873__A1 _28586_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17333__C1 _17330_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20588_ VGND VPWR _20589_/S wire2013/X _29103_/Q _29103_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_190_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_4470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22472__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16687__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25115_ _25113_/Y _25148_/A _31197_/D _25122_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__14147__C1 _22520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17718__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22327_ _22328_/A _29913_/D _22326_/X _18179_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21bai_1 XFILLER_49_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_2172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25946__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26095_ _31544_/D _26020_/Y _24602_/A _31544_/Q _26120_/A2 VGND VPWR _26094_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_7_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_3499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2097_A wire2098/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14698__B1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2988 VPWR VGND _18489_/S _18491_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_84_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_2607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23957__B1 _28620_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25046_ _25776_/C _25045_/X _25082_/A2 _31166_/Q _31166_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29923_ hold274/A _32365_/CLK _29923_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_22258_ _29344_/Q _30312_/Q _29343_/Q _18668_/C _22258_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_3_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_20_1_core_clk clkbuf_opt_20_2_core_clk/A clkbuf_opt_20_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_84_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20371__C _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27699__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21209_ VGND VPWR _22619_/S _29650_/Q _22614_/B _29650_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29854_ VGND VPWR _29854_/D _32444_/CLK _29854_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_clkbuf_leaf_35_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2264_A wire2264/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22189_ _22189_/X _22188_/X _30103_/Q _22281_/B2 wire2284/X VGND VPWR _22092_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__17100__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2210 VPWR VGND _26791_/B _19738_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_2_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1414 _22551_/S _22550_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_134_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25881__D _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32024__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1425 _27258_/A0 _18303_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_28805_ _28805_/Q _32402_/CLK _28805_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24906__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15111__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24778__C _24778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25174__A2 _25180_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1436 VPWR VGND _27697_/A1 _18273_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_207_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2243 VPWR VGND _27058_/B _19652_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29785_ hold279/A _29788_/CLK _29785_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_130_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1447 VPWR VGND _17524_/B _17523_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19389__A0 _28405_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26997_ _31982_/Q _31983_/Q _26999_/B _27001_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_147_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_2408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1531 VPWR VGND _15500_/C wire1531/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16750_ VGND VPWR _16929_/S _29233_/Q _29297_/Q _16750_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_3261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28736_ _28736_/Q _31796_/CLK _28736_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21196__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24921__A2 _19581_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23724__A3 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13962_ _28535_/Q _13962_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25948_ _31524_/Q _31488_/Q _31555_/Q _25934_/C _25948_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_281_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4812 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2529_A _20543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17939__A1 wire3843/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2298 VPWR VGND _26763_/A _32598_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_2148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28513__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14870__B1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1564 wire1564/X _14545_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__29639__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26659__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_4714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15701_ VGND VPWR _15701_/X _15692_/S _15730_/C1 _15700_/X _15699_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_60_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1575 VPWR VGND wire1575/X _26907_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_235_935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27320__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26993__C _27000_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1586 _24892_/C wire1587/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_210_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20943__A0 _29511_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16681_ VGND VPWR wire979/X _29029_/Q _28997_/Q _16681_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28667_ _28667_/Q _32546_/CLK _28667_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_245_3147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_2571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13893_ _28604_/Q _13893_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25879_ VGND VPWR _31429_/Q _31430_/Q _31458_/Q _25879_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14378__A _24424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32174__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16072__C1 wire951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24134__B1 _28637_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16611__A1 _16943_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18420_ VGND VPWR _18420_/S _28195_/Q wire3850/X _28195_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15632_ _15632_/X _15618_/X _15631_/Y _15632_/A1 _15622_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27618_ VGND VPWR _27618_/S _27698_/A1 _32360_/Q _32360_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_21_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28598_ _28598_/Q _31803_/CLK _28598_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24685__A1 _31469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23032__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30616__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14622__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_1783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_3232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18351_ VGND VPWR _18364_/S wire3860/X _28129_/Q _28129_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_91_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15563_ _15563_/X _29329_/Q _15718_/B1 _15723_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_27549_ _25643_/C _32224_/Q _27549_/X _25641_/A _32216_/Q _32232_/Q _32208_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_125_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28663__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18284__S _18284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23893__C1 _23892_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29789__CLK _29803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25402__C _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17167__A2 _22617_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18364__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3738_A _30224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17302_ _17302_/Y _17302_/B _17302_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_50_3039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27623__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14514_ _14505_/Y _14506_/X _14514_/X _14509_/X _14508_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15178__A1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18282_ VGND VPWR _22372_/A2 _29759_/Q _18281_/X _18283_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_30560_ hold127/A _32017_/CLK _30560_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_279_4692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15494_ VGND VPWR _15702_/S _32437_/Q _32365_/Q _15494_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20319__S _20322_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15717__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16914__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_4332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14825__B _14825_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25649__D_N _25648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17233_ _29905_/Q _22026_/A2 _21610_/B _22935_/A _22026_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_29219_ _29219_/Q _32324_/CLK _29219_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_141_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14445_ _30432_/Q _23231_/A _14445_/X _30433_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_236_4518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1491 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30491_ _30491_/Q _32430_/CLK _30491_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30766__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18116__A1 _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29019__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14544__C _14544_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32230_ _32230_/Q _32259_/CLK _32230_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27387__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17164_ _29896_/Q _21953_/A2 _21501_/A wire3932/X _22026_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_13_2171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire850 wire850/X wire851/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_14376_ _24407_/D _14376_/D _24407_/B _24407_/C _14383_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XFILLER_234_4220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19864__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_74_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22534__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16115_ VGND VPWR _16115_/X _16825_/S _16151_/A1 _16114_/X _16113_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xwire883 VPWR VGND wire883/X wire883/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_84_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21671__A1 _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_4996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32161_ _32161_/Q _32535_/CLK _32161_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire894 VPWR VGND wire894/X wire894/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_17095_ _17078_/C _21853_/A _17095_/X _17093_/Y _17094_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_4 XANTENNA_wire4181_A hold73/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21658__B _21659_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_4898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23948__B1 _23947_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31112_ _31112_/Q _32551_/CLK _31112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_2586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16046_ wire985/A _16046_/X _16045_/X _16825_/S _29525_/Q _16832_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16672__A1_N _16653_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15350__A1 _15350_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14153__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_5_27_0_core_clk_A clkbuf_5_27_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32092_ hold413/A _32233_/CLK _32092_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19616__A1 _28477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24070__C1 _24069_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23412__A2 _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29169__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3350 _26188_/A _26242_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_237_1273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31043_ VGND VPWR _31043_/D _31552_/CLK _31043_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_152_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_3168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23873__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4190 VPWR VGND _32604_/A wire4190/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_284_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23365__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19805_ wire881/X _19786_/B _19811_/A _19805_/X _26785_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__21674__A _21674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26362__A1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25165__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30146__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17997_ VGND VPWR _18008_/S _18478_/A1 _27931_/Q _27931_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_113_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18459__S _18460_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25704__A4 _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23176__A1 _30448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24373__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15653__A2 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16850__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19919__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19736_ _19760_/B _19973_/A1 _25039_/B _19736_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__32517__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21393__B _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21187__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24912__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23715__A3 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1970 VPWR VGND _19374_/B _18856_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28193__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16948_ VGND VPWR _16948_/S _30516_/Q _30802_/Q _16948_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_285_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1629_A wire1629/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14861__B1 wire1067/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1992 VPWR VGND wire1995/A _18678_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21726__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22923__A1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18052__A0 _27984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_154_core_clk _31507_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_146_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27311__A0 _32172_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26114__A1 _24594_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20934__A0 wire3974/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31945_ VGND VPWR _31945_/D _31945_/CLK hold225/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19667_ _27131_/B _19666_/X _19695_/A2 _28494_/Q _28494_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26114__B2 _31549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16879_ _16879_/X _28834_/Q _16934_/A2 _16928_/A3 _16884_/S _16878_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_34_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_206_5078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2573_A wire2576/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_2079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_5600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24125__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15405__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18618_ VGND VPWR _18622_/S wire3832/X _28332_/Q _28332_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_181_2202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30296__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27080__B _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31876_ _31876_/Q _32016_/CLK _31876_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19598_ _19598_/Y _20100_/B _19598_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_245_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25873__B1 _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2932_A _20348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31541__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19147__A3 _19136_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30827_ _30827_/Q _32015_/CLK _30827_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18549_ hold360/A _23238_/B _18549_/Y _22620_/A _22620_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_276_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18355__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17158__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22151__A2 _21034_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27075__C1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31033__D _31033_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19552__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27614__A1 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26417__A2 _31690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13920__A _28577_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_2683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15169__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21560_ _21569_/A _21559_/Y _21484_/A _21484_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21bai_4 XFILLER_37_2694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20162__A1 _28725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_332_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16366__B1 _29318_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24428__A1 _31014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30758_ _30758_/Q _30758_/CLK _30758_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_33_2536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16905__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26822__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20511_ VGND VPWR _20518_/S _27258_/A0 _29029_/Q _29029_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27300__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27090__A2 _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14916__A1 _28950_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24979__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30872__D wire704/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21491_ _21503_/B _21491_/A _21674_/A _21491_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XANTENNA__14916__B2 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18107__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30689_ _30689_/Q _31436_/CLK hold326/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31691__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19304__B1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23230_ _18554_/B _23229_/X _23491_/A0 _23393_/A _30220_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__16118__A0 _29280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5043 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27378__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32428_ _32428_/Q _32428_/CLK _32428_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21111__A0 _29555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20442_ VGND VPWR _20446_/S _28962_/Q _27700_/A1 _28962_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_2328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length2218 VPWR VGND _27737_/A1 _19734_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19855__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22454__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23161_ _23049_/A _21211_/B _23185_/B _30445_/Q _23161_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16669__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17866__B1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1517 _15546_/A3 _15738_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_20373_ wire836/X _25722_/C _25722_/D _27784_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA_wire3281_A wire3281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32359_ _32359_/Q _32359_/CLK _32359_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length1528 VPWR VGND _15567_/C _15707_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_217_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18223__A _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3379_A wire3380/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17330__A2 _31913_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1137_A _14549_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22112_ VGND VPWR _30028_/Q _22133_/D _22111_/X _22112_/X _21032_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__23939__B1 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32047__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19870__A4 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14144__A2 _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23092_ hold465/A wire3171/X _23092_/X _30096_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_83_3382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_2085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25982__C _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_1816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17618__B1 _31716_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15892__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22043_ hold265/A _22074_/B1 _29803_/D _22042_/X _22041_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_26920_ _31944_/Q wire1573/A _31944_/D wire2348/X wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_2_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23783__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19083__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20899__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_220_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28536__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26889__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23275__S _23296_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21584__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18291__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26851_ _27071_/C1 _26850_/Y wire749/X hold329/A _31875_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26353__A1 _31664_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18830__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18369__S _18386_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout764_A _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31071__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23167__A1 hold267/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32197__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14447__A3 _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24364__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23167__B2 _30111_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25802_ _27832_/A _27834_/C _32540_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_2 XFILLER_272_96 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14301__C1 _14300_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16841__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21178__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24903__A2 _19546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23706__A3 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29570_ _29570_/Q _32372_/CLK _29570_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_119_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26782_ wire3331/A _26781_/X wire777/X _31841_/Q _31841_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_263_5172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23994_ wire1587/X _30733_/Q wire1263/X _23994_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_131_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold175_A hold175/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_33_0_core_clk clkbuf_opt_33_1_core_clk/A clkbuf_5_29_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__30639__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27528__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14852__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18043__A0 _27975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22914__A1 _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28521_ _28521_/Q _31510_/CLK _28521_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_246_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26105__A1 _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25733_ _25733_/D _25733_/C _25733_/Y _25733_/A _27784_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__20925__A0 wire3981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22945_ VGND VPWR _23342_/A hold494/X _30122_/Q _30122_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_73_3006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3175 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout931_A fanout932/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_371_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28686__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14198__A _19551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18594__A1 wire3916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17397__A2 _31924_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27853__A1 _32548_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28452_ _28452_/Q _31552_/CLK _28452_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29931__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25664_ _31388_/Q _25668_/A _27413_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_249_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22876_ _22876_/B _22877_/B _22935_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_164_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_4477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22619__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_2045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27403_ VGND VPWR _27403_/S _27280_/X _32252_/Q _32252_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_125_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_4049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24615_ _24381_/A _31529_/Q _31533_/Q _19513_/B _24615_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__21524__C_N _30353_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23304__A _30285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21827_ _21099_/C _21827_/X wire3206/A _22954_/S _23145_/A _17067_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XPHY_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28383_ _28383_/Q _30294_/CLK _28383_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30789__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25595_ VGND VPWR _31371_/D _25595_/B _25595_/A _25595_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XPHY_512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18346__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17149__A2 _30394_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1938_A wire1948/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22142__A2 _22141_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15521__S _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27605__A1 wire2002/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27334_ VGND VPWR _27339_/S _32191_/Q wire2801/X _32191_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17302__A _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2012_A wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24546_ _24546_/B _31296_/Q _31041_/Q _24551_/A _24546_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20153__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21758_ wire3991/X _21757_/Y _21657_/A _21769_/A _21758_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_140_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_4510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21350__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_3265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23890__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27081__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14907__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20709_ VGND VPWR _20722_/S _29225_/Q _27697_/A1 _29225_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27265_ VGND VPWR _27265_/S _32140_/Q _27265_/A0 _32140_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_3012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24477_ wire798/X _24475_/C _25109_/B _31035_/D _24476_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_4 XPHY_1155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25092__A1 wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21689_ _22015_/S _21630_/X _21689_/X _21645_/X _21644_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_235_5241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30019__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29004_ _29004_/Q _32290_/CLK _29004_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length3431 VPWR VGND wire3427/A wire3430/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XPHY_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14230_ _17881_/D _24585_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 X_26216_ VPWR VGND _31596_/D _26216_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__25631__A3 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27369__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16109__B1 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23428_ _23428_/Y _29376_/Q _29834_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__25941__D_N _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27196_ _32090_/Q _25760_/Y _32089_/Q _27197_/A _32091_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__19846__A1 _28575_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28066__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14161_ VGND VPWR _14168_/S hold74/X hold139/X _14161_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25919__A1 _25918_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26147_ VGND VPWR _26159_/B _27070_/B _31563_/Q _26148_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29311__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19229__A _28137_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2752 VPWR VGND _19786_/A _24441_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23359_ VGND VPWR _23365_/S _30337_/Q _29655_/Q _30337_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2381_A wire2382/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22850__B1 _21289_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17321__A2 wire2040/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length2774 VPWR VGND _27701_/S _27700_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_273_2152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input60_A la_input[113] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_7_3_core_clk clkbuf_opt_7_4_core_clk/A clkbuf_opt_7_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_188_5026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_3591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14092_ _21711_/A _14092_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XANTENNA__26988__C _26988_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25395__A2 _24501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24198__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26078_ _31539_/Q _31540_/Q _31538_/Q _26066_/X _26079_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__24052__C1 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_158_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30169__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26592__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14380__B _31014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26350__A _27068_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17609__B1 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15883__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17920_ VGND VPWR _17947_/S wire3913/X _27858_/Q _27858_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25029_ _25065_/A wire1296/X _25029_/X _25029_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29906_ hold424/A _30330_/CLK _29906_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_27_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31414__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23945__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2646_A _19551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_3567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_2472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29461__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21494__A _30357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26344__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17851_ _17539_/C _17850_/X _31736_/D _17524_/B _17847_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xfanout1222 wire1228/A _15640_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29837_ _29837_/Q _30455_/CLK _29837_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_114_2844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20602__S _20604_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18279__S _18321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15096__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2040 wire2041/X wire2040/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27903__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2051 wire2052/X _17287_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24355__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16802_ _16802_/X wire1035/A _16799_/X _16801_/X _16839_/A1 _16797_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__15635__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24301__C _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2062 wire2062/X wire2062/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__26895__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21169__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2813_A _25512_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2073 wire2073/X wire2074/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_1793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17782_ _17782_/X _17501_/X _31722_/Q _31726_/Q _17503_/A VGND VPWR _17781_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_2_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29768_ _29768_/Q _31914_/CLK hold486/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1277 _23673_/X _24888_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_40_3797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14994_ _15517_/A1 _15509_/A1 _14992_/X _14994_/Y _14993_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_92_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2084 wire2085/X wire2084/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_144_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27519__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22102__B _22119_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2095 wire2096/X wire2095/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__31564__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19521_ _19521_/B _19521_/Y _19584_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_281_5294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27181__A _32084_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16733_ VGND VPWR _16733_/X _16732_/X _16731_/X _16736_/S wire1058/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28719_ _28719_/Q _32168_/CLK _28719_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_188_2989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13945_ _28552_/Q _13945_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_1_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20916__B1 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29699_ hold344/A _31961_/CLK _29699_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17388__A2 hold64/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24107__B1 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22381__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14539__C _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31730_ _31730_/Q _31730_/CLK _31730_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19452_ VGND VPWR _28445_/D _27091_/C1 _19451_/X _19450_/Y _25512_/B VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_264_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15399__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16664_ VGND VPWR _16842_/S _29326_/Q _28764_/Q _16664_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_2855 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21941__B _21941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20392__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13876_ _28621_/Q _13876_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4027_A wire4028/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22529__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25855__B1 _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20838__A _29692_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18403_ VGND VPWR _18432_/S _28178_/Q wire3912/X _28178_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16060__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_1862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15615_ wire1500/A _29580_/Q _15615_/Y _15615_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_220_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22756__C _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31661_ _31661_/Q _32573_/CLK _31661_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19383_ _28403_/Q wire1405/A _28403_/D _19371_/X _19382_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_16595_ VGND VPWR _16961_/S _32434_/Q _32362_/Q _16595_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_95_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18337__A1 _23272_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18308__A _18332_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27057__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_4_13_0_core_clk clkbuf_5_27_0_core_clk/A clkbuf_3_6_2_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xclkbuf_3_2_2_core_clk clkbuf_4_5_0_core_clk/A clkbuf_3_2_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_106_3062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30612_ hold304/A _31869_/CLK _30612_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17212__A _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18334_ _18334_/X _30413_/Q _30484_/Q _30414_/Q _23269_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_15546_ _15546_/X _15727_/A2 _15692_/S _29063_/Q _15546_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__20144__A1 wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16348__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31592_ _31592_/Q _31966_/CLK _31592_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18888__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output683_A _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23881__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26804__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27072__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28409__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30543_ _30543_/Q _31874_/CLK hold200/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18265_ _18295_/B wire3174/X _18265_/Y wire3855/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_275_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15477_ _15476_/X wire1118/X _15737_/A2 _28965_/Q _15477_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_3349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_197_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17560__A2 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26280__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17216_ _21953_/A2 wire3926/X _29903_/Q _22026_/B1 _22046_/B VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22oi_4 XFILLER_275_3652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14428_ _29715_/Q _14428_/Y _21339_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_278_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18196_ _18196_/X _18201_/A _18244_/A wire3897/X _18163_/B wire3712/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19837__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30474_ _30474_/Q _30474_/CLK _30474_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_119_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_4195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_4037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32213_ _32213_/Q _32525_/CLK _32213_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17848__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17147_ _22026_/A2 _23135_/B _29894_/Q _21630_/B1 _21638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_119_4179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14359_ _22578_/S _22594_/S _22614_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XANTENNA__22841__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17585__C _17585_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_2_0_0_core_clk_A clkbuf_2_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17312__A2 _17312_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28559__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2419_A _14135_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18305__A_N _18223_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32144_ _32144_/Q _32513_/CLK _32144_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15323__A1 wire1128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17078_ VGND VPWR _17078_/X _21447_/B _29885_/Q _17078_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__25386__A2 _25265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16520__B1 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29804__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold49_A hold49/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26583__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31094__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23397__A1 _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23397__B2 _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15874__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16029_ _15770_/C wire1727/X _16029_/X wire1021/X _29107_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__17882__A _17882_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_1972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32075_ _32075_/Q _32075_/CLK _32075_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_3_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19065__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_1986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_1934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21947__A2 _21945_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire732_A wire732/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17411__D_N _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27790__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_335_core_clk _30392_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_31026_ _31026_/Q _31748_/CLK _31026_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_26_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25138__A2 _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_4460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31907__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20512__S _20512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18812__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15087__B1 wire1069/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_1980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20080__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16284__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24346__B1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15626__A2 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2788_A _27598_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29954__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24897__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19719_ VGND VPWR _26838_/A3 _25738_/A _19715_/C _19719_/X _25745_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_187_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_4008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20991_ VGND VPWR _20999_/S _29456_/Q _27680_/A1 _29456_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30867__D _30867_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18576__A1 _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16036__C1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_4633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_3787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22372__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26638__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30931__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22730_ _22661_/B _22730_/X _22725_/Y _14404_/B _22728_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_228_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19602__A _26813_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31928_ _31928_/Q _32569_/CLK hold489/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20383__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25323__B _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_2794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3127_A _14232_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22109__C1 _22108_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16051__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22661_ _30088_/Q _22661_/B _14403_/B _22661_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XFILLER_260_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31859_ _31859_/Q _32573_/CLK _31859_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_91_2950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24400_ _24437_/B _24398_/X _31003_/D _24399_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_21612_ _21612_/Y _30220_/Q _21613_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_202_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25380_ VGND VPWR _25380_/X _25380_/B _31271_/Q _25380_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_22592_ VGND VPWR _22594_/S _30357_/Q wire3700/X _22592_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18879__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21332__B1 _21651_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23872__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28089__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14465__B hold398/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26435__A _26435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17000__A1 _16999_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27063__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4055 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24331_ _24330_/X _24357_/B1 wire1672/X _24353_/A1 _30968_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24881__C _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21883__A1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21543_ _21599_/A _21677_/D _21427_/B _14109_/Y _21677_/B _21546_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XFILLER_156_5548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29334__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25074__A1 _31180_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18652__S _18657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15011__B1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17551__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26271__B1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_51_core_clk _31436_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_159_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_3471 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26810__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27050_ _27051_/C _32001_/Q _32003_/Q _32002_/Q _27050_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_24262_ _30927_/D _24260_/X _26386_/C _24259_/X _24261_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xmax_length2004 VPWR VGND _27685_/A1 _23647_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21474_ _21455_/X _21458_/Y _21459_/Y _21473_/A _21473_/B _21475_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_202_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19828__A1 _28566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24282__C1 _24281_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24821__A1 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3271 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26001_ VGND VPWR _14189_/A _19555_/A _26015_/A _26001_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19694__D _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23213_ VGND VPWR _23223_/S _30205_/Q hold434/X _30205_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20914__C _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_1979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30311__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20425_ VGND VPWR _20425_/S _28945_/Q _27140_/A1 _28945_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31437__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14770__C1 wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22832__B1 _22830_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24193_ _24193_/X wire1299/A _28675_/Q _31185_/Q _19994_/X VGND VPWR _24192_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14481__A _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16106__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17303__A2 input203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1336 VPWR VGND wire1335/A wire1334/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_232_4746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_2303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29484__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23144_ _30176_/D _23185_/B _23143_/X _30176_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_133_3409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27266__A hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20356_ VGND VPWR _20357_/S _27261_/A0 _28896_/Q _28896_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_3400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25377__A2 _25265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16511__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23388__A1 _30366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3830_A wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23075_ _23115_/B _23061_/B _23145_/A _23075_/X _29712_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_27952_ _27952_/Q _30279_/CLK _27952_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23927__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_73 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19056__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20287_ VGND VPWR _20292_/S _27703_/A1 _28829_/Q _28829_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16900__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3928_A _29731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_4151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21938__A2 _21484_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17067__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18264__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30461__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26903_ VGND VPWR _26903_/X _26903_/B _26903_/A _26903_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__31587__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22026_ _22026_/X _22026_/B1 _29901_/Q _23170_/C _22026_/A2 VGND VPWR _21966_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_251_1034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22060__A1 _21708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26326__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27523__A0 _32165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19461__C1 _28448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20422__S _20429_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_2473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_3499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27883_ _27883_/Q _30225_/CLK _27883_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18803__A2 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold10 hold10/A hold10/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18099__S _18118_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1790_A _18267_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15078__B1 _15319_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_5628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold21 hk_dat_i[24] hold21/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18400__B _18434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15617__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16814__A1 _16814_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24337__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15516__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold32 hold32/A hold32/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29622_ VGND VPWR _29622_/D _32112_/CLK _29622_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26877__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13825__A _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26834_ _23599_/B _26833_/Y _26833_/A _31867_/Q _31867_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold43 hold43/A hold43/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_148_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19937__C_N wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold54 hold54/A hold54/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_40_2359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22348__C1 _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold65 hk_dat_i[0] input7/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_263_315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold76 hold76/A hold76/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_3577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29553_ _29553_/Q _32349_/CLK _29553_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold87 hk_dat_i[4] hold87/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_243_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_1265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26765_ hold491/A wire1230/X wire3363/X _22437_/X _31834_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_265_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold98 hold98/A hold98/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_23977_ _23977_/X _24081_/A3 _19928_/B _28622_/Q _31100_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_264_2118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18827__S _19273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22363__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23560__A1 hold501/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27826__A1 _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28504_ _28504_/Q _31507_/CLK _28504_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17731__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26629__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21797__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26329__B _26329_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25716_ _25717_/B _31402_/Q _25731_/B _25717_/C _25718_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19512__A _24609_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input212_A serial_data_2_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22928_ _22929_/A _22928_/B _22928_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__24775__D _24775_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29484_ _29484_/Q _30507_/CLK _29484_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16578__B1 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26696_ _31795_/Q _31799_/Q wire778/A _26696_/D _27007_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_232_713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17775__C1 _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21253__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16042__A2 _16028_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28435_ _28435_/Q _32444_/CLK _28435_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_92_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25647_ _25646_/X _31382_/Q _31382_/D _25643_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_109_2946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22859_ _22856_/Y _22858_/X _22965_/S _22857_/Y _30107_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_196_4605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17790__A2 _17606_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15400_ _15737_/A2 _15400_/X _15399_/X _15737_/B1 _28963_/Q _15738_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_90_3183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16380_ VGND VPWR _16842_/S _29600_/Q _29632_/Q _16380_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28366_ _28366_/Q _30484_/CLK _28366_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_231_267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25578_ _25578_/X _31042_/Q _25578_/C _31043_/Q _25632_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XPHY_342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21323__B1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23863__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32212__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_4261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27054__A2 _27120_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15331_ _15507_/A1 _16646_/A2 _15331_/X _15638_/A2 _28889_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_27317_ VGND VPWR _27321_/S _32176_/Q _27417_/A0 _32176_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21874__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24529_ _24531_/C _31288_/Q _31290_/Q _31287_/Q _31289_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_177_4059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28297_ _28297_/Q _30204_/CLK _28297_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16345__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17542__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18050_ VGND VPWR _18052_/S wire3818/X _27982_/Q _27982_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3912 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15262_ _15262_/X _15751_/B1 _15261_/X _29119_/Q _15265_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__21489__A _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23076__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27248_ VGND VPWR _27263_/S _32123_/Q _27248_/A0 _32123_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15553__A1 wire1084/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19819__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28701__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29827__CLK _30051_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17001_ VGND VPWR _17089_/S _16990_/X wire2292/X _30376_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_5082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25592__B1_N _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17799__A2_N _17798_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14213_ _14213_/A _14213_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XANTENNA__17178__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_5547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_1866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20687__A2_N wire1354/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15193_ wire3258/X wire1741/A _15193_/X _15760_/B1 _29181_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_68_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27179_ _32081_/Q _32083_/Q hold242/A _32082_/Q _27180_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__14391__A _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19295__A2 wire1405/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_7 _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32362__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3603_A _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2571 VPWR VGND _19415_/S _19397_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_236_1508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15305__A1 _28928_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14144_ _30021_/Q _30020_/Q _30019_/Q _14143_/D _14146_/B _23563_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_218_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26565__A1 _31838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30190_ _30190_/Q _30453_/CLK _30190_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30804__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16502__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19805__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23379__A1 _30357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19393__S _19397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15856__A2 _15851_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2117 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2930_A _20352_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1881 VPWR VGND _19145_/B1 wire1883/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_14075_ _30436_/Q _18553_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_18952_ _30263_/Q _18952_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__23918__A3 _23917_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29977__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1892 _20868_/S _20870_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16810__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25408__B _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24040__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20840__B _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24312__B _32038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17903_ VPWR VGND _30321_/D _31035_/Q _31078_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__22051__A1 hold265/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18255__B1 _18254_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20332__S _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output431_A _13866_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18883_ _18880_/X wire1674/X wire1912/A _18882_/X _18883_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_231_3599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_2584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20062__B1 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16805__A1 _28832_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15608__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24328__B1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1041 wire1044/A _16940_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_1029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26868__A2 wire2682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30954__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17834_ _17709_/X _17834_/X _17743_/X _17693_/Y _17833_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_40_3572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1062_A _15766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1063 VPWR VGND wire1067/A _14567_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24879__A1 wire868/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29207__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14816__B1 _28747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23643__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16281__A2 _16546_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_2_3_1_core_clk clkbuf_3_7_0_core_clk/A clkbuf_2_3_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_266_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17765_ _17833_/S _17764_/Y _17763_/X _17764_/B _17765_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_78_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14977_ _14976_/Y _29143_/D _14956_/Y _15612_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__14292__A1 _29988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23870__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18558__A1 _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_2797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23551__A1 _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27817__A1 _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19504_ _24610_/B _19504_/D _19507_/C _24594_/A _19504_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XANTENNA__22985__S0 wire3479/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14831__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16716_ _16817_/A2 _16817_/A1 _29480_/Q _16716_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13928_ _13928_/Y _28569_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_75_2934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17696_ VGND VPWR _17671_/X _17695_/X _17764_/B _17696_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA_wire1327_A wire1328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_2333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21163__S _21172_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16033__A2 wire1005/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31713_ _31713_/Q _31730_/CLK _31713_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19435_ _28440_/Q _19432_/A _25524_/A _31341_/Q _31340_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XANTENNA__28231__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16647_ _16646_/X _16843_/A2 _16815_/A2 _28104_/Q _16647_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_260_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13859_ _13859_/Y _28638_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__29357__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16257__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17781__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24982__B _25047_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23303__B2 _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20117__A1 _28704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31644_ _31644_/Q _31894_/CLK _31644_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_3646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23879__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19366_ _19366_/X wire2270/A _27952_/Q wire2281/A wire2582/A _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__15792__A1 _28941_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16578_ _16578_/X _16967_/A1 wire911/X _16577_/X _16575_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_34_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23854__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26255__A _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22511__C1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27045__A2 _27050_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18317_ VGND VPWR _18317_/S _28108_/Q _27261_/A0 _28108_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_1285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2728_A _19624_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30334__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15529_ VGND VPWR _15716_/S _32326_/Q _28934_/Q _15529_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_30_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31575_ _31575_/Q _31575_/CLK _31575_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19297_ _19297_/X _19296_/X _27917_/Q _18856_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_125_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23598__B _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18472__S _18476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_2_0_core_clk clkbuf_5_2_1_core_clk/A clkbuf_5_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_121_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19795__C _27122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2536_A wire2539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17533__A2 _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18730__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2412 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28381__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27785__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21399__A _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18248_ VGND VPWR _18284_/S _28094_/Q _27247_/A0 _28094_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30526_ hold383/A _31815_/CLK input62/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15544__A1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26405__D _31690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16741__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20507__S _20517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_5122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27949__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17088__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21617__A1 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14752__C1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_1966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30457_ VGND VPWR _30457_/D _30457_/CLK hold494/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18179_ _18179_/B _18179_/Y _18278_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_173_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19286__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23110__C _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26005__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold502 hold502/A hold502/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_28_3136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20210_ VGND VPWR _20227_/S _28755_/Q _27693_/A1 _28755_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_1192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19825__A4 _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30484__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26702__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22290__A1 _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27086__A _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21190_ VGND VPWR _21199_/S _29632_/Q wire1792/X _29632_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26556__A1 _31761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24016__C1 wire1262/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30388_ _30388_/Q _30482_/CLK _30388_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19691__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24503__A _30759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_5233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20141_ _20141_/X _28715_/Q _25076_/C1 _20162_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_154_3188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32127_ _32127_/Q _32127_/CLK _32127_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_1310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32142__D _32142_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19038__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24031__A2 wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3077_A _18017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17232__A1_N _29905_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22042__A1 _23155_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27505__A0 _32320_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26308__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20072_ VGND VPWR _19547_/B _19551_/A _20073_/A2 _20072_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_32058_ _32058_/Q _32435_/CLK _32058_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22042__B2 _17212_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20242__S _20249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18797__A1 wire1775/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24319__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_2129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23900_ _23900_/X _24892_/C _30687_/Q wire3628/X wire1633/X VGND VPWR _23899_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_184_4520 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26859__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31009_ _31009_/Q _31746_/CLK _31009_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_265_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24880_ _31086_/D _24879_/Y wire2255/X _24480_/C _26544_/C1 wire868/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_253_98 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1002_A wire1005/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14807__B1 _28811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4837 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21284__D _22620_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29451__D _29451_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23553__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23831_ _30838_/D _24310_/B _23831_/A _23849_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_75_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1396_A _26386_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25334__A _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25531__A2 _31345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14283__A1 _32038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18647__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15480__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22345__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19746__B1 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22976__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14822__A3 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3411_A wire3412/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26550_ _26182_/A _26549_/Y _26543_/B _31758_/Q _31758_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_408 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23762_ _31782_/Q _23758_/Y _31784_/Q _23763_/B _31781_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_225_4561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25053__B _25069_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20356__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19210__A2 _19204_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20974_ VGND VPWR _20980_/S _30180_/Q _29439_/Q _29439_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_419 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32235__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22750__C1 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21073__S _21077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25501_ _31330_/Q _25500_/Y _31330_/D _19498_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__17221__A1 wire3217/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22713_ _22747_/C _22733_/A wire3657/X _22713_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26087__A3 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20909__C _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26481_ _26473_/C _26472_/X _26492_/D _26473_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_2 XFILLER_104_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18593__D _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23693_ _23693_/X wire1288/X _31498_/Q _31574_/Q _24184_/A2 VGND VPWR _23692_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14476__A _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24098__A2 _24140_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25295__A1 _31361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25295__B2 _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24892__B _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_4469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28220_ _28220_/Q _30398_/CLK _28220_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25432_ _25431_/X _26498_/A _31356_/Q _25430_/Y _31296_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_5000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22644_ _29875_/Q _29725_/Q _22649_/B _22663_/B _22624_/X _22644_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_224_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15783__A1 _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28724__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16980__B1 _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23845__A2 wire1812/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold138_A hold138/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28151_ _28151_/Q _30279_/CLK _28151_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20659__A2 wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25363_ _25376_/C _31274_/Q _31276_/Q _31275_/Q _25363_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_234_5509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22575_ VGND VPWR _22619_/S hold147/A _22574_/X _30066_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18382__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32385__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3878_A wire3879/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18721__A1 _28340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1636_A _26793_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27102_ _27116_/B _26886_/B _27116_/A _27102_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_24314_ _27053_/C _24353_/A1 _23813_/D wire2611/X _19518_/A wire1668/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a41o_4 XFILLER_258_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_5088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27695__S _27701_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21526_ _21619_/B _21588_/A _21677_/B _21619_/C _21529_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15535__A1 wire1083/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28082_ _28082_/Q _32419_/CLK _28082_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_159_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25598__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26795__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30827__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25294_ _25294_/X _31262_/Q _25293_/Y _25303_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__20417__S _20417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21102__A _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27033_ _27033_/B _31996_/D _27033_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_156_3932 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14743__C1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24245_ _30921_/D _26542_/B _31757_/Q _24246_/B _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_174_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28874__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21457_ _21459_/B wire3800/A _21812_/C _21464_/B _21462_/B _29733_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_4 XFILLER_46_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_5548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24270__A2 wire1351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21459__D _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_Di0[5] wire2342/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17288__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_1817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20408_ VGND VPWR _20408_/S _27507_/A1 _28930_/Q _28930_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_257_core_clk _32442_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_core.RAM256_Di0[30] _19634_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20363__D _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22281__A1 _30116_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17288__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27744__A0 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26547__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24176_ wire1810/X _24175_/X _28673_/Q _24192_/A2 _24176_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_46_2513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28530__D wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22281__B2 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21388_ _21427_/B _21599_/A _14320_/X _21289_/C _21388_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_117_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15299__B1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3938 wire3946/A _17094_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16496__C1 wire918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15838__A2 _15828_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23127_ hold354/A _23157_/A2 _23127_/X _30103_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 Xmax_length1177 VPWR VGND _14648_/A _15614_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_133_3239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_4021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30977__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20339_ VGND VPWR _20352_/S _27244_/A0 _28879_/Q _28879_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19029__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1188 VPWR VGND _14933_/B1 wire1189/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_input162_A la_input[90] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_1410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28984_ _28984_/Q _32352_/CLK _28984_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24022__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28104__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2177_A _20102_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20660__B _25087_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18237__B1 _18236_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22033__A1 hold262/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27935_ _27935_/Q _30378_/CLK _27935_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23058_ hold160/A wire3171/A _23058_/X _30089_/Q _23067_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xinput100 VGND VPWR _30688_/D la_input[34] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_150_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_4931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput111 VPWR VGND wire4207/A la_input[44] VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18788__A1 _18999_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15246__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21387__A3 _21486_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19985__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14900_ VGND VPWR _14880_/X _14871_/X wire1067/X _14901_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_210_4896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput122 la_input[54] _30648_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_284_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22009_ hold255/A _22074_/B1 _29800_/D _22008_/X _22007_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_59_3608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17027__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput133 VGND VPWR _30628_/D la_input[64] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_265_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14150__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15880_ VGND VPWR wire969/X _32044_/Q _29103_/Q _15880_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27866_ _27866_/Q _30473_/CLK _27866_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_283_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20595__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30207__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput144 VGND VPWR _30608_/D la_input[74] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__18252__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21792__B1 wire743/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_3397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput155 VPWR VGND _30588_/D la_input[84] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_2_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput166 VGND VPWR wire4204/A la_input[94] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_280_4828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15066__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29605_ _29605_/Q _32351_/CLK _29605_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_248_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14831_ _14831_/X _15628_/A2 _14675_/S _32116_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xinput177 mprj_dat_i[12] input177/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_26817_ _26817_/Y _26882_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_18_4006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25522__A2 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28254__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput188 mprj_dat_i[22] input188/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_27797_ VGND VPWR _27801_/S _25029_/B _32520_/Q _32520_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14274__A1 _29980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput199 mprj_dat_i[3] input199/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_226_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14274__B2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15471__B1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23533__A1 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22336__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15770__A _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14813__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17550_ _17550_/X wire2408/X _17474_/C _17473_/X _17457_/B VGND VPWR _26245_/C VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_29536_ _29536_/Q _31586_/CLK _29536_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_4770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14762_ _14761_/X _14759_/X _15611_/A1 _14762_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_226_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26748_ _26748_/Y _31789_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__20347__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19201__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2609_A _14260_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21544__B1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21985__A2_N wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_920 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16501_ wire999/A _16091_/C _30504_/Q _16501_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16015__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_2360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_931 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_2945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_942 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29467_ _29467_/Q _32321_/CLK _29467_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17481_ _31055_/Q _17481_/Y _31056_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__30357__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14693_ VGND VPWR _14820_/S _28776_/Q _28808_/Q _14693_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_57_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_953 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26679_ _26678_/Y _26893_/C1 _26678_/B _31898_/Q _31793_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_144_3368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24089__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3553_A _30995_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_964 _18820_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5070 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31602__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19220_ wire1912/A _20870_/S _19219_/X _19217_/X _19220_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_975 _30334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16432_ _16427_/X _16653_/B1 wire911/A _16431_/X _16432_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23297__A0 _30279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28418_ _28418_/Q _32067_/CLK _28418_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_18_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_986 wire804/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23699__A _23699_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15774__A1 _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29398_ _29398_/Q _30398_/CLK _29398_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_997 _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22807__S _22807_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23836__A2 wire1812/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19151_ VGND VPWR _19151_/S _19150_/X _19149_/X _19151_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21847__A1 hold465/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19388__S _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2880_A _20772_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16363_ wire4148/X _16363_/X _29116_/Q _15775_/X _16791_/A2 _16837_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28349_ _28349_/Q _30758_/CLK _28349_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25038__A1 _13784_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3720_A _30328_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26235__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18102_ VGND VPWR _18109_/S wire3864/A _28031_/Q _28031_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23849__D _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24307__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15314_ VGND VPWR _15319_/C _15718_/B1 _15757_/C1 _15311_/X _15313_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_31_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15526__A1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19082_ _28130_/Q _19082_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31360_ VGND VPWR _31360_/D _31369_/CLK _31360_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_51_2285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_5598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16294_ _16965_/A2 _16952_/A1 _30900_/Q _16294_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_100_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20327__S _20327_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output381_A _13924_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31752__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18305__B _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18033_ VGND VPWR _18043_/S wire3870/X _27965_/Q _27965_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30311_ _30311_/Q _30314_/CLK _30311_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_86_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15245_ VGND VPWR _15245_/X _15244_/X _15243_/X wire1134/X _15744_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_258_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14734__C1 wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25994__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31291_ _31291_/Q _31763_/CLK _31291_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_3431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length3080 VPWR VGND _17974_/S _17972_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24261__A2 wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26522__B _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17279__A1 _32296_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30242_ _30242_/Q _31912_/CLK _30242_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22272__A1 _30050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput607 _28707_/Q la_output[94] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15176_ _16791_/A2 _15176_/X _30787_/Q _15598_/C1 _15598_/A1 _15627_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 Xoutput618 _23618_/B mprj_adr_o[14] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19673__C1 wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22542__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput629 _24590_/B mprj_adr_o[25] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_output646_A wire2364/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23865__C _23865_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26785__D_N wire1272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14127_ _14268_/B _14127_/Y _14127_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_4_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32108__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30173_ _30173_/Q _30386_/CLK _30173_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16540__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19984_ _19983_/X _28640_/Q _28640_/D _19984_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_7_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24013__A2 _24006_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25210__A1 wire3497/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17863__C _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_5511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_155_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18228__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21158__S _21158_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23221__A0 _30143_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18935_ _18935_/X wire1883/X _18929_/X _18934_/X _23355_/C _19085_/C1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_14058_ _26530_/C _31748_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__14501__A2 _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18779__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18592__A1_N _18172_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1444_A wire1445/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18866_ _19346_/D1 _28280_/Q _19346_/A2 _19346_/A1 _19346_/B1 _18866_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o2111a_2 XANTENNA__20586__A1 wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20997__S _20997_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19440__A2 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31132__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32258__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23373__S _23373_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15057__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17817_ _17521_/X _17816_/X _31733_/D _17524_/B _17814_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_223_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19991__A3 wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18797_ VGND VPWR _18797_/S wire1775/X _18792_/X _18797_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_4447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22327__A2 _18179_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23524__A1 _23523_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19728__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18694__C _29812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1611_A _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20338__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17748_ _17539_/C _17747_/X _31727_/D _17524_/B _17745_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_3_1769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21535__B1 _17143_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28747__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17739__C1 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16006__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_3719 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17679_ _17521_/X _17678_/X _31721_/D _17524_/B _17676_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_71_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31282__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23105__C _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23288__A0 _30270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19418_ VGND VPWR _19418_/S _27709_/A1 _28434_/Q _28434_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17261__C_N wire3186/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14568__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20690_ _24210_/A _21107_/C _20690_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XFILLER_18_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16962__B1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24485__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23827__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_3804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21838__A1 _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23402__A _23402_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31627_ _31627_/Q _31726_/CLK _31627_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19349_ _19341_/X _19348_/X wire1904/X _19343_/X _19349_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire1980_A wire1981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28897__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2820_A _24501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16715__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25320__C _25325_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27569__A3 wire3402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2918_A _20386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19900__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_5277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_1689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17400__A hold26/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15517__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22360_ _22360_/X wire3213/X _18276_/X wire3712/X _22372_/A2 _29758_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_241_1077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20510__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31558_ _31558_/Q _31869_/CLK _31558_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_69_3258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20237__S _20249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_4224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18215__B _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21311_ _30360_/Q _21514_/B _21549_/B _30475_/Q _21312_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_86_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24788__B1 _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30509_ _30509_/Q _31912_/CLK _30509_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_195_3288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22291_ VGND VPWR _23228_/S _29877_/Q _29136_/Q _29877_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30880__D wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19259__A2 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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XFILLER_82_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold332 hold332/A hold332/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_4590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length1311_A _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold343 hold343/A hold343/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_173_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold354 hold354/A hold354/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1409_A _23513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21173_ _27233_/B _21173_/B _27485_/D _27598_/C _21173_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 Xhold365 hold365/A hold365/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_5_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24004__A2 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25201__A1 _31357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold376 hold376/A hold376/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_3280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold387 hold387/A hold387/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_8_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21068__S _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22015__A1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold398 hold398/A hold398/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20124_ _20124_/Y _20124_/B _20124_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_189_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_1752 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16493__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15296__A3 wire1693/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17690__A1 _31718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_3948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout823 _22449_/Y _22513_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_150_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25981_ wire797/X _26017_/C _27075_/C1 _31506_/D _25980_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_4 Xwire2617 _14243_/Y _24384_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_2860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20026__B1 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout845 VPWR VGND _20124_/A _20061_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_45_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19967__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27720_ _27728_/S _27729_/D _27793_/D _27793_/B _31398_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 Xwire1905 VPWR VGND wire1905/X wire1905/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29522__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20055_ _25076_/C1 _20054_/Y wire847/X _28674_/Q _28674_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_24932_ _25676_/B1 _24931_/Y _24947_/A _31110_/Q _31110_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_227_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1916 VPWR VGND wire1916/X wire1916/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout867 _19646_/X _19711_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire3626_A hold275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20577__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_1769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19431__A2 _25577_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout889 VPWR VGND wire892/A _15791_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23283__S _23283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1949 wire1951/A wire1949/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17442__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27651_ VGND VPWR _27654_/S _19721_/A _32390_/Q _32390_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_266_4694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26162__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17442__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25504__A2 _31330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26701__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24863_ VPWR VGND _31077_/D _32561_/Q _25447_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__20700__S _20708_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18377__S _18390_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout844_A _20061_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15453__B1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23515__A1 _28396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19719__B1 _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_4678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26602_ wire3452/A _31774_/D _26600_/X _27077_/C1 _31879_/Q _26601_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__31625__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_2022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23814_ _23814_/X _24317_/A _31849_/Q wire1374/X _31881_/Q _24317_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_184_3660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_1501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20329__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27582_ _27582_/A _27582_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_247_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24794_ _24805_/A _31053_/Q _24794_/X _24793_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA_205 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21526__B1 _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold255_A hold255/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_216 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22200__B _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_4099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29672__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29321_ _29321_/Q _32557_/CLK _29321_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_227 _17280_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_4050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1945_A _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26533_ _26536_/B _31749_/Q _31751_/Q _31750_/Q _26533_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_238 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23745_ _31768_/Q _23742_/Y _31769_/Q _23745_/X hold196/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_20957_ VGND VPWR _20964_/S _30163_/Q _29422_/Q _29422_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_249 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3995_A _29362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_1966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15205__B1 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16548__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26607__B _26607_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29252_ _29252_/Q _32122_/CLK _29252_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_3087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14559__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26464_ VGND VPWR _26464_/X _31616_/Q _26464_/A _26464_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_243_1821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15756__A1 _32444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23676_ _23807_/D _23807_/B _23732_/B _26017_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__25511__B _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17013__C _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23818__A2 wire1808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16953__B1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20888_ VGND VPWR _20902_/S _30242_/Q _29404_/Q _20888_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_2818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31775__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28203_ _28203_/Q _31282_/CLK _28203_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25415_ _31286_/D _25414_/X _26244_/A _25413_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21829__A1 hold279/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19650__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22627_ VGND VPWR _22633_/A _29874_/Q _29724_/Q _22627_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_273_5333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29183_ _29183_/Q _31586_/CLK _29183_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26395_ VGND VPWR wire2642/X wire3616/A _26386_/X _26395_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_243_1876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16625__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26217__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20655__B _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28134_ _28134_/Q _30367_/CLK _28134_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_3617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21924__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25346_ _31271_/Q _31272_/Q _25346_/Y _25346_/D _31270_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_104_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_4643 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20501__A1 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22558_ VGND VPWR _22598_/S hold248/A wire3705/X _30055_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_1297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18170__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20374__C _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31005__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21509_ _21628_/C _21507_/Y _21534_/A _21628_/D _21509_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28065_ _28065_/Q _30268_/CLK _28065_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16181__A1 _29313_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25277_ _25277_/X _31258_/Q _31295_/Q _31259_/Q _31257_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_22489_ _22513_/C1 _22488_/X _22511_/A2 _17144_/X _30005_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_178_2774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length855 VPWR VGND _19988_/A2 _19984_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25440__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3134_A _23526_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_4376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18458__A0 _28232_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29052__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15030_ VGND VPWR _15639_/S _28093_/Q _29049_/Q _15030_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27016_ _31989_/Q _31990_/Q _27018_/A _27020_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_191_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24228_ VGND VPWR _24238_/S _30904_/Q _27696_/A1 _30904_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22254__A1 _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_5074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28260__D _28260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14731__A2 wire1750/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23451__B1 _14095_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19655__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length899 VPWR VGND _16653_/B1 wire898/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20671__A _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25991__A2 wire2641/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20265__A0 _28807_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3713 _30330_/Q _27678_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_174_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16469__C1 _28887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3724 VPWR VGND _18244_/A _30326_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_219_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15765__A _15765_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_Di0[13] wire2377/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3735 _30284_/Q _16971_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire2461_A wire2461/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24159_ _30573_/Q _19641_/C _24159_/X _32567_/Q _23859_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21486__B _21486_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_3981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3301_A wire3305/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19670__A2 wire2666/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3757 VPWR VGND _17036_/B _30218_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_254_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31155__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26535__A4 _26533_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3768 VPWR VGND wire3770/A _30087_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22006__A1 _21708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3830 VPWR VGND wire3830/X wire3831/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_4425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17681__A1 _31638_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16484__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3841 VPWR VGND wire3841/X wire3842/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16981_ _16981_/Y _13831_/Y _16979_/B _16979_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__26940__A1 _31964_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25743__A2 _26838_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28967_ _28967_/Q _32365_/CLK _28967_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32400__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3852 VPWR VGND wire3852/X _29859_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26940__B2 wire2724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3863 _29856_/Q wire3863/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_7_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18720_ _18720_/X _19346_/D1 _27921_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_1_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15932_ _15904_/X _29656_/D wire890/X _15913_/X _15931_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 X_27918_ _27918_/Q _28363_/CLK _27918_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3885 VPWR VGND wire3885/X wire3886/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_67_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20568__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3896 wire3896/X wire3897/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_245_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28898_ _28898_/Q _32581_/CLK _28898_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_190_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3862_A wire3863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17433__A1 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18630__A0 _28343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18651_ VGND VPWR _18655_/S wire3832/X _28364_/Q _28364_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15863_ _16447_/A2 _16447_/A1 _29457_/Q _15863_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27849_ VGND VPWR _25807_/X _32548_/Q hold488/A _27849_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_24_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20610__S _20615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19973__A3 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output227_A wire3377/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14247__B2 _14263_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15444__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16787__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17602_ VGND VPWR _17602_/S _17601_/X _17581_/X _17603_/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14814_ _14813_/X _14823_/A1 _14882_/A2 _28410_/Q _14814_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_280_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32550__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25900__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30860_ _30860_/Q _32440_/CLK wire723/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18582_ _18577_/X _18581_/Y _30422_/Q _18578_/Y _18582_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_111_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_2639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15995__A1 wire3288/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15794_ _15794_/X _28973_/Q _16515_/B1 _16150_/A3 _15957_/S _15793_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_106_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21517__B1 _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_4068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22110__B _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_3796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19186__B2 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17533_ _17602_/S _17531_/X _17470_/B _17730_/S _17537_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_124_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29519_ _29519_/Q _32347_/CLK _29519_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25702__A _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14745_ _14744_/X _14822_/B1 _14882_/A2 _32305_/Q _14745_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_248_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17204__B _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30791_ _30791_/Q _32433_/CLK _30791_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25259__A1 _29870_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22190__B1 _22189_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16539__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17736__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18933__A1 _28155_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_750 wire3570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_761 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32530_ _32530_/Q _32531_/CLK _32530_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_5108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19700__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17464_ _17605_/A _17457_/X _31619_/Q _31683_/Q _26245_/C VGND VPWR _17563_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA_772 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15747__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_1921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_5239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14676_ wire3249/X wire1727/X _14676_/X _15296_/B1 _32112_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_176_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20740__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4107_A wire4107/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_783 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23809__A2 wire1807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22537__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20846__A _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_2797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_794 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19203_ _19202_/X wire1942/X _19203_/A2 _28331_/Q _19203_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_261_1943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16415_ _16415_/A2 _16415_/A1 _29288_/Q _16415_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_32461_ _32461_/Q _32498_/CLK _32461_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14955__C1 wire1228/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_4587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17395_ VGND VPWR _17400_/C _17424_/B _32283_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_239_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18316__A _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24482__A2 _24454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_2740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19134_ _28133_/Q _19134_/X _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31412_ _31412_/Q _32310_/CLK _31412_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_157_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17220__A _17220_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_179_core_clk _32583_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_16346_ VGND VPWR _16346_/X _16491_/S _16816_/B1 _16343_/X _16345_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18697__B1 _30089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22493__A1 _17160_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26759__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32392_ _32392_/Q _32403_/CLK _32392_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14970__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23690__B1 _26694_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26533__A _31751_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18161__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_108_core_clk _32350_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_252_4727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19065_ _19065_/X _19216_/D1 _27874_/Q _19368_/B1 _19368_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 X_31343_ _31343_/Q _31871_/CLK _31343_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_65_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16172__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16277_ _14104_/A _16277_/X _28954_/Q wire1449/X wire1547/X _16841_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__23876__B _23876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25431__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18449__A0 _28223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18016_ VGND VPWR _18017_/S wire3818/X _27950_/Q _27950_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_64_3122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23368__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22245__A1 _30111_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15228_ _15228_/A2 _15227_/X _32430_/Q _15228_/A3 _15228_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_113_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14722__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31274_ VGND VPWR _31274_/D _32294_/CLK _31274_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22245__B2 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput404 _13797_/Y la_oenb[26] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_250_5185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[26] wire2725/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput415 _13880_/Y la_oenb[36] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20256__A0 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput426 _13870_/Y la_oenb[46] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_113_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput437 _13860_/Y la_oenb[56] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30225_ _30225_/Q _30225_/CLK _30225_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17121__A0 _17120_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29545__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15159_ _15158_/X _15277_/S _15610_/A2 _29318_/Q _15159_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23993__B2 _30541_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput448 _13914_/Y la_oenb[66] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_272_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput459 _13904_/Y la_oenb[76] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19661__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24988__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_116_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25067__C_N _24937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16475__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold31_A hold31/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32080__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30156_ _30156_/Q _30156_/CLK _30156_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26392__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25734__A2 _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19967_ VGND VPWR wire1317/X _25022_/C _24931_/B _19967_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__14486__A1 _23231_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26931__B2 wire2688/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_cap2613_A _19518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20008__B1 wire850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_5010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14486__B2 _14485_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19949__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30522__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31648__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17890__A _24384_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_1967 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_1493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18918_ _19306_/B _28027_/Q _18917_/X _18918_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_248_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_2752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30087_ _30087_/Q _31955_/CLK _30087_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20559__A1 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19898_ VGND VPWR wire2184/X _26694_/D _24046_/B1 _19898_/X _26139_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__21756__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_4209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17627__C_N _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24500__B _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29695__CLK _30219_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_1545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18849_ _18849_/X _18846_/X wire1916/X _18848_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21851__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20520__S _20528_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14238__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_5098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_33_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31036__D _31036_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16632__C1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13923__A _28574_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_3803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21860_ _22074_/A2 _22074_/B1 wire3779/X _17093_/Y _21860_/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a31o_1 XFILLER_94_3863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15986__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14789__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21508__B1 _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_5585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30672__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19177__A1 _19174_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31798__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24170__A1 _28481_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20811_ VGND VPWR _20811_/S _29324_/Q _27507_/A1 _29324_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24170__B2 _28609_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21791_ VGND VPWR _21791_/S _21712_/X _21709_/Y _21791_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30875__D _30875_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17188__B1 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30989_ _30989_/Q _31998_/CLK _30989_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27844__A_N _25807_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18924__A1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22720__A2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23530_ VGND VPWR _23530_/S _23529_/X hold469/X _30451_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20742_ VGND VPWR _20754_/S _27154_/A1 _29257_/Q _29257_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_2875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_3841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20192__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20731__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22674__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31028__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14946__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23461_ _23447_/X _23446_/X _14097_/Y _29822_/Q _29356_/Q _23461_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XFILLER_250_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20673_ _20673_/X _20673_/C _31392_/Q _20673_/B _20673_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_162_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25670__A1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24473__A2 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_3011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25200_ _29842_/D _25261_/C1 _31043_/Q _25416_/C _25200_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_fanout1167_A wire1170/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29075__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22412_ VGND VPWR _22616_/S _29968_/Q wire725/X _29968_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_216_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22484__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26180_ _31578_/D _31483_/Q _26179_/X _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_23392_ hold230/X _23307_/B _30368_/D _21221_/A _23391_/X _17087_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_175_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14961__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23681__B1 _26694_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_5375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_2133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14473__B _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20194__C _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25131_ _25131_/X _25136_/B _31203_/Q _31202_/Q _25149_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_max_length1526_A _15435_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22343_ _29921_/D wire3160/X _30460_/Q hold459/A _14365_/Y VGND VPWR _22342_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_238_2613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_2332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23786__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16163__B2 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3576_A _30868_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25422__A1 _31361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_4849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30052__CLK _30285_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31178__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_5613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23278__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25062_ _25681_/B1 _25061_/X _25082_/A2 _31174_/Q _31174_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_82_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25059__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22274_ _18664_/X _22273_/X _22274_/X _30115_/Q wire2286/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14713__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15910__A1 _30774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32423__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20247__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout794_A _24892_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24013_ _30867_/D _24006_/X _24209_/B1 _24004_/X _24012_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_5_4413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_10_1_core_clk clkbuf_opt_10_1_core_clk/X clkbuf_opt_10_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_21225_ _30332_/D _21224_/X _21223_/Y _20987_/C _29688_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_47_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold140 hold140/A hold140/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_153_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23984__B2 _30735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29870_ _29870_/Q _31918_/CLK _29870_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_wire3743_A _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold151 hold151/A hold151/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_25_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold162 hold162/A hold162/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_112_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21995__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold173 hold173/A hold173/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3126 VPWR VGND _19505_/B _14235_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_115_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28821_ _28821_/Q _30903_/CLK _28821_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17663__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold184 hold184/A hold184/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_60_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15123__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28912__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21156_ VGND VPWR _21168_/S _29599_/Q _27614_/A1 _29599_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_25_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold195 hold195/A hold195/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18860__B1 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26922__A1 hold457/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2819 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1607 VPWR VGND wire1609/A wire1614/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_151_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_60_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26922__B2 wire2358/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2414 VPWR VGND _19788_/D _20126_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_82_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15674__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2425 VPWR VGND wire2425/X _19784_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20107_ _26179_/B1 _20106_/Y _20106_/A _28699_/Q _28699_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_core.RAM256_A0[6] wire3121/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28752_ _28752_/Q _32352_/CLK _28752_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1702 VPWR VGND wire1702/X _18661_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32573__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21747__A0 _21365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2447 VPWR VGND _24239_/S _24232_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25964_ VGND VPWR wire755/X _26775_/B _31496_/Q _31496_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_21087_ VGND VPWR _21098_/S _27254_/A0 _29538_/Q _29538_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2469 VPWR VGND wire2469/X _21642_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_2038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17415__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27703_ VGND VPWR _27707_/S _27703_/A1 _32437_/Q _32437_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20038_ _25079_/A _19995_/B _20038_/X _25065_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_24915_ _24915_/Y _24955_/A _19570_/B _19617_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_1_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17415__B2 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23307__A _29807_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19955__A3 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20430__S _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28683_ _28683_/Q _30630_/CLK _28683_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19504__B _19504_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14229__A1 _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1757 VPWR VGND _26763_/C _24382_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25895_ _25903_/S _25895_/Y _25895_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_21_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1870_A _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15426__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14229__B2 _14263_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1768 VPWR VGND wire1768/X wire1769/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_76_2303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15524__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_2431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_4475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27634_ VGND VPWR _27638_/S _25029_/B _32376_/Q _32376_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_284_1910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2042_A wire2042/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24846_ _24846_/Y _31028_/Q _31030_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_128_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15977__A1 wire1485/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26150__A2 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input125_A la_input[57] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_1099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20369__C _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27565_ _31382_/Q _27564_/Y _27562_/Y _27594_/B _27565_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17024__B _17024_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_4197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24777_ _24784_/C _24784_/B _24784_/A _24785_/B _24777_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_1 XANTENNA__17179__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21989_ _21988_/Y _21989_/Y _22010_/B _22010_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__22172__B1 _21039_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26438__B1 _17502_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3084_A _17941_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29304_ _29304_/Q _32416_/CLK _29304_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22711__A2 wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14530_ hold467/A _21103_/A _30410_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_26516_ _26516_/X _17508_/B _26515_/X _31752_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19520__A _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23728_ _23727_/X wire1633/A wire1875/X _31473_/Q _23729_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XFILLER_71_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_1337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29418__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27496_ VGND VPWR _27513_/S _27689_/A1 _32311_/Q _32311_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16926__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_6_core_clk _32049_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_204_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21261__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_5128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29235_ _29235_/Q _29644_/CLK _29235_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14461_ VGND VPWR _29715_/Q _14461_/Y _30439_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 X_26447_ _26446_/B _26447_/X _26446_/C _31699_/Q _26446_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_35_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23659_ VGND VPWR _23672_/S _27697_/A1 _30789_/Q _30789_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14401__A1 _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23121__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20385__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16200_ _16817_/A2 _16817_/A1 _30496_/Q _16200_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_201_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3349_A _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input90_A la_input[25] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_272_core_clk _32327_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22475__A1 _17087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23672__A0 _30802_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17180_ _22026_/B1 wire3930/X _21672_/A _21953_/A2 _29898_/Q VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22o_4 X_29166_ _29166_/Q _32394_/CLK _29166_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18679__B1 _19069_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14392_ _31052_/Q _31050_/Q _24805_/A _17452_/A _31051_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 X_26378_ VGND VPWR _26335_/A _26378_/A4 _26880_/B _26378_/X _27028_/A _26382_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__14383__B _24424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_64_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19340__A1 _19368_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_2137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28117_ _28117_/Q _32430_/CLK _28117_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16131_ _16131_/X _29248_/Q _16448_/A2 _16805_/A3 _16120_/S _16130_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 Xclkbuf_leaf_201_core_clk _31746_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28442__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25329_ VGND VPWR _31266_/Q _25309_/Y _31267_/Q _25331_/B _31269_/Q _31268_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__29568__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29097_ _29097_/Q _32329_/CLK _29097_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_119_3819 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2676_A _14174_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17351__B1 wire3191/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19891__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26610__B1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14165__A0 hold124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22490__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22227__A1 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16062_ wire999/X _16091_/C _28780_/Q _16062_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21497__A _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28048_ _28048_/Q _30398_/CLK _28048_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_4468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5483 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14704__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15901__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20605__S _20605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20238__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15013_ _15008_/X wire1064/X wire1085/A _15012_/X _15013_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22778__A2 _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17186__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30545__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_3767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24304__C _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3521 _31055_/Q _26509_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__27166__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17103__B1 _21641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_5508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3543 _14293_/B _24446_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__21986__B1 _22075_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30010_ _30010_/Q _30398_/CLK _30010_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28592__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25177__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17654__A1 _31718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19821_ VGND VPWR wire2197/X _26694_/D wire1334/A _19821_/X _26999_/A _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__15114__C1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2820 _24501_/X _25380_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17654__B2 _31717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18851__B1 _18850_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29999_ _29999_/Q _30387_/CLK _29999_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_hold1_A hk_dat_i[21] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24601__A _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23188__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout2853 _21173_/X _21202_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout3598 _19584_/A _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_238_900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17906__A_N _17891_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3660 VPWR VGND _21328_/A hold411/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24924__B1 _24923_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19752_ _19752_/Y _19752_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_clkbuf_5_4_0_core_clk_A clkbuf_5_5_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16964_ _16964_/X _28772_/Q _16964_/A2 _16966_/A3 _16964_/B1 _16963_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 Xwire3682 VPWR VGND wire3682/X _30420_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25416__B _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21738__B1 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4057_A wire4058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3693 VPWR VGND _22617_/C _30350_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30695__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18703_ _18703_/Y _30025_/Q _21030_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__26823__D_N _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15915_ _16039_/A2 _15915_/X _15914_/X _16039_/C1 _28776_/Q wire1458/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 Xwire2970 VPWR VGND _18616_/S _18622_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20340__S _20360_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31961_ hold433/A _31961_/CLK _31961_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19683_ wire3362/A _19682_/Y _19711_/A2 _28502_/Q _28502_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_output511_A wire4036/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31940__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19800__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16895_ _16877_/X _29682_/D _16885_/X wire903/X _16894_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_238_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25135__C _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output609_A _28645_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_4103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_5530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13743__A _31464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18634_ VGND VPWR _18655_/S wire3888/X _28347_/Q _28347_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30912_ _30912_/Q _32575_/CLK _30912_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_248_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1142_A _14794_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15846_ VGND VPWR _15847_/B _16040_/A2 wire1032/X _15843_/X _15845_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_31892_ _31892_/Q _31892_/CLK _31892_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15968__B2 wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16090__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23651__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21960__A _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15432__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24152__B2 _28703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18565_ _20912_/B _18566_/C _30428_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_244_2127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30843_ _30843_/Q _31679_/CLK _30843_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_280_766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15777_ wire944/A wire1450/X _16959_/A2 _14104_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_252_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18906__A1 _18905_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17709__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22702__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26247__B _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17516_ _26530_/A _26514_/B _26530_/B _31760_/Q _31759_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__29098__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14728_ _14723_/X _14719_/X wire1081/X _14727_/X _14728_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20174__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18496_ VGND VPWR _18496_/S wire3820/X _28269_/Q _28269_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30774_ _30774_/Q _32349_/CLK _30774_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_124_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_580 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21171__S _21172_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2543_A _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25101__B1 _31193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_591 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32513_ _32513_/Q _32513_/CLK _32513_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17447_ _17447_/A1 hold34/X _17445_/X _17447_/B2 hold35/A input198/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_35_3290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_4947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14659_ _14817_/A2 _14659_/X _14658_/X _14822_/B1 _32044_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_196_4040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16265__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16393__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24455__A2 wire798/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20295__B _27485_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24990__B _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30075__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22466__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32444_ _32444_/Q _32444_/CLK _32444_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_217_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17378_ VGND VPWR _17383_/C _17424_/B _32280_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14943__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31320__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold79_A hold79/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32446__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24860__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20477__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26263__A _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14293__B _14293_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2710_A _14162_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19331__A1 _28337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19117_ _19179_/A2 _28004_/Q _19143_/B1 _19117_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17885__A _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16329_ VGND VPWR _16961_/S _29317_/Q _28755_/Q _16329_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_157_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32375_ _32375_/Q _32547_/CLK _32375_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_2933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18480__S _18490_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24207__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17342__B1 hold84/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19882__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14156__A0 hold129/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19048_ _30268_/Q _19048_/X _19087_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31326_ _31326_/Q _32564_/CLK _31326_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16696__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_2977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28935__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25955__A2 _31499_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20515__S _20515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_290_2136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17096__S _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23966__A1 _28525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput223 wire3378/X gpio_inenb_pad VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__13918__A _28579_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23966__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19095__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31470__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27157__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31257_ VGND VPWR _31257_/D _31923_/CLK _31257_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_83_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput234 _14037_/Y la_iena[103] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21977__A0 _21501_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput245 _14027_/Y la_iena[113] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27806__B _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput256 _14017_/Y la_iena[123] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_0_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21010_ VGND VPWR _21010_/S _29475_/Q _27254_/A0 _29475_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26710__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_210_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput267 _13773_/Y la_iena[18] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16448__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17645__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30208_ _30208_/Q _30473_/CLK _30208_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_211_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_2953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_3578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput278 _13763_/Y la_iena[28] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17645__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25607__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31188_ _31188_/Q _32564_/CLK _31188_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_61_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput289 _13974_/Y la_iena[38] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_285_5067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24511__A _31290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_76_core_clk _31798_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16999__A3 _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24915__B1 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21992__A3 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30139_ hold233/A _30139_/CLK _30139_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_247_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_2268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_5332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26380__A2 _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21729__B1 _21366_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_109_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19398__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_23_0_core_clk clkbuf_opt_23_1_core_clk/A clkbuf_5_23_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23194__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15671__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20250__S _20258_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22961_ VGND VPWR _22965_/S _30473_/Q _30138_/Q _30138_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_5327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_361_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24700_ _31453_/Q _24693_/X _24698_/X _24699_/Y _24694_/Y _24700_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_244_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18070__A1 wire3863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21912_ _21912_/Y _21485_/X _21561_/Y _21559_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 X_25680_ _25682_/C _25677_/Y _25679_/Y _25680_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26132__A2 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22892_ VGND VPWR _22882_/B _22876_/B _22935_/A _22892_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_263_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_3780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_2817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24631_ _24637_/C _24630_/Y _24590_/Y _24586_/Y _17895_/C _31546_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__25340__B1 _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24143__B2 _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21843_ VGND VPWR _21410_/A _21842_/X _21853_/B _21843_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_129_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18655__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25891__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27350_ VGND VPWR hold144/A _32205_/Q _27266_/X _32205_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24562_ _25149_/A _24565_/B _31210_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XPHY_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25061__B _25069_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30418__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21774_ _14405_/X _29780_/D _21773_/X hold417/A _21772_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XPHY_716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_2962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_105_4170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21081__S _21098_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26301_ _26301_/Y _26301_/B _26870_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_33_3942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_2867 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23513_ VGND VPWR _23513_/S _28395_/Q wire3668/A _23513_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20725_ VGND VPWR _20752_/S _27680_/A1 _29240_/Q _29240_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14919__C1 _14919_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28465__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27281_ VGND VPWR _27281_/S _32148_/Q _27280_/X _32148_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15187__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16384__A1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24493_ _24493_/X _31223_/Q _31224_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XANTENNA_wire3693_A _30350_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_2724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23103__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29710__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29020_ _29020_/Q _32428_/CLK _29020_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26840__B1 wire753/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26232_ VPWR VGND _31604_/D _26232_/B _26242_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_260_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22457__A1 _20987_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23444_ _23444_/Y _29380_/Q _29838_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_238_3100 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20656_ _23879_/B _20669_/C _20673_/D _20656_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XANTENNA__14934__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19994__B _19994_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold218_A hold218/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24851__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20468__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19322__A1 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1908_A _18903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30568__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26163_ _31049_/Q _31048_/Q _26164_/B _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_7_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3860_A _29857_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16136__A1 _28814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23375_ VGND VPWR _23388_/S _30353_/Q _29671_/Q _30353_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27396__A1 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18390__S _18390_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26199__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20587_ VGND VPWR _20589_/S wire1837/X _29102_/Q _29102_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_84_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17333__B1 _17329_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19873__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1716_A _23380_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31813__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22472__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25114_ _25114_/B _25122_/D _31197_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_2 XFILLER_255_4192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22326_ _22326_/X _30452_/Q wire3160/A hold212/A _18535_/C _14069_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__16687__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2956 VPWR VGND _22180_/S _23304_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_101_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26094_ _26093_/X _31544_/Q _26094_/X _26100_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_191_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20425__S _20425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25946__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29860__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14698__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_2758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_2706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_148_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15895__B1 _15894_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23957__A1 wire3513/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15519__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25045_ _25065_/A _19570_/X _25045_/X _25069_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__13828__A _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29922_ hold446/A _32365_/CLK _29922_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_62_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23957__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27148__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22257_ _30048_/Q _22257_/X _21032_/B _22278_/D _22256_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_82_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21968__B1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21208_ _29649_/D _23342_/A _23354_/C _21211_/A _18540_/X _29737_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_43_3047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20371__D _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_1918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29853_ VGND VPWR _29853_/D _32071_/CLK _29853_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_22188_ VGND VPWR _22280_/S _30302_/Q _30392_/Q _22188_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_188_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31963__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2200 VPWR VGND wire2200/X wire2201/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1404 VPWR VGND _19317_/A2 _18662_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20640__A0 _29186_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15647__B1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2211 VPWR VGND _19738_/A _25041_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1415 _20901_/S _22551_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__24906__B1 _24905_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28804_ _28804_/Q _32355_/CLK _28804_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2222 VPWR VGND _25035_/B wire2222/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_266_516 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21983__A3 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21139_ VGND VPWR _21139_/S _27265_/A0 _29583_/Q _29583_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1426 VPWR VGND _27509_/A1 _18298_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_40_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15111__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29784_ hold289/A _29788_/CLK _29784_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1437 VPWR VGND _27154_/A1 _18273_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26371__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26996_ _31982_/D _31982_/Q _26995_/Y _27001_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_clkbuf_leaf_299_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1448 VPWR VGND _17596_/D _17484_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19389__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2255 wire2255/A wire2255/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21256__S _23536_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1521 wire1521/X _14544_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_130_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28735_ _28735_/Q _31796_/CLK _28735_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13961_ _28536_/Q _13961_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25947_ _25946_/X _26694_/C _31495_/Q _25935_/X _31487_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22393__A0 wire831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1554 VPWR VGND wire1554/X wire1557/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14870__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2299 VPWR VGND wire2299/X _32598_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_3284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32319__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15700_ VGND VPWR _15702_/S _28111_/Q _29067_/Q _15700_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire1565 VPWR VGND _14545_/A wire1565/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout3299_A _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18061__A1 wire3894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17035__A _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16680_ VGND VPWR _16680_/X _16679_/X _16940_/B1 wire962/X _16678_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28666_ _28666_/Q _32498_/CLK _28666_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_199_5304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2424_A _19784_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_3820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25878_ VGND VPWR _31457_/D _25878_/B _25878_/A _25878_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire1587 VPWR VGND wire1587/X wire1587/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13892_ _28605_/Q _13892_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_235_947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29240__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22876__A _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24134__A1 _31115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14378__B _14383_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26348__A _26785_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23471__S _23497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24134__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15631_ _15625_/X _15626_/X _15630_/X _15632_/A1 _15631_/Y _15631_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 X_27617_ VGND VPWR _27620_/S _27697_/A1 _32359_/Q _32359_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16611__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_2316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24829_ _26244_/A _24828_/Y _31058_/Q _24827_/Y _31058_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_262_4196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28597_ _28597_/Q _31873_/CLK _28597_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_95_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22145__B1 _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28808__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24685__A2 _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25882__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30098__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18350_ VGND VPWR _18357_/S _23285_/A1 _28128_/Q _28128_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19010__B1 _19005_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15562_ _15562_/X _15762_/A1 _15735_/B _15561_/X _15559_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27548_ _25641_/B _32256_/Q _27548_/X _25641_/A _32248_/Q _32264_/Q _32240_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_145_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20156__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23893__B1 _23891_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31343__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32469__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25402__D _25402_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19561__A1 _28461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17301_ VGND VPWR _17300_/X _14399_/A hold79/A _17245_/X _32299_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_89_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14513_ _14513_/Y _14513_/B _14513_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_223_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18281_ _18280_/Y _18269_/X wire3174/X _18281_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16375__A1 wire898/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2793_A _27503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27479_ VGND VPWR _27483_/S _32296_/Q _32297_/Q _27479_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15493_ VGND VPWR _15493_/X _15492_/X _15491_/X _15543_/S _15744_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14394__A _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25095__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_187_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29218_ _29218_/Q _32063_/CLK _29218_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17232_ _21953_/A2 _29905_/Q _21609_/A _22934_/A _16993_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_4 XFILLER_145_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14444_ _30433_/Q _23236_/C _30432_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_200_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28958__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30490_ _30490_/Q _32423_/CLK _30490_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14925__A2 wire1172/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20459__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19396__S _19415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2960_A _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17163_ _21953_/A2 wire3932/X _29896_/Q _16992_/X _21966_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XANTENNA__14544__D _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29149_ _29149_/Q _30903_/CLK _29149_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16127__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14375_ _31007_/Q _14376_/D _31013_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_10_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31493__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21120__A1 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17324__B1 _17324_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16813__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire851 VPWR VGND wire851/X wire851/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19864__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_4281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16114_ VGND VPWR _16826_/S _32309_/Q _28917_/Q _16114_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_234_4243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32160_ _32160_/Q _32160_/CLK _32160_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16678__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire884 VPWR VGND wire884/X wire884/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_139_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17094_ _17094_/Y _21623_/A _17094_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__21671__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_5007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20335__S _20335_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14689__A1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26811__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output559_A _28727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15886__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31111_ _31111_/Q _32546_/CLK _31111_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23948__A1 _28715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27982__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16045_ wire1541/X _14518_/A _29559_/Q _16045_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_6_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13738__A _31757_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27139__A1 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32091_ _32091_/Q _32528_/CLK _32091_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_23_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1092_A wire1093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15350__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19616__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3340 VPWR VGND _26218_/A _26913_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23646__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31042_ VGND VPWR _31042_/D _32580_/CLK _31042_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_117_3384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21955__A _21955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18824__B1 _18824_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3351 _26238_/A _26188_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_58_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22550__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23873__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14346__B1_N _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3373 _14133_/A _14300_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15638__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4180 VPWR VGND wire4180/X hold78/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_19804_ _25512_/A _19803_/X _19852_/A2 _28554_/Q _28554_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_113_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4191 wire4192/X _32603_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_2284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21674__B _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26362__A2 wire2200/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25165__A3 _24576_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28338__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1357_A _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17996_ VGND VPWR _18008_/S wire3881/X _27930_/Q _27930_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_29_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23176__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21166__S _21166_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24373__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3490 VPWR VGND wire3490/X _31265_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14310__B1 _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2493_A _20931_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_4326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19735_ _25703_/A _19734_/X _19772_/A _28524_/Q _28524_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15653__A3 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16850__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1960 VPWR VGND _19357_/B _19311_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_4940 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16947_ _16947_/X _29068_/Q _16947_/A2 _16960_/B2 _16458_/S _16946_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_284_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_752 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1971 wire1975/A _18856_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_78_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1982 _19179_/A2 wire1984/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14861__A1 wire1097/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_3617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18052__A1 _18625_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27311__A1 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31944_ _31944_/Q _32125_/CLK _31944_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19666_ _27076_/A _19680_/A _26791_/B _19666_/X _26781_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__26114__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16878_ _16878_/A2 _16878_/A1 _28802_/Q _16878_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_111_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16063__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24125__A1 _31178_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23381__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18617_ VGND VPWR _18617_/S _18617_/A1 _28331_/Q _28331_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15829_ VGND VPWR _16823_/S _28082_/Q _29038_/Q _15829_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28488__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31875_ hold329/A _32010_/CLK _31875_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_37_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19597_ _19597_/B _19535_/A _20100_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XFILLER_241_917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18475__S _18498_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14613__A1 _30486_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27080__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22136__B1 _30031_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25873__A1 _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15810__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29733__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19160__A _30273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_194_core_clk _31730_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_128_3491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27788__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18548_ _22620_/A _18563_/C _22620_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_30826_ _30826_/Q _32015_/CLK _30826_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23884__B1 _28613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20419__D_N _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20698__A0 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_1857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19552__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2925_A _20418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_123_core_clk _32125_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_258_4722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16366__A1 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30757_ _30757_/Q _30757_/CLK _30758_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_4733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18479_ VGND VPWR _18499_/S wire3873/X _28252_/Q _28252_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20162__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25086__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16366__B2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30710__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31836__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16905__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20510_ VGND VPWR _20515_/S _27509_/A1 _29028_/Q _29028_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_15_3683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23636__A0 _31085_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27090__A3 _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_5120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14916__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21490_ _21491_/A _21674_/A _21490_/Y _21491_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_220_173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30688_ hold414/A _32160_/CLK _30688_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_137_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19304__A1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29883__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24400__B1_N _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21647__C1 _21646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20441_ VGND VPWR _20447_/S _28961_/Q _27254_/A0 _28961_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17819__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32427_ _32427_/Q _32427_/CLK _32427_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_5618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21111__A1 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17315__B1 wire3095/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19855__A2 wire1330/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22454__A4 _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_3317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16669__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23160_ _23170_/B wire3739/X _23180_/A _23160_/X _23160_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_179_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15326__C1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21662__A2 _21426_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20372_ _23873_/D _25881_/D _26837_/D _20372_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_66_2313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32358_ _32358_/Q _32358_/CLK _32358_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26586__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1518 VPWR VGND _15265_/B2 _15546_/A3 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_118_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20245__S _20245_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30860__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31986__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1529 VPWR VGND _15758_/A1 _15707_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26050__A1 _31532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15877__B1 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18223__B _18223_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22111_ _22104_/B _13849_/Y _21032_/B _22111_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__29113__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15339__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31309_ _31309_/Q _31310_/CLK _31309_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19068__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23091_ _23049_/A _21211_/B _23057_/S _30431_/Q _23091_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_66_2357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24061__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3274_A _22078_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15341__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_2529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_1953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19607__A2 _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32289_ _32289_/Q _32568_/CLK _32289_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_135_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_4838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_2660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29454__D _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17618__A1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22042_ _14365_/B _22042_/X _22065_/B1 _22969_/S _23155_/A _17212_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__23556__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17618__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18815__B1 _19268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15892__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23783__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31216__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18291__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26850_ VGND VPWR wire2648/X _19522_/A wire749/X _26850_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire3441_A _32037_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19335__A _28142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21584__B _21646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26353__A2 _26335_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_2920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21076__S _21077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23167__A2 _23192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25561__A0 _31361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25801_ _32537_/Q _32539_/Q _27832_/A _25801_/D _32538_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_276_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14301__B1 hold353/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24364__B2 _31997_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16841__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26781_ _26781_/B _26694_/B _26781_/A _26781_/X _27076_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__21178__A1 _29620_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23993_ _30605_/Q wire1656/A _23993_/X _30541_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_22_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14479__A _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14852__A1 _14544_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22914__A2 wire3212/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28520_ VGND VPWR _28520_/D _31796_/CLK _28520_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__18043__A1 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25732_ _25731_/B _25867_/A _25731_/Y _31404_/D _25730_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_164_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22944_ VGND VPWR _23342_/A _21328_/A _30121_/Q _30121_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19240__B1 _19336_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26105__A2 _26112_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3706_A _30337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31366__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24116__A1 _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_4033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23291__S _23292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_2570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25313__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28451_ hold425/A _31837_/CLK _28451_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27853__A2 _32549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25663_ _31387_/D _31387_/Q _25662_/Y _25661_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_259_5209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22875_ VPWR VGND _22877_/A _22935_/A _22876_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__18385__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22127__B1 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31224__D _31224_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27402_ VGND VPWR _27403_/S _27278_/X _32251_/Q _32251_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24614_ _24276_/B _24636_/A _24260_/C _24613_/X _31528_/Q _31527_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_21826_ _21826_/X _21846_/A _14408_/A _21825_/X _22074_/A2 VGND VPWR _21824_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__27698__S _27698_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28382_ _28382_/Q _30272_/CLK _28382_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23304__B _23304_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25594_ VGND VPWR _25595_/C _25571_/C _25578_/X _25632_/B _31371_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_70_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_2199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27333_ VGND VPWR _27339_/S _32190_/Q _27268_/X _32190_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24545_ _31299_/Q _24544_/Y _24546_/C _31298_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__16357__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17302__B _17302_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21757_ _21757_/Y hold417/A _21769_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20153__A2 _19574_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21350__A1 _21550_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25616__A1 hold93/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_2521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20708_ VGND VPWR _20708_/S _29224_/Q _27696_/A1 _29224_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27264_ VGND VPWR _27264_/S _32139_/Q _27709_/A1 _32139_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23627__B1 _32561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14907__A2 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24476_ _24475_/C _31035_/Q _24476_/Y _26542_/C wire1326/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XPHY_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21688_ _21696_/B _21685_/X _21624_/X _21687_/X _21623_/X _21857_/S VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_133_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25092__A2 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_2806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29003_ _29003_/Q _31966_/CLK _29003_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_194_4566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26215_ _31596_/Q _26227_/A2 _26216_/B _32286_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_257_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_1665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_3_5_1_core_clk clkbuf_3_5_2_core_clk/A clkbuf_3_5_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_23427_ _29834_/Q _23427_/X _29376_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__16109__A1 _16445_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3239_A wire3237/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20639_ VGND VPWR _20639_/S _27699_/A1 _29185_/Q _29185_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27195_ VGND VPWR _32090_/D _27195_/B _27195_/A hold396/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XPHY_1189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input192_A mprj_dat_i[26] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19846__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_5527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3047_A _18087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_1717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14160_ _14168_/S hold120/X VPWR VGND hold122/X hold121/A VGND VPWR NF_sky130_fd_sc_hd__mux2_8 XFILLER_257_2852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26146_ VGND VPWR _26019_/A _19555_/X _26145_/X _31562_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_49_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23358_ VGND VPWR _23365_/S _30336_/Q _29654_/Q _30336_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17857__B2 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22850__A1 _29896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25919__A2 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19229__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2753 VPWR VGND _24441_/A _14147_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_218_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26631__A _31782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20861__A0 _29359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15868__B1 _28975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22309_ VGND VPWR _23373_/S _29895_/Q hold485/X _29895_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_2273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19059__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2786 VPWR VGND _27616_/S _27618_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14091_ _29715_/Q _14091_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_256_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26077_ VGND VPWR _26077_/X _31540_/Q _31539_/Q _26081_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_7_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15332__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24052__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23289_ VGND VPWR _23292_/S wire3846/X _30271_/Q _30271_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2374_A wire2375/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26988__D _26988_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25395__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24198__A4 _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26350__B _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17609__A1 _31707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25028_ _25681_/B1 _25027_/X _25086_/A2 _31157_/Q _31157_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29905_ VGND VPWR _29905_/D _32435_/CLK _29905_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_input53_A la_input[107] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29606__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18806__B1 _20870_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17609__B2 _31711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_1496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1201 _14610_/B1 wire1202/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__32141__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17085__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17850_ _17873_/B1 _31732_/Q _17849_/X _17850_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29836_ _29836_/Q _30475_/CLK _29836_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_182_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21494__B _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26344__A2 wire2231/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25001__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1223 wire1228/A _15757_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_5_3361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2030 VPWR VGND wire2030/X _14437_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15096__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2041 wire2042/X wire2041/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24355__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16801_ _16801_/X _29000_/Q _16814_/B1 _16805_/A3 _16838_/A1 _16800_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 Xwire2052 wire2053/X wire2052/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31709__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16832__A2 _16835_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17781_ _31729_/Q _17870_/A2 _17781_/X _31728_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29767_ _29767_/Q _30391_/CLK hold265/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2063 wire2064/X wire2063/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_14993_ VGND VPWR _15639_/S _29016_/Q _28984_/Q _14993_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26979_ _31974_/Q _26986_/D _31975_/Q _26979_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 Xwire2074 VPWR VGND wire2074/X wire2074/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14389__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14843__A1 wire1097/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22366__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28630__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2085 VPWR VGND wire2085/X wire2085/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_281_305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29756__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19520_ _19520_/A _19520_/B _26949_/A _19609_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__18034__A1 wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2096 VPWR VGND wire2096/X wire2096/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_92_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1351 wire1351/X wire1351/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_21_2452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xload_slew2852 VPWR VGND _21655_/A _21288_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28718_ VGND VPWR _28718_/D _31470_/CLK _28718_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_16732_ VGND VPWR _16961_/S _28798_/Q _28830_/Q _16732_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19231__B1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1362 VPWR VGND wire1362/X _19642_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_53_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13944_ _13944_/Y _28553_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_29698_ _29698_/Q _31970_/CLK _29698_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_264_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24107__A1 _28571_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32291__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24107__B2 _28475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19451_ _19446_/Y _28445_/Q _28442_/Q _19436_/Y _19451_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XFILLER_34_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16663_ _16663_/X _29188_/Q _16814_/B1 _16805_/A3 _16838_/A1 _16662_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__26509__C _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28649_ VGND VPWR _28649_/D _31815_/CLK _28649_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_203_4507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13875_ _28622_/Q _13875_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__16596__A1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15399__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14341__C_N _30336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25855__A1 _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4411 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30733__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20838__B _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31859__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18402_ VGND VPWR _18407_/S _28177_/Q wire3918/X _28177_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15712__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15614_ _15624_/A1 _29546_/Q _15614_/Y _15614_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_160_3511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19734__D_N _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31660_ _31660_/Q _32010_/CLK _31660_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_264_2889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19382_ _19382_/X _19382_/A1 _19376_/X _19381_/X _22104_/A wire1563/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_241_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16594_ _16594_/X _28930_/Q _16966_/A2 _16966_/A3 _16964_/B1 _16593_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23866__B1 _19789_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28780__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_3997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_4854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18308__B _18308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30611_ _30611_/Q _31846_/CLK hold304/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_34_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27401__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18333_ VGND VPWR _18333_/S _28112_/Q _27710_/A1 _28112_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_195_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25710__A _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15545_ VGND VPWR _15702_/S _30511_/Q _30797_/Q _15545_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17212__B _21586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31591_ _31591_/Q _32039_/CLK _31591_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20144__A2 _19554_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25068__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21341__A1 _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_3085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26525__B _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18264_ VGND VPWR _18317_/S _28097_/Q wire1792/X _28097_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30542_ _30542_/Q _32553_/CLK input53/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16899__A2 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27072__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15476_ _15751_/A1 _16910_/A2 _15476_/X _15646_/B1 _29263_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_51_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22545__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30883__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_3069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output676_A wire2359/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26280__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15020__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28010__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17560__A3 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17215_ VGND VPWR _17223_/S _30214_/Q _30403_/Q _17215_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14427_ _21746_/S _14426_/Y _14436_/B _20832_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_271_4218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17639__S _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23094__A1 hold209/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19298__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18195_ _29854_/Q _18158_/X _18195_/X wire3842/X _18254_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_236_3604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30473_ VGND VPWR _30473_/D _30473_/CLK _30473_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_86_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16543__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24291__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19837__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18324__A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_3462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32212_ _32212_/Q _32529_/CLK _32212_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17848__A1 _31735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15308__C1 wire1081/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17146_ VGND VPWR _17223_/S _30205_/Q _30394_/Q _17146_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14358_ _14358_/Y _14360_/B _17094_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__22841__A1 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17848__B2 _31734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21771__A1_N _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26541__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15859__B1 _29520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30113__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31239__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32143_ _32143_/Q _32464_/CLK _32143_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_80_3512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17077_ _17077_/A _29885_/Q _17077_/X _21778_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__16520__A1 _15770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24043__B1 wire740/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14289_ _29986_/Q _30318_/Q _14289_/X _29993_/Q wire3725/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_253_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27780__A1 _25031_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25240__C1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2314_A wire2316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28160__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29286__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_1951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23376__S _23376_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16028_ VGND VPWR _16026_/X wire1052/X _16028_/X _16040_/A2 _16027_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_256_1672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14531__B1 _29981_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22054__C1 _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32074_ VGND VPWR _32074_/D _32074_/CLK hold328/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15874__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2259 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17882__B _17895_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22280__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14597__A1_N _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31025_ _31025_/Q _31693_/CLK _31025_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_2693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25138__A3 _25142_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15087__A1 wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30263__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31389__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24996__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20228__B_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20080__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23149__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire725_A wire725/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2875_A _21098_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24346__B2 _31988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17979_ VGND VPWR _17983_/S _23297_/A1 _27916_/Q _27916_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_96_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14299__A _17882_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22357__B1 _18267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14834__A1 _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24897__A2 _24897_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14834__B2 _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18025__A1 wire3899/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_4156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19718_ _19718_/B _19718_/X _19718_/A _26687_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_2_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_375_core_clk _30450_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xfanout1790 VPWR VGND _27251_/A0 _18267_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_208_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27878__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20990_ VGND VPWR _21018_/S _29455_/Q wire1840/X _29455_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_148_2418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27296__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_2478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18576__A2 _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17379__A3 wire3570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19773__A1 _28543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27835__A2 _27834_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_304_core_clk _30475_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_225_4765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31927_ _31927_/Q _31927_/CLK hold409/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19649_ _26148_/A _19648_/X _19695_/A2 _28485_/Q _28485_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16587__A1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19602__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2850_A _21506_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22109__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17784__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25323__C _25325_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21580__A1 _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13931__A _28566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14598__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22660_ _22659_/D _22659_/B _22659_/A _22659_/C _22660_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_74_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_3674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31858_ _31858_/Q _32583_/CLK _31858_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21611_ _21611_/A _21698_/A _22067_/A _21611_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XFILLER_221_3939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27311__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1174_A _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30809_ _30809_/Q _31874_/CLK _30809_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_3095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16339__A1 _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30883__D wire711/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22591_ VGND VPWR _22598_/S hold128/A _22590_/X _30074_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27599__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20135__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31789_ _31789_/Q _32024_/CLK _31789_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_120_3016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23872__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26435__B _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24330_ _32012_/Q _19710_/B _24330_/X _31980_/Q wire1346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__17000__A2 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21542_ _14320_/X _21542_/X _21427_/B _21534_/A _14110_/Y _14109_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_72_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23609__B1 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24881__D _24881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21883__A2 _21713_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32014__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25074__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26271__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1341_A _19776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23140__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24261_ _31656_/Q wire1353/X _24261_/X _31579_/Q wire1301/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_30_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21473_ _21473_/Y _21473_/B _21473_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_wire3391_A wire3392/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24282__B1 wire1303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15562__A2 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19828__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18234__A _30326_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3489_A _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26000_ _26179_/B1 _25999_/Y _26015_/A _31515_/Q _31515_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_271_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23212_ VGND VPWR _23212_/S _30204_/Q _30134_/Q _30204_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_137_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17839__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20424_ VGND VPWR _20429_/S _28944_/Q _21070_/A1 _28944_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28503__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29629__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22832__A1 _22809_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24192_ _24192_/X _20673_/D wire1319/A _28643_/Q _31121_/Q _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__17839__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14481__B _30219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_91_core_clk _31479_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_23143_ VGND VPWR _23143_/X _23141_/X _23142_/X _23140_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_252_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32164__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20355_ VGND VPWR _20359_/S _27705_/A1 _28895_/Q _28895_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15314__A2 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24034__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27266__B _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3656_A _30460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27771__A1 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26574__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25231__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1414_A _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_1750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_20_core_clk _32177_/CLK clkbuf_leaf_20_core_clk/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_28_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23286__S _23286_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30606__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14522__B1 _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25067__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23074_ _30162_/D _23190_/B _23073_/X _30162_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_172_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27951_ _27951_/Q _30462_/CLK _27951_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_118_2255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20286_ VGND VPWR _20292_/S _27702_/A1 _28828_/Q _28828_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_62_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20703__S _20710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout874_A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_3806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28653__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26902_ _26902_/X _26762_/C _26902_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 X_22025_ _22024_/Y _21966_/A _21302_/X _22023_/Y _22025_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XFILLER_251_1024 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17067__A2 _30384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29779__CLK _29782_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3823_A wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22060__A2 _22057_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27882_ _27882_/Q _30294_/CLK _27882_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_22_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15078__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold285_A hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold11 hold11/A hold11/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20071__A1 _28681_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24337__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold22 hold22/A hold22/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_29621_ _29621_/Q _32306_/CLK _29621_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16814__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26833_ _26833_/Y _26898_/B _26833_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_287_2834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27282__A _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold33 hk_dat_i[31] hold33/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_40_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold44 hk_dat_i[29] hold44/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold55 hk_dat_i[14] hold55/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_148_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30756__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold66 input7/X hold66/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18016__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19213__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29552_ _29552_/Q _32358_/CLK _29552_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold77 hk_dat_i[6] hold77/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_4207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22899__A1 _30477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26764_ _26764_/B _26764_/Y _26764_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__29009__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold88 hold88/A hold88/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_23976_ _23976_/X _23974_/X _28526_/Q _24163_/B2 _19718_/B VGND VPWR _23975_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14002__A _28495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27287__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_5577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold99 hold99/A hold99/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21020__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_1277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28503_ _28503_/Q _31874_/CLK _28503_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_2_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_2813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25715_ _31401_/Q _25717_/C _25727_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__27826__A2 _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22927_ VGND VPWR _22928_/B _30480_/Q _22935_/A _22933_/S _22924_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_29483_ _29483_/Q _32137_/CLK _29483_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19512__B _19512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26695_ _26695_/Y _31796_/Q _31798_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_74_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13841__A _29827_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28434_ _28434_/Q _32435_/CLK _28434_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14589__B1 _14588_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17313__A _30935_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_4117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2122_A wire2123/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25646_ _31381_/Q _25750_/A _31382_/Q _25642_/C _25646_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_35_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input205_A mprj_dat_i[9] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22858_ VPWR VGND _22858_/X _22938_/B _30107_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_57_2879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15250__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28033__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29159__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21809_ _21473_/A _21460_/X _21809_/Y _21798_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_33_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17032__B _30324_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28365_ _28365_/Q _31920_/CLK _28365_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_1765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25577_ VGND VPWR _25109_/B _25577_/D _31369_/D _25577_/C _25576_/X VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XPHY_332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3604 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_5315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22789_ _29890_/Q _22796_/A _22786_/X _22788_/X _22933_/S _22745_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_142_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3164_A _23040_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18724__C1 _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23863__A3 _19858_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15330_ _15329_/X _15561_/C1 _15332_/A2 _28793_/Q _15330_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27316_ VGND VPWR _27321_/S _32175_/Q wire2801/X _32175_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_4595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24528_ _24518_/X _24527_/C _24538_/B _24519_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27054__A3 _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21874__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26798__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28296_ _28296_/Q _32269_/CLK _28296_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2407 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_2340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26262__A1 _31658_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30136__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15768__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15261_ _15261_/X _32060_/Q _15740_/B1 _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23076__A1 _30428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27247_ VGND VPWR _27259_/S _32122_/Q _27247_/A0 _32122_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2491_A _20933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24459_ _24459_/B _25962_/D _24467_/C _24459_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_201_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19819__A2 wire1330/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2625 VGND VPWR VGND VPWR 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NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16569__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17695_ VGND VPWR _17730_/S _17694_/X _17681_/Y _17695_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_182_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25828__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_3759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13751__A _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_1026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31712_ _31712_/Q _31894_/CLK _31712_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_203_4326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19434_ VGND VPWR _28440_/D _27028_/A wire2952/X _19432_/Y wire3532/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_160_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16646_ _15771_/B _16646_/A2 _16646_/X _16818_/A2 _29060_/Q _18661_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_260_2506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13858_ _13858_/Y _28639_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__32037__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24450__A2_N _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15241__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_4078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2456_A _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31643_ _31643_/Q _32567_/CLK _31643_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19365_ VGND VPWR _19365_/X _18856_/B _19367_/B1 _28048_/Q _19364_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_53_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16577_ wire992/X _16577_/X _16576_/X _16736_/S _29026_/Q _16966_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__27125__S0 _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20117__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23879__B _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13789_ _31157_/Q _13789_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_277_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23854__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26255__B _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18316_ _18316_/Y _18316_/A _22376_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_12_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28526__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15528_ _15527_/X _15561_/C1 _15723_/A2 _32438_/Q _15528_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21865__A2 _21842_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31574_ _31574_/Q _32115_/CLK _31574_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19296_ _19298_/A2 _27885_/Q _19296_/B1 _19296_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_258_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18191__B1 _18190_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23598__C _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25056__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18730__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_2698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23067__A1 hold162/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18247_ _18247_/Y _18246_/Y _18216_/X _22370_/A2 _18316_/A _18245_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 X_30525_ _30525_/Q _32016_/CLK hold383/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31061__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1591_A _23735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32187__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15459_ _15458_/X _15638_/B1 _15605_/A2 _32324_/Q _15459_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23067__B2 _30091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24264__B1 _26333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17596__C _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18054__A _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1689_A _26541_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold61_A hk_dat_i[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21617__A2 _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27367__A _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18178_ _18177_/X wire3174/A _29741_/Q _18179_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 X_30456_ hold411/A _30456_/CLK _30456_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_82_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26005__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5495 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_1978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_1745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27202__B1 _32094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28676__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17129_ VGND VPWR wire886/X _17122_/X _17128_/X _30391_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17893__A _24384_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18494__A1 wire3828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24016__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27753__A1 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30387_ _30387_/Q _30387_/CLK _30387_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_271_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27086__B _27100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26556__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25213__C1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29921__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_2023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24503__B _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20140_ _28714_/D _27664_/B _20139_/X wire877/A _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__22027__C1 _22025_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32126_ _32126_/Q _32322_/CLK _32126_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20523__S _20528_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22578__A0 _22617_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30779__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18246__A1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13926__A _28571_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32057_ _32057_/Q _32428_/CLK _32057_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20071_ _25904_/A _20070_/Y _20073_/A2 _28681_/Q _28681_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22042__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27505__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19443__B1 _28443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20053__A1 _28673_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21250__A0 _30428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24319__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31008_ _31008_/Q _31746_/CLK _31008_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_113_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27306__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23790__A2 _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30878__D wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2658 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14807__A1 _14816_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_5110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17832__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_5241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23830_ _23831_/A _19789_/B _31854_/Q _31819_/Q _26772_/A VGND VPWR _23829_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__30009__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25334__B _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3237_A wire3237/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27269__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21002__A0 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16009__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15480__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19746__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_5116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28056__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23135__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22976__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15782__C_N _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23761_ VGND VPWR _31781_/Q _23765_/C _23761_/X _23761_/C _31780_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 X_20973_ VGND VPWR _20980_/S _30179_/Q _29438_/Q _29438_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_409 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17757__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29301__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18229__A _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25500_ VGND VPWR _19498_/A _31330_/Q _25510_/D _25500_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_203_5550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22712_ VGND VPWR _22712_/X _22733_/A _29883_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_228_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17221__A2 _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26480_ _26489_/C _26478_/Y _26480_/X _27230_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__20909__D _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23692_ _19787_/X _23692_/X _20126_/A _24188_/A2 _31510_/Q _31463_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XFILLER_253_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15232__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14476__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26446__A _31699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25295__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30159__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25431_ _25430_/A _31296_/Q _24502_/X _24543_/D _25431_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__24892__C _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22643_ _22646_/A _22643_/B _22659_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_13_3406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23789__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16980__A1 _16979_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15783__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14440__C1 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23845__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28150_ _28150_/Q _32329_/CLK _28150_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_273_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_5373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25362_ _31275_/D _25360_/X _26236_/A _25359_/X _25361_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__14991__B1 _29250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22574_ VGND VPWR _22578_/S wire3701/X _22611_/C _22574_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17787__B _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29451__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18182__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14489__A1_N _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27441__A0 _32278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27101_ _23599_/B _27100_/X wire772/X _32028_/Q _32028_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_278_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18721__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1723_A _23373_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24313_ _24313_/X _26376_/A1 _32005_/Q _31973_/Q _26772_/A VGND VPWR _24312_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_159_3034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23058__A1 hold160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21525_ _21619_/C _21619_/B _21529_/C _21588_/A _21677_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA_clkbuf_opt_12_0_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28081_ _28081_/Q _32110_/CLK _28081_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25293_ _31262_/Q _25408_/B _25293_/Y _25303_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_33_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23058__B2 _30089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14492__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26795__A2 wire2668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21069__A0 _29520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_3963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27032_ hold500/A _27051_/A _31996_/Q _27035_/D _27033_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_159_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24244_ _30920_/D _26542_/B _31756_/Q _26542_/A _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__14743__B1 wire1508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold200_A hold200/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21102__B _22553_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21456_ VGND VPWR _21632_/C _21453_/Y _21444_/A _21459_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_139_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_2568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15940__C1 _15939_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout991_A wire996/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20816__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18899__A _28282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1112 VPWR VGND _15530_/A2 wire1113/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_271_4571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[4] wire2338/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20407_ VGND VPWR _20407_/S _27699_/A1 _28929_/Q _28929_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18485__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17288__A2 input201/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24175_ _24175_/X _20669_/B wire1314/A _28641_/Q _31119_/Q _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_235_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24007__B1 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22281__A2 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27744__A1 _32473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26547__A2 _14209_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21387_ _21534_/A _21506_/D _21486_/B _21514_/B _22934_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XANTENNA__25204__C1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15299__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_2525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23090__D_N _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1156 VPWR VGND _14817_/A2 _14884_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20292__A1 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23126_ _23049_/A _21211_/B _23057_/S _30438_/Q _23126_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_24_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3939 VPWR VGND _22756_/C _17228_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_4304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20338_ VGND VPWR _20338_/S wire1682/X _28878_/Q _28878_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_137_2664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1178 VPWR VGND _15614_/A2 _15435_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20433__S _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28983_ _28983_/Q _31479_/CLK _28983_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_257_1299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22569__A0 _22568_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19507__B _24388_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_1941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_4831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20660__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1998_A _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18237__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13836__A _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27934_ _27934_/Q _30272_/CLK _27934_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23057_ VGND VPWR _23057_/S _29708_/Q _20982_/B _23057_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23230__A1 _23491_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17308__A _17308_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22033__A2 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_297_core_clk _28183_/CLK clkbuf_opt_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_248_4017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19434__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2072_A wire2072/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20269_ VGND VPWR _20269_/S wire2001/X _28811_/Q _28811_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_118_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input155_A la_input[84] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput101 VPWR VGND _30686_/D la_input[35] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_226_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19985__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput112 VGND VPWR _30666_/D la_input[45] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__18788__A2 _18787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22008_ _14365_/B _22008_/X _22065_/B1 _22968_/S _23180_/A _17190_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_270_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput123 VGND VPWR _30646_/D la_input[55] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 Xclkbuf_leaf_226_core_clk _32299_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_0_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27865_ _27865_/Q _30282_/CLK _27865_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17027__B _17027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput134 la_input[65] _30626_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_189_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput145 VGND VPWR _30606_/D la_input[75] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__16799__B2 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21792__B2 _21708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput156 la_input[85] _30586_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__17742__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29604_ _29604_/Q _32433_/CLK _29604_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14830_ VGND VPWR _15623_/S _29591_/Q _29623_/Q _14830_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput167 la_input[95] _30566_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_26816_ _27087_/C1 _26815_/X _26835_/A _31858_/Q _31858_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_clkbuf_5_9_0_core_clk_A clkbuf_5_9_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput178 VPWR VGND mprj_dat_i[13] input178/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_265_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_5352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2337_A wire2338/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27796_ VGND VPWR _27801_/S _25027_/B _32519_/Q _32519_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25522__A3 _19432_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput189 mprj_dat_i[23] input189/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__20669__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14274__A2 _24447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19737__A1 _28525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_26_1_core_clk clkbuf_5_26_1_core_clk/X clkbuf_5_26_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__21264__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24191__C1 _24190_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22336__A3 _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29535_ _29535_/Q _32423_/CLK _29535_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_1302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15770__B _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14761_ _15228_/A2 _14760_/X _28946_/Q _15228_/A3 _14761_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_248_1925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26747_ _26746_/Y _26224_/A _31826_/Q _26760_/B _31826_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24960__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_5396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21491__C _21674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23959_ wire4086/X _25022_/B _23958_/X _13784_/A _23959_/X _19995_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__21544__A1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_910 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16500_ VGND VPWR _16500_/X _16497_/X _16500_/B1 _16068_/S _16499_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_22_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_921 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_932 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17480_ hold468/A _17452_/X _17483_/C _26464_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_wire2504_A _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29466_ _29466_/Q _32063_/CLK _29466_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28549__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14692_ _14692_/X _28840_/Q _14691_/X _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_207_2323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26678_ _26678_/Y _26678_/B _26678_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_232_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_943 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_954 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26483__A1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14386__B _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25286__A2 _25265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_965 _19051_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18960__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16431_ VGND VPWR _16431_/X _16722_/C1 wire1060/X _16430_/X _16429_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28417_ _28417_/Q _32426_/CLK _28417_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_976 _32343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25629_ _25629_/A hold94/A _25629_/X _31223_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__31084__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23297__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_987 _28722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23699__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29397_ _29397_/Q _30139_/CLK _29397_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15774__A2 _14442_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_998 _26801_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23836__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19150_ VGND VPWR _19202_/B _27910_/Q _27878_/Q _19150_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_183_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16362_ _16387_/A _16387_/C _32057_/Q _16362_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28348_ _28348_/Q _30294_/CLK _28348_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14982__B1 _32120_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21847__A2 _21853_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18173__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_1557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20608__S _20615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25038__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18101_ VGND VPWR _18109_/S wire3868/X _28030_/Q _28030_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26235__B2 _32296_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15313_ _15312_/X _15561_/C1 _15723_/A2 _29227_/Q _15313_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_220_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19081_ _19080_/X _19047_/S _19358_/A2 _27970_/Q _19081_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24307__C _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16293_ VGND VPWR wire992/A _29316_/Q _16292_/X _16293_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_259_2733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2873_A _21095_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28279_ _28279_/Q _30398_/CLK _28279_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_8_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_4114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17920__A0 _27858_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3713_A _30330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26786__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29944__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18032_ VGND VPWR _18051_/S wire3873/X _27964_/Q _27964_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30310_ _30310_/Q _30398_/CLK _30310_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29817__D _29817_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14734__B1 _29073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15244_ VGND VPWR _15756_/S _29602_/Q _29634_/Q _15244_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31290_ _31290_/Q _31763_/CLK _31290_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_68_3462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_4166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20807__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24604__A _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_3481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30241_ _30241_/Q _30477_/CLK _30241_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_3044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26522__C _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17279__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18476__A1 _29849_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15175_ _15610_/A2 _15175_/X _15174_/X _15277_/S _28097_/Q _15608_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 Xoutput608 _28708_/Q la_output[95] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22272__A2 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26538__A2 _26515_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27735__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30921__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput619 _23611_/D mprj_adr_o[15] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire4087_A wire4088/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20283__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_2955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14126_ _14126_/Y _24446_/A _24446_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_136_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30172_ hold368/A _30204_/CLK _30172_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18881__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20343__S _20360_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output541_A _28711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19983_ VGND VPWR wire1321/X _25022_/C _24947_/B _19983_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_29_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25210__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output639_A wire2425/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18228__A1 _28090_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_5523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13746__A _30759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18934_ _18934_/X _18931_/X _19156_/S _18933_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_0_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14057_ _31749_/Q _26530_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__19425__B1 wire3536/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1172_A wire1172/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20035__A1 _28664_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21232__A0 hold410/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23654__S _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28079__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18865_ VGND VPWR _18865_/X _18856_/B _19367_/B1 _28024_/Q _18864_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_248_4551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22836__A2_N _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30698__D input94/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17987__A0 _27921_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_2401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21783__A1 hold417/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22980__A0 _32397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29324__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_2314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17816_ _17816_/X _17873_/B1 _31725_/Q _31729_/Q _17874_/A2 VGND VPWR _17815_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_185_4874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26171__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18796_ _18793_/X _18794_/X _18796_/X wire1948/X _18795_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_36_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19991__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15462__A1 _15567_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19728__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21174__S _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24182__C1 _24181_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_2185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18694__D _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17747_ _17747_/X _17501_/X _31719_/Q _31723_/Q _17503_/A VGND VPWR _17746_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19152__B _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14959_ _15350_/A1 _16646_/A2 _14959_/X _15350_/B1 _28879_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_282_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_4148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30301__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17739__B1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31427__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15172__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2479_A _20989_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17203__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1604_A _19993_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17678_ _17678_/X _17501_/X _31713_/Q _31717_/Q _17503_/A VGND VPWR _17677_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_235_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29474__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27671__A0 wire2248/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19417_ VGND VPWR _19417_/S _27708_/A1 _28433_/Q _28433_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_14_3704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17888__A _24590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16629_ _16959_/A2 wire3281/A _32363_/Q _16629_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23288__A1 wire3851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27916__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18483__S _18489_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14568__A3 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15900__S wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21299__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27796__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31626_ _31626_/Q _31737_/CLK _31626_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19348_ wire1916/X _20858_/S _19347_/X _19345_/X _19348_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__21838__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30451__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23402__B _23597_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31577__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20518__S _20518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_1034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18164__B1 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27423__A0 _32107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25320__D _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19900__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24237__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_4195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16175__C1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31557_ _31557_/Q _31837_/CLK _31557_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16714__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19279_ _30279_/Q _19279_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_138_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21310_ _21310_/B _21576_/A _21310_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_47_4236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24788__A1 _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18215__C _29342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30508_ _30508_/Q _32436_/CLK _30508_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_12_3494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14725__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22290_ VGND VPWR _23365_/S _29876_/Q hold456/X _29876_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25985__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31488_ _31488_/Q _31846_/CLK _31488_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_156_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length988_A wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21241_ VGND VPWR _22954_/S _29733_/Q hold323/A _29703_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold300 hold300/A hold300/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_258_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30439_ VGND VPWR _30439_/D _31961_/CLK _30439_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__32153__D _32153_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold311 hold311/A hold311/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27726__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4009 VPWR VGND _17298_/C _29204_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23460__B2 _22185_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold322 hold322/A hold322/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_wire3187_A wire3188/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22599__A_N _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold333 hold333/A hold333/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20274__A1 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_15_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16478__B1 _32359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold344 hold344/A hold344/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25737__B1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21172_ VGND VPWR _21172_/S _29615_/Q _27265_/A0 _29615_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold355 hold355/A hold355/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20253__S _20258_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3308 VPWR VGND _14365_/B _21099_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold366 hold366/A hold366/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25201__A2 _24572_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold377 hold377/A hold377/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_99_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18219__A1 _18269_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19416__A0 _28432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold388 hold388/A hold388/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32109_ _32109_/Q _32345_/CLK _32109_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20123_ _26861_/C1 _20122_/Y _20122_/A _28707_/Q _28707_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15150__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_390_core_clk _30378_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xhold399 hold399/A hold399/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_8_2349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17690__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25980_ _26017_/C _31506_/Q _25980_/Y _27053_/B _25980_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XFILLER_277_238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_3757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout824 _22449_/Y _22511_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire2618 VPWR VGND _24600_/B _14238_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_259_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20026__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_5314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2629 wire2630/X _19531_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_3_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19967__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout846 VPWR VGND wire847/A wire853/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_20054_ _20054_/Y _24951_/B wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_24931_ _24931_/Y _24931_/B _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_249_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32202__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25345__A _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_2140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout857 VPWR VGND _19992_/A2 _19928_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_132_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18658__S _18658_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21774__A1 hold417/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19431__A3 _19429_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout879 VPWR VGND wire881/A wire883/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17562__S _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1939 VPWR VGND wire1939/X wire1939/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_41_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_3673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27650_ VGND VPWR _27657_/S wire2259/A _32389_/Q _32389_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_58_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17442__A2 input197/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24862_ _31076_/D _24861_/Y wire2253/X _24470_/C _25109_/B wire868/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_227_3901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15989__C1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3619_A wire3620/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19719__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21084__S _21090_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16650__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26601_ _26601_/X _31847_/Q wire3452/A wire817/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_76_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24712__A1 _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29817__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23813_ _30832_/D _23813_/C _23813_/A _23822_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_27581_ _25643_/C _32195_/Q _27582_/A _25643_/B _32187_/Q _32203_/Q _32179_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_227_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24793_ _31050_/Q _24793_/X _24793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__16178__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21526__A1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1481_A _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_206 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22723__B1 _29734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19195__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29320_ _29320_/Q _32318_/CLK _29320_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_217 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32352__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22200__C _29827_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26532_ _31749_/Q _31751_/Q _31750_/Q _26533_/D _26534_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_228 wire2090/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23744_ _23744_/D _31766_/Q _23744_/Y _31768_/Q hold196/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__27111__C1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20956_ VGND VPWR _20980_/S _30162_/Q _29421_/Q _29421_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_239 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16402__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_3500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_1978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17745__A3 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18942__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29251_ _29251_/Q _30783_/CLK _29251_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_2887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23279__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3890_A _29848_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26463_ _31616_/Q _17605_/B _26463_/Y _26464_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_282_1860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23675_ _30803_/D _24481_/B _31192_/Q _26542_/A _24888_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_162_3981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18393__S _18397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24476__B1 _31035_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16906__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20887_ VGND VPWR _22550_/S _20886_/X _29372_/Q _29372_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28841__CLK _30866_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23818__A3 _19858_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29967__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28202_ _28202_/Q _30415_/CLK _28202_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_2589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25414_ _25414_/X _25380_/C _31286_/Q _25414_/B1 _31278_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_52_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22626_ _22626_/Y _22663_/B _22747_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__22487__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29182_ _29182_/Q _32318_/CLK _29182_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21829__A2 _21410_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26394_ _26182_/A _26393_/Y _26386_/X _31684_/Q _31684_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_139_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20428__S _20440_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27414__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26904__A _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26217__B2 _32287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28133_ _28133_/Q _30451_/CLK _28133_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20655__C _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_54_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3054_A _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24228__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25345_ _25364_/D _31270_/Q _31272_/Q _31271_/Q _25346_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_259_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15508__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22557_ VGND VPWR _22616_/S hold153/A wire3707/X _30054_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16705__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1913_A _18697_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30944__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18170__A3 wire3911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22239__C1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14716__B1 _29620_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21508_ _21628_/C _21506_/D _21506_/A _21628_/D _21508_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20374__D _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28064_ _28064_/Q _30272_/CLK _28064_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25276_ _31258_/D _25274_/Y _25595_/A _25275_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_276_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28991__CLK _31977_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22488_ VGND VPWR _22512_/A3 _22512_/A4 _22512_/A2 _22488_/X _30005_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_6_837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length856 VPWR VGND _19968_/A2 _19984_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25440__A2 _31360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27015_ _31989_/D _31989_/Q _27014_/Y _27020_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__18458__A1 _18617_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24227_ VGND VPWR _24232_/S _30903_/Q _24227_/A0 _30903_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_155_2005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3319_A _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length878 VPWR VGND wire877/A _25000_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21439_ _21444_/C _21464_/B _21439_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_191_4388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19518__A _19518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22254__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27717__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23451__B2 _22095_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14731__A3 wire1705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20671__B _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20265__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16469__B1 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21259__S _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_Di0[12] _14180_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24158_ wire716/A _24199_/B1 _24157_/X _24156_/X _24153_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XANTENNA__15765__B _15765_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3736 _30284_/Q _17234_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_98_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3747 VPWR VGND _22663_/B _22747_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29347__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3820 VPWR VGND wire3820/X _18239_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23109_ _30169_/D _23185_/B _23108_/X _30169_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_267_4415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15141__B1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23203__A1 hold394/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22006__A2 _22003_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3831 _29866_/Q wire3831/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17681__A2 _26470_/B VGND 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VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25702__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30790_ _30790_/Q _32353_/CLK _30790_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_2612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18394__A0 _28171_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30474__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22190__A1 _22243_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_740 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25259__A2 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_29449_/Q _32269_/CLK _29449_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_1067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14675_ VGND VPWR _14675_/S _14674_/X _14673_/X _14675_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19700__B _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15747__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_773 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16944__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_784 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23809__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19202_ _28264_/Q _19202_/X _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20846__B _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_795 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16414_ _29669_/D wire892/X _16395_/X _16413_/X _16404_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_278_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32460_ _32460_/Q _32547_/CLK _32460_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17394_ hold3/X _17390_/X hold214/A _17245_/X hold4/A _26974_/B VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a2111o_4 XANTENNA__20338__S _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output491_A _28653_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27405__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22119__A _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_3521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output589_A _28691_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18316__B _22376_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24482__A3 _24480_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31411_ _31411_/Q _32416_/CLK _31411_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19133_ _19132_/X _19151_/S _19203_/A2 _27973_/Q _19133_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_16_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24219__A0 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16345_ _16345_/X _29631_/Q _16814_/B1 _16805_/A3 _16838_/A1 _16344_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18697__A1 _23343_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17220__B _22046_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30981__D _30981_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32391_ _32391_/Q _32473_/CLK _32391_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23690__A1 _24645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_4853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22493__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18697__B2 _22123_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19894__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26533__B _31750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18161__A3 _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25967__A0 _31499_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14707__B1 wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19064_ _19189_/A2 _28388_/Q _19063_/X _28388_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23649__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31342_ _31342_/Q _31977_/CLK _31342_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_12_2056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16276_ _16841_/C1 wire1055/A _16274_/X _16276_/Y _16275_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_256_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16172__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23876__C _23876_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25431__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18015_ VGND VPWR _18015_/S wire3820/X _27949_/Q _27949_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18449__A1 wire3864/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15227_ _32358_/Q _15233_/B1 _15575_/A _15575_/C _15227_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31273_ VGND VPWR _31273_/D _31282_/CLK _31273_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22245__A2 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21677__B _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27708__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25149__B _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[25] wire2390/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput405 _13796_/Y la_oenb[27] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14722__A3 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1387_A _19518_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_5536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18332__A _18332_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2227_A _19546_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput416 _13879_/Y la_oenb[37] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27108__D_N _26892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21169__S _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput427 _13869_/Y la_oenb[47] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30224_ _30224_/Q _32078_/CLK _30224_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_255_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25719__B1 _31402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23993__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15158_ wire3251/X _16814_/A2 _15158_/X _15609_/B1 _28756_/Q _14544_/D VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 Xclkbuf_leaf_148_core_clk _32332_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__32225__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_200_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput438 _13859_/Y la_oenb[57] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18854__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27184__A2 _27185_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput449 _13913_/Y la_oenb[67] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_214_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24988__B _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25195__A1 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14109_ _14109_/Y _30467_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_4_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15132__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30155_ _30155_/Q _30667_/CLK _30155_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_133_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19966_ _19965_/X _28631_/Q _28631_/D _19968_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15089_ _16959_/A2 wire3302/X _29285_/Q _15089_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25734__A3 _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26931__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20008__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21205__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15683__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19949__A1 _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2690_A _14167_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28714__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23384__S _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24942__A1 _31115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18917_ _19358_/A2 _27995_/Q _19047_/S _18917_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xclkbuf_opt_13_0_core_clk clkbuf_opt_13_1_core_clk/A clkbuf_5_10_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_hold24_A hk_dat_i[22] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17890__B _24612_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30086_ VGND VPWR _30086_/D _32078_/CLK _30086_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_263_5536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20801__S _20801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19897_ _19896_/X _28598_/Q _28598_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__21756__A1 wire831/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18478__S _18491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14891__C1 wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2596_A _17462_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32375__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_351_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24500__C _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18621__A1 wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18848_ _18847_/X _19375_/B1 _19375_/A2 _28151_/Q _18848_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_267_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21851__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14238__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30817__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire805_A wire805/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_4819 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_3842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_5553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18779_ _18779_/X _18778_/X _18773_/X _22090_/B1 _18771_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_209_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20102__A wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21508__A1 _21506_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15986__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14789__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28864__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_1833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23902__C1 _23901_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20810_ VGND VPWR _20813_/S _29323_/Q _27699_/A1 _29323_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26708__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24170__A2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21790_ VGND VPWR _21640_/A _21789_/Y _21853_/B wire743/A VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_127_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14100__A _29381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22181__A1 _30102_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30988_ _30988_/Q _32032_/CLK _30988_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_149_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24386__C_N _24389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17188__B2 _29439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26447__A1 _31699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24509__A _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22181__B2 _22181_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18924__A2 _18920_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22720__A3 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_3607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20741_ VGND VPWR _20747_/S _27251_/A0 _29256_/Q _29256_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15738__A2 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30967__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31052__D _31052_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22469__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23460_ VGND VPWR _29367_/Q _13840_/Y _29371_/Q _23460_/X _22185_/C VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_200_5586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18137__A0 _28065_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20672_ _20672_/X wire1875/X _31413_/Q _25566_/B _31408_/Q _19857_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__20248__S _20261_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19334__C1 _19333_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22411_ VGND VPWR _22619_/S _29967_/Q _21929_/A _29967_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_1465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31609_ _31609_/Q _32300_/CLK _31609_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18688__A1 _30088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16148__C1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23391_ _23391_/X _20980_/S _30368_/Q _18666_/C _22180_/S _22284_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 Xmax_length3817 VPWR VGND _18244_/B _18623_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22484__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23681__A1 _24735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_3605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_2814 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14961__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22971__B _31402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20495__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25130_ _25128_/Y _25148_/A _31202_/D _25142_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_22342_ _22342_/Y _18231_/Y _18216_/X _22370_/A2 _22384_/B _18230_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__23559__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21692__B1 _21905_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16163__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23786__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24244__A _31756_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28244__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25061_ _25065_/A _24931_/B _25061_/X _25069_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_clkbuf_leaf_138_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_4194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3471_A wire3472/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22273_ VGND VPWR _22273_/S _30314_/Q _30404_/Q _22273_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_153_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25059__B _25059_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15910__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24630__B1 _17895_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3351 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3569_A _30875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19101__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24012_ VGND VPWR _23879_/A _23879_/B _24009_/X _24012_/X _24011_/X _20673_/C VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_268_5414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21079__S _21090_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21224_ VGND VPWR _22448_/C _21285_/A hold384/A _21224_/X _29688_/Q _22448_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 Xhold130 hold130/A hold130/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_66_3999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23984__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_390_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold141 hold141/A hold141/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17112__A1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_2360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27175__A2 _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold152 hold152/A hold152/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_153_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_4436 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21995__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30347__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2309 VPWR VGND _19789_/C wire2316/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold163 hold163/A hold163/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout787_A _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold174 hold174/A hold174/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_28820_ _28820_/Q _32428_/CLK _28820_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3127 VPWR VGND _19505_/A _14232_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21155_ VGND VPWR _21158_/S _29598_/Q _27248_/A0 _29598_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_2683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17663__A2 _17576_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold185 hold185/A hold185/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27274__B hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23197__A0 _30119_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold196 hold196/A hold196/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__28394__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26922__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2404 _14148_/Y wire2404/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_216_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22699__A _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2415 _20669_/C wire2415/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_clkbuf_leaf_289_core_clk_A clkbuf_opt_32_1_core_clk/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23294__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20106_ _20106_/Y _20106_/B _20106_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__16871__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21807__S _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_A0[5] wire2770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2426 wire2427/X _19784_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25075__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28751_ _28751_/Q _32424_/CLK _28751_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21086_ VGND VPWR _21094_/S _27253_/A0 _29537_/Q _29537_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25963_ VGND VPWR wire755/X _19648_/A _31495_/Q _31495_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_112_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20711__S _20717_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27558__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18388__S _18388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21747__A1 hold449/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2448 VPWR VGND _24232_/S _24223_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_214_2680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout954_A wire958/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1714 VPWR VGND _23372_/S _22307_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2459 VPWR VGND _23595_/S _23596_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout1696_A wire1707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15805__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27702_ VGND VPWR _27709_/S _27702_/A1 _32436_/Q _32436_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_2995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18612__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24914_ _25718_/A _24913_/Y _24950_/A2 _31101_/Q _31101_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 X_20037_ _25076_/C1 _20036_/X wire847/X _28665_/Q _28665_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17415__A2 _17415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3903_A wire3904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28682_ VGND VPWR _28682_/D _32350_/CLK _28682_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_110_4091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23307__B _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25894_ _25904_/A _25893_/Y _25903_/S _31464_/Q _31464_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30497__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19955__A4 wire2302/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19504__C _24610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14229__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16623__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1769 VPWR VGND wire1769/X _19509_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_112_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27633_ VGND VPWR _27636_/S wire2242/X _32375_/Q _32375_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31742__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_4064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25803__A _32540_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24845_ VPWR VGND _31067_/D _32564_/Q _25447_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_95_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22614__A_N _22618_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15977__A2 _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18290__A_N hold453/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1863_A wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25894__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_2055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14648__C _14648_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24161__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27564_ _27564_/Y _27594_/B _27564_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_128_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17179__A1 _29898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2035_A wire2036/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24776_ _31446_/Q _24759_/X _24775_/X _24754_/Y _24757_/Y _24784_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XANTENNA__14010__A _28487_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17024__C _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input118_A la_input[50] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21988_ _22010_/A _21942_/S _21988_/Y _22010_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__17179__B2 wire3930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22172__A1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26438__A1 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29303_ _29303_/Q _32402_/CLK _29303_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18915__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26515_ VGND VPWR _26515_/X _17505_/X _17507_/Y _26514_/Y _17506_/Y _17515_/Y VGND + VPWR NF_sky130_fd_sc_hd__a311o_2 XFILLER_240_3920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23727_ _23727_/X _20671_/A _31520_/Q _25566_/B _31568_/Q _20671_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_74_2061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19520__B _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20939_ VGND VPWR _20947_/S _29404_/Q hold353/X _29404_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27495_ VGND VPWR _27505_/S wire1682/X _32310_/Q _32310_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16926__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26775__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_1349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20666__B _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31892__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29234_ _29234_/Q _32136_/CLK _29234_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14460_ _14090_/Y _30438_/Q _14460_/X _14089_/Y _30436_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14937__B1 wire1066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26446_ _26446_/D _26446_/C _26446_/Y _31699_/Q _26446_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_275_4717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_177_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23658_ VGND VPWR _23661_/S _27251_/A0 _30788_/Q _30788_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_2911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23121__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14401__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20385__C _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22609_ _22609_/X _22578_/S _22594_/S wire3702/X _30363_/Q VGND VPWR _22608_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18679__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29165_ _29165_/Q _32416_/CLK _29165_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14391_ _31050_/Q _14393_/B _31051_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_26377_ _26376_/X _31676_/Q _31676_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__22475__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23672__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14156__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19876__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23589_ VGND VPWR _23595_/S _27258_/A0 _30509_/Q _30509_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_104_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18591__A1_N _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14383__C _14383_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16130_ _16447_/A2 _16447_/A1 _28950_/Q _16130_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28116_ _28116_/Q _31933_/CLK _28116_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19340__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23469__S _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_1950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25328_ _31268_/D _25326_/Y _26244_/A _25327_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_input83_A la_input[19] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21778__A _21778_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31122__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25949__B1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29096_ _29096_/Q _32429_/CLK _29096_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32248__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17351__A1 wire3575/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20682__A _24618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_2335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26071__C1 _26102_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_4155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16061_ _16061_/X _16056_/Y _16052_/Y wire921/A _16060_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_276_2173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28047_ _28047_/Q _28402_/CLK _28047_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22227__A2 _22241_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25259_ _25259_/X _25263_/B1 _29870_/D hold75/A _25263_/A2 VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_254_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15901__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15012_ VGND VPWR _15012_/X _15009_/X _15011_/X _15517_/A1 wire1228/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_251_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_1303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28737__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_241_core_clk _31998_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23975__A2 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17103__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3522 _31047_/Q _14067_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_237_1445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3533 VPWR VGND wire3536/A _31044_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21986__A1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3544 _31021_/Q _14293_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19820_ _19819_/X _28562_/Q _28562_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__25177__A1 _31219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31272__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32398__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17654__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26374__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18851__A1 _28378_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2821 wire2827/A _23669_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire2836_A _23301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29998_ _29998_/Q _30428_/CLK _29998_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23188__B1 _23187_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14468__A2 _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15665__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2843 VPWR VGND _21713_/A _21710_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24601__B _24602_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16862__B1 wire1062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3650 _21549_/A hold483/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23727__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3599 _19584_/A _19628_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_19751_ _25718_/A _19750_/Y _19772_/A _28532_/Q _28532_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire3661 VPWR VGND wire3661/X _30455_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_270_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16963_ _16965_/A2 _16725_/C _29334_/Q _16963_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20621__S _20625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28949_ _28949_/Q _32432_/CLK _28949_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_56_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3672 VPWR VGND _14515_/B _23302_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27549__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21738__A1 _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_24_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25416__C _25416_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3683 VPWR VGND _18682_/A _30419_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14873__C1 wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18702_ _29813_/Q _18701_/X _29814_/Q _18683_/X _18702_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire3694 VPWR VGND _22611_/C _30348_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_0_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_5255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_1044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15914_ wire1533/X wire3276/X _28808_/Q _15914_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire2960 VPWR VGND _18649_/S _18655_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18603__A1 wire3880/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31960_ _31960_/Q _32122_/CLK _31960_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_3391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19682_ _27053_/B _19710_/B _19682_/Y _20096_/B _20061_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 Xwire2971 VPWR VGND _18622_/S _18601_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16894_ _16889_/X wire894/X _16950_/A1 _16893_/X _16894_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_37_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15417__A1 _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2993 VPWR VGND _18496_/S _18499_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20410__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25135__D _25135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24137__C1 _24129_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26809__A _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16614__B1 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_5520 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29830__D _29830_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26677__B2 _23772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30911_ _30911_/Q _30911_/CLK _30911_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18633_ VGND VPWR _18658_/S wire3892/A _28346_/Q _28346_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15845_ _16039_/A2 _15845_/X _15844_/X _16039_/C1 _28405_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_225_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23035__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_3880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30976__D _30976_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output504_A wire4053/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31891_ _31891_/Q _32565_/CLK _31891_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_1410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17930__S _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24152__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28117__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18564_ _18547_/X _21286_/C _18564_/Y _18563_/X _18562_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_1 X_30842_ _30842_/Q _32275_/CLK _30842_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_94_2459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15776_ wire963/A wire1449/X _16840_/A2 _14104_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA_wire1135_A _14551_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22548__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23360__A0 _29656_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_3897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_2833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17515_ _17515_/Y _31760_/Q _26530_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_204_4251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_3578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14727_ VGND VPWR _14727_/X _14726_/X wire1202/A wire1135/X _14725_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_15_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30773_ _30773_/Q _32110_/CLK _30773_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16917__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18495_ VGND VPWR _18495_/S wire3825/X _28268_/Q _28268_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_4896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_3870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21910__A1 hold253/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_570 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_2134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_581 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25101__A1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32512_ _32512_/Q _32527_/CLK _32512_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14928__B1 wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1302_A wire1303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_592 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17446_ wire3564/A _31933_/Q _17446_/X _17446_/B2 _17446_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18119__A0 _28048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14658_ wire1533/X _14816_/A1 _29103_/Q _14658_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_222_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16393__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23112__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19316__C1 wire1564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_cap2291_A _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32443_ _32443_/Q _32557_/CLK _32443_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17377_ VGND VPWR _26974_/B _32279_/Q _17424_/B _17424_/C _29859_/D _17376_/X VGND + VPWR NF_sky130_fd_sc_hd__a311o_4 XANTENNA__22466__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23663__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14589_ _14589_/X _30887_/Q _14588_/X _14817_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_239_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17327__D1 _17326_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29512__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_31_3188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14293__C _29975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19116_ _19202_/B _27908_/Q _19115_/X _19116_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_89_3988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19331__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23379__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16328_ _16328_/X _16325_/X wire923/X _16967_/A1 _16327_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_32374_ _32374_/Q _32403_/CLK _32374_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_329_core_clk _30387_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_66_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17885__B _24389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16145__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17342__A1 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17342__B2 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26601__A1 _31847_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19882__A3 wire2208/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15353__A0 _32130_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14156__A1 hold71/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19047_ VGND VPWR _19046_/X _19045_/X _19047_/S _19047_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_31325_ _31325_/Q _32560_/CLK _31325_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22218__A2 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16259_ VGND VPWR _16806_/S _29315_/Q _28753_/Q _16259_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19619__B1 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31615__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_3824 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1769_A _19509_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_2989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14234__A_N _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire755_A wire755/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23966__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31256_ hold94/A _31536_/CLK _31256_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__29662__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput224 wire3504/X gpio_mode0_pad VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xoutput235 _14036_/Y la_iena[104] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput246 _14026_/Y la_iena[114] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27080__D_N wire2200/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25168__A1 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput257 _14016_/Y la_iena[124] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30207_ _30207_/Q _30314_/CLK _30207_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15105__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_322 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16448__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput268 _13772_/Y la_iena[19] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31187_ _31187_/Q _32560_/CLK _31187_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput279 _13762_/Y la_iena[29] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15656__B2 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24915__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23718__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30138_ _30138_/Q _30456_/CLK _30138_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_1843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31765__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19949_ VGND VPWR wire1319/A wire2302/A _19567_/X _19949_/X _25867_/A _19973_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20531__S _20543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19605__B _19605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22637__A_N _29726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26380__A3 wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14864__C1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2978_A _18524_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13934__A _28563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26117__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23194__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17406__A _32107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22960_ VGND VPWR _22965_/S _30472_/Q hold423/A _30137_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30069_ hold151/A _32287_/CLK _30069_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3052_A _18119_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18001__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15408__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 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XFILLER_84_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15344__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14147__B2 _24447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23406__A1 wire3442/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26093_ VGND VPWR _31544_/Q _26090_/C _31543_/Q _26093_/X wire2597/X _31542_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_273_3069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16541__C1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25946__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32540__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1709_A _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15895__A1 wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25044_ _25076_/C1 _25043_/X _25086_/A2 _31165_/Q _31165_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_212_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29921_ hold459/A _31912_/CLK _29921_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23957__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22256_ VGND VPWR _22263_/C _29837_/Q _22135_/A _22256_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_279_812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_load_slew2759_A _24276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21968__A1 _21501_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17097__A0 _17095_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21207_ _29648_/D _23057_/S _21206_/X _29648_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_62_2915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22090__B1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26356__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17636__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29852_ _29852_/Q _30425_/CLK _29852_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22187_ _30038_/Q _21051_/B _22187_/X _22186_/Y _22184_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_hold482_A hold482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14005__A _28492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2201 VPWR VGND wire2201/X _19577_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_166_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20640__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24906__A1 _31097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28803_ _28803_/Q _32435_/CLK _28803_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23709__A2 _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2212 VPWR VGND wire2212/X wire2213/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21138_ VGND VPWR _21139_/S _23671_/A1 _29582_/Q _29582_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1416 _18661_/X _20901_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_21_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29783_ hold307/A _29788_/CLK _29783_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20441__S _20447_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1427 _27702_/A1 _18298_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_112_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26995_ _31982_/Q _26999_/A _26995_/Y _27001_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_246_5542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2234 VPWR VGND _19937_/B wire2234/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14855__C1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1500 VPWR VGND wire1500/X wire1500/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2245 VPWR VGND wire2245/X _19531_/X VGND VPWR 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VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23017__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28665_ _28665_/Q _32160_/CLK _28665_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17035__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13891_ _28606_/Q _13891_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25877_ _31457_/Q _31456_/Q _25878_/C _25877_/D _31455_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_246_4896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_4273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1588 VPWR VGND wire1588/X _24284_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_199_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16072__B2 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26348__B _27120_/B VGND VPWR VPWR VGND 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VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20677__A _32337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27608__A0 _32350_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14622__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21272__S _23536_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25882__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19010__A1 _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27547_ _32335_/Q _25637_/Y _32335_/D _27546_/X _27545_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_15561_ _15761_/A2 _15561_/X _15560_/X _15561_/C1 _28430_/Q _15561_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_201_5147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24759_ _24759_/X _24770_/A _24758_/Y _24670_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_262_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23893__A1 _28518_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29535__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17021__A0 _17019_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23893__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_1638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15270__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17300_ VGND VPWR _17300_/X input202/X _17296_/X _17447_/A1 _17299_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_230_620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3459_A hold431/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14512_ VGND VPWR _29454_/D _14513_/B _30444_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_125_3879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19561__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18280_ _18280_/Y _29861_/Q _29341_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 X_15492_ VGND VPWR _15702_/S _30911_/Q _29189_/Q _15492_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27478_ VGND VPWR _27484_/S _32297_/Q _27477_/X _32297_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_89_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25057__C_N _24927_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32070__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14394__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17231_ VGND VPWR _18664_/B _30216_/Q _30405_/Q _17231_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_5622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29217_ _29217_/Q _31945_/CLK _29217_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_2213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14443_ _30424_/Q _23231_/C _18580_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_123_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26429_ _31695_/D _26426_/X _26403_/Y _26428_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__17986__A _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15583__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30512__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23645__A1 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21105__C1 _22433_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31638__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16780__C1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23199__S _23199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17162_ VGND VPWR _17223_/S _30207_/Q _30396_/Q _17162_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29148_ hold499/A _31961_/CLK _29148_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire830 VPWR VGND wire830/X wire830/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14374_ _31006_/Q _24424_/C _31005_/Q _24407_/B _24407_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XANTENNA__16127__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20616__S _20617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17324__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output287_A _13976_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire852 VPWR VGND wire852/X wire853/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_197_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19864__A3 _19531_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16113_ _16113_/X _32349_/Q _16150_/A2 _16832_/A3 wire951/A _16112_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_217_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire863 VPWR VGND wire863/X wire863/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21301__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15335__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_4293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17093_ _17092_/X _30387_/Q _16971_/A _17093_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA_wire2953_A _19430_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29079_ _29079_/Q _32134_/CLK _29079_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_23_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15886__A1 _32343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31110_ _31110_/Q _32470_/CLK _31110_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26811__B _26876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16044_ VGND VPWR _16837_/S _29214_/Q _29278_/Q _16044_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_62_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23948__A2 _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30662__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32090_ _32090_/Q _32528_/CLK _32090_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_117_4075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25708__A _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31788__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24070__A1 _28535_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15350__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24070__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17088__A0 _30386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24612__A _24612_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21959__B2 _21955_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3330 wire3364/X wire3331/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_97_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31041_ VGND VPWR _31041_/D _32560_/CLK _31041_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17925__S _17946_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22081__B1 hold461/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3341 VPWR VGND _26893_/C1 _27087_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19706__A _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21955__B _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3352 VPWR VGND _26182_/A _26184_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1085_A wire1085/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23873__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4170 VPWR VGND wire4170/X wire4171/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20631__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3374 _14133_/A _24446_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16835__B1 _16835_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19803_ _19849_/B _19786_/B _20654_/D _19803_/X _19803_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xwire4181 VPWR VGND wire4181/X hold73/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_187_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_5620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4192 wire4193/X wire4192/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_269_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output621_A _24380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20351__S _20354_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_4906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17995_ VGND VPWR _18012_/S wire3886/X _27929_/Q _27929_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_4053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31018__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26362__A3 _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14846__C1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22908__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14310__A1 _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19734_ _19760_/B _19973_/A1 _19734_/A _19734_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__24373__A2 wire1668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3491 VPWR VGND wire3491/X wire3491/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_3574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16946_ wire1010/X wire1482/X _28112_/Q _16946_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xfanout1961 wire1963/A _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__29065__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18588__B1 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1972 _19377_/B _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26539__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1983 VPWR VGND wire1984/A wire1997/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23662__S _23672_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_3828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27847__B1 _32547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2790 VPWR VGND _27630_/S _27626_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23008__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19665_ _26173_/B1 _19664_/X _19695_/A2 _28493_/Q _28493_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31943_ _31943_/Q _31998_/CLK _31943_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_169_3795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16877_ _16862_/X _16876_/X _16941_/C _16866_/X _16877_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_34_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22786__B _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3249 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17660__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24125__A2 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18616_ VGND VPWR _18616_/S wire3838/X _28330_/Q _28330_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_59_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15828_ _15828_/X _15825_/X wire920/X wire1035/X _15827_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__30042__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31874_ hold181/A _31874_/CLK _31874_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19596_ _25512_/A _19595_/X _19632_/A _28471_/Q _28471_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23333__A0 _17205_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_4297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_1803 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_2548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15271__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22136__B2 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19537__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21182__S _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25873__A2 _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32413__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18547_ _18547_/X _21286_/C _22078_/A _30440_/Q hold377/A _18545_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 X_30825_ _30825_/Q _32015_/CLK _30825_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20147__B1 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19160__B _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15759_ _15759_/X _29196_/Q _15759_/A2 _15759_/A3 _15368_/S _15758_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23884__A1 _31091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17012__A0 _20987_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23884__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15180__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27075__A1 _26793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19552__A2 wire2648/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21895__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4100 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30756_ hold275/A _32551_/CLK input45/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18478_ VGND VPWR _18491_/S _18478_/A1 _28251_/Q _28251_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_219_5419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25375__B1_N _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16366__A2 wire4148/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28902__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18760__B1 _19143_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26822__A1 _31861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30192__CLK _30274_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_2_1_core_clk clkbuf_opt_2_2_core_clk/A clkbuf_opt_2_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_17429_ _14401_/A1 _17429_/B _17429_/C hold14/X _29868_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__17896__A _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18491__S _18491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30687_ _30687_/Q _31436_/CLK hold414/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32563__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19304__A2 _19297_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21647__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20440_ VGND VPWR _20440_/S _28960_/Q _27698_/A1 _28960_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32426_ _32426_/Q _32426_/CLK _32426_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_163_core_clk _31877_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_11_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17315__A1 _32285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20526__S _20545_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_5007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19855__A3 _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14129__A1 _14133_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21211__A _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_3487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_opt_17_0_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13929__A _28568_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20371_ _26837_/D _23618_/B _24604_/B _23599_/A _23599_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 X_32357_ _32357_/Q _32357_/CLK _32357_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17866__A2 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15847__C wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15877__A1 _28871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26050__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22110_ _29816_/Q _22133_/D _29817_/Q _22119_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_235_2617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31308_ _31308_/Q _31310_/CLK _31308_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23939__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27309__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23090_ _23115_/B _23061_/B _23145_/A _23090_/X _29715_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__24061__A1 wire4062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32288_ _32288_/Q _32568_/CLK _32288_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_170_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15341__A3 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14144__A4 _14143_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24522__A _31219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22041_ _22041_/X _22040_/X wire2030/X _21900_/B _22039_/X VGND VPWR _22512_/A3 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_290_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1217_A _15286_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17618__A2 _17617_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26338__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31239_ hold103/A _32293_/CLK _31239_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_135_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32161__D _32161_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27535__C1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3267_A _14094_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1025_A wire1030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23783__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20083__C1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20622__A1 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_5439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20261__S _20261_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19335__B _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2052 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25800_ _32533_/Q _32534_/Q _32535_/Q _25799_/D _32536_/Q _25801_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XFILLER_165_5540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14301__A1 _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_1952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25561__A1 _31360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24364__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14301__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26780_ _26859_/C1 _26779_/X wire777/X _31840_/Q _31840_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire3434_A wire3435/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_5272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23992_ _28464_/Q _26838_/A1 _23992_/X _28592_/Q _24046_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_268_2437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14479__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14852__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23572__S _23573_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25731_ _25731_/B _25731_/Y _31404_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_183_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22943_ VGND VPWR _23342_/A wire3661/X _30120_/Q _30120_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_183_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28432__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21583__C1 _21655_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29558__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16054__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1394_A _26386_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_4271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28450_ _28450_/Q _31873_/CLK _28450_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_2735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_4446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25662_ _25661_/X _25750_/A _25662_/Y _31387_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27853__A3 _25807_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22874_ VGND VPWR _30474_/Q _29898_/Q _22933_/S _22876_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__22188__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23324__A0 _17136_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22127__A1 _29819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32093__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15801__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21092__S _21092_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27401_ VGND VPWR _27403_/S _27276_/X _32250_/Q _32250_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25503__D hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25864__A2 _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24613_ _31527_/Q _24613_/X _24260_/C _31553_/Q _19505_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_73_2329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21825_ _22061_/S hold289/A _21825_/X _21999_/S1 _17076_/Y _21812_/D hold465/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_28381_ _28381_/Q _31961_/CLK _28381_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25593_ _25595_/B _25591_/Y _31372_/Q _25592_/X _25632_/B VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__30535__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23304__C _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_4179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27066__A1 _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17003__B1 _30377_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27332_ VGND VPWR _27339_/S _32189_/Q _27266_/X _32189_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_55_2763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21886__B1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24544_ _31300_/Q _31301_/Q _24544_/Y _31303_/Q _31302_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XPHY_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_1969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold230_A hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21756_ wire831/A _21708_/B _21756_/X _21846_/A _21755_/X _21708_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__28582__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16357__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22916__S _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold328_A hold328/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26184__A _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1920_A _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21350__A2 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26274__C1 _26273_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18751__B1 wire1942/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25616__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length4112 VPWR VGND wire4111/A _28574_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XPHY_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20707_ VGND VPWR _20710_/S _29223_/Q wire1792/X _29223_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23601__A _31088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27263_ VGND VPWR _27263_/S _32138_/Q _27708_/A1 _32138_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20175__C_N _20042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23088__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23627__A1 _31035_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24475_ VGND VPWR _31034_/D _26498_/A _24480_/A _24475_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_194_5279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21687_ _21687_/B _21687_/X _21687_/A _21687_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__24824__B1 _27230_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23627__B2 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29002_ _29002_/Q _30057_/CLK _29002_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_1157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26214_ VPWR VGND _31595_/D _26214_/B _26244_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_1168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23426_ _23426_/Y _29382_/Q _29840_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_7_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30685__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20638_ VGND VPWR _20638_/S _27698_/A1 _29184_/Q _29184_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27194_ _32089_/Q _32090_/Q _32088_/Q _27195_/B _27194_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XPHY_1179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16109__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26813__D_N _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20436__S _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_4299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2710 VPWR VGND wire2709/A _14162_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31930__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26145_ _26159_/A _31562_/Q _26145_/X _26159_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__13839__A _29831_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23357_ VGND VPWR _23365_/S _30335_/Q _29653_/Q _30335_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_4272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_2110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_2230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20569_ VGND VPWR _20580_/S _24227_/A0 _29085_/Q _29085_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_253_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input185_A mprj_dat_i[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2743 VPWR VGND wire2742/A hold115/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22850__A2 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15868__A1 wire3272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22308_ VGND VPWR _23388_/S _29894_/Q _29153_/Q _29894_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19059__A1 _28289_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14090_ _29714_/Q _14090_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_234_2105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26076_ _31539_/D _26020_/Y _24585_/A _31539_/Q _26120_/A2 VGND VPWR _26075_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24052__A1 wire4066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2787 VPWR VGND _27614_/S _27618_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23288_ VGND VPWR _23288_/S wire3851/X _30270_/Q _30270_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24052__B2 _28693_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length2798 VPWR VGND _27517_/S _27506_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25027_ _25079_/A _24051_/B1 _25027_/X _25027_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_62_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26350__C _26350_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29904_ VGND VPWR _29904_/D _31927_/CLK _29904_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14540__A1 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18806__A1 wire1774/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17609__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22239_ wire829/X _29834_/D _22238_/X _23417_/A _29834_/Q _22236_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__19526__A _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2367_A _14186_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3207_A _14408_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20613__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21267__S _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21810__B1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29835_ VGND VPWR _29835_/D _30455_/CLK _29835_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_input46_A la_input[100] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18282__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1213 VGND VPWR _14829_/C1 _15286_/C1 VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_267_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26344__A3 _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14828__C1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1224 fanout1225/A _15749_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2031 wire2032/X _14403_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_2496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_859 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16800_ _16387_/A _16387_/C _29032_/Q _16800_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_147_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2042 VPWR VGND wire2042/X wire2042/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17046__A _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24355__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19216__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2053 wire2053/A wire2053/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire2534_A _20506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17780_ VGND VPWR _31730_/Q _17772_/X _17779_/X _17780_/X _17586_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__30065__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29766_ _29766_/Q _31921_/CLK hold262/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16832__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14992_ _15515_/A2 _14992_/X _14991_/X wire1113/X _28952_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_26978_ _31974_/Q _31975_/Q _26980_/B _26979_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xwire2064 wire2065/X wire2064/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_95_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22887__A _29900_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1330 VPWR VGND wire1330/X wire1330/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_207_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2075 wire2076/X wire2075/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14389__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19767__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27829__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23482__S _23496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2086 wire2087/X wire2086/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32436__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16731_ _16731_/X _28894_/Q _16966_/A2 _16966_/A3 _16964_/B1 _16730_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_247_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24760__C1 _31446_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28717_ _28717_/Q _31119_/CLK _28717_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13943_ _28554_/Q _13943_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire2097 wire2098/X wire2097/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_25929_ _25928_/X _26173_/B1 _31480_/Q _24716_/A _31481_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_21_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29697_ hold216/A _29697_/CLK _29697_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20916__A2 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17242__A0 hold245/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16045__A1 _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1374 VPWR VGND wire1374/X wire1374/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire1385 VPWR VGND wire1385/X wire1386/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24107__A2 _19786_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19450_ VGND VPWR _19444_/X _28444_/Q _28445_/Q _19450_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_16662_ _16387_/A _16387_/C _30910_/Q _16662_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_1_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28648_ _28648_/Q _32015_/CLK _28648_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13874_ _28623_/Q _13874_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_164_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22098__S _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26509__D _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17793__A1 _31723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28925__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_5080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18401_ _30484_/Q _30413_/Q _18401_/C _30414_/Q _18401_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_227_3380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15613_ _15602_/X _29160_/D _15612_/B _15612_/Y _15593_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_2 XFILLER_182_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20129__B1 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19381_ _19381_/X _19378_/X wire1916/X _19380_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_186_1970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16593_ _16965_/A2 _16952_/A1 _32322_/Q _16593_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_206_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28579_ _28579_/Q _31860_/CLK _28579_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_250_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31460__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21877__A0 _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18332_ _22384_/A _18332_/Y _18332_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_30610_ hold372/A _31873_/CLK _30610_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_2521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15544_ _15540_/X _15735_/B _15543_/X _15744_/B1 _15544_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_91_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31590_ _31590_/Q _32038_/CLK _31590_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25710__B _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16348__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17212__C _17212_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20144__A3 _20175_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21341__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18742__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21972__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18263_ _22354_/A _18263_/Y _18332_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_30541_ _30541_/Q _30580_/CLK _30542_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26525__C _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15475_ VGND VPWR _15644_/S _29029_/Q _28997_/Q _15475_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16824__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15020__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17214_ VGND VPWR _17238_/S _17207_/X _17213_/X _30402_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_1864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14426_ _14426_/Y _29346_/Q _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_176_3029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19298__A1 _28013_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18194_ VGND VPWR _18194_/X _30326_/Q _30327_/Q _18244_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_30472_ VGND VPWR _30472_/D _31916_/CLK _30472_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_193_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23094__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20346__S _20360_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24291__A1 _31670_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output571_A _28738_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_4910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24291__B2 _31593_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19837__A3 _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output669_A wire2744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32211_ _32211_/Q _32538_/CLK _32211_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17145_ VGND VPWR _17238_/S _17138_/X _17144_/X _30393_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__13749__A _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14357_ _14362_/B _14333_/X _21711_/A _14356_/B _14356_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XANTENNA__17848__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22841__A2 _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_4383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15859__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28305__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20852__A1 _30428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23657__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32142_ _32142_/Q _32528_/CLK _32142_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21966__A _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17076_ _21777_/B _17076_/Y _22737_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_193_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24043__A1 wire4119/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14288_ _29989_/Q wire3730/X _14288_/X _29992_/Q _30324_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_271_2828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22561__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16520__A2 wire1733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16027_ VGND VPWR wire969/X _28843_/Q _28875_/Q _16027_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14531__A1 _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22054__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25791__A1 _31426_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32073_ _32073_/Q _32073_/CLK _32073_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_41_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17882__C _17895_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2307_A fanout2307/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30408__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20065__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20604__A1 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21177__S _21184_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31024_ _31024_/Q _31679_/CLK _31024_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_23_3931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19470__A1 _19471_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14819__C1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28455__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_4714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24996__B _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20080__A2 _14189_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23149__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16284__B2 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2470 VPWR VGND _21148_/S wire2478/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24346__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29700__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17978_ VGND VPWR _17983_/S wire3827/X _27915_/Q _27915_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_250_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14295__B1 _29505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14834__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22357__B2 _22378_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21905__S _21905_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19717_ _19717_/X wire1666/X _20126_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA_wire718_A wire718/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1780 _18324_/Y _27708_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16929_ VGND VPWR _16929_/S _32443_/Q _32371_/Q _16929_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_93_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1791 VGND VPWR wire1792/A _18263_/Y VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_228_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18486__S _18489_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30558__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_4168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16036__A1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26099__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17233__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1801_A hold79/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19773__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31803__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27799__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31926_ _31926_/Q _31931_/CLK hold427/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19648_ _26773_/C _20128_/A _19648_/A _19648_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_0_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22109__A1 _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23306__B1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17784__B2 _14255_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_1379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29850__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14598__A1 wire3249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15795__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31857_ _31857_/Q _32582_/CLK _31857_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19579_ _27077_/C1 _19578_/Y _19598_/A _28466_/Q _28466_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20110__A _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2843_A _21710_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_3874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21610_ _30220_/Q _21613_/B _21618_/C _21610_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__26716__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21868__B1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30808_ _30808_/Q _32015_/CLK _30808_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_260_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_344_core_clk _30456_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_22590_ VGND VPWR _22594_/S _21505_/A wire3701/X _22590_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3015_A _18407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31788_ _31788_/Q _32565_/CLK _31788_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_102_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21332__A2 _14429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26256__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18733__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19930__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23421__A _23421_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21541_ _21427_/B _14109_/Y _14320_/X _21677_/B _21676_/D _14110_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_120_3028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20540__A0 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17000__A3 _21645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26754__A_N _31792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30739_ _30739_/Q _32467_/CLK hold319/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_33_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_5588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16734__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15011__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26271__A2 wire2630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24260_ _24260_/X _24260_/C _31680_/Q _24276_/B _24260_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__23140__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21472_ _21653_/A _21473_/B _21472_/B _21472_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XFILLER_202_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_4264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20256__S _20259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26008__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24282__B2 _31586_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18234__B _18234_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23211_ VGND VPWR _23224_/S _30203_/Q hold401/X _30203_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_102_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22293__A0 _29138_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21096__A1 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20423_ VGND VPWR _20425_/S _28943_/Q wire2013/A _28943_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32409_ _32409_/Q _32547_/CLK _32409_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_89_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14770__A1 _15598_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24191_ wire760/A wire1328/X _28515_/Q _28611_/Q _19706_/B VGND VPWR _24190_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_8_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32309__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3384_A wire3385/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14770__B2 _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22832__A2 _22870_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_1437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_1943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20843__A1 _29352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23567__S _23573_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23142_ hold235/A _23157_/A2 _23142_/X _30106_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__29230__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20843__B2 _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20354_ VGND VPWR _20354_/S _27704_/A1 _28894_/Q _28894_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_2704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24034__B2 _30533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16511__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25231__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_1702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_5073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14522__A1 _29453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23073_ VGND VPWR _23073_/X _23071_/X _23072_/X _23070_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xclkbuf_opt_27_2_core_clk clkbuf_opt_27_3_core_clk/A clkbuf_opt_27_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_27950_ _27950_/Q _30225_/CLK _27950_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_28_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_1724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20285_ VGND VPWR _20285_/S _27701_/A1 _28827_/Q _28827_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25067__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30088__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3649_A _30478_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1407_A _23485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21087__S _21098_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19997__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23793__B1 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26901_ _23599_/B _26900_/Y _26900_/A _31900_/Q _31900_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__31333__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22024_ _21310_/B _22024_/Y _22011_/Y _21310_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21bai_2 XFILLER_213_2723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_4483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32459__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19461__A1 _19456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27881_ _27881_/Q _30294_/CLK _27881_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_170_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_4502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_3660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout867_A _19646_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15085__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29380__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold12 hk_dat_i[27] hold12/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_leaf_60_core_clk _32394_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29620_ _29620_/Q _32307_/CLK _29620_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20071__A2 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_2434 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25534__A1 _31346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24337__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26832_ _26893_/C1 _26831_/Y _26835_/A _31866_/Q _31866_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_243_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold23 hold23/A hold23/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16814__A3 _16814_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26731__B1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27282__B _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3816_A _18244_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold34 hold34/A hold34/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__14286__B1 _14145_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22348__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold45 hold45/A hold45/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_233_1481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19749__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28948__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold56 hold56/A hold56/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_92_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25083__A wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29551_ hold219/A _30432_/CLK _29551_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_5_16_1_core_clk _29752_/CLK clkbuf_5_16_1_core_clk/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xhold67 hk_dat_i[1] hold67/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19213__A1 _27913_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26763_ _26763_/C _26763_/B _26764_/B _26763_/D _26763_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 Xhold78 hold78/A hold78/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_23975_ _20061_/B _28686_/Q _23975_/X _19680_/B _28494_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__18396__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22899__A2 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold89 hold89/A hold89/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_4219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_4339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1776_A _18332_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31483__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17224__B1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15813__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28502_ _28502_/Q _32010_/CLK _28502_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_261_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25714_ _25717_/B _31401_/Q _25727_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_129_3042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22926_ _22934_/A _22928_/A _22926_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_29482_ _29482_/Q _32136_/CLK _29482_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26694_ _31800_/D _26694_/C _26694_/A _26694_/B _26694_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_hold445_A hold501/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16578__A2 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17775__A1 _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15235__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2836 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18972__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_3862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14589__A1 _30887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28433_ _28433_/Q _32071_/CLK _28433_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27502__S _27517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15786__A0 _29616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25645_ _25644_/X _31381_/Q _31381_/D _25642_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_55_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22857_ _22853_/B _22855_/Y _22857_/Y _22871_/A _22843_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_1 XANTENNA__27972__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1943_A _19296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27039__A1 _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15250__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input100_A la_input[34] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21808_ _22061_/S hold307/A _21808_/X _21999_/S1 _21436_/B _17053_/X hold279/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XPHY_311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28364_ _28364_/Q _30384_/CLK _28364_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_1755 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2115_A wire2115/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25576_ VGND VPWR _25576_/X _31368_/Q _31369_/Q _25576_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XPHY_322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17032__C _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22788_ _22820_/C _22820_/B _21549_/A _22788_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_122_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_3384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18724__B1 _18723_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27315_ VGND VPWR _27321_/S _32174_/Q _27268_/X _32174_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_181_2590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20531__A0 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24527_ VGND VPWR _24538_/A _31221_/Q _24527_/A _24527_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__15538__B1 wire1128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21739_ _22075_/A2 _29777_/D _21738_/X hold449/A _21737_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_103_2503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28295_ _28295_/Q _30424_/CLK _28295_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27054__A4 _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15002__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_3327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26262__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28328__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15260_ VGND VPWR _15756_/S _28422_/Q _29087_/Q _15260_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27246_ VGND VPWR _27259_/S _32121_/Q wire1826/A _32121_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_177_2604 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24458_ VGND VPWR _31025_/D _26509_/D _24480_/A _24458_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_177_43 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23076__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15768__B _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3230 VPWR VGND _22518_/B1 _30328_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19819__A3 wire2200/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14211_ _24446_/A _24446_/B hold111/X _14211_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21087__A1 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23409_ _23409_/X wire3789/X _30410_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__23227__A2_N _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_3373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15191_ VGND VPWR _15716_/S _32429_/Q _32357_/Q _15191_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27177_ _32081_/Q hold242/A _32082_/Q _27178_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xmax_length3263 VPWR VGND _15047_/A1 _14744_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14164__S _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24389_ _30998_/D _24389_/C _24389_/A _24389_/B _25595_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__22823__A2 _30469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3324_A wire3365/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26014__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27211__A1 _32098_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20834__A1 _14405_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_9 _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14142_ VPWR VGND _14143_/D _30418_/Q _30416_/Q VGND VPWR NF_sky130_fd_sc_hd__and2b_2 XANTENNA__23477__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26128_ _31553_/Q _31554_/Q _26128_/Y _26121_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_84_2222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_3368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20690__A _24210_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16502__A2 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24025__B2 _30535_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2584 VPWR VGND _22167_/A1 _22181_/B2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_172_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28478__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22036__B1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1861 VPWR VGND _22969_/S _22966_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_42_3806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18950_ _18949_/X _19380_/B1 _19380_/A2 _28319_/Q _18950_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14073_ _20912_/B _18554_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_248_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26059_ _14399_/B _17877_/X _26066_/D _31535_/Q _26059_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_7_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29723__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22587__A1 hold124/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20047__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1894 VPWR VGND _20866_/S _20872_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_234_1223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17901_ VPWR VGND _17901_/X _31029_/Q _31068_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_267_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24981__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18255__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18881_ _18881_/X _19216_/D1 _30260_/Q _19069_/B1 _19368_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_133_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22051__A3 hold476/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21795__C1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16266__A1 wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20062__A2 _14216_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25525__A1 _19451_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24328__A2 wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30700__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17832_ VGND VPWR _17832_/S _17831_/X _17809_/X _17832_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29818_ VGND VPWR _29818_/D _30225_/CLK _29818_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_114_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31826__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16805__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2916_A _20480_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_3057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_3181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23536__A0 _30027_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1054 VPWR VGND _16546_/C1 wire1060/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_283_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15474__C1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22339__B2 _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14816__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29873__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17763_ VGND VPWR _17842_/S _17750_/X _17762_/X _17763_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29749_ _29749_/Q _31904_/CLK hold279/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14975_ _14975_/X _15640_/C1 _14968_/X _14970_/X _14974_/X wire1085/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 Xfanout1098 wire1104/X _14822_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_output417_A _13878_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16819__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16018__A1 _28979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31145__D _31145_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21011__A1 _29476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3958_A _22610_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19502_ VGND VPWR _28452_/D _25109_/B hold178/A _19501_/X _19500_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_222_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1171 VPWR VGND wire1171/X wire1172/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16714_ VGND VPWR _16714_/X _16713_/X _16712_/X _16930_/A1 wire1060/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19755__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13926_ _28571_/Q _13926_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4032_A wire4033/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17694_ _31639_/Q _17694_/X _17875_/B _17475_/X _17881_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_281_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1048_A wire1048/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17766__A1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18963__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26817__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30850__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19433_ VGND VPWR _19433_/X _28439_/Q wire4141/X _31338_/Q _19429_/B _19429_/D VGND + VPWR NF_sky130_fd_sc_hd__a311o_2 X_31711_ _31711_/Q _32567_/CLK _31711_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31976__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27412__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25721__A _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16645_ VGND VPWR _16842_/S _30508_/Q _30794_/Q _16645_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_75_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15777__B1 wire1450/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13857_ _28640_/Q _13857_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__30984__D _30984_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29103__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_4349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31642_ _31642_/Q _31685_/CLK _31642_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19364_ _19364_/X wire2270/A _28016_/Q wire2281/A wire2582/A wire3766/A VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 X_16576_ _16956_/A2 _16956_/A1 _28994_/Q _16576_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_13788_ _13788_/A _13788_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__22556__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27125__S1 _31485_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22511__A1 _17229_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23879__C _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18715__B1 _19336_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18315_ _18260_/X _18314_/Y _22376_/A _29766_/Q _22372_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_4 XANTENNA__23241__A _23268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15527_ wire3258/X wire1741/A _15527_/X _15760_/B1 _32366_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__20522__A0 wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_2936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31573_ _31573_/Q _31575_/CLK _31573_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31206__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19295_ wire1405/X _28399_/Q _19294_/X _28399_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_12_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4084 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2257_A wire2264/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27450__A1 _32283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30524_ hold334/A _32557_/CLK _30524_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18246_ _29752_/Q _18163_/B wire3712/X _18246_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_223_1661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29253__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15458_ wire3251/X _16814_/A2 _15458_/X _15609_/B1 _28932_/Q _14544_/D VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_12_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23067__A2 wire3171/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24264__A1 hold481/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16741__A2 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25461__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17596__D _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18054__B _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21078__A1 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14409_ _14459_/A _14408_/B _22338_/A _23342_/C _14409_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14752__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22275__B1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18177_ _18177_/X _18157_/Y _18174_/X _18176_/X _18175_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_275_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30455_ _30455_/Q _30455_/CLK _30455_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_201_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15389_ _15737_/A2 _15389_/X _15388_/X _15737_/B1 _29477_/Q _15738_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__27367__B _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26005__A2 _14183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23387__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17128_ _21903_/B wire3216/X _17127_/X _17128_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_119_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_5168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31356__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold54_A hold54/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17893__B _32598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22291__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30386_ _30386_/Q _30386_/CLK _30386_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_217_2111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20804__S _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24016__B2 wire3634/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27086__C _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26410__C1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22027__B1 wire2848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32125_ _32125_/Q _32125_/CLK _32125_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24503__C _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17059_ _16971_/A _30383_/Q _17059_/X wire3791/A _29423_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15701__B1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1849_A _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22578__A1 wire3699/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_5257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_3192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20070_ VGND VPWR _19543_/B _19566_/A _20073_/A2 _20070_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_32056_ _32056_/Q _32067_/CLK _32056_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18246__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19443__A1 _28442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30380__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20053__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21250__A1 _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31007_ _31007_/Q _32578_/CLK _31007_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24319__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26713__B1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23790__A3 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23527__A0 _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15465__C1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14807__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_3877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_1820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27995__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25334__C _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17206__A0 _17205_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27269__A1 _32142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15633__S _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15480__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13942__A _28555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19746__A2 _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23760_ _31782_/Q _23765_/C _31783_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__23135__B _23135_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20972_ VGND VPWR _20979_/S _30178_/Q _29437_/Q _29437_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17757__A1 _31727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22750__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17757__B2 _31726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18229__B _18229_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22711_ wire1866/A _30093_/Q _22710_/X _30093_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_260_4465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31909_ _31909_/Q _32365_/CLK hold365/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20761__A0 _29275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23691_ _30806_/D _23807_/B _23691_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_203_5562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15232__A2 _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26446__B _26446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_29_0_core_clk clkbuf_5_29_1_core_clk/A clkbuf_5_29_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__25295__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25430_ _25430_/Y _25430_/A _25430_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_104_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22642_ _22642_/D _22642_/C _22642_/B _22643_/B _22635_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4b_4 XFILLER_202_3103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24892__D _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17509__A1 _31761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22502__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18706__B1 _18705_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23789__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24247__A _31759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16980__A2 _16979_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1451_A _15774_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_5013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_2440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25361_ VGND VPWR _25361_/X _25380_/B _25361_/A _25380_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_72_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14991__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22573_ VGND VPWR _22619_/S hold184/A _22572_/X _30065_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_leaf_44_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_2755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_2875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18182__A1 wire3872/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32131__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27100_ _27100_/B _26819_/B _27116_/A _27100_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__18182__B2 _29860_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27441__A1 _32277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24312_ VGND VPWR _24312_/X _32038_/Q _24317_/A _24317_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_195_4662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21524_ _21548_/A _30353_/Q _21619_/C _21548_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_28080_ _28080_/Q _30294_/CLK _28080_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_124_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25292_ _31261_/D _25290_/X _25595_/A _25291_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_278_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23058__A2 wire3171/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14492__B hold410/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26565__B1_N wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21069__A1 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27031_ hold500/X _31996_/Q _27033_/A _27035_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_137_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24243_ _30919_/D _26542_/B _31755_/Q _26542_/A _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__14743__A1 _32417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28620__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21455_ _21455_/X _21462_/B _21464_/B _29733_/Q wire3270/A _21812_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_2 XANTENNA__23463__C1 _23462_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15940__B1 wire1043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21102__C _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29746__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3766_A wire3766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19131__B1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_Di0[3] wire2333/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18899__B _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23297__S _23300_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20406_ VGND VPWR _20406_/S _27253_/A0 _28928_/Q _28928_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24174_ _24174_/X _24172_/X _28545_/Q _23879_/X _24184_/A2 VGND VPWR _24173_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_271_4583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21386_ _21649_/C _21389_/D _21679_/B _21649_/D _21391_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__32281__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20714__S _20714_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24007__B2 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_3377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16496__A1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22018__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23125_ _23180_/B _18535_/B _23145_/A _23125_/X _29722_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_137_2643 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17693__B1 _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30723__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20337_ VGND VPWR _20338_/S _27242_/A0 _28877_/Q _28877_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3933_A _23140_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31849__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28982_ _28982_/Q _32430_/CLK _28982_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold395_A hold395/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19724__D_N _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20029__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28770__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24963__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27293__A _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27933_ _27933_/Q _30667_/CLK _27933_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23056_ VGND VPWR _23056_/S hold416/A _23055_/X _30158_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_63_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_1953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29896__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25806__A _32544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20268_ VGND VPWR _20290_/S _27684_/A1 _28810_/Q _28810_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_5191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_24_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17308__B _17308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23230__A2 _18554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1893_A _18706_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_3907 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_4078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput102 la_input[36] _30684_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__21241__A1 _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22007_ VGND VPWR wire3779/X _22000_/Y _22006_/X _22007_/X wire3802/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__17445__B1 wire3192/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19985__A2 _19628_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput113 la_input[46] _30664_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_276_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27864_ _27864_/Q _30027_/CLK _27864_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_115_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput124 VGND VPWR _30644_/D la_input[56] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_57_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20199_ VGND VPWR _20202_/S _28744_/Q _27237_/A0 _28744_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14013__A _28484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23518__A0 wire3442/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input148_A la_input[78] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16799__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput135 VPWR VGND _30624_/D la_input[66] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__17996__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_4013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21792__A2 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput146 VGND VPWR _30604_/D la_input[76] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_264_615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4024 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29603_ _29603_/Q _32302_/CLK _29603_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_213_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30873__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput157 VPWR VGND _30584_/D la_input[86] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_265_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26815_ _26815_/B _26772_/C _27100_/B _26815_/X _27098_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__31999__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput168 VGND VPWR _30564_/D la_input[96] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_265_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28000__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27795_ VGND VPWR _27801_/S _25025_/B _32518_/Q _32518_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xinput179 mprj_dat_i[14] input179/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_96_3361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19198__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20669__B _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15543__S _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24191__B1 wire1328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15471__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13852__A _22427_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19737__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29534_ _29534_/Q _30339_/CLK _29534_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14760_ _15575_/C _15517_/A1 _29244_/Q _15223_/A _14760_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_229_2037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26746_ _26746_/Y _31788_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 Xclkbuf_leaf_266_core_clk _29565_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_23958_ wire1621/X _23957_/X _31130_/Q _24186_/A3 _23958_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_109_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15770__C _15770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_83_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17748__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_1314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_1941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_900 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18945__B1 _20870_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17748__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_911 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_302_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_922 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22909_ VPWR VGND _22913_/B _22921_/B _22921_/C VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__30103__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29465_ _29465_/Q _32351_/CLK _29465_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15759__B1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14691_ _14691_/X _14887_/A2 wire1104/X _28872_/Q wire1508/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_92_2535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_2985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26677_ VGND VPWR _26676_/Y _31866_/Q _26693_/B _26678_/A _23772_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA_933 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23889_ wire4139/X _26838_/A1 _23889_/X _28582_/Q _25738_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_944 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16420__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_955 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20988__B_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26483__A2 _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25286__A3 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27680__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16430_ VGND VPWR _16961_/S _28098_/Q _29054_/Q _16430_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28416_ _28416_/Q _32320_/CLK _28416_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_125_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28150__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_966 _19092_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25628_ VGND VPWR _31223_/Q _25629_/A _25627_/X _25628_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__29276__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29396_ _29396_/Q _31971_/CLK _29396_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_144_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_977 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_988 input68/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23699__C _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15774__A3 wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_999 _26801_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_1987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28347_ _28347_/Q _30457_/CLK _28347_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16361_ VGND VPWR _16837_/S _28419_/Q _29084_/Q _16361_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14982__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25559_ VGND VPWR _25564_/S _31358_/Q _31359_/Q _31358_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21847__A3 _29788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18155__A _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2699_A wire2700/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18100_ VGND VPWR _18109_/S wire3870/X _28029_/Q _28029_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19370__B1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26235__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27432__A1 _32274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3539_A wire3541/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15312_ _15760_/A1 wire1741/X _15312_/X _15760_/B1 _29291_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_202_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30253__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19080_ _30269_/Q _19080_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_142_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16292_ _14104_/A _16292_/X _28754_/Q wire1449/X _16781_/A2 _16929_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16184__B1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28278_ _28278_/Q _30484_/CLK _28278_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17920__A1 wire3913/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18031_ VGND VPWR _18043_/S wire3877/X _27963_/Q _27963_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15243_ _15752_/A2 _15243_/X _15242_/X _15740_/B1 _29473_/Q wire1515/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_194_4183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14734__A1 _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27229_ _17504_/Y _27230_/B _24255_/X _27423_/S _17539_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_272_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24797__A2 _24796_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14734__B2 _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3071 VPWR VGND _18051_/S _18052_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27868__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24604__B _24604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_4178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30240_ _30240_/Q _30250_/CLK _30240_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_218_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15174_ _16791_/A2 _15607_/A1 _29053_/Q _15174_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_194_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20624__S _20646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput609 _28645_/Q la_output[96] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_253_3056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_2724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_3187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14125_ _24447_/A _14303_/B _14300_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XANTENNA__25746__A1 wire2251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2392 VPWR VGND wire2391/A _14159_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_207_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30171_ hold202/A _30433_/CLK _30171_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19982_ _19981_/X _28639_/Q _28639_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__26943__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_2142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_4689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_287_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_2779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24954__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18933_ _18932_/X _19318_/B1 _19203_/A2 _28155_/Q _18933_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14056_ _31750_/Q _26530_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__27407__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19425__A1 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_5535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output534_A _31119_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21768__C1 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16239__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27499__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20035__A2 wire847/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21232__A1 _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17436__B1 _17436_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17933__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19976__A2 _19984_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19714__A _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18864_ _18864_/X wire2270/A _27992_/Q wire2281/A wire2582/A _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_244_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_341_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23509__A0 _30441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_1999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2005_A _18199_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17987__A1 wire3918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_2417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22980__A1 _32389_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21783__A2 _17044_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32004__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17815_ _31732_/Q _17870_/A2 _17815_/X _31731_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23236__A _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26171__A1 _31479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output701_A wire3517/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20991__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15998__B1 _16124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18795_ VGND VPWR _18795_/S _28149_/Q _28117_/Q _18795_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_185_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19189__B1 _19188_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15462__A2 _15709_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24182__B1 wire1588/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13762__A _31184_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19728__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17746_ _31726_/Q _17539_/B _17746_/X _31725_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_1_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14958_ _15515_/A2 _14958_/X _14957_/X _15517_/A1 _28783_/Q _15638_/A3 VGND VPWR + VGND VPWR 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_13909_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_286_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17677_ _31720_/Q _17870_/A2 _17677_/X _31719_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14889_ _14889_/X _15307_/C1 _14882_/X _14884_/X wire1089/A _14888_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_225_3158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32154__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16411__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27671__A1 _32406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19416_ VGND VPWR _19416_/S _27707_/A1 _28432_/Q _28432_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_251_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16628_ VGND VPWR _16628_/X _16625_/X _16940_/B1 _16928_/B1 _16627_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_53_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17888__B _24610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24485__A1 wire2255/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3716 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16962__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21190__S _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21299__A1 _30361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_3855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31625_ _31625_/Q _31760_/CLK _31625_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21299__B2 _30476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19347_ VGND VPWR _19347_/X _19335_/B _19375_/B1 _28079_/Q _19346_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14973__A1 _30897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16559_ VGND VPWR _16559_/X _16843_/A2 wire1038/A _16556_/X _16558_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__28643__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23693__C1 _23692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18164__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29769__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27423__A1 _32579_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_1046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19900__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31556_ hold435/A _31874_/CLK _31556_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19278_ VGND VPWR _19278_/S _19277_/X _19276_/X _19278_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_121_2433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25434__B1 _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18229_ _18244_/A _18201_/A _18229_/X _18229_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__14725__A1 _28945_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30507_ _30507_/Q _30507_/CLK _30507_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_1491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25985__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30746__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18215__D _18215_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_128_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31487_ _31487_/Q _32115_/CLK _31487_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_4139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22799__A1 _22809_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_5282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_5000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23996__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21240_ VGND VPWR _22954_/S _21463_/C hold341/A _29702_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_156_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28793__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30438_ VGND VPWR _30438_/D _30757_/CLK _30438_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_7_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27187__B1 _32086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold301 hold301/A hold301/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_288_5022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20534__S _20551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_380_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19608__B _19608_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold312 hold312/A hold312/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_258_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold323 hold323/A hold323/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16478__A1 _16956_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold334 hold334/A hold334/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13937__A _28560_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21171_ VGND VPWR _21172_/S _29614_/Q _23671_/A1 _29614_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold345 hold345/A hold345/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18872__C1 _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3082_A _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30369_ VGND VPWR _30369_/D _30411_/CLK _30369_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26934__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18004__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold356 hold356/A hold356/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_186_5318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold367 hold367/A hold367/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21208__D1 _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25201__A3 _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold378 hold378/A hold378/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20122_ _20122_/Y _20122_/B _20122_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_116_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32108_ _32108_/Q _32108_/CLK _32108_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30896__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15150__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27317__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_279_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold389 hold389/A hold389/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19416__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_5065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28023__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2608 wire2609/X _24604_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__29149__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout825 wire826/A _22092_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_80_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20026__A2 _14170_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17427__B1 input193/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19967__A2 _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24930_ _25681_/B1 _24929_/Y _24941_/A _31109_/Q _31109_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20053_ _25718_/A _20052_/Y wire847/X _28673_/Q _28673_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32039_ _32039_/Q _32039_/CLK _32039_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_3052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_4641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25345__B _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout858 _19901_/A2 wire860/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_133_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_3686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17978__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1918 VPWR VGND _19109_/S _19159_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_80_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout869 _19632_/A _19598_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__21774__A2 _14405_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1929 VPWR VGND _19268_/S wire1930/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26162__A1 _31570_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_412 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24861_ wire868/X _31076_/Q _24861_/Y _24470_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_max_length1499_A wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30126__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2940 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_3348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15363__S _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15453__A2 _15435_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26600_ _26600_/X wire1275/X wire3461/X wire3462/X _26599_/X _23755_/A VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__24173__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19719__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23812_ _23813_/A _19789_/B _31848_/Q _31813_/Q _19710_/B VGND VPWR _23811_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24712__A2 _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28173__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_3534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27580_ VGND VPWR _31381_/Q _27579_/X _27578_/X _27580_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_265_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_1661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24792_ _31049_/D _24790_/X _26179_/B1 _24791_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_180_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14661__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22723__A1 _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23580__S _23588_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_207 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23920__B1 _25982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26531_ VGND VPWR _31750_/D _26531_/B _26537_/A _26531_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__25361__A _25361_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_218 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23743_ hold222/A _31764_/Q _23743_/Y hold196/A _31766_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_93_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20955_ VGND VPWR _20964_/S _30161_/Q _29420_/Q _29420_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_229 wire2072/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_4224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1474_A wire1477/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_1558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15205__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_0_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27662__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29250_ _29250_/Q _31945_/CLK _29250_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_3067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_289_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30276__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26462_ _26476_/S _31701_/D _26461_/X _31701_/Q _26455_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_221_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23674_ _24481_/B _24246_/B _26837_/A _24889_/A1 _26542_/D _23674_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XFILLER_36_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold143_A hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24476__A1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14413__B1 _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_167_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20886_ VGND VPWR _20906_/S _30241_/Q _29403_/Q _20886_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_93_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20709__S _20722_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16953__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31521__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28201_ _28201_/Q _30294_/CLK _28201_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_162_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_5471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25413_ VGND VPWR _25413_/X _25413_/B _25413_/A _25413_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_32_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22625_ VPWR VGND _22747_/B _22627_/C _22663_/B VGND VPWR NF_sky130_fd_sc_hd__and2_2 X_29181_ _29181_/Q _32575_/CLK _29181_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14964__A1 _32052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26393_ VGND VPWR _14206_/Y _19503_/A _26386_/X _26393_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire3883_A _29850_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21829__A3 hold298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1641_A _26793_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26217__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1739_A _15010_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28132_ _28132_/Q _30274_/CLK _28132_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_2631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26904__B _26904_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25344_ _25354_/D _31269_/Q _31271_/Q _31270_/Q _25344_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_52_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22556_ VGND VPWR _22598_/S hold172/A wire3709/X _30053_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_171_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_4296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16705__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26192__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26622__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14716__A1 _14816_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21507_ VGND VPWR _21507_/Y _21506_/D _21628_/C _21674_/B _21628_/D VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__22239__B1 _22238_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28063_ _28063_/Q _30272_/CLK _28063_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_178_2743 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15913__B1 wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25275_ _25275_/X _25380_/C _31258_/Q _25266_/Y _31357_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_22487_ _22513_/C1 _22486_/X _22511_/A2 _17136_/X _30004_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_234_4629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31671__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1906_A _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24424__B _24424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27014_ _31989_/Q _27028_/A _27014_/Y _27020_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_69_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27598__A_N _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24226_ VGND VPWR _24234_/S _30902_/Q _27614_/A1 _30902_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_2164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21438_ _21820_/A _21449_/B _21449_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_5_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20444__S _20444_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19518__B _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16469__A1 wire3243/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20671__C _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM256_Di0[11] max_length2372/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25728__A1 _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13847__A _29819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24157_ _24157_/X _20128_/B wire4110/X _28735_/Q _24188_/A2 VGND VPWR wire805/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__18863__C1 _18862_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2182_A _19594_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21369_ _21367_/X _21366_/Y _21357_/Y _21365_/Y _21379_/B _17010_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XANTENNA__26925__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15765__C _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5128 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3748 VPWR VGND _22747_/C wire3751/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23739__B1 _26694_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29653__D _29653_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23108_ VGND VPWR _23108_/X _23106_/X _23107_/X _23105_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__32027__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24936__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19407__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3821 VPWR VGND _18239_/B _29869_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24088_ _30587_/Q _24140_/A2 _24088_/X _30523_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_28965_ _28965_/Q _30911_/CLK _28965_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3832 VPWR VGND wire3832/X _18217_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_150_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_1925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3843 wire3843/X wire3844/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_43_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20017__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22411__A0 _21929_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15930_ _15930_/X wire1052/X _15923_/X _15925_/X _15929_/X _16041_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19958__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23039_ VGND VPWR _25733_/C _30154_/Q _23038_/X _30154_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27916_ _27916_/Q _30294_/CLK _27916_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19534__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2447_A _24232_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28896_ _28896_/Q _30339_/CLK _28896_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17969__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28516__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15429__C1 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26689__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22962__A1 _30474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3898 VPWR VGND wire3898/X hold311/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25970__S wire754/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27350__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27847_ VGND VPWR _32546_/Q _25806_/D _32545_/Q _27848_/B _32547_/Q _32544_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_15861_ VGND VPWR _15866_/A _15858_/X _15860_/X _15957_/S wire1053/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20973__A0 _29438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_2451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_111_2646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31051__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24164__B1 _28640_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17600_ _31631_/Q _14067_/A _17474_/X wire3124/X _17600_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_264_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16641__A1 wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15444__A2 wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17054__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14812_ _14811_/X _14822_/B1 _14884_/A2 _32048_/Q _14812_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_57_3120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25900__A1 _31467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18580_ _20982_/B _23231_/A _18580_/A _18580_/X _18580_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA_wire2614_A _14252_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15792_ VGND VPWR _16823_/S _28941_/Q _29239_/Q _15792_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27778_ VGND VPWR _27783_/S _25027_/B _32503_/Q _32503_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30619__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14652__B1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22175__C1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22714__A1 _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_3937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23490__S _23496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23911__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17531_ _17531_/X _24793_/B _31624_/Q _17452_/X _26245_/C VGND VPWR _17462_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_29517_ _29517_/Q _30757_/CLK _29517_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_251_117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20725__A0 _29240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14743_ _14882_/A2 _14743_/X wire1508/A _14823_/A1 _32417_/Q _14742_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_261_3336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26729_ _26728_/Y _26950_/C _31817_/Q _26754_/B _31817_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_204_4422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_1636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_1133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28666__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25702__C _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18394__A1 _18229_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21922__C1 _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_730 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22190__A2 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27653__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_741 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29911__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_752 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29448_ _29448_/Q _30454_/CLK _29448_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17462_ _17460_/X _17452_/X _17457_/B _31681_/Q _17462_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XFILLER_161_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14674_ VGND VPWR _14935_/S _29521_/Q _29555_/Q _14674_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_763 wire3621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20619__S _20625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19700__C _19700_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_774 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16944__A2 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19201_ _19200_/X _19151_/S _19201_/A2 _28200_/Q _19201_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_260_684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26861__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_785 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16413_ _16413_/X wire1058/A _16410_/X _16412_/X wire912/A _16408_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20846__C _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_796 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14955__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17501__B _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17393_ VGND VPWR _17392_/X _17391_/X hold3/A hold2/X _17433_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA_wire2983_A _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30769__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29379_ _29379_/Q _30470_/CLK _29379_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_3495 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18146__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19343__B1 wire1931/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27405__A1 _32253_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22119__B _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_9_1_core_clk clkbuf_5_9_1_core_clk/X clkbuf_5_9_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_19132_ _30272_/Q _19132_/X _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_220_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31410_ _31410_/Q _32310_/CLK _31410_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_31_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16344_ _16817_/A2 _16817_/A1 _29599_/Q _16344_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_196_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21150__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16157__B1 wire1060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32390_ _32390_/Q _32390_/CLK _32390_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18697__A2 _18696_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17220__C _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19894__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23690__A2 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2024 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_4865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14707__A1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31341_ _31341_/Q _32039_/CLK _31341_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_237_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19063_ _23529_/S _19062_/X _19052_/X wire1883/X _19063_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26533__C _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17928__S _17947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25967__A1 _26781_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16275_ VGND VPWR _16842_/S _30498_/Q _30784_/Q _16275_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_2553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4197_A wire4197/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18014_ VGND VPWR _18018_/S _23297_/A1 _27948_/Q _27948_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_4128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25431__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15226_ VGND VPWR _15226_/X _15226_/B _15226_/A _15226_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_152_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15380__A1 _32322_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31272_ VGND VPWR _31272_/D _32287_/CLK _31272_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_8_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27169__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20354__S _20354_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output651_A wire2387/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_core.RAM128_Di0[24] hold121/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22135__A _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_4150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput406 _13795_/Y la_oenb[28] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18332__B _22384_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_4562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput417 _13878_/Y la_oenb[38] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30223_ _30223_/Q _30450_/CLK _30223_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21453__A1 _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_5548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25719__A1 _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13757__A hold109/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15157_ _15156_/X _15610_/B1 _15610_/A2 _30902_/Q _15157_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xoutput428 _13868_/Y la_oenb[48] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire1282_A wire1282/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26916__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput439 _13858_/Y la_oenb[58] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_4426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15668__C1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14108_ _29729_/Q _14108_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_214_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23665__S _23671_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15132__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27137__S _27142_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30154_ _30154_/Q _32398_/CLK _30154_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26392__A1 _31683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25195__A2 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19965_ VGND VPWR wire1317/X _25022_/C _24929_/B _19965_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_15088_ _15078_/X _29146_/D wire1074/X _15087_/X _15069_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__30149__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20008__A2 _14197_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19949__A2 _19567_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18916_ _19306_/B _27899_/Q _18915_/X _18916_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14039_ _28458_/Q _14039_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_0_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24942__A2 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28196__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30085_ VGND VPWR _30085_/D _30667_/CLK _30085_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xclkbuf_leaf_188_core_clk _31685_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_228_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19896_ VGND VPWR _20096_/B _26694_/D _24046_/B1 _19896_/X _26139_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__21756__A2 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22953__A1 _30465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21185__S _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29441__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27341__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_117_core_clk _32136_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_hold17_A hold17/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18847_ _28119_/Q _18847_/X _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_227_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20127__D_N _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14238__A3 _29977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16632__B2 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_2202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_4246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1714_A _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30299__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_4082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18778_ _19156_/S _20870_/S _18777_/X _18775_/X _18778_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_227_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14643__B1 wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20102__B _20102_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31544__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20716__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17729_ _31642_/Q _17729_/X _14067_/A _17475_/X _24588_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_250_68 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_4571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18494__S _18495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30987_ _30987_/Q _32296_/CLK _30987_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18385__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17188__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length729_A _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29591__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2756_A _14137_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22181__A2 wire2284/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31333__D _31333_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26447__A2 _26446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19582__B1 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27644__A1 wire2234/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15911__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24509__B _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15199__A1 _15590_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20740_ VGND VPWR _20747_/S wire1792/X _29255_/Q _29255_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_266_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23080__D_N _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20192__A1 _28740_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20529__S _20545_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15738__A3 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20756__C _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27600__S _27605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_4386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length4064_A _28662_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14946__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20671_ VGND VPWR _20671_/X _20671_/B _20671_/A _20671_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__17411__B _17411_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_1952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18137__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2923_A _20386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31694__CLK _31694_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19334__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22410_ VGND VPWR _22613_/S _29966_/Q _21916_/Y _29966_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26724__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31608_ _31608_/Q _32297_/CLK _31608_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21141__A0 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23390_ hold230/X _23307_/B _30367_/D _21221_/A _23389_/X _17079_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__18688__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25604__B1_N _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25407__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22484__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23681__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3939 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_4905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_4790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16699__A1 wire1062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_3617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22341_ _29920_/D _22385_/B1 _30459_/Q hold438/A _14365_/Y VGND VPWR _22340_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21692__A1 _21956_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25958__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31539_ _31539_/Q _32299_/CLK _31539_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_273_3229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26080__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23786__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24244__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23969__B1 wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25060_ _25681_/B1 _25059_/X _25082_/A2 _31173_/Q _31173_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_192_3942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15371__A1 _28890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22272_ _30050_/Q _21032_/B _22272_/X _22270_/X _22271_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_173_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20264__S _20269_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24091__C1 _24090_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24630__A1 _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15910__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24011_ _24011_/X _24207_/B1 _28529_/Q _28689_/Q _19715_/C VGND VPWR _24010_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_21223_ _21223_/Y hold384/X _23307_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_82_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_4662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold120 hold120/A hold120/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_273_1827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold131 hold131/A hold131/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_192_3997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_2020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1222_A wire1228/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold142 hold142/A hold142/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17112__A2 _21649_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_5104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold153 hold153/A hold153/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__28539__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21995__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23575__S _23582_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold164 hold164/A hold164/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__24918__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15123__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3117 _23341_/C _14284_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_21154_ VGND VPWR _21168_/S _29597_/Q _27247_/A0 _29597_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_2125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold175 hold175/A hold175/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold186 hold186/A hold186/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_210_3202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24260__A _31680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3139 VPWR VGND _23514_/S _23526_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27274__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16978__A hold467/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold197 hold197/A hold197/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__31074__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5159 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2405 VPWR VGND wire2405/X _14141_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22699__B _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24394__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20105_ _27003_/B1 _20104_/X _20124_/A _28698_/Q _28698_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15674__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_A0[4] wire2428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3631_A _30743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28750_ _28750_/Q _32307_/CLK _28750_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_211_4982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2427 VPWR VGND wire2427/X _14135_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25962_ wire755/A _26837_/D _26837_/A wire863/A _25962_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 X_21085_ VGND VPWR _21098_/S _27154_/A1 _29536_/Q _29536_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25075__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3729_A _30322_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_3588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_2124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_2512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27558__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22944__A1 _21328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21747__A2 _17017_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2449 VPWR VGND _24220_/S _24238_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21095__S _21095_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27701_ VGND VPWR _27701_/S _27701_/A1 _32435_/Q _32435_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25790__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24913_ VGND VPWR _14186_/A _19628_/A _24950_/A2 _24913_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_110_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27332__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20036_ _25081_/A wire1600/A _20036_/X _25063_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_266_4460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28681_ VGND VPWR _28681_/D _31470_/CLK _28681_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_281_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25893_ VGND VPWR _19543_/B _19581_/A _25903_/S _25893_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__28689__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1748 VPWR VGND wire1748/X wire1748/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout947_A wire951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15093__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24146__B1 wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15426__A2 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19504__D _19504_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16623__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27632_ VGND VPWR _27636_/S _19721_/A _32374_/Q _32374_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_262_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29934__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24844_ _24458_/C _31066_/D _26539_/B _24843_/Y wire868/X wire2253/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_227_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold260_A hold260/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_opt_24_0_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20707__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27563_ _25643_/C _32161_/Q _27564_/A _25643_/B _32153_/Q _32169_/Q _32145_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_167_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_2067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24775_ VGND VPWR _24775_/C _24760_/X _24775_/X _24775_/D _24775_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__19801__B wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21987_ _29798_/D hold268/A _22074_/B1 _21985_/X _21986_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XANTENNA__18376__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17179__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29302_ _29302_/Q _32038_/CLK _29302_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27635__A1 wire2234/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26438__A2 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30911__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26514_ _26514_/Y _26514_/B _26514_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_282_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23726_ _30816_/D _23807_/B wire767/X _23732_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_32_4325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_2625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20938_ VGND VPWR _20947_/S _29403_/Q _29506_/Q _29403_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27494_ VGND VPWR _27505_/S _27687_/A1 _32309_/Q _32309_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20439__S _20446_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2028_A _17341_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19520__C _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_2463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25646__B1 _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_824 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26843__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29233_ _29233_/Q _30900_/CLK _29233_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27510__S _27515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14937__A1 _14937_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26445_ _31614_/Q _31700_/Q _26446_/D _26464_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_240_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23657_ VGND VPWR _23666_/S wire1792/X _30787_/Q _30787_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18128__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20869_ VGND VPWR _23523_/S _20868_/X _29363_/Q _29363_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_126_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_3646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23121__A1 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14401__A3 _14398_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22608_ _22594_/S _22617_/B _22608_/X _30347_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_197_3842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29164_ _29164_/Q _32435_/CLK _29164_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25944__D_N _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14390_ _31051_/Q _24793_/B _31052_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_26376_ VGND VPWR _26335_/A _26378_/A4 _26878_/B _26376_/X _27028_/A _26376_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18679__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19876__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23588_ VGND VPWR _23588_/S _27509_/A1 _30508_/Q _30508_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_161_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28069__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28115_ _28115_/Q _30027_/CLK _28115_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25862__A_N _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21683__A1 _21660_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25327_ _25327_/X _25380_/C _31268_/Q _25414_/B1 wire3496/X _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_100_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25949__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26988__A_N _31019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29314__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22539_ VGND VPWR _22550_/S _29828_/Q _30039_/Q _30039_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29095_ _29095_/Q _32426_/CLK _29095_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22880__B1 _30109_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21778__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26071__B1 _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17351__A2 _30818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20682__B _24881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26610__A2 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16060_ _16059_/X _16058_/X _16500_/B1 _16060_/Y _16825_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_100_2347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25965__S wire754/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28046_ _28046_/Q _30246_/CLK _28046_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15362__A1 _29026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25258_ _26236_/A _25257_/X _25264_/A2 hold92/A _31253_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input76_A la_input[12] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_5436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15011_ _15010_/X _15356_/A2 _15332_/A2 _32312_/Q _15011_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_276_2196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24209_ wire706/A _24209_/B1 _24208_/X wire759/X _24201_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XFILLER_216_4882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25189_ _25188_/X _25109_/B _25189_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_30_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17103__A2 _14092_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3404_A wire3427/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3523 VPWR VGND _17875_/B _31047_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_272_1326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23485__S _23485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29464__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15114__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26374__A1 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16311__B1 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3556 VPWR VGND _17441_/B2 _30995_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20902__S _20902_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18851__A2 wire1405/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29997_ _29997_/Q _30384_/CLK _29997_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_210_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27906__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3640 VPWR VGND wire3640/X _30699_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_245_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19750_ VGND VPWR _19584_/B _19628_/A _19772_/A _19750_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_61_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21199__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3651 _21392_/A _30464_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__24924__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23727__A3 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28948_ _28948_/Q _30492_/CLK _28948_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30322__D _30322_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16962_ VGND VPWR _16962_/X _16964_/B1 wire1058/X _16961_/X _16960_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xclkbuf_leaf_281_core_clk _32570_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_1_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3662 VPWR VGND _14412_/A _30453_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_3745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2866 wire2869/X _21134_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_267_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2829_A _23295_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3673 VPWR VGND _18562_/A _30441_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27549__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21738__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30441__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3684 VPWR VGND _21279_/A _30418_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18701_ _22095_/C _22095_/B _21030_/S _18701_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__31567__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15913_ _15908_/X wire898/X _16522_/B1 _15912_/X _15913_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26126__A1 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3695 VPWR VGND _22605_/C _30346_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2899 wire2901/X _20615_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_19681_ _26694_/C _19680_/Y _19695_/A2 _28501_/Q _28501_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_210_core_clk _31548_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20946__A0 _29514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2961 VPWR VGND _18655_/S _18654_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19800__A1 wire4129/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16893_ VGND VPWR _16893_/X _16890_/X _16892_/X _16884_/S _16949_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_231_1056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28879_ _28879_/Q _32352_/CLK _28879_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3773_A _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16614__A1 _29261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15417__A2 _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2983 VPWR VGND _18503_/S _18531_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24137__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30910_ _30910_/Q _32324_/CLK _30910_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17811__B1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18632_ VGND VPWR _18658_/S wire3896/X _28345_/Q _28345_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire2994 VPWR VGND _18476_/S _18499_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_0_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26809__B _26809_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15844_ wire1533/X wire3276/X _29070_/Q _15844_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_128_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_3701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31890_ _31890_/Q _32565_/CLK _31890_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14201__A _19547_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23035__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14625__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_1_0_1_core_clk clkbuf_1_0_2_core_clk/A clkbuf_1_0_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__25885__B1 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16090__A2 _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2719 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_3404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30841_ _30841_/Q _32280_/CLK _30841_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18563_ hold360/A _23238_/B _30450_/Q _18563_/X _18563_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_245_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15775_ _15775_/X _18562_/A _14544_/D _14544_/B _14442_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA_fanout3940_A _17228_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23896__C1 wire763/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30591__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23360__A1 _23360_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19564__B1 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27087__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27626__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15731__S _15736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21463__A_N _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17514_ _17514_/Y _31747_/Q _17514_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_wire1030_A wire1030/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14726_ VGND VPWR _14820_/S _29009_/Q _28977_/Q _14726_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20174__A1 _28731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30772_ _30772_/Q _32117_/CLK _30772_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18494_ VGND VPWR _18495_/S wire3828/X _28267_/Q _28267_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20349__S _20359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1128_A wire1128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25637__B1 _25635_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16917__A2 _16916_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_560 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18772__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26825__A _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21910__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26834__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_571 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output699_A wire3519/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32511_ _32511_/Q _32527_/CLK _32511_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27420__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_5601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14928__A1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_582 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17445_ _30958_/Q _30992_/Q _30886_/Q _30852_/Q wire3192/A _17445_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XFILLER_260_481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14657_ VGND VPWR _14657_/X _14822_/B1 _14823_/C1 _14654_/X _14656_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_196_4020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_593 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18119__A1 _18532_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19316__B1 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23112__A1 _29790_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17590__A2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_4217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32442_ _32442_/Q _32442_/CLK _32442_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20295__D _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmgmt_core_wrapper_4210 flash_io1_do mgmt_core_wrapper_4210/HI VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 X_17376_ VGND VPWR _17376_/X wire2097/X _17374_/X _17302_/A _17375_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_14588_ wire1533/X _14588_/X _29165_/Q _14627_/C1 _14627_/A1 _14820_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__17327__C1 _17324_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22564__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22466__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24860__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_1797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_3685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2431_A _14132_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19115_ _19201_/A2 _27876_/Q wire1939/A _19115_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_157_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16327_ _16326_/X _16949_/A1 wire992/X _28418_/Q _16327_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_217_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32373_ _32373_/Q _32547_/CLK _32373_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17885__C _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16145__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17342__A2 input178/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26601__A2 wire817/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19046_ _19046_/X _19046_/S _28225_/Q _28193_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 X_31324_ _31324_/Q _32560_/CLK _31324_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19882__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15353__A1 _29476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16258_ VGND VPWR _16258_/X _16257_/X _16256_/X _16838_/A1 _16834_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19619__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29807__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31097__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15209_ _15350_/A1 _16646_/A2 _15209_/X _15350_/B1 _29256_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_255_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14561__C1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_3063 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31255_ hold95/A _31536_/CLK _31255_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19095__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_369_core_clk _30446_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_16189_ _16184_/X wire894/A wire911/A _16188_/X _16189_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_135_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32342__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput225 wire3502/X gpio_mode1_pad VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_155_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput236 _14035_/Y la_iena[105] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_250_4272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4223 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21977__A2 _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput247 _14025_/Y la_iena[115] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15105__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30206_ _30206_/Q _30225_/CLK _30206_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_6_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26365__A1 _31670_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput258 _14015_/Y la_iena[125] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25168__A2 _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2898_A _20598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31186_ _31186_/Q _32390_/CLK _31186_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_230_4868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20812__S _20813_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput269 _13790_/Y la_iena[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18489__S _18489_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_2392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24376__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15656__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16853__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30137_ hold423/A _30456_/CLK _30137_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24915__A2 _19570_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29957__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23718__A3 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19948_ _25776_/C _19947_/X _19968_/A2 _28622_/Q _28622_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_99_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26770__D1 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1929_A wire1930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26380__A4 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire915_A wire915/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27314__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26117__A1 _24586_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32492__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_1311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25904__A _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20937__A0 _29505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26117__B2 _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30068_ hold166/A _32277_/CLK _30068_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_96_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17406__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19879_ _19878_/X _28589_/Q _28589_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_133_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24128__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15408__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21910_ hold253/A _22074_/B1 _29792_/D _21909_/X _21908_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__30934__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17802__B1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14616__A0 _28806_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14111__A _21392_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22890_ VGND VPWR _22891_/B _30476_/Q _22935_/A wire3133/X _22887_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__24679__A1 _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_5632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22139__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28981__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16081__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2099 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23424__A _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21841_ _21480_/B _21476_/B _21381_/Y _21842_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_142_4317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19621__B _19621_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18358__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_3072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_3646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31063__D _31063_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27617__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13950__A _28547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24560_ _24560_/A _24560_/D _24560_/C _24560_/B _24561_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__24841__D_N _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21772_ _21772_/Y _21768_/X _14407_/A _14408_/B _21771_/X _21846_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_1 XANTENNA__16369__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20259__S _20259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16908__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23511_ VGND VPWR _23515_/S _15765_/A _23302_/C _23511_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31998__D _31998_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27330__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27093__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1364_A _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_3427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20723_ VGND VPWR _20723_/X _20723_/B _29452_/D _27233_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14919__A1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_85_core_clk _31575_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XPHY_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28211__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29337__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24491_ _24543_/B _25578_/C _31042_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_140_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_4874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19307__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24300__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26230_ VPWR VGND _31603_/D _26230_/B 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_29835_/Q _29837_/Q _29836_/Q _22255_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__23957__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3846_A wire3847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19086__A2 wire1403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_4020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27002__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_824 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21968__A2 _21624_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17097__A1 _17096_/X VGND VPWR VPWR VGND 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VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18833__A2 _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18399__S _18399_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_4200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24367__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15647__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16844__A1 _16943_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28802_ _28802_/Q _30425_/CLK _28802_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14304__C1 _14303_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21137_ VGND VPWR _21137_/S _21203_/A0 _29581_/Q _29581_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24906__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23709__A3 _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2213 VPWR VGND wire2213/X _19559_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_3021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29782_ hold158/A _29782_/CLK _29782_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14720__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26994_ _27001_/B _31981_/D _26999_/A _26994_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 Xwire2224 VPWR VGND _26785_/B _19660_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_hold475_A hold475/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1428 _18293_/Y _27701_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire2235 VPWR VGND _26781_/B _19656_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_3510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1501 VPWR VGND wire1501/X _14546_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26108__A1 _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28733_ _28733_/Q _31351_/CLK _28733_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27505__S _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20928__A0 wire3978/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21068_ VGND VPWR _21094_/S _27680_/A1 _29519_/Q _29519_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25945_ VGND VPWR _31486_/D _26159_/A _25943_/X _25935_/X _25944_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_112_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17316__B _17316_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1973_A wire1975/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18597__A1 wire3904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24119__B1 wire1614/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23590__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26659__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20019_ _26218_/A _20018_/Y wire851/X _28656_/Q _28656_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_186_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1556 wire1557/X wire1556/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_input130_A la_input[61] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28664_ _28664_/Q _32470_/CLK _28664_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_112_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14607__A0 _29240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3407 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14021__A _28476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13890_ _13890_/Y _28607_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA_wire2145_A _19776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25876_ _31456_/Q _31457_/Q _31455_/Q _25877_/D _25878_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23017__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1578 VPWR VGND wire1578/X wire1579/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_0_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16072__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_3199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27615_ VGND VPWR _27621_/S wire1792/X _32357_/Q _32357_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_142_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24134__A3 _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26348__C _26350_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24827_ _24827_/Y _31020_/Q _31024_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19531__B _19531_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28595_ VGND VPWR _28595_/D _32440_/CLK _28595_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_262_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18349__A1 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22145__A2 _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27069__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20677__B _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27608__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15551__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13860__A _28637_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_3825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15560_ _16781_/A2 _15560_/A1 _29095_/Q _15560_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_240_4441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27546_ _27546_/X _31382_/Q _25682_/B _27540_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__20156__A1 _28722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23053__B _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24758_ _24758_/Y _31460_/Q _31464_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_19_3276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_4572 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_4122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_3904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23893__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32215__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26816__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14511_ VGND VPWR _27485_/D _14513_/A _18562_/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__27240__S _27255_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24996__C_N _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3546_A _14293_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23709_ VGND VPWR _23879_/C _24205_/B1 _20673_/B _23709_/X _23708_/X _31578_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_205_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_4272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15491_ _15752_/A2 _15491_/X _15490_/X _15692_/S _29327_/Q wire1515/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_27477_ VGND VPWR _27483_/S _32295_/Q _32296_/Q _27477_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14167__S _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24689_ _24689_/B _24689_/X _31452_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_204_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25095__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15032__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3354_A wire3362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26292__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31701__D _31701_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22774__A2_N _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14394__C _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17230_ VGND VPWR _17238_/S _17223_/X _17229_/X _30404_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29216_ _29216_/Q _32114_/CLK _29216_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_2769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14442_ _14442_/Y _14442_/B _14544_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26428_ _26428_/X _31697_/Q _26427_/B _31696_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__15583__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28704__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17309__C1 _17308_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17986__B _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_4346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17161_ VGND VPWR _17238_/S _17154_/X _17160_/X _30395_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29147_ _29147_/Q _31937_/CLK _29147_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_2190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire820 VPWR VGND wire820/X wire820/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14791__C1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14373_ _31001_/Q _24407_/B _31002_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_wire2681_A wire2682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26359_ _26358_/X _31667_/Q _31667_/D wire781/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_196_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire831 VPWR VGND wire831/X wire831/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout3521_A _31055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32365__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18163__A _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18521__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17324__A2 _31912_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16112_ _16149_/A2 _16149_/A1 _32421_/Q _16112_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire853 VPWR VGND wire853/X wire853/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_6_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19864__A4 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_4808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17092_ _29999_/Q _22484_/A2 _17092_/X _29427_/Q wire3791/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_197_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21301__B _21629_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_5_0_core_clk clkbuf_opt_5_1_core_clk/A clkbuf_5_2_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_29078_ _29078_/Q _32422_/CLK _29078_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30807__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16532__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire886 wire886/X wire886/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_23_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15886__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16043_ _16042_/Y wire890/A _16024_/Y _29659_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 X_28029_ _28029_/Q _30449_/CLK _28029_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28854__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23948__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2946_A _20284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17813__A1_N _17709_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25708__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24070__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24612__B _31532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31040_ VGND VPWR _31040_/D _32107_/CLK hold178/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_212_4543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_3244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26347__A1 _31661_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22081__B2 _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27544__B1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20632__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18824__A2 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3342 VPWR VGND _27087_/C1 _26224_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_4008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19706__B _19706_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3353 VPWR VGND _26184_/A _26188_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_215_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4160 VPWR VGND wire4160/X _28055_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20092__B1 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24358__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3988_A wire3990/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16835__A1 wire3237/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15638__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19802_ _27003_/B1 _19801_/X _19852_/A2 _28553_/Q _28553_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14565__C_N _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4171 VPWR VGND wire4171/X input5/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3375 _13829_/Y _14133_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17507__A _31761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4182 VPWR VGND wire4182/X hold88/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire4062_A wire4063/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18102__S _18109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17994_ VGND VPWR _18015_/S wire3888/X _27928_/Q _27928_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire4193 wire4194/X wire4193/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22908__A1 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18037__A0 _27969_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_4677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_5377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26362__A4 _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3470 VPWR VGND _24735_/B _31460_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23030__A0 _23029_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29841__D _29841_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19733_ _25718_/A _19732_/X _19772_/A _28523_/Q _28523_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27415__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1940 VPWR VGND wire1942/A wire1948/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14310__A2 _18682_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20919__A0 _20918_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16945_ VGND VPWR _16945_/X _16601_/S wire1044/X _16942_/X _16944_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25570__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output614_A _14244_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1962 wire1968/A wire1963/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_225_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_3646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23581__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27847__A1 _32544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17941__S _17941_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1973 wire1975/A _19377_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_264_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_4000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2780 VPWR VGND _27710_/S _27706_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26539__B _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19722__A _26335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31942_ _31942_/Q _32318_/CLK _31942_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19664_ _26773_/C _20128_/A _27070_/B _19664_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20395__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_5097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16876_ _16876_/X _16940_/B1 _16873_/X _16875_/X _16950_/A1 _16871_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23008__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22559__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_938 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16063__A2 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18615_ VGND VPWR _18615_/S _23291_/A1 _28329_/Q _28329_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_39_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22786__C _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15827_ _15827_/X _29617_/Q _16150_/A2 _16150_/A3 _15957_/S _15826_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_160_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28234__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19441__B _28442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19595_ _26809_/B _26949_/A _19595_/X _19849_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_31873_ _31873_/Q _31873_/CLK _31873_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_59_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13770__A _31176_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15810__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18546_ _18546_/A _21286_/C _22078_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_30824_ _30824_/Q _31507_/CLK _30824_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20147__A1 _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15758_ _15707_/A _15758_/A1 _30918_/Q _15758_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_280_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23884__A2 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27075__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27150__S _27154_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14709_ _14690_/Y _14708_/Y _15612_/B _29136_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__30337__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18477_ VGND VPWR _18488_/S wire3882/X _28250_/Q _28250_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30755_ _30755_/Q _32432_/CLK _30755_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_222_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25086__A1 _31186_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15689_ _15679_/X _29162_/D wire1072/X _15688_/X _15670_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_102_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15023__B1 wire1093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_390 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2454_A wire2461/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26283__B1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16220__C1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26822__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28384__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17428_ VGND VPWR hold14/A hold13/X _17426_/X _17447_/B2 _17427_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23097__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15574__A1 wire1068/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold84_A hold84/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17896__B _32598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22294__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30686_ hold215/A _32398_/CLK _30686_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20807__S _20817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24833__A1 wire868/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21647__A1 _22905_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32425_ _32425_/Q _32425_/CLK _32425_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_179_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_5193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21647__B2 _29732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17359_ _17424_/B _17358_/X _32292_/Q _17424_/C _17360_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_278_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_5494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1879_A _19785_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17315__A2 _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18512__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30487__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19855__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14129__A2 _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20370_ wire836/X _27793_/D _20680_/C _25722_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__21211__B _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27386__A _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32356_ _32356_/Q _32428_/CLK _32356_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24046__C1 _24045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15326__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_2754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_5311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31732__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20108__A _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24803__A _31682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_4_3_0_core_clk_A clkbuf_4_3_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15877__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19029_ _19028_/X _19109_/S _19179_/A2 _27968_/Q _19029_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31307_ _31307_/Q _31310_/CLK _31307_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26050__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18280__A_N _29861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19068__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32287_ _32287_/Q _32287_/CLK _32287_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24061__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14106__A _21427_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17079__A1 _17075_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_4078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22040_ _22040_/X _22038_/X wire2848/X _22037_/Y _21647_/X wire3146/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__18276__B1 wire3175/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26338__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31238_ hold100/A _32287_/CLK _31238_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_61_4362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_2220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_132_core_clk _32322_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_233_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20542__S _20550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17618__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18815__A2 _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_4384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_5587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1112_A wire1113/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15629__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24349__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13945__A _28552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26889__A2 wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19108__S _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31169_ _31169_/Q _32551_/CLK _31169_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_170_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31882__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18012__S _18012_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout4002_A wire4004/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14837__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22222__A1_N _22241_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1018_A wire1021/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_1994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27325__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14301__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23991_ _30865_/D _24199_/B1 _23990_/X _23989_/X _23986_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XFILLER_165_5552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_1685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16039__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_5115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23572__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22375__A2 _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25730_ _25730_/Y _25730_/B _25730_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14852__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19632__A _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22942_ VGND VPWR _23342_/A _30454_/Q _30119_/Q _30119_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_77_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3427_A wire3427/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19240__A2 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VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25661_ _25661_/X _27395_/B _25682_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xor2_4 XANTENNA__24116__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22873_ _22872_/X _22870_/X _22809_/C _22878_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_38_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18217__C_N _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_2747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22127__A2 _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27400_ VGND VPWR _27403_/S _27274_/X _32249_/Q _32249_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_3150 VPWR VGND VGND VPWR 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NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14495__B _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26465__A _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18200__A0 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27066__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27331_ _31386_/Q _31384_/Q _27404_/B hold143/A _27339_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__17003__B2 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1746_A 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NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18751__A1 _28310_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26274__B1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21350__A3 _21550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29198__D _29198_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_3711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20706_ VGND VPWR _20714_/S _29222_/Q _27694_/A1 _29222_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27262_ VGND VPWR _27262_/S _32137_/Q wire1783/X _32137_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24474_ _31033_/D _24473_/Y wire2253/X _24467_/X _26539_/B _24470_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_237_4808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23601__B _23601_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold223_A hold223/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_4070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_2699 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21686_ _21631_/X _21687_/A _21632_/X _21657_/X _21767_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_123_2144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_3492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20717__S _20717_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23627__A2 _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16762__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29001_ _29001_/Q _32425_/CLK _29001_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_1147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_5632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26213_ _31595_/Q _26227_/A2 _26214_/B _32285_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_23425_ _29840_/Q _23425_/X _29382_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XPHY_1158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28877__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20637_ VGND VPWR _20639_/S _27697_/A1 _29183_/Q _29183_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27193_ _32090_/Q _27195_/A _27193_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_wire3963_A _22610_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1721_A _23380_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16109__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18503__A1 wire3910/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1819_A _18257_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26144_ VGND VPWR _26019_/A _19551_/X _26143_/X _31561_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_279_1866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_1077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23356_ _30334_/D _23350_/X _23354_/C _23355_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_10_2336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20310__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24037__C1 _24036_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25809__A _32549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20568_ VGND VPWR _20572_/S _27694_/A1 _29084_/Q _29084_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_4434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24713__A _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22307_ VGND VPWR _22307_/S _29893_/Q _29152_/Q _29893_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15868__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26075_ _31539_/Q _26074_/Y _26075_/Y _26081_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19059__A2 wire1984/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19807__A _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23287_ VGND VPWR _23298_/S _23287_/A1 _30269_/Q _30269_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_1530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2095_A wire2096/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14016__A _28481_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20499_ VGND VPWR _20515_/S _21153_/A0 _29017_/Q _29017_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28107__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24052__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input178_A mprj_dat_i[13] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_3755 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2799 VPWR VGND _27506_/S _27513_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_238_1552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25026_ _25652_/A _25025_/X _25082_/A2 _31156_/Q _31156_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_231_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29903_ VGND VPWR _29903_/D _32071_/CLK _29903_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_279_621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22238_ _22238_/X _22237_/X _30110_/Q _18664_/X wire2286/X VGND VPWR wire826/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_49_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14540__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20452__S _20452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27526__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18806__A2 wire1772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19526__B _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20074__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16817__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13855__A _28642_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_2453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_2172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29834_ _29834_/Q _30404_/CLK _29834_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2262_A _27120_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22169_ _22168_/X _23417_/A wire829/X _29824_/Q _29824_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25001__A1 _31144_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1203 wire1210/A _15611_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_114_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3102_A _16981_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_2888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26344__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2021 VPWR VGND wire2021/X _17431_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_27_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1225 VPWR VGND _15730_/C1 fanout1225/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_229_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_79_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16293__A2 wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2032 VPWR VGND wire2032/X _14401_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27235__S _27238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2043 wire2043/X wire2044/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_29765_ _29765_/Q _31921_/CLK hold267/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_43_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17046__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input39_A irq[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28257__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14991_ _16417_/A2 wire3298/X _29250_/Q _14991_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26977_ _26976_/X _31974_/Q _31974_/D _26979_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_147_4014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2054 wire2055/X wire2054/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2065 VPWR VGND wire2065/X wire2065/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1269 VPWR VGND _26694_/B wire1273/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22366__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27829__A1 _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22887__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2076 VPWR VGND wire2076/X wire2076/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16730_ _16725_/A _16725_/C _28862_/Q _16730_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19542__A _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28716_ _28716_/Q _32160_/CLK _28716_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2087 wire2088/X wire2087/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_13942_ _28555_/Q _13942_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1342 VPWR VGND _24841_/C _26350_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25928_ hold412/A _25928_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20377__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_3936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29696_ hold201/A _29697_/CLK _29696_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2098 wire2099/X wire2098/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire1353 VPWR VGND wire1353/X wire1354/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16045__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3663_A _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1386 wire1386/X wire1387/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_16661_ _16661_/X _16658_/X _16930_/A1 _16660_/X _16967_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XANTENNA__24107__A3 _24441_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28647_ _28647_/Q _31892_/CLK _28647_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13873_ _13873_/Y _28624_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_25859_ VGND VPWR _31450_/D _25859_/B _25878_/A _25859_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire1397 wire1397/X _23601_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_21_2498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15253__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17793__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18400_ _18401_/C _18434_/B _30415_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_267_1269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31605__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15612_ _15612_/Y _15612_/B _15612_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_284_1550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20129__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19380_ _19379_/X _19380_/B1 _19380_/A2 _28176_/Q _19380_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_262_576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_3622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18153__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16592_ VGND VPWR _16592_/X _16591_/X _16590_/X _16736_/S _16967_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28578_ _28578_/Q _31977_/CLK _28578_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_3392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_1523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23866__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29652__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27057__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18331_ VGND VPWR _18260_/X _29770_/Q _22372_/A2 _22384_/A _18330_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_2 XFILLER_73_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21877__A1 hold223/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15543_ VGND VPWR _15543_/S _15542_/X _15541_/X _15543_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27529_ _25643_/C _32222_/Q _27529_/X _25643_/B _32214_/Q _32230_/Q _32206_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__27070__D_N _27053_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25068__A1 _31177_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2896_A _20606_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3736_A _30284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17545__A2 _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18742__A1 _27954_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_1988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21341__A3 _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26804__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30540_ hold441/A _31887_/CLK input54/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18262_ VGND VPWR _18260_/X _29755_/Q _22372_/A2 _22354_/A _18261_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_2 XANTENNA__21972__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15474_ VGND VPWR _15474_/X _15473_/X _15472_/X _15705_/A1 _15730_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_12_3825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26525__D _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20627__S _20638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31755__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17213_ _17213_/X _17212_/X wire3217/X _21646_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 X_14425_ _21746_/S _14424_/Y _21645_/A _20832_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_193_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18193_ VGND VPWR _18222_/S _28085_/Q _27140_/A1 _28085_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30471_ VGND VPWR _30471_/D _30471_/CLK _30471_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_253_5344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19298__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23094__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24291__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17001__S _17089_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32210_ _32210_/Q _32210_/CLK hold145/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19837__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15308__A1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17144_ wire3216/X _17143_/B _17144_/X _17220_/C _17143_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_201_2875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14356_ VPWR VGND _14356_/X _14356_/B _14356_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__26568__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24028__C1 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16505__B1 _16839_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20301__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output564_A _24118_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15859__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32141_ _32141_/Q _32467_/CLK _32141_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17936__S _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26541__C _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20852__A2 _30431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17075_ _17075_/X wire3791/X hold461/A _29425_/Q _30406_/Q VGND VPWR _17074_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 X_14287_ _26904_/A _32598_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XANTENNA__21966__B _21966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25240__A1 hold99/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24043__A2 _19994_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16520__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18258__A0 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29032__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16977__D_N _29981_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16026_ _16026_/X _28811_/Q _16026_/A2 _16039_/B2 _16039_/C1 _16025_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__22054__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32072_ _32072_/Q _32569_/CLK _32072_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22054__B2 _17220_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14531__A2 _14309_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2971 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16808__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3150 VPWR VGND _23355_/C _18660_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_256_1696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31023_ _31023_/Q _32032_/CLK _31023_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3161 _18538_/Y _21211_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21801__A1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1362_A _19642_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3172 VPWR VGND _23157_/A2 _18533_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_34_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19470__A2 _31345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_5438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31135__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2324 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2999 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16284__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27145__S _27153_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25454__A _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25543__A2 _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17977_ VGND VPWR _17983_/S wire3830/X _27914_/Q _27914_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14295__A1 _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29182__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14295__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1836 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22357__A2 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23554__A1 _30475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17671__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22988__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19716_ _20126_/A _19716_/C _23879_/A _20657_/C _23876_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 X_16928_ _16928_/X _28939_/Q _16947_/A2 _16928_/A3 _16928_/B1 _16927_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 Xfanout1781 VPWR VGND _21203_/A0 _18324_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_229_4881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22289__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21193__S _21201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18430__A0 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17233__A1 _29905_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26099__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17233__B2 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19647_ _19785_/C _19860_/A _26904_/B _23598_/C _23599_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 X_31925_ _31925_/Q _32365_/CLK hold366/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_281_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16859_ _16878_/A2 _16878_/A1 _29236_/Q _16859_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_226_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31285__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23306__A1 _20987_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22109__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_1358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15191__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17784__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32530__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_19_0_core_clk clkbuf_5_19_1_core_clk/A clkbuf_4_9_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__14598__A2 _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31856_ _31856_/Q _31896_/CLK _31856_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19578_ VGND VPWR wire2675/X _19522_/A _19598_/A _19578_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_280_373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28915__D _28915_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23857__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20110__B _20110_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18718__D1 _19196_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21868__A1 _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18529_ VGND VPWR _18532_/S wire3820/X _28301_/Q _28301_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30807_ _30807_/Q _31507_/CLK _30807_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_33_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1996_A wire1997/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31787_ _31787_/Q _31884_/CLK _31787_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_198_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_1618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_34_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21540_ _21548_/A _30352_/Q _21677_/D _21548_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_124_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30738_ hold439/A _32541_/CLK _30738_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23421__B _23563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20537__S _20545_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3008_A _18426_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_1088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21222__A _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22817__B1 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21471_ _21471_/A _21471_/D _21471_/C _29882_/Q _21473_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 Xclkbuf_leaf_384_core_clk _32269_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19289__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24678__A_N _31469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30669_ _30669_/Q _32549_/CLK hold306/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23140__C _23140_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18007__S _18007_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24282__A2 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23210_ VGND VPWR _23212_/S _30202_/Q _30132_/Q _30202_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26732__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20422_ VGND VPWR _20429_/S _28942_/Q _27680_/A1 _28942_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32408_ _32408_/Q _32412_/CLK _32408_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23490__A0 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22293__A1 _29879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17889__B_N _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24190_ _28483_/Q _24190_/X _19786_/A _24441_/C _28579_/Q _26949_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_2 XFILLER_194_2429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25629__A _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14770__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_313_core_clk _29389_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_222_1397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_2431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27220__A2 _25773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23141_ _23191_/C1 _23191_/B1 _23190_/B _30441_/Q _23141_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_45_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32339_ _32339_/Q _32523_/CLK _32339_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20843__A2 _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20353_ VGND VPWR _20354_/S _27703_/A1 _28893_/Q _28893_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19627__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16750__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_1955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24034__A2 _24140_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3377_A _13759_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25231__B2 hold123/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_1_1_4_core_clk clkbuf_1_1_5_core_clk/A clkbuf_1_1_4_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__24252__B _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27266__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_2497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23072_ hold158/A wire3171/X _23072_/X _30092_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_135_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14522__A2 _22078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20272__S _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20284_ VGND VPWR _20284_/S _27700_/A1 _28826_/Q _28826_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_5085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25782__A2 _25780_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15366__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26900_ _26900_/Y _26900_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_115_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22023_ VGND VPWR _22012_/Y _21302_/X _21310_/B _22023_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__29525__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23793__B2 _31842_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27880_ _27880_/Q _28363_/CLK _27880_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19461__A2 _31343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_79_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23583__S _23596_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25047__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21892__A _21892_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32060__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26831_ _26831_/Y _26896_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xhold13 hold13/A hold13/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25364__A _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25534__A2 _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26731__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold24 hk_dat_i[22] hold24/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_3525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14286__A1 _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold35 hold35/A hold35/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15483__B1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30502__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23545__A1 hold483/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17581__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold46 hold46/A hold46/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__22979__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31628__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29550_ _29550_/Q _29550_/CLK _29550_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold57 hk_dat_i[11] input9/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_26762_ _26762_/C _26763_/D _26902_/B _31934_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XANTENNA__25083__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20359__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold68 hold68/A hold68/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23974_ _23974_/X _20673_/D _30673_/Q _30737_/Q wire1633/X VGND VPWR wire1265/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19213__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold79 hold79/A hold79/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_148_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_73_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29675__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18421__A0 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28501_ _28501_/Q _31507_/CLK _28501_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_229_595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25713_ _31401_/D _31401_/Q _25712_/Y _25731_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_228_4380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17224__B2 _21426_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22925_ _30480_/Q _22924_/X _22926_/B wire3133/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_77_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29481_ _29481_/Q _30900_/CLK _29481_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_148_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26693_ _26693_/B _31799_/D _27028_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_70_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26495__B1 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18972__A1 _28320_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_5563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28432_ _28432_/Q _30425_/CLK _28432_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25644_ VGND VPWR _25641_/B _25682_/B _25641_/A _25644_/X _25750_/A _27594_/B VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_272_885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14589__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22856_ _22855_/A _22855_/B _22842_/X _22856_/Y _22869_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XANTENNA__21308__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23848__A2 wire1808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30652__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22505__C1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_5311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24708__A _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31778__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27039__A2 _27036_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21859__A1 _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21807_ VGND VPWR _21817_/S hold307/A _21806_/X _29783_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28363_ _28363_/Q _28363_/CLK _28363_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14994__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25575_ VGND VPWR _31366_/Q _25571_/C _31367_/Q _25577_/D _31369_/Q _31368_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_161_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22787_ VGND VPWR _22787_/X _22820_/B _29890_/Q _22820_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_276_4610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27824__A_N _32536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18724__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1936_A wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27314_ VGND VPWR _27321_/S _32173_/Q _27266_/X _32173_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24427__B _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24526_ _24527_/A _24527_/C _31221_/Q _24526_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XPHY_345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21738_ _14408_/B _21817_/S _14408_/A _16999_/X _21738_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_259_3628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28294_ _28294_/Q _30432_/CLK _28294_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2108_A wire2109/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20447__S _20447_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_4335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length3244_A _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31008__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27245_ VGND VPWR _27264_/S _32120_/Q _27245_/A0 _32120_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_142_2586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24457_ _24442_/A _31024_/D _27051_/A _24456_/Y _24442_/C _24454_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_177_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5099 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21669_ _21669_/X _22026_/B1 _29903_/Q wire3926/X _21953_/A2 VGND VPWR _21668_/B + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_237_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27738__B _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3220 _21551_/B _21514_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_215_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21489__D _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_4379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14210_ _19534_/B _14210_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XFILLER_158_2004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19819__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29055__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29656__D _29656_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23408_ VGND VPWR _30410_/D wire3412/A _23406_/X _23347_/B _23407_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__23481__A0 _30427_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27747__A0 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_4903 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27176_ hold242/X _27175_/Y hold243/A _32081_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_15190_ _15190_/X _32317_/Q _15189_/X _15332_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25539__A _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14761__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19685__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24388_ VGND VPWR _30997_/D _25595_/A _24388_/A _24389_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_275_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_1915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2541 VPWR VGND _20429_/S _20425_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3286 VPWR VGND _16943_/A1 wire3287/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14141_ _14141_/A _14141_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XFILLER_253_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26127_ _31553_/D _26020_/Y _17879_/B _31553_/Q _17876_/Y VGND VPWR _26126_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_max_length3509_A _31156_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20834__A2 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2552 VPWR VGND _20258_/S _20247_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23339_ _23304_/B _30316_/Q _23338_/X _30316_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xmax_length3297 VPWR VGND _15266_/A1 wire3298/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_114_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24025__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25222__A1 hold101/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2574 VPWR VGND _19417_/S _19418_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30032__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3317_A wire3320/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16502__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31158__CLK _31158_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2585 VPWR VGND _22281_/B2 _22181_/B2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14072_ _30435_/Q _14072_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__15171__C1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26058_ wire2597/X _26057_/X _31534_/Q _17877_/X _31534_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23233__B1 _22733_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32403__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1884 VPWR VGND _19274_/A1 wire1885/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_279_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_4068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15276__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17900_ VPWR VGND _31063_/Q _17900_/X _31026_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_2 X_25009_ _25076_/C1 _25008_/X _25021_/A2 _31148_/Q _31148_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_114_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18880_ VGND VPWR _18880_/X _19306_/B _19047_/S _28153_/Q _18879_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_188_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2644_A wire2645/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20598__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19452__A2 _19451_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_331_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21795__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1000 VPWR VGND _16149_/A2 _16206_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22898__A _29901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1011 _16206_/A2 _16878_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23493__S _23513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16266__A2 wire1547/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3435 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17831_ VGND VPWR _17842_/S _17818_/X _17830_/X _17831_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_134_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1022 wire1030/A _16818_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25274__A _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29817_ VGND VPWR _29817_/D _30314_/CLK _29817_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_286_3036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17463__B2 _31682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25525__A2 _31342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1033 wire1035/A _16816_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30182__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23536__A1 hold494/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22339__A2 wire3213/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3686_A _30369_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_5531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17762_ _31645_/Q _14067_/A _17762_/X _17474_/X _14302_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29748_ _29748_/Q _31910_/CLK hold289/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32553__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19204__A2 _19203_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14974_ VGND VPWR _14974_/X _14973_/X _14972_/X _15517_/A1 _15509_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_207_5143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2909_A _20552_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1088 wire1097/A wire1089/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_207_5154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1099 _15628_/B1 _14675_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18412__A0 _18478_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16018__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19501_ _19501_/X _31334_/Q _28452_/Q _25510_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 Xload_slew2662 _19566_/B _14186_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16713_ VGND VPWR _16929_/S _29232_/Q _29296_/Q _16713_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_3345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1172 VPWR VGND wire1172/X wire1172/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13925_ _28572_/Q _13925_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_263_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17504__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17693_ VGND VPWR _17488_/B _17488_/A _17596_/C _17693_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_29679_ _29679_/Q _31912_/CLK _29679_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_2341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18963__A1 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26486__B1 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21286__D_N _21285_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31710_ _31710_/Q _32566_/CLK _31710_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19432_ _19432_/Y _28440_/Q _19432_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__26817__B _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_1689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16644_ wire923/A _16643_/X _16639_/X _16637_/X _16644_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_1_2389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_2775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15777__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13856_ _13856_/Y _28641_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA_wire4025_A wire4026/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20770__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23839__A2 wire1812/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24618__A _31534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19363_ VGND VPWR _19363_/X _19379_/B _19380_/B1 _27920_/Q _19362_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_31641_ _31641_/Q _31894_/CLK _31641_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_140_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14985__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16575_ wire992/X _16575_/X _16574_/X _16964_/B1 _28962_/Q _16966_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_34_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13787_ _31159_/Q _13787_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18176__C1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17518__A2 _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18682__C_N _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19912__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22511__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18314_ _18234_/B wire3174/X _18314_/Y _29341_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__17520__A _32577_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15526_ _15525_/X _15319_/B _15521_/X _15757_/C1 _15526_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_51_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31572_ _31572_/Q _32115_/CLK _31572_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19294_ _22551_/S _19293_/X _19283_/X wire1885/X _19294_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20522__A1 _29039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20357__S _20357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16726__B1 wire958/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output681_A _32598_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_2653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26833__A _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18191__A2 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2344_A _14201_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18245_ _18254_/S _29854_/Q _18295_/B _18244_/X _18245_/Y _29340_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_275_4153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30523_ _30523_/Q _32557_/CLK hold334/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14737__C1 _14736_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15457_ _15605_/A2 _15457_/X _15456_/X _15640_/A1 _32436_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_32_3081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27648__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24264__A2 _26335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_118_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_155_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_2145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_32_0_core_clk clkbuf_opt_32_1_core_clk/A clkbuf_5_28_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_14408_ _14408_/Y _14408_/A _14408_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_258_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18054__C _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23668__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23472__A0 _31940_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22275__A1 _22243_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_5524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30454_ VGND VPWR _30454_/D _30454_/CLK _30454_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_89_2167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18176_ _18176_/X wire3908/X _18201_/A _18244_/A _18163_/B wire3712/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_15388_ _23466_/B2 wire3303/X _32131_/Q _15388_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22572__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_5185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27367__C _27404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2511_A _20754_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_370_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27202__A2 _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28422__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17127_ _21903_/B _17127_/B _17127_/X _22756_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__29548__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14339_ VGND VPWR _14328_/Y _21444_/A _14331_/A _14339_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19447__A _28442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30385_ _30385_/Q _30385_/CLK _30385_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17151__B1 _21638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24016__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25213__A1 hold133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19691__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21188__S _21195_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22027__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32124_ _32124_/Q _32316_/CLK _32124_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32083__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17058_ VGND VPWR _23348_/C _30194_/Q _30383_/Q _17058_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_41_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27664__A _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24503__D _24505_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold47_A hk_dat_i[15] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_269_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19979__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16009_ VGND VPWR _16009_/X _16120_/S _16807_/B1 _16008_/X _16007_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__30525__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24972__B1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32055_ _32055_/Q _32574_/CLK _32055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_4569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_2069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20589__A1 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28572__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29698__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31006_ _31006_/Q _32579_/CLK _31006_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire828_A wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26713__A1 hold431/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20820__S _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18497__S _18497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23527__A1 wire4143/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20165__C_N _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2290 VPWR VGND _17586_/A _26435_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_227_4829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1911_A wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26465__C_N _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18939__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16009__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25334__D _25334_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18403__A0 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27603__S _27618_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length4094_A _28650_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19676__D_N _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15480__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31920__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20971_ VGND VPWR _20980_/S hold173/X _29436_/Q hold174/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_78_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23135__C _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20210__A0 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15217__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17757__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19594__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22750__A2 _21404_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22710_ VGND VPWR _22710_/X _22710_/B _22954_/S _22710_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_39_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31908_ _31908_/Q _32365_/CLK hold407/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_246_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23690_ _23691_/A _26694_/A _24645_/B _31573_/Q _25884_/B VGND VPWR _23689_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 Xclkbuf_opt_6_3_core_clk clkbuf_opt_6_4_core_clk/A clkbuf_opt_6_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_285_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20761__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_opt_29_0_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_157_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22641_ _22659_/A _22640_/Y _22636_/Y _22635_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__23432__A _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2296 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_2417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_2537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31839_ _31839_/Q _31871_/CLK _31839_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_5030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14440__A1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26229__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18706__A1 wire2275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19364__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22502__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23789__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24247__B _26386_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29078__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25360_ _31275_/Q _25413_/A _25360_/X _25360_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_39_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22572_ VGND VPWR wire3702/X _30347_/Q _22578_/S _22572_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__20513__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16717__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20267__S _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14991__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18182__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24311_ VGND VPWR _30960_/D _25087_/B _31193_/Q _24311_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_277_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_5058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21523_ _21619_/B _21549_/B _30468_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_52_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25988__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25291_ _25291_/X _25380_/C _31261_/Q _25414_/B1 _31360_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__16193__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17390__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_4969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30055__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27030_ _31995_/D hold500/A _27029_/Y _27035_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_222_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23578__S _23588_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24242_ VGND VPWR _24242_/S _30918_/Q _27710_/A1 _30918_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_5214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21454_ _21454_/X _21462_/B _21812_/C _29733_/Q _21464_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__14743__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19667__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31300__CLK _32580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32426__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM128_Di0[2] wire2325/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20405_ VGND VPWR _20408_/S _27697_/A1 _28927_/Q _28927_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_3093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19357__A _19357_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3661_A _30455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24173_ _20061_/B _28705_/Q _24173_/X _19710_/B _28513_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__16480__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21385_ _21679_/B _21599_/A _21390_/C _21649_/D _21649_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA__24007__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25204__A1 hold104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_3979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26401__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21098__S _21098_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22018__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23124_ _30172_/D _23185_/B _23123_/X hold368/A wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__25793__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3919 _21769_/A _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17693__A1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20336_ VGND VPWR _20338_/S _27143_/A1 _28876_/Q _28876_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28915__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18890__B1 wire1931/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28981_ _28981_/Q _32432_/CLK _28981_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_115_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout977_A wire981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23055_ _23049_/A _23055_/X _23050_/X _23054_/X hold273/A _30088_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_27932_ _27932_/Q _30475_/CLK _27932_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31450__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_4_12_0_core_clk clkbuf_5_25_0_core_clk/A clkbuf_3_6_2_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xclkbuf_3_1_2_core_clk clkbuf_4_3_0_core_clk/A clkbuf_3_1_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_20267_ VGND VPWR _20290_/S _27140_/A1 _28809_/Q _28809_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3926_A _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32576__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27293__B _27404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19434__A2 wire2952/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18237__A3 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25806__B _32545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23230__A3 _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17445__A1 _30958_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22006_ _22063_/A _22005_/Y _22003_/X _21708_/Y _22006_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_270_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput103 VGND VPWR _30682_/D la_input[37] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_115_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23607__A _32580_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27863_ _27863_/Q _28216_/CLK _27863_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xinput114 VGND VPWR _30662_/D la_input[47] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_170_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20730__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19985__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20198_ VGND VPWR _20202_/S _28743_/Q wire2012/X _28743_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_5067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_2281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput125 la_input[57] _30642_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_79_3037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1886_A _18707_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput136 VGND VPWR _30622_/D la_input[67] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_2_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29602_ _29602_/Q _32280_/CLK _29602_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_196_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26814_ _26913_/A _26813_/X _26835_/A _31857_/Q _31857_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xinput147 VGND VPWR _30602_/D la_input[77] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_148_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25912__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput158 VGND VPWR _30582_/D la_input[87] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_213_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18200__S _18309_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26180__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27794_ VGND VPWR _27801_/S _25023_/B _32517_/Q _32517_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2058_A wire2059/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput169 VGND VPWR _30562_/D la_input[97] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_261_4208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_4377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24191__A1 _28515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_2358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29533_ _29533_/Q _31959_/CLK _29533_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27513__S _27513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20669__C _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24191__B2 _28611_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26745_ _26744_/Y _26950_/C _31825_/Q _26754_/B _31825_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_23957_ _23957_/X _24186_/A3 _19928_/B _28620_/Q wire3513/X _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_246_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20201__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26468__B1 _17481_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_901 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26637__B _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input210_A ser_rx VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22908_ VGND VPWR _22921_/B _30478_/Q _22935_/A wire3133/X _22905_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_912 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29464_ _29464_/Q _32114_/CLK _29464_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_148_2751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14690_ _14919_/C1 _14680_/X _15612_/B _14690_/Y _14689_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 X_26676_ _26676_/Y _31793_/Q _26676_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_923 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20752__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24479__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16956__B1 _29100_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23888_ _30855_/D _23883_/X _23886_/X _24199_/B1 _23887_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_261_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_934 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_945 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3361_A wire3362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28415_ _28415_/Q _32359_/CLK _28415_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16420__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25140__B1 _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23342__A _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_956 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25627_ _25627_/X _25582_/X hold123/A hold102/A _24493_/X VGND VPWR _25626_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_207_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22839_ _22820_/C _22924_/B _30471_/Q _22839_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_35_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29395_ _29395_/Q _30233_/CLK _29395_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_967 _20100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_978 _29844_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23151__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_989 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23699__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16360_ VGND VPWR _16360_/X _16359_/X _16358_/X _16838_/A1 _16834_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XPHY_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25968__S wire754/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28346_ _28346_/Q _29389_/CLK _28346_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23061__B _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20504__A1 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25558_ VGND VPWR _25564_/S _31357_/Q _31358_/Q _31357_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16708__B1 wire894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_235_core_clk _31317_/CLK clkbuf_opt_33_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14982__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_1999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21701__B1 _22733_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_1958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18155__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15311_ VGND VPWR _15716_/S _29538_/Q _29572_/Q _15311_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_142_2361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24509_ _31289_/Q _24533_/A _31287_/Q _31288_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__28445__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16291_ _16291_/Y wire1058/A _16284_/X _16286_/X wire923/A _16290_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_1 X_28277_ _28277_/Q _28402_/CLK _28277_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25489_ _25507_/D _25447_/A _25488_/X _19493_/Y _31324_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_279_2150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17381__B1 input184/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25443__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_2397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18030_ VGND VPWR _18037_/S wire3881/X _27962_/Q _27962_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20038__C_N _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23488__S _23516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15242_ _16959_/A2 wire3302/X _32127_/Q _15242_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27228_ _27276_/C _25775_/X _32106_/D _27227_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_159_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25269__A _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15931__A1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14734__A2 wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23454__B1 _29379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22392__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25994__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20905__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30548__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15173_ VGND VPWR _15173_/X _15172_/X _15171_/X _15640_/A1 _15509_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_68_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27159_ VGND VPWR _27167_/S _27702_/A1 _32065_/Q _32065_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30325__D _30325_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17133__B1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_31_0_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3601_A _19573_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2859_A _21204_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19673__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28595__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22009__A1 hold255/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14124_ input2/X _32108_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_275_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16487__A2 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30170_ _30170_/Q _30433_/CLK _30170_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18881__B1 _19069_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19981_ VGND VPWR wire1319/A wire2308/X _24945_/B _19981_/X _26153_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__26943__A1 _31967_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25746__A2 _31365_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output262_A _13778_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29840__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14498__A1 _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26943__B2 _26943_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15695__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17909__A_N _17891_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18932_ _28123_/Q _18932_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14055_ _31751_/Q _17507_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_64_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14204__A _14204_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30698__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16239__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_5547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17436__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26156__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17436__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18863_ VGND VPWR _18863_/X _19311_/B wire1939/A _27896_/Q _18862_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_168_3806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20640__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31943__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19714__B _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20440__A0 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15447__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23509__A1 wire4148/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26744__A_N _31787_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16644__C1 wire923/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21783__A3 hold158/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17814_ _17814_/X _17596_/D _31733_/Q _17490_/B _17807_/X _17813_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_3_2429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1060_A wire1060/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29990__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18110__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23236__B _23236_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26171__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18794_ _18794_/X _27957_/Q _18983_/S wire1996/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_266_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19189__A1 _28394_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_2739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27423__S _27423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24182__B2 wire3641/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17745_ _17745_/X _17596_/D _31727_/Q _17586_/A _17739_/X _17744_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_166_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14957_ _16840_/A2 wire3298/X _28815_/Q _14957_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_21_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_79_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14670__A1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22193__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18936__A1 _28382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17739__A2 _17565_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_5449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26625__B1_N _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19730__A _27664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13908_ _28589_/Q _13908_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_17676_ _17676_/X _17852_/A _17490_/B _31721_/Q _17596_/D _17852_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__20743__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16947__B1 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14888_ VGND VPWR _14888_/X _14885_/X _14887_/X _15630_/A1 wire1202/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_4163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22567__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29220__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16411__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19415_ VGND VPWR _19415_/S _27706_/A1 _28431_/Q _28431_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25131__B1 _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16627_ _16627_/X _16947_/A2 _16626_/X _29187_/Q _16928_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__14958__C1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_0 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13839_ _29831_/Q _22221_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_225_2447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_1882 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24485__A2 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19346__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30078__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_5203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17250__A _30959_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31624_ _31624_/Q _31730_/CLK _31624_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19346_ _19346_/X _19346_/D1 _28303_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__21299__A2 _21288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22496__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16558_ _16558_/X _29185_/Q _16818_/A2 _16841_/B2 _16841_/C1 _16557_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_125_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23693__B1 wire1288/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31323__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32449__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18164__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19361__A1 _28402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15509_ _15509_/X _15506_/X wire1093/A _15509_/A1 _15508_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__16175__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31555_ VGND VPWR _31555_/D _32115_/CLK _31555_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_12_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19277_ VGND VPWR _19335_/B _28204_/Q _28236_/Q _19277_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19900__A3 _20100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29370__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18780__S _18790_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16489_ VGND VPWR _16837_/S _29226_/Q _29290_/Q _16489_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_24 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25434__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30506_ _30506_/Q _32355_/CLK _30506_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18228_ VGND VPWR _18309_/S _28090_/Q _27688_/A1 _28090_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_5523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire778_A wire778/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15922__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14725__A2 _14884_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28938__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19649__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31486_ _31486_/Q _31869_/CLK _31486_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20815__S _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25985__A2 _14213_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20259__A0 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_25_2_core_clk_A clkbuf_opt_25_2_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19113__B2 wire1942/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23996__A1 _28496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30437_ VGND VPWR _30437_/D _31955_/CLK hold364/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18159_ _18201_/A _18254_/S _18244_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 XFILLER_86_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27187__A1 _27185_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31473__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_3091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold302 hold302/A hold302/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_271_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold313 hold313/A hold313/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xhold324 hold324/A hold324/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17675__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16478__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25198__B1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21170_ VGND VPWR _21172_/S _29613_/Q _21203_/A0 _29613_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_119_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold335 hold335/A hold335/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30368_ _30368_/Q _30454_/CLK _30368_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_119_2341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold346 hold346/A hold346/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26934__B2 wire2700/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20116__A _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24811__A _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3824 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold357 hold357/A hold357/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27825__C _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14489__B2 _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_1831 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_2243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21208__C1 _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27962__CLK _31158_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold368 hold368/A hold368/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20121_ _27003_/B1 _20120_/Y _20124_/A _28706_/Q _28706_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32107_ VGND VPWR _32107_/D _32107_/CLK _32107_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_60_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_39_core_clk _32540_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xhold379 hold379/A hold379/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30299_ _30299_/Q _32108_/CLK _30299_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14114__A _21428_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3075_A _18012_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3632 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_4618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_5077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout815 _26684_/A2 _26662_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xwire2609 VPWR VGND wire2609/X _14260_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18624__A0 _28338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17427__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20052_ VGND VPWR _19628_/B _19628_/A wire847/X _20052_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_112_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32038_ _32038_/Q _32038_/CLK _32038_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17427__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23427__A _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19967__A3 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20550__S _20550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19624__B _19624_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout848 wire851/A _20028_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20431__A0 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25345__C _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout859 VPWR VGND _19925_/A2 wire860/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_3064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15644__S _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13953__A _28544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3242_A wire3243/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24860_ _31075_/D _24859_/Y wire2253/X _24470_/C _26539_/B wire863/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__26162__A2 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28318__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1000_A _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15989__B2 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24173__A1 _28513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23811_ VGND VPWR _23811_/X _31880_/Q _24317_/A _24317_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_145_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27333__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24173__B2 _28705_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16650__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15453__A3 _15435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25642__A _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19719__A3 _26838_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_5062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24791_ _24791_/Y _24716_/Y _31049_/Q _24787_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XANTENNA__24712__A3 _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_2910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14661__A1 _28406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22184__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_3373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22723__A2 wire3133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26530_ _26530_/B _26522_/X _26530_/A _26531_/C _26530_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__19640__A _20060_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_208 _29863_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23920__B2 _28553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23742_ _23744_/D _23742_/Y _31766_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__27111__A1 _26829_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25361__B _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20954_ VGND VPWR _20964_/S _30160_/Q _29419_/Q _29419_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_219 _31964_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20734__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_5426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1561_A _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16402__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15205__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14949__C1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26461_ _26461_/X _26460_/X _26435_/B _17490_/B _27230_/C _26459_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__28468__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23673_ _23673_/X _24889_/A1 _23873_/D _24618_/B wire2611/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_17_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20885_ VGND VPWR _23477_/S _20884_/X _29371_/Q _29371_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14413__A1 _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24476__A2 wire1326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23133__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15610__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28200_ _28200_/Q _30378_/CLK _28200_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29713__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1467_A wire1469/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16953__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25412_ _25413_/C _31286_/Q _25412_/C _31285_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_52_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22624_ VPWR VGND _22624_/X _29874_/Q _29724_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__25788__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22487__A1 _17136_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29180_ _29180_/Q _32420_/CLK _29180_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26392_ _26184_/A _26391_/Y _26386_/X _31683_/Q _31683_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14964__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23684__B1 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold136_A hold136/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20498__A0 _29016_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28131_ _28131_/Q _30270_/CLK _28131_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_104_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_2271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_1999 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25343_ _31271_/D _25341_/X _26244_/A _25340_/X _25342_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__16166__A1 _28951_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22555_ _30052_/D _22552_/X _23354_/C _22554_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_238_4733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_2526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17363__B1 _17363_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18560__C1 _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31816__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_4305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21506_ _21628_/D _21628_/C _21506_/Y _21506_/D _21506_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__22239__A1 _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28062_ _28062_/Q _30424_/CLK _28062_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_87_2616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25274_ _25274_/C _25274_/Y _25408_/B _25274_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__14716__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15913__A1 _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22486_ VGND VPWR _22512_/A3 _22510_/A4 _22512_/A2 _22486_/X _30004_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_198_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20725__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_2_2_1_core_clk clkbuf_3_5_0_core_clk/A clkbuf_2_2_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__19104__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29863__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_5607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27013_ _31988_/D _31988_/Q _27012_/Y _27009_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__18703__B _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23987__A1 wire3511/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21410__A _21410_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24225_ VGND VPWR _24242_/S _30901_/Q _27693_/A1 _30901_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23987__B2 wire1314/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21437_ _29884_/Q _21437_/A _21449_/B _21447_/B _21437_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_156_3743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17115__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19655__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19518__C _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_4906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM256_Di0[10] _14186_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25189__B1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16469__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17666__A1 _31712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24156_ _31181_/Q _24957_/B _24155_/X _31149_/Q _24156_/X _25022_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__27508__S _27515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18863__B1 wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2089 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26925__A1 _31949_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21368_ _21365_/Y _21741_/A _21366_/Y _21367_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 Xfanout3716 VPWR VGND _21173_/B _20453_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30840__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22940__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31966__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26925__B2 wire2371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24721__A _31570_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_2384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3738 VPWR VGND _23043_/B _30224_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23739__A1 wire3454/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20670__B1 _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23107_ hold223/A _23157_/A2 _23107_/X _30099_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xwire3800 VPWR VGND _21506_/D wire3800/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_150_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3749 VPWR VGND _22820_/C _22924_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20319_ VGND VPWR _20322_/S _27702_/A1 _28860_/Q _28860_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_43_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input160_A la_input[89] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15141__A2 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28964_ _28964_/Q _32321_/CLK _28964_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24087_ _25980_/A2 _28601_/Q _24087_/X _24139_/A2 _28473_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_172_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3822 VPWR VGND wire3822/X _29869_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14024__A _28473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21299_ _30361_/Q _21288_/B _21549_/B _30476_/Q _21300_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_24_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3833 VPWR VGND _18217_/B wire3834/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_3417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3844 VPWR VGND wire3844/X wire3845/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_215_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23038_ VGND VPWR _31396_/Q _23037_/X _23034_/X _23038_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22411__A1 _29967_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27915_ _27915_/Q _30027_/CLK _27915_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3855 VPWR VGND wire3855/X _29858_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_41_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20460__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3866 VPWR VGND wire3866/X _29855_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19534__B _19534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19812__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4851 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28895_ _28895_/Q _32327_/CLK _28895_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22241__A _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3877 VPWR VGND wire3877/X wire3878/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20422__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_5_1_0_core_clk clkbuf_5_1_1_core_clk/A clkbuf_5_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xwire3888 wire3888/X wire3889/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__16626__C1 wire1450/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13863__A _28634_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18091__A1 wire3903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3899 wire3899/X wire3901/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_277_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30990__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15860_ _15860_/X _29554_/Q _16448_/A2 _16150_/A3 wire933/A _15859_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire2342_A wire2343/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27846_ _25808_/C _27846_/B _32546_/D _27854_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_150_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_3427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_4895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29243__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24164__A1 _31118_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14811_ wire3249/X wire1727/X _14811_/X _14887_/A2 _29107_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_79_2144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27243__S _27255_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24164__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16641__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15444__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17054__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27777_ VGND VPWR _27783_/S _25025_/B _32502_/Q _32502_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25900__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15791_ _15789_/X _15791_/Y _15771_/A _30444_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 X_24989_ _25776_/C _24988_/X _25017_/A2 _31138_/Q _31138_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22175__B1 _22174_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22714__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23911__A1 _30685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14397__C _14397_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17530_ _17602_/S _17563_/B _17530_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 X_29516_ VGND VPWR _29516_/D _30474_/CLK _29516_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19550__A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23911__B2 _30749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14742_ _16081_/A2 _14883_/A1 _32345_/Q _14742_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_280_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26728_ _26728_/Y _31779_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__20186__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30220__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20725__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31346__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21922__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_720 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_1194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_731 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_2051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_742 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17461_ _17460_/X _17457_/X _31681_/Q _17552_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_35_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29447_ _29447_/Q _30412_/CLK _29447_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_4175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14673_ VGND VPWR _14935_/S _29210_/Q _29274_/Q _14673_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_53_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26659_ _26637_/B _31788_/D _26657_/X _26218_/A _31893_/Q _26658_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_753 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29393__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18166__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_764 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15601__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19200_ _28232_/Q _19200_/X _19200_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_196_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19700__D _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_775 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16412_ _16412_/X _28925_/Q _16964_/A2 _16920_/A3 _16843_/A2 _16411_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_126_3580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17070__A _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_786 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22478__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22022__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17392_ wire3564/X _31923_/Q _17392_/X _17447_/A1 input187/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA_797 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29378_ _29378_/Q _31933_/CLK _29378_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_239_4519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17501__C _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19131_ wire1905/X _19131_/Y _19130_/X _19128_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_16_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16343_ VGND VPWR _16842_/S _29470_/Q _32124_/Q _16343_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22119__C _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28329_ _28329_/Q _29550_/CLK _28329_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30370__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31496__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17354__B1 hold49/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19894__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19062_ _19062_/X _19061_/X _19060_/X _19177_/B1 _19058_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 X_31340_ _31340_/Q _32583_/CLK _31340_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_224_1790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16274_ _16274_/X _29050_/Q _16818_/A2 _16841_/B2 _16843_/A2 _16273_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_256_4877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26533__D _26533_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20635__S _20639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_4156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18013_ VGND VPWR _18017_/S wire3827/X _27947_/Q _27947_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23978__A1 _31132_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21320__A _21320_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15225_ _15224_/X _15222_/X _15611_/A1 _15226_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_83_3715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15729__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27985__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17106__A0 _30389_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31271_ _31271_/Q _32294_/CLK _31271_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_275_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4092_A wire4093/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[23] wire2714/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18105__S _18119_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27169__B2 wire2406/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput407 _13794_/Y la_oenb[29] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29844__D _29844_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30222_ _30222_/Q _31971_/CLK _30222_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17657__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15117__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15156_ wire3251/X wire1733/X _15156_/X _15609_/B1 _29180_/Q _14544_/D VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__27418__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput418 _13877_/Y la_oenb[39] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21453__A2 _21548_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17657__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18854__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26916__A1 _31940_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput429 wire3366/X la_oenb[49] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_275_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output644_A _17898_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26916__B2 _26916_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_4_8_0_core_clk_A clkbuf_4_9_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14107_ _21462_/A _21463_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__20661__B1 _25752_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17944__S _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30153_ _30153_/Q _32548_/CLK _30153_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_133_4274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19964_ _19963_/X _28630_/Q _28630_/D _19968_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15087_ _15082_/X wire1069/X wire1085/X _15086_/X _15087_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_7_3041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1275_A _23772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26392__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18606__A0 _28320_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17409__A1 wire3564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22402__A1 _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18915_ _19358_/A2 _27867_/Q wire1939/A _18915_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14038_ _28459_/Q _14038_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_228_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17409__B2 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19949__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30084_ hold112/A _32294_/CLK _30084_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_4505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19444__B _28442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19895_ _19894_/X _28597_/Q _28597_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_27_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14891__A1 _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16617__C1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15464__S _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14891__B2 _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13773__A _31173_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21756__A3 _21708_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18082__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32121__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17245__A _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1442_A wire1443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18846_ _18845_/X _19367_/B1 _19380_/A2 _27959_/Q _18846_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_79_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27341__A1 _32197_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26144__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16093__B1 _16151_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24155__A1 _28671_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27153__S _27153_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25352__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16632__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_3210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22166__A0 _30389_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18777_ VGND VPWR _18777_/X _19306_/B _19318_/B1 _28052_/Q _18776_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_222_5213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15989_ _16563_/A2 _15989_/X _15988_/X _16120_/S _28842_/Q _16448_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_184_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14643__A1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_4094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28610__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15840__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23902__A1 _28519_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29736__CLK _30262_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23902__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19031__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17728_ _17728_/X _17777_/B _17863_/B _17685_/A _17553_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_33_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25181__B _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22297__S _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_157_core_clk _32014_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17899__B _31023_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30986_ _30986_/Q _32036_/CLK _30986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_3557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21913__B1 _21561_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19582__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32271__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25104__B1 _31194_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16396__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15199__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17659_ VGND VPWR _17730_/S _17658_/X _17647_/Y _17659_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14321__C_N _30335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20192__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30713__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_4245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31839__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23666__A0 _30796_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20670_ _29198_/D _20662_/X _20667_/X _20680_/C _20668_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XANTENNA__21214__B _22553_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28760__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29886__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19329_ _19328_/X wire1924/A _22086_/B1 _28206_/Q _19329_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 X_31607_ _31607_/Q _31607_/CLK _31607_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_144_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_2608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16148__A1 _32422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_1869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16148__B2 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17345__B1 wire3191/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25407__A1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3808 VPWR VGND _18499_/A1 _18532_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14109__A _30467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19885__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3819 VPWR VGND _18623_/A1 _29870_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22484__A4 _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23681__A3 wire1876/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24525__B _31293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22340_ _22384_/B _22340_/Y _22340_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_86_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31538_ _31538_/Q _31547_/CLK _31538_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_12_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_1918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21692__A2 _21628_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25958__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20545__S _20545_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31989__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26080__A1 _24380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4939 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_4666 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23969__A1 wire4084/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29116__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15639__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24244__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13948__A _28549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23969__B2 _31163_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19098__B1 _19097_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22271_ _29839_/Q _21032_/B _22271_/Y _22263_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_251_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3192_A wire3192/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15371__A2 _15759_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31469_ VGND VPWR _31469_/D _31522_/CLK _31469_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__24091__B1 _24089_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18015__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15866__C wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24630__A2 _19860_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24010_ _24010_/X _24192_/A2 _31135_/Q wire1283/A _28721_/Q wire1633/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__26740__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21222_ VGND VPWR _29687_/D _21222_/B _23354_/C _23355_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__29754__D _29790_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold110 hold110/A hold110/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15108__C1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27328__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_77 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold121 VPWR VGND hold121/X hold121/A VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__26907__A1 _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20101__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold132 hold132/A hold132/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_273_1839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold143 hold143/A hold143/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17112__A3 _17110_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31219__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold154 hold154/A hold154/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20652__B1 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24918__B1 _24917_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21153_ VGND VPWR _21168_/S _29596_/Q _21153_/A0 _29596_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_2373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3107 VPWR VGND _22338_/B _14365_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19635__A _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold165 hold165/A hold165/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16320__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3118 VPWR VGND _23563_/B _14284_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27580__A1 _27579_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold176 hold176/A hold176/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26383__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25040__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28140__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold187 hold187/A hold187/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__29266__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24260__B _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27274__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16978__B _20958_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold198 hold198/A hold198/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20104_ wire882/X _20061_/B _20104_/X _20104_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_core.RAM256_A0[3] wire2422/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2406 _20657_/C wire2406/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_64_2980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22699__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20280__S _20284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21084_ VGND VPWR _21090_/S _27696_/A1 _29535_/Q _29535_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25961_ _25960_/X _26173_/B1 _31502_/Q _25935_/X _31494_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2417 wire2418/X wire2417/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_115_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_5162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2428 wire2429/X wire2428/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15374__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1705 wire1705/X wire1707/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_27700_ VGND VPWR _27700_/S _27700_/A1 _32434_/Q _32434_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_99_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21747__A3 hold160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18073__A1 wire3849/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24912_ _25652_/A _24911_/Y _24941_/A _31100_/Q _31100_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20035_ _25676_/B1 _20034_/Y wire847/A _28664_/Q _28664_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_210_2524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28680_ _28680_/Q _31575_/CLK _28680_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19270__B1 _19268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3624_A wire3625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25892_ _25718_/A _25891_/Y _25911_/B1 _31463_/Q _31463_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire1727 VPWR VGND wire1727/X _15770_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20955__A1 _30161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30243__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1738 VPWR VGND _18661_/A _15765_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_214_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31369__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24146__A1 _28670_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23591__S _23595_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17281__C1 _17280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27631_ VGND VPWR _27636_/S _24958_/B _32373_/Q _32373_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24146__B2 _31180_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25343__B1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24843_ wire868/X _31066_/Q _24843_/Y _24458_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_54_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28290__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_2756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout842_A _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_4186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25894__A1 _31464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1584_A wire1587/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15831__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_4036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27562_ _27562_/A _27562_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_210_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20168__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24774_ _24775_/C _24770_/X _24769_/Y _24767_/Y _24773_/Y _24772_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__27858__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold253_A hold253/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_3436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21986_ VGND VPWR _17174_/X _22065_/B1 _22075_/A2 _21986_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_110_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19801__C _26781_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29301_ _29301_/Q _32569_/CLK _29301_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_205_4754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26513_ _26514_/A _26530_/C _31759_/Q _31758_/Q _26530_/B VGND VPWR _26512_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_265_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26438__A3 _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21405__A _30347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23725_ _19926_/B _23724_/X _31472_/Q wire1875/X wire767/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_226_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_5234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20937_ VGND VPWR _20947_/S _29402_/Q _29505_/Q _29402_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_93_2664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30393__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3993_A _29365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27493_ VGND VPWR _27503_/S _27686_/A1 _32308_/Q _32308_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_4833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2907 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25646__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23106__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3089 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_5190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29232_ _29232_/Q _32438_/CLK _29232_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_2475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_3490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26444_ VGND VPWR _26446_/C _26464_/C _31614_/Q _31700_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_hold420_A hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23656_ VGND VPWR _23669_/S _27694_/A1 _30786_/Q _30786_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15595__C1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14937__A2 _14932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20868_ VGND VPWR _20868_/S _30232_/Q _29394_/Q _20868_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_145_2787 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24716__A _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23121__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22607_ VGND VPWR _22616_/S hold125/A _22606_/X _30080_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29163_ _29163_/Q _31927_/CLK _29163_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_141_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26375_ _26374_/X _31675_/Q _31675_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_123_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27399__A1 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21132__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23587_ VGND VPWR _23595_/S _23663_/A1 _30507_/Q _30507_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17336__B1 _17336_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20799_ VGND VPWR _20809_/S _29312_/Q wire1682/X _29312_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14019__A _28478_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19876__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28114_ _28114_/Q _30403_/CLK _28114_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25326_ _25344_/D _25326_/Y _25408_/B _25326_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_278_1717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22538_ VGND VPWR _22551_/S _29827_/Q _30038_/Q _30038_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_156_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21683__A2 _21661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29094_ _29094_/Q _32359_/CLK _29094_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_2120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20455__S _20473_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25949__A2 _31496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22880__B2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21778__C _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15898__A0 _29274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26071__A1 _31538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22236__A _22236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21140__A _24210_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20682__C _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28045_ _28045_/Q _30482_/CLK _28045_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13858__A _28639_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25257_ _25257_/X _25263_/B1 _29869_/D hold136/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 X_22469_ _30332_/D _22468_/X _22513_/A2 _17063_/X _29995_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_4179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21497__D _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15010_ wire3258/A _15010_/A2 _15010_/X _15350_/B1 _28920_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_6_669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24208_ VGND VPWR _23879_/A _23879_/B _24205_/X _24208_/X _24207_/X _23879_/C VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_251_4752 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_5448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27238__S _27238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29609__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18836__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25188_ _25416_/B _31042_/Q _25188_/X _25430_/B _25186_/X _25430_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_input69_A la_input[121] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3524 _31047_/Q _26245_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24909__B1 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32144__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24139_ _25980_/A2 _28606_/Q _24139_/X _24139_/A2 _28478_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_191_2763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16311__A1 wire3243/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25177__A3 _25180_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26374__A2 _26876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_7_6_core_clk clkbuf_opt_7_7_core_clk/A clkbuf_opt_7_6_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_29996_ _29996_/Q _30483_/CLK _29996_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3557 VPWR VGND wire3558/A _30994_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_43_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3630 VPWR VGND wire3630/X _30750_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_43_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2834 VPWR VGND _23301_/S _23269_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3641 VPWR VGND wire3641/X _30697_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16862__A2 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16961_ VGND VPWR _16961_/S _32332_/Q _28940_/Q _16961_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28947_ _28947_/Q _31945_/CLK _28947_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_232_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_3281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22396__B1 _22395_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14873__A1 _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28633__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3674 VPWR VGND _20912_/B _30434_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_18700_ VGND VPWR _18700_/X wire1963/A _18824_/B1 _28308_/Q _18699_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xfanout2878 _20756_/X _20772_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14873__B2 _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18064__A1 wire3882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21738__A3 _16999_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29759__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15912_ VGND VPWR _15912_/X _16249_/S _16151_/A1 _15911_/X _15910_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_fanout3599_A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3685 VPWR VGND _29943_/D hold245/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_270_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19261__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27323__A1 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2724_A wire2725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19680_ _19680_/B _19680_/A _19680_/Y _26015_/B _26017_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 Xwire2951 VPWR VGND _20292_/S _20291_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3696 VPWR VGND _22599_/C _30344_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_2801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_2535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28878_ _28878_/Q _32358_/CLK _28878_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_280_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16892_ _16891_/X _16928_/B1 _16911_/A2 _32330_/Q _16892_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_210_3770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19800__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16075__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24137__A1 wire4113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32294__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2984 VPWR VGND _18531_/S _18507_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24137__B2 _28733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17811__A1 _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18631_ VGND VPWR _18631_/S wire3898/X _28344_/Q _28344_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16614__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15843_ VGND VPWR wire969/X _32043_/Q _29102_/Q _15843_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27829_ _27830_/A _32538_/Q _27844_/C _32537_/Q _25801_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_267_2845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26809__C _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18595__S _18624_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_3871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output225_A wire3502/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22148__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25885__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30736__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19013__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18562_ hold377/A _18549_/Y _18562_/A _18562_/X _30450_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_30840_ _30840_/Q _32568_/CLK _30840_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_5009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15774_ _14442_/B _22078_/A _14544_/B wire1698/X _15774_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_167_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_250_core_clk _31927_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_2_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23896__B1 wire1289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28783__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19564__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_2299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17513_ _31746_/Q _26510_/A _31745_/Q _17512_/X _13739_/Y _26543_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__23006__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14725_ _14724_/X wire1104/X _14884_/A2 _28945_/Q _14725_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27701__S _27701_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21315__A _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16378__A1 _16415_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30771_ _30771_/Q _30865_/CLK _30771_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18493_ VGND VPWR _18497_/S wire3831/X _28266_/Q _28266_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20174__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25637__A1 _31391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_550 _30648_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21283__B_N hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2231 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_561 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32510_ _32510_/Q _32545_/CLK _32510_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26825__B _26890_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_572 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17444_ _29871_/D _17245_/X _32275_/Q _17443_/X _14399_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_204_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14656_ _14655_/X _14823_/A1 _14817_/A2 _28775_/Q _14656_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_37_2879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_583 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25101__A3 _25962_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30886__CLK _31722_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15050__A1 _15611_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_594 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output594_A _28695_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19316__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24626__A _24626_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23112__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28013__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29139__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17939__S _17939_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32441_ _32441_/Q _32441_/CLK _32441_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_15_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17375_ _17432_/B2 hold60/X _17373_/X _17447_/B2 _17375_/X input183/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__32265__D _32265_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21123__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17327__B1 _17323_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14587_ VGND VPWR _14818_/S _29303_/Q _28741_/Q _14587_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmgmt_core_wrapper_4211 flash_io2_do mgmt_core_wrapper_4211/HI VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 XFILLER_200_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19867__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22466__A4 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24860__A2 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19114_ VGND VPWR _19156_/S _19113_/X _19109_/X _19114_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17878__A1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16326_ wire3243/X _16910_/A2 _16326_/X _16934_/A2 _29083_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_83_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15338__C1 _15319_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32372_ _32372_/Q _32372_/CLK _32372_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_179_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15889__B1 _29167_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30116__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31323_ _31323_/Q _31363_/CLK _31323_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_135_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19045_ _19045_/X _19335_/B _28257_/Q _28324_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__13768__A _31178_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16257_ VGND VPWR _16837_/S _32425_/Q _32353_/Q _16257_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_44_4208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24073__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19619__A2 wire2721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2232_A _19656_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28163__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29289__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15208_ VGND VPWR _15516_/S _29022_/Q _28990_/Q _15208_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27148__S _27155_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22623__A1 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31254_ hold93/A _32296_/CLK _31254_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_83_3556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22580__S _22580_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16188_ VGND VPWR _16188_/X _16187_/X _16186_/X _16720_/C1 wire1055/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_48_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_2095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23820__B1 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_3285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput226 wire3505/X gpio_out_pad VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_61_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput237 _14034_/Y la_iena[106] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30205_ _30205_/Q _30474_/CLK _30205_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21977__A3 hold428/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15139_ _15138_/X _15610_/B1 _15597_/A2 _30500_/Q _15139_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_155_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput248 _14024_/Y la_iena[116] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16302__A1 _16282_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31185_ VGND VPWR _31185_/D _31436_/CLK _31185_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_135_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26365__A2 wire781/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25168__A3 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput259 _14014_/Y la_iena[126] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30266__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23179__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21196__S _21205_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25573__B1 wire2814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30136_ _30136_/Q _30471_/CLK _30136_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16853__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31511__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19947_ _25041_/A wire1316/X _19947_/X _25041_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__26770__C1 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22387__B1 wire3412/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14864__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_2609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18055__A1 wire3917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26117__A2 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30067_ hold140/A _31998_/CLK _30067_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19252__B1 _19336_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19878_ VGND VPWR wire2213/X _26838_/A4 _24046_/B1 _19878_/X _26139_/A _19680_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 Xclkbuf_leaf_338_core_clk _30455_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_114_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17406__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire810_A wire810/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24128__A1 _24122_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17802__A1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16605__A2 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18829_ wire1405/X _28377_/Q _18828_/X _28377_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_227_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22139__B1 _22138_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14616__A1 _28774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25876__A1 _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2866_A wire2869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_5644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31661__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19004__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21840_ hold465/A _21817_/S _29786_/D _21839_/X _21838_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_129_2716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_2142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_3002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23887__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_4329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25342__D _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23351__A2 _23350_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27611__S _27614_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16369__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21771_ VGND VPWR _21770_/X _21999_/S1 _21746_/X _21771_/X wire3991/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_107_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30969_ _30969_/Q _32063_/CLK _30969_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17566__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25089__C1 _25160_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25628__A1 _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23510_ VGND VPWR _23516_/S _23509_/X _31959_/Q _30441_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15223__A _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20722_ VGND VPWR _20722_/S _29238_/Q _27265_/A0 _29238_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20486__D _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23639__B1 _24480_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24490_ _24543_/A _25197_/C _25197_/A _24490_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_179_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32017__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15041__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23440__A _29831_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23441_ _29831_/Q _23441_/X _29373_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XPHY_1318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20653_ _20653_/X wire1330/X _31190_/Q wire3622/X wire1371/X VGND VPWR _20652_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_33_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22311__A0 _29156_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21114__A1 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17318__B1 _17332_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18534__A _29652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1165_A wire1172/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24851__A2 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24255__B _31756_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_1275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17869__A1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26160_ VGND VPWR _26019_/A _19581_/X _26159_/X _31569_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__28506__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23372_ VGND VPWR _23372_/S _30350_/Q hold168/X _30350_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17869__B2 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22862__A1 _29897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20275__S _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20584_ VGND VPWR _20584_/S _27710_/A1 _29100_/Q _29100_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_49_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27250__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26053__A1 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2904 VPWR VGND _20581_/S _20576_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_179_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20873__A0 _29365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_4616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26053__B2 _24381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25111_ _25111_/X _31195_/Q _31196_/Q _25149_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_max_length1524_A _15577_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2915 VPWR VGND _20485_/S _20484_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_27_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15369__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22323_ _29910_/D _22322_/X wire3803/A _23228_/S _23231_/A _20982_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_101_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31041__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2926 VPWR VGND _20418_/S _20407_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_leaf_54_core_clk _32390_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_26091_ _26089_/X _14399_/B _26085_/Y _14065_/Y _26091_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__32167__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24064__B1 wire739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15344__A2 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16541__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3574_A _30870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25261__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25800__A1 _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26470__B _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2959 VPWR VGND _18646_/S _18649_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25042_ _25652_/A _25041_/X _25082_/A2 _31164_/Q _31164_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_216_3423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23586__S _23596_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30609__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14552__B1 wire1489/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22254_ wire828/X _29836_/D _22252_/X _23417_/A _29836_/Q _22253_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__18818__B1 _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16829__C1 wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17584__S _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28656__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21205_ VGND VPWR _21205_/S _29647_/Q _27265_/A0 _29647_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_60_4032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_2059 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29850_ VGND VPWR _29850_/D _32568_/CLK _29850_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22090__A2 _18661_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22185_ _22185_/C _22185_/D _22207_/D _22185_/A _22185_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_5_4235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27553__A1 _32160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26356__A2 wire2208/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25013__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29901__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3839_A hold453/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_4182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25564__A0 _30759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24367__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31191__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28801_ _28801_/Q _32321_/CLK _28801_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14304__B1 _29508_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21136_ VGND VPWR _21136_/S wire1783/X _29580_/Q _29580_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_3792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16844__A2 wire1556/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_4264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29781_ hold162/A _29782_/CLK _29781_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_232_2045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_2668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2203 _19574_/X wire2203/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_43_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1407 VPWR VGND _23513_/S _23485_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23709__A4 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26993_ _31980_/Q _27001_/B _31981_/Q _27000_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 Xwire2214 VPWR VGND _25039_/B _19558_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17389__D_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1418 _18661_/X _23523_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_138_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2225 VPWR VGND _19660_/A _19550_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30759__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1429 VPWR VGND _23663_/A1 _18293_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14855__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24434__A_N _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18046__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28732_ _28732_/Q _32549_/CLK _28732_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_60_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19243__B1 _19242_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27305__A1 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21067_ VGND VPWR _21077_/S _27234_/A0 _29518_/Q _29518_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25944_ _31485_/Q _25971_/B _31486_/Q _25944_/X _31484_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_281_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14302__A _17895_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26198__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_1377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19794__A1 _28549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25316__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24119__B2 _30517_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3719 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20018_ VGND VPWR wire2668/X _26866_/A1 wire851/X _20018_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_171_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27856__A2 _25810_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23615__A _32564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28663_ _28663_/Q _32543_/CLK _28663_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25875_ VGND VPWR _31456_/D _25875_/B _25878_/A _25875_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire1557 VPWR VGND wire1557/X wire1557/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire1568 _27424_/S _27484_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_280_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15804__B1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1579 VPWR VGND wire1579/X _21731_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_76_2114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27614_ VGND VPWR _27614_/S _27614_/A1 _32356_/Q _32356_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2040_A wire2041/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24826_ VPWR VGND _31057_/D _24826_/B _26242_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_19_3211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input123_A la_input[55] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28594_ _28594_/Q _31803_/CLK _28594_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23878__B1 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2138_A _20122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22145__A3 _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28036__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20677__C _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25830__A _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27545_ _27543_/X _27594_/B _27544_/Y _27545_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_205_5296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24757_ VGND VPWR _24757_/B _24757_/Y _31447_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_249_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20156__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21969_ VGND VPWR _21499_/C _21499_/D _21674_/B _21969_/X wire3145/X _21966_/B VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22550__A0 _30050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_4453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18754__C1 _18753_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_3449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_3288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14510_ _27678_/A _14510_/B _14510_/Y _30219_/Q _14510_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_262_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29659__D _29659_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23708_ _23708_/X wire1628/X _31562_/Q _26838_/A1 _31514_/Q _19716_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__17857__A2_N _17766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15490_ _16959_/A2 wire3303/X _28765_/Q _15490_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_32_3411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27476_ VGND VPWR _27476_/S _32296_/Q _27475_/X _32296_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24688_ VPWR VGND _24689_/B _24691_/A _31471_/Q VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_197_5075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15032__A1 _15611_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_4284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25095__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26292__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24446__A _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29215_ _29215_/Q _32432_/CLK _29215_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_2136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30139__CLK _30139_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14441_ VPWR VGND _14441_/X _14544_/C _14544_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_26427_ _26427_/Y _26427_/B _31696_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_243_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23639_ _30770_/D _23635_/X _24480_/C _23638_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__17309__B1 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17986__C _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16780__B2 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28186__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3347_A _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17160_ wire3216/X _17159_/B _17160_/X _17220_/C _17159_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29146_ _29146_/Q _31910_/CLK _29146_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire810 VPWR VGND wire810/X wire810/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_14372_ _31005_/Q _24407_/C _31006_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_26358_ VGND VPWR _26949_/B _24273_/D wire2206/X _26358_/X _26999_/A _26364_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_13_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29431__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14487__A1_N _14515_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26044__A1 _31531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27241__A0 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire832 VPWR VGND wire832/X wire832/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_193_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_4090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18163__B _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16111_ VGND VPWR _16111_/X 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VPWR _14185_/Y _19503_/A _26301_/B _26289_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_6_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27792__A1 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25252__C1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30289__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout4000 _29354_/Q _21451_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_178_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23496__S _23496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16042_ _16042_/Y _16041_/X wire917/X _16032_/X _16028_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 X_28028_ _28028_/Q _29389_/CLK _28028_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_83_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14543__B1 _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire898 VPWR VGND wire898/X wire898/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_119_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18809__B1 _18808_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25277__A _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15886__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31534__CLK _31694_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23802__B1 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27195__C hold396/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25708__C _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3310 VPWR VGND _25652_/A _25776_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31429__D _31429_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3321 VPWR VGND _25904_/A _25567_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_215_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30333__D _30333_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3332 VPWR VGND _26859_/C1 _27071_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27544__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26347__A2 _26347_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2939_A _20311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3343 _26913_/A _26224_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_256_1889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19706__C _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4150 _14101_/A _28387_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23070__D_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20092__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3354 wire3362/X _26188_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_254_2292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19801_ wire881/X _19786_/B _19811_/A _19801_/X _26781_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_251_3881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4161 VPWR VGND wire4161/X _27971_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16835__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15638__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24358__B2 _31994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4172 VPWR VGND _32574_/D wire4173/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4183 VPWR VGND wire4183/X hold91/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_17993_ VGND VPWR _18017_/S wire3894/X _27927_/Q _27927_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29979_ _29979_/Q _31912_/CLK _29979_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_215_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22369__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4194 wire4195/X wire4194/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_4277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14846__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22908__A2 _30478_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18037__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19732_ _19760_/B _19973_/A1 _19732_/A _19732_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_215_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31684__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3471 wire3472/X wire3471/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_286_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19234__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16944_ wire995/X _16944_/X _16943_/X wire962/X _29036_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_250_2189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4055_A _28665_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20919__A1 wire3987/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3742 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3493 VPWR VGND wire3493/X _25341_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_59_3013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21041__A0 _29502_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18588__A2 _18585_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21744__S _21744_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25307__B1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2770 wire2771/X wire2770/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout1974 VPWR VGND wire1975/A wire1978/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_282_3819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27847__A2 _32545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31941_ _31941_/Q _31945_/CLK _31941_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19663_ _26179_/B1 _19662_/X _19695_/A2 _28492_/Q _28492_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2781 VPWR VGND wire2781/X _27678_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1985 _19203_/A2 _19201_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_187_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19722__B _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16875_ _16874_/X wire963/X wire995/X _29034_/Q _16875_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_37_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17796__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output607_A _28707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18614_ VGND VPWR _18616_/S wire3845/X _28328_/Q _28328_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16063__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15826_ _16091_/A _16091_/C _29585_/Q _15826_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_245_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31872_ _31872_/Q _31879_/CLK _31872_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19594_ _19594_/B _19594_/Y _19566_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_2 XFILLER_37_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15271__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19537__A1 _28455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27431__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18545_ _22078_/B _22078_/D _18562_/A _18545_/X _18546_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_30823_ _30823_/Q _32424_/CLK _30823_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15810__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15757_ VGND VPWR _15757_/X _15756_/X _15755_/X _15368_/S _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_283_1242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20147__A2 _19562_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22541__A0 _30041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17548__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23884__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_24_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14708_ _14708_/Y _14707_/X wire1089/X _14698_/X _14694_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XFILLER_261_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28529__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30754_ _30754_/Q _32535_/CLK input84/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18476_ VGND VPWR _18476_/S _29849_/Q _28249_/Q _28249_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1405_A wire1405/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28473__D _28473_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22575__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15688_ _15683_/X wire1068/X _15745_/A1 _15687_/X _15688_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_244_1248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15023__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24818__C1 _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_380 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25086__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26283__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2541_A _20425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_391 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18760__A2 wire1984/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17427_ _17441_/B2 _17427_/A2 _17427_/X _17432_/B2 input193/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_278_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23097__A1 hold298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31064__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14639_ VGND VPWR _14639_/X _14636_/X _14638_/X _15235_/A1 _14928_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_50_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23097__B2 _30097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30685_ _30685_/Q _32548_/CLK hold215/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_198_3459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24294__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17896__C _24389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24833__A2 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_5462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32424_ _32424_/Q _32424_/CLK _32424_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17358_ wire3574/X _30819_/Q _30836_/Q _17357_/X wire3191/X _17358_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XANTENNA__21647__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22844__A1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_2709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold77_A hk_dat_i[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26035__A1 _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20855__A0 _29356_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17315__A3 _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2806_A _27155_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28679__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16309_ VGND VPWR _16884_/S _16308_/X _16307_/X _16309_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32355_ _32355_/Q _32355_/CLK _32355_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16523__A1 wire918/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17720__A0 _17672_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15326__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24046__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1774_A _18803_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21211__C _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17289_ wire3564/X _31907_/Q _17293_/B wire3555/X _17289_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA__27386__B _27404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26586__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27783__A1 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_3156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25243__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29924__CLK _29928_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire760_A wire760/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20108__B _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31306_ _31306_/Q _31310_/CLK _31306_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_5323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3781 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19028_ _30267_/Q _19028_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__25187__A _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15877__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32286_ _32286_/Q _32291_/CLK _32286_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_66_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_3301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_1491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18276__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21804__C1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31237_ _31237_/Q _32296_/CLK _31237_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27535__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26338__A2 wire2245/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30901__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23419__B _23563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_1366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20083__A1 _28687_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24349__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21280__B1 _21279_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_4396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27606__S _27614_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31168_ _31168_/Q _32412_/CLK _31168_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17417__B _17417_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20124__A _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1680 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18028__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1105_A fanout1103/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30119_ _30119_/Q _30667_/CLK _30119_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23021__A1 _23020_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19225__B1 wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25634__B _31365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23990_ wire4124/X _20128_/B _23982_/X wire4013/X _23990_/X _24188_/A2 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__a221o_4 X_31099_ _31099_/Q _32549_/CLK _31099_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14122__A _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_172_core_clk _32552_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28648__D _28648_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27299__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_63_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28059__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27838__A2 _25804_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22941_ VGND VPWR _22954_/S _30453_/Q hold180/A _30118_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_59_4270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_101_core_clk _32395_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19632__B _20120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21583__A1 _30363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29304__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21583__B2 wire3649/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25660_ VGND VPWR _31386_/D _25660_/B _25660_/A _27281_/S VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_206_5561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22872_ VGND VPWR _22872_/X _22830_/X _22855_/A _22870_/B _22871_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__24116__A4 _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24521__A1 _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22127__A3 _22133_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24611_ _24612_/A _24611_/Y _31532_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__27341__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21823_ _21824_/B _21822_/X _21664_/X wire3145/X _21821_/X _21708_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_281_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25591_ VGND VPWR _25589_/X _25629_/A _25590_/Y _25591_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20138__A2 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22532__A0 _30032_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31407__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27330_ VGND VPWR _27330_/S _27280_/X _32188_/Q _32188_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17003__A2 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24542_ _31043_/Q _31042_/Q _31041_/Q _24543_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XANTENNA__27066__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21754_ _21661_/X _21708_/B _21754_/Y _21709_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_33_3720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_516 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29454__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26274__A1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27471__A0 _32293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16991__B _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16211__B1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18751__A2 wire1996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23170__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20705_ VGND VPWR _20722_/S _29221_/Q _27248_/A0 _29221_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27261_ VGND VPWR _27262_/S _32136_/Q _27261_/A0 _32136_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23088__A1 _23085_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_2513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24473_ _24470_/C _31033_/Q _24473_/Y _24467_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XPHY_1115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21685_ _21651_/X _21640_/X _21685_/X _21780_/S _21684_/X _21791_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_2 XANTENNA__24285__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15565__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23601__C _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23627__A3 wire1877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29000_ _29000_/Q _30339_/CLK _29000_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_1137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26212_ VPWR VGND _31594_/D _26212_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 Xmax_length4147 VPWR VGND _14104_/A wire4148/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XPHY_1148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23424_ _29816_/Q _23424_/X _29358_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__14773__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20636_ VGND VPWR _20646_/S _27696_/A1 _29182_/Q _29182_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27192_ _27193_/B hold396/A _27191_/X _32089_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__30431__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31557__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26026__A1 _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27223__B1 _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26143_ _26159_/A _31561_/Q _26143_/X _26159_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_175_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23355_ _23355_/X _23355_/C _23355_/A _23355_/B _30334_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__24037__B1 _24035_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20567_ VGND VPWR _20576_/S _27693_/A1 _29083_/Q _29083_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2723 VPWR VGND _19621_/B wire2724/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_27_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27774__A1 _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26577__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25234__C1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17711__B1 _31724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_4446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_3821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24713__B _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22306_ VGND VPWR _23388_/S _29892_/Q _29151_/Q _29892_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_175_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_1119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26074_ VGND VPWR _26081_/D _31539_/Q _14399_/B _26074_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_101_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23286_ VGND VPWR _23286_/S _23286_/A1 _30268_/Q _30268_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2767 VPWR VGND _24597_/A wire2768/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_27_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20733__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20498_ VGND VPWR _20512_/S _27690_/A1 _29016_/Q _29016_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19807__B wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length3022_A _18386_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25025_ _25041_/A _24051_/B1 _25025_/X _25025_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_62_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29902_ _29902_/Q _31961_/CLK _29902_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_216_3253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30581__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22237_ VGND VPWR _22280_/S _30309_/Q _30399_/Q _22237_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_27_2812 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_3554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23260__A1 _29508_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27526__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_2189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18806__A3 wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2088_A wire2088/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_2260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19526__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21271__A0 hold377/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20074__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_321_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16817__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27516__S _27516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29833_ _29833_/Q _30398_/CLK _29833_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_153_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_5027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22168_ VGND VPWR _22168_/X _22165_/X _22167_/X wire2273/X _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_216_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20034__A wire847/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1204 _14610_/B1 _15631_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25001__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput590 _28692_/Q la_output[79] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14828__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2022 VPWR VGND wire2022/X _17414_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_3123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1226 _14540_/X wire1228/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_21119_ VGND VPWR _21134_/S _27690_/A1 _29563_/Q _29563_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_1030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_1130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19216__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29764_ _29764_/Q _31921_/CLK hold255/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14990_ _14989_/X _14988_/X _15640_/C1 _14990_/Y _15356_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 X_22099_ _22123_/B1 _30091_/Q _22099_/X _22098_/X _22167_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA_wire2255_A wire2255/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26976_ _31973_/Q _27028_/A _27009_/A _31974_/Q _26976_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_229_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2044 VPWR VGND wire2044/X wire2044/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_57_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17046__C _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2055 wire2056/X wire2055/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19767__A1 _28540_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21023__B1 _18682_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1321 VPWR VGND wire1321/X _26687_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_251_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2066 wire2067/X wire2066/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_2149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24760__A1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28715_ VGND VPWR _28715_/D _31462_/CLK _28715_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27829__A2 _32538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22887__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2077 wire2078/X wire2077/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_25927_ _25926_/X _26173_/B1 _31479_/Q _24716_/A _31480_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_13941_ _28556_/Q _13941_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_112_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19542__B _19543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1343 VPWR VGND _26350_/C _19770_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29695_ hold398/A _30219_/CLK _29695_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire2088 VPWR VGND wire2088/X wire2088/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16658__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_5358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1354 VPWR VGND wire1354/X wire1354/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2099 VPWR VGND wire2099/X wire2099/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_229_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22771__B1 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13871__A _28626_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1376 wire1376/A _25022_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16660_ _16660_/X _29124_/Q _16964_/A2 _16966_/A3 _16925_/B1 _16659_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire2422_A _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28646_ VGND VPWR _28646_/D _30580_/CLK _28646_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_281_4575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13872_ _28625_/Q _13872_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25858_ VGND VPWR _31449_/Q _25853_/C _31448_/Q _25859_/C _31450_/Q _31447_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 Xwire1387 VPWR VGND wire1387/X _19518_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26501__A2 _26502_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1398 VPWR VGND wire1398/X _18767_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15253__A1 _28099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18158__B _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16450__B1 _16449_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15611_ _15612_/A _15611_/A1 _15608_/X _15610_/X _15611_/B1 _15606_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_1 XANTENNA__27251__S _27264_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18990__A2 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24809_ _24809_/Y _24809_/A _24809_/C _24809_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_242_3825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16591_ VGND VPWR _16961_/S _30908_/Q _29186_/Q _16591_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31087__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28577_ _28577_/Q _32567_/CLK _28577_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20129__A2 _19521_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25789_ VGND VPWR _25793_/S _31424_/Q _31425_/Q _31424_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_284_1562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32332__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18330_ _18625_/A1 wire3175/X _18330_/Y _18295_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_231_920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27528_ VGND VPWR _27528_/X _25641_/B _32246_/Q _32238_/Q _25641_/A _32254_/Q _32262_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 X_15542_ VGND VPWR _15702_/S _29610_/Q _29642_/Q _15542_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21877__A2 _21554_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15005__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20908__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25068__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_1929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18742__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23080__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18261_ _29341_/Q wire3174/X _18261_/Y _29857_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_227_1980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15473_ VGND VPWR _15736_/S _30509_/Q _30795_/Q _15473_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27459_ VGND VPWR _27475_/S _32286_/Q _32287_/Q _27459_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14519__A_N _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30328__D _30328_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16753__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14906__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28821__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18174__A _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2889_A _20638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29947__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17212_ VGND VPWR _17212_/X _21586_/A _17220_/C _17212_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_clkbuf_leaf_108_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14424_ _14424_/Y _29347_/Q _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_67_4027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14764__B1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21312__B _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30470_ VGND VPWR _30470_/D _30470_/CLK _30470_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xclkbuf_opt_22_0_core_clk clkbuf_opt_22_1_core_clk/A clkbuf_5_21_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_18192_ _18192_/Y _20453_/C _18192_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XANTENNA__15961__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32482__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_5356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_4128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24291__A3 _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27283__A_N _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29129_ _29129_/Q _32329_/CLK _29129_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17143_ _17143_/B _17143_/Y _17143_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_clkbuf_leaf_360_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14355_ _14355_/Y _14355_/A _16987_/B _14355_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XANTENNA__24028__B1 _24026_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16505__A1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15308__A2 _15301_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27765__A1 _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26568__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30924__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25225__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17702__B1 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14207__A _19539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22039__C1 _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32140_ _32140_/Q _32291_/CLK _32140_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17074_ _17074_/X hold230/A _29690_/Q _30367_/Q hold384/A VGND VPWR _17073_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_139_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3771 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26541__D _26541_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14286_ _14145_/Y _14285_/Y _17891_/A _14245_/B _24543_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__28971__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20643__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20852__A3 _30430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19717__B _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output557_A _28726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25240__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_259_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16025_ wire1004/X wire1476/X _28779_/Q _16025_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_217_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32071_ _32071_/Q _32071_/CLK _32071_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23251__A1 wire3976/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19455__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22054__A2 _14069_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27517__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14641__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4172_A wire4173/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18113__S _18113_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21262__A0 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20065__A1 _28678_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22143__B _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29852__D _29852_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31022_ _31022_/Q _31679_/CLK _31022_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16808__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27426__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_4897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21801__A2 _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3162 _23191_/B1 _18538_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_191_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14819__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3173 _18163_/Y wire3174/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28201__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17952__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_3955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_4134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24200__B1 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17976_ VGND VPWR _17980_/S _18217_/B _27913_/Q _27913_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_27_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21014__A0 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14295__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_3550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19715_ _19718_/A _25738_/A _19715_/C _19715_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__22211__C1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_289_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22988__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16927_ wire1010/X wire1482/X _32331_/Q _16927_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_6_1759 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21565__A1 _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17769__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30304__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1782 VPWR VGND wire1783/A _18320_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_225_4713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1793 _24227_/A0 _18263_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_260_4604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2397_A _14148_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13781__A _31165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_2184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_2120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17233__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19646_ _20128_/A _19646_/B _26687_/D _19646_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_31924_ _31924_/Q _32064_/CLK hold234/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_2412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16858_ _16830_/X _29681_/D wire890/A _16839_/X wire705/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_228_3157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28351__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29477__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23306__A2 _22284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27161__S _27167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15809_ wire1004/X wire1476/X _32413_/Q _15809_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25700__B1 _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_147_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31855_ _31855_/Q _31887_/CLK _31855_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19577_ _19577_/B _19577_/X _19628_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XANTENNA__27919__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16789_ VGND VPWR _16789_/X _16788_/X _16787_/X _16838_/A1 _16834_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14598__A3 wire1693/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15795__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18718__C1 _28273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23857__A3 _19858_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_3797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30806_ _30806_/Q _32438_/CLK _30806_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18528_ VGND VPWR _18531_/S wire3825/X _28300_/Q _28300_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_74_1928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30454__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31786_ _31786_/Q _32565_/CLK _31786_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20818__S _20819_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26256__A1 wire3463/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27453__A0 _32284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_5546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19930__A1 _28613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18733__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24517__C _31293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30737_ _30737_/Q _32551_/CLK hold439/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18459_ VGND VPWR _18460_/S wire3832/X _28233_/Q _28233_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1891_A _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17941__A0 _19178_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15547__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23421__C _30418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_3256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_5521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_298_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14755__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21222__B _21222_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21470_ wire3800/A _21471_/A _21462_/Y _21466_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_15_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30668_ hold254/A _32108_/CLK _30668_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_85_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24814__A _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32407_ _32407_/Q _32473_/CLK _32407_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20421_ VGND VPWR _20429_/S _28941_/Q wire1840/X _28941_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2008 VPWR VGND _27682_/A1 _27237_/A0 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18497__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24019__B1 _28626_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27756__A1 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25216__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25629__B _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14117__A _21328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30599_ _30599_/Q _31874_/CLK hold343/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26413__D1 _24805_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23140_ _23180_/B _18535_/B _23180_/A _23140_/X _23140_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_236_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20352_ VGND VPWR _20352_/S _27702_/A1 _28892_/Q _28892_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32338_ _32338_/Q _32525_/CLK _32338_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_85_2736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20553__S _20556_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19627__B _19628_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22334__A _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25231__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13956__A _28541_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23071_ _23049_/A _21211_/B _23190_/B _30427_/Q _23071_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23242__A1 hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3272_A _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20283_ VGND VPWR _20285_/S _27699_/A1 _28825_/Q _28825_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27508__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32269_ _32269_/Q _32269_/CLK _32269_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_44_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18023__S _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_353_core_clk _30233_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_132_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_2850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_4111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21253__A0 _30431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_2741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19997__A1 _28645_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22022_ _22061_/S hold267/A _22022_/X _22071_/C _21646_/A _21629_/A hold265/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_235_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27336__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23793__A2 _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32205__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22450__C1 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_2051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24986__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_5238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26830_ _26893_/C1 _26829_/X _26835_/A _31865_/Q _31865_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_79_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19643__A _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17472__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21892__B _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_186_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30701__D hold361/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold14 hold14/A hold14/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25364__B _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28378__D _28378_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21005__A0 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold25 hold25/A hold25/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_6_3695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14286__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19749__A1 _28531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold36 hk_dat_i[30] hold36/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16680__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22348__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23165__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold47 hk_dat_i[15] hold47/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22979__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26761_ _26760_/Y _26893_/C1 _26760_/B _31833_/Q _31833_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold58 input9/X hold58/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_282_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23973_ _30609_/Q wire1656/A _23973_/X _30545_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_22_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold69 hk_ack_i input6/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18259__A _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18957__C1 wire1564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1497_A _14546_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28500_ _28500_/Q _31837_/CLK _28500_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32355__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25712_ _25731_/B wire3427/X _25712_/Y _31401_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_129_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18421__A1 _28196_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22924_ VGND VPWR _22924_/X _22924_/B _29904_/Q _22924_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_29480_ _29480_/Q _32429_/CLK _29480_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26692_ VGND VPWR _31798_/D _26692_/B _26771_/A _26692_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_281_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15235__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_5200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16432__B1 _16653_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18972__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28431_ _28431_/Q _30339_/CLK _28431_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26495__B2 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1856_A _14405_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25380__A _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25643_ _25643_/X _25643_/C _27594_/B _25643_/B _25682_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_13_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22855_ _22855_/B _22855_/Y _22855_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_94_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21308__A1 _29901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout922_A wire926/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_5575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_3932 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_5244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21308__B2 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23848__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21806_ _22074_/A2 _21805_/X _14408_/A _17052_/X _21806_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28362_ _28362_/Q _30453_/CLK _28362_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_5323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25574_ _25573_/X _31368_/Q _31368_/D _25576_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_241_4581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_3739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22786_ _22820_/B _22820_/C _22786_/X _23115_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_246_1866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20728__S _20743_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18185__B1 _18184_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25530__D _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19382__C1 wire1563/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19921__A1 _28610_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18724__A2 _18713_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27313_ _27349_/C _27322_/C _27321_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XFILLER_240_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21413__A _21413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24525_ _24527_/A _31293_/Q _24525_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_205_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21737_ wire3206/A _21734_/X _21736_/X _21830_/B _21737_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_28293_ _28293_/Q _30453_/CLK _28293_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_3618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15538__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1831_A _18232_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14726__S _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26798__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30947__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27244_ VGND VPWR _27264_/S _32119_/Q _27244_/A0 _32119_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14746__B1 _14919_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22269__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold500_A hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24456_ _24442_/C _31024_/Q _24456_/Y _24442_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_131_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21668_ _21668_/B _21668_/Y _21668_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__22943__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28994__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20819__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24724__A _31564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23407_ _23349_/C _23407_/Y _14309_/X _22444_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_16_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18488__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27100__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20619_ VGND VPWR _20625_/S wire1840/X _29165_/Q _29165_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27175_ VGND VPWR _32081_/Q hold242/X _27276_/C _27175_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_input190_A mprj_dat_i[24] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23481__A1 _28379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24387_ _24638_/C _30996_/D _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_250_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length3254 VPWR VGND _15350_/A1 _14545_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25207__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14027__A _28470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21599_ _21603_/C _22067_/A _21599_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xor2_4 XANTENNA__14761__A3 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16499__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14140_ _13829_/A _14141_/A _14139_/X _31258_/Q wire3232/X _30020_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 X_26126_ _31553_/Q _26125_/Y _26126_/Y _26121_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_4_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_1927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25758__B1 _32086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23338_ _20964_/S _32269_/Q _23338_/X _18666_/C _30317_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xmax_length2542 VPWR VGND _20444_/S _20449_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_88_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2553 VPWR VGND _20247_/S _20257_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20463__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17160__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24772__A_N _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2564 VPWR VGND _20225_/S _20227_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_85_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17160__B2 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25222__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28224__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2575 VPWR VGND _19418_/S _19419_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14071_ _20914_/C _20847_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__23233__A1 _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26057_ VGND VPWR _26120_/A2 _26056_/Y _26066_/D _26057_/X _24459_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_84_2257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23269_ _23269_/X _30484_/Q _23269_/C _30413_/Q _30414_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_111_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24430__B1 _31015_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15710__A2 _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20047__A1 _28670_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_2347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19988__A1 _28642_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25008_ wire877/A wire1283/A _25008_/X _25073_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__17448__C1 hold35/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input51_A la_input[105] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24981__A1 _31134_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27246__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21795__A1 _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30327__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19452__A3 _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_4159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21795__B2 _17043_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1001 wire1005/A _16387_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22898__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17830_ _31651_/Q _14067_/A _17830_/X _17897_/B _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_2_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1012 _15771_/Y _16206_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29816_ VGND VPWR _29816_/D _30027_/CLK _29816_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_239_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17463__A2 _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26183__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1023 VPWR VGND _16434_/A2 wire1030/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_153_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28374__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1034 wire1043/A wire1035/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_286_2303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15474__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18120__A_N _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16671__B1 _16665_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24733__A1 _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23075__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17761_ _17761_/X _17662_/A _17863_/B _17585_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_29747_ _29747_/Q _31904_/CLK hold307/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14973_ VGND VPWR _15516_/S _30897_/Q _29175_/Q _14973_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26959_ VGND VPWR _26966_/B _31999_/Q _32000_/Q _31998_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_109_5543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14682__C1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18948__C1 _18947_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19500_ _25510_/C _31334_/Q _28452_/Q _19500_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XFILLER_222_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1151 VPWR VGND _15644_/S wire1151/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16712_ _16712_/X _29577_/Q _16966_/A2 _16920_/A3 _16925_/B1 _16711_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_95_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16018__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18412__A1 _28187_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13924_ _28573_/Q _13924_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2804_A _27163_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_5620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21307__B _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17692_ _17863_/A _17863_/C _17692_/X _17488_/A _17488_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_4 X_29678_ _29678_/Q _32557_/CLK _29678_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30477__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_1608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27683__A0 _32417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26486__A1 _31703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26386__A _26386_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16423__B1 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27920__D _27920_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26486__B2 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19431_ VGND VPWR _28439_/D _26539_/B _25577_/C _19430_/X _19429_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__31722__CLK _31722_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16643_ VGND VPWR _16643_/X _16722_/C1 wire1038/A _16640_/X _16642_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28629_ _28629_/Q _32549_/CLK _28629_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_73_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13855_ _28642_/Q _13855_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_277_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15777__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18270__A_N wire3852/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23839__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31442__D _31442_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24618__B _24618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_1944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31640_ _31640_/Q _31894_/CLK _31640_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19362_ _19362_/X wire2270/A _27888_/Q wire2281/A wire2582/A wire3766/A VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_34_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16574_ _16956_/A2 wire3283/X _29260_/Q _16574_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_13786_ _31160_/Q _13786_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_108_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4018_A _28710_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20638__S _20638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18176__B1 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27435__A0 _32275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19912__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18715__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18313_ VGND VPWR _18329_/S _28107_/Q _27512_/A1 _28107_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23014__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15525_ VGND VPWR _15525_/X _15524_/X _15762_/A1 wire1128/A _15523_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_231_761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31571_ _31571_/Q _31846_/CLK _31571_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17520__B _26510_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19293_ _19285_/X _19292_/X wire1900/X _19287_/X _19293_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_241_1218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14636__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18108__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31872__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17012__S _17089_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26833__B _26898_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29847__D _29847_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30522_ hold443/A _32583_/CLK input64/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18244_ _18244_/A _18201_/A _18244_/X _18244_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__14737__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15456_ _16721_/A2 _15560_/A1 _32364_/Q _15456_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25997__B1 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15934__C1 wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output674_A wire2349/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19125__C1 _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27648__C _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_2086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14407_ _14407_/X _14408_/B _14407_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_253_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17947__S _17947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18479__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30453_ _30453_/Q _30453_/CLK _30453_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18175_ wire3879/X _18158_/X _18175_/X wire3852/X _18254_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_15387_ _15386_/X _15705_/A1 _15737_/A2 _29229_/Q _15387_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_2449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25449__B _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_2127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20286__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19140__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17126_ _30391_/Q _17234_/A1 _17125_/X _17127_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_7_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31102__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14338_ _14338_/B _14338_/A _14338_/Y _21355_/A _14338_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA__32228__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30384_ _30384_/Q _30384_/CLK _30384_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17151__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19447__B _28443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25213__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32123_ _32123_/Q _32127_/CLK _32123_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13776__A _31170_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17057_ VGND VPWR wire886/A _17050_/X _17056_/X _30382_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17248__A _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22027__A2 _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14269_ wire3493/X hold190/X _14268_/X wire3235/A hold191/A _14127_/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_84_3492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27664__B _27664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15701__A2 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2312_A _14274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_2195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19979__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28717__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16008_ VGND VPWR _16443_/S _29524_/Q _29558_/Q _16008_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17439__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24972__A1 _31130_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27156__S _27157_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32054_ _32054_/Q _32353_/CLK _32054_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_4683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21786__A1 hold162/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17682__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31005_ _31005_/Q _31553_/CLK _31005_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31252__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32378__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18651__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30521__D hold443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15465__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire723_A wire723/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2280 VPWR VGND wire2281/A _19368_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_273_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_3744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25921__B1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17959_ VGND VPWR _17983_/S wire3888/X _27896_/Q _27896_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19602__C_N _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_1545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16298__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_4_1_core_clk clkbuf_3_4_2_core_clk/A clkbuf_3_4_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_149_3932 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28867__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18403__A1 _28178_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_4401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1590 VPWR VGND _25087_/B _20651_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire1904_A wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27123__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20970_ VGND VPWR _20980_/S _30176_/Q _29435_/Q _29435_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_110_3799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15217__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27674__A0 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_4330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16414__B1 _16395_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17611__C1 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31907_ _31907_/Q _31916_/CLK hold404/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19629_ VGND VPWR _14153_/Y _26866_/A1 _19638_/A _19629_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_max_length821_A _23317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24488__B1 hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16965__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19402__S _19406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22640_ _22642_/C _22640_/Y _22779_/A1 _29876_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA_wire3020_A _18399_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14976__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22499__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18167__A0 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31838_ _31838_/Q _31846_/CLK _31838_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_5586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23432__B _23432_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27891__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20548__S _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3118_A _14284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14440__A2 _14435_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21430__A1_N _30345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_5042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19364__C1 _28016_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26229__B2 _32293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22502__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24247__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22571_ VGND VPWR _22598_/S hold186/A _22570_/X _30064_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31769_ _31769_/Q _31879_/CLK hold182/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18018__S _18018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27521__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_5037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24310_ VGND VPWR _30959_/D _24310_/B _31194_/Q _24311_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_241_1730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_4071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21522_ _21941_/A _21559_/A _21522_/A _21522_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_121_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25290_ _25413_/A _25287_/X _25289_/B _25289_/A _25290_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_280_1790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_4828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16193__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24241_ VGND VPWR _24241_/S _30917_/Q _27709_/A1 _30917_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_30_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_5253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21453_ _21453_/Y _21548_/B _21548_/A _30344_/Q _21451_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_241_1785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19638__A _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15940__A2 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18542__A _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_2150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20277__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_Di0[1] wire2322/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20404_ VGND VPWR _20410_/S _27696_/A1 _28926_/Q _28926_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_1214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24172_ _24172_/X _24205_/B1 _30635_/Q wire3640/X _24273_/C VGND VPWR wire1247/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_85_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20283__S _20285_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25014__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21384_ _21649_/C _21599_/A _21679_/B _21649_/D _21390_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19357__B _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17142__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25204__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26401__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23123_ VGND VPWR _23123_/X _23121_/X _23122_/X _23120_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19419__A0 _28435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20335_ VGND VPWR _20335_/S wire2001/X _28875_/Q _28875_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15153__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22018__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17693__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28980_ _28980_/Q _31962_/CLK _28980_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3654_A _30462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24412__B1 _31008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28397__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20029__A1 wire4066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23594__S _23595_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24963__A1 _31125_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27931_ _27931_/Q _30432_/CLK _27931_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_23054_ VGND VPWR _23054_/X _18580_/A _23053_/X _22553_/A _18540_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14900__B1 wire1067/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29642__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20266_ VGND VPWR _20290_/S _21070_/A1 _28808_/Q _28808_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_1534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout872_A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27588__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19434__A3 wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22005_ VGND VPWR _21956_/A _21658_/X _22004_/Y _22005_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_230_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26165__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18642__A1 wire3863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30431__D _30431_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27862_ _27862_/Q _30462_/CLK _27862_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xinput104 VGND VPWR _30680_/D la_input[38] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_135_2380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_3852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20197_ VGND VPWR _20202_/S _28742_/Q wire1837/X _28742_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19985__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput115 VPWR VGND la_input[48] _30660_/D VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_2_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15456__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput126 VGND VPWR _30640_/D la_input[58] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_287_3368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16653__B1 _16653_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29601_ _29601_/Q _32423_/CLK _29601_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24715__A1 _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26813_ _26813_/B _26772_/C _27120_/B _26813_/X _27098_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xinput137 VPWR VGND _30620_/D la_input[68] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_276_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21408__A _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31745__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput148 VGND VPWR _30600_/D la_input[78] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_2_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27793_ _27801_/S _27793_/D _27793_/C _27793_/B _31398_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_276_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17605__B _17605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22617__A_N _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput159 VGND VPWR _30580_/D la_input[88] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA_fanout1781_A _18324_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14664__C1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_179 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19198__A2 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29792__CLK _29803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29532_ _29532_/Q _30503_/CLK _29532_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_4730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_4059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24191__A2 _19706_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26744_ _26744_/Y _31787_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_282_4670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20669__D _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16001__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23956_ _23956_/X _23954_/X _28524_/Q _24163_/B2 _19718_/B VGND VPWR _23955_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_229_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_5377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24719__A _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_4031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18945__A2 wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23623__A _32559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_902 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22907_ _22934_/A _22921_/C _22907_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_29463_ _29463_/Q _32342_/CLK _29463_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26675_ _26674_/Y _27117_/C1 _26678_/B _31897_/Q _31792_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_2_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_913 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15759__A2 _15759_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16956__A1 _16956_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23887_ _23887_/X _20128_/B wire4132/X wire4019/X _24178_/A2 VGND VPWR _23878_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_245_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_1901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_924 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_3942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_935 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31895__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24438__B _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28414_ _28414_/Q _32322_/CLK _28414_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_946 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2120_A wire2121/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25626_ _25626_/X _25629_/A hold74/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__14967__B1 _32351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19770__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input203_A mprj_dat_i[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22838_ VGND VPWR _22838_/X _22924_/B _22838_/A _22924_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_16_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29394_ _29394_/Q _30294_/CLK _29394_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29022__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_957 hold29/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20458__S _20458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27417__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_968 _21710_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23151__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_979 _28473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28345_ _28345_/Q _32570_/CLK _28345_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_90_2250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25557_ VGND VPWR _25564_/S _31356_/Q _31357_/Q _31356_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16708__A1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23061__C _23061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22769_ VGND VPWR _22933_/S _21392_/A _29888_/Q _22769_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_161_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21701__A1 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3162_A _18538_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15310_ _15291_/Y _15282_/X _29152_/D _15612_/B _15309_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2oi_2 XFILLER_51_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19370__A2 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18155__C _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_9_core_clk _32425_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XPHY_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24508_ _24508_/X _24546_/B _24506_/Y _24507_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__31125__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16290_ VGND VPWR _16290_/X _16289_/X _16288_/X _16930_/A1 wire1038/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28276_ _28276_/Q _30378_/CLK _28276_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25488_ _25488_/X _31323_/Q _25488_/A _31322_/Q _31324_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_input99_A la_input[33] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16184__A2 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20982__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24454__A _24454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17381__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25443__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26640__A1 _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15241_ VGND VPWR _15241_/X _15240_/X _15239_/X _15752_/B1 _15749_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27227_ _27227_/B _27227_/Y _32106_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__29172__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24439_ _31019_/Q _24439_/X _24439_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_68_3432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15392__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23454__A1 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3040 _18144_/S _18143_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xclkbuf_leaf_275_core_clk _30359_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_279_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20268__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19122__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1295 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_1869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_253_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17669__C1 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15172_ VGND VPWR _15639_/S _29021_/Q _28989_/Q _15172_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27158_ VGND VPWR _27165_/S _27701_/A1 _32064_/Q _32064_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_2059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18866__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_204_core_clk _31750_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_49_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18330__B1 wire3175/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14123_ _14123_/A _14123_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_120_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26109_ VGND VPWR _26120_/A2 _26108_/X _26107_/Y _26109_/X _24590_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__31275__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17068__A _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2372 _14183_/Y max_length2372/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22009__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_5569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19980_ _19979_/X _28638_/Q _28638_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__18881__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27089_ _26224_/A _27088_/X wire772/X _32022_/Q _32022_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_231_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26943__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32520__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1671 VPWR VGND _20127_/C wire1672/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_172_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16892__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24954__A1 _31121_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18931_ _18930_/X _19151_/S _19201_/A2 _27963_/Q _18931_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14054_ _30432_/Q _14054_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_98_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_5113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27579__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18598__S _18598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output255_A _14018_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17704__A1_N _31640_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_1667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2921_A _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17436__A2 _31931_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18633__A1 wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_4401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18862_ wire2270/X _27864_/Q wire2582/A wire3766/A wire2281/X _18862_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o2111a_2 XFILLER_62_2363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25903__A0 _31469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17813_ _17709_/X _17813_/X _17720_/X _17863_/B _17812_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__27704__S _27710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17515__B _31760_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_2532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18793_ _30256_/Q _18793_/X _18795_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_265_5591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23236__C _23236_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15998__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14655__C1 _28807_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19189__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24182__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17744_ _17651_/B _17743_/X _17685_/A _17692_/X _17744_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__27105__C1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1053_A wire1053/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21037__B _30035_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14956_ _14955_/X _14947_/X _14956_/Y _15236_/A1 _14951_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XFILLER_127_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19728__A4 _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22193__A1 _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27656__A0 _32395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23390__B1 _21221_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18936__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13907_ _28590_/Q _13907_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_1_2165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19730__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17675_ _17662_/A _17674_/X _17852_/B _17585_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_18_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32268__D _32268_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14887_ _14887_/X _29109_/Q _14887_/A2 _15628_/A3 _14675_/S _14886_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_35_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15750__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19414_ VGND VPWR _19418_/S _27705_/A1 _28430_/Q _28430_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25131__A1 _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16626_ _16959_/A2 _16626_/X _16911_/A2 wire1450/X _14104_/Y _30909_/Q VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_53_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18149__A0 _28077_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13838_ _29832_/Q _22221_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__16975__A1_N _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27408__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23142__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19346__C1 _28303_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31623_ _31623_/Q _31698_/CLK _31623_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19345_ VGND VPWR _19345_/X _19335_/B _19278_/S _28370_/Q _19344_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_140_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16557_ _16965_/A2 _16952_/A1 _30907_/Q _16557_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22496__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13769_ _31177_/Q _13769_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__29515__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_157_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24890__B1 wire3515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_1195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18164__A3 wire3915/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19361__A2 wire1405/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15508_ _15507_/X _15640_/A1 _15605_/A2 _29609_/Q _15508_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_34_3199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3537 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31554_ VGND VPWR _31554_/D _32578_/CLK _31554_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19276_ VGND VPWR _28335_/Q _28268_/Q _19374_/B _19276_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_125_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16488_ _16459_/X _29671_/D wire891/X _16468_/X _16487_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__22583__S _22610_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25037__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32050__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19900__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_4405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_4525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25434__A2 _31357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18227_ _22340_/A _18227_/Y _18278_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_30505_ _30505_/Q _30903_/CLK _30505_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_173_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15439_ VGND VPWR _15438_/Y _15436_/Y _15640_/C1 _15439_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__15383__B1 wire1069/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_4108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31485_ _31485_/Q _31846_/CLK _31485_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_125_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31618__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15922__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1687_A _17893_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21199__S _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21456__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30436_ VGND VPWR _30436_/D _31970_/CLK _30436_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18158_ VPWR VGND _18158_/X _18244_/A _18201_/A VGND VPWR NF_sky130_fd_sc_hd__and2b_2 XANTENNA__23996__A2 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29665__CLK _30783_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18321__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold303 hold303/A hold303/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_60_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17109_ _16971_/A _30389_/Q _17109_/X wire3791/A _29429_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_42_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25198__A1 _31356_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold314 hold314/A hold314/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15135__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold325 hold325/A hold325/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26395__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18872__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17675__A2 _17585_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30367_ _30367_/Q _30367_/CLK _30367_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_28_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18089_ VGND VPWR _18118_/S wire3912/X _28018_/Q _28018_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold336 hold336/A hold336/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_3579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26934__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_5281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold347 hold347/A hold347/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_5019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20116__B _26323_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21208__B1 _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24811__B _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold358 hold358/A hold358/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20120_ _20120_/Y _20120_/B _20124_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_32106_ _32106_/Q _32540_/CLK _32106_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_42_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30642__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold369 la_input[123] input71/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__31768__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_154_2255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_3270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20831__S _20837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30298_ _30298_/Q _30483_/CLK _30298_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21759__A1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17190__A_N _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26147__A0 _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout816 VPWR VGND _26662_/A2 _23775_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20051_ _26188_/A _20050_/Y wire850/X wire4035/X _28672_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17427__A2 _17427_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32037_ _32037_/Q _32554_/CLK wire746/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_227_5306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18624__A1 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout827 VPWR VGND wire828/A wire829/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19821__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19967__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout849 VPWR VGND wire851/A wire852/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20431__A1 _28951_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1909 VPWR VGND _18903_/S _19094_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_214_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27614__S _27614_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_79_core_clk _30630_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_247_4053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15989__A2 _16563_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30792__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23905__C1 _23904_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23810_ _30831_/D _23813_/C _23810_/A _23822_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__26738__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25370__A1 _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24173__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16650__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19793__D_N _24441_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24790_ 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XFILLER_225_5074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14661__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_3997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_875 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23443__A hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23741_ _31764_/Q _23744_/D hold222/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XANTENNA__23920__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20953_ VGND VPWR _20964_/S hold386/X _29418_/Q _29418_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19640__B _20654_/A VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22554_ VGND VPWR _22554_/X _22554_/B _23355_/B _22554_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_273_4603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17363__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold129_A hold129/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25273_ _31295_/Q _31258_/Q _25274_/C _31257_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22239__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16491__S _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22485_ _22513_/C1 _22484_/X _22513_/A2 _17128_/X _30003_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_234_4609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16571__C1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3869_A _29854_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_1593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32543__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1627_A _19785_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2699 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27012_ _27020_/D _27012_/Y _27028_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_24224_ VGND VPWR _24241_/S _30900_/Q _27692_/A1 _30900_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23987__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21436_ VGND VPWR _21436_/X _21436_/B _21437_/A _21437_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_5_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22644__C1 _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17115__A1 _29890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17115__B2 _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3755 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21998__A1 hold428/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19518__D _20654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18659__A_N _18682_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24155_ wire1810/X _24154_/X _28671_/Q _24192_/A2 _24155_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_271_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17666__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16469__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16323__C1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21367_ _21362_/Y _21645_/B _14418_/Y _21361_/Y _21367_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_237_1629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26925__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14305__A _17895_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3717 VPWR VGND _18199_/A _30328_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_133_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24721__B _31569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20670__A1 _20662_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23106_ _23049_/A _21211_/B _23185_/B _30434_/Q _23106_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_63_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2907 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_3078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16874__B1 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23739__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20318_ VGND VPWR _20322_/S _23663_/A1 _28859_/Q _28859_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_63_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23618__A _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28963_ _28963_/Q _32277_/CLK _28963_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24086_ _30874_/D _24209_/B1 _24085_/X wire737/X _24080_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XANTENNA__20741__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3812 VPWR VGND wire3812/X _29872_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24213__S _24220_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21298_ _21298_/A _21298_/X _21298_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_63_3384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3823 VPWR VGND _18234_/B wire3825/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_24_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3834 VPWR VGND wire3834/X _29865_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_107_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23037_ VGND VPWR _31395_/Q _23036_/X _23035_/X _23037_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27914_ _27914_/Q _30294_/CLK _27914_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3845 VPWR VGND wire3845/X _29861_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18615__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17616__A _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20249_ VGND VPWR _20249_/S _28792_/Q _27698_/A1 _28792_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2070_A wire2071/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input153_A la_input[82] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28894_ _28894_/Q _32444_/CLK _28894_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_213_2341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_1949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2168_A wire2168/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22241__B _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3878 VPWR VGND wire3878/X wire3879/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_4686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_2717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15429__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16626__B1 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3889 wire3890/X wire3889/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_265_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27845_ _32545_/Q _32546_/Q _32544_/Q _25806_/D _27846_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_44_2093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20042__A wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_2735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14810_ _14810_/X _14822_/B1 _14809_/X _14823_/C1 _14808_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_41_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_2415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24164__A2 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15790_ _15790_/X _30444_/Q _15789_/X _15771_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_wire2335_A _14207_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27776_ VGND VPWR _27783_/S _25023_/B _32501_/Q _32501_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14040__A _28457_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25552__B hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24988_ _25041_/A _19959_/A2 _24988_/X _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_236_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22175__A1 wire2275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21025__B1_N _18703_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24449__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19576__C1 _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18918__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29515_ _29515_/Q _31920_/CLK _29515_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_14741_ VGND VPWR _14741_/X _14738_/X wire1202/A wire1135/X _14740_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23911__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19040__A1 _28064_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26727_ _26726_/Y _25512_/A _31816_/Q _26754_/B _31816_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14397__D _14397_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19550__B _19550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23939_ _20671_/A _30551_/Q _23939_/X _19857_/B _30615_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__28412__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29538__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21922__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_710 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1184 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21922__B2 _17134_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_721 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_732 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17460_ VPWR VGND _17460_/X _26245_/C _31617_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_204_4446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29446_ _29446_/Q _30217_/CLK _29446_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_109_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26310__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14672_ _29135_/D _14643_/X _14671_/Y _14653_/X _15612_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2oi_4 X_26658_ _26658_/X _31861_/Q _26637_/B _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_232_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_743 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_2637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_754 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18166__B _18166_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_765 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16411_ _16965_/A2 _16952_/A1 _32317_/Q _16411_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24321__C1 _24320_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_776 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25609_ _25609_/X _25582_/X hold96/A _31237_/Q _24493_/X VGND VPWR _25608_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__17070__B _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17391_ _17302_/A wire2086/X _17391_/X _17441_/B2 _17391_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_31_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29377_ _29377_/Q _30477_/CLK _29377_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_787 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22478__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30515__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22022__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26589_ _26589_/X _31844_/Q wire3452/A wire817/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__17339__D1 _17338_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_798 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20489__A1 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19130_ _19129_/X wire1939/X _19203_/A2 _28328_/Q _19130_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_196_4247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19343__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23499__S _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16342_ VGND VPWR _16342_/X _16491_/S _16834_/B1 _16341_/X _16340_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28328_ _28328_/Q _30410_/CLK _28328_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28562__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22119__D _22119_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29688__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16157__A2 wire944/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17354__A1 wire3558/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17354__B2 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19894__A3 _26015_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19061_ _19054_/X wire1896/X _22090_/B1 _19056_/X _19061_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_31_2649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15365__B1 _15364_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2871_A _21095_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16273_ _16817_/A2 _16817_/A1 _28094_/Q _16273_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28259_ _28259_/Q _28326_/CLK _28259_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_215_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3711_A _22356_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24624__B1 _19513_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18012_ VGND VPWR _18012_/S _18223_/B _27946_/Q _27946_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15224_ _32059_/Q wire1500/X _15224_/X _15517_/A1 _15223_/X wire1493/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_191_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_5300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23978__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21320__B _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30665__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31270_ VGND VPWR _31270_/D _32294_/CLK _31270_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17106__A1 wire3762/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_Di0[22] wire2709/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27169__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19666__D_N _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31910__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3576 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30221_ _30221_/Q _32078_/CLK _30221_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_152_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15155_ VGND VPWR _15155_/X _15154_/X _15153_/X _15640_/A1 _15640_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xoutput408 _13821_/Y la_oenb[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18854__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21453__A3 _30344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput419 _13820_/Y la_oenb[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25727__B _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26916__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4085_A _28653_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15668__B2 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14106_ _21427_/C _21426_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_190_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_4147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30152_ _30152_/Q _32550_/CLK _30152_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20661__B2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19963_ VGND VPWR wire1317/X _25022_/C _24927_/B _19963_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_29_2567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15086_ VGND VPWR _15086_/X _15718_/B1 _15757_/C1 _15085_/X _15084_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_46_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_3191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output637_A wire2408/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1490 VPWR VGND _15598_/C1 wire1489/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_max_length2202_A _19577_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18914_ wire1402/X _28381_/Q _18913_/X _28381_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26129__B1 _14396_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14037_ _14037_/Y _28460_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__18606__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17409__A2 _31926_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17526__A _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1170_A wire1172/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30083_ hold114/A _31998_/CLK _30083_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22402__A2 _21821_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2010_A _18186_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18121__S _18152_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19894_ VGND VPWR _26015_/B _26838_/A4 _24046_/B1 _19894_/X _26139_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__19949__A4 wire2302/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29068__CLK _31977_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19444__C _28443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2783 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20413__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29860__D hold11/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14891__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27434__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18845_ _18845_/A _18845_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__17245__B _24820_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_4373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25888__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17960__S _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24155__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25352__A1 _31265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30045__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25352__B2 _31273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18776_ _18776_/X _19196_/D1 _28276_/Q _19196_/B1 _19218_/A2 wire3770/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_188_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15988_ _16415_/A2 wire3276/A _28874_/Q _15988_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22578__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15840__A1 _28806_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2571_A _19397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32416__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23902__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19031__A1 _28160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28092__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17727_ _17539_/C _17726_/X _31725_/D _17524_/B _17723_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_18_4330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19460__B _28448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14939_ _14545_/B _16646_/A2 _14939_/X _15350_/B1 _29281_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_94_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30985_ _30985_/Q _31679_/CLK _30985_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_2368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_1273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_1809 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25104__A1 _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17261__A _30928_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19582__A2 wire2678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_2261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17658_ _31636_/Q _17658_/X _17875_/B _17475_/X _24604_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_223_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_1257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16396__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18790__A0 _28245_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_4344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28905__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26852__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30195__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16609_ VGND VPWR _16942_/S _28103_/Q _29059_/Q _16609_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_207_3391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22469__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23666__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18791__S _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17589_ _17586_/Y _17588_/Y _31713_/D _17524_/B _17585_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XANTENNA__21214__C _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_24 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_197_core_clk _31737_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_92_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31440__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_2169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32566__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19334__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19328_ _28238_/Q _19328_/X _19357_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_207_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31606_ _31606_/Q _32296_/CLK _31606_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_101_3507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_3001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16148__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17345__A1 wire3576/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_126_core_clk _32575_/CLK clkbuf_opt_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_121_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26604__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3809 VPWR VGND _23301_/A1 _18532_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_14_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23202__S _23209_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26604__B2 _26607_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15356__B1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31537_ _31537_/Q _31547_/CLK _31537_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23418__A1 _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19259_ VGND VPWR _19259_/X _19377_/B _19278_/S _28043_/Q _19258_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_69_3048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24615__B1 _24381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25958__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26080__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17200__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_5392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23969__A2 wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_5_25_1_core_clk clkbuf_5_25_1_core_clk/X clkbuf_5_25_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_22270_ _29837_/Q _29839_/Q _29838_/Q _22263_/C _22270_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27609__S _27626_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24244__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31468_ VGND VPWR _31468_/D _31510_/CLK _31468_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__24091__A1 _28537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_1943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31590__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20127__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24091__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15371__A3 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21221_ _21221_/B _29686_/D _21221_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_233_5387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold100 hold100/A hold100/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_30419_ _30419_/Q _30484_/CLK _30419_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26368__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold111 hold111/A hold111/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_271_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27565__C1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3185_A _17267_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold122 hold122/A hold122/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_192_3988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26907__A2 _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31399_ _31399_/Q _32546_/CLK _31399_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14125__A _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_89 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold133 hold133/A hold133/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24541__B _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20652__A1 _31187_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold144 hold144/A hold144/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16856__B1 wire1062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24918__A1 _31103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21152_ VGND VPWR _21166_/S _29595_/Q _27245_/A0 _29595_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20652__B2 _25096_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold155 hold155/A hold155/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20561__S _20562_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3108 VPWR VGND wire3108/X _17913_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19635__B _26898_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold166 hold166/A hold166/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16320__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3119 VPWR VGND wire3119/X _17910_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_86_1982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold177 hold177/A hold177/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_64_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold188 hold188/A hold188/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20103_ _27071_/C1 _20102_/X _20124_/A _28697_/Q _28697_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_core.RAM256_A0[2] wire2415/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24260__C _24260_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16978__C _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold199 hold199/A hold199/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25591__A1 _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23051__C1 _23048_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2407 _20654_/C _20657_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21083_ VGND VPWR _21090_/S wire1792/X _29534_/Q _29534_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25960_ _31524_/Q _31494_/Q _31555_/Q _25934_/C _25960_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_288_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18031__S _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1110_A wire1113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2418 VPWR VGND wire2418/X _14138_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2429 VPWR VGND wire2429/X wire2430/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20404__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16608__B1 wire963/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14882__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27344__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20034_ _20034_/Y _24931_/B wire847/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_24911_ _24941_/A _24911_/Y _19562_/B _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__17805__C1 _17804_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1706 VPWR VGND wire1706/X wire1707/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25891_ VGND VPWR _19538_/B _19628_/A _25911_/B1 _25891_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire1717 VPWR VGND _23536_/S _23385_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_129_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14619__C1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28435__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17281__B1 wire4182/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24146__A2 wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27630_ VGND VPWR _27630_/S _27710_/A1 _32372_/Q _32372_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_184_4151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24842_ VGND VPWR _31065_/D _24842_/B _26509_/D _24842_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_244_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3617_A _30762_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32096__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1671_A wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25894__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_3122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27561_ VGND VPWR _27562_/A _25643_/C _32185_/Q _32177_/Q _25643_/B _32193_/Q _32201_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_210_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_1925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24773_ _24773_/Y _24772_/B _31443_/Q _24772_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XFILLER_180_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30538__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21985_ wire3779/X _21985_/X wire3802/X _21984_/Y _21978_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_247_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18267__A _18332_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27096__A1 _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29300_ _29300_/Q _30057_/CLK _29300_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout1577_A _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_4343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26512_ _26530_/C _26512_/X _17511_/Y _17514_/Y _31758_/Q _26511_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_208_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23724_ _23724_/X _20671_/A _31519_/Q _25566_/B _31567_/Q _20671_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_279_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20936_ VGND VPWR _20947_/S _29401_/Q _29504_/Q _29401_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_39_2151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21405__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27492_ VGND VPWR _27505_/S _27685_/A1 _32307_/Q _32307_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_4192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28585__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17584__A1 _17627_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23106__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25646__A2 _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29231_ _29231_/Q _32071_/CLK _29231_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29830__CLK _30139_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26443_ _26443_/X _17842_/S _26446_/B _26441_/X _17481_/Y _26442_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_88_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23655_ VGND VPWR _23672_/S _27693_/A1 _30785_/Q _30785_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23657__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20867_ VGND VPWR _23519_/S _20866_/X _29362_/Q _29362_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_49_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_3172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_3675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_3792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_1682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1744_A _15537_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19325__A2 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22606_ _22594_/S _22578_/S _22605_/X wire3703/X _22606_/X wire3690/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__16218__C wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29162_ _29162_/Q _32071_/CLK _29162_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30688__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26374_ VGND VPWR _26335_/A _24273_/D _26876_/B _26374_/X _27028_/A wire1351/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_238_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23586_ VGND VPWR _23596_/S _27507_/A1 _30506_/Q _30506_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17336__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20736__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18563__D_N _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20798_ VGND VPWR _20817_/S _29311_/Q _27687_/A1 _29311_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_13_2313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17336__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_49_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31933__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28113_ _28113_/Q _30583_/CLK _28113_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_3913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25325_ _25344_/D _31266_/Q _31268_/Q _31267_/Q _25325_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_256_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26734__A_N _31782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22537_ VGND VPWR _22551_/S _29826_/Q hold493/A _30037_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29093_ _29093_/Q _32442_/CLK _29093_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29980__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15898__A1 _29210_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20891__A1 _20890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28044_ _28044_/Q _30471_/CLK _28044_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_256_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17351__A4 _17350_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19089__A1 wire1816/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20682__D _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25256_ _26238_/A _25255_/X _25264_/A2 hold76/A _31252_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_259_1139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24082__A1 _31142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22468_ VGND VPWR _22448_/C _23393_/A _22449_/A _22468_/X _29995_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_216_5574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22951__S _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24207_ _24207_/X _24207_/B1 _28548_/Q wire4020/X _19715_/C VGND VPWR _24206_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_69_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14570__A1 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22093__B1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21419_ _21419_/C _21419_/B _21422_/B _21419_/D _21679_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_276_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18836__A1 _28279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25187_ _25430_/A _25416_/B _31042_/Q _25187_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_286_5506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22399_ VGND VPWR _22405_/S _29956_/Q _21801_/X _29956_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_219_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14035__A _28462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25547__B hold170/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20643__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16847__B1 wire963/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24909__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29210__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3525 VPWR VGND _26464_/C _31047_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24138_ wire720/A _24136_/X _24209_/B1 _24133_/X _24137_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__23348__A _29737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20471__S _20471_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29995_ _29995_/Q _30410_/CLK _29995_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16311__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2802 VPWR VGND _27155_/S wire2811/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3547 _17433_/A1 _17447_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26374__A3 _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3620 VPWR VGND wire3620/X wire3621/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2824 VPWR VGND wire2827/A _23640_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3631 VPWR VGND wire3631/X _30743_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_98_3200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_1030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16960_ wire992/X _16960_/X _16959_/X _16736_/S _32444_/Q _16960_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28946_ _28946_/Q _32306_/CLK _28946_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24069_ _24079_/B1 _28695_/Q _24069_/X _24069_/A2 _28503_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__30068__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3642 wire3642/X _30695_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_150_3151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout2846 VPWR VGND _21766_/B _21707_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_3894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3653 VPWR VGND _21413_/A _30463_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22396__A1 _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3664 VPWR VGND _23238_/B _30448_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14873__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2930 VPWR VGND _20354_/S _20352_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_15911_ VGND VPWR _16443_/S _28084_/Q _29040_/Q _15911_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_182_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27254__S _27264_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32439__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19261__A1 _28366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16891_ wire3242/X _16910_/A2 _16891_/X _16947_/A2 _28938_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_59_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28877_ _28877_/Q _32117_/CLK _28877_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2952 _19433_/X wire2952/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3697 VPWR VGND _22596_/C _30343_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_4972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2963 VPWR VGND _18631_/S _18657_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29360__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18630_ VGND VPWR _18657_/S hold475/A _28343_/Q _28343_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire2974 VPWR VGND _18598_/S _18625_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24137__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15842_ VGND VPWR _15847_/A _16040_/A2 wire1052/X _15841_/X _15840_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_163_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27828_ VGND VPWR _25801_/D _32537_/Q _32538_/Q _27830_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_150_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16614__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2985 VPWR VGND _18524_/S _18507_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_264_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2717_A wire2718/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23345__B1 hold467/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28928__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14625__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19549__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25885__A2 _19521_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3853_A _23287_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19013__A1 _27999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18561_ _20914_/A _20847_/C _18559_/X _14054_/Y _18561_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20159__B1 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15773_ VGND VPWR wire1541/X _28392_/Q _16387_/C _15773_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_27759_ VGND VPWR _27765_/S _25025_/B _32486_/Q _32486_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23896__A1 _28646_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output218_A wire3499/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23896__B2 wire3508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31463__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17512_ _26530_/C _17512_/X _31747_/Q _17509_/X _31758_/Q _17514_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__19564__A2 wire2660/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14724_ wire3249/X wire1750/X _14724_/X _15296_/B1 _29243_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_280_3769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_2863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_14_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18492_ VGND VPWR _18499_/S wire3832/X _28265_/Q _28265_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30770_ _30770_/Q _31607_/CLK _30770_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16378__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17575__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_540 _30576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18772__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26834__A1 _31867_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_551 _30648_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_2115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17443_ VGND VPWR _17443_/X wire2063/X _17441_/X _17302_/A hold38/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_562 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29429_ _29429_/Q _30433_/CLK _29429_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23811__A _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_5029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14655_ wire3249/X wire1727/X _14655_/X _14705_/B1 _28807_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__23648__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_573 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27952__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_290_core_clk _31310_/CLK clkbuf_opt_25_4_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_584 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_595 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32440_ _32440_/Q _32440_/CLK _32440_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_1181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17374_ wire3564/A _31920_/Q _17374_/X _17446_/B2 _17374_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_50_3759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14586_ _14596_/A _14823_/C1 _14579_/X _14581_/X wire1089/X _14585_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_196_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17327__A1 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20646__S _20646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22320__A1 _14534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_3605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmgmt_core_wrapper_4212 flash_io3_do mgmt_core_wrapper_4212/HI VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 XANTENNA__22427__A _22427_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output587_A _28689_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23022__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19113_ _19110_/X _19111_/X _19113_/X wire1942/A _19112_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_87_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24860__A3 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16325_ _16325_/X _29115_/Q _16934_/A2 _16960_/B2 _16458_/S _16324_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20331__A0 _28871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32371_ _32371_/Q _32557_/CLK _32371_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26598__B1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17878__A2 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14644__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18116__S _18119_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_4954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15889__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17020__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28308__CLK _30233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31322_ _31322_/Q _31363_/CLK _31322_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29855__D _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19044_ _19189_/A2 _14101_/A _19043_/X _28387_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_274_2817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16256_ _16256_/X _16814_/B1 _16255_/X _28921_/Q _16805_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__27429__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25738__A _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24073__A1 _31173_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24073__B2 _31141_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16550__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25270__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15207_ _15207_/X _15640_/C1 _15200_/X _15202_/X _15226_/B _15206_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17955__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22084__B1 _30332_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31253_ hold92/A _32287_/CLK _31253_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_174_3663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18827__A1 _18826_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19736__A _25039_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14561__B2 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16187_ VGND VPWR _16566_/S _32423_/Q _32351_/Q _16187_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22623__A2 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1385_A wire1386/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput216 _32597_/X clk_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20095__C1 _26148_/A VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__buf_12 XANTENNA__20381__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31184_ _31184_/Q _32498_/CLK _31184_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput249 _14023_/Y la_iena[117] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16302__A2 wire892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28458__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14849__C1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15475__S _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13784__A _13784_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_3972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23179__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24376__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30135_ hold434/A _30470_/CLK _30135_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19946_ _19945_/X _28621_/Q _28621_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15069_ _15055_/X _15068_/X _15319_/B _15059_/X _15069_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_61_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26770__B1 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22387__A1 wire3442/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14864__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27164__S _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold22_A hold22/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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NF_sky130_ef_sc_hd__decap_12 XANTENNA__21506__A _21506_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18759_ _19200_/B _27891_/Q _18758_/X _18759_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23887__A1 wire4132/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2761_A _19641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_378_core_clk _30411_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_129_2728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23887__B2 wire4019/X VGND VPWR VPWR VGND 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XFILLER_14_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19410__S _19417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_5432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3100_A _17276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24300__A2 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23440_ _23440_/Y _29373_/Q _29831_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_123_2327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_4641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20652_ _20652_/X wire1877/X _25096_/B1 _24246_/B _31187_/Q _24260_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__23440__B _29373_/Q VGND VPWR VPWR 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VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1959_A _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21889__A0 _21879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15280__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17105__S wire886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18203__C1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27544_ VGND VPWR _27542_/Y _27594_/B _31382_/Q _27544_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_180_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24756_ _31460_/Q _24648_/B _24755_/Y _24757_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_input116_A la_input[49] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_161_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21968_ _21501_/A _21956_/A _21968_/Y _21624_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22946__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23303__A1_N _21285_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23053__D _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22550__A1 _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18754__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26816__A1 _31858_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23707_ _30810_/D _23807_/B _23707_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_223_2716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15568__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20919_ VGND VPWR _23365_/S wire3987/A _20918_/X _29386_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27475_ VGND VPWR _27475_/S _32294_/Q _32295_/Q _27475_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24687_ VGND VPWR _24687_/B _24687_/Y _31451_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_180_3188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21899_ _22061_/S hold232/A _21900_/A _22071_/C _21915_/A _21554_/A hold354/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_226_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31270__D _31270_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25095__A3 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24446__B _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29214_ _29214_/Q _32420_/CLK _29214_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_197_5087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14440_ _14435_/Y _21846_/A wire1855/A _14442_/B _14409_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_4 XANTENNA_wire2200_A wire2201/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26426_ _31694_/Q _31693_/Q _31692_/Q _26423_/D _31695_/Q _26426_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_123_4296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23638_ _23638_/Y _31085_/Q wire1354/X _24874_/C wire1292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XANTENNA__17309__A1 _32300_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20466__S _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_12_0_core_clk clkbuf_opt_12_1_core_clk/A clkbuf_5_8_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__21105__A2 _21104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22302__A1 _29888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16780__A2 wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21736__S0 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19703__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29145_ _29145_/Q _32324_/CLK _29145_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13869__A _28628_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14791__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14371_ _31000_/Q _24407_/D _31004_/Q _31003_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 X_26357_ _26356_/X _31666_/Q _31666_/D wire781/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_178_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_350_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16517__C1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23569_ VGND VPWR _23573_/S _27140_/A1 _30489_/Q _30489_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire811 VPWR VGND wire811/X wire811/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_14_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_4973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_4924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27757__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32111__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26044__A2 _26055_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16110_ _16109_/X _16491_/S _16563_/A2 _29311_/Q _16110_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire833 wire833/X wire833/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_input81_A la_input[17] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25308_ VGND VPWR _31262_/Q _25303_/D _25341_/A _25308_/X _31265_/Q _31264_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_87_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17090_ _21447_/B _22756_/C _29887_/Q _21630_/B1 _21623_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XANTENNA__27249__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29076_ _29076_/Q _29390_/CLK _29076_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26288_ _26287_/Y _27117_/C1 _31632_/Q _26331_/B _31632_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_178_3095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15335__A3 _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24055__B2 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16532__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire877 VPWR VGND wire877/X wire877/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_212_5213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16041_ _16036_/X wire890/X _16041_/A1 _16040_/X _16041_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28027_ _28027_/Q _30454_/CLK _28027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_249_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14543__A1 _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25239_ _25239_/X _25261_/B1 hold11/A hold97/A _25197_/D VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18809__A1 _28376_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28600__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15740__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29726__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25277__B _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_3254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20077__C1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3300 VPWR VGND _15560_/A1 wire3306/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20616__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_4242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3311 VPWR VGND _25776_/C _25660_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32261__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3322 VPWR VGND _26771_/A _26687_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3333 wire3362/A _27071_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_212_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4140 VPWR VGND wire4140/X _28453_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3344 VPWR VGND wire3345/A wire3362/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16296__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15099__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19706__D _20120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19800_ _27077_/C1 _19799_/X _19852_/A2 wire4129/X _28552_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 Xwire4151 VPWR VGND wire4151/X _28376_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20092__A2 wire2682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3355 VPWR VGND _26498_/A _25595_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17493__B1 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24358__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30703__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4162 VPWR VGND _19178_/A _27879_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_4012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31829__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_4635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16835__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17992_ VGND VPWR _18018_/S wire3896/X _27926_/Q _27926_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29978_ _29978_/Q _32294_/CLK _29978_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire4173 VPWR VGND wire4173/X wire4174/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_61_2439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23566__A0 _30486_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19704__D_N _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22369__A1 _30473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4184 VPWR VGND _23402_/A input3/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14448__A_N _29453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3970_A _23201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14846__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4195 VPWR VGND wire4195/X wire4196/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28750__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19731_ _25718_/A _19730_/X _19772_/A _13975_/A wire770/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_238_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3461 VPWR VGND wire3461/X _23776_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29876__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16943_ wire1552/X _16943_/A1 _29004_/Q _16943_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28929_ _28929_/Q _32321_/CLK _28929_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_43_2862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3472 wire3473/X wire3472/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22710__A _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3494 VPWR VGND _25341_/A _31263_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1953 _19180_/B _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21041__A1 hold493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2760 VPWR VGND _24276_/C _14137_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18588__A3 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1964 _18679_/Y wire1968/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31940_ _31940_/Q _32114_/CLK _31940_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19662_ _26773_/C _20128_/A _19662_/A _19662_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xwire2771 VPWR VGND wire2771/X hold189/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16874_ wire3242/X _16874_/A2 _16874_/X _16934_/A2 _29002_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__23318__A0 _17087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1986 wire1997/X _19203_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire4048_A wire4049/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17796__A1 _31648_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17483__D_N _26502_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19722__C _20654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2793 VPWR VGND _27505_/S _27503_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_185_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18993__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17796__B2 _19504_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30853__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18613_ VGND VPWR _18615_/S wire3846/X _28327_/Q _28327_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_228_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27712__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31979__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15825_ wire985/X _15825_/X _15824_/X _16249_/S _29456_/Q _16832_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_20_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19593_ VPWR VGND _19756_/A _19594_/B _19566_/A VGND VPWR NF_sky130_fd_sc_hd__and2b_2 XANTENNA_output502_A wire4059/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31871_ hold269/A _31871_/CLK _31871_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29106__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_137_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_2649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19537__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30822_ _30822_/Q _32125_/CLK _30822_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18544_ VGND VPWR _18544_/X _22078_/D _22078_/C _30440_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_37_2600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_206_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1133_A wire1134/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21045__B _30041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15756_ VGND VPWR _15756_/S _32444_/Q _32372_/Q _15756_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_15_4322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_400_core_clk _30758_/CLK clkbuf_opt_9_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15008__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22541__A1 hold444/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17548__B2 _31707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26268__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18745__B1 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20001__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19942__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14707_ _14707_/X _14823_/C1 _14704_/X _14706_/X wire1081/X _14702_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_241_2805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15559__B1 wire1113/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30753_ _30753_/Q _32540_/CLK _30754_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18475_ VGND VPWR _18498_/S wire3889/X _28248_/Q _28248_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31209__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15687_ VGND VPWR _15687_/X _15692_/S _15749_/C1 _15686_/X _15685_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__24818__B1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_370 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16220__A1 _29314_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_381 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26283__A2 _14194_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27480__A1 _32298_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16220__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28130__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_392 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17426_ wire3562/X _31929_/Q _17426_/X wire3558/A wire2073/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_15_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29256__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14638_ _14638_/X _29520_/Q _14637_/X _15597_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_clkbuf_leaf_288_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30684_ hold299/A _32401_/CLK _30684_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23097__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_5430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22157__A _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25491__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_3236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32423_ _32423_/Q _32423_/CLK _32423_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13779__A _31167_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14782__A1 _30892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17357_ _30942_/Q _17357_/X _30976_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_271_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14569_ VGND VPWR _15629_/A2 _28081_/Q _14568_/X _14569_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_89_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26035__A2 _14396_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27232__A1 _32107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30233__CLK _30233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16308_ VGND VPWR _16948_/S _29598_/Q _29630_/Q _16308_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_217_5168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27159__S _27167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31359__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32354_ _32354_/Q _32426_/CLK _32354_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24046__A1 _28501_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17288_ _17447_/A1 input201/X _17293_/A _17447_/B2 wire4181/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22591__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25243__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24046__B2 _28597_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_2171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27386__C hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28280__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19027_ _19027_/X _19024_/X _22090_/B1 _19026_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_157_3168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31305_ _31305_/Q _31310_/CLK _31305_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_135_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16239_ _16817_/A2 _16817_/A1 _29017_/Q _16239_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_252_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19466__A _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32285_ _32285_/Q _32568_/CLK _32285_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30524__D _30524_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25187__B _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1767_A _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2607_A _14266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20607__A1 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31236_ hold97/A _32296_/CLK _31236_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__17079__A3 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26338__A3 _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23419__C _23421_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30383__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16287__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21000__S _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20083__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24349__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31167_ VGND VPWR _31167_/D _32551_/CLK _31167_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_22_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26743__B1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 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XFILLER_96_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16039__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17236__B1 _21609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19405__S _19415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22940_ VGND VPWR _23342_/A _30452_/Q _30117_/Q _30117_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3050_A _18113_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30049_ _30049_/Q _30466_/CLK _30049_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23309__A0 _20987_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22780__A1 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21583__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24506__C1 _24490_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27622__S _27626_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_5480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20791__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22871_ _22871_/A _22871_/X _22871_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_228_3851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_1974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16995__C1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15262__A2 _15751_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24610_ _24610_/B _24610_/X _31547_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__26746__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21822_ VGND VPWR _21822_/S _22067_/B _21712_/X _21822_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_2536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24521__A2 _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19790__B_N _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25590_ _25582_/X hold111/A hold116/A _24493_/X _25590_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_142_4138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_141_core_clk _32127_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_59_2880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17894__A_N _24610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14470__B1 _29698_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20138__A3 _20175_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24541_ VGND VPWR _24541_/C _31042_/Q _24570_/B _31043_/Q _25578_/C VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__20543__A0 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_1939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21753_ wire831/A _21853_/B _21752_/X _17017_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_241_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18545__A _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32134__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27471__A1 _32292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20704_ VGND VPWR _20716_/S _29220_/Q _27247_/A0 _29220_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27260_ VGND VPWR _27260_/S _32135_/Q _27705_/A1 _32135_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23170__B _23170_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24472_ _24470_/C _25109_/B _24471_/Y _31032_/D wire798/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_244_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20286__S _20292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24285__A1 _31664_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21684_ _21684_/X _21641_/X _21683_/Y _21680_/X _21664_/X _21662_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XPHY_1116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22067__A _22067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24285__B2 _31587_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16762__A2 wire1029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26762__A _26902_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23601__D _24881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17124__A_N _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26211_ _31594_/Q _26227_/A2 _26212_/B _32284_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22296__A0 _29141_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_5213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23423_ _23423_/Y _29358_/Q _29816_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_14_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20635_ VGND VPWR _20639_/S wire1792/X _29181_/Q _29181_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_68_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27191_ _27191_/X _32088_/Q _32089_/Q _27194_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__28623__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3684_A _30418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29749__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19161__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26026__A2 _14396_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26142_ VGND VPWR _26019_/A _19547_/X _26141_/X _31560_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_23354_ _23354_/B _30333_/D _23354_/A _23354_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_239_4692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25378__A _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold111_A hold111/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24037__A1 _28532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20566_ VGND VPWR _20584_/S _27247_/A0 _29082_/Q _29082_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32284__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17711__A1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24037__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold209_A hold209/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17711__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22048__A0 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2735 VPWR VGND _26943_/B2 _19631_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_27_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22305_ VGND VPWR _23372_/S _29891_/Q hold236/X _29891_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17595__S _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30726__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25785__A1 hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26073_ _31538_/D _26020_/Y _23611_/D _31538_/Q _26120_/A2 VGND VPWR _26072_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_wire3851_A wire3852/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15722__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23285_ VGND VPWR _23286_/S _23285_/A1 _30267_/Q _30267_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2757 _23879_/C _20673_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_287_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20497_ VGND VPWR _20504_/S _27689_/A1 _29015_/Q _29015_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_4810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3949_A _21616_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22388__A2_N wire3412/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20059__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19807__C _27068_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22514__B _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23796__B1 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25024_ _25660_/A _25023_/X _25082_/A2 _31155_/Q _31155_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_252_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29901_ _29901_/Q _31931_/CLK _29901_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28773__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22236_ _22236_/B _22236_/Y _22236_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__24993__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29899__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19464__A1 _28448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_3265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19526__D _19849_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21271__A1 _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20074__A2 _19551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29832_ _29832_/Q _30475_/CLK _29832_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_47_2272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18672__C1 _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22167_ _22167_/A1 _22166_/X _22167_/X _30100_/Q wire2284/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_278_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold480_A hold480/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14289__B1 wire3725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14313__A _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23548__A0 _30039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20034__B _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput580 _31097_/Q la_output[6] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2001 VPWR VGND wire2001/X wire2002/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14828__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1205 _15509_/A1 _15762_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_44_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput591 wire3513/X la_output[7] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_268_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2012 VPWR VGND wire2012/X wire2013/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_57_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21118_ VGND VPWR _21129_/S _27689_/A1 _29562_/Q _29562_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30876__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1216 VPWR VGND _15286_/C1 wire1221/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19216__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23626__A _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2023 VPWR VGND wire2023/X _17402_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29763_ _29763_/Q _31914_/CLK hold428/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28003__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22098_ VGND VPWR _22180_/S _30290_/Q _30380_/Q _22098_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24221__S _24234_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26975_ _31973_/D _31973_/Q _26973_/Y _27009_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 Xwire2034 _22846_/A _14404_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1238 _24284_/D _24273_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29129__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2045 wire2046/X _17302_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_268_3653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15843__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2056 wire2057/X wire2056/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28714_ _28714_/Q _31460_/CLK _28714_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_3229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19767__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22220__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2150_A _19774_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13940_ _28557_/Q _13940_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire2067 wire2068/X wire2067/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_25926_ _31480_/Q _25926_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_21049_ _21049_/Y _30044_/Q _21051_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_25_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_5217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27829__A3 _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29694_ hold410/A _29697_/CLK _29694_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire2078 wire2078/X wire2078/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_186_4087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_1086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2248_A wire2248/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17778__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_229_core_clk _32562_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_166_3927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2089 wire2090/X wire2089/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_112_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18975__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22771__A1 _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1355 VPWR VGND wire1355/X _19713_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_77_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28645_ VGND VPWR _28645_/D _32434_/CLK _28645_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25857_ _25859_/B _31449_/Q _25860_/D _31450_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 X_13871_ _13871_/Y _28626_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__30106__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20050__A wire850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_2373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16450__A1 wire921/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15253__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15610_ _15609_/X _15610_/B1 _15610_/A2 _30914_/Q _15610_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_164_3640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26656__B _31788_/Q VGND VPWR VPWR VGND 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_31424_/Q _31423_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22523__A1 _29812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18727__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_3897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_1405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15541_ VGND VPWR _15716_/S _29481_/Q _32135_/Q _15541_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27527_ _32333_/Q _27597_/B2 _32333_/D _27526_/X _27525_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_125_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20534__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24739_ _24770_/A _31472_/Q _24738_/Y _24740_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_227_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21877__A3 hold232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15005__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19050__S _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18260_ _29340_/Q _18295_/B _29342_/Q _18215_/D _18259_/X _18260_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XANTENNA__30256__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23080__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15472_ _15472_/X _15646_/B1 _15471_/X _29061_/Q _15546_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27458_ VGND VPWR _27476_/S _32287_/Q _27457_/X _32287_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20196__S _20202_/S VGND VPWR VPWR VGND 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_30452_/Q _21645_/A _14429_/B _14420_/Y _14422_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 XFILLER_103_3955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26409_ _26408_/Y _26427_/B _31689_/Q _26420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22287__B1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18191_ _18192_/B _18190_/X _22370_/A2 _29743_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_275_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2784_A _27614_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27389_ VGND VPWR _27394_/S _32239_/Q _27270_/X _32239_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2991 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27214__A1 _32099_/Q VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__decap_3 XFILLER_45_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3970 VPWR VGND _23199_/S _23201_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22039__B1 _22034_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17073_ _29997_/Q _22484_/A2 _17073_/X _30385_/Q _16971_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_wire2951_A _20291_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29059_ _29059_/Q _32571_/CLK _29059_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15713__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14285_ _14300_/B _14245_/B _14285_/Y _22598_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_6_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2634 VGND VPWR VGND VPWR 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_16839_/A1 _16014_/X _16024_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_256_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_3062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32070_ _32070_/Q _32441_/CLK _32070_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27707__S _27707_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_5065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16269__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3130 wire3133/A _22779_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_3163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20065__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31021_ _31021_/Q _32293_/CLK _31021_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21262__A1 _29724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17466__B1 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22143__C _29819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25528__A1 _31343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26725__B1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1083_A wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4165_A input73/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21801__A3 _21471_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23539__A0 _30030_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32007__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2451 _24210_/Y _24234_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24200__A1 _28580_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17975_ VGND VPWR _17981_/S wire3836/X _27912_/Q _27912_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout2462 _23253_/S _23250_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_171_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22440__A _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24200__B2 _28484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16849__S wire979/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19714_ _23879_/B _20669_/C _19926_/B _19776_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XANTENNA_wire1250_A _24150_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16926_ VGND VPWR _16926_/X _16923_/X _16967_/A1 _16930_/A1 _16925_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_38 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1761 VPWR VGND _23808_/A3 _23865_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_169_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17769__A1 _31728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17769__B2 _31727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2484_A _20997_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1794 VPWR VGND _17685_/A _17526_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27442__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_4894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31923_ _31923_/Q _31923_/CLK _31923_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19645_ _25881_/B wire868/A _19645_/A _24467_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_282_2905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16857_ wire705/A _16848_/X _16856_/X _16950_/A1 _16852_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_56_3710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32157__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16441__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15808_ VGND VPWR _15808_/X _16040_/A2 wire1032/X _15805_/X _15807_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25700__A1 _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_2949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19576_ _26913_/A _19575_/Y _19638_/A _28465_/Q _28465_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31854_ _31854_/Q _32583_/CLK _31854_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1515_A wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16788_ VGND VPWR _16837_/S _29234_/Q _29298_/Q _16788_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_228_2457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22586__S _22586_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_2173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18718__B1 _19196_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2651_A _19555_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30805_ _30805_/Q _32438_/CLK _30805_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18527_ VGND VPWR _18531_/S wire3827/X _28299_/Q _28299_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_2640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20525__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15739_ VGND VPWR _15739_/X _15736_/X _15738_/X wire1134/X wire1209/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_15_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28646__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30519__D _30519_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31785_ _31785_/Q _32293_/CLK _31785_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19391__A0 _28407_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_2955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26256__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27453__A1 _32283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19930__A2 _19984_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30736_ hold272/A _32499_/CLK input56/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18458_ VGND VPWR _18458_/S _18617_/A1 _28232_/Q _28232_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27678__A _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31181__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17941__A1 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15401__C1 wire1209/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17409_ wire3564/X _31926_/Q _17409_/X _17441_/B2 _17409_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_102_3432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14755__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30749__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18389_ VGND VPWR _18389_/S wire3841/X _28166_/Q _28166_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30667_ _30667_/Q _30667_/CLK hold254/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_236_5544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21222__C _23355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19143__B1 _19143_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26008__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20828__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20420_ _29454_/D _29452_/D _29453_/D _20453_/B _20453_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_32406_ _32406_/Q _32513_/CLK _32406_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24019__A1 _31104_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2009 VPWR VGND _27237_/A0 _21070_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_271_5468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24019__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30598_ hold497/A _31879_/CLK _30598_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_200_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_2411 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26413__C1 _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length899_A wire898/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23210__S _23212_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20351_ VGND VPWR _20354_/S _27701_/A1 _28891_/Q _28891_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32337_ VGND VPWR _32337_/D _32538_/CLK _32337_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_274_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15704__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1308 VPWR VGND _20175_/B _20191_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_66_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18304__S _18329_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3098_A _17291_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22334__B _22334_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23778__B1 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24975__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23070_ _29711_/Q wire3739/X _23145_/A _23070_/X _23170_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__30899__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27617__S _27620_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20282_ VGND VPWR _20282_/S _27698_/A1 _28824_/Q _28824_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_4320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32268_ _32268_/Q _32531_/CLK _32268_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_176_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23242__A2 _18498_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28026__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24830__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27844__C _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22021_ hold267/A _22074_/B1 _29801_/D _22020_/Y _22019_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_63_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21253__A1 _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_5364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25519__A1 _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31219_ _31219_/Q _32560_/CLK _31219_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_9_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15229__A _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19997__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_1044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23793__A3 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32199_ _32199_/Q _32467_/CLK _32199_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14133__A _14133_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1023_A wire1030/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_4397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19643__B _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30129__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold15 hk_dat_i[23] hold15/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25364__C _31273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_393_core_clk _30449_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_275_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold26 hold26/A hold26/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__22202__A0 _30394_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17209__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15483__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16680__A1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19749__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13972__A _28525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14140__C1 _14139_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold37 hold37/A hold37/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_265_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26760_ _26760_/Y _23776_/A _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA_wire3432_A hold328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28176__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold48 hold48/A hold48/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23165__B _23170_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23972_ _28462_/Q _26838_/A1 _23972_/X _28590_/Q _24046_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_268_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold59 hk_dat_i[18] hold59/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_243_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_322_core_clk _28363_/CLK clkbuf_opt_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_5_1237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14691__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18957__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29421__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18259__B _29342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25711_ _25710_/Y _20680_/C _25731_/B _25722_/D _25733_/C wire836/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a41o_2 XANTENNA__23950__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27352__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25661__A _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22923_ _22935_/A _22922_/X _22913_/A _22921_/X _22929_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_59_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26691_ _26687_/A _25884_/B _14216_/A _19558_/A _26687_/D _26692_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XFILLER_74_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout748_A wire753/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16432__A1 wire911/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27692__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28430_ _28430_/Q _32426_/CLK _28430_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25642_ _25642_/C _31380_/D _25750_/A _25642_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_272_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30279__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25380__B _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22854_ _22935_/A _22834_/B _22843_/A _22855_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_129_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21308__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22505__A1 _17205_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18709__B1 wire1949/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15640__C1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1751_A fanout1749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23702__B1 _26694_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21805_ wire3206/A _21804_/X _21797_/X _21830_/B _21805_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_202_5256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28361_ _28361_/Q _32078_/CLK _28361_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14994__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25573_ VGND VPWR _31366_/Q _25571_/C _31367_/Q _25573_/X wire2814/X _31368_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_227_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22785_ _30100_/D _30100_/Q _22784_/Y _22807_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_55_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3899_A wire3901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29571__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1657_A wire1660/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19382__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27444__A1 _32280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27312_ VPWR VGND _27322_/C _31386_/Q hold143/A VGND VPWR NF_sky130_fd_sc_hd__and2b_2 XFILLER_209_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_2112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19921__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24524_ _24516_/X _24539_/A _24522_/Y _24520_/Y _24515_/Y _24523_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_205_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21736_ _21746_/S _29776_/Q _21736_/X _21999_/S1 _21360_/A _14353_/B hold273/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_103_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28292_ _28292_/Q _32074_/CLK _28292_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21413__B _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24258__A1 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_3_2_0_core_clk_A clkbuf_3_3_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17932__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26492__A _31703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_4315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27243_ VGND VPWR _27255_/S _32118_/Q _27688_/A1 _32118_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14746__A1 wire1221/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24455_ _24442_/C _27051_/A _24453_/Y _31023_/D wire798/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__15943__B1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21667_ _22048_/S _21668_/B _21668_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_218_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14308__A _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31674__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_3321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_5081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_2872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24724__B _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23406_ _23403_/B wire3442/X _23405_/Y _23406_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14293__A_N _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20618_ VGND VPWR _27485_/D _27598_/C _21173_/B _20618_/X _24210_/B VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_276_3966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27174_ _32080_/D hold242/A hold396/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_10_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19685__A1 _28503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27100__B _27100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24386_ _17889_/D _24389_/A _24386_/A _24389_/B _24638_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XANTENNA__20744__S _20749_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length3244 VPWR VGND _15598_/A1 _14102_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_235_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25207__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27720__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24216__S _24234_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21598_ _21603_/B _21598_/B _21598_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_27_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length3255 VPWR VGND _15507_/A1 _14545_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_14_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2521 VPWR VGND _20720_/S _20717_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_158_2028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_2252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26125_ VGND VPWR _26121_/X _31553_/Q _14399_/B _26125_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__25758__A1 _27185_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3277 VPWR VGND wire3276/A wire3278/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23337_ VGND VPWR wire820/X _30315_/Q _17237_/X _30315_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_120_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20549_ VGND VPWR _20550_/S _29066_/Q _27708_/A1 _29066_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_136_3016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2543 VPWR VGND _20425_/S _20449_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_27_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input183_A mprj_dat_i[18] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18214__S _18321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_1939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2198_A _19748_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17160__A2 _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14070_ _20909_/B _30422_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__23624__A2_N wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26056_ VGND VPWR _26062_/D _31534_/Q _14399_/B _26056_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19437__A1 wire2952/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25836__A _25836_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23268_ VGND VPWR _23268_/S _29516_/Q _30251_/Q _30251_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15171__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23233__A2 _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24430__A1 _31014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24740__A _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1864 VPWR VGND _22938_/B _22807_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_213_5396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25007_ _25810_/C _25006_/X _25017_/A2 _31147_/Q _31147_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20047__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_3314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17448__B1 _17446_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19988__A2 _19988_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22219_ _22218_/X _22509_/C1 wire828/X _29831_/Q _29831_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_23_3208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22441__B1 _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26707__B1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24981__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2365_A wire2366/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23199_ VGND VPWR _23199_/S _30191_/Q _30121_/Q _30191_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14043__A _28454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17999__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3205_A _14408_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28519__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_5448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21795__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1002 VPWR VGND _16447_/A2 wire1005/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29815_ VGND VPWR _29815_/D _30198_/CLK _29815_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_input44_A irq[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22898__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27380__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1013 VPWR VGND _16835_/B1 _15768_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26183__B2 _32270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_1_1_core_clk clkbuf_opt_1_1_core_clk/X clkbuf_opt_1_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_2285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1024 wire1030/X _16964_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31054__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16671__A1 _16657_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24194__B1 _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19045__S _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1046 VPWR VGND wire1048/A wire1053/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_4195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29746_ _29746_/Q _31910_/CLK hold158/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2532_A _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17760_ _17521_/X _17759_/X _31728_/D _17524_/B _17756_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_27_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1057 wire1060/A wire1058/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23075__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14972_ _15515_/A2 _14972_/X _14971_/X _15356_/A2 _29313_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_229_4157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26958_ _27006_/C _27009_/B _27006_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_79_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22744__A1 _30096_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18948__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1079 VPWR VGND wire1081/A _14559_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_112_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1141 VPWR VGND _14818_/S _14820_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16711_ _16965_/A2 _16952_/A1 _29543_/Q _16711_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_78_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27262__S _27262_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1152 VPWR VGND wire1152/X wire1152/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13923_ _28574_/Q _13923_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25909_ VGND VPWR _19574_/B _19566_/A _25911_/B1 _25909_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_97_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17691_ _17539_/C _17690_/X _31722_/D _17783_/B2 _17687_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_207_5167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29677_ _29677_/Q _30359_/CLK _29677_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28669__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26889_ _26893_/C1 _26888_/Y wire752/A _31894_/Q _31894_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_182_3025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16423__A1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_5632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26386__B _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27683__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19430_ _28439_/Q _19429_/B _19429_/D _31338_/Q _19430_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA__26486__A2 _31704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17620__B1 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29914__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16642_ _16841_/A2 _16642_/X _16641_/X _16720_/C1 _29607_/Q _16642_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_28628_ _28628_/Q _32544_/CLK _28628_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_5_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3099 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13854_ _28643_/Q _13854_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_108_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_4477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20919__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_7_0_core_clk clkbuf_3_7_1_core_clk/A clkbuf_3_7_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__25694__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16974__A2 _30318_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22076__A_N _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15631__C1 _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_207_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26891__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_5522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19361_ _28402_/Q wire1405/A _28402_/D _19349_/X _19360_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_147_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14985__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16573_ VGND VPWR _16573_/X _16964_/B1 wire1060/X _16572_/X _16571_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28559_ _28559_/Q _30580_/CLK _28559_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_90_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13785_ _31161_/Q _13785_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_277_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14917__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3741_A _30224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18176__A1 wire3908/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2999_A _18452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19373__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27435__A1 _32274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18312_ _18312_/B _18312_/Y _18328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_223_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16187__A0 _32351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19912__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15524_ VGND VPWR _15750_/S _28429_/Q _29094_/Q _15524_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_1246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21180__A0 wire2002/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19292_ _19291_/X _20876_/S _19289_/X _19283_/S _19292_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31570_ _31570_/Q _31570_/CLK _31570_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_16_3760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25446__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16726__A2 _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17923__A1 wire3898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18243_ VGND VPWR _18317_/S _28093_/Q _21153_/A0 _28093_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30521_ _30521_/Q _32431_/CLK hold443/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14737__A1 wire1221/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15455_ VGND VPWR _15454_/Y _15452_/Y _15640_/C1 _15455_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20193__B_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25997__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_5_11_0_core_clk_A clkbuf_4_5_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32554__D input39/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_5121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14218__A _26502_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14406_ _14406_/Y wire3213/A _14404_/B _22661_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_195_2707 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30452_ VGND VPWR _30452_/D _30452_/CLK _30452_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18174_ VGND VPWR _18174_/X _18244_/A _18201_/A _18229_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_236_4139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15386_ _15751_/A1 _16874_/A2 _15386_/X _15738_/A2 _29293_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_253_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22275__A3 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28049__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output667_A wire2326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23030__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17125_ _30003_/Q _22512_/A2 _17125_/X _29431_/Q _17234_/B2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__17687__B1 _31722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25749__A1 _31413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14337_ _21459_/D _29875_/Q _14353_/B _14334_/B _23115_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_237_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17529__A _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30383_ _30383_/Q _30433_/CLK _30383_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18124__S _18144_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17151__A2 _14092_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19447__C _28444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21696__D _21696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32122_ _32122_/Q _32122_/CLK _32122_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29863__D _29863_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17056_ _17056_/X _17055_/X _17094_/A _17052_/X _21653_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__27437__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19428__A1 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14268_ _14127_/A _14268_/B _14268_/X _29956_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_214_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_5474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17248__B _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24650__A _24666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_4197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21235__A1 _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16007_ _16007_/X _29277_/Q _16448_/A2 _16448_/A3 _15975_/S _16006_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_271_1916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17963__S _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19979__A2 _19618_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32053_ _32053_/Q _32427_/CLK _32053_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19744__A _25047_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24972__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28199__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14199_ _14300_/B _14300_/A wire3497/X _14199_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18100__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21786__A2 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31004_ _31004_/Q _31748_/CLK _31004_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_45_2765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29444__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27371__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16111__B1 wire1035/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20994__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24185__B1 _28642_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16662__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13792__A _13792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_2269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25921__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17958_ VGND VPWR _17983_/S wire3894/X _27895_/Q _27895_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14673__A0 _29274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22196__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18939__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30421__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22735__A1 _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31547__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23932__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire716_A wire716/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1580 VPWR VGND _24081_/A3 _24186_/A3 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16909_ _16911_/A2 _16909_/X _16908_/X _16928_/B1 _28971_/Q _16960_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_93_3718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20746__A0 _29261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_4691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17889_ VGND VPWR _24459_/B _26903_/A _24593_/A _24384_/D _17889_/D VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_148_2219 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29594__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15217__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_2844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17611__B1 _19512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19628_ _19628_/B _19628_/X _19628_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 X_31906_ VGND VPWR _31906_/D _32572_/CLK _31906_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_108_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16965__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23205__S _23221_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21514__A _30355_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19559_ _19628_/A _19559_/X _19559_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31837_ _31837_/Q _31837_/CLK _31837_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30571__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31697__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19364__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27426__A1 _32271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26229__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18706__A3 _18703_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19903__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22570_ VGND VPWR wire3703/X _22605_/C _22578_/S _22570_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__21171__A0 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22502__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24247__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31768_ _31768_/Q _31869_/CLK _31768_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_104_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17375__C1 _17373_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16717__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27521__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25420__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21521_ _21941_/A _21521_/A _21521_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__14728__A1 wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30719_ _30719_/Q _32309_/CLK _30719_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_198_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15925__B1 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31699_ _31699_/Q _31748_/CLK _31699_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19116__B1 _19115_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24240_ VGND VPWR _24241_/S _30916_/Q _27708_/A1 _30916_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_5363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21452_ _21812_/C _21548_/A _21548_/B _21451_/Y _30344_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_178_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20564__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19638__B _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[0] wire2318/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18542__B _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20403_ VGND VPWR _20408_/S _24227_/A0 _28925_/Q _28925_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17678__B1 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13967__A _13967_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24171_ _30571_/Q _19641_/C _24171_/X _32569_/Q _24317_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_254_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21383_ _21649_/D _30350_/Q _21551_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA_wire3382_A wire3383/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26937__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18034__S _18034_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1140_A wire1152/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1105 VPWR VGND wire1104/A fanout1103/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_63_4234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1238_A _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26401__A2 _14194_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23122_ hold253/A _23157_/A2 _23122_/X _30102_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__24948__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27347__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20334_ VGND VPWR _20338_/S _27684_/A1 _28874_/Q _28874_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19419__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16350__B1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18890__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31077__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20029__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27205__D_N _32095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21226__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27930_ _27930_/Q _28326_/CLK _27930_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23053_ VGND VPWR _29707_/Q _23115_/B _23053_/X _23053_/D _23061_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__19654__A _19654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20265_ VGND VPWR _20269_/S wire2012/X _28807_/Q _28807_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24963__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30712__D input87/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32322__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3647_A _30529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27588__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22004_ _21659_/A _22004_/Y _21659_/Y wire3145/X _21659_/B _21712_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__25806__D _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27362__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16102__B1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27861_ _27861_/Q _28275_/CLK _27861_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17445__A3 _30886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20196_ VGND VPWR _20202_/S _28741_/Q _27679_/A1 _28741_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16489__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput105 VGND VPWR _30678_/D la_input[39] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA_fanout865_A _19715_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput116 VPWR VGND la_input[49] _30658_/D VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 X_29600_ _29600_/Q _32125_/CLK _29600_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_4493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15456__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16653__A1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28811__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput127 VGND VPWR _30638_/D la_input[59] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_2_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26812_ _26913_/A _26811_/Y _26835_/A _31856_/Q _31856_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_96_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25912__A1 _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29937__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3814_A _29871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput138 VGND VPWR _30618_/D la_input[69] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_282_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27792_ VGND VPWR _27792_/S _25037_/B _32516_/Q _32516_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21408__B _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_2999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput149 VGND VPWR _30598_/D la_input[79] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_236_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_3357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15861__C1 wire1053/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23923__B1 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29531_ _29531_/Q _30900_/CLK _29531_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length1966_A _18982_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19198__A3 _19195_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32472__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26743_ _26742_/Y _27087_/C1 _31824_/Q _26754_/B _31824_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_2_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_1888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23955_ _24079_/B1 _28684_/Q _23955_/X _19646_/B _28492_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_263_128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1907 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30914__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22906_ _30478_/Q _22905_/X _22907_/B wire3133/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__18945__A3 _18942_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29462_ _29462_/Q _32049_/CLK _29462_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17902__A _31073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_903 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26674_ _26674_/Y _26678_/B _26674_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_243_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24479__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold443_A hold443/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23886_ _31155_/Q _24957_/B _23885_/X _31123_/Q _23886_/X _25022_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__20739__S _20739_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_914 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25676__B1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15759__A3 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16956__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_925 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_41 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28961__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26873__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28413_ _28413_/Q _32422_/CLK _28413_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_936 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25625_ VGND VPWR _31376_/D _25625_/B _26242_/A _25625_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14967__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22837_ VGND VPWR _30105_/Q _22855_/B _22836_/X _30105_/D _22938_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_38_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_947 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29393_ _29393_/Q _30492_/CLK _29393_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_3515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23342__C _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_958 hold422/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23151__A1 _23302_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_969 _21710_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17113__S wire886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28344_ _28344_/Q _29847_/CLK _28344_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21162__A0 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_2038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2113_A wire2114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16169__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25556_ _31355_/D _25555_/X _31355_/Q _25553_/Y _31335_/Q hold178/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_13_3900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22768_ _22820_/B _22820_/C _22768_/X _29718_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_241_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22954__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17366__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17905__A1 _31413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23061__D _23061_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21701__A2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24735__A _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_144 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17905__B2 _31415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14719__A1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24507_ VGND VPWR _24507_/X _31223_/Q _31224_/Q _25430_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__15916__A0 _28872_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21719_ _21715_/X _21704_/Y _21718_/X wire3206/A _21719_/Y _21830_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_178_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29317__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28275_ _28275_/Q _28275_/CLK _28275_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19107__A0 _28260_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25487_ _25486_/X _31323_/Q _31323_/D _19491_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_202_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_3059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22699_ VGND VPWR _22699_/X _22733_/A _29882_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14038__A _28459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_4306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17381__A2 _17381_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20982__B _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3155_A _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24100__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24454__B _24454_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_3411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25443__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26640__A2 _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15240_ VGND VPWR _15756_/S _29225_/Q _29289_/Q _15240_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27226_ _27227_/B _27226_/B _32105_/D _27280_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_202_2950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_4273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_5414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24438_ _24438_/C _31018_/Q _24438_/X _31017_/Q _31019_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA__15392__A1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20474__S _20480_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3030 VPWR VGND _18355_/S _18357_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22255__A _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26950__A wire838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1859 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17669__B1 _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13877__A _28620_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15171_ _15605_/A2 _15171_/X _15170_/X _15638_/B1 _28957_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_27157_ VGND VPWR _27157_/S _27507_/A1 _32063_/Q _32063_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22662__B1 _22661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26928__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24369_ _24368_/X _24888_/D _24889_/A1 _23611_/A _30987_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_4893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_1315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3322_A _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17133__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18330__A1 _18625_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_2702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28341__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14122_ _22733_/B _22663_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_4 X_26108_ _31548_/Q wire2597/X _31547_/Q _26112_/D _26108_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_272_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29467__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27257__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25566__A _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17068__B _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27088_ _27100_/B _26872_/B _27116_/A _27088_/X _27098_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_155_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18881__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24470__A _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25600__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27909__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22414__A0 _21967_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15695__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18930_ _30262_/Q _18930_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14053_ _23231_/A _20914_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26039_ _26047_/C _26055_/C _26047_/A _26047_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_4_4813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_2197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24954__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30622__D _30622_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2747_A hold113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_244_core_clk _32287_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_40_4031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27579__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21768__A2 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30444__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22965__A1 _30477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27353__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26156__A1 _31567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18861_ _18853_/X _18860_/X wire1900/A _18855_/X _18861_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20976__A0 _29441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19830__A1 _28567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28491__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output248_A _14024_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_3019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24167__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15447__A2 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17812_ VGND VPWR _17812_/X _17810_/X _17811_/X _17833_/S _17685_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_2_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17841__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25903__A1 _19738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18792_ VGND VPWR _19047_/S _18791_/X _18790_/X _18792_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21318__B _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_2589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_3712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14655__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15998__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23236__D _23236_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23914__B1 _28616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20728__A0 _29243_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17743_ VGND VPWR _17833_/S _17742_/X _17696_/X _17743_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29729_ VGND VPWR _29729_/D _30406_/CLK _29729_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_40_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14955_ VGND VPWR _14955_/X _14952_/X _14954_/X _15517_/A1 wire1228/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_166_3532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32549__D _32549_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output415_A _13880_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21037__C _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18397__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30594__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27656__A1 _19732_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13906_ _28591_/Q _13906_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4030_A wire4031/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17674_ _17674_/X _17863_/A _17673_/X _17863_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_247_1417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14886_ _15614_/A2 _15577_/A2 _32050_/Q _14886_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_79_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4128_A _28554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20649__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19730__C _19776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27766__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16947__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_3822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19413_ VGND VPWR _19419_/S _27624_/A1 _28429_/Q _28429_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_140_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16625_ VGND VPWR _16918_/S _29325_/Q _28763_/Q _16625_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14958__A1 _28783_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25131__A2 _25136_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13837_ _29835_/Q _23448_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14958__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18149__A1 _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_26_2_core_clk clkbuf_opt_26_3_core_clk/A clkbuf_opt_26_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18119__S _18119_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15080__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23142__A1 hold235/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19346__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23142__B2 _30106_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31622_ _31622_/Q _31726_/CLK _31622_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29858__D _29858_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19344_ _19344_/X _19346_/D1 _27951_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_73_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16556_ VGND VPWR _16842_/S _29323_/Q _28761_/Q _16556_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21153__A0 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13768_ _31178_/Q _13768_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_225_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23693__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24890__A1 wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22496__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22350__C1 _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24645__A _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24976__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15507_ _15507_/A1 _16646_/A2 _15507_/X _15638_/A2 _29641_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__17958__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27021__A _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19275_ _19275_/A2 _28398_/Q wire884/X _28398_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31553_ VGND VPWR _31553_/D _31553_/CLK _31553_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15907__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16487_ _16486_/X wire911/X _16487_/X _16476_/X _16477_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_34_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26092__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18226_ _18225_/X wire3174/X _29748_/Q _22340_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 X_30504_ _30504_/Q _32425_/CLK _30504_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_3571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15438_ _28964_/Q _15437_/X _15438_/Y _15639_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__20384__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31484_ _31484_/Q _31575_/CLK _31484_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xclkbuf_5_15_1_core_clk clkbuf_5_15_1_core_clk/X clkbuf_5_15_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_258_2225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19458__B _19467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24642__A1 _31680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13787__A _31159_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30435_ VGND VPWR _30435_/D _32049_/CLK _30435_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14591__C1 _28909_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18157_ _18157_/Y _18201_/A _18244_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_233_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18857__C1 _18856_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26919__B1 _26764_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15369_ VGND VPWR _15750_/S _28794_/Q _28826_/Q _15369_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_2269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21500__C _21966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17108_ _29889_/Q _21447_/B _21879_/A _29719_/Q _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 Xhold304 hold304/A hold304/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17417__D_N _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27167__S _27167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold315 hold315/A hold315/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_hold52_A hk_dat_i[17] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26395__A1 wire3616/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25198__A2 _24572_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16332__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30366_ VGND VPWR _30366_/D _32064_/CLK _30366_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18088_ VGND VPWR _18117_/S wire3917/X _28017_/Q _28017_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold326 hold326/A hold326/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_64_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18872__A2 _18861_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24380__A _24380_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold337 hold337/A hold337/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_155_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_2556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_3522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21208__A1 _29737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22405__A0 _21856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold348 hold348/A hold348/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_288_4324 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32105_ _32105_/Q _32225_/CLK _32105_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17039_ VGND VPWR wire886/A _17031_/X _17038_/X _30380_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_119_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24811__C _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold359 hold359/A hold359/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_42_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1847_A _27423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30297_ _30297_/Q _30455_/CLK _30297_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22956__A1 _30468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_2_0_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26147__A1 _27070_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20050_ _20050_/Y _26892_/B wire850/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_32036_ _32036_/Q _32036_/CLK _32036_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27344__A0 _27272_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32495__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19821__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_2570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2791_A _27485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout839 _20168_/A2 _20192_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16096__C1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15438__A2 _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16635__A1 wire903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24158__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30937__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14411__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14646__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23905__B1 wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28984__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20719__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15226__B _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25370__A2 _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25642__C _25642_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18388__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26100__A _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14130__B _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_3072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23381__A1 _30359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19585__B1 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27647__A1 _27737_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15941__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19413__S _19419_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23740_ VGND VPWR _23740_/X _19680_/B _23737_/X _31837_/Q _23739_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_20952_ VGND VPWR _20964_/S hold416/X _29417_/Q _29417_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_78_2360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23443__B _29372_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20559__S _20562_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3228_A _23415_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19640__C _20654_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25658__B1 _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16938__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26855__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18537__B _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27630__S _27630_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14949__A1 _28951_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28214__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23671_ VGND VPWR _23671_/S _23671_/A1 _30801_/Q _30801_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_56_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14949__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_48_core_clk _32470_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_208_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20883_ VGND VPWR _23477_/S _20882_/X _29370_/Q _29370_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_39_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18029__S _18044_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15071__B1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19337__B1 _19273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24330__B1 wire1346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25410_ _31285_/D _25408_/Y _26236_/A _25409_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_52_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15610__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26754__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_4650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22622_ VGND VPWR _23395_/B _23395_/A _22622_/X _23395_/C hold360/A VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_225_2950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_4727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21144__A0 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26390_ _26182_/A _26389_/Y _26386_/X _31682_/Q _31682_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_208_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19888__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28672__D _28672_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23684__A2 _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24555__A _31201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25341_ VGND VPWR _25341_/X _25380_/B _25341_/A _25380_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__30317__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22553_ VGND VPWR _23355_/B _22553_/B _22553_/A _22553_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_206_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22892__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30707__D hold309/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_4724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3597_A _30764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26083__B1 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26622__A2 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28364__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21504_ _21628_/C _30471_/Q _21549_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 X_28060_ _28060_/Q _30294_/CLK _28060_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_91_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25272_ VGND VPWR _25274_/B _31258_/Q _31295_/Q _31257_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_17_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22484_ VGND VPWR _22448_/C _18661_/A _22484_/A2 _22484_/X _30003_/Q _22510_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20294__S _20294_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24094__C1 _24093_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27011_ _31987_/Q _27020_/D _31988_/Q _27011_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 X_24223_ VGND VPWR _24223_/S _30899_/Q wire1826/X _30899_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19104__A3 _19098_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_4902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21435_ _21664_/A _21449_/A _21435_/B _21435_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XANTENNA__22644__B1 _22649_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23987__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1522_A _15577_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17115__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21998__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30467__CLK _30479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24154_ _24154_/X _24186_/A3 wire1314/A _28639_/Q _31117_/Q _24192_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__27583__A0 _32171_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25189__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21339__A_N wire3661/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_3609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21366_ _14354_/Y _14355_/Y _14339_/Y _21366_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__18863__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31712__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_3904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23105_ _23170_/B _18535_/B _23180_/A _23105_/X _29718_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_236_3791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27639__A_N _31397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24397__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16874__A1 wire3242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20317_ VGND VPWR _20321_/S _27700_/A1 _28858_/Q _28858_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20670__A2 _20667_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3931_A _29727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25594__C1 _31371_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24936__A2 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28962_ _28962_/Q _32359_/CLK _28962_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24085_ wire4116/X _20126_/X _24084_/X wire4012/X _24085_/X _24178_/A2 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__a221o_4 Xwire3802 wire3802/X _14408_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23618__B _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21297_ _21298_/B _21598_/B _21298_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_270_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3813 VPWR VGND wire3813/X wire3814/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_111_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22947__A1 wire3657/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_2981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23036_ VGND VPWR _23036_/X _25693_/C _32388_/Q _32380_/Q _23036_/S1 _32396_/Q _32404_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__27335__A0 _27272_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27913_ _27913_/Q _30403_/CLK _27913_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26138__A1 _19539_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21419__A _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20958__A0 _29423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20248_ VGND VPWR _20261_/S _28791_/Q _27154_/A1 _28791_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3846 VPWR VGND wire3846/X wire3847/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_4654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19812__A1 _28558_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28893_ _28893_/Q _32071_/CLK _28893_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3857 VPWR VGND wire3857/X wire3857/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_98_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3868 VPWR VGND wire3868/X wire3869/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15429__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24149__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16626__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22241__C _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1989_A _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26689__A2 wire2264/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3879 VPWR VGND wire3879/X _29851_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27844_ _25807_/C _27844_/B _32545_/D _27844_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_2_3121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31862__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2063_A wire2064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20179_ VGND VPWR _14159_/A _19551_/A _20128_/X _20179_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_276_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14321__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input146_A la_input[76] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22949__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14637__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20042__B _20042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_3071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_289_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3297_A wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24164__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27106__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27775_ _27783_/S _27793_/C _31398_/Q _27793_/B _27784_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_106_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24987_ _25676_/B1 _24986_/X _25021_/A2 _31137_/Q _31137_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_243_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18379__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23372__A1 _30350_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22175__A2 _22172_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27099__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27638__A1 _27737_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29514_ VGND VPWR _29514_/D _31916_/CLK _29514_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_wire2230_A _19546_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14740_ _14739_/X _14822_/B1 _14882_/A2 _29307_/Q _14740_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26726_ _26726_/Y _31778_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_37_3719 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23938_ wire723/A _23933_/X _23936_/X _24199_/B1 wire762/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XANTENNA__20186__A1 _28737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19040__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20469__S _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2328_A _14210_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_700 wire3246/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32218__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_711 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17051__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21922__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27540__S _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17051__B2 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_722 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29445_ _29445_/Q _30428_/CLK _29445_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26310__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25113__A2 _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14671_ _14671_/Y _14662_/X wire1081/X _14670_/X _14666_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XFILLER_207_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26657_ _26657_/X _23772_/X _31795_/Q _31794_/Q _26656_/X _26660_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA_733 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23869_ _19792_/C _23868_/X _31832_/Q wire1624/X _23870_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_744 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_755 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16410_ _16841_/A2 _16410_/X _16409_/X _16720_/C1 _32429_/Q _16920_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__15601__A2 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24321__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29678__D _29678_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25608_ _13755_/Y _25629_/A _25608_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_766 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17390_ _30948_/Q _30982_/Q wire3567/X _30842_/Q wire3192/X _17390_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_221_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29376_ _29376_/Q _30139_/CLK _29376_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_777 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19879__A1 _28589_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17070__C _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28707__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26588_ _26588_/X wire1275/X wire3461/X wire3462/X _26587_/X _23748_/Y VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__17339__C1 _17336_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_788 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22478__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_799 wire3647/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16341_ VGND VPWR _16837_/S _29533_/Q _29567_/Q _16341_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_161_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28327_ _28327_/Q _29550_/CLK _28327_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_90_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25539_ _25546_/D _31347_/Q _25539_/A _31348_/Q _31346_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__19559__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31242__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32368__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2697_A _14165_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26074__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17354__A2 wire2105/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26613__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_2512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_3763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19060_ _19060_/X _19059_/X _28065_/Q _19087_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XANTENNA__19894__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15365__A1 _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28258_ _28258_/Q _30367_/CLK _28258_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16272_ _16841_/C1 wire1038/A _16270_/X _16269_/X _16271_/X _16272_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_2 XANTENNA__24085__C1 _24084_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25821__A0 _31434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24624__B2 _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18011_ VGND VPWR _18015_/S wire3832/X _27945_/Q _27945_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15298__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27209_ _32096_/Q _27204_/B _32095_/Q _27210_/B _32097_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_15223_ VGND VPWR _15223_/X _29118_/Q _15223_/A _15575_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_254_5293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28857__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23978__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28189_ _28189_/Q _30269_/CLK _28189_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_core.RAM128_Di0[21] wire2706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_4401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_2256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30220_ VGND VPWR _30220_/D _31955_/CLK _30220_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_15154_ VGND VPWR _15627_/S _32428_/Q _32356_/Q _15154_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31392__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15117__B2 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16314__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27574__B1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput409 _13793_/Y la_oenb[30] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20932__S _20948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18854__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2181 VPWR VGND _19758_/B _20100_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14105_ _22934_/A _22935_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XFILLER_253_2133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15668__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30151_ _30151_/Q _32548_/CLK _30151_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20661__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17807__A _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15085_ VGND VPWR _15716_/S _32314_/Q _28922_/Q _15085_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_4598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19962_ _19961_/X _28629_/Q _28629_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xclkbuf_5_28_0_core_clk clkbuf_5_28_1_core_clk/A clkbuf_5_29_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__18402__S _18407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4078_A _28656_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27881__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1491 VPWR VGND wire1489/A _14550_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_18913_ _23519_/S _18912_/X _18903_/X _20866_/S _18913_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14036_ _28461_/Q _14036_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__26129__A1 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27715__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21329__A _30341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20949__A0 _29414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30082_ hold130/A _32127_/CLK _30082_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output532_A _31117_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19893_ _19892_/X _28596_/Q _28596_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__17526__B _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_43_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25337__C1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16617__B2 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17814__B1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18844_ _18844_/X _18841_/X wire1900/X _18843_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_4_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17245__C _30996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout2003_A _18206_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15825__C1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24785__A_N _24778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_735 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24155__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25352__A2 _25265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28237__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18775_ VGND VPWR _18774_/X _19268_/S _18775_/X _18856_/B _28343_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 X_15987_ _15987_/X _28810_/Q _16448_/A2 _16448_/A3 _15975_/S _15986_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_97_2246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23363__A1 _30341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_2374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27629__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15840__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1330_A wire1330/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17726_ _17501_/X _31721_/Q _17725_/X _17726_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_124_5636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14938_ _29142_/D _14910_/X _14937_/X wire1074/A _14919_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_224_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19031__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20379__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30984_ _30984_/Q _32287_/CLK _30984_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25004__C_N _24939_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_4525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27450__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2564_A _20227_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25104__A2 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17261__B _30962_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17657_ _17539_/C _17656_/X _31719_/D _17524_/B _17653_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_235_183 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_3248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14869_ _14868_/X _15628_/B1 _15621_/A2 _29463_/Q _14869_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_229_2393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19319__B1 _19318_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_1269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26852__A2 wire2653/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28387__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16608_ _16608_/X _30793_/Q _16934_/A2 _16944_/B2 wire963/X _16607_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_204_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17588_ _17873_/B1 _17587_/X _17783_/B2 _17588_/Y hold261/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XANTENNA__22594__S _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14800__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21214__D _29692_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29632__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_36 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31605_ _31605_/Q _32296_/CLK _31605_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22874__A0 _29898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19327_ _19323_/X _19326_/X wire1916/X _19325_/X _19327_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_53_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16539_ _16539_/X _29057_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16538_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_203_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30527__D hold460/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17345__A2 _30817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27801__A1 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26604__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31536_ VGND VPWR _31536_/D _31536_/CLK _31536_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_220_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19258_ _19258_/X _19346_/D1 _28011_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_274_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24615__A1 _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23418__A2 _14146_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_2_4_core_clk clkbuf_opt_2_5_core_clk/A clkbuf_opt_2_4_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__31735__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21003__S _21010_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18209_ _30326_/Q _18208_/X _30327_/Q wire3812/X _18209_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_199_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14564__C1 _14556_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31467_ VGND VPWR _31467_/D _31467_/CLK _31467_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19189_ _19189_/A2 _28394_/Q _19188_/X _28394_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_203_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19098__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_290_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29782__CLK _29782_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24091__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_166_core_clk _32016_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_277_2689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20127__B _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_82_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21220_ _22554_/C _21221_/B _21222_/B _21285_/A _23350_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_156_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_86_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_5377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_1343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30418_ _30418_/Q _32439_/CLK _30418_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26368__A1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15108__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold101 hold101/A hold101/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_31398_ VGND VPWR _31398_/D _32390_/CLK _31398_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xhold112 hold112/A hold112/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_301_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold123 hold123/A hold123/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_4335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14125__B _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26907__A3 _26763_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_1882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length4112_A _28574_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold134 hold134/A hold134/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__24379__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20386__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19408__S _19418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21151_ VGND VPWR _21151_/S _29594_/Q _27689_/A1 _29594_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold145 hold145/A hold145/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20652__A2 _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24918__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30349_ VGND VPWR _30349_/D _31937_/CLK _30349_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_119_2151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31885__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold156 hold156/A hold156/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25040__A1 _31163_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3109 VPWR VGND _24586_/B _19504_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_214_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold167 hold167/A hold167/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19760__D_N _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29012__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold178 hold178/A hold178/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20102_ wire881/X _20061_/B _20102_/X _20102_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_core.RAM256_A0[1] wire2406/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27317__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold189 hold189/A hold189/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27625__S _27630_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24260__D _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21082_ VGND VPWR _21095_/S _27694_/A1 _29533_/Q _29533_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25934__A _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2408 _20654_/C wire2408/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_129_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16069__C1 wire918/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20033_ _25676_/B1 _20032_/X wire847/A _28663_/Q _28663_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_24910_ _25718_/A _24909_/Y _24950_/A2 _31099_/Q _31099_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17805__B1 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32019_ _32019_/Q _32431_/CLK _32019_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_168_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1707 VPWR VGND wire1707/X _14536_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25890_ VGND VPWR _31462_/D _25911_/B1 _25889_/X wire2242/A _25867_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14141__A _14141_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19270__A2 wire1993/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14619__B1 _14618_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1103_A _14552_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22769__S _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_50 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31115__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_287_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17281__A1 wire3558/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24841_ _24841_/B _24458_/C _24841_/A _24842_/C _24841_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__17281__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26540__A1 _32577_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24000__C1 _23999_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16767__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29162__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18548__A _22620_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15292__B1 _28888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13980__A _28517_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24269__B _31684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15831__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27560_ VGND VPWR _27594_/B _27559_/X _27558_/X _27560_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20168__A1 wire4012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24772_ _31443_/Q _24772_/B _24772_/X _24772_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_227_662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19022__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20289__S _20292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21984_ _21955_/B _21946_/A _21983_/X wire3146/X _21981_/X _21984_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_2 XFILLER_279_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17033__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26828__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18267__B _18267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26511_ _13739_/Y _17510_/X _26511_/Y _31746_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27360__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27096__A2 _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17033__B2 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18230__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23723_ _30815_/D _23822_/B wire768/X _23732_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_149_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20935_ VGND VPWR _20935_/S _29400_/Q _29503_/Q _29400_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27491_ VGND VPWR _27507_/S _27684_/A1 _32306_/Q _32306_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_4355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20668__A1_N _31392_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout730_A _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18982__S _18982_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31265__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15044__B1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23106__A1 _30434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1472_A wire1486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29230_ _29230_/Q _32574_/CLK _29230_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_262_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25646__A3 _25642_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26843__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32510__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26442_ VGND VPWR _26446_/B _17462_/X _26441_/X _26442_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__21117__A0 _29561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_2639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23654_ VGND VPWR _23669_/S _27247_/A0 _30784_/Q _30784_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20866_ VGND VPWR _20866_/S _30231_/Q _29393_/Q _20866_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_93_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15595__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_5113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22605_ _22594_/S _22617_/B _22605_/X _22605_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_29161_ _29161_/Q _31961_/CLK _29161_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_71_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26373_ _26372_/X _31674_/Q _31674_/D _26335_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA_wire3881_A wire3882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23585_ VGND VPWR _23590_/S _27699_/A1 _30505_/Q _30505_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18626__A_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20797_ VGND VPWR _20797_/S _29310_/Q _27686_/A1 _29310_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18283__A _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26056__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17336__A2 _31914_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_340_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28112_ _28112_/Q _32038_/CLK _28112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19876__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25324_ _25334_/D _25326_/B _31268_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__15347__A1 wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22536_ VGND VPWR _22550_/S _29825_/Q _30036_/Q _30036_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29092_ _29092_/Q _32439_/CLK _29092_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_136_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16544__B1 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20340__A1 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold406_A hold406/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_5531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_4565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28043_ _28043_/Q _30481_/CLK _28043_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length3045_A _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25255_ _25255_/X _25263_/B1 _29868_/D hold99/A _25197_/D VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_156_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22467_ _30332_/D _22466_/X _22513_/A2 _17056_/X _29994_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_clkbuf_leaf_239_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24658__A_N _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24082__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14316__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24206_ _24206_/X _19993_/X _13792_/A _20665_/X _28740_/Q _19926_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__22093__A1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21418_ _21419_/B _21419_/D _21679_/B _21419_/C _21422_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_5_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26359__A1 _31667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14570__A2 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25186_ _25186_/X _25186_/C _31366_/Q _25571_/C _25186_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__27556__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20752__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18836__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24224__S _24241_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22398_ VGND VPWR wire743/X _22613_/S _22397_/Y _29955_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_85_2150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25547__C _25547_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21840__A1 hold465/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24137_ _24137_/X _20128_/B wire4113/X _28733_/Q _24188_/A2 VGND VPWR _24129_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24909__A2 _19559_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17627__A _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2180_A _20100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3526 _27844_/C hold488/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_21349_ _14431_/Y _14429_/X _21444_/A _21352_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23348__B _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18222__S _18222_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29994_ _29994_/Q _30433_/CLK _29994_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_232_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14858__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16311__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3548 _30998_/Q _17433_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_5_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26374__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3559 VPWR VGND _17302_/A _30994_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_133_2115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3621 VPWR VGND wire3621/X _30760_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23042__B1 _23041_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25844__A _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28945_ _28945_/Q _32422_/CLK _28945_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_24068_ _19926_/B _30655_/Q _24067_/X _24068_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire3632 VPWR VGND wire3632/X wire3633/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3643 wire3643/X _30693_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_41_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3654 VPWR VGND _21404_/A _30462_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23593__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2858 wire2861/X _21199_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22396__A2 wire830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15910_ _15910_/X _30774_/Q _16150_/A2 _16150_/A3 _15957_/S _15909_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_95_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29505__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23019_ _25693_/C _32458_/Q _23019_/X _25693_/B _32450_/Q _32466_/Q _32410_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_147_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3665 VPWR VGND _22620_/B _30447_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24790__B1 _24779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2931 VPWR VGND _20352_/S _20338_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_232_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16890_ VGND VPWR _16918_/S _32442_/Q _32370_/Q _16890_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14051__A _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28876_ _28876_/Q _32137_/CLK _28876_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19261__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28577__D _28577_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2942 VPWR VGND _20327_/S _20324_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22679__S _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2953 _19430_/X _19432_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_98_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25027__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16075__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32040__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15841_ VGND VPWR wire969/X _28838_/Q _28870_/Q _15841_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27827_ _25801_/D _32537_/Q _27826_/Y _32537_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_186_4984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2975 VPWR VGND _18625_/S _18624_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_4_12_0_core_clk_A clkbuf_3_6_2_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15283__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2997 VPWR VGND _18449_/S _18458_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_clkbuf_leaf_127_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23345__A1 _30334_/Q VGND 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X_27758_ VGND VPWR _27765_/S _25023_/B _32485_/Q _32485_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19013__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15772_ _28392_/Q _16387_/C wire1541/X _15772_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__20199__S _20202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21356__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23896__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29655__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4883 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17511_ _17514_/A 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NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_552 _30648_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17442_ hold38/A hold37/X _17447_/A1 _17447_/B2 input197/X VGND VPWR _17440_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_29428_ _29428_/Q _30387_/CLK _29428_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21108__A0 _29552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14654_ VGND VPWR _14818_/S _28839_/Q _28871_/Q _14654_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_563 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16783__B1 wire912/X VGND VPWR VPWR VGND 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wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21612__A _21613_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29359_ _29359_/Q _31956_/CLK _29359_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_17373_ _30945_/Q _30979_/Q wire3571/X _30839_/Q _17248_/X _17373_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XFILLER_232_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14585_ VGND VPWR _14585_/X _14582_/X wire1202/X _14823_/A1 _14584_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_204_2842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18524__A1 wire3837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17327__A2 wire2119/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1767 VGND VPWR VGND VPWR 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XANTENNA__20331__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24058__C1 _24057_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_cap2133 VPWR VGND _22150_/B _22163_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_278_2965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15889__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19043_ _19043_/X wire1883/X _19027_/X _19032_/X _23529_/S _19042_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_196_2632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31321_ _31321_/Q _31363_/CLK _31321_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_48_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16255_ wire4148/X _16255_/X _32313_/Q _15775_/X _16791_/A2 wire985/A VGND VPWR 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VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16186_ _16186_/X _28919_/Q _16434_/A2 _16642_/B2 _16722_/C1 _16185_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19736__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23820__A2 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_1685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_1975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16838__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput217 wire3500/X debug_mode VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30203_ _30203_/Q _30392_/CLK _30203_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15756__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21292__C1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15137_ _15610_/B1 _15136_/X _15611_/A1 _15137_/Y _15134_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_234_4996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput228 wire1842/X hk_cyc_o VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17537__A _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_2050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31183_ _31183_/Q _32499_/CLK _31183_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_29_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18132__S _18132_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput239 _14032_/Y la_iena[108] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_215_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_4849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30012__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31138__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_166_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29871__D _29871_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30134_ _30134_/Q _30204_/CLK _30134_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27445__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25754__A hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19945_ VGND VPWR wire1319/A wire2302/A _19559_/X _19945_/X wire3427/X _19973_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 X_15068_ _15068_/X _15509_/A1 _15065_/X _15067_/X wire1085/X _15063_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_287_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26770__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29185__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22387__A2 _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23584__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_3596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17971__S _17974_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31906__D _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14019_ _28478_/Q _14019_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19752__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30065_ hold184/A _32294_/CLK _30065_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_168_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20398__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19876_ VGND VPWR _19555_/X _26838_/A4 _25738_/B _19876_/X _26159_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__19252__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22589__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17263__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18827_ VGND VPWR _19273_/S _18826_/X _18822_/X _18827_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_hold15_A hk_dat_i[23] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19471__B _31345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30162__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31288__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22139__A2 _22136_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4084 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2587_A wire2594/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17272__A _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25876__A3 _25877_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1712_A _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32533__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19004__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18758_ _19358_/A2 _27859_/Q wire1939/X _18758_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_0_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23887__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27078__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21898__A1 hold232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17709_ _17488_/A _17685_/A _17488_/B _17709_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_75_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25089__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30967_ _30967_/Q _32319_/CLK _30967_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18689_ _18689_/X wire2270/X _28209_/Q wire2281/X wire2582/X wire3766/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_75_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_3728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_2926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_2753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26286__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17566__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20720_ VGND VPWR _20720_/S _29236_/Q _21203_/A0 _29236_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20570__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15223__C _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20837__S _20837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16774__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30898_ _30898_/Q _32351_/CLK _30898_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_105_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23213__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14785__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20651_ _24459_/B _20651_/X _24467_/C _24459_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA_max_length1078_A _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24300__A3 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_4088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_5444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26038__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18515__A1 wire3864/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18662__C_N _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_347_core_clk _29803_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_222_2953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15329__A1 _15507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23370_ VGND VPWR _23385_/S _30348_/Q _29666_/Q _30348_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_140_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20322__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20582_ VGND VPWR _20584_/S _21203_/A0 _29098_/Q _29098_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32568_ hold229/A _32568_/CLK input72/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_34_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_3_7_0_core_clk_A clkbuf_3_7_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_105_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22321_ VGND VPWR _23342_/A _23043_/B hold430/A _29907_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2906 VPWR VGND _20580_/S _20572_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_31519_ _31519_/Q _31522_/CLK _31519_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_2453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19927__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14136__A _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24064__A2 _19994_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32499_ _32499_/Q _32499_/CLK _32499_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25261__A1 _29871_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25261__B2 hold82/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18279__A0 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25040_ _25681_/B1 _25039_/X _25082_/A2 _31163_/Q _31163_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22075__A1 hold395/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22252_ _18664_/X _22251_/X _22252_/X _30112_/Q wire2286/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14552__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20572__S _20572_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18818__A2 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19646__B _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18550__B _30445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20086__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1412_A _23497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16829__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31088__D _31088_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21203_ VGND VPWR _21205_/S _29645_/Q _21203_/A0 _29645_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15666__S _15736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13975__A _13975_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21822__A1 _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29528__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3462_A _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22183_ _22182_/X _22509_/C1 wire828/X _29826_/Q _29826_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_251_2604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18042__S _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_1026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22072__B _22072_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1318_A _26687_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26356__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23024__A0 _32403_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21134_ VGND VPWR _21134_/S _27705_/A1 _29578_/Q _29578_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32063__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15501__A1 _15503_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14304__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26991_ _31980_/D _31980_/Q _26990_/Y _27000_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_9_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2205 _26797_/B _19573_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23575__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30505__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28730_ _28730_/Q _31570_/CLK _28730_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_9_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19662__A _19662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21065_ _31964_/Q wire3412/A _21064_/Y _29517_/D _23403_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 X_25942_ _25941_/X _26148_/A _31485_/Q _25937_/B _31485_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_21_3328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30720__D input82/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20389__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_8_1_core_clk clkbuf_5_8_1_core_clk/X clkbuf_5_8_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_246_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2238 VPWR VGND _19654_/A _19538_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire3727_A wire3728/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19243__A2 _19239_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2249 VPWR VGND _27122_/A _26775_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__28552__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22800__B _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold189_A hold189/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1515 VPWR VGND wire1515/X wire1515/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16057__A2 wire999/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29678__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20016_ VGND VPWR wire2664/X wire3616/X _20028_/A _20016_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_112_3478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21050__A2 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27710__A0 _32444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28661_ _28661_/Q _32010_/CLK _28661_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26513__A1 _31759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25316__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25873_ _31455_/Q _31456_/Q _31454_/Q _25874_/D _25875_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_210_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_63_core_clk _32388_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16497__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26513__B2 _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout945_A wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18278__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15804__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27612_ VGND VPWR _27627_/S _27692_/A1 _32354_/Q _32354_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_5390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24824_ VGND VPWR _27230_/C _24821_/Y _26243_/B1 _24824_/X _27230_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_164_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28592_ _28592_/Q _31873_/CLK _28592_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21338__B1 _21640_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23878__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30655__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27069__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18203__B1 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19656__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27543_ _25641_/B _32159_/Q _27543_/X _25641_/A _32151_/Q _32167_/Q _32143_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__21889__A1 _29790_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31900__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24755_ _24674_/A _31460_/Q _24755_/Y _24672_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_58_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_5167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21967_ _21967_/X _21966_/Y _21965_/Y _21966_/A _21964_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_265_1133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15017__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1854_A _14406_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26277__B1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18754__A1 _28147_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20010__B1 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19951__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26816__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23706_ _23707_/A _23705_/X _20671_/A _31561_/Q _20671_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_279_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20918_ _20917_/Y _20912_/D _20918_/X _20914_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__15568__A1 wire1501/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27474_ VGND VPWR _27484_/S _32295_/Q _27473_/X _32295_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_265_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20561__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2026_A _17380_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24686_ _24686_/B _24687_/B _24691_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__16765__B1 wire912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input109_A la_input[42] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20747__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21898_ hold232/A _22074_/B1 _29791_/D _21897_/X _21896_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__24219__S _24238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29213_ _29213_/Q _32430_/CLK _29213_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_19_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26425_ _31694_/D _26423_/Y _26403_/Y _26424_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21540__C_N _30352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23637_ VGND VPWR _23637_/B _24874_/C _32555_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 X_20849_ VGND VPWR _29354_/D _21451_/B _20848_/X _23226_/S _20847_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_230_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17309__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18506__A1 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21677__A_N _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17121__S wire886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3068_A _18020_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21736__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29058__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29144_ hold220/A _32134_/CLK _29144_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14370_ _24424_/B _24418_/C _14370_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_275_3817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26356_ VGND VPWR _26949_/B _24273_/D wire2208/X _26356_/X _27075_/C1 _26364_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20313__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23568_ VGND VPWR _23573_/S _27489_/A1 _30488_/Q _30488_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire801 VPWR VGND wire801/X wire801/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22962__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21510__B1 _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20048__A wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24743__A _31470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire812 VPWR VGND wire812/X wire812/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27757__C _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25307_ _25305_/X _25595_/A _25306_/X _31264_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_30_3170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire834 VPWR VGND wire834/X wire834/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_22519_ _22520_/B _30021_/Q _23563_/A _30020_/Q _22521_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_238_4373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_16_0_core_clk_A clkbuf_4_8_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29075_ VGND VPWR _29075_/D _32358_/CLK _29075_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_26287_ VGND VPWR wire2660/X _19792_/A _26331_/B _26287_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_216_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2395_A wire2396/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23499_ VGND VPWR _23519_/S _28388_/Q _30436_/Q _23499_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14046__A _29974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25252__A1 _31250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24055__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18741__A _30253_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30035__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16532__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_1784 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16040_ VGND VPWR _16040_/X _16040_/A2 wire1032/X _16037_/X _16039_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_7_969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28026_ _28026_/Q _30757_/CLK _28026_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22066__A1 hold476/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout4002 _21339_/C wire4004/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_25238_ _25595_/A _25237_/X _25264_/A2 hold109/A _31243_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input74_A la_input[126] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14543__A2 _14442_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20482__S _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15740__A1 _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18809__A2 wire1405/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32406__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22263__A _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28082__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25277__C _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13885__A _28612_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3301 VPWR VGND wire3303/A wire3305/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_238_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3312 _25681_/B1 _25676_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_65_3277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25169_ _25172_/A _31216_/Q _25169_/Y _31215_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_272_1115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3323 _25567_/B _26687_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26201__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4130 VPWR VGND wire4130/X _28551_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3334 VPWR VGND _27077_/C1 _27003_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4141 VPWR VGND wire4141/X _28440_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16296__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17493__A1 _31613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27265__S _27265_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3796_A _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4152 wire4152/X _28374_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_269_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3356 _26509_/D _25595_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__18690__B1 wire1949/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17076__B _21777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4163 VPWR VGND wire4163/X _27866_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_17991_ VGND VPWR _17991_/S wire3898/X _27925_/Q _27925_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29977_ _29977_/Q _32293_/CLK _29977_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_134_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30185__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4174 VPWR VGND wire4174/X input44/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23566__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22369__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3440 wire3440/X _32040_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 Xwire4185 VPWR VGND wire4185/X hold62/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_19730_ _19760_/B _19973_/A1 _27664_/B _19730_/X _19776_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__31430__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1910 VPWR VGND wire1912/A wire1916/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4196 VPWR VGND wire4196/X wire4196/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16942_ VGND VPWR _16942_/S _28972_/Q _29270_/Q _16942_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28928_ _28928_/Q _32320_/CLK _28928_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_2169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32556__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3462 VPWR VGND wire3462/X _31794_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1921 wire1924/A _19151_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19234__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3473 VPWR VGND wire3473/X wire3474/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_212_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1943 _19296_/B1 _19380_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_3957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18442__A0 _28216_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_735 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3495 VPWR VGND wire3495/X _31262_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1954 wire1956/A _19180_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_19661_ _26179_/B1 _19660_/X _19695_/A2 _28491_/Q _28491_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21607__A _21610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_1645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output230_A _13791_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28859_ _28859_/Q _31927_/CLK _28859_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16873_ _16911_/A2 _16873_/X _16872_/X _16601_/S _28970_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__15256__A0 _28823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22202__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_4781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1976 VPWR VGND wire1978/A _18679_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout3771_A _30085_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27847__A4 _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1987 _22086_/B1 _19358_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18993__A1 _28286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17796__A2 _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24515__B1 _31220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18612_ VGND VPWR _18615_/S wire3848/X _28326_/Q _28326_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1998 VPWR VGND _27143_/A1 _27686_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25858__A3 _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15824_ wire1539/X wire3276/A _32110_/Q _15824_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_185_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21326__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2491 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31870_ _31870_/Q _32010_/CLK _31870_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19592_ _25512_/A _19591_/Y _19632_/A _28470_/Q _28470_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_267_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23869__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31580__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18543_ VGND VPWR _18543_/X _18542_/X _30424_/Q _14446_/Y _20847_/C VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_load_slew1802_A _14442_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30821_ _30821_/Q _32318_/CLK _30821_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_245_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15755_ _15755_/X _15759_/A2 _15754_/X _28940_/Q _15759_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_143_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21045__C _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17548__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16205__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14706_ _14705_/X _14823_/A1 _14817_/A2 _32416_/Q _14706_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_198_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4110_A _28575_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30752_ hold154/A _32532_/CLK input95/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18474_ VGND VPWR _18491_/S wire3891/X _28247_/Q _28247_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16756__B1 _15782_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24279__C1 _24278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15686_ VGND VPWR _15702_/S _32330_/Q _28938_/Q _15686_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_15_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4208_A input1/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24818__A1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_360 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22438__A hold328/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_371 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16220__A2 wire996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_382 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17425_ _30954_/Q _30988_/Q _30882_/Q _30848_/Q wire3192/X _17429_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_109_2172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14637_ _14637_/X _15628_/A2 _15233_/B1 _29554_/Q wire1506/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA_393 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30683_ _30683_/Q _32401_/CLK hold299/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18127__S _18144_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24294__A2 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_2249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17031__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22157__B _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32422_ _32422_/Q _32422_/CLK _32422_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29866__D _29866_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16508__A0 _28888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17356_ VGND VPWR _17360_/A _31917_/Q _17354_/X wire3562/X _17355_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_163_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20304__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14568_ _14568_/X _15628_/A2 _14675_/S _29037_/Q _14930_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_261_1586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_4730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16307_ VGND VPWR _16948_/S _29469_/Q _32123_/Q _16307_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28425__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26035__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17966__S _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26670__B1_N _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32353_ _32353_/Q _32353_/CLK _32353_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_4083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17287_ _17287_/Y _17287_/B _17302_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__30805__D _30805_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17181__B1 _29438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14499_ _29712_/Q _14049_/Y _22078_/A _30440_/Q _14499_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_196_3185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25243__A1 hold4/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24046__A2 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_31_2277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25243__B2 hold100/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19026_ _19025_/X _19176_/B1 _19179_/A2 _28323_/Q _19026_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31304_ hold305/A _31304_/CLK _31304_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23254__A0 _30237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22057__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16238_ _16238_/X _29251_/Q _16818_/A2 _16841_/B2 _16843_/A2 _16237_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__15192__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1059 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20392__S _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32284_ _32284_/Q _32287_/CLK _32284_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26991__A1 _31980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25187__C _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_1302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20068__B1 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_3472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30528__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13795__A _31151_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21804__A1 _21708_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_3317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17267__A _30806_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31235_ hold101/A _32297_/CLK _31235_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_48_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16169_ VGND VPWR _16169_/X wire944/X _16816_/B1 _16166_/X _16168_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_170_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2502_A _20789_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_4812 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26338__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28575__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23006__A0 _23002_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16287__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire746_A wire747/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21280__A2 hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31166_ _31166_/Q _32529_/CLK _31166_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26743__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24203__C1 _24202_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29820__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14298__A1 _29969_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18797__S _18797_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 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NF_sky130_ef_sc_hd__decap_12 X_21752_ _21752_/B _21752_/X _21752_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_107_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_3427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20543__A1 _29060_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16747__B1 wire904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3308_A _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20567__S _20576_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29200__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_793 VGND VPWR VGND VPWR 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_21661_/X _21683_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_123_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23170__C _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18037__S _18037_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length4105 VPWR VGND _24188_/A1 _13919_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24285__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_181_core_clk _32280_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_33_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22067__B _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30058__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26210_ VPWR VGND _31593_/D _26210_/B _26913_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__16762__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23422_ _21030_/S _23563_/B _23421_/X _30418_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XPHY_1128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length4127 VPWR VGND wire4126/A _28555_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_159_3902 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_5613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23493__A0 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22296__A1 _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_105_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20634_ VGND VPWR _20646_/S _27694_/A1 _29180_/Q _29180_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27190_ _32088_/D _25760_/Y _27280_/C _27189_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_46_5507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25659__A _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14773__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15970__A1 _16415_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19697__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31303__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32429__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_110_core_clk _32114_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24563__A _24565_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3935 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26026__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26141_ _26159_/A _31560_/Q _26141_/X _26159_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_88_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23353_ _22552_/B _22444_/C _22553_/B _14309_/X _23354_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_118_4300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_3490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29350__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20565_ VGND VPWR _20572_/S wire1826/X _29081_/Q _29081_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17172__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25234__A1 hold98/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24037__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1435_A _18278_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26431__B1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22304_ VGND VPWR _23373_/S _29890_/Q _29149_/Q _29890_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_3861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22048__A1 _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26072_ _26072_/X _26070_/B _26071_/X _26070_/A _26070_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__28918__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15722__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23284_ VGND VPWR _23298_/S wire3866/X _30266_/Q _30266_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_27_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25785__A2 hold396/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold104_A hold104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26982__A1 _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20496_ VGND VPWR _20504_/S _27688_/A1 _29014_/Q _29014_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_2587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_4_9_0_core_clk clkbuf_4_9_0_core_clk/X clkbuf_4_9_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_192_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20059__B1 _20058_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18280__B _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25023_ _25065_/A wire1296/X _25023_/X _25023_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_66_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29900_ VGND VPWR _29900_/D _30479_/CLK _29900_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_175_2557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_1413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22514__C _23201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22235_ _22236_/B _22233_/Y _21051_/Y _21051_/B _22255_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_179_1992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14930__C1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3844_A wire3845/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32579__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_4893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1602_A _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16278__A2 _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29831_ _29831_/Q _30475_/CLK _29831_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18672__B1 _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22166_ VGND VPWR _22180_/S _30299_/Q _30389_/Q _22166_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_99_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22811__A _29892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput570 _28737_/Q la_output[60] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14313__B _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15486__B1 _29093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23548__A1 _30469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27942__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput581 _28683_/Q la_output[70] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2002 VPWR VGND wire2002/X wire2002/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1206 wire1210/A _15509_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21117_ VGND VPWR _21136_/S _27688_/A1 _29561_/Q _29561_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_40_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput592 _28693_/Q la_output[80] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2013 VPWR VGND wire2013/X wire2013/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_183_5611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29762_ _29762_/Q _31921_/CLK hold268/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_40_3737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19216__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26974_ _26974_/B _26979_/C _26988_/B _31973_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 X_22097_ _30026_/Q _21032_/B _22097_/X _22096_/X _22094_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23626__B _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2024 VPWR VGND wire2024/X _17397_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_hold473_A la_input[81] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2035 wire2036/X wire2035/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_2287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1239 VGND VPWR _24306_/C wire1244/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__18424__A0 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17227__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2046 wire2047/X wire2046/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire1301 VPWR VGND wire1301/X _24308_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28713_ _28713_/Q _32160_/CLK _28713_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21023__A2 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2057 wire2057/X wire2057/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_18_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25925_ _25924_/X _27131_/B _31478_/Q _24716_/A _31479_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_21048_ VGND VPWR _21057_/S _30043_/Q _29508_/Q _29508_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_77_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2068 wire2069/X wire2068/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_29693_ _29693_/Q _30382_/CLK _29693_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_2665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1971_A wire1975/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20231__A0 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15238__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1334 VPWR VGND _25982_/B wire1334/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2079 wire2080/X wire2079/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18975__A1 _27965_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22771__A2 _22733_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28644_ _28644_/Q _32160_/CLK _28644_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_5_1953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_3600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13870_ _28627_/Q _13870_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_77_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25856_ _31449_/Q _25855_/Y _31449_/D _25860_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_wire2143_A _19628_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20782__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25832__B1_N _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22957__S _22968_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20050__B _26892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_1817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25170__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2839 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24807_ _26182_/A _24806_/Y _24809_/C _31051_/Q _31051_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_56_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27114__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28575_ VGND VPWR _28575_/D _31884_/CLK _28575_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_281_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25787_ VGND VPWR _25793_/S _31422_/Q _31423_/Q _31422_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16955__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22999_ VGND VPWR _25733_/C _30149_/Q _22998_/X _30149_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18727__A1 _27890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_269_core_clk _29928_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23181__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19924__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15540_ VGND VPWR _15540_/X _15718_/B1 _15749_/C1 _15539_/X _15538_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2310_A _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27526_ _27526_/X _31382_/Q _25682_/B _27520_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_24738_ _24701_/D _24770_/A _24738_/Y _24693_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_160_3527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20477__S _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2408_A _20654_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_2069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21731__B1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_2563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26953__A _31978_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28448__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15471_ _15471_/X _28105_/Q wire1118/X _15737_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_242_292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27457_ VGND VPWR _27475_/S _32285_/Q _32286_/Q _27457_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24669_ _24669_/B _24670_/B _24669_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__23080__C _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23079__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3352_A _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15410__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17210_ _17234_/A1 _30402_/Q _17210_/X _17234_/B2 _29442_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14422_ _14422_/Y _14422_/B _14422_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__18174__C _18229_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26408_ _31696_/Q _26408_/Y _31697_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__22287__A1 _17047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23484__A0 hold457/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18190_ _18190_/X _18157_/Y wire3901/X wire3174/X _18189_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_257_5483 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14764__A2 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15961__A1 _30891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27388_ VGND VPWR _27394_/S _32238_/Q _27268_/X _32238_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20298__A0 _28839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15961__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_5626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17141_ _30005_/Q _22512_/A2 _17141_/X _29433_/Q _17234_/B2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__17786__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29127_ _29127_/Q _32426_/CLK _29127_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21495__C1 _21288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14353_ _14353_/B _21778_/C _14356_/B _14353_/D _14353_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA_max_length3809_A _18532_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26339_ _26338_/X hold481/A _31657_/D wire781/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 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XANTENNA__17702__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_4766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28598__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22039__A1 wire3991/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17072_ VGND VPWR _17089_/S _17065_/X _17071_/X _30384_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_67_2616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29058_ _29058_/Q _32332_/CLK _29058_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_1319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14284_ _14284_/Y _23415_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_16 XANTENNA__26973__A1 _27009_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_49_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24433__C1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16910__B1 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29843__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28009_ _28009_/Q _30457_/CLK _28009_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16023_ _16023_/X _16016_/X _16022_/X wire1035/X _16018_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_234_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19455__A2 _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21798__B1 _21381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31020_ _31020_/Q _32032_/CLK _31020_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_135_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16269__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17466__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3131 wire3133/X _22933_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26829__D_N _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3142 _21717_/Y _21999_/S1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_117_3175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26725__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25528__A2 _19456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30820__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15319__B _15319_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20940__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31946__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3153 _21051_/B _21032_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22721__A _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output445_A wire3369/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20470__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15477__B1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3164 _23057_/S _23040_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_282_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23539__A1 _30460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4060_A wire4061/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17974_ VGND VPWR _17974_/S wire3838/X _27911_/Q _27911_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout3197 _22026_/B1 _21630_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18410__S _18410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24200__A2 _14147_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4158_A wire4159/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22440__B _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_7_0_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17218__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3270 _21599_/A wire3270/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18415__A0 _18607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19713_ VGND VPWR _19713_/X _20673_/C _20673_/B _19926_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__17218__B2 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1740 VPWR VGND _15010_/A2 wire1748/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3281 VPWR VGND wire3281/X wire3281/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22211__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27723__S _27728_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2485 wire2488/X _21013_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_21_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16925_ _16924_/X _16925_/B1 wire992/X _29333_/Q _16925_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_266_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2496 VPWR VGND _20797_/S _20789_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_187_2417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output612_A _20003_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20222__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17769__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1784 VPWR VGND _27707_/A1 _18320_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30970__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19644_ _23879_/A _26687_/D _26793_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 X_31922_ _31922_/Q _32569_/CLK hold454/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1795 VPWR VGND _17662_/A _17526_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27150__A1 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16856_ VGND VPWR _16856_/X _16856_/A2 wire1062/X _16855_/X _16854_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25751__B _31365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20773__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29223__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_2917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24648__A _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16441__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15807_ _15807_/X _29069_/Q _16026_/A2 wire1458/X _16039_/C1 _15806_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_147_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2477_A _21166_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14988__C1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31853_ _31853_/Q _32282_/CLK _31853_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25700__A2 wire836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19575_ VGND VPWR wire2672/X wire3616/X _19638_/A _19575_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_281_866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16787_ _16787_/X _29579_/Q _16814_/B1 _16805_/A3 _16491_/S _16786_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_241_708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18718__A1 wire3770/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13999_ _28498_/Q _13999_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_267_1762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31191__D _31191_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_1161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30804_ _30804_/Q _31945_/CLK _30804_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18526_ VGND VPWR _18531_/S wire3831/X _28298_/Q _28298_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_206_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15738_ _15738_/X _15738_/A2 _15737_/X _29270_/Q _15738_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_258_5214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30200__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_146_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1508_A wire1508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20387__S _20391_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31784_ _31784_/Q _31887_/CLK _31784_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31326__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19391__A1 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_4961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30735_ _30735_/Q _32543_/CLK hold272/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18457_ VGND VPWR _18464_/S wire3839/X _28231_/Q _28231_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15669_ VGND VPWR _15669_/X _15666_/X _15668_/X _15705_/A1 wire1209/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__29373__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_4814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27678__B _30219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_190 _30033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_4994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26661__B1 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17408_ _17302_/A wire2079/X _17408_/X _17447_/A1 input190/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_15_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23475__A0 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold82_A hold82/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14755__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15952__A1 wire1477/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19679__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30666_ hold276/A _31470_/CLK _30666_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18388_ VGND VPWR _18388_/S wire3844/X _28165_/Q _28165_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_200_3034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24383__A _26763_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_1968 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17696__S _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32405_ _32405_/Q _32498_/CLK _32405_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_2557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20828__A2 _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30350__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17339_ VGND VPWR _17335_/X _17339_/X _17338_/X _17272_/A wire2113/X _17336_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_15_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24019__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25216__A1 hold123/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30597_ _30597_/Q _32015_/CLK hold497/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1877_A _19785_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26413__B1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire863_A wire863/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_2085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20350_ VGND VPWR _20352_/S _27507_/A1 _28890_/Q _28890_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32336_ _32336_/Q _32464_/CLK _32336_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15165__C1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23227__B1 _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_3520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_5581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21011__S _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23778__A1 _24273_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27965__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19009_ VGND VPWR _19009_/X _19306_/B _22088_/B1 _27967_/Q _19008_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_48_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14912__C1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_1733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20281_ VGND VPWR _20284_/S _27697_/A1 _28823_/Q _28823_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32267_ _32267_/Q _32513_/CLK _32267_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_157_2265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25926__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_5010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_1875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24830__B _24837_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22020_ _22512_/A3 _21817_/S _22020_/Y _17197_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_1_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18654__A0 _28367_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31218_ _31218_/Q _32562_/CLK _31218_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22450__A1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25418__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25519__A2 _19428_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32198_ _32198_/Q _32233_/CLK _32198_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_2180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length961_A wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20461__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14133__B _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19416__S _19416_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31149_ _31149_/Q _32168_/CLK _31149_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3160_A wire3160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_5521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3258_A wire3258/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19643__C _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1016_A _15768_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold16 hold16/A hold16/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17209__A1 _22905_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18406__A0 wire3900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14140__B1 _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold27 hk_dat_i[8] hold27/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17209__B2 _29732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27633__S _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15483__A3 _15546_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19603__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold38 hold38/A hold38/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_23971_ wire722/A _24199_/B1 _23970_/X _23969_/X _23966_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XFILLER_113_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_4902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold49 hold49/A hold49/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23165__C _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20213__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14691__A1 _28872_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18957__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25710_ _27784_/C _25710_/Y _25733_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_129_3002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_4924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_3508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32101__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22922_ VGND VPWR _22922_/X wire3133/X _22905_/X _30478_/Q _22917_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27141__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26690_ _26687_/D _31798_/Q _26687_/A _25884_/B _26692_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__25661__B _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20764__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_4_0_core_clk clkbuf_opt_4_1_core_clk/A clkbuf_5_2_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_148_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21961__B1 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25641_ _25641_/B _25642_/C _25641_/A _25682_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_74_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22853_ _22853_/B _22869_/C _22871_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_94_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_2878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25380__C _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18556__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_362_core_clk _30262_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23163__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29716__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23702__A1 _24648_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22505__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19906__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19151__S _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_3134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_4501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21804_ _21708_/A _21708_/B _21804_/X _21803_/X _21846_/A _21801_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__23702__B2 _31576_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28360_ _28360_/Q _30450_/CLK _28360_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_2801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_1884 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25572_ VGND VPWR _25109_/B _25572_/D _31367_/D _25577_/C _25576_/C VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_146_3382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20516__A1 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20297__S _20302_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22784_ VGND VPWR _22782_/X _22793_/B _22783_/X _22784_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_202_5268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22078__A _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26773__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18185__A2 wire3174/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32251__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19382__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18275__B _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27311_ VGND VPWR _27311_/S _27280_/X _32172_/Q _32172_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24523_ _24523_/X _24522_/B _31219_/Q _24522_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_2564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21735_ VGND VPWR _21746_/S hold273/A _21360_/A _21735_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_33_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28291_ _28291_/Q _30758_/CLK _28291_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16196__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3794_A _29932_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24258__A2 _24256_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31819__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26492__B _31704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26577__B1_N wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27242_ VGND VPWR _27262_/S _32117_/Q _27242_/A0 _32117_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22269__A1 _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24454_ _24454_/B wire798/A _24454_/A _24888_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__18367__A_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold221_A hold221/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15943__A1 _29041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23466__B1 _30419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21666_ _21666_/X _22026_/B1 _29901_/Q _23170_/C _21953_/A2 VGND VPWR _21665_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__28740__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14308__B _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23405_ _31955_/Q _30410_/Q _23405_/Y _23403_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__21710__A _29911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20617_ VGND VPWR _20617_/S _27710_/A1 _29132_/Q _29132_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27173_ _32079_/Q wire1570/X _32079_/D wire2770/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19387__A _24210_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24385_ _26541_/D _30995_/D _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_254_4933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25207__A1 _17286_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3234 wire3235/X _14263_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_159_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21597_ _21298_/X _21595_/X _21593_/Y _21597_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_276_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27100__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19685__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2500 _20809_/S _20817_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xmax_length3245 VPWR VGND _14627_/A1 _14102_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25207__B2 _31360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_2621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2511 VPWR VGND _20755_/S _20754_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_155_3607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25539__D _31346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26124_ _31552_/D _26020_/Y _24600_/B _31552_/Q _17876_/Y VGND VPWR _26123_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__16499__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2522 VPWR VGND _20716_/S _20717_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23336_ VGND VPWR wire820/X _30314_/Q _17229_/X _30314_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_11_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20548_ VGND VPWR _20548_/S _29065_/Q wire1783/X _29065_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_150_5610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30843__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31969__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3289 VPWR VGND fanout3284/A _14079_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_117_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21229__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2566 VPWR VGND _20211_/S _20209_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_max_length3125_A hold191/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24966__B1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26055_ _26066_/D _26055_/C _31533_/Q _31534_/Q _26055_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__14903__C1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28890__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23267_ VGND VPWR _23267_/S _29515_/Q _30250_/Q _30250_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15171__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2093_A wire2094/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20479_ VGND VPWR _20480_/S _28998_/Q _27704_/A1 _28998_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19437__A2 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25836__B _25836_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input176_A mprj_dat_i[11] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24430__A2 _24424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25006_ _25079_/A _24941_/B _25006_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__17448__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22218_ VGND VPWR _22218_/X wire2273/X wire826/X _22215_/X _22217_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_193_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_2952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22441__A1 _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21244__A2 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26707__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23637__A _32555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_1254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20760__S _20785_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_4674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23198_ VGND VPWR _23199_/S _30190_/Q _30120_/Q _30190_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24232__S _24232_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_1385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25555__C _31352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20452__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15459__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31276__D _31276_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15854__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24718__B1 _31566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29814_ _29814_/Q _30402_/CLK _29814_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_66_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23761__B_N _31780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30993__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22149_ _22149_/X _29822_/Q _22104_/A _22150_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 Xfanout1003 _16206_/A2 wire1005/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_40_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27380__A1 _32232_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26183__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28120__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2358_A _14192_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29246__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1025 VPWR VGND _16966_/A2 wire1030/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_4005 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24194__A1 _30567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14131__B1 wire3982/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_3005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25391__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16671__A2 _16661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29745_ _29745_/Q _31904_/CLK hold162/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14971_ _16840_/A2 wire3298/X _28751_/Q _14971_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26957_ _31984_/Q _26961_/C _31982_/Q _31983_/Q _27006_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__20061__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23075__C _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20204__A0 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18948__A1 _28188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14682__B2 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22744__A2 _22807_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16710_ _16690_/Y _16709_/Y _29677_/D wire894/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_1_3049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1142 VPWR VGND _14820_/S _14794_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13922_ _13922_/Y _28575_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_25908_ _26771_/A _25907_/Y _25903_/S _31471_/Q _31471_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19070__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17690_ _17873_/B1 _31718_/Q _17689_/X _17690_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_21_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29676_ _29676_/Q _32436_/CLK _29676_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20755__A1 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30223__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26888_ VGND VPWR hold132/A _19792_/A _26900_/A _26888_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__31349__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1175 VPWR VGND _15575_/A wire1175/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_147_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16423__A2 _16416_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25143__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16641_ _16721_/A2 wire3283/A _29639_/Q _16641_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28627_ VGND VPWR _28627_/D _32403_/CLK _28627_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26486__A3 _26492_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26386__C _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13853_ _28644_/Q _13853_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__17620__B2 _31712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25839_ _31442_/Q _25867_/A _25971_/B _25839_/Y _31443_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_267_1047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28270__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29396__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14434__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_2314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25694__A1 _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16974__A3 _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19360_ _19360_/X _19382_/A1 _19354_/X _19359_/X _22104_/A wire1563/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_16572_ VGND VPWR wire981/X _28102_/Q _29058_/Q _16572_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_2901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28558_ VGND VPWR _28558_/D _30580_/CLK _28558_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__20507__A1 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13784_ _13784_/A _13784_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_259_5534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21704__B1 _21708_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_3608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18176__A2 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19373__A1 _28208_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18311_ VGND VPWR _18260_/X _29765_/Q _22372_/A2 _18312_/B _18310_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_245_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_1968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_3398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27509_ VGND VPWR _27513_/S _27509_/A1 _32324_/Q _32324_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15523_ _15522_/X _15521_/S _15761_/A2 _32067_/Q _15523_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30373__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16187__A1 _32423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19291_ _19374_/B _28367_/Q _19290_/X _19291_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19912__A3 wire2154/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31499__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21180__A1 _29622_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28489_ _28489_/Q _30630_/CLK _28489_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_73_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25446__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_3772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_4855 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18242_ _18242_/Y _18241_/Y _18216_/X _22370_/A2 _18316_/A _18240_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 X_30520_ _30520_/Q _32441_/CLK input65/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15454_ _29326_/Q _15453_/X _15454_/Y _15627_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25299__A _31362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23457__B1 _29369_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15934__A1 _29211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25997__A2 _14195_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20935__S _20935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15934__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_3810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19125__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23311__S _23317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14405_ _21099_/C _14405_/X _22661_/B _23145_/A _14404_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_2 XPHY_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27988__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30451_ VGND VPWR _30451_/D _30451_/CLK hold360/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18173_ VGND VPWR _18222_/S _28082_/Q _27680_/A1 _28082_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15385_ _15384_/X wire1118/X _15737_/A2 _29540_/Q _15385_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_86_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18405__S _18407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_1132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_4552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17124_ _21778_/B _21903_/B _21676_/C _21676_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_4 XANTENNA__17687__A1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14336_ _14334_/B _29875_/Q _23115_/C _21459_/D _16987_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XANTENNA__27718__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18884__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17687__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25749__A2 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30382_ _30382_/Q _30382_/CLK _30382_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17529__B _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output562_A _28730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24931__A _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20691__A0 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32121_ _32121_/Q _32321_/CLK _32121_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17055_ VGND VPWR _17055_/X _21459_/D _29882_/Q _17078_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_14267_ _23611_/D _26837_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_4 XANTENNA__32570__D _32570_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2033_A wire2035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_2700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16006_ _16387_/A _16387_/C _29213_/Q _16006_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18636__A0 _28349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17439__A1 _32274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32052_ _32052_/Q _32351_/CLK _32052_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_119_2569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19979__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19744__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14198_ _19551_/B _14198_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XFILLER_256_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20443__A0 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31003_ _31003_/Q _31750_/CLK _31003_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_266_5549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32124__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25906__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16111__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18140__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26174__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24185__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27453__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2271 VPWR VGND _19216_/D1 _18677_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16662__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25382__B1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17957_ VGND VPWR _17983_/S wire3895/X _27894_/Q _27894_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout2282 VPWR VGND _19368_/B1 _18670_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_41_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14673__A1 _29210_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18939__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28613__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15870__B1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22735__A2 _22733_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29739__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23932__A1 _28490_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19760__A _20169_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16908_ _16959_/A2 wire3285/X _29269_/Q _16908_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_110_3768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23932__B2 _28682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19061__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1581 _20669_/B _24186_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_247_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1625_A wire1625/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20746__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17888_ _24610_/B _17889_/D _24590_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_56_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32274__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16414__A2 wire892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15217__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25134__B1 _31204_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17611__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19627_ _25079_/B _19628_/A _19628_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 X_31905_ _31905_/Q _31918_/CLK _31905_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire709_A wire710/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17611__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16839_ _16834_/X _16839_/B1 _16839_/A1 _16838_/X _16839_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_226_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16595__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14425__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_4447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_4166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25685__A1 _31391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30716__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15622__B1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22499__A1 _17184_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19558_ _19559_/B _19558_/Y _19558_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_31836_ _31836_/Q _31836_/CLK _31836_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21514__B _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23696__B1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28763__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_5301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29889__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19364__A1 wire3766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_2520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21006__S _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18509_ VGND VPWR _18512_/S wire3885/X _28281_/Q _28281_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_143_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16178__A1 _32052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1994_A wire1995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31767_ hold196/A _31869_/CLK _31767_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19489_ _19487_/Y _19485_/C _25469_/A _14119_/Y _19485_/A _25482_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a41oi_2 XFILLER_277_4933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17375__B1 hold60/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25437__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2834_A _23269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16717__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26634__B1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21520_ _21518_/A _21518_/C _21638_/A _21521_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_91_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30718_ hold378/A _32551_/CLK input83/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15925__A1 _28912_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14728__A2 _14723_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25988__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30866__CLK _30866_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31698_ _31698_/Q _31698_/CLK _31698_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_222_1120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24541__A_N _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22626__A _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23221__S _23221_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18823__B _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23999__A1 _31134_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17390__A3 wire3567/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29119__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25002__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21451_ _21451_/B _21548_/A wire3657/X _21451_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XFILLER_159_3039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_3195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30649_ _30649_/Q _32416_/CLK hold408/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19667__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22120__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20402_ VGND VPWR _20414_/S _27614_/A1 _28924_/Q _28924_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17678__A1 _31713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24170_ _28481_/Q _26949_/A wire802/A _28609_/Q wire1328/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_102_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27628__S _27630_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26398__C1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17678__B2 _31717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18875__B1 _19268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21382_ _21649_/C _30465_/Q _21486_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__25937__A _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26937__B2 wire2713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24841__A _24841_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15689__B1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23121_ _23191_/C1 _23191_/B1 _23185_/B hold364/A _23121_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xmax_length1117 VPWR VGND _15737_/B1 wire1118/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_236_4696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20333_ VGND VPWR _20338_/S wire1833/X _28873_/Q _28873_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32319_ _32319_/Q _32319_/CLK _32319_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19935__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15153__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25070__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29269__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18627__A0 _28340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_1552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21226__A2 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23052_ VGND VPWR _23056_/S hold199/A _23051_/X _30157_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_135_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20264_ VGND VPWR _20269_/S wire1837/X _28806_/Q _28806_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20580__S _20580_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23620__B1 _32559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19654__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_3285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20434__A0 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_5015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22003_ _21659_/A _21942_/S _22003_/X _22002_/X _22001_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_4 XFILLER_6_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13983__A _28514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_4060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_1558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27860_ _27860_/Q _30457_/CLK _27860_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26165__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20195_ _24210_/B _27233_/A _20195_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XANTENNA__18050__S _18052_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20985__A1 _29447_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17445__A4 _30852_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput106 hold118/A hold117/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__26768__A _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24176__A1 _28673_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput117 VPWR VGND _30748_/D la_input[4] VGND VPWR NF_sky130_fd_sc_hd__buf_2 X_26811_ _26811_/Y _26876_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__27363__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17850__A1 _31732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput128 VGND VPWR _30746_/D la_input[5] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_208_5422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26570__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27791_ VGND VPWR _27792_/S _25035_/B _32515_/Q _32515_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25912__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28293__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput139 VPWR VGND la_input[6] _30744_/D VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__14664__A1 _32415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout858_A wire860/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14664__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23923__A1 _30619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19052__A0 _19047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_4710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29530_ _29530_/Q _32321_/CLK _29530_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_180_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23923__B2 wire3645/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_82 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26742_ _26742_/Y _31786_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_2_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23954_ wire1633/X _30677_/Q _23953_/X _23954_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_hold171_A hold171/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_2057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20737__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1861_A _22966_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25125__B1 _31201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22905_ VGND VPWR _22905_/X _22924_/B _22905_/A _22924_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__27665__A2 _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29461_ _29461_/Q _32422_/CLK _29461_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26673_ VGND VPWR _26672_/Y _31865_/Q _26693_/B _26674_/A _26676_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__30396__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22300__S _22300_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_4656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_4326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23885_ wire1810/X _23884_/X wire4102/X _24165_/A3 _23885_/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a31o_1 XFILLER_57_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_904 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25676__A1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24479__A2 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23136__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15613__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_915 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28412_ _28412_/Q _32349_/CLK _28412_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31641__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_926 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25624_ VGND VPWR _25625_/C _25571_/C _25578_/X wire3532/X _31376_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_202_5032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22034__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22836_ VGND VPWR _22835_/A _22846_/A _22846_/B _22836_/X _22835_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA_937 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29392_ _29392_/Q _30230_/CLK _29392_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_4318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14967__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_948 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23342__D _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3070 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_959 _31371_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23151__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2066 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_3152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28343_ _28343_/Q _30281_/CLK _28343_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_16_3046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25555_ VGND VPWR _31352_/Q _31355_/Q _25555_/X _31353_/Q _31354_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_202_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22767_ _22766_/X _22765_/X _22765_/B _22752_/Y _22773_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_70_2815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21162__A1 _29605_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16005__A1_N wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14319__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24735__B _24735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_46 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24506_ _24502_/X _24490_/Y _24496_/Y _24506_/Y _24505_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XFILLER_227_1086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21718_ _21999_/S1 _21716_/Y _14353_/B _21746_/S _21718_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28274_ _28274_/Q _30198_/CLK _28274_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_159_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2106_A wire2107/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25486_ _31322_/Q _25448_/Y _25488_/A _31323_/Q _25486_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_107_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20755__S _20755_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22698_ _30092_/D _30092_/Q _22697_/X _22679_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__24227__S _24232_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_29_1_core_clk clkbuf_opt_29_1_core_clk/X clkbuf_opt_29_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_120_4075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31791__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20982__C _23236_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27225_ VGND VPWR _32104_/Q _25773_/C _32103_/Q _27226_/B _32105_/Q _32102_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__21440__A _30346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24454__C _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24437_ _24439_/B _24436_/Y _31018_/D _24437_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__26640__A3 _23772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17118__B1 _17117_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21649_ _21679_/B _21649_/A _21649_/Y _21649_/D _21649_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_259_2738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22111__B1 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22255__B _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26950__B _27053_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3148_A _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3042 VPWR VGND _18132_/S _18145_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17669__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15170_ _16721_/A2 wire3298/A _29255_/Q _15170_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27156_ VGND VPWR _27157_/S _27699_/A1 _32062_/Q _32062_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22662__A1 _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17669__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18866__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25847__A _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26928__A1 hold257/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24368_ _32031_/Q _24370_/A2 _24368_/X _31999_/Q wire1351/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_29_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3064 VPWR VGND _18034_/S _18043_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_90 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26928__B2 wire2384/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20056__A wire853/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_4725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24751__A _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2330 VPWR VGND wire2327/A _14210_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_68_2744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18330__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2341 VPWR VGND output672/A wire2342/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14121_ _31311_/Q _25462_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_275_1327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26107_ _31547_/Q _31548_/Q _26107_/Y _26112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__31021__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23319_ VGND VPWR _23334_/S _30297_/Q _17095_/X _30297_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32147__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32390__D _32390_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15144__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2363 _14189_/Y max_length2363/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_27087_ _27087_/C1 _27086_/X wire772/X _32021_/Q _32021_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14054__A _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25566__B _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24299_ _30949_/D _24308_/C _31601_/Q _24284_/X hold477/X _26382_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_194_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25600__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_18_0_core_clk clkbuf_5_18_1_core_clk/A clkbuf_4_9_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_fanout3315_A wire3320/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24470__B _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18618__A0 _28332_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14352__B1 _16987_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14052_ _25692_/A _14052_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__21217__A2 _21103_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26038_ _31529_/D _26020_/Y _14132_/Y _31529_/Q _17876_/Y VGND VPWR _26037_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__16892__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20490__S _20495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20425__A0 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_1013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28636__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_33_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13893__A _28604_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18094__A1 wire3894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2642_A _14203_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18860_ _18860_/X _18857_/X _19283_/S _18859_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_216_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_2050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27353__A1 _32208_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26156__A2 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19830__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31171__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24167__A1 _28480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17811_ _17764_/Y _17777_/B _17763_/X _17764_/B _17811_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__32297__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27273__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15447__A3 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3876_A wire3877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_1079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17841__B2 _14238_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18791_ VGND VPWR _19311_/B _28181_/Q _28213_/Q _18791_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27989_ _27989_/Q _30385_/CLK _27989_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21318__C _29731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22178__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14655__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_284_core_clk _30477_/CLK clkbuf_opt_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__30739__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15852__B1 _32302_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23914__A1 _31094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26469__B1_N _31702_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19580__A _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23914__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19043__B1 _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17742_ VGND VPWR _17832_/S _17764_/A _17718_/X _17742_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29728_ VGND VPWR _29728_/D _31955_/CLK _29728_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27105__A1 _26823_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14954_ _14953_/X _15233_/B1 _15597_/A2 _28091_/Q _14954_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20728__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28786__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_213_core_clk _31689_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_261_5468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29204__D wire833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23390__A2 _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13905_ _28592_/Q _13905_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__21615__A _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17673_ VGND VPWR _17672_/X _17625_/X _17720_/S _17673_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_29659_ _29659_/Q _32430_/CLK _29659_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_403_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14885_ VGND VPWR _14935_/S _28412_/Q _29077_/Q _14885_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_207_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15604__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_1478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26864__B1 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16947__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19412_ VGND VPWR _19417_/S _27258_/A0 _28428_/Q _28428_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_166_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_1_0_4_core_clk clkbuf_1_0_5_core_clk/A clkbuf_1_0_4_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_16624_ _16624_/Y _16617_/X _16949_/C1 _16619_/X _16623_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_147_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13836_ _29836_/Q _22248_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_264_1721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4023_A wire4024/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14958__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25131__A3 _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30889__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19346__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_4420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23142__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28016__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31621_ _31621_/Q _31726_/CLK _31621_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19343_ VGND VPWR _19343_/X _19374_/B wire1931/A _28047_/Q _19342_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_max_length2175_A _19601_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27302__A _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16555_ VGND VPWR _16555_/X _16843_/A2 wire1058/A _16552_/X _16554_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_13767_ _31179_/Q _13767_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_122_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25419__A1 _31358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19897__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26616__B1 _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24890__A2 _26837_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22496__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24645__B _24645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15506_ _15605_/A2 _15506_/X _15505_/X _15638_/B1 _29480_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_192_5518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31552_ _31552_/Q _31552_/CLK _31552_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19274_ _20901_/S _19265_/X _19273_/X _19274_/A1 wire884/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 X_16486_ _16486_/X _16485_/X _16967_/A1 _16483_/X _16479_/X _16481_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_177_4330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26092__A1 _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30119__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26092__B2 _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30503_ _30503_/Q _30503_/CLK _30503_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18225_ _18163_/B wire3712/A _18224_/X _18269_/B _18225_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_103_3561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15437_ _15575_/C _15640_/A1 _29262_/Q wire1175/A _15437_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_272_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31483_ _31483_/Q _32310_/CLK _31483_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16580__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18135__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19649__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24642__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28166__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14591__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_72_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30434_ _30434_/Q _30454_/CLK hold258/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18156_ _29453_/D _20989_/A _29452_/D _18156_/X _29454_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_199_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27448__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18857__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15368_ VGND VPWR _15368_/S _15367_/X _15366_/X _15368_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20113__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26919__A1 _31943_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29411__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23850__B1 _31893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26919__B2 wire2342/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27041__B1 _32000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17107_ _21447_/B _29719_/Q _29889_/Q _21630_/B1 _21649_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_64_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17974__S _17974_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14319_ _21451_/B _14319_/Y _21339_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_275_2562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold305 hold305/A hold305/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15135__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30365_ VGND VPWR _30365_/D _31937_/CLK _30365_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18087_ VPWR VGND _18087_/X _30413_/Q _30414_/Q _30484_/Q _18087_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_173_2814 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_2983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_5592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25198__A3 _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1575_A _26907_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_4071 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NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23684__A3 _19787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_330_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_1849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25340_ _25340_/X _25414_/B1 _31271_/Q _25335_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_121_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28509__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22552_ VGND VPWR _22552_/X _22552_/B _23226_/S _23061_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_52_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_2995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20575__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_88_core_clk _31577_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_222_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22356__A _22356_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16020__B1 _30491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26083__B2 _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21503_ _21522_/A _21503_/C _21503_/D _21490_/Y _21503_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4b_1 XFILLER_203_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13978__A _28519_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31044__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25271_ _31257_/D _25269_/X _26498_/A _25270_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_30_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22483_ _22513_/C1 _22482_/X _22513_/A2 _17120_/X _30002_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14573__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24094__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16571__A1 _30506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23638__A2_N wire1354/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18045__S _18049_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_17_core_clk _32342_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_271_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16571__B2 wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_229_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24633__A2 _24595_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27010_ _27008_/X _31987_/Q _31987_/D _27011_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA_fanout1348_A wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24222_ VGND VPWR _24242_/S _30898_/Q _27690_/A1 _30898_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_85_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29091__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21434_ VGND VPWR _21426_/Y _21430_/Y _21419_/D _21437_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22644__A1 _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18848__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_3112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27032__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28659__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24153_ _24153_/X _24151_/X _28543_/Q _24163_/B2 _19718_/B VGND VPWR wire804/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_232_5069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21365_ _21365_/Y _21365_/A _21365_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__16323__A1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29904__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23104_ _30168_/D _23185_/B _23103_/X _30168_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_137_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31194__CLK _31689_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20316_ VGND VPWR _20324_/S _27699_/A1 _28857_/Q _28857_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25594__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16874__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28961_ _28961_/Q _32435_/CLK _28961_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24084_ _28472_/Q _24139_/A2 _24084_/X _28600_/Q _19858_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__24721__D _31567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19384__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21296_ _21296_/B _21298_/B _21633_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_63_4098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_24_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3803 VPWR VGND _14408_/B wire3803/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_3432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_3481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23618__C _23618_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout975_A wire979/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3814 VPWR VGND wire3814/X _29871_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_80_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18076__A1 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23035_ _25693_/C _32460_/Q _23035_/X _23036_/S1 _32452_/Q _32468_/Q _32412_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_27912_ _27912_/Q _28363_/CLK _27912_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_150_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3825 VPWR VGND wire3825/X _29868_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20247_ VGND VPWR _20247_/S _28790_/Q _27696_/A1 _28790_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_1918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3924_A _29735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26138__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3836 wire3836/X wire3837/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_130_3919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28892_ _28892_/Q _32436_/CLK _28892_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_284_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3847 VPWR VGND wire3847/X _29860_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19812__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16087__B1 wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24149__A1 _28479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26498__A _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3869 VPWR VGND wire3869/X _29854_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17284__C1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16626__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22241__D _22241_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27843_ VGND VPWR _32543_/Q _32542_/Q _32544_/Q _27844_/B _32545_/Q _25804_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_24_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26689__A3 wire1282/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17823__B2 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20178_ _26687_/B _20177_/X _20192_/A2 _28733_/Q _28733_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_22_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14637__A1 _29554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14321__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15834__B1 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_1984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_117_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_3083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_5181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_31_0_core_clk clkbuf_opt_31_1_core_clk/A clkbuf_5_28_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_76_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27774_ VGND VPWR _27774_/S _19734_/A _32500_/Q _32500_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_210_3998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24986_ _25079_/A wire1283/X _24986_/X _25051_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_wire2056_A wire2057/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27106__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27199__B1_N _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input139_A la_input[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21907__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20658__A_N wire1666/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29513_ _29513_/Q _31916_/CLK _29513_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_245_641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26725_ _26724_/Y _26861_/C1 _31815_/Q _26720_/A _31815_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_229_192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23937_ wire762/A _20126_/X wire4128/X wire4016/X _24188_/A2 VGND VPWR _23929_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_96_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22580__A0 wire3710/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20186__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17587__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26846__B1 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_701 _25448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17051__A2 _30382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_712 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29444_ _29444_/Q _30314_/CLK _29444_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14670_ VGND VPWR _14670_/X _14669_/X wire1202/X _14822_/B1 _14668_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_264_1017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15598__C1 _15598_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26656_ VPWR VGND _26656_/X _31788_/Q _26656_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_723 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26310__A2 _31643_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25113__A3 _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23868_ _23868_/X _23859_/A _31867_/Q _24370_/A2 _31899_/Q _19527_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_226_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22965__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_734 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15062__A1 _28094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_745 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_268_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23124__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24321__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_756 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_4740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25607_ VGND VPWR _31373_/D _25607_/B _26242_/A _25607_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_122_4137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27122__A _27122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22819_ _22820_/B _22820_/C _22819_/X _23130_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA_767 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29375_ _29375_/Q _30470_/CLK _29375_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_161_3452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21135__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26587_ _26587_/X _31770_/Q _31771_/Q _23745_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__17339__B1 _17335_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_778 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14049__A _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19879__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23799_ _23799_/X _23808_/A3 _24139_/A2 _31876_/Q _31844_/Q wire1605/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_122_3425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_789 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22478__A4 wire1748/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3265_A _14094_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_2000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18000__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28326_ _28326_/Q _28326_/CLK _28326_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16340_ _16815_/A2 _16340_/X _16339_/X _16841_/C1 _29222_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_25538_ _31347_/Q _31348_/Q _25539_/A _31346_/Q _25540_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_278_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20485__S _20485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29434__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19559__B _19559_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27271__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26074__A1 _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16011__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26961__A _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13888__A _28609_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27810__A2 _25795_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16271_ VGND VPWR _16566_/S _29597_/Q _29629_/Q _16271_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_196_2803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28257_ _28257_/Q _30225_/CLK _28257_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2592_A _18284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25469_ VGND VPWR _31314_/D _25469_/B _25469_/A _25510_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_202_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24085__B1 _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16562__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18010_ VGND VPWR _18015_/S wire3836/X _27944_/Q _27944_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14573__A0 _29239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15222_ _15503_/A2 _15221_/X _28421_/Q wire1493/A _15222_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_237_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27208_ _32096_/D _25768_/Y _27276_/C _27207_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_139_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30411__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18839__B1 _18838_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28188_ _28188_/Q _30403_/CLK _28188_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_177_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31537__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_Di0[20] wire2701/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23832__B1 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24481__A _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2811 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_4522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15153_ _15153_/X _28924_/Q _15638_/A2 _15638_/A3 _15638_/B1 _15152_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_215_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27139_ VGND VPWR _27142_/S _27682_/A1 _32045_/Q _32045_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15117__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27574__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26377__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25034__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2857_A _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14104_ _14104_/A _14104_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_8 XFILLER_64_2416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30150_ _30150_/Q _32498_/CLK _30150_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_3000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_156_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16865__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19961_ VGND VPWR wire1319/A _26687_/D _19752_/B _19961_/X _26153_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_81_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15084_ _15723_/A2 _15084_/X _15083_/X _15561_/C1 _32426_/Q _15561_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__20661__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output260_A _14013_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26782__C1 wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22399__A0 _21801_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17807__B _17807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14876__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18067__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22432__C _30285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18912_ VGND VPWR _18912_/X _18906_/X _19145_/B1 _22090_/B1 wire1673/X VGND VPWR + NF_sky130_fd_sc_hd__a211o_1 XFILLER_285_4509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14035_ _14035_/Y _28462_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__30561__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31687__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27326__A1 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26129__A2 _31554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30081_ hold155/A _31937_/CLK _30081_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19264__B1 _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21329__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19892_ VGND VPWR wire2195/X _26694_/D _24046_/B1 _19892_/X _26139_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_7_2321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14512__A _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21071__A0 _29522_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16078__B1 wire890/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16617__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18843_ _18842_/X _19375_/B1 _19375_/A2 _28314_/Q _18843_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_168_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_3943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_2365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output525_A _31092_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14231__B _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25888__A1 _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_1518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_2195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19016__B1 _19015_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18774_ _18774_/X wire2270/X _27924_/Q wire2281/X wire2582/X wire3766/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_231_1764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_5525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_3931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23899__B1 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15986_ _16447_/A2 _16447_/A1 _28778_/Q _15986_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_248_3652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_5_23_0_core_clk_A clkbuf_5_23_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27731__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17725_ _17503_/A _31717_/Q _17724_/X _17725_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_72_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15840__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14937_ _14937_/A1 _14932_/X _14937_/X wire1066/X _14928_/X _14936_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_59_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30983_ _30983_/Q _32036_/CLK _30983_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22571__A0 _22570_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17578__B1 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3268 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17042__A2 wire3725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29869__D _29869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15589__C1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17656_ _17501_/X _31715_/Q _17655_/X _17656_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_223_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14868_ _14546_/A wire1733/A _14868_/X _15628_/A2 _32117_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_166_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16607_ _16878_/A2 _16878_/A1 _30507_/Q _16607_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_179_4403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17969__S _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2557_A _20245_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13819_ _31127_/Q _13819_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_127_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31067__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21126__A1 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17587_ _31712_/Q _17539_/B _17587_/X _31711_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_274_5604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14799_ VGND VPWR _14799_/X _14798_/X _14797_/X _15235_/A1 wire1214/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22323__B1 _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_0_2_core_clk clkbuf_4_1_0_core_clk/A clkbuf_3_0_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__14800__A1 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_4_11_0_core_clk clkbuf_5_23_0_core_clk/A clkbuf_3_5_2_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_223_379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32312__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_5003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31604_ _31604_/Q _32296_/CLK _31604_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19326_ _19319_/X _20858_/S wire1904/X _19321_/X _19326_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_140_3536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16538_ _16965_/A2 _16952_/A1 _28101_/Q _16538_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4846 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22874__A1 _30474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20395__S _20406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27262__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26065__A1 _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16002__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20885__A0 _29371_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_4302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_2887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13798__A _31148_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26604__A3 wire1275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31535_ _31535_/Q _31694_/CLK _31535_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19257_ VGND VPWR _19257_/X _18856_/B _19380_/B1 _27915_/Q _19256_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_clkbuf_leaf_195_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16469_ wire3243/X _16910_/A2 _16469_/X _16934_/A2 _28887_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__24076__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16553__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15356__A2 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_88_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28801__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17750__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23418__A3 _30418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25812__A1 _31431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24615__A2 _19513_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29927__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30091__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18208_ _18208_/X _18254_/S _29856_/Q _29864_/Q _18158_/X VGND VPWR _18157_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_140_2879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_3612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22087__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14564__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19188_ _19188_/X wire1883/X _19172_/X _19177_/X _23527_/S _19187_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_220_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31466_ VGND VPWR _31466_/D _31796_/CLK _31466_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_258_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24391__A _31000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32462__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27014__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20127__C _20127_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18139_ VGND VPWR _18139_/S wire3848/X _28067_/Q _28067_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30417_ _30417_/Q _32269_/CLK _30417_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15108__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30543__D hold200/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27565__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26368__A2 _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30904__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold102 hold102/A hold102/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20101__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31397_ _31397_/Q _32546_/CLK _31397_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_3968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_290_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_4032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold113 hold113/X hold113/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_258_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24379__A1 wire2017/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold124 hold124/A hold124/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21150_ VGND VPWR _21151_/S _29593_/Q _27688_/A1 _29593_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold135 hold135/A hold135/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16856__A2 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_4347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_1894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30348_ _30348_/Q _30900_/CLK _30348_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24541__D _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28951__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20652__A3 wire1877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold146 hold146/A hold146/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_47_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold157 hold157/A hold157/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_1631 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25040__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22440__D_N _26946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold168 hold168/A hold168/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_64_3684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20101_ _27071_/C1 _20100_/Y _20122_/A _28696_/Q _28696_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_core.RAM256_A0[0] wire2398/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18058__A1 wire3903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length4105_A _13919_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold179 hold179/A hold179/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_236_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23051__A1 hold449/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21081_ VGND VPWR _21098_/S _27693_/A1 _29532_/Q _29532_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_116_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3073_A _18007_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23051__B2 wire3770/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30279_ _30279_/Q _30279_/CLK _30279_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_60_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25934__B _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_2641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_135_core_clk _32359_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_41_2202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17266__C1 _17265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20032_ _25065_/A _19995_/B _20032_/X _25059_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__17805__A1 _31724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16608__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25328__B1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32018_ _32018_/Q _32431_/CLK _32018_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_99_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23735__A wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17805__B2 _31728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14619__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_2284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25879__A1 _31430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29307__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15816__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_3116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_4014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19007__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_62 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24840_ wire1353/X _31065_/Q _26542_/C _24458_/C _24842_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__17281__A2 wire2054/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24000__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_1017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_3741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25343__A3 _25342_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15292__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_5414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18548__B _22620_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_1005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27641__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15831__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17452__B _24820_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24771_ _24771_/B _24775_/B _24771_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_273_257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20168__A2 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21983_ _21675_/X _21982_/Y _21674_/Y _21956_/A _21983_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22562__A0 wire3700/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_2459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26510_ VGND VPWR _31744_/D _26510_/B _26510_/A _26510_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_2_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2743 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18230__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23722_ _24273_/C _23721_/X _31471_/Q wire1875/X wire768/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27096__A3 _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20934_ VGND VPWR _20947_/S hold471/A wire3974/X _29399_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18230__B2 wire3879/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27490_ VGND VPWR wire1833/X _32305_/Q _27505_/S _32305_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_242_622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3505_A _31187_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28331__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29457__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24566__A _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23106__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26441_ _26441_/B _26441_/X _26441_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_105_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25500__B1 _25510_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23653_ VGND VPWR _23666_/S wire1826/X _30783_/Q _30783_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21117__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20865_ VGND VPWR _23527_/S _20864_/X _29361_/Q _29361_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30718__D input83/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15595__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1465_A _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_2036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22604_ VGND VPWR _22613_/S hold129/A _22603_/X _30079_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29160_ _29160_/Q _30903_/CLK _29160_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_88_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26372_ VGND VPWR _26949_/B _24273_/D _26874_/B _26372_/X _27091_/C1 wire1351/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__30434__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23584_ VGND VPWR _23593_/S _27698_/A1 _30504_/Q _30504_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_30_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19379__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20796_ VGND VPWR _20796_/S _29309_/Q wire2001/X _29309_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27253__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26056__A1 _31534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26781__A _26781_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18283__B _18283_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28111_ _28111_/Q _31966_/CLK _28111_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25323_ VGND VPWR _25336_/C _31266_/Q _31267_/Q _25325_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_175_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28481__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22535_ VGND VPWR _22551_/S _29824_/Q _30035_/Q _30035_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29091_ _29091_/Q _32435_/CLK _29091_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24067__B1 wire1258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21421__C _21623_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1632_A _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25264__C1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_70 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28042_ _28042_/Q _30254_/CLK _28042_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14555__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25254_ _25595_/A _25253_/X _25254_/A2 hold71/A _31251_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_22466_ VGND VPWR _22448_/C _21285_/A _22449_/A _22466_/X _29994_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__23814__B1 wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27005__B1 _31986_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24082__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14316__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24205_ _24205_/X _24205_/B1 _30629_/Q wire3643/X _24273_/C VGND VPWR wire1245/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_69_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21417_ _21419_/B _21679_/B _21420_/C _21419_/C _21444_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__30584__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23290__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25185_ _31222_/D _25148_/A _31222_/Q _25180_/X _25184_/Y _31221_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__22093__A2 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26359__A2 wire781/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27556__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22397_ _22397_/Y hold188/A _22613_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__18503__S _18503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24136_ _28669_/Q wire1289/X _24135_/X _31179_/Q _24136_/X _19994_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__16847__A2 wire1029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21348_ _14429_/X _21444_/A _21348_/Y _14431_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__21840__A2 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17627__B _17627_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29993_ _29993_/Q _30118_/CLK _29993_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3527 hold488/A _27854_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23348__C _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3538 _13829_/A _14245_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_172_2143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18049__A1 _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27308__A1 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28944_ _28944_/Q _32310_/CLK _28944_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24067_ _20673_/D _30719_/Q wire1258/X _24067_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_5_4953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3622 wire3623/X wire3622/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire2173_A wire2174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21279_ _21279_/A _30334_/Q _30417_/Q _21279_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_267_4217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25844__B _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3633 VPWR VGND wire3633/X _30731_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21053__A0 _29511_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3644 VPWR VGND wire3644/X _30667_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23018_ VGND VPWR _31395_/Q _23017_/X _23016_/X _23018_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3655 VPWR VGND _21439_/A hold421/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24790__A1 _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3666 VPWR VGND _22620_/A hold247/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2921 VPWR VGND _20408_/S _20410_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28875_ _28875_/Q _32550_/CLK _28875_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24240__S _24241_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3677 VPWR VGND _18552_/B _30429_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_4662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20800__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15807__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15862__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3699 _30342_/Q wire3699/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_27826_ VGND VPWR _25801_/D _32537_/Q _27844_/C _27826_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_15840_ _15840_/X _28806_/Q _16026_/A2 _16039_/B2 _16039_/C1 _15839_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__16075__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_4417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_4996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2987 VPWR VGND _18488_/S _18490_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15283__A1 _29056_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19549__A1 _28458_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26956__A _31986_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2998 VPWR VGND _18456_/S _18458_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_283_2105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23345__A2 _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_opt_25_1_core_clk_A clkbuf_opt_25_1_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25860__A _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15771_ _15771_/Y _15771_/B _15771_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_262_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27757_ _27765_/S _27766_/D _27793_/D _27793_/B _31398_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_76_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24969_ _31128_/D _25033_/B _24968_/X _25041_/A _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__20159__A2 _19584_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17510_ _26543_/A _17510_/X _13739_/Y _31745_/Q _31746_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__32335__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17069__C_N _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14722_ _14722_/X _29041_/Q _15628_/A2 _14930_/B2 _14675_/S _14721_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_245_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26708_ _26708_/Y _31769_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 X_18490_ VGND VPWR _18490_/S wire3839/X _28263_/Q _28263_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2605_A _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28593__D _28593_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27688_ VGND VPWR _27696_/S _27688_/A1 _32422_/Q _32422_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_57_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_520 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27492__A0 _32307_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26295__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_531 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18772__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29427_ _29427_/Q _30367_/CLK _29427_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17441_ wire3564/X _31932_/Q _17441_/X _17441_/B2 _17441_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA_542 _30578_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14653_ _14647_/X _15612_/B _14937_/A1 _14652_/X _14653_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_265_1860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_553 input80/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26639_ _26639_/Y _26631_/B _31784_/Q _23765_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XFILLER_260_452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22305__A0 hold236/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21108__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17980__A0 _27917_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_564 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23811__C _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_575 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14794__A0 _29622_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_586 input56/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17372_ _27006_/A _17372_/B _17372_/C hold54/X _29858_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_204_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_597 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29358_ _29358_/Q _30030_/CLK _29358_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21612__B _30220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3856 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14584_ _14583_/Y _32042_/Q _14584_/X _14817_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__15991__C1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27244__A0 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32485__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20867__A0 _29362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19111_ _19111_/X _27972_/Q _19159_/S _19179_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_89_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_2911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16323_ VGND VPWR _16323_/X _16322_/X _16321_/X _16736_/S wire1058/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_278_3656 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28309_ _28309_/Q _30254_/CLK _28309_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_1779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmgmt_core_wrapper_4214 mprj_adr_o[1] mgmt_core_wrapper_4214/HI VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 XFILLER_237_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16535__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24058__B1 _24056_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2974_A _18625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29289_ _29289_/Q _31586_/CLK _29289_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27795__A1 _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26598__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30927__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25255__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15102__S _15736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19042_ _19038_/X _19041_/X _19156_/S _19040_/X _19042_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31320_ _31320_/Q _31363_/CLK _31320_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16254_ wire918/A _16253_/X _16249_/X wire1048/A _16254_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28974__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20943__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20619__A0 _29165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output475_A _13890_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25738__C _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25270__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3575 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15205_ _15205_/X _32126_/Q _15638_/A2 _15638_/A3 _15515_/C1 _15204_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_237_3353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31251_ hold71/A _32299_/CLK _31251_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22084__A2 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16185_ _16206_/A2 wire1485/X _32311_/Q _16185_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_6_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23281__A1 wire3873/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4090_A wire4091/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27547__A1 _32335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25007__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18413__S _18426_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19736__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4188_A wire4188/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20095__A1 _28693_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22443__B _22445_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16299__B1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23820__A3 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25558__A0 _31358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30202_ _30202_/Q _30473_/CLK _30202_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21292__B1 _16992_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15136_ _15136_/X _28956_/Q _15135_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 Xoutput218 wire3499/X debug_oeb VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27726__S _27728_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31182_ _31182_/Q _32168_/CLK _31182_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput229 wire2299/X hk_stb_o VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17537__B _17537_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24752__A_N _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output642_A wire3124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28204__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_3990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14849__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30133_ hold401/A _30204_/CLK _30133_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_151_2205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24230__A0 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19944_ _25652_/A _19943_/X _19968_/A2 _28620_/Q _28620_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_29_2377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15067_ _15066_/X _15638_/B1 _15605_/A2 _28954_/Q _15067_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire1273_A _23779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25754__B _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14242__A _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26770__A2 _14216_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21044__A0 _29505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14018_ _14018_/Y _28479_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_263_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30064_ hold186/A _32296_/CLK _30064_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_113_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_5436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27027__A _31994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19752__B _19752_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19875_ _19874_/X _28587_/Q _28587_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_4_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17799__B1 _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30307__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1440_A wire1441/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17263__A2 input185/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18826_ _18823_/X _18824_/X _18826_/X wire1949/X _18825_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_111_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18460__A1 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_19_3_core_clk_A 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NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18688_ _30088_/Q _18681_/X _19218_/A2 _18686_/X _18688_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 X_30966_ _30966_/Q _32014_/CLK _30966_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_149_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26286__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25089__A2 wire1326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27483__A0 _32299_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_1045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19960__A1 _28628_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18763__A2 _19090_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31702__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17639_ VGND VPWR _17777_/B _17594_/X _17638_/X _17639_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15577__A2 _15577_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30538__D input55/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24297__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30897_ _30897_/Q _32429_/CLK _30897_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_247_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26691__D1 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_3322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20650_ VGND VPWR _20650_/S _27710_/A1 _29196_/Q _29196_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22847__A1 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_4138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27235__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26038__A1 _14132_/Y VGND VPWR VPWR VGND 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VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24049__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20581_ VGND VPWR _20581_/S _27707_/A1 _29097_/Q _29097_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32567_ _32567_/Q _32567_/CLK _32567_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27786__A1 _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16108__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26589__A2 wire817/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17723__B1 _31725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25246__C1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_3672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31852__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22320_ VGND VPWR _23342_/A _14534_/B hold424/A _29906_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_34_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_2432 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_4717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_14_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31518_ _31518_/Q _31836_/CLK _31518_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_105_2796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2907 _20572_/S _20562_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20853__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32498_ _32498_/Q _32498_/CLK _32498_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19927__B _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25648__C _30761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25261__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14136__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24064__A3 wire1625/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_387_core_clk _30453_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_31_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25010__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22251_ VGND VPWR _22280_/S _30311_/Q _30401_/Q _22251_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_3907 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19419__S _19419_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23272__A1 _23272_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22075__A2 _22075_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31449_ _31449_/Q _32390_/CLK _31449_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25800__A4 _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18818__A3 _18815_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3288_A _14079_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19646__C _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_4280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1046_A wire1053/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20086__A1 _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_316_core_clk _30027_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_21202_ VGND VPWR _21202_/S _29644_/Q wire1783/X _29644_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23608__A1_N _31065_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_3497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27636__S _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32208__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22182_ _22243_/C _22181_/X _22243_/A _22179_/X _22182_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_43_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25013__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22072__C _22072_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21133_ VGND VPWR _21134_/S _27704_/A1 _29577_/Q _29577_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_211_5473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23024__A1 _32395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19228__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24221__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19943__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15501__A2 wire1496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26990_ 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NF_sky130_fd_sc_hd__diode_2 Xwire2206 VPWR VGND wire2206/X wire2207/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_25_2731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22232__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2217 _25037_/B _19734_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_25941_ _25941_/A _25941_/X _25941_/B _25971_/B _25940_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XFILLER_60_2622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21064_ _31956_/Q _29517_/Q _21064_/Y _23403_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_285_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19662__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2228 VPWR VGND _25033_/B _27664_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_3378 VPWR VGND VGND VPWR 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NF_sky130_fd_sc_hd__decap_3 XFILLER_171_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32358__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18451__A1 wire3859/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28660_ _28660_/Q _32552_/CLK _28660_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_wire3622_A wire3623/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25872_ _31455_/Q _25871_/Y _31455_/D _25877_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27710__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25316__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_2357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18278__B _18278_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15265__B2 _15265_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27611_ VGND VPWR _27614_/S wire1826/X _32353_/Q _32353_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27371__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24823_ VGND VPWR _31055_/D _26559_/A _24256_/Y _24822_/X _26435_/A VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_16_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28591_ _28591_/Q _31837_/CLK _28591_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22879__A1_N _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22535__A0 _30035_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28847__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout938_A wire944/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_3593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17006__A2 wire3730/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18203__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27542_ _27542_/A _27542_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_249_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_82 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24754_ VGND VPWR _24754_/B _24754_/Y _31448_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_58_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21889__A2 _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold251_A hold251/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21966_ _21966_/B _21966_/Y _21966_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_197_5001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15017__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31382__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26277__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20010__A1 wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1941_A wire1942/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19951__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18754__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23705_ _23705_/X wire1289/A _31501_/Q _31577_/Q _24184_/A2 VGND VPWR _23704_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21713__A _21713_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_1156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20917_ _20917_/B _20917_/Y _30422_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_227_2865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_2291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3991_A _29385_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27473_ VGND VPWR _27475_/S _32293_/Q _32294_/Q _27473_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17910__B _17910_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24685_ _24686_/B _31468_/Q _31470_/Q _31469_/Q _24684_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__24288__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15568__A2 wire1493/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16765__A1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_32_core_clk _32225_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_145_2543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21897_ _14365_/B _21897_/X _22065_/B1 _22966_/S _23180_/A _17118_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_261_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_5389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_5610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29212_ _29212_/Q _32306_/CLK _29212_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26424_ _26424_/X _31692_/Q _31694_/Q _31693_/Q _26423_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_221_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14776__B1 wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23636_ VGND VPWR _31086_/Q _31082_/Q _31085_/Q _23637_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27871__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20848_ VGND VPWR _20848_/X _20848_/B _20848_/A _30422_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__28997__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_5080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23350__D _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14240__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_21_3_core_clk_A clkbuf_opt_21_3_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29143_ hold224/A _32134_/CLK _29143_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26355_ _26354_/X _31665_/Q _31665_/D wire781/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__16517__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23567_ VGND VPWR _23573_/S wire2013/X _30487_/Q _30487_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_14_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27777__A1 _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25237__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_3654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20779_ VGND VPWR _20786_/S _23663_/A1 _29293_/Q _29293_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21510__A1 _21534_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire802 VPWR VGND wire802/X wire802/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_197_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_4060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20048__B _24945_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire813 VPWR VGND wire813/X wire814/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_256_3217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24743__B _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25306_ _25306_/X _25380_/C _31264_/Q _25414_/B1 _31363_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__14528__B1 _14527_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22518_ _23563_/A _30020_/D _22517_/Y _22518_/B1 _22520_/B _30020_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 X_29074_ _29074_/Q _32422_/CLK _29074_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire835 VPWR VGND wire835/X wire835/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_26286_ _26285_/Y _23599_/B _31631_/Q _26331_/B _31631_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_6_403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20763__S _20784_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_4948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23498_ VGND VPWR _23522_/S _23497_/X _31953_/Q _30435_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_256_2505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24235__S _24239_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25252__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28227__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18741__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28025_ _28025_/Q _30415_/CLK _28025_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_129_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire868 VPWR VGND wire868/X wire868/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25237_ _25237_/X _25263_/B1 _29859_/D hold101/A _25197_/D VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_117_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22449_ _22449_/Y _22449_/A _23307_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_273_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23263__A1 _29511_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22066__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout4003 VPWR VGND wire4004/A _29353_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_216_5384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18233__S _18309_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_2549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3130_A wire3133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14543__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15740__A2 _30802_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2388_A _14171_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20077__A1 _28684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22263__B _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23802__A3 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25277__D _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21274__B1 wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22471__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_4514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25168_ _31215_/D _25430_/B _25167_/Y _31215_/Q _25413_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_input67_A la_input[11] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3313 VPWR VGND _25681_/B1 _25660_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_215_2202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26201__A1 _31589_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4120 VPWR VGND wire4120/X _28564_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_191_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3324 _25567_/B wire3365/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_272_1127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26201__B2 _32279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4131 wire4131/X _28550_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_286_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3335 VPWR VGND _26861_/C1 _27003_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24119_ _30581_/Q _24204_/A2 _24119_/X _30517_/Q wire1614/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__24212__A0 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19219__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4142 wire4142/X _28403_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 Xfanout3346 _26188_/A _26244_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_272_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17493__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18690__A1 _28177_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4153 VPWR VGND wire4153/X _28373_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2555_A _20245_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14062__A _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25099_ _24481_/B _31192_/Q _26542_/C _24889_/X _25099_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_29976_ _29976_/Q _32294_/CLK _29976_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17990_ VGND VPWR _18018_/S wire3904/X _27924_/Q _27924_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout3357 VPWR VGND _26509_/D _25447_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21026__A0 _29491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4164 VPWR VGND _32556_/D input75/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3430 VPWR VGND wire3430/X wire3430/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire4175 _32562_/D input43/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_134_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3441 VPWR VGND _14123_/A _32037_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4186 VPWR VGND wire4186/X wire4187/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14700__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29622__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28927_ _28927_/Q _31977_/CLK _28927_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16941_ VGND VPWR _16941_/X _16941_/B _16941_/A _16941_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_65_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3452 VPWR VGND wire3452/X wire3452/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4197 VPWR VGND _23597_/B wire4197/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_286_3925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3463 VPWR VGND wire3463/X _31667_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21577__A1 _21569_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1922 wire1924/A _19047_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire3474 VPWR VGND wire3474/X _31458_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2740 VPWR VGND wire2740/X _19634_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1944 VPWR VGND _19296_/B1 wire1951/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18442__A1 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19660_ _26773_/C wire1380/A _19660_/A _19660_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xwire2751 VPWR VGND _14148_/A _24441_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3496 VPWR VGND wire3496/X _31260_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1955 VPWR VGND wire1956/A wire1968/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16872_ wire1552/X _16943_/A1 _29268_/Q _16872_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28858_ _28858_/Q _32427_/CLK _28858_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27701__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21607__B _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2762 _24273_/A _20673_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_277_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15256__A1 _28791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2773 VPWR VGND _27683_/S _27698_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_237_235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26686__A _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16453__B1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18611_ VGND VPWR _18622_/S _23287_/A1 _28325_/Q _28325_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire2784 VPWR VGND _27621_/S _27614_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout990 wire996/A _16841_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27281__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1988 VPWR VGND _22086_/B1 _18678_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18993__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15823_ VGND VPWR _15823_/X _16249_/S wire1048/X _15822_/X _15821_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__31725__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25712__B1 wire3427/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27809_ VGND VPWR _25795_/X _32529_/Q _27844_/C _27809_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire2795 _27507_/S _27503_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1999 VPWR VGND _27686_/A1 _18213_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_163_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_3953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19591_ _19591_/Y _20096_/B _19632_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__26526__A_N _26533_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22526__A0 _30026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output223_A wire3378/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21326__C _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28789_ _28789_/Q _32433_/CLK _28789_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_3513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3764_A wire3766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23869__A3 wire1624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29772__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18542_ _30433_/Q _18542_/X _20912_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_30820_ VGND VPWR _30820_/D _32444_/CLK _30820_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_265_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15754_ _15754_/X _32332_/Q _15521_/S _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_124_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23822__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_4632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15008__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20938__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26268__A1 _31661_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20001__A1 _28647_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19942__A1 _28619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_4204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23314__S wire820/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14705_ wire3249/X wire1727/X _14705_/X _14705_/B1 _32344_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__21623__A _21623_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30751_ _30751_/Q _32537_/CLK hold154/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18473_ VGND VPWR _18476_/S wire3896/X _28246_/Q _28246_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_1999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24279__B1 wire1303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15685_ _15684_/X _15543_/S _15721_/A2 _32442_/Q _15685_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15559__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16756__A1 wire3668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17953__A0 _27890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20376__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_350 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18408__S _18433_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24818__A2 _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_361 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31875__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_372 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17424_ VGND VPWR _17429_/C _17424_/B _32272_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_50_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1021_A wire1021/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_1690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14636_ VGND VPWR _15275_/S _29209_/Q _29273_/Q _14636_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4103_A _28645_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_383 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29002__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30682_ hold337/A _31462_/CLK _30682_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_1942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_2397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_394 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output592_A _28693_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27217__B1 _32101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24294__A3 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32421_ _32421_/Q _32421_/CLK _32421_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_102_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17355_ wire3555/X _17355_/A2 _17355_/X _17447_/A1 input180/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_124_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14567_ VGND VPWR _15771_/A _30439_/Q _14565_/X _14567_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__21061__C _31970_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32573__D input70/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27768__A1 wire2248/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25228__C1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18932__A _28123_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_1997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_5536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_5585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_1598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_4906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16306_ VGND VPWR _16306_/X _16458_/S _16949_/C1 _16305_/X _16304_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_83_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25779__B1 _31418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31105__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32352_ _32352_/Q _32352_/CLK _32352_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17286_ VGND VPWR _17285_/X _14399_/A _17286_/X _17245_/X _32297_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_139_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17181__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14498_ _14496_/Y _14497_/Y _14090_/Y _30443_/Q _14459_/X _14502_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__17181__B2 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26440__A1 _31699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25243__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19025_ _28256_/Q _19025_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31303_ _31303_/Q _31923_/CLK _31303_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29152__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16237_ _16817_/A2 _16817_/A1 _28953_/Q _16237_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_278_2796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_2463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23254__A1 _29502_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22057__A2 _17228_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32283_ VGND VPWR _32283_/D _32293_/CLK _32283_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_62_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18143__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23269__B _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24451__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1488_A _14550_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26991__A2 _27000_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21265__A0 _18546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20068__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31234_ hold116/A _31763_/CLK _31234_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27456__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25765__A _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21804__A2 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16168_ _16168_/X _28983_/Q _16434_/A2 _16722_/B2 wire958/X _16167_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_274_1937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20667__A1_N _25648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17982__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31255__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15119_ VGND VPWR _15119_/X _15118_/X _15117_/X _15368_/S _15762_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_269_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31165_ _31165_/Q _32160_/CLK _31165_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18681__A1 _30377_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24203__B1 wire1298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30821__D _30821_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16099_ wire999/X _16091_/C _28781_/Q _16099_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_252_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18681__B2 _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32500__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21017__A0 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14298__A2 _24447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15495__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14403__C _29652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16692__B1 _16691_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30116_ _30116_/Q _30473_/CLK _30116_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_78_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire739_A wire739/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19927_ _19927_/X _20669_/C _20673_/B _20126_/A _23879_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__25951__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31096_ _31096_/Q _32529_/CLK _31096_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_133_3181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21568__A1 _21564_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_1656 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32598__A _32598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_1946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_5135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22620__C hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17236__A2 _14092_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18433__A1 _28208_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30047_ VGND VPWR _30047_/D _30471_/CLK hold492/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_168_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19858_ _19858_/X _20654_/D _20060_/A _19858_/B _20654_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__19630__B1 _19629_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15247__A1 _29257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20240__A1 _28783_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16444__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24506__A1 _24505_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21009__S _21017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18809_ wire1405/X _28376_/Q _18808_/X _28376_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_228_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16995__A1 _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19789_ _19789_/B _19789_/X _19789_/A _19789_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__22517__B1 _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_4216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15007__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21820_ _21820_/B _21820_/X _21820_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_168_2565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23732__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_5310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27894__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3036_A _18364_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27204__B _27204_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24521__A4 _31290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31998_ _31998_/Q _31998_/CLK _31998_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_243_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1090_A wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23224__S _23224_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_2431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21751_ hold273/A _21817_/S _29778_/D _21750_/X _21749_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_max_length1188_A wire1189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_2161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30949_ _30949_/Q _32275_/CLK _30949_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27551__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16747__B2 _16729_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_5130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_6_6_core_clk _31162_/CLK clkbuf_opt_6_6_core_clk/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17222__S wire886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20702_ VGND VPWR _20710_/S _29218_/Q _27690_/A1 _29218_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18545__C _18546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14758__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16211__A3 wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24470_ VGND VPWR _31031_/D _25447_/A _24480_/A _24470_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_90_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21682_ _21654_/X _21655_/X _21682_/X _21679_/Y _21844_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_124_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_5220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27208__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24285__A3 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23421_ VGND VPWR _23421_/X _23563_/B _23421_/A _30418_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_222_3485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20633_ VGND VPWR _20650_/S _27693_/A1 _29179_/Q _29179_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26762__C _26762_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_4697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27759__A1 _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25219__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25659__B hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15970__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1163_A wire1172/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18842__A _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3405 VPWR VGND _25750_/A _25692_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_203_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_5519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_5568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26416__D1 _24805_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19161__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26140_ VGND VPWR _26019_/A wire2231/X _26139_/X _31559_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_200_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23352_ _23355_/B _23355_/A _30334_/Q _23355_/C _23354_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_140_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20564_ VGND VPWR _20584_/S _27690_/A1 _29080_/Q _29080_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_49_3218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_1048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20583__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17172__A1 _29897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32030__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17172__B2 _23150_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25234__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22303_ VGND VPWR _22307_/S _29889_/Q hold499/X _29889_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_200_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15677__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2726 VPWR VGND wire2725/A _14156_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19149__S _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15183__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26071_ _26102_/C _26123_/D _26066_/X _31538_/Q _26071_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23245__A1 wire3981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19449__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23283_ VGND VPWR _23283_/S wire3869/X _30265_/Q _30265_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_252_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20495_ VGND VPWR _20495_/S _27687_/A1 _29013_/Q _29013_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_3873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15722__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2748 VPWR VGND wire2744/A hold113/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20059__A1 _28676_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21256__A0 _30434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_150_core_clk _32427_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_213_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1428_A _18293_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25022_ _25022_/B _25022_/X _25022_/A _25022_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_88_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22234_ VGND VPWR _22255_/D _29833_/Q _29834_/Q _22241_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__27366__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23796__A2 _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_157_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29645__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout790_A _25022_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18988__S _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout888_A _16971_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2932 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_4856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_71 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29830_ hold444/A _30139_/CLK _29830_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_233_4293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18672__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26195__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22165_ _22185_/D _21037_/X _22135_/A _22164_/X _22165_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_66_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_3579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3837_A _29864_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21008__A0 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14289__A2 _30318_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15486__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput560 wire4012/X la_output[51] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22811__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14313__C _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16683__B1 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput571 _28738_/Q la_output[61] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21116_ VGND VPWR _21116_/S _27242_/A0 _29560_/Q _29560_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30622__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput582 _28684_/Q la_output[71] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31748__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21708__A _21708_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25942__B1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29761_ _29761_/Q _31914_/CLK hold266/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1207 wire1210/X _15744_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_116_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26973_ _27009_/A _27028_/A _26973_/Y _31973_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_22096_ _22096_/X _22095_/B _22104_/A _22095_/A _22095_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xoutput593 _28694_/Q la_output[81] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22303__S _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2025 VPWR VGND wire2025/X _17386_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14694__C1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1229 _26935_/B1 wire1230/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_57_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2036 VPWR VGND wire2036/X _14400_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28712_ _28712_/Q _32160_/CLK _28712_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29795__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17227__A2 _30404_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1302 VPWR VGND _24308_/B wire1303/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2047 VPWR VGND wire2047/X wire2047/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25924_ _31479_/Q _25924_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_21047_ VGND VPWR _21057_/S _30042_/Q hold353/A _29507_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_134_2299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29692_ _29692_/Q _30411_/CLK _29692_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21427__B _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2058 wire2059/X _17272_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_259_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2069 VPWR VGND wire2069/X wire2069/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_hold466_A hold466/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20231__A1 _28774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1335 VPWR VGND wire1335/X wire1335/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_555 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_2677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18975__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1346 VPWR VGND wire1346/X _19715_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28643_ _28643_/Q _31119_/CLK _28643_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1357 _27076_/A _26773_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_25855_ VGND VPWR _25860_/D _31449_/Q _25878_/A _25855_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_275_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_2684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1964_A _18679_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30772__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31898__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25170__A1 _31216_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24806_ _24809_/A _24809_/C _24804_/Y _24806_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XANTENNA_input121_A la_input[53] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28574_ _28574_/Q _32583_/CLK _28574_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_1829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29025__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25786_ VGND VPWR _25793_/S _31421_/Q _31422_/Q _31421_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27114__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2136_A _19782_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20758__S _20785_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18188__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22998_ VGND VPWR _31396_/Q _22997_/X _22994_/X _22998_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_2397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_207_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27447__A0 _32281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23181__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19924__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18727__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18736__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27525_ _27523_/X _31381_/Q _27524_/Y _27525_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_19_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24737_ VPWR VGND _24786_/A _24737_/B _31455_/Q VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XANTENNA__17935__A0 _27873_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21949_ hold281/A _22074_/B1 _29795_/D _21948_/X _21947_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_186_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18228__S _18309_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_3249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_4838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21731__B2 _21365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26953__B _31977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30002__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15470_ _15730_/C1 _15465_/Y wire1084/X _15470_/Y _15469_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 X_27456_ VGND VPWR _27476_/S _32286_/Q _27455_/X _32286_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31128__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15946__C1 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24668_ _24669_/B _31462_/Q _31464_/Q _31463_/Q _31461_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_230_433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_3965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15410__A1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14421_ _29726_/Q _21339_/C _21451_/B _14422_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 X_26407_ _26407_/Y _31696_/Q _26427_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__29175__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3537_A hold178/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23619_ _23873_/D _25881_/D _24481_/B _24470_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_103_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22287__A2 _22284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27387_ VGND VPWR _27394_/S _32237_/Q _27266_/X _32237_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_230_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_5315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14057__A _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24599_ VPWR VGND _24599_/X _31525_/Q _24599_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__14764__A3 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15961__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20298__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_238_core_clk _32441_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_10_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17140_ _29893_/Q _22026_/A2 _17143_/B _23130_/C _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_29126_ _29126_/Q _30503_/CLK _29126_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_201_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21495__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17699__C1 _17485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14352_ _16987_/B _14356_/A _14351_/X _14348_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_275_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26338_ _27007_/A _26364_/A1 _26338_/X wire2245/X _24273_/D _26949_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a41o_2 XFILLER_101_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20493__S _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_3531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17163__A1 _29896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19567__B _19567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17163__B2 wire3932/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25225__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3704_A _30338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30152__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3950 VPWR VGND _21616_/A _23095_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_7_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31278__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17071_ _17071_/X _17070_/X _17094_/A _17067_/X _21664_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_238_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22039__A2 _22072_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29057_ _29057_/Q _32433_/CLK _29057_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2672_A hold185/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14283_ _31937_/Q wire3428/X _32038_/Q _31972_/Q _30328_/D _32039_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111o_4 X_26269_ VGND VPWR wire2626/X _14398_/B _26267_/B _26269_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_6_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_4948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16910__A1 wire3242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15713__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26973__A2 _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32523__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21247__A0 _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16022_ VGND VPWR _16022_/X _16120_/S _16807_/B1 _16019_/X _16021_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28008_ _28008_/Q _30276_/CLK _28008_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_193_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14921__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_3050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18898__S _18906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1645 VPWR VGND VGND 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VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17253__D _29198_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21970__A1 _21501_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18927__A _28251_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24648__B _24648_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15806_ wire1004/X wire1476/X _28404_/Q _15806_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_125_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_2475 VGND VPWR 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NF_sky130_fd_sc_hd__diode_2 XANTENNA__29518__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_2560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_2402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1403_A wire1403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30734_ hold327/A _32543_/CLK input67/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18456_ VGND VPWR _18456_/S _23291_/A1 _28230_/Q _28230_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_195_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15668_ _15737_/A2 _15668_/X _15667_/X _15737_/B1 _28970_/Q _15738_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_233_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_180 _23985_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32053__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15401__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_191 _30431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26661__A1 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17407_ _30951_/Q _30985_/Q _30879_/Q _30845_/Q wire3192/X _17411_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XANTENNA__17977__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2637_A wire2638/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14619_ VGND VPWR _14619_/X _14616_/X _14618_/X _14823_/A1 _14823_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_236_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_1974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19758__A _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23475__A1 wire4151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30665_ _30665_/Q _31510_/CLK hold276/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18387_ VGND VPWR _18388_/S wire3846/X _28164_/Q _28164_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_193_5240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30816__D _30816_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15599_ _15599_/X _28431_/Q _15598_/X _15605_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__14755__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18662__A _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15952__A2 wire1005/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24383__B _24383_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20289__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19143__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32404_ _32404_/Q _32416_/CLK _32404_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17338_ wire3577/X _30816_/Q _30833_/Q _17337_/X wire3191/X _17338_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XANTENNA__28542__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29668__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17154__A1 _30206_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30596_ hold331/A _31871_/CLK _30596_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_11_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24019__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25216__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27086__D_N _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32335_ _32335_/Q _32551_/CLK _32335_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_239_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17278__A _17278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17269_ _17269_/X _30921_/Q wire3591/X _17268_/X _30999_/Q _19792_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire1772_A wire1773/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23227__B2 _23236_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_3289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16901__A1 wire3285/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15704__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_2446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19008_ _19008_/X _19368_/D1 _30266_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_196_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24975__A1 _31131_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23778__A2 _20657_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30645__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32266_ _32266_/Q _32523_/CLK _32266_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18103__A0 _28032_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20280_ VGND VPWR _20284_/S _27251_/A0 _28822_/Q _28822_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_2138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_2135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3295 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_157_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_1756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28692__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31217_ _31217_/Q _32560_/CLK _31217_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26177__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18654__A1 _18234_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30551__D _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32197_ _32197_/Q _32536_/CLK _32197_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19851__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18601__S _18601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15229__C _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24188__C1 _24180_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16665__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17641__A1_N _17490_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23219__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31148_ _31148_/Q _31436_/CLK _31148_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_113_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30795__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14140__A1 _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold17 hold17/A hold17/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17209__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14140__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold28 hold28/A hold28/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_96_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16121__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23970_ _28557_/Q _20126_/X _23962_/X wire4014/X _23970_/X _24188_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 X_31079_ _31079_/Q _32299_/CLK _31079_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29048__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold39 hk_dat_i[16] hold39/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_187_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27677__A0 _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24839__A _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1009_A _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14691__A2 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22921_ _22917_/X _22921_/B _22921_/X _22921_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_6_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23743__A hold196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16968__A1 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21961__A1 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17090__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24558__B _31204_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25152__A1 _31209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25640_ _25641_/B _25641_/A _25642_/B _25682_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_wire3320_A _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14979__B1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30025__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16432__A3 _16431_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22852_ wire3133/X _22848_/X _22935_/A _22853_/B _30472_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_285_1830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3902 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20578__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_5214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27429__A0 _32272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23163__B1 _23162_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15640__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18709__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19906__A1 wire1386/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18556__B _30445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21803_ _21802_/Y _21705_/X _21652_/X _21713_/A _21803_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_164_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23702__A2 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28072__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_1825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29198__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17460__B _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25571_ VGND VPWR _25576_/C _31366_/Q _31367_/Q _25571_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_227_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22783_ _22782_/X _22783_/X _22793_/B _14404_/B _22846_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_94_2570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18048__S _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1280_A _25020_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22078__B _22078_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27310_ VGND VPWR _27311_/S _27278_/X _32171_/Q _32171_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_fanout1378_A wire1380/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26773__B _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19382__A2 _19376_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24522_ _24522_/C _24522_/Y _31219_/Q _24522_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_0_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21734_ _21734_/X wire1579/X _21644_/Y _21766_/B _21733_/X VGND VPWR _21846_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28290_ _28290_/Q _30384_/CLK _28290_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16196__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17393__A1 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24574__A _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_19_1_core_clk clkbuf_opt_19_2_core_clk/A clkbuf_opt_19_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__30175__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27241_ VGND VPWR _27262_/S _32116_/Q _27686_/A1 _32116_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1737_A _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24453_ VGND VPWR _24453_/Y _31023_/Q _24454_/A wire1651/A _24442_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__19668__A _26793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22269__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21665_ _22028_/S _21665_/B _21665_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__30726__D input79/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25389__B _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23466__B2 _23466_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3787_A _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15943__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31420__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1545_A wire1547/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32546__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_331_core_clk _30428_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_107_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23404_ _30409_/D hold328/A _21063_/B wire3444/X wire3331/X _23403_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_222_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14308__C _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20616_ VGND VPWR _20617_/S _27709_/A1 _29131_/Q _29131_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27172_ _32078_/Q wire1570/X _32078_/D wire2428/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21710__B _21711_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24384_ _30994_/D _24384_/C _24384_/A _26242_/A _24384_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_240_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18342__A0 _28120_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold214_A hold214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21596_ _22035_/B _21592_/X _21598_/A _21595_/A _21595_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_2 XANTENNA__25207__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27601__A0 _32343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21202__S _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2501 VPWR VGND _20809_/S _20797_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_26123_ VGND VPWR _26123_/C _26121_/X _26123_/X _26123_/D _26123_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__15156__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3257 VPWR VGND _15760_/A1 wire3258/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23335_ VGND VPWR wire820/X _30313_/Q _17221_/X _30313_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23218__A1 _30210_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16499__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20547_ VGND VPWR _20548_/S _29064_/Q _27261_/A0 _29064_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18893__A1 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3954_A _29709_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24415__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_5622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24966__A1 _31127_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26054_ wire2597/X _26053_/Y _31533_/Q _17877_/X _31533_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_114_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23266_ VGND VPWR _23267_/S _29514_/Q _30249_/Q _30249_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31570__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20478_ VGND VPWR _20485_/S _28997_/Q _27258_/A0 _28997_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14324__B _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25836__C _25836_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24430__A3 _14383_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25005_ _25810_/C _25004_/X _25021_/A2 _31146_/Q _31146_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_238_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22217_ _22281_/B2 _22216_/X _22217_/X _30107_/Q wire2284/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18645__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17448__A2 wire2061/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_23_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23197_ VGND VPWR _23199_/S _30189_/Q _30119_/Q _30189_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18511__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2086_A wire2087/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input169_A la_input[97] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29813_ VGND VPWR _29813_/D _30482_/CLK _29813_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_47_2082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25915__B1 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22148_ _22147_/X _22509_/C1 wire829/X _29821_/Q _29821_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_0_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14667__C1 _29167_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput390 _13810_/Y la_oenb[13] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_266_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23926__C1 _23925_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14131__A1 _31261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1026 _16934_/A2 _16947_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_131_3663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24194__A2 _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25391__A1 _31273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29744_ _29744_/Q _31959_/CLK hold417/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1037 VPWR VGND wire1038/A wire1043/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14131__B2 _14263_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27117__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16031__S wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14970_ _14969_/X wire1113/X _15515_/A2 _32311_/Q _14970_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_281_5032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2253_A _24454_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22079_ _30440_/Q _23302_/C _30441_/Q _22079_/X _23302_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__16671__A3 wire923/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26956_ _26961_/C _31981_/Q _31986_/Q _31985_/Q _31980_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_153_1974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22968__S _22968_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20061__B _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1059 VPWR VGND wire1060/A _15766_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16408__B1 _16727_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14682__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18948__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_1996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13921_ _28576_/Q _13921_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__23941__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25907_ VGND VPWR _14183_/A _19558_/A _25903_/S _25907_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_114_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_5486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29675_ _29675_/Q _30507_/CLK _29675_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16959__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26887_ _26218_/A _26886_/Y wire752/X _31893_/Q _31893_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28415__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25571__C _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17081__A0 _17079_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_3458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21952__B2 _21940_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16640_ VGND VPWR _16842_/S _29478_/Q _32132_/Q _16640_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17651__A _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28626_ _28626_/Q _32160_/CLK _28626_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_286_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2420_A _23876_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26340__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25838_ _31442_/D _31442_/Q _25836_/A _25836_/C _26153_/A _25836_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__17620__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13852_ _22427_/A _14367_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_186_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20488__S _20495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32076__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14434__A2 _21661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15631__A1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1059 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_5_28_0_core_clk_A clkbuf_5_29_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25694__A2 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26891__A1 _31895_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21173__A _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16571_ wire992/X _16571_/X _16570_/X wire958/X _30506_/Q wire1470/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_199_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28557_ VGND VPWR _28557_/D _31815_/CLK _28557_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_73_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13783_ _13783_/Y _31163_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_25769_ _25769_/X _32095_/Q _32096_/Q _32097_/Q _25768_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XANTENNA__30518__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22362__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18310_ _18229_/B wire3174/X _18310_/Y _29341_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__18176__A3 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19373__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15522_ _15760_/A1 wire1741/X _15522_/X _15760_/B1 _29126_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_38_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_207_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27508_ VGND VPWR _27515_/S _27701_/A1 _32323_/Q _32323_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_12_4305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19290_ _19380_/A2 _27948_/Q _19367_/B1 _19290_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_160_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_3620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28565__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28488_ _28488_/Q _31801_/CLK _28488_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19912__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25446__A2 _31363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18241_ _29751_/Q _18163_/B wire3712/X _18241_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__17797__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15453_ _15435_/C _15640_/A1 _28764_/Q _15435_/A _15453_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27439_ VGND VPWR _27475_/S _32276_/Q _32277_/Q _27439_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_125_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15395__B1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23457__A1 _13848_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23001__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30636__D _30636_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16592__C1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25299__B _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2887_A _20639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15934__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_2059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17298__D_N _17297_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14404_ _14404_/X _22661_/B _14404_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__26458__C_N _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21468__B1 wire3800/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30450_ VGND VPWR _30450_/D _30450_/CLK _30450_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18172_ _18172_/B _18172_/Y _18278_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__30668__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15384_ _15751_/A1 _16874_/A2 _15384_/X _15738_/A2 _29574_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__17136__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18333__A0 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_62_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21112__S _21116_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output388_A _13917_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31913__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17123_ _30217_/Q _21676_/C _29891_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_190_4712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29109_ _29109_/Q _32117_/CLK _29109_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_177_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14335_ _21778_/A _29875_/Q _14335_/X _17036_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__17554__B_N _17553_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4100 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30381_ _30381_/Q _30453_/CLK _30381_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24406__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19587__A_N _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25749__A3 _25635_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29960__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15698__A1 _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24931__B _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_1390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32120_ _32120_/Q _32355_/CLK _32120_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20691__A1 _29207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17054_ _17077_/A _21778_/B _29882_/Q _21653_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 X_14266_ _13829_/A _14266_/Y _14265_/X _31270_/Q wire3232/X _29500_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_158_2564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20951__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22968__A0 _30145_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14234__B _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26204__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24421__A3 _24420_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16005_ wire898/X _29658_/D _16004_/Y _15976_/X _15985_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_158_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32051_ _32051_/Q _32358_/CLK _32051_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length2218_A _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18636__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17439__A2 _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22003__A1_N _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4170_A wire4171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19833__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14197_ _14197_/Y _14196_/X _14167_/S hold150/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__18421__S _18425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19979__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19744__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16647__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31002_ _31002_/Q _32577_/CLK _31002_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20443__A1 _28963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24709__A1 _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23039__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27734__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_2726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_1751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_3703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3249 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23917__C1 _23909_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24185__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2261 VPWR VGND wire2264/A _19521_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_171_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1353_A wire1354/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30048__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17956_ VGND VPWR _17983_/S wire3902/X _27893_/Q _27893_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout2272 VPWR VGND _23343_/C _18671_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout2283 _18665_/X _22123_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__27659__A0 _32397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24659__A _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22196__B2 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18939__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32419__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23563__A _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16907_ VGND VPWR _16907_/X _16928_/B1 _16949_/C1 _16906_/X _16905_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19061__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23932__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28095__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27035__A _31997_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19760__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17887_ VGND VPWR _26903_/A _26837_/A _24459_/C _23611_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_247_3547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17072__A0 _17071_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_3438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29340__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3968 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25134__A1 _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31904_ _31904_/Q _31904_/CLK hold213/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19626_ _26950_/C _19625_/Y _19638_/A _28480_/Q _28480_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_56_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17611__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16838_ VGND VPWR _16838_/X _16837_/X wire1035/A _16838_/A1 _16836_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_147_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20398__S _20414_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1618_A _19789_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28908__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14425__A2 _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26874__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25685__A2 _25683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_3501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30198__CLK _30198_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31835_ _31835_/Q _31836_/CLK _31835_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19557_ _27077_/C1 _19556_/Y _19598_/A _28460_/Q _28460_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_241_517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22499__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16769_ _16768_/X _16928_/B1 _16911_/A2 _28863_/Q _16769_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_56_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24893__B1 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32569__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19364__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18508_ VGND VPWR _18531_/S wire3889/X _28280_/Q _28280_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_320_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31766_ _31766_/Q _31803_/CLK hold270/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_108_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19488_ _19488_/C _31317_/Q _19488_/X _31316_/Q _19487_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA__17375__A1 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29490__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17375__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25437__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22907__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_4945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23502__S _23516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_2284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30717_ _30717_/Q _32464_/CLK hold378/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_258_4333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18439_ VGND VPWR _18452_/S wire3900/X _28213_/Q _28213_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15386__B1 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27932__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30546__D input51/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16583__C1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15925__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31697_ _31697_/Q _31760_/CLK _31697_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19116__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22626__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_219_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21450_ _21464_/B _21632_/C _29733_/Q _21462_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_198_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23999__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25002__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30648_ hold399/A _32117_/CLK _30648_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_191_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31593__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22120__A1 _13848_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_3384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20401_ VGND VPWR _20418_/S _27693_/A1 _28923_/Q _28923_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15138__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17678__A2 _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20131__B1 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21381_ _21381_/Y _21381_/B _21381_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_258_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_30_0_core_clk_A clkbuf_5_31_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27595__C1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30579_ _30579_/Q _30580_/CLK hold342/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26937__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25937__B _25937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24841__B _24841_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19943__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23120_ _23180_/B _18535_/B _23180_/A _23120_/X _29721_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__15689__B2 _15670_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24948__A1 _31118_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20332_ VGND VPWR _20338_/S _27489_/A1 _28872_/Q _28872_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32318_ _32318_/Q _32318_/CLK _32318_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20861__S _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19935__B _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16350__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15153__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14897__C1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length1220_A wire1221/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15955__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23051_ _23049_/A _23051_/X _23050_/X _23048_/X hold449/A wire3770/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__18627__A1 wire3915/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20263_ VGND VPWR _20269_/S _27679_/A1 _28805_/Q _28805_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3270_A wire3270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32249_ _32249_/Q _32467_/CLK _32249_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_1673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23081__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21226__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_5549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19654__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23620__B2 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1126_A wire1128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22002_ _21572_/Y _21942_/S _21317_/Y _21574_/Y _22002_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_1_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21631__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27644__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_5027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20194_ _21173_/B _27233_/A _27485_/D _27598_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_4 XANTENNA__16102__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28438__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20985__A2 _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput107 VGND VPWR _30676_/D la_input[40] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_26810_ _26950_/C _26809_/X _26833_/A _31855_/Q _31855_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24176__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15310__B1 _15309_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput118 VGND VPWR _30656_/D la_input[50] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA_clkbuf_leaf_107_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25672__B _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27790_ VGND VPWR _27792_/S _25033_/B _32514_/Q _32514_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17850__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput129 VPWR VGND _30636_/D la_input[60] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_98_2919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23384__A0 hold135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22187__A1 _30038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_21_0_core_clk clkbuf_opt_21_1_core_clk/A clkbuf_5_21_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_22_2520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32099__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14664__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15861__A1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20198__A0 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23923__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26741_ _26740_/Y _26224_/A _31823_/Q _26754_/B _31823_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19052__A1 _19051_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23953_ wire1587/X _30741_/Q wire1267/X _23953_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_2_2625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_4722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_94 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21934__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18567__A _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15690__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17063__B1 _17060_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22904_ VGND VPWR _30112_/Q _22902_/Y _22903_/X _30112_/D wire1866/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_29460_ _29460_/Q _32306_/CLK _29460_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26322__B1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26672_ VGND VPWR _26668_/A _31791_/Q _31792_/Q _26672_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__21705__B _29352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23884_ _23884_/X _24186_/A3 _19928_/B _28613_/Q _31091_/Q _24165_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_77_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23136__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_905 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24479__A3 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28411_ _28411_/Q _29390_/CLK _28411_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15613__B2 _15593_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29833__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_916 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25623_ _25625_/B _25621_/X _31377_/Q _25622_/X wire3532/X VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_clkbuf_leaf_258_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22835_ _22835_/B _22855_/B _22835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA_927 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29391_ _29391_/Q _31970_/CLK _29391_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22034__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_938 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1662_A _19516_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_949 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20519__D_N _27233_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28342_ _28342_/Q _28342_/CLK _28342_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_4108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25554_ _31354_/D _31354_/Q _25553_/Y _25551_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_243_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_161_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22766_ _22766_/A _22766_/X _22766_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__16169__A2 wire944/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17366__A1 _32277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3175 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_5099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30810__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14319__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31936__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24505_ _30759_/Q _24505_/D _25507_/D _31335_/Q _24505_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XFILLER_178_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21717_ _22072_/C _21717_/Y wire3991/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_2 XANTENNA__15377__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28273_ VGND VPWR _28273_/D _30258_/CLK _28273_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19811__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25485_ VGND VPWR _25109_/B _25507_/D _31322_/D _25485_/C _19491_/X VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_259_3429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_58 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14719__A3 _14717_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23439__B2 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22697_ _22690_/X _22694_/Y _22697_/X _22696_/Y wire1866/A _22706_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_198_4280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18506__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1927_A wire1930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29983__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27224_ _32104_/Q _27223_/Y _32104_/D _25774_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__24100__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2001_A wire2002/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24436_ VGND VPWR _24438_/C _31017_/Q _31018_/Q _24436_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20982__D _23236_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21440__B _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21648_ _21649_/C _21649_/A _21679_/B _21649_/D _21648_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_257_3120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18315__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22255__C _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15129__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26950__C _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27155_ VGND VPWR _27155_/S _27698_/A1 _32061_/Q _32061_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17669__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26389__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18866__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24367_ _24366_/X _24888_/D _24889_/A1 _23611_/A _30986_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xmax_length3054 VPWR VGND _18077_/S _18074_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_254_5498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21579_ _21579_/A _21579_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_80 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25847__B _31446_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14335__A _21778_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26928__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30960__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_91 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20056__B _24953_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14120_ _31317_/Q _19485_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26106_ _31547_/D _26020_/Y _24610_/B _31547_/Q _26120_/A2 VGND VPWR _26105_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_4_501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_3197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23318_ VGND VPWR wire820/A _30296_/Q _17087_/X _30296_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29213__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3087 VPWR VGND _17949_/S _17950_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_2756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2353 _14195_/Y max_length2353/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_27086_ _27100_/B _26870_/B _27098_/A _27086_/X _27098_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20771__S _20788_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_146_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24298_ _30948_/D _26378_/A4 _31600_/Q _24284_/X _31677_/Q _26382_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__22552__A _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25566__C _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26024__A _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14888__C1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25600__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24470__C _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14051_ _21550_/B _21451_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_4 X_26037_ _26037_/X _26047_/A _26036_/X _26047_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__18618__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23249_ VGND VPWR _23250_/S _29497_/Q _30232_/Q _30232_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_3192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2370_A wire2371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19815__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20425__A1 _28945_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26959__A _32000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_4837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21622__B1 _21623_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19291__A1 _28367_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26010__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29363__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17810_ VGND VPWR _17832_/S _17809_/X _17785_/X _17810_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26678__B _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24167__A2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15301__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19861__A _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17841__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18790_ _18790_/X _18790_/S _28245_/Q _28312_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_7_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14070__A _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2635_A _19539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25582__B _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27988_ _27988_/Q _30294_/CLK _27988_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22178__A1 _29826_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14655__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15852__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19579__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_5250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23914__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17741_ _17764_/A _17842_/S _17740_/X _17729_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_79_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19043__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29727_ VGND VPWR _29727_/D _30217_/CLK _29727_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19580__B _19581_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26939_ _31963_/Q wire1573/X _31963_/D wire2391/A wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_14953_ wire3251/X _16814_/A2 _14953_/X wire1189/X _29047_/Q _16814_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_276_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27105__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30340__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31466__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13904_ _28593_/Q _13904_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_clkbuf_2_1_0_core_clk_A clkbuf_2_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23390__A3 _17079_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17672_ VGND VPWR _17832_/S _17671_/X _17648_/X _17672_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29658_ _29658_/Q _32358_/CLK _29658_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21615__B _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14884_ _14884_/A2 _14884_/X _14883_/X _15630_/A1 _28781_/Q wire1508/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_35_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15065__C1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23127__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26694__A _26694_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26864__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19411_ VGND VPWR _19416_/S _27702_/A1 _28427_/Q _28427_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_188_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16801__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16623_ VGND VPWR _16623_/X _16620_/X _16940_/B1 _16884_/S _16622_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28609_ _28609_/Q _32359_/CLK _28609_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_127_2806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13835_ _29837_/Q _13835_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_223_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_290_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_2866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29589_ _29589_/Q _32422_/CLK _29589_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27955__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_1733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_2148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_5_0_0_core_clk_A clkbuf_5_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15080__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_253_core_clk _30425_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19346__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31620_ _31620_/Q _31750_/CLK _31620_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_160_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_3575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21689__B1 _21644_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19342_ _19342_/X _19346_/D1 _28015_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XPHY_4 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16554_ _16554_/X _32361_/Q _16964_/A2 _16920_/A3 _16930_/A1 _16553_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_207_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13766_ _31180_/Q _13766_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_144_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27302__B _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4016_A _28714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30490__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20946__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22350__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19751__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27813__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23322__S wire820/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26616__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15505_ _16721_/A2 wire3298/X _32134_/Q _15505_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24890__A3 _24889_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24645__C _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25103__A _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31551_ VGND VPWR _31551_/D _32578_/CLK _31551_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19273_ VGND VPWR _19272_/X _19268_/X _19273_/S _19273_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_160_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16485_ wire992/X _16485_/X _16484_/X _16949_/A1 _30905_/Q _16960_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_223_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16565__C1 _16563_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15907__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18416__S _18423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16725__A _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_185_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26092__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18224_ _18295_/B _18224_/X wire3883/X _18223_/X _29340_/Q _18254_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_30502_ _30502_/Q _32351_/CLK _30502_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_195_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15436_ _15435_/X _29028_/Q _15436_/Y _15638_/B1 wire1500/X wire1493/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311oi_2 XPHY_680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17109__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31482_ _31482_/Q _31578_/CLK _31482_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_190_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output672_A output672/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17109__B2 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18306__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16580__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14591__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30433_ VGND VPWR _30433_/D _30433_/CLK _30433_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18155_ _29454_/D _23640_/D _29452_/D _29453_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_177_3663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15367_ VGND VPWR _15750_/S _28425_/Q _29090_/Q _15367_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16317__C1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32581__D hold211/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23850__A1 _31861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26919__A2 _26907_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23850__B2 wire1397/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17106_ VGND VPWR _23348_/C wire3762/X _30389_/Q _17106_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_42_5511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14318_ _17077_/A _14316_/Y _29719_/Q _21778_/B _14318_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_138_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30364_ _30364_/Q _30425_/CLK _30364_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18086_ VGND VPWR _18086_/S _18532_/A1 _28016_/Q _28016_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold306 hold306/A hold306/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_15298_ VGND VPWR _15623_/S _28423_/Q _29088_/Q _15298_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15135__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16332__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold317 hold317/A hold317/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold328 hold328/A hold328/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32103_ _32103_/Q _32537_/CLK _32103_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24380__C _24380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17037_ VGND VPWR _17037_/X _21459_/D _29880_/Q _17078_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_154_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18609__A1 _23285_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold339 hold339/A hold339/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14249_ _14245_/B _14263_/B2 _31280_/Q _29510_/Q _14249_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XANTENNA__15540__B1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29706__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18151__S _18151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30295_ _30295_/Q _30385_/CLK _30295_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20416__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14894__A2 _15614_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32034_ _32034_/Q _32271_/CLK _32034_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27464__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32241__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19282__B2 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout819 _23307_/Y _23317_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_6_2013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19821__A3 wire2197/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17990__S _18018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16096__B2 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25355__A1 _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24158__A2 _24156_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31809__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18988_ VGND VPWR _19094_/S _18987_/X _18983_/X _18988_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22169__A1 _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24389__A _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14646__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28730__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_266 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23905__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29856__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2969_A _18616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17939_ VGND VPWR _17939_/S wire3843/X _27877_/Q _27877_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_5033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21916__A1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2777_A wire2781/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25107__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1390 VPWR VGND wire1392/A wire1397/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32391__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19585__A2 wire2682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18242__C1 _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26304__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20950_ VGND VPWR _20958_/S _30156_/Q _29415_/Q _29415_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16399__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23118__B1 _23117_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25658__A2 _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_4073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30833__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21017__S _21017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31959__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19609_ _19609_/Y _26882_/B _19609_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__21705__A_N _29351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23669__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20881_ VGND VPWR _20901_/S _20880_/X _29369_/Q _29369_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_4267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24866__B1 _24865_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2944_A _20262_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28880__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15071__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22620_ _22621_/C hold377/A _22620_/A _22620_/B _22620_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__24330__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3675 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31818_ _31818_/Q _32573_/CLK _31818_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17348__A1 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20856__S _20872_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17348__B2 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22341__A1 _30459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19888__A3 wire2201/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14139__B _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15359__A0 _30792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22551_ VGND VPWR _22551_/S _29840_/Q _30051_/Q _30051_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31749_ VGND VPWR _31749_/D _32577_/CLK _31749_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_277_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30983__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16020__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5007 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22356__B _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17230__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21502_ VPWR VGND _21502_/X _21503_/D _21503_/C VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_221_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28110__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25270_ _25270_/X _25380_/C _31257_/Q _25266_/Y _31356_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__29236__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_3091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22482_ VGND VPWR _22512_/A3 wire1748/X _22512_/A2 _22482_/X _30002_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_69_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25291__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16571__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_3402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24221_ VGND VPWR _24234_/S _30897_/Q _27689_/A1 _30897_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14582__A1 _28404_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21433_ _14114_/Y _21427_/B _21664_/B _21664_/D _21599_/A _21437_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 Xmax_length818 VPWR VGND wire817/A _26662_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_52_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18848__A1 _28151_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_4000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27032__A1 _31996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30213__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_61 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31339__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24152_ _28511_/Q _27053_/A wire804/A _28703_/Q _20061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_102_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21364_ _21364_/X _21365_/A _16993_/Y _21676_/B _29876_/Q _21778_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__20591__S _20598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_57_core_clk _32498_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_65_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28260__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23103_ VGND VPWR _23103_/X _23101_/X _23102_/X _23100_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_236_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29386__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19157__S _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20315_ VGND VPWR _20315_/S _27698_/A1 _28856_/Q _28856_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13994__A _28503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25594__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23054__C1 _18540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15531__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24083_ wire737/A _25022_/B _28664_/Q _31174_/Q _19995_/B VGND VPWR _24082_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28960_ _28960_/Q _29644_/CLK _28960_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19258__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18061__S _18085_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1410_A _18661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16874__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21295_ VPWR VGND _21298_/A _21296_/B _21633_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_43_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19384__C _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20407__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26779__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23034_ VGND VPWR _31395_/Q _23033_/X _23032_/X _23034_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27911_ _27911_/Q _30272_/CLK _27911_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3815 VPWR VGND _18249_/B _29871_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27374__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_3444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20246_ VGND VPWR _20259_/S _28789_/Q _24227_/A0 _28789_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3826 VPWR VGND _18229_/B wire3828/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_5379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28891_ _28891_/Q _31927_/CLK _28891_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout870_A _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26153__C_N _31566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3837 _29864_/Q wire3837/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_150_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21419__C _21419_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30363__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16087__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3848 VPWR VGND wire3848/X wire3849/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout968_A wire981/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31489__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21080__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17284__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24149__A2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3859 VPWR VGND wire3859/X _29857_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_436 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27842_ _32544_/Q _27841_/Y _32544_/D _25806_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_232_2967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_2393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17823__A2 _17709_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20177_ wire877/X _19768_/B _20177_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_hold281_A hold281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3917_A wire3918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15295__C1 _15307_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15834__A1 _29240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14637__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_111_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27773_ VGND VPWR _27774_/S _25035_/B _32499_/Q _32499_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_276_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_1996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22311__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_2407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24985_ _25810_/C _24984_/X _25017_/A2 _31136_/Q _31136_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27978__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21907__A1 wire726/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27106__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29512_ hold187/A _31933_/CLK _29512_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19576__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26724_ _26724_/Y _31777_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_96_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23936_ wire4092/X _25022_/B _23935_/X _31160_/Q _23936_/X _19995_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_265_2721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17587__A1 _31712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2049_A wire2050/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22580__A1 _30351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17587__B2 _31711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18784__B1 wire1931/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26846__A1 _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_2462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_702 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29443_ _29443_/Q _30391_/CLK _29443_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_713 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26655_ _26654_/X _26950_/C wire3452/X _31892_/Q _31787_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_35_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23867_ _30850_/D _26837_/B _23867_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_83_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_724 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23756__A_N _31779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_735 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_746 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25606_ VGND VPWR _25607_/C _25571_/C _25578_/X _25632_/B _31373_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_126_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23124__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24321__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input201_A mprj_dat_i[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22818_ VGND VPWR _30103_/Q _22825_/B _22817_/X _30103_/D _22938_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_246_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_757 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29374_ _29374_/Q _30471_/CLK _29374_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26586_ wire3454/X hold330/A _26584_/X _26859_/C1 hold329/X _26585_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__27122__B _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17339__A1 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20766__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_768 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4752 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14270__B1 _29494_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23798_ _30827_/D _23813_/C _23798_/A _23822_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_122_4149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24238__S _24238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_779 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26019__A _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19733__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28325_ _28325_/Q _30428_/CLK _28325_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25537_ _25537_/B _31347_/D hold426/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_221_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22749_ _29886_/Q _22766_/A _22746_/X _22748_/X _22779_/A1 _22745_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__26791__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32114__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_90 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26961__B _26988_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_2113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16270_ _14104_/A _16270_/X _32122_/Q wire1449/X wire1547/A _16566_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28256_ _28256_/Q _28326_/CLK _28256_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25468_ _31313_/Q _19481_/A _31314_/Q _25469_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24085__A1 wire4116/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22981__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input97_A la_input[31] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16562__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25282__B1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24085__B2 wire4012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24762__A _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_3_3_1_core_clk clkbuf_3_3_2_core_clk/A clkbuf_3_3_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_202_3494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_2195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_2203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15221_ _29086_/Q _15233_/B1 _15575_/A _15575_/C _15221_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27207_ _32093_/Q _32094_/Q _32095_/Q _27205_/B _32096_/Q _27207_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_31_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14573__A1 _28941_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22096__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24419_ _24437_/B _24417_/X _31010_/D _24418_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_254_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18839__A1 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28603__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28187_ _28187_/Q _29705_/CLK _28187_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29729__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14065__A _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25399_ _25578_/C _25397_/X _31275_/Q _25187_/X _25399_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_8_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20646__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15152_ _15435_/A _15435_/C _32316_/Q _15152_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27138_ VGND VPWR _27142_/S wire2012/X _32044_/Q _32044_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_4133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32264__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16314__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14103_ _28392_/Q _14103_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_257_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3268 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30706__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19960_ _19959_/X _28628_/Q _28628_/D _19984_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15083_ _16781_/A2 _15560_/A1 _32354_/Q _15083_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_155_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15522__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27069_ _27077_/C1 _27068_/X wire772/A _32012_/Q _32012_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_133_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16865__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25507__A_N _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22386__A2_N _21286_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22399__A1 _29956_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14876__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18911_ _18908_/X _19177_/B1 _18910_/X _18911_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__28753__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14034_ _28463_/Q _14034_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_268_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_2731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22432__D _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29879__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30080_ hold125/A _31536_/CLK _30080_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19891_ _19890_/X _28595_/Q _28595_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__23060__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16078__A1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14512__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_2333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21071__A1 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold8_A hk_dat_i[19] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25337__A1 _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19591__A _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18842_ _18842_/A _18842_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_0_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17814__A2 _17813_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23825__B _23825_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_3880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15286__C1 _15286_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14628__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14231__C _29979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25888__A2 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30856__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15825__B2 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23317__S _23317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_2488 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18773_ VGND VPWR _18773_/X _19357_/B wire1924/A _28020_/Q _18772_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_72_5515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15985_ _15980_/X wire898/X _16449_/B1 _15984_/X _15985_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__29109__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_3875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23899__B2 _30559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output518_A _31104_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26902__A_N _26762_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22020__B1 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17724_ _31724_/Q _17870_/A2 _17724_/X _31723_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_97_2259 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14936_ VGND VPWR _14936_/X _15233_/B1 wire1214/X _14935_/X _14934_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_94_3848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30982_ _30982_/Q _32287_/CLK _30982_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24937__A _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20031__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18775__B1 _19268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23841__A _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2285_A _22123_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27313__A _27349_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17655_ _17874_/A2 _31711_/Q _17654_/X _17655_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17042__A3 _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14867_ VGND VPWR _15623_/S _29592_/Q _29624_/Q _14867_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32576__D _32576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24848__B1 _24847_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15053__A2 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19319__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16606_ _16941_/C _16605_/X _16601_/X wire1062/X _16606_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28133__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13818_ _31128_/Q _13818_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__29259__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1316_A wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17586_ _17586_/Y _31713_/Q _17586_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_14798_ VGND VPWR _15275_/S _30491_/Q _30777_/Q _14798_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_196_5430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22323__A1 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23520__A0 _31964_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_2871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_2991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14800__A2 _28979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23052__S _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2452_A _24234_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31603_ _31603_/Q _32032_/CLK _31603_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19325_ _19377_/B _28078_/Q _19324_/X _19325_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_5173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16537_ VGND VPWR _16537_/X _16534_/X _16536_/X _16930_/A1 _16967_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_232_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14674__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32583_ _32583_/Q _32583_/CLK hold290/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_13749_ _31271_/Q _25350_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_196_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18146__S _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24629__A1_N _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_5026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17050__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26065__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM128_CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30236__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17345__A4 _17344_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31534_ _31534_/Q _31694_/CLK _31534_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27459__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19256_ _19256_/X _19346_/D1 _27883_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_31_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25768__A _32095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16468_ _16463_/X wire902/X wire911/X _16467_/X _16468_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_53_2899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16553__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25273__B1 _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4784 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_4003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17750__B2 _24602_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28283__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_2295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18207_ VGND VPWR _18309_/S _28087_/Q wire2002/A _28087_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14564__A1 _14610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15419_ VGND VPWR _15419_/X _15692_/S _15749_/C1 _15416_/X _15418_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_66_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19766__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19187_ VGND VPWR _19187_/X _19156_/S wire1896/X _19186_/X _19182_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_31465_ _31465_/Q _32432_/CLK _31465_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_121_2268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15761__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1685_A wire1686/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16399_ _16841_/A2 _16399_/X _16398_/X _16925_/B1 _28853_/Q _16920_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_259_3793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23823__B2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24391__B _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20637__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18138_ VGND VPWR _18144_/S _18644_/A1 _28066_/Q _28066_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30416_ _30416_/Q _31918_/CLK _30416_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire769_A wire769/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31396_ VGND VPWR _31396_/D _32546_/CLK _31396_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_12_2596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22192__A _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26368__A3 wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold103 hold103/A hold103/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__30386__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold114 hold114/A hold114/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_12_1873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24379__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold125 hold125/A hold125/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15513__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18069_ VGND VPWR _18074_/S wire3864/A _27999_/Q _27999_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30347_ VGND VPWR _30347_/D _32357_/CLK _30347_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_173_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold136 hold136/A hold136/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31631__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold147 hold147/A hold147/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_4359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold158 hold158/A hold158/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20100_ _20100_/Y _20100_/B _20122_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_275_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold169 hold502/A hold169/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_21080_ VGND VPWR _21092_/S _27247_/A0 _29531_/Q _29531_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19255__A1 _28397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30278_ _30278_/Q _31933_/CLK _30278_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23051__A2 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25934__C _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16069__A1 _16500_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17266__B1 wire4185/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20031_ _26861_/C1 _20030_/Y _20028_/A wire4063/A _28662_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32017_ _32017_/Q _32017_/CLK _32017_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_214_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17805__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16608__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23735__B _23735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3066_A _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15816__A1 _15813_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_2364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25008__A wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31781__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24000__A1 wire4076/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24000__B2 _31166_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22653__A_N _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17018__B1 _21661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_175_core_clk _32565_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15292__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_5426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_2017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24770_ _24770_/A _24770_/X _31442_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_240_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21982_ _21956_/A _21675_/X _21982_/Y _21713_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_2_1017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17569__A1 _31712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17452__C _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18766__B1 wire1896/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24847__A _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_104_core_clk _32117_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_247_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23721_ _31566_/Q _26017_/A _23721_/X _31518_/Q _24188_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_20933_ VGND VPWR _20933_/S _29398_/Q hold374/X _29398_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_78_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18230__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_1496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_2706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31011__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1193_A _15751_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18845__A _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15044__A2 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16241__A1 wire3278/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24566__B _31211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_4769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3400_A _32334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26440_ _26476_/S _31699_/D _26438_/X _31699_/Q _26439_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__25500__A1 _31330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23652_ VGND VPWR _23661_/S _27690_/A1 _30782_/Q _30782_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18518__A0 _28290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20864_ VGND VPWR _20872_/S _30230_/Q _29392_/Q _20864_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20586__S _20589_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14252__B1 _29496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23511__A0 _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22314__A1 _29900_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16792__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17127__A_N _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22603_ _22603_/X _22578_/S _22618_/A1 wire3705/X _30361_/Q VGND VPWR _22602_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_52_2310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26371_ _26370_/X _31673_/Q _31673_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__28626__CLK _32160_/CLK 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_28110_/Q _30425_/CLK _28110_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26781__B _26781_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25322_ _25322_/A _25322_/C _25334_/D _25322_/D _25322_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_108_2591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_5148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_4572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22534_ VGND VPWR _22550_/S _29823_/Q _30034_/Q _30034_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27369__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29090_ _29090_/Q _32427_/CLK _29090_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_5268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31161__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24067__A1 _30719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32287__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16544__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold127_A hold127/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17741__A1 _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28041_ _28041_/Q _28363_/CLK _28041_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14555__A1 _29518_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25253_ _25253_/X _25261_/B1 _29867_/D hold109/A _25197_/D VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19676__A _26801_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_82 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30729__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22465_ _30332_/D _22464_/X _22513_/A2 _17047_/X _29993_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15752__B1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18580__A _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20089__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21825__A0 _21812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20628__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24204_ _30565_/Q _24204_/A2 _24204_/X _32557_/Q _24317_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_276_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_4832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21416_ _21419_/B _21444_/A _21679_/B _21419_/C _21420_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_191_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28776__CLK _32403_/CLK VGND VPWR VPWR VGND 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_24135_/X _24134_/X _20669_/B _31147_/Q wire1622/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_65_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15504__B1 wire1228/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21347_ VGND VPWR _21346_/X _21342_/X _21345_/Y _21764_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_272_1309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16847__A3 wire1469/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29992_ _29992_/Q _30406_/CLK _29992_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_212_4729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3528 VPWR VGND _27280_/C hold396/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_254_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14858__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3539 wire3541/A _13829_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_265_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_1852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30879__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28943_ _28943_/Q _31577_/CLK _28943_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24066_ _30591_/Q _24140_/A2 _24066_/X _30527_/Q wire1609/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_46_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21278_ _29737_/D _21276_/X _23354_/C _21277_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23042__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28006__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3623 wire3624/X wire3623/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_219_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_4965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3634 VPWR VGND wire3634/X _30729_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_24_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17224__A2_N _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21053__A1 hold260/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17257__B1 wire2296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2900 VPWR VGND _20617_/S _20615_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23017_ _25691_/B _32490_/Q _23017_/X _23036_/S1 _32482_/Q _32498_/Q _32474_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 Xwire3645 VPWR VGND wire3645/X _30555_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2849 VPWR VGND _21679_/B _21677_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22250__B1 hold492/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20229_ _20229_/Y _20328_/C _24210_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_213_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26516__B1 _26515_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3656 VPWR VGND _21428_/A _30460_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_input151_A la_input[80] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28874_ _28874_/Q _32421_/CLK _28874_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2166_A _19764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3678 VPWR VGND _23231_/A _30426_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20800__A1 _29313_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_4505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20988__C _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27825_ _25801_/D _27825_/B _32536_/D _27844_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_232_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2955 _22273_/S _22180_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__30109__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2977 _22328_/A _22384_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17009__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15283__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19549__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22002__B1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2999 VPWR VGND _18458_/S _18452_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_287_2275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28156__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15770_ _15770_/A _15770_/B _15770_/C _15770_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA_wire2333_A wire2334/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27756_ VGND VPWR _27756_/S _25037_/B _32484_/Q _32484_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24968_ _24968_/X _31128_/Q _25776_/C _25017_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_280_718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18757__B1 _18752_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20013__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29401__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14721_ _14648_/A _14648_/C _28085_/Q _14721_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26707_ _26706_/Y _26694_/C hold498/A _26720_/A _31806_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_189_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_4825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23919_ wire4137/X _26838_/A1 _23919_/X _28585_/Q _25738_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_287_1585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27687_ VGND VPWR _27696_/S _27687_/A1 _32421_/Q _32421_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_283_1427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_510 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24899_ _24947_/A _24899_/Y _19538_/B _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_93_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16232__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_521 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27492__A1 _27685_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26295__A2 _14176_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_532 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17440_ _30957_/Q _30991_/Q _30885_/Q _30851_/Q wire3192/A _17440_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 X_29426_ _29426_/Q _30367_/CLK _29426_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_57_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30259__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14652_ _14651_/X _14649_/X _14928_/A1 _14652_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26638_ _26636_/Y _26637_/Y wire3428/X _31783_/D _26637_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA_543 _30578_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20496__S _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14243__B1 _29495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_554 input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22305__A1 _29891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16783__A2 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17980__A1 wire3822/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26972__A _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15440__C1 wire1085/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31504__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_565 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_576 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_587 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14794__A1 _29590_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17371_ VGND VPWR _17370_/X wire2027/X hold54/A hold53/X _17447_/B2 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_232_177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29357_ VGND VPWR _29357_/D _31971_/CLK _29357_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_52_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14583_ VGND VPWR _14818_/S _29101_/Q _14822_/B1 _14583_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_204_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26569_ _26569_/X _31839_/Q wire3454/X wire817/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_70_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_598 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29551__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3542_A _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_3578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19182__B1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19110_ _30271_/Q _19110_/X _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_243_2893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16322_ VGND VPWR _16961_/S _28787_/Q _28819_/Q _16322_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_100_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28308_ _28308_/Q _30233_/CLK _28308_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27279__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25588__A _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24058__A1 _28534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmgmt_core_wrapper_4215 qspi_enabled mgmt_core_wrapper_4215/HI VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 XFILLER_154_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29288_ _29288_/Q _32430_/CLK _29288_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_2923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25073__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25255__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24058__B2 _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16535__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24492__A _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14507__B _14515_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19041_ _19041_/X wire1896/X _19036_/X _22090_/B1 _19034_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__22069__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20228__C _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16253_ VGND VPWR _16253_/X _16825_/S _16500_/B1 _16250_/X _16252_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_237_4044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28239_ _28239_/Q _30402_/CLK _28239_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_5010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30644__D _30644_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2967_A _18607_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31654__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20619__A1 wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15204_ _15500_/A _15500_/C _29472_/Q _15204_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25270__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31250_ _31250_/Q _31547_/CLK _31250_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_215_5054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16184_ VGND VPWR _16184_/X _16722_/C1 wire1038/X _16181_/X _16183_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__28114__D _28114_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22084__A3 _22554_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22216__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21120__S _21131_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30201_ _30201_/Q _32108_/CLK _30201_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_29_2312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21292__A1 _29905_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20095__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15135_ _15135_/X _15609_/B1 _15277_/S _29254_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_215_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25558__A1 _31357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31181_ _31181_/Q _32168_/CLK _31181_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21292__B2 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput219 _32577_/Q flash_clk VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26755__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16214__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17537__C _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14849__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30132_ _30132_/Q _30477_/CLK _30132_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_81_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19943_ _25065_/A wire1316/X _19943_/X _25037_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_15066_ _14545_/B _15765_/B _15066_/X _15638_/A2 _29252_/Q wire1702/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_116_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output635_A _17879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1290 VPWR VGND _25069_/B _25085_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_29_2389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14242__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26212__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25573__A4 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21044__A1 _30040_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14017_ _28480_/Q _14017_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26507__B1 _31743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30063_ hold163/A _31998_/CLK _30063_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19874_ VGND VPWR _19551_/X _26838_/A4 _25738_/B _19874_/X _26153_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 Xclkbuf_leaf_2_core_clk _29390_/CLK clkbuf_leaf_2_core_clk/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_7_2141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1266_A _23963_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15259__C1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17799__B2 _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_5175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27742__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18825_ VGND VPWR _19271_/S _28150_/Q _28118_/Q _18825_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_168_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14669__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31034__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16471__A1 wire3285/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15274__A2 wire1064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18756_ VGND VPWR _18756_/X _19379_/B _19380_/B1 _27955_/Q _18755_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_15968_ _15958_/Y _15967_/X _29657_/D wire898/X _15950_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_4 XFILLER_58_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29081__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14482__B1 _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22544__A1 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_5025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21506__D _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21790__S _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17707_ VGND VPWR _17720_/S _17706_/X _17660_/X _17707_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length2667_A wire2668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27043__A _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18212__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14919_ _14919_/X wire1214/X _14912_/X _14914_/X _14918_/X _14919_/C1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_222_5047 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18087__D _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18687_ _18687_/X _30088_/Q _18666_/B _22167_/A1 _18681_/X _18686_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_30965_ _30965_/Q _32332_/CLK _30965_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28649__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_4482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_3637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16884__S _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30819__D _30819_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15899_ VGND VPWR _15904_/A _15898_/X _15897_/X _15957_/S wire1048/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18665__A _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2475_A wire2478/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15026__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16223__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26286__A2 _31631_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25089__A3 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27483__A1 _32298_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24386__B _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17420__B1 wire2075/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1600_A wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19960__A2 _19984_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17638_ VGND VPWR _17764_/B _17613_/X _17637_/X _17638_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_11_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31184__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30896_ _30896_/Q _32307_/CLK _30896_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15577__A3 _15435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17971__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16774__A2 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26882__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_5345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26691__C1 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14785__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17569_ _17569_/X _31712_/Q _17783_/B2 _17586_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_70_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15982__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26038__A2 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20419__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19308_ _28269_/Q _19308_/X _19357_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_wire886_A wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20580_ VGND VPWR _20580_/S _27706_/A1 _29096_/Q _29096_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_3427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32566_ _32567_/D _32566_/CLK input71/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_5419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15329__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16526__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24049__B2 _30531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17723__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23510__S _23516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31517_ _31517_/Q _31836_/CLK _31517_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19239_ _19239_/X _19238_/X _27946_/Q wire1993/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_31_3684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15734__B1 wire1209/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30554__D input47/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32497_ _32497_/Q _32498_/CLK _32497_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18604__S _18616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19927__C _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22250_ VGND VPWR hold492/A _22247_/Y _22249_/X _22250_/X _21051_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_277_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_4478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25010__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31448_ _31448_/Q _32390_/CLK _31448_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28029__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length984_A wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_1716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21030__S _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21201_ VGND VPWR _21201_/S _29643_/Q _27706_/A1 _29643_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_138_3263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20086__A2 wire2671/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25549__A1 _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22181_ _22181_/X _22180_/X _30102_/Q _22181_/B2 wire2284/A VGND VPWR _22092_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_290_2633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31379_ _31379_/Q _32412_/CLK _31379_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_wire3183_A wire3184/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14433__A _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_4191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_290_1910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_3422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21132_ VGND VPWR _21137_/S _27258_/A0 _29576_/Q _29576_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_64_3471 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19228__A1 _27977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24221__A1 _30897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19943__B _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22650__A _29727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17239__A0 hold467/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_356_core_clk _32122_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_211_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19779__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2207 VPWR VGND wire2207/X _19570_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21063_ _23403_/B hold328/A _21063_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 X_25940_ _25940_/Y _31484_/Q _31485_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_151_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1938 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3448_A _31903_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19662__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2229 VPWR VGND _19803_/C _26783_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_0_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1206_A wire1210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18987__B1 _18986_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29424__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18559__B _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20014_ VGND VPWR wire2660/X _26866_/A1 _20028_/A _20014_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22783__B2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23980__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1506 VPWR VGND wire1506/X wire1506/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_246_5559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27652__S _27654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input4_A flash_io1_di VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20794__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25871_ VGND VPWR _25877_/D _31455_/Q _25878_/A _25871_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27171__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_2513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1539 VPWR VGND wire1539/X wire1539/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15265__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16462__A1 _29023_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27610_ VGND VPWR _27626_/S _27690_/A1 _32352_/Q _32352_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_21_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24822_ _24817_/X _24822_/X _24821_/Y _17504_/Y _26243_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_266_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28590_ _28590_/Q _31873_/CLK _28590_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_227_4257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22535__A1 _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24577__A hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18739__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30401__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31527__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19936__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27541_ _25641_/B _32191_/Q _27542_/A _25641_/A _32183_/Q _32199_/Q _32175_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_184_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20546__A0 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_1102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24753_ _24754_/B _24678_/B _24752_/Y _24770_/A _24676_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__17006__A3 _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18203__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19400__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21965_ _21965_/B _21965_/C _21502_/X _21965_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XANTENNA__21889__A3 hold253/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29574__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15017__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16214__A1 _28415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26277__A2 _14203_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20010__A2 wire2653/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23704_ _23704_/X _19787_/X _31513_/Q _24188_/A2 _31466_/Q _20126_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_227_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19951__A2 _19570_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20916_ _20915_/X _23231_/A _20917_/B _20982_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_145_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27472_ VGND VPWR _27484_/S _32294_/Q _27471_/X _32294_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21713__B _21713_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24684_ _31470_/Q _31468_/Q _24691_/A _24684_/D _31469_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XANTENNA__24288__A1 _31667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21896_ _21896_/X _21946_/A _14407_/A _21889_/X _22074_/A2 VGND VPWR _21895_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_265_1168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17962__A1 wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26682__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22299__A0 hold220/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29211_ _29211_/Q _32113_/CLK _29211_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21205__S _21205_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26423_ _26423_/D _31692_/Q _26423_/Y _31694_/Q _31693_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__14776__A1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23635_ _23635_/X wire1330/X _31086_/Q _31083_/Q wire1371/X VGND VPWR _23634_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_20847_ _23226_/S _20847_/C _20847_/Y _23231_/A _30424_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_71_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3707 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_3595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30551__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31677__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19164__B1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15203__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20849__A1 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29142_ _29142_/Q _32423_/CLK _29142_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19703__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26354_ _26999_/A _26364_/A1 _26354_/X _19563_/X _24273_/D _26949_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a41o_2 XANTENNA_hold411_A hold411/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23566_ VGND VPWR _23593_/S _27680_/A1 _30486_/Q _30486_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_3177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20778_ VGND VPWR _20780_/S _27507_/A1 _29292_/Q _29292_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17714__A1 _31720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25237__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_72_core_clk _32549_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18911__B1 _19177_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire803 wire803/X wire803/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_25305_ VGND VPWR _25305_/X _25305_/B _25413_/A _25305_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_221_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire814 VPWR VGND wire814/X wire814/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_178_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22517_ _23563_/A _30020_/Q _22517_/Y _22520_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25788__A1 _31423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29073_ _29073_/Q _32421_/CLK _29073_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20191__C_N _19782_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26285_ VGND VPWR wire2656/X _19792_/A _26331_/B _26285_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_139_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23497_ VGND VPWR _23497_/S _14101_/A _30435_/Q _23497_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17912__A_N wire1688/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18514__S _18523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire836 wire837/X wire836/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_251_5221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_4998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_2498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input199_A mprj_dat_i[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire847 wire847/A wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_6_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28024_ _28024_/Q _30482_/CLK _28024_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25236_ _25595_/A _25235_/X _25264_/A2 hold89/A _31242_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_30_2460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22448_ _22448_/X _22448_/C _22448_/A _22449_/A _23395_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_101_3896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24460__A1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27529__A2 _32214_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15740__A3 _15758_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20077__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21274__A1 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25167_ _25172_/A _25148_/A _25167_/Y _31215_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__26737__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22379_ _29939_/D wire3160/X wire3649/X hold317/A _22338_/B VGND VPWR _22378_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21813__A3 _21713_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4110 VPWR VGND wire4110/X _28575_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_216_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3314 VPWR VGND _25076_/C1 _25810_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26201__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4121 VPWR VGND wire4121/X _28563_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_216_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3325 VPWR VGND _26179_/B1 _26148_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24118_ VGND VPWR _24118_/X _24273_/C _24118_/A _24118_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19219__A1 _28073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4132 VPWR VGND wire4132/X _28549_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3336 VPWR VGND _27003_/B1 wire3362/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_2105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16150__B1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4143 VPWR VGND wire4143/X _28402_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25098_ VGND VPWR _31191_/D _25098_/B _26509_/D _25098_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_29975_ _29975_/Q _30250_/CLK _29975_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3347 VPWR VGND _26236_/A _26188_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18690__A2 _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4154 wire4154/X _28339_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_43_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26032__A _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3358 wire3362/X _25447_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__31057__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21026__A1 wire3784/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4165 VPWR VGND _32570_/D input73/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_145_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14700__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4176 VPWR VGND _32563_/D input42/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16940_ VGND VPWR _16941_/B _16601_/S _16940_/B1 _16937_/X _16939_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28926_ _28926_/Q _31945_/CLK _28926_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24049_ _30595_/Q _24204_/A2 _24049_/X _30531_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_254_1573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25960__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3442 VPWR VGND wire3442/X _31963_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32302__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4187 VPWR VGND wire4187/X wire4188/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17036__C_N _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4198 VPWR VGND _32601_/A wire4198/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18978__B1 _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3464 VPWR VGND wire3464/X _31666_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21577__A2 _21569_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1923 _18688_/Y wire1924/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26967__A _31996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_3033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_24_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2730 VPWR VGND wire2730/X wire2731/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23971__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_2201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2741 wire2742/X _19634_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_2876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3486 _31364_/Q _25571_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16871_ VGND VPWR _16870_/Y _16868_/Y _16940_/B1 _16871_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_28857_ _28857_/Q _32321_/CLK _28857_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3497 VPWR VGND wire3497/X hold110/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_98_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2763 _24284_/A _24273_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17650__A0 _17649_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout980 _15773_/Y wire981/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_248_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18610_ VGND VPWR _18624_/S wire3860/X _28324_/Q _28324_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26686__B _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15822_ VGND VPWR _16823_/S _29519_/Q _29553_/Q _15822_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25712__A1 _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27808_ _25795_/X _27808_/B _32528_/D _27844_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 Xwire2785 _27605_/S _27618_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__29917__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout991 wire996/A wire992/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1989 _19298_/A2 _19380_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_19590_ _19590_/B _19628_/A _19754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XANTENNA_wire2715_A hold121/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30081__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28788_ _28788_/Q _32425_/CLK _28788_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_5_24_1_core_clk clkbuf_5_24_1_core_clk/X clkbuf_5_24_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_249_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22526__A1 _29815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24487__A _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_2619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18541_ _18580_/A _18541_/X _30422_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__32452__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24920__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20537__A0 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15753_ VGND VPWR _15753_/X _15750_/X _15762_/A1 _15521_/S _15752_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27739_ _27739_/A _31400_/Q _31399_/Q _27747_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_209_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21734__C1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23822__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16205__A1 _29016_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26268__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20001__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16205__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17402__B1 wire2082/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14704_ _14704_/X _32304_/Q _14703_/X _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_243_4081 VPWR VGND VGND VPWR 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wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21115__S _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_362 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17423_ _14401_/A1 _17423_/B _17423_/C hold20/X _29867_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_37_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29409_ _29409_/Q _32329_/CLK _29409_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22438__C _22445_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14767__A1 _15236_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14635_ _14606_/X _29134_/D wire1067/X _14615_/X _14634_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_18_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_373 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30681_ _30681_/Q _31460_/CLK hold337/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15964__B1 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_384 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14518__A _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_395 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27217__A1 _32099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15113__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_3094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32420_ _32420_/Q _32420_/CLK _32420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17354_ wire3558/A wire2105/X _17354_/X _17433_/A1 hold49/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_201_4975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14566_ _30439_/Q _14565_/X _15771_/A _14566_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_204_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20954__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21061__D _21062_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output585_A _28687_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5007 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18932__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_2915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23330__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16305_ VGND VPWR _16948_/S _29532_/Q _29566_/Q _16305_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_48_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_5548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25779__A1 hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32351_ _32351_/Q _32351_/CLK _32351_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17285_ VGND VPWR _17285_/X input200/X _17281_/X _17447_/A1 _17284_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14952__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26976__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14497_ _14497_/Y _29713_/Q _14515_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_83_4014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18424__S _18425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_4929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19024_ _19023_/X _19109_/S _19179_/A2 _28192_/Q _19024_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31302_ _31302_/Q _31369_/CLK _31302_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26440__A2 _26476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16236_ VGND VPWR _16236_/X _16233_/X wire1038/X _16843_/A2 _16235_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__24987__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27737__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15192__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32282_ VGND VPWR _32282_/D _32282_/CLK hold214/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_170_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24451__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21265__A1 _29727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20068__A2 _19539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31233_ _31233_/Q _32296_/CLK _31233_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_6_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16167_ _16206_/A2 _16817_/A1 _29015_/Q _16167_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_230_5349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_3758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14253__A _24618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21804__A3 _21801_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18130__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17267__C _29200_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28321__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15118_ VGND VPWR _15750_/S _30901_/Q _29179_/Q _15118_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_252_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31164_ _31164_/Q _32529_/CLK _31164_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16141__B1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24203__A1 _28676_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16098_ _16093_/X _16839_/B1 _16522_/B1 _16097_/X _16098_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_288_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18681__A2 _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24203__B2 _31186_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25400__B1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15495__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30115_ _30115_/Q _30404_/CLK _30115_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22214__B1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15049_ _15048_/Y wire1097/X _15046_/Y wire1214/A _15049_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_19926_ VGND VPWR _19926_/X _19926_/B _20673_/B _20669_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_61_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25951__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31095_ _31095_/Q _31436_/CLK _31095_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_170_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30424__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23962__B1 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27472__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22620__D _22620_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30046_ VGND VPWR _30046_/D _30139_/CLK hold260/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_59_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17283__B _30825_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19857_ VGND VPWR _19857_/X _19857_/B _20673_/B _20126_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19630__A1 _28481_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28471__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29597__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15247__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17641__B1 _31718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18808_ _23523_/S _18807_/X _18797_/X _19382_/A1 _18808_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XANTENNA__24506__A2 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19788_ _19788_/X _19788_/C _24273_/A _23879_/A _19788_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_0_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22517__A1 _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16995__A2 _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire801_A wire801/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23505__S _23515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20528__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18739_ _18738_/X _22088_/B1 _19358_/A2 _28309_/Q _18739_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_202_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18197__A1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23732__C _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30574__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31997_ _31997_/Q _32282_/CLK _31997_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_227_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_2756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27456__A1 _32286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22629__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2752 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21750_ _21099_/C _21750_/X wire3206/A _22954_/S _23145_/A _17010_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_263_3789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30948_ _30948_/Q _32024_/CLK _30948_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_94_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28019__D _28019_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17944__A1 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27551__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20701_ VGND VPWR _20708_/S _29217_/Q _27689_/A1 _29217_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_15_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15955__A0 _29105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14758__A1 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19003__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21681_ _21625_/Y _21695_/D VGND VPWR _21673_/X _21672_/Y _21626_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2oi_1 XANTENNA__16119__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30879_ _30879_/Q _32275_/CLK wire719/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14428__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19146__B1 _19145_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_5232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23420_ _23349_/A _21279_/X _21221_/A _30417_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_102_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20632_ VGND VPWR _20650_/S _27692_/A1 _29178_/Q _29178_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20864__S _20872_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25219__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26416__C1 _26102_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25659__C _27349_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18842__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23240__S hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23351_ _30331_/D _23343_/X _30332_/D _23350_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_198_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20700__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20563_ VGND VPWR _20584_/S _27244_/A0 _29079_/Q _29079_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32549_ VGND VPWR _32549_/D _32549_/CLK _32549_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_159_3948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17172__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3398_A _32572_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_1849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22302_ VGND VPWR _23388_/S _29888_/Q _29147_/Q _29888_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2716 VPWR VGND _19614_/B wire2717/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_26070_ _26070_/C _26081_/D _26070_/A _26070_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XANTENNA__27647__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19449__A1 _19447_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23282_ VGND VPWR _23298_/S wire3871/X _30264_/Q _30264_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_49_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20494_ VGND VPWR _20506_/S _27143_/A1 _29012_/Q _29012_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2738 VPWR VGND wire2737/A _14151_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_118_3601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20165__A wire881/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15722__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25021_ wire3320/X _25020_/X _25021_/A2 _13792_/A _31154_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20059__A2 wire853/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21256__A1 _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22233_ _29833_/Q _29834_/Q _22233_/Y _22241_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22453__B1 wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14930__A1 _29312_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26719__B1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24993__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23796__A3 wire1614/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3565_A wire3566/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14930__B2 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18121__A1 wire3917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_13_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_287_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16132__A0 _28982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27392__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26195__A1 _31586_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22164_ _29822_/Q _29824_/Q _29823_/Q _22163_/D _22164_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_62_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26195__B2 _32276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18672__A2 _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput550 wire4013/X la_output[42] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_268_5058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_190_core_clk _31894_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15693__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput561 _28729_/Q la_output[52] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15486__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21115_ VGND VPWR _21136_/S _27143_/A1 _29559_/Q _29559_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22811__C _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22205__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28814__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput572 _28739_/Q la_output[62] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_212_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29760_ _29760_/Q _32572_/CLK hold235/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25942__A1 _25937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26972_ _27009_/A _27006_/A _27006_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 X_22095_ _22095_/A _22095_/C _22095_/B _22119_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_4 Xoutput583 _28685_/Q la_output[72] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21708__B _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1208 _14541_/Y wire1210/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_25_3274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold194_A hold194/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput594 _28695_/Q la_output[82] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_2420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1219 VGND VPWR wire1221/A _14540_/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_25_3285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26787__A _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2026 VPWR VGND wire2026/X _17380_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23953__B1 wire1267/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27382__S _27384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28711_ VGND VPWR _28711_/D _31351_/CLK _28711_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_max_length1884_A wire1885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2037 VPWR VGND _23563_/A _25197_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_2_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25691__A _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25923_ _25922_/X _26148_/A _31477_/Q _24716_/A _31478_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_21046_ _22135_/A _29506_/Q _21045_/X _29506_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__32475__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_2510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20767__A0 _29281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29691_ _29691_/Q _30382_/CLK hold240/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2048 wire2049/X wire2048/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire1303 wire1303/A wire1303/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_fanout950_A wire963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1314 wire1314/A _19928_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23347__A_N _21279_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21427__C _21427_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2059 wire2060/X wire2059/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_fanout1692_A wire1705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17547__D_N _17576_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15238__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27695__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30917__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28642_ _28642_/Q _32160_/CLK _28642_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25854_ _25860_/D _25878_/A _31448_/D _25854_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA_hold361_A hold361/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22508__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16986__A2 _30319_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28964__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23705__B1 wire1289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24902__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17824__A1_N _17485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24805_ _24805_/B _31698_/Q _24805_/A _24809_/A _24805_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__21724__A _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14997__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25170__A2 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28573_ VGND VPWR _28573_/D _31860_/CLK _28573_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25785_ _31420_/D _25784_/X _31420_/Q _25782_/Y hold487/A hold396/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_245_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18188__A1 _29853_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22997_ VGND VPWR _31395_/Q _22996_/X _22995_/X _22997_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_246_3976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18509__S _18512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27114__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23181__A1 hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1957_A _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18188__B2 _29861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27447__A1 _32280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27524_ VGND VPWR _27522_/Y _27594_/B _31382_/Q _27524_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_186_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19924__A2 wire1328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2031_A wire2032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24736_ VGND VPWR _24699_/B _24735_/B _24735_/Y _24737_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_73_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21192__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input114_A la_input[47] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21948_ _14365_/B _21948_/X _22065_/B1 _22969_/S _23155_/A _17150_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_19_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25458__B1 _25510_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2129_A wire2129/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17935__A1 wire3857/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_2051 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27455_ VGND VPWR _27475_/S _32284_/Q _32285_/Q _27455_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_181_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24667_ _24663_/Y _24667_/X _24665_/X _24661_/X _24666_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_199_3728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_3381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21879_ _21879_/Y _21903_/A _21879_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19137__B1 wire1942/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_5_5_0_core_clk_A clkbuf_5_5_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24130__B1 wire1614/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14420_ _30337_/Q _14420_/Y _21339_/C _21451_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XFILLER_275_4317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26406_ _31692_/Q _31693_/Q _26405_/Y _31689_/Q _26427_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_4 XFILLER_243_1241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26670__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23618_ _23618_/B _24481_/B _24467_/C _23618_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 X_27386_ _31384_/Q _27404_/B hold143/A _31386_/Q _27394_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_180_2287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20774__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24598_ _24599_/A _24598_/Y _31525_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_278_2016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_52_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_3909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29125_ _29125_/Q _32071_/CLK _29125_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21495__A1 _30357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14351_ VGND VPWR _14355_/A _14355_/B _14338_/Y _14351_/X wire3987/A _14331_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__17699__B1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26337_ _26336_/X _31656_/Q _31656_/D _26347_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_158_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22692__B1 _21320_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21495__B2 _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23549_ VGND VPWR _23560_/S _30470_/Q _30040_/Q _30470_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14772__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17163__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18360__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_1326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3338_A _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17070_ VGND VPWR _17070_/X _21447_/B _29884_/Q _17078_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_29056_ _29056_/Q _32425_/CLK _29056_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15174__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_4304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14282_ _14275_/Y _14278_/Y _14300_/A _14300_/B _29980_/Q _17910_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 X_26268_ _26182_/A _26267_/X _26263_/A _31661_/Q _31622_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_2615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24770__A _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25630__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16910__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27784__C _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21247__A1 _23061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16021_ _16021_/X _30777_/Q _16448_/A2 _16448_/A3 _15975_/S _16020_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28007_ _28007_/Q _30450_/CLK _28007_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_278_core_clk _31916_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_84_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25219_ _25219_/X _25263_/B1 _29850_/D hold111/A _25197_/D VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_7_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14921__A1 _28878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2665_A _14183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14073__A _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26199_ _31588_/Q _26227_/A2 _26200_/B _32278_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18112__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22995__A1 _32455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30447__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_207_core_clk _32578_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xfanout3111 _14284_/Y wire3112/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_7_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27383__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16123__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_3942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17320__C1 wire3094/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3144 _21706_/Y _21708_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_4192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28494__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2410 VPWR VGND _20126_/B _14138_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15477__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24197__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3155 _21030_/S _21032_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22721__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17384__A _32281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17871__B1 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2832_A _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3166 VPWR VGND _23185_/B _23040_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25933__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17972_ VGND VPWR _17972_/S wire3843/X _27909_/Q _27909_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout2432 _27233_/Y _27262_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_29958_ _29958_/Q _32125_/CLK _29958_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3177 _18162_/X _22370_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_212_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2443 VPWR VGND _25261_/B1 _25194_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14685__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15882__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2454 wire2461/A _23573_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__18199__B _22332_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23944__B1 _28619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19711_ _26861_/C1 _19710_/Y _19711_/A2 _28516_/Q _28516_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27292__S _27292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3261 VPWR VGND wire3261/X wire3261/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1720 _23380_/S _23560_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_16923_ VGND VPWR _16929_/S _30917_/Q _29195_/Q _16923_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28909_ _28909_/Q _30866_/CLK _28909_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire3272 VPWR VGND wire3272/X _14518_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1731 VPWR VGND wire1733/A _23395_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29889_ _29889_/Q _29914_/CLK _29889_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_130_3366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3283 VPWR VGND wire3283/X wire3283/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_2122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_5467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14520__B _29453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30597__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1753 VPWR VGND _25261_/C1 _25196_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_260_5309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_4733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27686__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2560 VPWR VGND _20218_/S _20219_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_212_2976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25398__A_N _31283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24929__B _24929_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17623__B1 _17622_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19642_ _23876_/C _20126_/B _19857_/B _19642_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 X_31920_ _31920_/Q _31920_/CLK _31920_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31842__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16854_ _16854_/X _32369_/Q wire1029/X _16944_/B2 wire963/X _16853_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_210_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2582 VPWR VGND wire2582/X wire2582/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_24_2094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1786 VPWR VGND _27706_/A1 _18316_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20949__S _20958_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14437__B1 _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2593 VPWR VGND _18333_/S _18284_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_59_2113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15634__C1 wire1489/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_2454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21970__A2 _21624_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18927__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23325__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15805_ VGND VPWR wire969/X _32042_/Q _29101_/Q _15805_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24648__C _31464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25161__A2 _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25106__A _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19573_ _19573_/B _19573_/Y _19573_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_31851_ _31851_/Q _32553_/CLK _31851_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_output500_A output500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16785_ _16766_/Y _29679_/D _16756_/Y _16784_/X wire892/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__14988__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13997_ _28500_/Q _13997_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18419__S _18431_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25700__A4 _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23172__A1 hold262/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19376__B1 wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27438__A1 _32277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22449__B _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_91_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23172__B2 _30112_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18524_ VGND VPWR _18524_/S wire3837/X _28296_/Q _28296_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19915__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30802_ _30802_/Q _31937_/CLK _30802_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15736_ VGND VPWR _15736_/S _29036_/Q _29004_/Q _15736_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21183__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31782_ _31782_/Q _31884_/CLK _31782_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_267_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_310_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17926__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3787 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24945__A _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27533__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21722__A2 _21637_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15937__A0 _32113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31992__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30733_ VGND VPWR hold327/X _32541_/CLK _30733_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18455_ VGND VPWR _18456_/S wire3843/X _28229_/Q _28229_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20930__A0 _29498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15667_ wire1552/X wire3303/X _29268_/Q _15667_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_258_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_170 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19128__B1 _18983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_181 _24122_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24121__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_192 _30428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27678__D _27678_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17406_ VGND VPWR _17411_/C _17424_/B _32107_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_14618_ _14617_/X _14822_/B1 _14817_/A2 _28838_/Q _14618_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_clkbuf_leaf_209_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30664_ hold352/A _31436_/CLK _30664_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19679__A1 _28500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18386_ VGND VPWR _18386_/S wire3851/X _28163_/Q _28163_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_1472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19758__B _19758_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15598_ _16721_/A2 _15598_/X _29096_/Q _15598_/C1 _15598_/A1 _15639_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__18662__B _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_5252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32403_ _32403_/Q _32403_/CLK _32403_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_102_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15778__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24383__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17337_ _30939_/Q _17337_/X _30973_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_267_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22683__B1 _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14549_ _14549_/Y _15624_/A1 _16798_/A2 _14101_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_176_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30595_ _30595_/Q _31871_/CLK hold331/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32348__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18351__A1 wire3860/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27071__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27610__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32334_ _32334_/Q _32467_/CLK _32334_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15165__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27467__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25776__A _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17268_ _30929_/Q wire3185/X _17268_/X _30963_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__17278__B _17278_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold68_A hold68/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25621__B1 _25582_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16901__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21238__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19007_ VGND VPWR _19007_/X _19311_/B _19047_/S _28159_/Q _19006_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__17993__S _18017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31928__D hold489/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16219_ _16840_/A2 wire3281/X _28752_/Q _16219_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_252_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22435__B1 _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28837__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19774__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32265_ _32265_/Q _32544_/CLK _32265_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24975__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23778__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17199_ VGND VPWR _17238_/S _17193_/X _17198_/X _30400_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14912__B2 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18103__A1 wire3863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19300__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22986__A1 _22984_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_3457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31216_ _31216_/Q _31754_/CLK _31216_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27374__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32498__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20997__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19851__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32196_ _32196_/Q _32536_/CLK _32196_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_3700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22404__S _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22450__A3 _16974_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24188__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25385__C1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1932_A wire1933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31147_ _31147_/Q _32168_/CLK _31147_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_22_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14676__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_11_0_core_clk clkbuf_opt_11_1_core_clk/A clkbuf_5_8_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28987__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19909_ _19908_/X _28604_/Q _28604_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__14140__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27126__B1 _31485_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold18 hk_dat_i[26] hold18/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_282_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19603__A1 _28473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31078_ _31078_/Q _31548_/CLK _31078_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold29 hold29/A hold29/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_96_3526 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16417__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_1897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22920_ VGND VPWR _30114_/Q _22918_/Y _22919_/X _30114_/D _22938_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__14691__A3 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30029_ _30029_/Q _30455_/CLK _30029_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_2521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3146_A _21705_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20859__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25688__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_2896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_824 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29133__D _29133_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26885__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_4041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21961__A2 _17159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17090__A1 _29887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25016__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17090__B2 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25152__A2 _24561_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24558__C _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22851_ _29896_/Q _22933_/S _22851_/Y _22849_/X _21289_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_77_2235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_5242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18329__S _18329_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27429__A1 _32271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19367__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24360__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21802_ _21652_/X _21653_/X _21802_/Y _21712_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19906__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18556__C hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21174__A0 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25570_ _25571_/C _31366_/Q _31367_/Q _25572_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_22782_ _22794_/A _22793_/A _22782_/X _22773_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_224_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24855__A _31033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24521_ _31287_/Q _31288_/Q _31289_/Q _31290_/Q _31291_/Q _24522_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__22078__C _22078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26101__A1 _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26773__C _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21733_ _21733_/X _21645_/A _21645_/B _21812_/B _21705_/X _21732_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XPHY_306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15928__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19119__B1 wire1942/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18590__A1 _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17393__A2 hold2/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16050__C1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24112__B1 wire1254/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24574__B _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27240_ VGND VPWR _27255_/S _32115_/Q wire2002/A _32115_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28367__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24452_ _31022_/D _24445_/B _24451_/Y _24450_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_68_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21664_ _21664_/X _21664_/C _21664_/A _21664_/B _21664_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__26492__D _26492_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20594__S _20605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19668__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14600__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25389__C _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15943__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23403_ hold467/A _23403_/X _23403_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_194_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21477__A1 _21381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20615_ VGND VPWR _20615_/S _27708_/A1 _29130_/Q _29130_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__13997__A _28500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27171_ _32077_/Q wire1570/X _32077_/D wire2422/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_68_3606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17469__A _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24383_ VGND VPWR _30993_/D _24383_/B _26763_/C _26763_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xmax_length3214 VPWR VGND wire3213/A _20822_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18064__S _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21595_ _21595_/A _21595_/X _21595_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_124_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18342__A1 _18342_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_3579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1538_A wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27601__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26122_ _31551_/Q _31552_/Q _31550_/Q _26121_/D _26123_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_194_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27377__S _27384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15156__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23334_ VGND VPWR _23334_/S _30312_/Q _17213_/X _30312_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_140_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20546_ VGND VPWR _20550_/S _29063_/Q _27512_/A1 _29063_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16353__B1 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_4968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17550__C1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31715__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25612__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_136_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2535 VPWR VGND _20495_/S _20506_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21229__A1 _17079_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_371_core_clk _30412_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_179_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26053_ _26062_/D _26053_/Y wire2597/X _26052_/Y _24381_/A _17877_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o32ai_1 XFILLER_216_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19684__A _20165_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2557 VPWR VGND _20249_/S _20245_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23265_ VGND VPWR _23267_/S _29513_/Q _30248_/Q _30248_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24966__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_5634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20477_ VGND VPWR _20482_/S _28996_/Q _27509_/A1 _28996_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14903__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29762__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2568 VPWR VGND _19403_/S _19397_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_273_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_1381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25004_ _25079_/A _24939_/B _25004_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_4_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_4632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_300_core_clk _30481_/CLK clkbuf_5_21_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_118_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22216_ VGND VPWR _22280_/S _30306_/Q _30396_/Q _22216_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_3557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27365__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26168__A1 _31572_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1856 VPWR VGND _22075_/A2 _14405_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_175_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19842__A1 _28573_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23196_ VGND VPWR _23209_/S _30188_/Q hold180/X _30188_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length1867 VPWR VGND _21104_/B _22679_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_114_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22314__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17916__B _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_1999 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24179__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15459__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1267 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3013_A _18426_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29812_ VGND VPWR _29812_/D _30482_/CLK _29812_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17853__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25915__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24718__A2 _31564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22147_ VGND VPWR _22147_/X _22144_/Y _22146_/X wire2273/X _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_213_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31865__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25540__A_N _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_287_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14667__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput380 _13812_/Y la_oenb[11] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19740__D_N wire1376/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2079_A wire2080/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput391 _13809_/Y la_oenb[14] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23926__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1016 _15768_/Y _16150_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_29743_ _29743_/Q _31904_/CLK hold160/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_148_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14131__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1027 wire1030/X _16934_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_5_2420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22078_ _22078_/X _22078_/C _22078_/A _22078_/B _22078_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_26955_ _31979_/Q _26955_/D _31973_/Q _31976_/Q _27006_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__25391__A2 _24501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14340__B _23140_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1049 wire1053/A _16834_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_229_3404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20061__C _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25906_ _25904_/A _25905_/Y _25903_/S _31470_/Q _31470_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_13920_ _28577_/Q _13920_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_21029_ VGND VPWR _21030_/S wire3782/X _29494_/Q _29494_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_99_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1133 VPWR VGND wire1133/X wire1134/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29674_ _29674_/Q _32359_/CLK _29674_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_19_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19070__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14419__B1 _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26886_ _26886_/Y _26886_/B wire752/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__20769__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25679__B1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16959__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15616__C1 wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28625_ _28625_/Q _32549_/CLK _28625_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13851_ _22095_/B _29814_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__26340__A1 wire1351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25837_ _25878_/A _26153_/A _25971_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_1_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29142__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15092__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1199 VPWR VGND wire1199/X wire1199/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_164_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19358__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24351__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26964__B _31988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25694__A3 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26891__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21165__A0 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21173__B _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16570_ _16781_/A2 wire3283/X _30792_/Q _16570_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire2413_A _19788_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28556_ _28556_/Q _30580_/CLK _28556_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_207_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13782_ _31164_/Q _13782_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25768_ _25768_/C _25768_/Y _32095_/Q _32096_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_222_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15521_ VGND VPWR _15521_/S _15520_/X _15519_/X _15521_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27507_ VGND VPWR _27507_/S _27507_/A1 _32322_/Q _32322_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24719_ _31503_/Q _24719_/Y _31563_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__15919__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19859__A _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28487_ _28487_/Q _31570_/CLK _28487_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31245__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_4317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25699_ _31397_/D _27793_/B _25698_/Y _27784_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_55_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18581__A1 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_2122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_175_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18240_ _18254_/S _29853_/Q _18295_/B _18239_/X _18240_/Y _29340_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_199_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15452_ _30910_/Q _15451_/X _15452_/Y _15627_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_27438_ VGND VPWR _27476_/S _32277_/Q _27437_/X _32277_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29292__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23457__A2 wire3997/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23001__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_5550 VGND VPWR VGND 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VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26867__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2390 wire2391/X wire2390/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_149_3958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32020__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2482_A _21017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1594 _23807_/B _23822_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__27750__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31903_ _31903_/Q _31904_/CLK _31903_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19625_ _19625_/Y _26323_/A _19638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_108_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25134__A2 _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16837_ VGND VPWR _16837_/S _29033_/Q _29001_/Q _16837_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18149__S _18152_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2290_A _26435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_2104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_4394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24342__B1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15622__A2 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26874__B _26874_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_2869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31834_ hold491/A _31971_/CLK _31834_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21156__A0 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19556_ VGND VPWR wire2653/X _19522_/A _19598_/A _19556_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_16768_ wire3242/X _16910_/A2 _16768_/X _16947_/A2 _28895_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_242_4861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24893__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23696__A2 _23737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22353__C1 _22352_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29635__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18507_ VGND VPWR _18507_/S wire3892/X _28279_/Q _28279_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17988__S _18018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_4894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27051__A _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4271 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15719_ VGND VPWR _15719_/X _15716_/X _15762_/A1 _15543_/S _15718_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_31765_ hold222/A _32424_/CLK _31765_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19487_ _31318_/Q _19487_/Y _31319_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_12_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20102__C_N _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16699_ _16699_/X _16692_/X _16698_/X wire1062/X _16694_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_206_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18673__A _18682_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17375__A2 input183/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26095__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32170__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27831__A1 _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25437__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26634__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30716_ hold293/A _32168_/CLK input85/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18438_ VGND VPWR _18438_/S hold475/X _28212_/Q _28212_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_1750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_5358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15386__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_2408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30612__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31696_ _31696_/Q _32107_/CLK _31696_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_15_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31738__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26890__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15925__A3 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_1160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30647_ _30647_/Q _32349_/CLK hold399/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_176_4045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18369_ VGND VPWR _18386_/S wire3913/X _28146_/Q _28146_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23999__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20400_ VGND VPWR _20418_/S _27692_/A1 _28922_/Q _28922_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_129_core_clk _32134_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_219_3617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15138__A1 wire3261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26398__A1 _31686_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20131__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21380_ _21775_/B _21378_/Y _21381_/B _21337_/X _21373_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_4 X_30578_ hold405/A _32438_/CLK _30578_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18875__A2 wire1993/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length897_A wire898/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22408__A0 _21892_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20331_ VGND VPWR _20335_/S wire2012/X _28871_/Q _28871_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32317_ _32317_/Q _32357_/CLK _32317_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_2807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24841__C _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1108 VPWR VGND _15356_/A2 _15515_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_154_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24948__A2 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30762__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18612__S _18615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31888__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25070__A1 _31178_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3096_A _17306_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22959__A1 _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29015__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23050_ hold240/A _21211_/B _29652_/Q _29446_/Q _23050_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27347__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21539__A _21550_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20262_ _27598_/C _27485_/D _20328_/C _20262_/X _20453_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XFILLER_270_2119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32248_ _32248_/Q _32473_/CLK _32248_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23081__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19824__A1 _28564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21226__A4 _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23620__A2 _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22001_ _21572_/Y _21317_/Y _22001_/Y _21574_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_6_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17835__B1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21631__B2 _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20193_ _29454_/D _29453_/D _29452_/D _24210_/B _21173_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 X_32179_ _32179_/Q _32532_/CLK _32179_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_270_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16132__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14441__A _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14649__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31118__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23908__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1119_A wire1135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_1972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput108 VGND VPWR _30674_/D la_input[41] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_282_5331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24176__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15310__B2 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput119 VGND VPWR _30654_/D la_input[51] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_233_1251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_3485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29165__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22187__A2 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26740_ _26740_/Y _31785_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_6_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_4750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20198__A1 _28743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23952_ _30613_/Q wire1656/A _23952_/X _30549_/Q wire1609/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_247_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20589__S _20589_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21395__B1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17063__A1 _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21934__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18567__B _23236_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27660__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22903_ _22895_/Y _22938_/B _22891_/A _22901_/Y _22903_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_148_2701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26322__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25125__A2 _31199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26671_ _26637_/B _31791_/D _26669_/X _26893_/C1 _31896_/Q _26670_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_109_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30142__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14587__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23883_ _23883_/X _23881_/X _28517_/Q _24163_/B2 _19718_/B VGND VPWR _23882_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18059__S _18078_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1390_A wire1397/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23136__A1 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28410_ _28410_/Q _32112_/CLK _28410_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24333__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_906 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26873__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25622_ wire3532/X hold95/A _25622_/X _25580_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__32513__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21147__A0 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22834_ _22834_/B _22835_/A _22934_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 X_29390_ _29390_/Q _29390_/CLK _29390_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_917 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_928 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_3616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24884__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14282__D1 _29980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22344__C1 _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14821__B1 _32307_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24585__A _24585_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_939 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_3755 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28341_ _28341_/Q _30225_/CLK _28341_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25553_ _25553_/Y _31354_/Q hold178/A _25551_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 X_22765_ _22766_/B _22765_/B _22765_/X _22765_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__30737__D hold439/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_1044 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3897_A hold271/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26086__B1 _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17366__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1655_A wire1660/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27822__A1 _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26625__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24504_ _25416_/A _25507_/D _30759_/Q _31335_/Q _24505_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_124_4191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21716_ _21716_/Y _29776_/Q _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__30292__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28272_ _28272_/Q _30027_/CLK _28272_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25484_ VGND VPWR _25485_/C _31320_/Q _31322_/Q _19488_/X _31321_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16574__B1 _29260_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23439__A2 _29369_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22696_ _22694_/Y _22690_/X _22696_/Y _22706_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22309__S _23373_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_2688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22647__A0 wire3770/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27223_ VGND VPWR _25774_/C _32104_/Q _27280_/C _27223_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_100_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24435_ _31017_/D _24438_/C _31017_/Q _24434_/X _24437_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_159_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21647_ _21647_/X _22026_/B1 _22905_/A _29732_/Q _22026_/A2 VGND VPWR _21646_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_107_2497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3000 VPWR VGND _18464_/S _18452_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout1822_A _18252_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16307__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17118__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3011 VPWR VGND _18418_/S _18423_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_219_4830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_4721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_1255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3022 VPWR VGND _18399_/S _18386_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15129__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3033 VPWR VGND _18359_/S _18366_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27154_ VGND VPWR _27154_/S _27154_/A1 _32060_/Q _32060_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26389__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24366_ _32030_/Q _24370_/A2 _24366_/X _31998_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__16326__B1 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27586__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21578_ _21316_/B _21316_/A _21579_/A _21572_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_2 XFILLER_122_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_70 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18866__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3055 VPWR VGND _18074_/S _18078_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_81 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14335__B _17036_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26305__A _26874_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18720__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26105_ _31547_/Q _26104_/Y _26105_/Y _26112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_92 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16877__A1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23317_ VGND VPWR _23317_/S _30295_/Q _17079_/X _30295_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21870__A1 _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20529_ VGND VPWR _20545_/S _29046_/Q _27688_/A1 _29046_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_input181_A mprj_dat_i[16] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27085_ _26950_/C _27084_/X _27117_/A2 hold238/A _32020_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_101_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24297_ _30947_/D _26378_/A4 _31599_/Q _24284_/X _31676_/Q _26376_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__18522__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22552__B _22552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26024__B _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14050_ _21548_/A _21550_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__27338__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26036_ _26123_/C _26123_/D _26032_/X _31529_/Q _26036_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xmax_length1642 _27100_/B _27116_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23072__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23248_ VGND VPWR _23248_/S wire3978/X _30231_/Q _30231_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19815__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16629__A1 wire3281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17138__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29508__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23179_ _30183_/D _23185_/B _23178_/X _30183_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xmax_length1697 VPWR VGND _16814_/A3 wire1698/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19291__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_4962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32043__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input42_A irq[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27987_ _27987_/Q _30230_/CLK _27987_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_20_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23375__A1 _30353_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14655__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15852__A2 _16091_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2530_A wire2530/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17740_ _17740_/X _17474_/X _31643_/Q _24593_/A _14067_/A VGND VPWR _17842_/S VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__17662__A _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29726_ VGND VPWR _29726_/D _32075_/CLK _29726_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_14952_ VGND VPWR _15275_/S _30495_/Q _30781_/Q _14952_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23914__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26938_ _31962_/Q wire1571/X _31962_/D wire2717/X wire1230/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19043__A2 _19027_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18159__A_N _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20499__S _20515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21386__B1 _21389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28532__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29658__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26849__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27570__S _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13903_ _28594_/Q _13903_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_166_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29657_ _29657_/Q _32318_/CLK _29657_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17671_ VGND VPWR _17842_/S _17658_/X _17670_/Y _17671_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27076__D_N wire2206/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14883_ _16081_/A2 _14883_/A1 _28813_/Q _14883_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26869_ _27059_/C1 _26868_/Y wire752/X _31884_/Q _31884_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_247_194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23127__A1 hold354/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15604__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24324__B1 wire1346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19410_ VGND VPWR _19417_/S _27701_/A1 _28426_/Q _28426_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26694__B _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26864__A2 wire2675/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16622_ _16621_/X _16928_/B1 _16911_/A2 _32064_/Q _16622_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_182_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28608_ _28608_/Q _31815_/CLK _28608_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_13834_ _29550_/Q _22433_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_57_3874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29588_ _29588_/Q _32307_/CLK _29588_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_1881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30635__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14812__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3882 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19341_ VGND VPWR _19341_/X _19379_/B _19380_/B1 _27919_/Q _19340_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_51_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16553_ _16965_/A2 _16952_/A1 _32433_/Q _16553_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_264_1745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_5623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28539_ _28539_/Q _31351_/CLK _28539_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_73_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13765_ _31181_/Q _13765_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XPHY_5 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21689__B2 _21645_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28682__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2997_A _18458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15504_ _15503_/X _15501_/X wire1228/A _15504_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17601__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_5607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31550_ VGND VPWR _31550_/D _32564_/CLK _31550_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_160_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19272_ _19269_/X _19270_/X _19272_/X wire1949/X _19271_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_51_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16484_ _16959_/A2 _16956_/A1 _29183_/Q _16484_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_179_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16565__B1 wire1060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4009_A _29204_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15907__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output498_A _28659_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21123__S _21131_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18223_ _18244_/A _18201_/A _18223_/X _18223_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_30501_ _30501_/Q _32136_/CLK _30501_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_293_core_clk _30245_/CLK clkbuf_5_21_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_15435_ VGND VPWR _15435_/X _28996_/Q _15435_/A _15435_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_220_3765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22638__B1 _30452_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31481_ hold412/A _31578_/CLK _31481_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_177_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30785__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17109__A2 _30389_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18306__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14526__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29038__CLK _32419_/CLK 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NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14317_ _14313_/X _21459_/D _29874_/Q _14317_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__21861__A1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30363_ VGND VPWR _30363_/D _32433_/CLK _30363_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18085_ VGND VPWR _18085_/S wire3813/X _28015_/Q _28015_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15297_ _15296_/X _15628_/B1 _15621_/A2 _32061_/Q _15297_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_42_5523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25052__A1 _31169_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18432__S _18432_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1296_A wire1296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold307 hold307/A hold307/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14879__B1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30015__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold318 hold318/A hold318/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32102_ _32102_/Q _32536_/CLK _32102_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22796__C_N _22809_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17036_ _21778_/A _17036_/B _29880_/Q _21651_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_253_4297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold329 hold329/A hold329/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27745__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24380__D _24585_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14248_ _24594_/A _14246_/Y _14168_/S _14245_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_173_2838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19806__A1 wire4126/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30294_ _30294_/Q _30294_/CLK _30294_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28062__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29188__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17048__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32033_ _32033_/Q _32036_/CLK _32033_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_1273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22810__B1 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14179_ hold185/A _14178_/X _14167_/S hold184/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__25773__B _32103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14261__A _24604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26001__B1 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16096__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19821__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_3036 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26552__A1 _31759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25355__A2 _25363_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24158__A3 _24157_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30165__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18987_ _18984_/X _18985_/X _18987_/X wire1939/X _18986_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_285_234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18668__A _29343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23366__A1 _30344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22169__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21037__A_N _30419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24389__B _24389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31410__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1630_A _19785_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32536__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17938_ VGND VPWR _17941_/S wire3847/X _27876_/Q _27876_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19034__A2 _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_49 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire714_A wire714/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2864_A _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27480__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25107__A2 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26304__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20202__S _20202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17869_ _17490_/B _31738_/Q _17869_/X _17596_/D _17868_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_260_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24315__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25658__A3 _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26855__A2 wire753/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19608_ _19608_/B _19573_/A _19764_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XFILLER_207_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21129__A0 _29573_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20880_ VGND VPWR _20902_/S _30238_/Q _29400_/Q _20880_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_162_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24866__A1 _31078_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31560__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23513__S _23513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22432__A_N _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19539_ _19539_/X _19551_/A _19539_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_31817_ _31817_/Q _31887_/CLK _31817_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_4077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19499__A _31333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_1965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18607__S _18607_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17348__A2 input179/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22341__A2 _14365_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19742__B1 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27804__A1 _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22637__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19888__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15359__A1 _30506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22550_ VGND VPWR _22550_/S _29839_/Q _30050_/Q _30050_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_17_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20352__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31748_ _31748_/Q _31748_/CLK _31748_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_4686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25815__A0 _31431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3109_A _19504_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22129__S _22273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16020__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21501_ _21503_/D _21501_/A _21501_/C _21501_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_143_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22481_ wire3112/A _22480_/X _22513_/A2 _17112_/X _30001_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_271_5010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31679_ _31679_/Q _31679_/CLK _31679_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24094__A2 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25291__A1 _31360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25291__B2 _31261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24220_ VGND VPWR _24220_/S _30896_/Q wire1682/X _30896_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16308__A0 _29630_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21432_ _21664_/C _21419_/D _21664_/B _21664_/D _21435_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_69_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20872__S _20872_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18848__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_2006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27032__A2 hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16859__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28405__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24151_ _24151_/X _24205_/B1 _30639_/Q wire3639/X _19926_/B VGND VPWR wire1250/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 X_21363_ _21362_/Y _21365_/A _21361_/Y _14418_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA_wire3380_A wire3381/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_2773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18342__S _18366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23102_ _29788_/Q _23157_/A2 _23102_/X _30098_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_172_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_3_6_0_core_clk clkbuf_3_6_1_core_clk/A clkbuf_3_7_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_20314_ VGND VPWR _20321_/S _27697_/A1 _28855_/Q _28855_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32066__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27655__S _27657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24082_ wire1621/X _24081_/X _31142_/Q _24186_/A3 _24082_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15531__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput90 VGND VPWR input90/X la_input[25] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_46_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25594__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21294_ _21633_/B _21296_/B _21588_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_115_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20173__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24251__C1 _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19384__D _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30508__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21065__C1 wire3412/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23033_ _25693_/C _32492_/Q _23033_/X _25693_/B _32484_/Q _32500_/Q _32476_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_27910_ _27910_/Q _30453_/CLK _27910_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3805 VPWR VGND _22905_/A _29902_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26779__B _26779_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17808__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20245_ VGND VPWR _20245_/S _28788_/Q _27694_/A1 _28788_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3816 wire3816/X _18244_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_8_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28890_ _28890_/Q _32438_/CLK _28890_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_8_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14171__A _14171_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3827 VPWR VGND wire3827/X wire3828/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3838 wire3838/X wire3839/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_210_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_97_core_clk _32345_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28555__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21419__D _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26683__B1_N _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3849 VPWR VGND wire3849/X wire3850/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_115_2733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27841_ VGND VPWR _25806_/D _32544_/Q _27844_/C _27841_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27740__A0 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20176_ _25904_/A _20175_/X _20192_/A2 _28732_/Q _28732_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__29800__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_26_core_clk _32259_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23357__A1 _30335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31090__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4867 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15834__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14637__A3 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17482__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_3401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27772_ VGND VPWR _27774_/S _25033_/B _32498_/Q _32498_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_150_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21716__B _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24984_ _25081_/A _19955_/A2 _24984_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_247_5292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_1081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17913__C _17913_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_2581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30658__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21907__A2 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18233__A0 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29511_ VGND VPWR _29511_/D _31920_/CLK _29511_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27390__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27099__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25903__S _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26723_ _26607_/A _27007_/A _26722_/Y _31814_/D _26754_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_204_5107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23935_ wire1621/X _23934_/X _31128_/Q _24081_/A3 _23935_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_19_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31903__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15047__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17587__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18784__A1 _27956_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_4163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_4114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19981__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26846__A2 wire2641/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29442_ _29442_/Q _30482_/CLK _29442_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29950__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15598__A1 _15598_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26654_ _26684_/A2 _31860_/Q _26653_/Y _26654_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_2_1744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_703 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_5481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23866_ _23867_/A _19789_/B _31866_/Q _31831_/Q _26772_/A VGND VPWR _23865_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__20591__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16795__B1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15598__B2 _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_714 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24857__A1 _31073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_725 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29321__D _29321_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3080_A _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_736 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25605_ _25607_/B _25603_/X _31374_/Q _25604_/X _25632_/B VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_126_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22817_ _22831_/C _22938_/B _22809_/Y _22829_/A _22817_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_747 wire3508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29373_ _29373_/Q _30359_/CLK _29373_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_16_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26585_ _26585_/X _31843_/Q wire3454/X wire817/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_70_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_3153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_758 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14270__A1 wire3491/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23797_ wire1807/X _23796_/X _31808_/Q wire1625/X _23798_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18517__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27122__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26059__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17339__A2 wire2113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_769 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19194__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26621__B1_N wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28324_ _28324_/Q _29389_/CLK _28324_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_2441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19202__A _28264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2111_A wire2112/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25536_ _31347_/Q _25565_/A _25539_/A _31346_/Q _25537_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__21451__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22748_ _22747_/C _22733_/A _21404_/A _22748_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20343__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2209_A _25043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18941__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_2190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16011__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28255_ _28255_/Q _30431_/CLK _28255_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26961__C _26961_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25467_ _31313_/D _31312_/Q _25466_/Y _31313_/Q _25464_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__16037__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22679_ VGND VPWR _22679_/S _30090_/Q _22678_/Y _30090_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24085__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3153_A _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30038__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24762__B _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4117 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_1041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15220_ VGND VPWR _15226_/C wire1113/X _15640_/C1 _15219_/X _15218_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_215_5203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27206_ VGND VPWR _32095_/D _27276_/C _27206_/A _27206_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_117_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24418_ VGND VPWR _31010_/Q _24418_/D _24418_/X _24418_/C _31007_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA__22096__A1 _22095_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28186_ _28186_/Q _32416_/CLK _28186_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_177_2215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20782__S _20783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3804 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25398_ VGND VPWR _25402_/D _31283_/Q _25398_/X _25413_/A _31282_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__32409__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28085__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23832__A2 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25577__C _25577_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24481__C _25962_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15151_ _15151_/X wire1214/A _15144_/X _15146_/X _15151_/B1 _15150_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_215_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27137_ VGND VPWR _27142_/S wire1837/X _32043_/Q _32043_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21843__A1 _21410_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29330__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24349_ _24348_/X _24888_/D wire1668/X _23611_/A _30977_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26767__D1 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25034__A1 _31160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26231__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3418_A _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14102_ _14102_/Y _28388_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_16 XFILLER_137_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_3531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15522__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25874__A _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15082_ VGND VPWR _15082_/X _15081_/X _15762_/A1 _15718_/B1 _15080_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27068_ _27068_/B _27053_/C _27122_/B _27068_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_42_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25585__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30188__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23596__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18910_ _18909_/X _19176_/B1 wire1984/X _28154_/Q _18910_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_253_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26019_ _26019_/A _31524_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_14033_ _28464_/Q _14033_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31433__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26519__D1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30930__D _30930_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2745_A _19637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19890_ VGND VPWR wire2197/X _26694_/D _24046_/B1 _19890_/X _26159_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__25990__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32559__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14081__A _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19264__A2 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23060__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1494 wire1493/A _15228_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_270_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18472__A0 _28245_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29480__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18841_ _18840_/X _19278_/S _19375_/A2 _28183_/Q _18841_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_231_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3979_A _29496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19591__B _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28400__D _28400_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17814__A3 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23825__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27922__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16483__C1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15825__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2912_A _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19016__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18772_ _18772_/X _19216_/D1 _27988_/Q _19368_/B1 _19368_/A2 _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_0_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21626__B _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21359__B1 _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15984_ VGND VPWR _15984_/X _16120_/S _16816_/B1 _15983_/X _15982_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_7_1655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_3291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23899__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21118__S _21129_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31583__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18224__B1 wire3883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22020__A1 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25813__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17723_ VGND VPWR _31725_/Q _17721_/X _17722_/X _17723_/X _17586_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_29709_ _29709_/Q _30219_/CLK _29709_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_14935_ VGND VPWR _14935_/S _32310_/Q _28918_/Q _14935_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_92_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output413_A _13882_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30981_ _30981_/Q _32277_/CLK _30981_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15038__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17578__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26298__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18775__A1 _28343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31761__D _31761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24937__B _24937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_1255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_2844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17654_ _31718_/Q _17539_/B _17654_/X _31717_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_144_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14866_ _14865_/X _15628_/B1 _15621_/A2 _29526_/Q _14866_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire1044_A wire1044/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19933__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15589__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4126_A wire4126/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20582__A1 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_4304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20957__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24848__A1 _31068_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23333__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15053__A3 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16605_ VGND VPWR _16605_/X _16601_/S wire1044/X _16602_/X _16604_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_162_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13817_ _31129_/Q _13817_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_223_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2278_A _19196_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_3985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17585_ _17662_/A _17484_/Y _17863_/B _17585_/X _17585_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_14797_ _14797_/X _29043_/Q _15609_/B1 _15355_/B2 _15233_/B1 _14796_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_57_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18427__S _18432_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18527__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22323__A2 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_5442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_403_core_clk _30156_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_31602_ hold338/A _31679_/CLK _31602_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19324_ _19375_/A2 _28302_/Q _19375_/B1 _19324_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_166_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14800__A3 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16536_ _16536_/X _29259_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16535_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_242_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20334__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13748_ _31272_/Q _25350_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_16_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32582_ hold290/A _32582_/CLK input74/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_2069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_5185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24953__A _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16002__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26065__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31533_ _31533_/Q _31694_/CLK _31533_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19255_ _28397_/Q wire1405/X _28397_/D _19243_/X _19254_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_18_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16467_ VGND VPWR _16467_/X _16458_/S _16949_/C1 _16466_/X _16465_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_277_2604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14256__A _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25273__A1 _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24076__A2 wire738/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15210__B1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17750__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18206_ _18206_/Y _18316_/A _22334_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_259_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22087__A1 _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23284__A0 _30266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15418_ _15418_/X _32363_/Q _15727_/A2 wire1515/A _15543_/S _15417_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_277_2637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32089__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_5604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31464_ VGND VPWR _31464_/D _31470_/CLK _31464_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19186_ _19183_/X _19184_/X _19186_/X _19318_/B1 _19185_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15761__A1 _29334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20692__S _20695_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16398_ _16781_/A2 wire3281/X _28885_/Q _16398_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_47_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19766__B _20042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23823__A2 wire1605/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_2610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27014__A2 _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15786__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18137_ VGND VPWR _18139_/S _23286_/A1 _28065_/Q _28065_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21834__A1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30415_ _30415_/Q _30415_/CLK _30415_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_275_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15349_ VGND VPWR _15516_/S _29228_/Q _29292_/Q _15349_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31395_ VGND VPWR _31395_/D _32523_/CLK _31395_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_wire1678_A wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18160__C1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22192__B _29827_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26368__A4 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold104 hold104/A hold104/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__28578__CLK _31977_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold50_A hk_dat_i[10] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27475__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold115 hold115/A hold115/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_151_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15513__A1 wire1128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30346_ _30346_/Q _32351_/CLK _30346_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18068_ VGND VPWR _18078_/S wire3868/X _27998_/Q _27998_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_2334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold126 hold126/A hold126/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__29823__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold137 hold137/A hold137/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_64_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold148 hold148/A hold148/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23587__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold159 hold159/A hold159/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_17019_ _17019_/X _17018_/Y _21661_/A _17094_/A _17015_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_271_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_2258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19782__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24438__D_N _31019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30840__D _30840_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_1524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25981__C1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30277_ _30277_/Q _30477_/CLK _30277_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19255__A2 wire1405/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_2067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire831_A wire831/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2981_A _18512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17266__A1 wire3558/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20030_ _20030_/Y _20096_/B wire851/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__26809__D_N _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32016_ _32016_/Q _32016_/CLK _32016_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23508__S _23516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17266__B2 _17295_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30800__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31926__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22412__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23735__C _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24536__A0 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19801__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_13_0_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15816__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19007__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29973__CLK _31761_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24000__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25008__B _25073_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17018__A1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21028__S _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21981_ _17172_/X _21981_/X _21979_/Y _21966_/A _21980_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_2 XANTENNA__15029__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18766__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17569__A2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26289__B1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20022__B1 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16226__C1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19963__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26828__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23720_ _30814_/D _23807_/B _23720_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_227_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30950__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20932_ VGND VPWR _20948_/S _29397_/Q _29500_/Q _29397_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23751__B _31773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20573__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20867__S _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29203__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18845__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23243__S _23251_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16241__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23651_ VGND VPWR _23666_/S _27689_/A1 _30781_/Q _30781_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25500__A2 _19498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20863_ VGND VPWR _23519_/S _20862_/X _29360_/Q _29360_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14252__A1 wire3489/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18337__S _18358_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18518__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14252__B2 wire3235/X VGND VPWR VPWR VGND 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X_23582_ VGND VPWR _23582_/S _27251_/A0 _30502_/Q _30502_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_4191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20794_ VGND VPWR _20796_/S _29307_/Q wire1833/X _29307_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_175_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24863__A _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25321_ _31267_/D _25319_/X _26238_/A _25318_/X _25320_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_22533_ VGND VPWR _23523_/S _29822_/Q _30033_/Q _30033_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26781__C _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29353__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24067__A2 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16544__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26461__B1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28040_ _28040_/Q _30276_/CLK _28040_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_2388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_2456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25252_ _26498_/A _25251_/X _25254_/A2 _31250_/Q _31250_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_22464_ VGND VPWR _22448_/C _18661_/A _22449_/A _22464_/X _29993_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__14555__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15752__A1 _28435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19676__B _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24472__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23814__A2 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18580__B _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24203_ wire759/A wire1298/X _28676_/Q _31186_/Q wire1600/A VGND VPWR _24202_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_121_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21415_ _30348_/Q _21551_/B _21549_/B _21413_/A _21623_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_185_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30330__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21825__A1 hold289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31456__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25183_ _31221_/Q _25182_/Y _31221_/D _25180_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_69_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18072__S _18079_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22395_ _22395_/Y _29954_/Q _22619_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_30_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26213__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23027__A0 _28907_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24134_ _24134_/X _20669_/B _19927_/X _28637_/Q _31115_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__16812__C wire921/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_4134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21346_ _29879_/Q _21459_/D _21346_/X _21419_/D _21657_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_8_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29991_ _29991_/Q _30406_/CLK _29991_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_176_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16701__B1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_2738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23578__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_25_2_core_clk clkbuf_opt_25_3_core_clk/A clkbuf_opt_25_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xfanout3529 VPWR VGND _27276_/C hold396/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19692__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28942_ _28942_/Q _32117_/CLK _28942_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24065_ wire704/A _24058_/X _24209_/B1 _24064_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_254_1733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30750__D hold118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21277_ _21104_/B _21211_/A _18540_/X _29737_/Q _21277_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_265_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23042__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_2621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26489__D_N _26488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3624 VPWR VGND wire3624/X wire3625/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_hold489_A hold489/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2828 _23269_/X _23295_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__25844__D _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17257__A1 _32293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30480__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23016_ VGND VPWR _23016_/X _25691_/B _32514_/Q _32506_/Q _25693_/B _32522_/Q _28906_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_2_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3635 VPWR VGND wire3635/X _30721_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2839 VPWR VGND _23067_/B1 _23049_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20228_ VGND VPWR _29452_/D _29453_/D _20328_/C _29454_/D _21173_/B VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA__26516__A1 _17508_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2901 VPWR VGND wire2901/X _20585_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_219_1897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3646 VPWR VGND _30551_/D hold371/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_24_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28873_ _28873_/Q _32347_/CLK _28873_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_132_4290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_1619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22250__B2 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19651__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2912 VPWR VGND _20481_/S _20482_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3657 VPWR VGND wire3657/X _30459_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20261__A0 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15268__B1 _28759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3668 VPWR VGND _23302_/B wire3668/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1987_A _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2934 VPWR VGND _20360_/S _20357_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15807__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3679 _30425_/Q _20914_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27824_ _27825_/B _32536_/Q _27824_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 Xwire2945 VPWR VGND _20269_/S _20282_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2061_A wire2062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20988__D _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20159_ VGND VPWR _19584_/B _19566_/A _20192_/A2 _20159_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_134_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input144_A la_input[74] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_3990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_3941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2967 VPWR VGND _18617_/S _18607_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2159_A _20110_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_3229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17009__A1 _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_14_1_core_clk clkbuf_5_14_1_core_clk/X clkbuf_5_14_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_287_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17009__B2 _29877_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2989 VPWR VGND _18491_/S _18490_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15283__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3295_A _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27755_ VGND VPWR _27756_/S _25035_/B _32483_/Q _32483_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26956__C _31981_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24967_ _31127_/D _25031_/B _24966_/X _25065_/A _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__25860__C _31451_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18757__A1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16217__C1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24757__B _24757_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14720_ VGND VPWR _14935_/S _30489_/Q _30775_/Q _14720_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_287_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26706_ _26706_/Y _31768_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_246_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23918_ _30858_/D wire742/X _24199_/B1 _23913_/X _23917_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_27_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20564__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2326_A wire2327/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27686_ VGND VPWR _27698_/S _27686_/A1 _32420_/Q _32420_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16768__B1 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20777__S _20788_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_500 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24898_ _25681_/B1 _24897_/Y _24941_/A _31093_/Q _31093_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_54_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21761__B1 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_2514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_511 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21462__A _21462_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_522 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29425_ _29425_/Q _30367_/CLK _29425_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_148_2361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_5251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14651_ _15228_/A2 _14650_/X _28083_/Q _15228_/A3 _14651_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_26637_ _26637_/B _26637_/Y _31888_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_204_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_533 _14302_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23849_ _30844_/D _23861_/C _23849_/A _23849_/B _23849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__14243__A1 wire3490/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_544 _30592_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18509__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_555 input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26972__B _27006_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_566 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17370_ wire3555/A _17370_/A2 _17370_/X _17432_/B2 input182/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA_577 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29356_ _29356_/Q _30225_/CLK _29356_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20316__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27114__D_N _26898_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14582_ VGND VPWR _14818_/S _28404_/Q _29069_/Q _14582_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26568_ _26568_/X wire1275/X wire3461/X wire3462/X _26567_/X _23742_/Y VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_226_1846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_588 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15991__B2 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_3284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_599 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32231__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28307_ hold179/A _29914_/CLK _28307_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16321_ _16321_/X _28883_/Q _16934_/A2 _16960_/B2 _16458_/S _16320_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_25519_ _31338_/Q _31339_/Q _25519_/Y _19428_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_13_3530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17193__A0 _30400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16990__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29287_ _29287_/Q _32125_/CLK _29287_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_4234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2695_A wire2696/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14076__A _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmgmt_core_wrapper_4216 trap mgmt_core_wrapper_4216/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 X_26499_ _26464_/C _24641_/Y _24640_/Y _26508_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__25255__A1 _29868_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24058__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25255__B2 hold99/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24492__B _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2935 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19040_ _19202_/B _28064_/Q _19039_/X _19040_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_16252_ _16252_/X _29081_/Q _16814_/B1 _16805_/A3 _16838_/A1 _16251_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28238_ _28238_/Q _30269_/CLK _28238_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20228__D _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28720__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24463__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16940__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29846__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15203_ VGND VPWR _15639_/S _29601_/Q _29633_/Q _15203_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21277__C1 _21104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21816__A1 _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_2209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28169_ _28169_/Q _30457_/CLK _28169_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16183_ _16841_/A2 _16183_/X _16182_/X _16720_/C1 _30897_/Q _16722_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14951__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32381__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_1934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_5066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30200_ _30200_/Q _30477_/CLK _30200_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23018__A0 _23016_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16299__A2 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27295__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15134_ VGND VPWR _15627_/S _29020_/Q _28988_/Q _15134_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18579__D_N _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21292__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27739__C_N _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31180_ _31180_/Q _32551_/CLK _31180_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22443__D _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18693__B1 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26755__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30823__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31949__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_288_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_4376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23569__A1 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_2395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24766__B1 _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30131_ _30131_/Q _32108_/CLK _30131_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19942_ _25652_/A _19941_/X _19968_/A2 _28619_/Q _28619_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_15065_ _15605_/A2 _15065_/X _15064_/X _15640_/A1 _29018_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__28870__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30660__D _30660_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29996__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19237__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4076_A wire4077/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_5110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14242__C _29958_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14016_ _28481_/Q _14016_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_228_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23328__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21637__A _21637_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30062_ hold152/A _31998_/CLK _30062_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_20_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25109__A _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output530_A _31115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19873_ _19872_/X _28586_/Q _28586_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_150_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20252__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output628_A _24610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18824_ _27958_/Q _18824_/B1 _22086_/B1 _18824_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__30973__CLK _31977_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_5187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28100__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_3438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1259_A _24049_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29226__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5031 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25191__B1 _31224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16471__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23852__A _23852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18755_ _18755_/X _19368_/D1 _30254_/Q _19218_/B1 _19368_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_149_2103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15967_ _15967_/X _15962_/Y wire898/X wire917/X _15966_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_209_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14482__A1 _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20004__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19945__B1 wire3427/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17405__D1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17706_ VGND VPWR _17832_/S _17705_/X _17682_/X _17706_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_20_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14918_ VGND VPWR _14918_/X _14917_/X _14916_/X _15235_/A1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_226_4461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20555__A1 wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18686_ _18686_/X _18682_/X _23342_/C _18685_/Y _29774_/Q VGND VPWR _22167_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__30203__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30964_ _30964_/Q _32014_/CLK _30964_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16759__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15898_ VGND VPWR _16823_/S _29210_/Q _29274_/Q _15898_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18665__B _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15026__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16223__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17420__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17637_ VGND VPWR _17730_/S _17636_/Y _17623_/Y _17637_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17420__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28250__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14849_ _15629_/A2 _14849_/X _14848_/X _15628_/B1 _32049_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_198_5548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29376__CLK _30139_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30895_ _30895_/Q _32309_/CLK _30895_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24297__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26691__B1 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26882__B _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20307__A1 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17568_ _31711_/D _17558_/X _17567_/X _17565_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_140_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_5250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold98_A hold98/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19307_ _19306_/X _19047_/S _19358_/A2 _28205_/Q _19307_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17996__S _18008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16519_ _16519_/X _28760_/Q _16835_/B1 _16832_/A3 _16825_/S _16518_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__30353__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_4713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32565_ _32565_/Q _32565_/CLK hold300/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31479__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30835__D _30835_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17499_ _17503_/A _26464_/C _26456_/A _17501_/D _31616_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__25246__A1 hold82/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24049__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_4844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26443__B1 _17481_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18920__A1 _27931_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_1269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_4402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire781_A wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31516_ _31516_/Q _31575_/CLK _31516_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19238_ _28365_/Q _19271_/S wire1930/X _19238_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_239_4877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15734__A1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25797__A2 _25795_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32496_ _32496_/Q _32545_/CLK _32496_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_255_4145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16931__B1 wire894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22407__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19927__D _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27968__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21807__A1 hold307/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17297__A _30933_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31447_ _31447_/Q _31467_/CLK _31447_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14942__C1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19169_ _19168_/X _19151_/S _19201_/A2 _28199_/Q _19169_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_277_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_2148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2802_A wire2811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16405__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27538__A3 _32239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21200_ VGND VPWR _21204_/S _29642_/Q _27705_/A1 _29642_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_12_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22180_ VGND VPWR _22180_/S _30301_/Q _30391_/Q _22180_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22480__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18684__B1 _29812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25549__A2 _31352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31378_ _31378_/Q _31923_/CLK _31378_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_271_2011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_5218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20491__A0 _29009_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26403__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15498__B1 wire1068/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_1187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21131_ VGND VPWR _21131_/S _27509_/A1 _29575_/Q _29575_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_2443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30329_ _30329_/Q _31970_/CLK _30329_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30570__D _30570_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19228__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18620__S _18625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23024__A3 wire3399/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22650__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29136__D _29136_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22232__A1 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21062_ _21062_/D _31970_/Q _31971_/Q _21063_/B _32075_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4b_4 XFILLER_8_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_2891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_3805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2208 wire2208/X _19567_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__19633__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20243__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2219 _27068_/B _19662_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_151_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20013_ _26950_/C _20012_/Y _20028_/A _28653_/Q _28653_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26781__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23980__A1 _28558_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32104__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18987__B2 wire1939/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23980__B2 _28718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25870_ _25877_/D _25878_/A _31454_/D _25870_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA_fanout1101_A fanout1103/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16998__B1 _29773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27171__B2 wire2422/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21991__B1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24858__A _25160_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_396_core_clk _30451_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_24821_ _26464_/C _24794_/X _26539_/A _24821_/Y _26509_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XANTENNA_max_length1495_A _15615_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18739__A1 _28309_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18856__A _30259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23193__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29719__CLK _29782_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24577__B _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_325_core_clk _30454_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_230_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27540_ VGND VPWR _31381_/Q _27539_/X _27538_/X _27540_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24752_ _24752_/Y _31466_/Q _31460_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_110_2460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21964_ _21565_/X _21940_/Y _21509_/X _21502_/X _21964_/Y _17159_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_284_1726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18203__A3 wire3892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20597__S _20617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22378__A _22378_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32254__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15017__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23703_ _30809_/D _23807_/B _23703_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_20915_ _30450_/Q _30433_/Q _18554_/B _20914_/C _20915_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22809__C _22809_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27471_ VGND VPWR _27483_/S _32292_/Q _32293_/Q _27471_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24683_ _24681_/X _24682_/Y _24654_/Y _24657_/Y _24677_/X _24683_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XANTENNA__19951__A3 wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18067__S _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21895_ _21892_/Y _21946_/A _21895_/Y _21894_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_36_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24288__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_5_27_0_core_clk clkbuf_5_27_1_core_clk/A clkbuf_5_27_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_201_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15422__B1 _15421_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17910__D _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29210_ _29210_/Q _32419_/CLK _29210_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_184_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26422_ _31693_/D _26420_/Y _26403_/Y _26421_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23496__A0 hold257/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22299__A1 _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23634_ _23634_/X _19784_/Y _26542_/A _32555_/Q _31038_/Q _24260_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_247_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20846_ VGND VPWR _20846_/X _20848_/A _20914_/A _20848_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_106_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_1991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28743__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24593__A _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19164__A1 _19161_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29869__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_42_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29141_ _29141_/Q _32320_/CLK _29141_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_158_4308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20849__A2 _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26353_ _26352_/X _31664_/Q _31664_/D _26335_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_23565_ VGND VPWR _23573_/S _27234_/A0 _30485_/Q _30485_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30745__D hold448/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20777_ VGND VPWR _20788_/S _27254_/A0 _29291_/Q _29291_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25237__A1 _29859_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17175__B1 _21674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1735_A _23236_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26434__B1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25237__B2 hold101/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17714__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25304_ _25305_/C _25310_/C _31264_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xwire804 VPWR VGND wire804/X wire804/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_22516_ _23563_/A _30019_/D _22515_/Y _22518_/B1 wire3235/X _30019_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 X_29072_ _29072_/Q _32403_/CLK _29072_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15725__A1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26284_ _26283_/Y _26184_/A _31630_/Q _26301_/B _31630_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_14_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold404_A hold404/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30846__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23496_ VGND VPWR _23496_/S _23495_/X hold257/X hold258/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire826 VPWR VGND wire826/X wire826/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22317__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire837 VPWR VGND wire837/X wire838/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_62_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28023_ _28023_/Q _30477_/CLK _28023_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_178_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_5282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23799__B2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25235_ _25235_/X _25263_/B1 _29858_/D hold116/A _25197_/D VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14933__C1 _32350_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22447_ _23354_/C _22445_/C _22444_/X _29985_/Q _29985_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_234_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28893__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16315__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24460__A2 wire1326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27529__A3 _32206_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_4240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout4005 _29341_/Q _18295_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_49_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22471__A1 _17071_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21274__A2 _14435_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24613__A1_N _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25166_ _24543_/D _24502_/X _25172_/A _25413_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XFILLER_47_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26737__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22378_ _22378_/B _22378_/Y _22378_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_234_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_2805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4100 VPWR VGND wire4100/X wire4101/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20482__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_41_core_clk _32528_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14343__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26313__A _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4111 VPWR VGND wire4111/X wire4111/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31576__D _31576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3315 wire3320/X _25810_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_24117_ _30877_/D wire761/X _24110_/X _24199_/B1 _24116_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 Xwire4122 VPWR VGND wire4122/X _28562_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21329_ _21329_/Y _30341_/Q _21462_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_117_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30996__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3326 _26173_/B1 _26148_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_237_1249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16150__A1 _28918_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19219__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4133 VPWR VGND _13967_/A _28530_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_156_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3337 VPWR VGND _25512_/A _27059_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25097_ _20651_/X wire838/A wire2626/X _14398_/B _26542_/B _25098_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 X_29974_ _29974_/Q _32296_/CLK _29974_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18530__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28123__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4144 VPWR VGND wire4144/X _28401_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2603 VPWR VGND _23807_/D _23813_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3348 VPWR VGND _23599_/B _27117_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_254_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29249__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3116_A _14284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4155 VPWR VGND _18842_/A _28247_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26032__B _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18427__A0 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3359 wire3364/X wire3362/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4166 VPWR VGND wire4166/X hold66/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28925_ _28925_/Q _32357_/CLK _28925_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24048_ _24048_/X wire1319/A _28533_/Q _28629_/Q _19715_/C VGND VPWR _24047_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_215_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23420__B1 _21221_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3432 _29944_/D hold328/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 Xwire4177 VPWR VGND wire4177/X hold81/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_212_3848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14700__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold490 hold490/A hold490/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20361__A _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25960__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1902 VPWR VGND wire1905/A _18698_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3443 wire3443/X _31949_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 Xwire4188 VPWR VGND wire4188/X wire4188/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20234__A0 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3454 wire3454/A wire3454/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1913 VPWR VGND wire1916/A _18697_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4199 VPWR VGND _32600_/A wire4200/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3465 VPWR VGND wire3465/X _31664_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17146__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2720 _14159_/A wire2721/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_134_2972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21431__C1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26967__B hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2731 VPWR VGND wire2731/X _14155_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16870_ _28110_/Q _16869_/X _16870_/Y wire979/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_28856_ _28856_/Q _31953_/CLK _28856_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27162__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2742 VPWR VGND wire2742/X wire2742/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3487 VPWR VGND _19429_/B _31339_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30226__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20785__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3498 VPWR VGND _25629_/A _31224_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1957 _19185_/S _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire2764 VPWR VGND _24276_/B _19641_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16453__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27807_ _32526_/Q _32528_/Q _32525_/Q _32527_/Q _27808_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_20_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15821_ _15821_/X _29272_/Q _16515_/B1 _16150_/A3 _15957_/S _15820_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_232_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2775 VPWR VGND _27700_/S _27696_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_111_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28787_ _28787_/Q _32355_/CLK _28787_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29399__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2797 VPWR VGND _27516_/S _27506_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25999_ VGND VPWR wire2655/X _19551_/A _26015_/A _25999_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_287_2073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3485_A _31379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15661__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24487__B _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18540_ wire3171/A _29774_/Q _30086_/Q _23342_/C _18540_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA_wire2610_A wire2611/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_81_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15752_ _15751_/X _15752_/B1 _15752_/A2 _28435_/Q _15752_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27738_ _27766_/D _31400_/Q _31399_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA_wire2708_A wire2709/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21734__B1 wire1579/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_1957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23822__D _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_300_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_4350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16205__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17402__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14703_ _14703_/X _14705_/B1 _14822_/B1 _28912_/Q wire1508/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_245_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17402__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18471_ VGND VPWR _18495_/S hold475/A _28244_/Q _28244_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_2371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30376__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20300__S _20302_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27669_ _31399_/Q _27739_/A _31400_/Q _27677_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 X_15683_ VGND VPWR _15683_/X _15682_/X _15681_/X _15543_/S _15744_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_72_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21623__C _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_330 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24279__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_341 wire803/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31621__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_352 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17422_ VGND VPWR hold20/A hold19/X _17420_/X _17447_/B2 _17421_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_29408_ hold295/A _30246_/CLK _29408_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23487__A0 _30430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14634_ VGND VPWR _14619_/X _14633_/X _14632_/Y _14634_/X _14624_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_2 XFILLER_261_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_363 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30680_ hold336/A _31436_/CLK _30680_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15964__A1 _28913_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_374 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_385 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_3693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19155__B2 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_396 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17353_ VGND VPWR _26974_/B _17352_/X _29855_/D _17245_/X _32291_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 X_29339_ VGND VPWR _29698_/Q _31970_/CLK _29454_/D VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_144_2077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14565_ _28391_/Q _14544_/D _14565_/X _23365_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_106_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_1966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25228__A1 hold100/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16304_ _16304_/X _29285_/Q _16947_/A2 _16960_/B2 _16949_/A1 _16303_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18902__B2 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32350_ _32350_/Q _32350_/CLK _32350_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_5598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17284_ _17284_/X wire3587/X wire3099/X _30923_/Q _30999_/Q _19792_/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_2 XANTENNA__25779__A2 _31417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20170__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26976__A1 _27009_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14496_ _14089_/Y _14081_/Y _18562_/A _29715_/Q _14496_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_157_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_5420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_4290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31771__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output578_A _28681_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21131__S _21131_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31301_ _31301_/Q _31763_/CLK _31301_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19023_ _28224_/Q _19023_/X _19180_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_16235_ _16234_/X _16841_/C1 _16841_/A2 _29596_/Q _16235_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_174_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32281_ _32281_/Q _32290_/CLK _32281_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_core.RAM128_WE0[3] _17906_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4193_A wire4194/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23269__D _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31232_ hold123/A _32299_/CLK _31232_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_234_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22462__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16166_ VGND VPWR _16566_/S _28951_/Q _29249_/Q _16166_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_250_4020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_5339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20970__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20473__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17267__D _17267_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15117_ _15761_/A2 _15117_/X _15116_/X _15521_/S _29317_/Q _15748_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__31001__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32127__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31163_ _31163_/Q _32499_/CLK _31163_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_135_2714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_4638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16097_ VGND VPWR _16097_/X _16825_/S wire1032/A _16094_/X _16096_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_187_5227 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18440__S _18443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1376_A wire1376/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24203__A2 wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2216_A _19554_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_2053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18418__A0 wire3859/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30114_ _30114_/Q _30404_/CLK _30114_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_187_4515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27753__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15048_ _30899_/Q _15610_/A2 _15048_/Y _15047_/X _15610_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 X_19925_ _19924_/X _28612_/Q _28612_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__16692__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23411__B1 wire3363/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31094_ _31094_/Q _32529_/CLK _31094_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_29_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20225__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2771 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23962__A1 _28461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30045_ _30045_/Q _30475_/CLK _30045_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_168_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23962__B2 _28589_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19091__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27153__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19856_ _19855_/X _28580_/Q _28580_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__25781__B _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20776__A1 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17283__C _29202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19630__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21973__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31151__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_5500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32277__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16444__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15247__A3 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18807_ _18807_/X _18806_/X _18801_/X _22090_/B1 _18799_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA_hold13_A hold13/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15101__C1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_1136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17641__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19787_ _20673_/B _23879_/A _20669_/C _19787_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_16999_ wire3733/X _16998_/X _29988_/Q _30370_/Q _16999_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_3_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_238_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30719__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15652__B1 wire702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_719 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22517__A2 _22520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19918__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19271__S _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24911__B1 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18738_ _28242_/Q _18738_/X _19357_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_77_2439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_2556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_3469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1808_A wire1808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31996_ _31996_/Q _32036_/CLK _31996_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_266_1423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28766__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19394__A1 wire2002/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23732__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_4854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_2768 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_2701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_2580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20210__S _20227_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30947_ _30947_/Q _32568_/CLK _30947_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18669_ _29344_/Q _30286_/Q _29343_/Q _23348_/B _18669_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_225_977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4193 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_5110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15304__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20700_ VGND VPWR _20708_/S _29216_/Q _27688_/A1 _29216_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23478__A0 _31943_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire996_A wire996/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_1770 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21680_ _21648_/X _21680_/X _21649_/Y _21653_/X _21652_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_261_3481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_389_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30869__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30878_ _30878_/Q _32291_/CLK wire703/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_140_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19146__A1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22926__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14428__B _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23521__S _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20631_ VGND VPWR _20646_/S wire1826/X _29177_/Q _29177_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_1191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length1076_A _15611_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length4108 VPWR VGND wire4107/A _28577_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XPHY_1109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17157__B1 _29435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25219__A1 _29850_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18615__S _18615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19697__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26416__B1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25219__B2 hold111/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_4641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_5108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23350_ VGND VPWR _21222_/B _23350_/C _23349_/X _23350_/X _23529_/S VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_200_4486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32548_ _32548_/Q _32548_/CLK _32548_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20562_ VGND VPWR _20562_/S wire1682/X _29078_/Q _29078_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_4543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_172_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_14_2467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21041__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22301_ VGND VPWR _23372_/S _29887_/Q _29146_/Q _29887_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_4246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23281_ VGND VPWR _23300_/S wire3873/A _30263_/Q _30263_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15183__A2 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20493_ VGND VPWR _20504_/S wire2002/A _29011_/Q _29011_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_2264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32479_ _32479_/Q _32545_/CLK _32479_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_66_3523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2728 VPWR VGND _26941_/B2 _19624_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14444__A _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1051_A _15766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_3121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28146__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20165__B _20165_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25020_ wire877/A _24955_/B _25020_/X _25020_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_fanout1149_A wire1152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18657__A0 _28370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22232_ wire829/X _29833_/D _22231_/X _22509_/C1 _29833_/Q _22229_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_238_2248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_3717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23650__A0 _30780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26719__A1 hold431/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23757__A _31780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20880__S _20902_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14930__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22661__A _30088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_4874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20464__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31396__D _31396_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15974__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_4904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22163_ _29824_/Q _22163_/D _29822_/Q _29823_/Q _22185_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__16132__A1 _29014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27392__A1 _32242_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18350__S _18357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26195__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3558_A wire3558/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30249__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput540 _28710_/Q la_output[33] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_99_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22380__B _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_277_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18409__A0 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput551 _28720_/Q la_output[43] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_287_4937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_2224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21114_ VGND VPWR _21129_/S _23647_/A1 _29558_/Q _29558_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_211_5283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22205__A1 _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27663__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16683__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput562 _28730_/Q la_output[53] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_2118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22094_ _29813_/Q _29815_/Q _29814_/Q _18683_/X _22094_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__17474__B _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26971_ _27042_/C _26988_/B _26971_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 Xoutput573 _28740_/Q la_output[63] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_1714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25942__A2 _31485_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20181__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28296__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20216__A0 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput584 _28686_/Q la_output[73] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_99_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_4925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14694__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput595 _28696_/Q la_output[83] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_clkbuf_leaf_9_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23953__A1 _30741_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28710_ _28710_/Q _32160_/CLK _28710_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26787__B _27068_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_5335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29541__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25922_ _31478_/Q _25922_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 Xwire2027 VPWR VGND wire2027/X _17369_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21045_ _30419_/Q _30041_/Q _21045_/X _30333_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_259_362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27144__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25691__B _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29690_ _29690_/Q _30367_/CLK _29690_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3725_A _30325_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2038 _26988_/D _24439_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_151_2560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20767__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1304 wire1305/X _25722_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2049 wire2050/X wire2049/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold187_A hold187/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24588__A _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25063__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_4304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17632__A1 _31713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25155__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1326 VPWR VGND wire1326/X _24454_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15238__A3 _15265_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28641_ _28641_/Q _32549_/CLK _28641_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25853_ VGND VPWR _25860_/D _31448_/Q _31447_/Q _25853_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_268_2945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30399__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23166__C1 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XFILLER_95_2528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28572_ VGND VPWR _28572_/D _32553_/CLK _28572_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_266_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25784_ VGND VPWR _31417_/Q _31420_/Q _25784_/X _31418_/Q _31419_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__14997__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25170__A3 _25172_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold354_A hold354/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22996_ VGND VPWR _22996_/X _25693_/C _32383_/Q _32375_/Q _23036_/S1 _32391_/Q _32399_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_263_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_3636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18188__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29691__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23181__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27523_ _25641_/B _32157_/Q _27523_/X _25641_/A _32149_/Q _32165_/Q _32141_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_73_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24735_ _24735_/Y _24735_/B _31473_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_147_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16199__A1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19924__A3 _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21947_ _21946_/A _21945_/Y _21946_/Y _21947_/Y _22065_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XANTENNA__23180__D_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17396__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1852_A _14438_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26655__B1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15214__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23469__A0 _30421_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_165_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27454_ VGND VPWR _27476_/S _32285_/Q _27453_/X _32285_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15946__A1 _28945_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2024_A _17397_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24666_ _24666_/C _24666_/Y _31444_/Q _24666_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__20295__A_N _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26953__D _31974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input107_A la_input[40] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21878_ _21900_/B _21878_/Y _21878_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_152_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15946__B2 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31794__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_4299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26405_ _31690_/Q _31691_/Q _26405_/Y _31695_/Q _31694_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__24130__B2 _32553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23617_ _30767_/D _23613_/X _24464_/C _23616_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_24_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20829_ _20832_/B _20832_/D _20832_/C _20830_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27385_ hold143/A _27395_/C _31386_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__17148__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18525__S _18532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24597_ VPWR VGND _24597_/X _31530_/Q _24597_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_32_3257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27840__A_N _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29124_ _29124_/Q _32439_/CLK _29124_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_278_2028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14350_ _21444_/A _14328_/Y _14331_/A _14355_/A _14355_/B _14353_/D VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 XFILLER_279_3786 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26336_ VGND VPWR wire1651/A _26386_/C _24454_/B _26336_/X _26544_/C1 wire1354/X + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_190_5618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22692__A1 _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21495__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23548_ VGND VPWR _23559_/S _30469_/Q _30039_/Q _30469_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_14_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20152__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_2567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_1950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31024__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29055_ _29055_/Q _31937_/CLK _29055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14281_ _17911_/B _14281_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 X_26267_ _31622_/Q _26267_/X _26267_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_49_3732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16371__A1 _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15174__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23479_ VGND VPWR _23523_/S _28378_/Q _30426_/Q _23479_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2393_A wire2394/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25091__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25630__A1 wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24770__B _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16020_ _16387_/A _16447_/A1 _30491_/Q _16020_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27784__D _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28006_ _28006_/Q _30449_/CLK _28006_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16910__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18648__A0 _28361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29071__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25218_ _26244_/A _25217_/X _25264_/A2 _31233_/Q _31233_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input72_A la_input[124] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20790__S _20796_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14921__A2 _14933_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26198_ VPWR VGND _31587_/D _26198_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_158_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20455__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26563__A2_N _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28639__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3101 _16981_/Y _23348_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22995__A2 _32447_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21652__C1 _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2560_A _20219_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16123__A1 _32118_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25149_ _25149_/B _25149_/Y _25149_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_219_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17320__B1 wire4177/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3134 _23526_/S _23530_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_3_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24197__A1 _28547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31174__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4076 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14134__B1 _18434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24197__B2 wire4021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17871__A1 _31730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16674__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17971_ VGND VPWR _17974_/S wire3846/X _27908_/Q _27908_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17384__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29957_ hold193/A _32324_/CLK _29957_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3167 _18534_/Y _23049_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17871__B2 _31734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20207__A0 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14685__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27182__B1_N _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout2444 _24499_/Y _25263_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout3189 VPWR VGND wire3192/A _17248_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23944__A1 _31097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19710_ _27053_/B _19710_/B _19710_/Y _20124_/B _19789_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_212_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1710 _23376_/S _23365_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3251 VPWR VGND wire3251/X _14544_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_leaf_247_core_clk _30507_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_28908_ _28908_/Q _32531_/CLK _28908_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16922_ VGND VPWR _16922_/X _16922_/B _16922_/A _16941_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__23944__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19073__B1 _20870_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1721 _23380_/S _23559_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire2825_A _23672_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20758__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29888_ VGND VPWR _29888_/D _31937_/CLK _29888_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_8_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28789__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24498__A _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1743 _15537_/A2 _16910_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16426__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25146__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1754 _25264_/A2 _25195_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_19641_ VGND VPWR _19641_/X _24276_/C _19641_/A _19641_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__23606__S _31066_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1765 _23879_/A wire1768/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_16853_ _16878_/A2 _16878_/A1 _32441_/Q _16853_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28839_ _28839_/Q _32398_/CLK _28839_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1776 VPWR VGND _27710_/A1 _18332_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_3167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_4133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25697__A1 _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1787 VPWR VGND _27705_/A1 _18312_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_253_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2594 VPWR VGND wire2594/X _18156_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_280_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26894__B1 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15804_ VGND VPWR _15804_/X _16040_/A2 wire1052/X _15803_/X _15802_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21970__A3 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31850_ _31850_/Q _31892_/CLK _31850_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_262_5181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_3711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19572_ _27077_/C1 _19571_/Y _19598_/A _28464_/Q _28464_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14988__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16784_ _16784_/X _16784_/A3 _16783_/X _16778_/X _16770_/X _16774_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__25161__A3 _25159_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13996_ _28501_/Q _13996_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4039_A wire4040/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19376__A1 _19373_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_4079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21126__S _21139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23172__A2 _23192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30801_ _30801_/Q _32569_/CLK _30801_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25821__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18523_ VGND VPWR _18523_/S wire3838/X _28295_/Q _28295_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_3345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_5632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3755 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15735_ _15734_/Y _15735_/B _15735_/X _15735_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_31781_ _31781_/Q _32565_/CLK _31781_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17387__B1 input186/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_5198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26646__B1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24945__B _24945_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30732_ hold159/A _32525_/CLK input76/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18454_ VGND VPWR _18456_/S wire3846/X _28228_/Q _28228_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_89_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26110__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15666_ VGND VPWR _15736_/S _29034_/Q _29002_/Q _15666_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire4206_A wire4207/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_1028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20965__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_160 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19128__A1 _28197_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_171 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output695_A wire3433/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26218__A _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2260_A wire2259/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_182 _26245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17405_ hold17/X _17401_/X _32284_/Q _17245_/X _29864_/D _26974_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111o_4 XFILLER_37_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_4186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14617_ wire3249/X wire1727/X _14617_/X _14705_/B1 _28870_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_193 _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30663_ _30663_/Q _31462_/CLK hold352/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18385_ VGND VPWR _18398_/S _18644_/A1 _28162_/Q _28162_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17139__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15597_ _15597_/A2 _15597_/X _15596_/X wire1104/A _28864_/Q _15608_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_201_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19679__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18435__S _18438_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22132__B1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_7_1_core_clk clkbuf_5_7_1_core_clk/X clkbuf_5_7_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__28169__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32402_ _32402_/Q _32402_/CLK _32402_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_2527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17336_ wire3564/A _31914_/Q _17336_/X _17446_/B2 _17336_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_50_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22683__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14548_ VGND VPWR _16840_/A2 _15507_/A1 wire1493/X _14548_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__29414__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30594_ hold301/A _31871_/CLK _30594_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23880__B1 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20694__A0 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_1922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_2844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2525_A _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32333_ _32333_/Q _32467_/CLK _32333_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17267_ _29200_/Q _17267_/D _17267_/Y _30806_/Q _30823_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_31_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16362__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14479_ _14479_/Y _29453_/D _30438_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_wire1493_A wire1493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25776__B _27227_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25082__C1 _25687_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17278__C _17278_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25621__A1 hold133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19006_ _19006_/X _19368_/D1 _28127_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__25621__B2 hold103/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16218_ VGND VPWR _16218_/X _16218_/B _16218_/A wire923/X VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_274_2437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22435__A1 _23355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32264_ _32264_/Q _32473_/CLK _32264_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31517__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14912__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23632__B1 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17198_ wire3216/X _21629_/A _17198_/X _17220_/C _17197_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19774__B _19774_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23778__A4 _23876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20446__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19300__A1 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31215_ VGND VPWR _31215_/D _31282_/CLK _31215_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19266__S _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1660_A _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29564__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16149_ _16149_/A2 _16149_/A1 _32310_/Q _16149_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_217_3578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27374__A1 _32227_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26177__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32195_ _32195_/Q _32532_/CLK _32195_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17311__B1 hold29/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_4612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19851__A2 wire1334/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_3147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24188__A1 _24188_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2894_A _20598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27483__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16665__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17862__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24188__B2 _28738_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31146_ _31146_/Q _32168_/CLK _31146_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_2544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26582__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17862__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14676__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22199__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15873__B1 _28083_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23935__A1 _31128_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22738__A2 _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30541__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31667__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19908_ VGND VPWR _26884_/B _20061_/C _25980_/A2 _19908_/X _27075_/C1 _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__19064__B1 _19063_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31077_ _31077_/Q _31363_/CLK _31077_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20749__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold19 hold19/A hold19/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19603__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire911_A wire911/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16417__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23516__S _23516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30028_ VGND VPWR _30028_/D _30455_/CLK _30028_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__18811__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19839_ VGND VPWR _26884_/B _20061_/C _19853_/A2 _19839_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_246_3207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_289_2680 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23743__C hold222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25688__A1 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23148__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15625__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20181__C_N _19772_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_5330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_2544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17090__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3041_A _18132_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22850_ _22849_/X _21289_/C _22933_/S _29896_/Q _22871_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14979__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24558__D _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25016__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3139_A _23526_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24896__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30691__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19367__A1 _28371_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_206_5374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21801_ _21801_/X _21471_/D _21800_/Y _21799_/X _21853_/B _29882_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_225_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24360__B2 hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19906__A3 _20106_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22781_ _22794_/B _22793_/B _22781_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_55_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21174__A1 _29616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31979_ _31979_/Q _32431_/CLK _31979_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18575__C1 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22371__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_2973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24520_ _31293_/Q _24525_/A _24518_/X _24520_/Y _24519_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XANTENNA_fanout1099_A _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_2864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21732_ VGND VPWR _21645_/B _21645_/A _21709_/Y _21732_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_206_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15389__C1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22078__D _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20875__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20921__A1 hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19119__A1 _28292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24112__A1 _30711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1360_A _27058_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_5186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23251__S _23251_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18590__A2 _14069_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_2529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15969__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31047__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24451_ _14300_/A _27051_/A _24451_/Y _24445_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_244_2296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21663_ _21664_/C _21664_/A _21664_/B _21664_/D _21822_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18345__S _18355_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22123__B1 _22123_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14600__A1 wire3249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19668__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25389__D _25389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23402_ VPWR VGND _30408_/D _23597_/B _23402_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_105_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29094__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20614_ VGND VPWR _20614_/S _27707_/A1 _29129_/Q _29129_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27170_ _32076_/Q wire1570/X _32076_/D wire2415/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_55_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21477__A2 _21381_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24382_ VGND VPWR _24382_/X _26903_/B _26903_/A _26903_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__18878__B1 _18878_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20134__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21594_ _21668_/A _21585_/X _21595_/B _21590_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__23871__B1 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26121_ _26121_/X _31552_/Q _31550_/Q _31551_/Q _26121_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_49_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_88_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16889__C1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23333_ VGND VPWR wire820/X _30311_/Q _17205_/X _30311_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_4032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20545_ VGND VPWR _20545_/S _29062_/Q _27624_/A1 _29062_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2503 VPWR VGND _20801_/S _20821_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16353__A1 _16445_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15156__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14174__A _14174_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17550__B1 wire2408/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29907__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24415__A2 _24420_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25612__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2525 VPWR VGND _20535_/S _20548_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_252_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24590__B _24590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30071__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31197__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14364__B1 wire3962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21229__A2 _21223_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26052_ _26055_/C _31533_/Q _26052_/Y _26055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22426__A1 _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23264_ VGND VPWR _23267_/S hold187/A _30247_/Q _30247_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15561__C1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold102_A hold102/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14903__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20476_ VGND VPWR _20485_/S _28995_/Q _23663_/A1 _28995_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19684__B _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_3525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32442__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20437__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2569 VPWR VGND _19406_/S _19416_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25003_ _25810_/C _25002_/X _25021_/A2 _31145_/Q _31145_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_66_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26359__B1_N _26358_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22215_ VGND VPWR _21051_/B _22214_/X _22213_/X _22215_/X _30042_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_193_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16105__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3842_A _29862_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27365__A1 _32219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23195_ VGND VPWR _23209_/S hold382/A _30117_/Q _30187_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26168__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18080__S _18085_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1868 VPWR VGND wire1866/A _22679_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19842__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17916__C _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29811_ VGND VPWR _29811_/D _30482_/CLK _29811_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27393__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22146_ _30097_/Q _18667_/X _22145_/X _30386_/Q _22146_/X wire2284/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_251_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_287_5479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_2857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28931__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17853__B2 _17879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25915__A2 _14171_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24718__A3 _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14667__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput370 _13934_/Y la_oenb[110] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_287_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_2207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput381 _13924_/Y la_oenb[120] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_248_4718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15864__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23926__A1 _28521_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1006 _16206_/A2 _16817_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xoutput392 _13808_/Y la_oenb[15] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xclkbuf_leaf_340_core_clk _30399_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_max_length3006_A _18466_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23926__B2 _28681_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19055__B1 wire1935/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29742_ _29742_/Q _29914_/CLK hold273/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1017 wire1021/A _16814_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22077_ _29807_/D _18544_/X _23228_/S _29807_/Q _22076_/X _22078_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_268_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26954_ _26988_/C _31973_/Q _31979_/Q _31976_/Q _26955_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_183_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21937__A0 _17143_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1028 VPWR VGND wire1030/A _15768_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21398__D1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25391__A3 _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14340__C _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25128__B1 _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16408__A2 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21028_ VGND VPWR _21030_/S _30028_/Q hold190/A _29493_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25905_ VGND VPWR _14186_/A _19581_/A _25903_/S _25905_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_25_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18802__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29673_ _29673_/Q _32581_/CLK _29673_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_3307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26885_ _25512_/A _26884_/Y wire752/X _31892_/Q _31892_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14419__A1 _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1134 VPWR VGND wire1134/X wire1134/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_229_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_5430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_4183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28624_ VGND VPWR _28624_/D _32543_/CLK _28624_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_275_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2141_A _20120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_4142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13850_ _29815_/Q _22095_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_267_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25836_ _25836_/A _25836_/B _25836_/C _25971_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_262_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26340__A2 wire2239/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2239_A _19535_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24887__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1189 VPWR VGND wire1189/X wire1189/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_2797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23154__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24351__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28555_ _28555_/Q _31877_/CLK _28555_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25694__A4 _25693_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13781_ _31165_/Q _13781_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_186_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25767_ _32094_/Q hold413/A _25768_/C _32093_/Q _27197_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_164_4197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17369__B1 wire2100/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22979_ _25691_/B _32453_/Q _22979_/X _25693_/B _32445_/Q _32461_/Q _32405_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__22362__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15520_ VGND VPWR _15750_/S _28862_/Q _28894_/Q _15520_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18030__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27506_ VGND VPWR _27506_/S _27699_/A1 _32321_/Q _32321_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_38_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1495 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24718_ _24729_/A _31564_/Q _31566_/Q _31565_/Q _31563_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_73_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15919__A1 _29072_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28311__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2406_A _20657_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28486_ _28486_/Q _31570_/CLK _28486_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_19_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20785__S _20785_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29437__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25698_ _27793_/B _25867_/A _25698_/Y _27793_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19859__B _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16041__B1 wire890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25553__B1_N hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24103__A1 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XANTENNA__20979__A1 _30185_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19833__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31000_ _31000_/Q _32579_/CLK _31000_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16647__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25367__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25816__S _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25906__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output443_A _13855_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2638 VGND VPWR VGND VPWR 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XANTENNA__23336__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16905_ _16905_/X _30801_/Q _16947_/A2 _16928_/A3 _16884_/S _16904_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__21645__A _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output610_A _28646_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17885_ _24384_/A _23598_/C _24389_/A _24389_/B _17885_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 Xfanout1562 VPWR VGND wire1565/A _14537_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19061__A3 _19056_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27035__C hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26760__A_N _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_18_0_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2380 _14177_/Y wire2380/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1584 _24205_/B1 wire1587/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_286_3598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31902_ _31902_/Q _31998_/CLK _31902_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19624_ _19624_/B _19566_/A _19774_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 Xwire2391 VPWR VGND wire2391/X wire2391/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1595 VPWR VGND _23822_/B _23849_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_260_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16836_ _16835_/X _16825_/S wire985/X _28969_/Q _16836_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_91_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25134__A3 _25135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1339_A wire1339/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_4324 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15083__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24878__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_5514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19349__A1 wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_4_8_0_core_clk clkbuf_4_8_0_core_clk/X clkbuf_4_9_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_1_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24342__B2 _31986_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31833_ _31833_/Q _32552_/CLK _31833_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_5585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19555_ _19555_/A _19555_/X _19555_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_228_1502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16767_ VGND VPWR _16918_/S _28799_/Q _28831_/Q _16767_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_13979_ _28518_/Q _13979_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_91_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14259__A _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_4813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22353__B1 wire3160/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23696__A3 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24893__A2 _19521_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32315__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18021__A1 wire3916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18506_ VGND VPWR _18531_/S wire3895/X _28278_/Q _28278_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15718_ _15717_/X _15718_/B1 _15723_/A2 _29333_/Q _15718_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_277_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1506_A wire1506/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31764_ _31764_/Q _31806_/CLK _31764_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19486_ _31317_/Q _19485_/C _31318_/Q _25478_/A _25470_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20695__S _20695_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20903__A1 _20902_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16698_ VGND VPWR _16698_/X _16695_/X _16940_/B1 _16928_/B1 _16697_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_37_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_2982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27292__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26095__A1 _24602_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16032__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18673__B _30022_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26095__B2 _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30715_ _30715_/Q _32551_/CLK hold293/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18437_ VGND VPWR _18456_/S wire3906/X _28211_/Q _28211_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_195_4603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27831__A2 _32538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15649_ _15737_/A2 _15649_/X _15648_/X wire1118/X _32329_/Q wire1519/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14693__S _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15386__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31695_ _31695_/Q _31923_/CLK _31695_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28804__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16583__B2 wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17780__B1 _31730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26890__B _26890_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30094__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14594__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold80_A hk_dat_i[9] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27478__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18368_ VGND VPWR _18394_/S wire3916/X _28145_/Q _28145_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_4368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30646_ hold356/A _31351_/CLK _30646_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_3176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23853__B1 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32465__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27044__B1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2907_A _20572_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17319_ wire3564/A _31911_/Q _17319_/X _17446_/B2 _17319_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19785__A _19860_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15138__A2 _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30843__D _30843_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1875_A wire1876/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27595__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18299_ VGND VPWR _18317_/S _28104_/Q _27509_/A1 _28104_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30577_ _30577_/Q _32438_/CLK hold405/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26398__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20131__A2 _19530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30907__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_2_7_core_clk clkbuf_opt_2_7_core_clk/X clkbuf_opt_2_7_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_20330_ VGND VPWR _20335_/S wire1837/X _28870_/Q _28870_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32316_ _32316_/Q _32316_/CLK _32316_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22408__A1 _29964_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28954__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23605__B1 wire1330/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22415__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25070__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14897__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18088__A1 wire3917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23100__A _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_3976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_169_core_clk _31892_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_20261_ VGND VPWR _20261_/S _28804_/Q _27710_/A1 _28804_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_115_4339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32247_ _32247_/Q _32547_/CLK _32247_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23081__A1 _18552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1039_A wire1038/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21539__B _21550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19824__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3089_A _17946_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3386 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23620__A3 wire1877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22000_ _22063_/A _22000_/Y _22000_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_1_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17296__C1 _17295_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25358__B1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17835__B2 _31735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20192_ _25567_/B _20191_/X _20192_/A2 _28740_/Q _28740_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32178_ _32178_/Q _32204_/CLK _32178_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_6_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14649__A1 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17208__A1_N _22905_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_1940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14441__B _14544_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15846__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31129_ _31129_/Q _32528_/CLK _31129_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19037__B1 wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21919__A0 _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput109 VGND VPWR _30672_/D la_input[42] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_132_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26570__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29144__D _29144_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23246__S _23248_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22041__C1 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25027__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23951_ _28460_/Q _26838_/A1 _23951_/X _28588_/Q _25738_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_22_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_2650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21395__A1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22592__A0 wire3700/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26858__B1 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17244__S _23402_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_2683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22902_ _22891_/A _22901_/Y _22902_/Y _22895_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__17063__A2 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18260__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19025__A _28256_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18567__C _23393_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26670_ _26670_/X _31864_/Q _26637_/B _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_247_4795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28334__CLK _30479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23882_ _28485_/Q _19646_/B _23882_/X _28677_/Q _24207_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_61_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15074__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24869__C1 _25160_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23136__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24333__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25621_ _25621_/X _25582_/X hold133/A hold103/A _24493_/X VGND VPWR _25620_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__23770__A _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22833_ VGND VPWR _30470_/Q _29894_/Q _22933_/S _22834_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA_907 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_2678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21147__A1 _29590_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_918 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14282__C1 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22344__B1 _18236_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14821__A1 _14648_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_929 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1383_A _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24884__A2 wire2630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24585__B _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18012__A1 _18223_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28340_ _28340_/Q _30385_/CLK _28340_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_266_1061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25552_ _25551_/X hold178/A _31353_/D _25552_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_22764_ VGND VPWR _22807_/S _30098_/Q _22763_/X _30098_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30437__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26086__A1 _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1742_A _15010_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24503_ _25430_/A _25507_/D _30759_/Q _31335_/Q _24505_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_224_2645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21715_ _21715_/X _21714_/Y _14333_/X _21705_/X _21766_/B VGND VPWR _21846_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XPHY_126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28271_ _28271_/Q _30027_/CLK _28271_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28484__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25483_ _25488_/A _25454_/A _31321_/D _25482_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_72_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16574__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15377__A2 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24097__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18075__S _18077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22695_ VGND VPWR _22706_/B _21320_/A _29731_/Q _22779_/A1 _22691_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_fanout1550_A wire1556/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1648_A wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27222_ _25774_/C _27222_/B _32103_/D _27280_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__13801__A _31145_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_2123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24434_ VGND VPWR _24434_/C _31017_/Q _24434_/X _24434_/D _24434_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__14585__B1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27388__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21646_ _22038_/S _21646_/B _21646_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__20107__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_20_0_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_4479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_33_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_2167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30587__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27153_ VGND VPWR _27153_/S _27696_/A1 _32059_/Q _32059_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15129__A2 _14539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_4110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24365_ _24364_/X _24888_/D _24889_/A1 _23611_/A _30985_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16326__A1 wire3243/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27586__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26389__A2 wire2630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21577_ _21569_/A _21576_/Y _21577_/Y _21569_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25046__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_60 _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_2700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17523__B1 _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_2820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3045 VPWR VGND _18151_/S _18150_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_202_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_71 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31832__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18720__C1 _27921_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_2042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26104_ VGND VPWR _26112_/D _31547_/Q _14399_/B _26104_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_82 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26305__B _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14337__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17473__B_N _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23316_ VGND VPWR _23334_/S _30294_/Q _17071_/X _30294_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25597__B1 _25582_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20528_ VGND VPWR _20528_/S _29045_/Q _27242_/A0 _29045_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_93 _31763_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27084_ _27122_/B wire2194/X _27098_/A _27084_/X _27098_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_213_5120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24296_ _30946_/D _24273_/D _31598_/Q _24284_/X _31675_/Q _26376_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__26794__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22325__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2344 _14201_/Y max_length2344/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_133_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14888__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18079__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22552__C _23061_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26035_ _14396_/Y _26034_/X _31528_/Q _17877_/X _31528_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_218_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23072__A1 hold158/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23247_ VGND VPWR _23251_/S wire3980/X _30230_/Q _30230_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2091_A wire2092/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20459_ VGND VPWR _20481_/S _28978_/Q _27684_/A1 _28978_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_input174_A mprj_dat_i[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23072__B2 _30092_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19815__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2189_A _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3029_A _18358_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_27_2422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17826__A1 _31726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25349__B1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16629__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21622__A2 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26546__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26959__C _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23178_ VGND VPWR _23178_/X _23176_/X _23177_/X _23175_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_273_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31982__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26321__A _26890_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15837__B1 _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22129_ VGND VPWR _22273_/S _30294_/Q _30384_/Q _22129_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_185_4805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24021__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15301__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_3830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_3784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2356_A wire2357/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26561__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27986_ _27986_/Q _28216_/CLK _27986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_131_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19579__A1 _28466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3492_A _31264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29725_ _29725_/Q _30411_/CLK _29725_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21465__A _21465_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14951_ VGND VPWR _14951_/X _14950_/X _14949_/X _15517_/A1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_26937_ hold433/A wire1571/X _31961_/D wire2713/X wire1230/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__17662__B _17662_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21386__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19043__A3 _19032_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31212__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17154__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32338__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13902_ _28595_/Q _13902_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18251__A1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17670_ VGND VPWR _26470_/B _31637_/Q _17669_/X _17670_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_2_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29656_ _29656_/Q _32419_/CLK _29656_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_4551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14882_ _14882_/X _28845_/Q _14881_/X _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25116__A3 _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27510__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26868_ VGND VPWR wire2682/X wire3616/X wire752/X _26868_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_92_3700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15065__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16262__B1 wire1035/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23127__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16621_ wire3242/X _16910_/A2 _16621_/X _16947_/A2 _29123_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_28607_ _28607_/Q _32553_/CLK _28607_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_75_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24324__B2 _31977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25521__B1 _25513_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13833_ _29983_/Q _22434_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__16801__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15604__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26694__C _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25819_ VGND VPWR _25825_/S _25818_/X _31433_/Q _31433_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_21_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21138__A1 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29587_ _29587_/Q _32432_/CLK _29587_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_242_3413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14079__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26799_ VGND VPWR wire2675/X _26866_/A1 _26833_/A _26799_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__14812__A1 _32048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28827__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22335__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24875__A2 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24495__B _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18003__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19340_ _19340_/X wire2270/A _27887_/Q wire2281/A wire2582/A _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_109_3965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16552_ VGND VPWR _16929_/S _32321_/Q _28929_/Q _16552_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_1_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28538_ _28538_/Q _31836_/CLK _28538_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22886__A1 _30110_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13764_ _31182_/Q _13764_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_164_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_6 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31362__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21543__D1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16014__B1 wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32488__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19751__A1 _28532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2783 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15503_ _15503_/A2 _15502_/X _29543_/Q wire1493/X _15503_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_220_4445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_2570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22350__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19271_ VGND VPWR _19271_/S _28171_/Q _28139_/Q _19271_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_38_2584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16483_ wire992/X _16483_/X _16482_/X _16964_/B1 _29321_/Q _16966_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_199_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24088__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28469_ _28469_/Q _31860_/CLK _28469_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_241_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17762__B1 _14302_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_4197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30500_ _30500_/Q _31959_/CLK _30500_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18222_ VGND VPWR _18222_/S _28089_/Q _27242_/A0 _28089_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16725__C _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27298__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15434_ _15433_/X _15638_/B1 _15605_/A2 _28104_/Q _15434_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_160_2456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14576__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22638__A1 _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31480_ _31480_/Q _31578_/CLK _31480_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28977__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27026__B1 _31994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14526__B _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30431_ VGND VPWR _30431_/D _30431_/CLK _30431_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18153_ VGND VPWR _27485_/B _20989_/A _21173_/B _27485_/D VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XFILLER_86_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15365_ VGND VPWR _15365_/Y _15364_/X _15352_/X _15226_/B _15356_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_275_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27577__A1 _32338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20113__A2 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16317__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14591__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17104_ _17104_/X _17103_/Y _17102_/X _17220_/C _21641_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__23850__A3 _23865_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_3_0_core_clk clkbuf_opt_3_1_core_clk/A clkbuf_5_2_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_14316_ _17077_/A _29874_/Q _21778_/B _14316_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_4 XFILLER_272_4866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27041__A3 _27036_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16868__A2 wire979/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30362_ _30362_/Q _32575_/CLK _30362_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18084_ VGND VPWR _18085_/S wire3818/X _28014_/Q _28014_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_231_5220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_3971 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15296_ wire3249/A _15770_/A _15296_/X _15296_/B1 _29120_/Q wire1693/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_output560_A wire4012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25052__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28207__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output658_A wire2702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold308 hold308/A hold308/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32101_ _32101_/Q _32233_/CLK _32101_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_190_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2223_A _19732_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold319 hold319/A hold319/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_17035_ VPWR VGND _17035_/X _21459_/D _29880_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_119_2314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_3059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_262_core_clk _32439_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23063__A1 hold417/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14247_ _31281_/Q _13829_/A _17883_/B _14263_/B2 _29511_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__27329__A1 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30293_ _30293_/Q _30433_/CLK _30293_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16233__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23063__B2 _30090_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21441__A1_N _30346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15540__A2 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14542__A _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19806__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1289_A wire1289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_3936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17817__A1 _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32032_ _32032_/Q _32032_/CLK _32032_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_4463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1837 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22810__A1 _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17817__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14178_ _24446_/A _24446_/B _31237_/Q _14178_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_190_3898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1859 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26001__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25773__C _25773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15828__B1 wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20821__A0 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19019__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18490__A1 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18986_ VGND VPWR _28158_/Q _28126_/Q _19180_/B _18986_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__26552__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28357__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_288_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18668__B _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27761__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14500__B1 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29602__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17937_ VGND VPWR _17939_/S wire3848/X _27875_/Q _27875_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_45_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22574__A0 _22611_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1436 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_4962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17064__S wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1370 VPWR VGND _19645_/A wire1374/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18242__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1381 _19680_/A wire1386/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_184_3636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27501__A1 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26304__A2 _31640_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17868_ _17867_/X _17863_/X _17686_/Y _17852_/A _17868_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XANTENNA__17291__C _17291_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21525__D _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23118__A2 _23116_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16253__B1 _16500_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24315__A1 wire2017/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19607_ _27087_/C1 _19606_/X _19609_/A _28474_/Q _28474_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__31705__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire707_A wire708/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17999__S _18007_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16819_ VGND VPWR _16842_/S _32328_/Q _28936_/Q _16819_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25658__A4 _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21129__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14324__A_N _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17799_ _17833_/S _17799_/X _17798_/X _17863_/C _17863_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_206_3010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_2618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14803__A1 _28947_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24866__A2 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29752__CLK _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19538_ _19538_/Y _19617_/A _19538_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 X_31816_ _31816_/Q _31884_/CLK _31816_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_247_1955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_2921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27265__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16005__B1 _15985_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19742__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_5292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31747_ _31747_/Q _31750_/CLK _31747_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19469_ VGND VPWR _28450_/D _26139_/A _19468_/Y _19471_/A _25540_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__24079__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31855__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21500_ _21503_/C _21500_/A _21966_/B _21500_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_124_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25530__A_N _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19730__D_N _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22480_ VGND VPWR _22448_/C _18661_/A _22484_/A2 _22480_/X _30001_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_121_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3004_A _18466_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31678_ hold477/A _32290_/CLK _31678_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_3536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22934__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27017__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25291__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21431_ _21664_/B _21419_/D _21427_/B _14114_/Y _21664_/D _21435_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA_max_length1156_A _14884_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25310__A _31265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_4029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30629_ _30629_/Q _30630_/CLK hold316/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25028__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23749__B _31771_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18623__S _18625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22653__B _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29139__D _29139_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24150_ _30575_/Q _19641_/C _24150_/X _32565_/Q _24281_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__27032__A3 _27035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25579__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16859__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21362_ _21362_/Y _21419_/D _21645_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_154_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21852__A2 _21842_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26776__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_3798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_2605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_1027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23101_ _23191_/C1 _21211_/B _22553_/A _22756_/C _23101_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_176_2452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29132__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20313_ VGND VPWR _20324_/S _27696_/A1 _28854_/Q _28854_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_85_2346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17239__S _17243_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_96 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23054__A1 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24081_ _24081_/X _24081_/A3 _19928_/B _28632_/Q _31110_/Q _24165_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__19258__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput80 VGND VPWR input80/X la_input[16] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_219_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16143__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21293_ _21633_/B _21549_/B _30365_/Q _30480_/Q _21288_/B VGND VPWR _21288_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24251__B1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14452__A _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15531__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput91 VGND VPWR input91/X la_input[26] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA_fanout1131_A wire1133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20173__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1229_A _26935_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17269__C1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23032_ VGND VPWR _23032_/X _25691_/B _32516_/Q _32508_/Q _25693_/B _32524_/Q _28908_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_115_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20244_ VGND VPWR _20244_/S _28787_/Q _27693_/A1 _28787_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_1937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3806 VPWR VGND wire3806/X _29899_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_217_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17808__B2 _24594_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26779__C _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26141__A _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3828 VPWR VGND wire3828/X _29867_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20812__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3610 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15819__B1 wire890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31235__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3839 hold453/X wire3839/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_80_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27840_ _25806_/D _27840_/B _32543_/D _27844_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__18481__A1 _18607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17284__A2 wire3587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20175_ wire877/X _20042_/B _20175_/X _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__24003__B1 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3638_A hold482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15295__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29282__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27671__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21285__A _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15834__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27771_ VGND VPWR _27774_/S _19937_/B _32497_/Q _32497_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_19_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17482__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24983_ _25076_/C1 _24982_/X _25021_/A2 _31135_/Q _31135_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22565__A0 _22564_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_76_3706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_3593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29510_ VGND VPWR _29510_/D _30474_/CLK _29510_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_233_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21907__A3 _21708_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18233__A1 _28091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26722_ _31814_/Q _26722_/Y _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_23934_ _23934_/X _24081_/A3 _19928_/B _28618_/Q _31096_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__19430__B1 _28439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15047__A1 _15047_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_5119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold267_A hold267/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31385__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24596__A _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16244__B1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23109__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_66_core_clk _30866_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_109_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18784__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19981__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29441_ _29441_/Q _30392_/CLK _29441_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_96_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26653_ VGND VPWR _26652_/Y _26684_/A2 _26637_/B _26653_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_70_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23865_ VGND VPWR _23865_/X _31898_/Q _24281_/A _23865_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_233_817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30748__D _30748_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15598__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_704 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_715 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1765_A wire1768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24857__A2 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_726 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25604_ _25632_/B hold76/A _25604_/X _25580_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_22816_ _22809_/Y _22831_/C _22825_/B _22829_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_246_2166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_737 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29372_ _29372_/Q _30474_/CLK _29372_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22868__A1 _30108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26584_ _26583_/X _26584_/X _23748_/B _26616_/B2 wire3461/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_0_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_748 wire3508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23796_ _23796_/X wire1614/X _31843_/Q _27053_/A hold329/A _23805_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__26059__A1 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27256__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_759 _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14270__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20879__A0 _29368_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28323_ _28323_/Q _30268_/CLK _28323_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25535_ _25539_/A _31347_/Q hold426/A _31346_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_202_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_1356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22747_ VGND VPWR _22747_/X _22747_/B _29886_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19202__B _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16547__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21451__C _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16011__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28254_ _28254_/Q _32420_/CLK _28254_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2104_A wire2104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25466_ _19481_/A _25454_/A _25466_/Y _31313_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_35_2779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23817__B1 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26961__D _27001_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22678_ VGND VPWR _22678_/B _22678_/Y _22678_/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_219_5351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27008__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3240_A wire3237/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27205_ _27205_/B _32095_/Q _32093_/Q _27206_/A _32094_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_142_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24417_ _24417_/X _31008_/Q _31010_/Q _31009_/Q _24410_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_87_3835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21629_ _22015_/S _21629_/B _21629_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__23293__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28185_ _28185_/Q _31933_/CLK _28185_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22096__A2 _22095_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25019__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25397_ _25397_/X _25414_/B1 _31283_/Q _25393_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__24490__B1 _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_5516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_4541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23832__A3 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27136_ VGND VPWR _27142_/S _27679_/A1 _32042_/Q _32042_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15150_ VGND VPWR _15150_/X _15147_/X _15611_/A1 _15610_/B1 _15149_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_29_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24348_ _32021_/Q _26772_/A _24348_/X _31989_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_219_4683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32010__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20364__A _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25034__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14101_ _14101_/A _14101_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__26231__B2 _32294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23045__A1 _29776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15081_ VGND VPWR _15716_/S _29316_/Q _28754_/Q _15081_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_155_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24242__A0 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27067_ VGND VPWR _32011_/D wire772/A _27066_/X _26785_/B _26999_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_137_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2473_A _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16053__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24279_ _24279_/X wire1303/X _31662_/Q _31585_/Q _26376_/A1 VGND VPWR _24278_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_4_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25874__B _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15522__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3313_A _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26782__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21056__A0 _29514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2196 VPWR VGND _19959_/A2 _19584_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xmax_length1451 VPWR VGND wire1450/A _15774_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_194_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14032_ _28465_/Q _14032_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26018_ _26139_/B _26694_/C _26019_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XFILLER_5_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14730__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23675__A _31192_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29625__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_2159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20803__A0 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1495 VPWR VGND wire1493/A _15615_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_4350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18840_ _28215_/Q _18840_/X _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__32160__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18472__A1 wire3901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27731__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_5061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15286__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26986__A _31978_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23825__D _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30602__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3874_A wire3875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17680__C1 _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31728__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18771_ VGND VPWR _18771_/X _19357_/B _22088_/B1 _27892_/Q _18770_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20303__S _20315_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15983_ VGND VPWR _16566_/S _28946_/Q _29244_/Q _15983_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27969_ _27969_/Q _31158_/CLK _27969_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22556__A0 wire3709/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29775__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18224__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17722_ VGND VPWR _17722_/X _17626_/X _17716_/X _17662_/A _17485_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_29708_ _29708_/Q _32074_/CLK _29708_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_282_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14934_ _14933_/X _15235_/A1 _15597_/A2 _32422_/Q _14934_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_209_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18224__B2 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2905_A _20580_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30980_ _30980_/Q _32277_/CLK _30980_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_3899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26298__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20031__A1 wire4063/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16235__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19972__A1 _28634_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_3355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18775__A2 _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23614__S _31071_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17653_ _17653_/X _17852_/A _31719_/Q _17586_/A _17652_/X _17596_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_29639_ _29639_/Q _32574_/CLK _29639_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14865_ wire3249/A _15770_/A _14865_/X _14887_/A2 _29560_/Q wire1693/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_248_2965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17983__A0 _27920_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16786__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15589__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30658__D _30658_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23841__C _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_4237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24848__A2 _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30752__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3947_A _29716_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31878__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16604_ _16911_/A2 _16604_/X _16603_/X wire962/X _29606_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_242_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13816_ _31130_/Q _13816_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14797__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4021_A _28707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22859__A1 _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29005__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17584_ VGND VPWR _17777_/B _17627_/B _17583_/Y _17585_/C VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14497__A_N _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14796_ _15223_/A _15575_/C _28087_/Q _14796_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_18_2911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27247__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4119_A wire4120/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21134__S _21134_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31601_ _31601_/Q _32287_/CLK _31601_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19323_ _19375_/A2 _27950_/Q _19322_/X _19323_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_16535_ wire1010/A wire1482/A _28961_/Q _16535_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_13747_ _31273_/Q _25350_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__16538__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32581_ VGND VPWR hold211/X _32581_/CLK _32581_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_75_1869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_5454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27798__A1 _25031_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17735__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25258__C1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14537__A _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24953__B _24953_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14549__B1 _15624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31532_ _31532_/Q _31754_/CLK _31532_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19254_ _19254_/X _19274_/A1 _19248_/X _19253_/X _22135_/A wire1563/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__31108__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16466_ VGND VPWR _16948_/S _28099_/Q _29055_/Q _16466_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23808__B1 _31879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20973__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14256__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26226__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25273__A2 _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24076__A3 _24075_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18205_ _18204_/X wire3174/X _29745_/Q _22334_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_192_4617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15417_ _15707_/A _15707_/C _32435_/Q _15417_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_121_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29155__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2438_A _27264_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31463_ VGND VPWR _31463_/D _31470_/CLK _31463_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22087__A2 wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23284__A1 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19185_ VGND VPWR _19185_/S _28362_/Q _27943_/Q _19185_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_69_2308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16397_ _16397_/X _28821_/Q _16964_/A2 _16920_/A3 _16930_/A1 _16396_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18443__S _18443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15761__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_5042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_5616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2246_A _19530_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23823__A3 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30414_ VGND VPWR _30414_/D _30415_/CLK _30414_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18136_ VGND VPWR _18143_/S wire3863/X _28064_/Q _28064_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27756__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15348_ _15319_/X _29153_/D wire1065/X _15328_/X _15347_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_86_2622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21834__A2 _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31394_ _31394_/Q _32464_/CLK _31394_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_1880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_2340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18160__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30132__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22192__C _29826_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31258__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2100 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold105 hold105/A hold105/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_64_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23036__A1 _32396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24233__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18067_ VGND VPWR _18074_/S wire3870/X _27997_/Q _27997_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30345_ VGND VPWR _30345_/D _32438_/CLK _30345_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_119_2111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold116 hold116/A hold116/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_15279_ _15279_/X _15609_/B1 _15277_/S _32128_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_wire1573_A wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14272__A _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold127 hold127/A hold127/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32503__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21047__A0 hold353/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold138 hold138/A hold138/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_1612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17018_ _17094_/A _21661_/A _17018_/Y _14360_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_190_3662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold149 hold149/A hold149/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_214_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold43_A hold43/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_2658 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_288_4136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30276_ _30276_/Q _30276_/CLK _30276_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19782__B _19782_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16898__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_60_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18999__C1 _23513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_1_0_0_core_clk_A clkbuf_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_3608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32015_ _32015_/Q _32015_/CLK _32015_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18463__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17266__A2 wire2066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27722__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_747 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26896__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20270__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23735__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16474__B1 _29087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23339__A2 _23304_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24536__A1 _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27491__S _27507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_28_1_core_clk clkbuf_opt_28_1_core_clk/X clkbuf_opt_28_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_23_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_2700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20213__S _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18969_ _28221_/Q _18969_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_244_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22547__A0 hold492/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2782_A _27598_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17018__A2 _14360_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_3414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21980_ _21492_/X _21942_/S _21964_/Y _21503_/D _21980_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27897__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27486__A0 _32301_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26289__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20022__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19963__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_3458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23524__S _23524_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20931_ VGND VPWR _20931_/S _29396_/Q wire3976/X _29396_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25305__A _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17974__A0 _27911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30568__D _30568_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23751__C _26595_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18618__S _18622_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27581__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21770__A1 _21769_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14788__A0 _29277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_17_0_core_clk clkbuf_5_17_1_core_clk/A clkbuf_4_8_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_127_3840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23650_ VGND VPWR _23666_/S _27688_/A1 _30780_/Q _30780_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3121_A hold191/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20862_ VGND VPWR _20866_/S _30229_/Q _29391_/Q _20862_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_281_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27238__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14252__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21044__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22601_ VGND VPWR _22613_/S hold131/A _22600_/X _30078_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_2301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_32_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16529__A1 wire3281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23581_ VGND VPWR _23593_/S wire1792/X _30501_/Q _30501_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_4462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20793_ VGND VPWR _20796_/S _29306_/Q _27682_/A1 _29306_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27789__A1 _25031_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25249__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24863__B _32561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19191__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25320_ _25320_/X _25325_/D _25322_/A _25413_/A _31266_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_225_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4495 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22532_ VGND VPWR _22551_/S _29821_/Q _30032_/Q _30032_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20883__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32033__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15201__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26461__A1 _27230_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25264__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26461__B2 _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_184_core_clk _32282_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_25251_ _25251_/X _25261_/B1 _29866_/D hold89/A _25263_/A2 VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_241_2096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22463_ _30332_/D _22462_/X _22513_/A2 _17038_/X _29992_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire3490_A _31265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23275__A1 wire3897/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21036__B1_N _21035_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18353__S _18353_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15752__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3588_A _30859_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19676__C _26781_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20089__A1 _28690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23814__A3 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24202_ _24202_/X _24892_/C wire1317/X _28644_/Q _31122_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_219_3223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21414_ _21419_/C _30348_/Q _21551_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 Xclkbuf_leaf_113_core_clk _32440_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__27666__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28522__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22483__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14960__B1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25182_ VGND VPWR _25180_/X _31221_/Q _25173_/B _25182_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_156_3524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29648__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18151__A0 _28079_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17477__B _26488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22394_ VGND VPWR _22613_/S _29953_/Q wire769/X _29953_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_65_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27410__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26213__A1 _31595_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_402_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26213__B2 _32285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17908__D _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24133_ _24133_/X _24131_/X _28541_/Q _23879_/X _24184_/A2 VGND VPWR _24132_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_254_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24224__A0 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21345_ _21345_/Y _21345_/C _21343_/X _21345_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XANTENNA__32183__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29990_ _29990_/Q _30406_/CLK _29990_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1513_A wire1519/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_1701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21038__B1 _21037_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30625__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14712__B1 _29275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28941_ _28941_/Q _32113_/CLK _28941_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_151_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24064_ wire4118/X _19994_/B _24064_/X wire739/X _24063_/X wire1625/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_81_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21276_ _23395_/B _22553_/C _23057_/S _29686_/Q _21276_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19692__B _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout973_A _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2818 _25448_/Y _25454_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_112_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28672__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23015_ VGND VPWR _25733_/C _30151_/Q _23014_/X _30151_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3625 VPWR VGND wire3625/X _30757_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29798__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18454__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20227_ VGND VPWR _20227_/S _28772_/Q _27710_/A1 _28772_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17257__A2 _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3922_A _21769_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3636 VPWR VGND _30719_/D hold208/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_172_2179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28872_ _28872_/Q _32117_/CLK _28872_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_8_3389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27713__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16601__S _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3647 VPWR VGND wire3647/X _30529_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_270_1046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold384_A hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15268__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2913 VPWR VGND _20482_/S _20473_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_2594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3658 _30458_/Q _21464_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__32601__A _32601_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16465__B1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27823_ _27824_/B _27844_/C _32535_/D _27823_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_213_2154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15807__A3 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2935 _20359_/S _20357_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_210_4488 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20158_ _25904_/A _20157_/Y _20192_/A2 _28723_/Q _28723_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_235_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_2455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2946 VPWR VGND _20285_/S _20284_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22538__A0 _30038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2968 _18615_/S _18616_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_115_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30775__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2979 VPWR VGND _18522_/S _18523_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21604__B1_N _21603_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27754_ VGND VPWR _27756_/S _25033_/B _32482_/Q _32482_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_287_1521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19776__D_N _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29028__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2054_A wire2055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24966_ _24966_/X _31127_/Q _25652_/A _25017_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_20089_ _26148_/A _20088_/Y _20106_/A _28690_/Q _28690_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_clkbuf_leaf_71_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26956__D _31980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input137_A la_input[68] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27477__A0 _32296_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20013__A1 _28653_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21210__A0 _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_5539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3190_A wire3191/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26705_ hold197/X _26859_/C1 _31805_/Q _26720_/A _31805_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_167_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_3626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23917_ _23917_/X _20128_/B wire4129/X wire4017/X _24188_/A2 VGND VPWR _23909_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_2_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27685_ VGND VPWR _27696_/S _27685_/A1 _32419_/Q _32419_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16768__A1 wire3242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24897_ _24947_/A _24897_/Y _24897_/A2 _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_96_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_2903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18528__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21761__A1 _18535_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_501 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_512 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29424_ _29424_/Q _30367_/CLK _29424_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14779__B1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14650_ _14648_/C _14642_/S _29039_/Q _14648_/A _14650_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_26636_ _31856_/Q _26635_/X _31795_/Q _26696_/D _26636_/Y _23761_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o32ai_2 XANTENNA__30005__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21462__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_523 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23848_ wire1808/A _23847_/X _31825_/Q wire1624/X _23849_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15976__C1 wire918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_534 _28645_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2319_A wire2320/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15440__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14243__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_545 _30592_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27229__B1 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_556 input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28052__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29355_ hold480/A _32079_/CLK _29355_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__29178__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_567 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14581_ _14580_/X _14822_/B1 _14817_/A2 _28837_/Q _14581_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_5304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26567_ _26567_/X hold222/A _31766_/Q _31764_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_70_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_578 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16048__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23779_ VGND VPWR _23779_/X _24310_/B _23873_/D _23873_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_180_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17717__B1 _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_589 wire1489/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15991__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19182__A2 _19181_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16320_ wire1010/X wire1482/X _28851_/Q _16320_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28306_ _28306_/Q _31959_/CLK _28306_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_2554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25518_ _31338_/Q _25517_/Y _31338_/D _19429_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_161_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29286_ _29286_/Q _31959_/CLK _29286_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20793__S _20796_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17193__A1 _30211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26498_ VPWR VGND _26498_/A _31739_/D hold447/X VGND VPWR NF_sky130_fd_sc_hd__and2_2 XFILLER_221_3872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_2125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26046__A _31531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25255__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26452__A1 _26441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmgmt_core_wrapper_4217 mgmt_core_wrapper_4217/LO flash_io1_oeb VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 XFILLER_104_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_4246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30155__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15887__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24492__C _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28237_ _28237_/Q _30385_/CLK _28237_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16251_ _16387_/A _16387_/C _28416_/Q _16251_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_276_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22069__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23266__A1 _29514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25449_ _25454_/A _31304_/D hold305/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_100_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15743__A2 _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2688_A wire2689/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14400__C1 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32526__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3528_A hold396/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15202_ _15515_/A2 _15202_/X _15201_/X wire1113/X _29535_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_139_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21277__B1 _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16182_ _16840_/A2 wire3281/X _29175_/Q _16182_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28168_ _28168_/Q _30454_/CLK _28168_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21816__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18142__A0 _28070_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20094__A _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25007__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_2341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15133_ wire1214/A _15128_/X _15133_/Y _15132_/X _15151_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_174_2912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27119_ _26159_/A _31507_/Q _27118_/X wire747/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_215_5078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24215__A0 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18693__A1 _30331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30941__D _30941_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14092__A _14092_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28099_ _28099_/Q _32319_/CLK _28099_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19890__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21029__A0 _29494_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_3911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24766__A1 _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25963__A0 _31495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30130_ _30130_/Q _30477_/CLK _30130_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14703__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19941_ _25041_/A wire1316/X _19941_/X _25035_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_15064_ _16840_/A2 _15560_/A1 _28986_/Q _15064_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_267_5411 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31550__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19094__S _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14015_ _28482_/Q _14015_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_253_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23974__C1 wire1265/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18445__A1 _18478_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30061_ hold156/A _32293_/CLK _30061_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19872_ VGND VPWR _19547_/X _26838_/A4 _25738_/B _19872_/X _26159_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_215_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27704__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25109__B _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15259__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4069_A _28660_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18996__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21129__S _21129_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18823_ _30257_/Q _18823_/X _19271_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__25824__S _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26912__C1 wire3331/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22529__A0 _30029_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15127__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_228_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18754_ VGND VPWR _18754_/X _19357_/B _19047_/S _28147_/Q _18753_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_244_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_3160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23852__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15966_ _15965_/X wire1052/X _15964_/X _15966_/Y wire951/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XFILLER_114_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_3403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_3685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20968__S _20979_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21201__A0 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20004__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16208__B1 _16449_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14482__A2 _30219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19945__A1 _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17405__C1 hold17/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17705_ VGND VPWR _17730_/S _17704_/X _17694_/X _17705_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_185_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21653__A _21653_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14917_ VGND VPWR _15275_/S _29014_/Q _28982_/Q _14917_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_252_901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30963_ _30963_/Q _32024_/CLK _30963_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18685_ VGND VPWR _18684_/Y _18683_/X wire3151/X _18685_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__17956__A0 _27893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15897_ _15897_/X _29555_/Q _16150_/A2 _16150_/A3 _16249_/S _15896_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18438__S _18438_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27563__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27043__C _27050_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18665__C _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1321_A _26687_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17636_ VGND VPWR _26470_/B _31634_/Q _17635_/X _17636_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__17420__A2 _31928_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14848_ _16798_/A2 _15620_/A1 _29108_/Q _14848_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_261_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1419_A _18661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30894_ _30894_/Q _32428_/CLK _30894_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32056__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15431__A1 _15500_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_379_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24297__A3 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26691__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24151__C1 wire1250/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27340__A _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17567_ VGND VPWR _17567_/X _17873_/B1 _17783_/B2 _31707_/Q _17566_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_225_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14779_ _15575_/C _15235_/A1 _28914_/Q _15223_/A _14779_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_261_2951 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17708__B1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14267__A _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15982__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22701__B1 _21463_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_4247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19306_ _28237_/Q _19306_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_261_2973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16518_ wire999/A _16091_/C _29322_/Q _16518_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_239_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28545__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32564_ VGND VPWR hold437/X _32564_/CLK _32564_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_225_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17184__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17498_ _26456_/A _31615_/Q _26464_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_31_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26443__A1 _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25246__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_4561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18920__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31515_ _31515_/Q _31801_/CLK _31515_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_48_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19237_ _19379_/B _28042_/Q _19236_/X _19237_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_238_3109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31080__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23257__A1 _29505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16449_ _16449_/X _16816_/B1 _16446_/X _16448_/X _16449_/B1 _16444_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_clkbuf_leaf_116_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18173__S _18222_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32495_ _32495_/Q _32523_/CLK _32495_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32108__D _32108_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16931__A1 wire912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_49 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_2990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_30_0_core_clk clkbuf_opt_30_1_core_clk/A clkbuf_5_26_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__21268__A0 _22620_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17278__D_N _17272_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27486__S _27488_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22465__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30648__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31446_ _31446_/Q _32390_/CLK _31446_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25795__A _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19168_ _28231_/Q _19168_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_220_2681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20208__S _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18119_ VGND VPWR _18119_/S _18532_/A1 _28048_/Q _28048_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28695__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_4433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19793__A _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18684__A1 _30331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30851__D _30851_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19099_ _28358_/Q _19087_/S _19109_/S _19099_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22480__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31377_ _31377_/Q _31536_/CLK _31377_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_1729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18901__S _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_2463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput700 wire3518/X user_irq_ena[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29940__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15498__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20491__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21130_ VGND VPWR _21137_/S _23663_/A1 _29574_/Q _29574_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23519__S _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_267_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30328_ VGND VPWR _30328_/D _32581_/CLK _30328_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__25954__B1 _31491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_2406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_5522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27218__C _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30798__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18436__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21061_ VGND VPWR _31970_/Q _32075_/Q _22438_/B _21062_/D _31971_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_232_2029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30259_ _30259_/Q _30404_/CLK _30259_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22232__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19799__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_4821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_2160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2209 VPWR VGND _26793_/B _25043_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_116_2851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20012_ VGND VPWR wire2656/X wire3616/X wire851/X _20012_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_99_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18987__A2 _18985_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25706__B1 _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23980__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1508 VPWR VGND wire1508/X wire1508/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16998__A1 _29988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27171__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1519 VPWR VGND wire1519/X wire1519/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21991__A1 _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_4838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24858__B _24865_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25182__A1 _31221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24820_ _24820_/B _24820_/Y _24820_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_60_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30028__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23762__B _31782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20878__S _20878_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27459__A0 _32287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1803 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23193__B1 _23192_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15670__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19936__A1 _28616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18739__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29152__D _29152_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23254__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18856__B _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28075__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24751_ _24751_/B _24784_/B _31449_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__25035__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21963_ VGND VPWR _21940_/Y _21519_/Y _21512_/A _21965_/C VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__17947__A0 _27885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22940__A0 _30117_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18348__S _18355_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21743__A1 _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29320__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_4693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22378__B _22378_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23702_ _24648_/B _26694_/A _23701_/X _31576_/Q _23703_/A _25884_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_123_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20914_ VGND VPWR _20914_/X _30422_/Q _20914_/A _20914_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_93_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26131__B1 _26139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27470_ VGND VPWR _27476_/S _32293_/Q _27469_/X _32293_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24682_ _24682_/B _24682_/Y _31450_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__15958__C1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21894_ VGND VPWR _21894_/X _21654_/X _21706_/Y _22067_/B _21893_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_145_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_155_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19951__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_967 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15422__A1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24874__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24288__A3 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26682__A1 _31899_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_1891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26421_ _26421_/X _26420_/C _31693_/Q _31692_/Q _26420_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_36_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30178__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23633_ _25087_/B _24480_/C _26837_/A _24481_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_242_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_365_core_clk _30410_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_282_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20986__A2_N _16979_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20845_ _29353_/D _20847_/C _20844_/X _30422_/Q _23226_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_197_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14177__A _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14630__C1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31423__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3080 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1463_A _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_5061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout819_A _23307_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25890__C1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32549__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24593__B _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29140_ _29140_/Q _31961_/CLK _29140_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_260_3195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26352_ VGND VPWR _26949_/B _24273_/D wire2212/X _26352_/X _26999_/A _26364_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_260_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_3157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23564_ _23564_/X _20453_/C _24210_/A _23640_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_145_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold132_A hold132/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17175__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20776_ VGND VPWR _20780_/S _27253_/A0 _29290_/Q _29290_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29470__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25237__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25303_ _25341_/A _31264_/Q _25322_/D _25303_/D _31262_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_273_4213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22515_ _23563_/A _30019_/Q _22515_/Y _23563_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_29071_ _29071_/Q _32417_/CLK _29071_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_69_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23248__A1 wire3978/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17488__A _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire805 VPWR VGND wire805/X wire805/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_26283_ VGND VPWR _14194_/Y _14398_/B _26301_/B _26283_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27912__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21287__A1_N _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16383__C1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18083__S _18083_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23495_ VGND VPWR _23525_/S _28386_/Q _30434_/Q _23495_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21259__A0 hold364/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1728_A _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28022_ _28022_/Q _28402_/CLK _28022_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire838 VPWR VGND wire838/X wire838/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_69_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3632 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_4208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25234_ _26242_/A _25233_/X _25264_/A2 hold98/A _31241_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27396__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23799__A2 wire1605/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22446_ _29984_/D _29984_/Q _22445_/X _22434_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__14933__B1 _14933_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_3196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24460__A3 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout4006 VPWR VGND _27485_/D _29451_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25165_ _25163_/X _24493_/X _24576_/B _25186_/C _25381_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA__30761__D _30761_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21274__A3 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22377_ _29938_/D _22385_/B1 _30477_/Q hold415/A _22356_/B VGND VPWR _22376_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22471__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19872__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15489__A1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4101 VPWR VGND wire4101/X _28647_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14343__C _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26313__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24748__A1 _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16686__B1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24116_ VGND VPWR _23879_/A _23879_/B _24113_/X _24116_/X _24115_/X _20673_/C VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_2_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3316 wire3320/X _25703_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_21328_ _21328_/Y _21464_/B _21328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_47_3671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25945__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2547 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25096_ wire838/A _25096_/B1 _26542_/B _20651_/X _25098_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_29973_ _29973_/Q _31761_/CLK _29973_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_43_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4123 VPWR VGND wire4123/X _28560_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3327 VPWR VGND _26173_/B1 wire3331/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_276_1299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16150__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4134 VPWR VGND _13975_/A _28522_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_212_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_3142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3338 VPWR VGND _26950_/C _27059_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3400 VPWR VGND _20671_/B _32334_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4145 VPWR VGND wire4145/X _28399_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2604 VPWR VGND _23849_/D _14266_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3349 _26188_/A _27117_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xclkbuf_4_10_0_core_clk clkbuf_5_21_0_core_clk/A clkbuf_3_5_2_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23956__C1 _23955_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3411 VPWR VGND _25745_/A wire3412/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_2_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4156 VPWR VGND wire4156/X _28179_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_3595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26032__C _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18427__A1 _28202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24047_ _31139_/Q _24047_/X wire1633/X _24192_/A2 _28725_/Q wire1283/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_2 X_28924_ _28924_/Q _32316_/CLK _28924_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_1553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23420__A1 _21279_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21259_ VGND VPWR _23533_/S _29721_/Q hold364/X _29721_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire4167 VPWR VGND _30524_/D input63/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2171_A _20104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold480 hold480/A hold480/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire3433 wire3434/X wire3433/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14700__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4178 VPWR VGND hold29/A hold28/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold491 hold491/A hold491/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20361__B _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25960__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3444 VPWR VGND wire3444/X _31942_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20234__A1 _28777_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4189 VPWR VGND _32606_/A wire4189/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_3028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16438__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_81_core_clk _31873_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_191_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3455 VPWR VGND _26762_/C wire3456/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_3305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17635__C1 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2721 VPWR VGND wire2721/X hold132/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23971__A2 _23969_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3466 VPWR VGND wire3466/X _31660_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26967__C _31994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28855_ _28855_/Q _32319_/CLK _28855_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2732 wire2733/X _19628_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_186_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1936 wire1939/A _19318_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_98_2301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28418__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3488 VPWR VGND _25361_/A _31267_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_237_205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1947 VPWR VGND wire1948/A _18687_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_clkbuf_leaf_194_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21982__A1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_10_core_clk _29580_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_24_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3499 VPWR VGND wire3499/X _31194_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout960 VPWR VGND wire962/A wire963/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1958 wire1963/A _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_267_3349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_4364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15820_ wire999/X _16091_/C _29208_/Q _15820_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27806_ VGND VPWR _32527_/D _27844_/C _27806_/A _27806_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__15110__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2765 VPWR VGND _19641_/A _14134_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_265_536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout971 _16566_/S _16842_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_150_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1969 VPWR VGND _19379_/B _18856_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26370__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16453__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2776 VPWR VGND _27696_/S _27698_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28786_ _28786_/Q _32574_/CLK _28786_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20788__S _20788_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25998_ _26179_/B1 _25997_/Y _26015_/A _31514_/Q _31514_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xfanout993 wire996/A _16911_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15661__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_3450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24920__A1 _31104_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27737_ VGND VPWR _27737_/S _27737_/A1 _32468_/Q _32468_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15751_ _15751_/A1 _16910_/A2 _15751_/X _15751_/B1 _29100_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__17938__A0 _27876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24949_ VGND VPWR _19628_/B _19628_/A _24950_/A2 _24949_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_163_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21734__A1 _21644_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18258__S _18317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21734__B2 _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17162__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3478_A _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14702_ VGND VPWR _14702_/X _14699_/X wire1202/X _14823_/A1 _14701_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_76_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26122__B1 _31552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17402__A2 _31925_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18470_ VGND VPWR _18491_/S wire3905/X _28243_/Q _28243_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_248_1346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28568__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15682_ VGND VPWR _15702_/S _30916_/Q _29194_/Q _15682_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27668_ _27729_/D _31399_/Q _31400_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA_320 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_331 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24133__C1 _24132_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16610__B1 wire1062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29813__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17421_ _17441_/B2 _17421_/A2 _17421_/X _17432_/B2 input192/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA_342 wire803/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29407_ _29407_/Q _30474_/CLK _29407_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14633_ _14633_/X wire1097/A _14628_/Y _15631_/A1 _14626_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 X_26619_ VPWR VGND _26619_/X _31779_/Q _26619_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_245_2979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_353 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23487__A1 _28382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_2086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_364 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30936__D _30936_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23302__D_N _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27599_ VGND VPWR _27605_/S _27679_/A1 _32341_/Q _32341_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14767__A3 _14766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15964__A2 wire1021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_5511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_3393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_375 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_386 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21498__B1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_397 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17352_ VGND VPWR _17348_/X _17352_/X _17351_/X _17272_/A wire2108/X _17349_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_105_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29338_ VGND VPWR hold216/X _31970_/CLK _29453_/D VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_223_3989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14564_ _14564_/X _14610_/B1 _14561_/X _14563_/X wire1089/X _14556_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18363__A0 _28141_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17166__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19597__B _19597_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25228__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31916__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16303_ wire1010/X wire1482/X _29221_/Q _16303_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18902__A2 _18900_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19089__S _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_2119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23239__A1 _23043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17283_ _30825_/Q _17282_/Y _30808_/Q _17283_/X _29202_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_29269_ _29269_/Q _31966_/CLK _29269_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_161_2392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14495_ _14495_/Y _22078_/D _29713_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_239_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16913__A1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26976__A2 _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29963__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19022_ _19189_/A2 _28386_/Q _19021_/X _28386_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31300_ _31300_/Q _32580_/CLK _31300_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16234_ _15771_/B _16646_/A2 _16234_/X _16818_/A2 _29628_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_48_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_5616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22447__C1 _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25819__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32280_ _32280_/Q _32280_/CLK _32280_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_core.RAM128_WE0[2] _17907_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18115__A0 _28044_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22998__A0 _22994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_5181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14534__B _14534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31231_ VGND VPWR _31231_/D _31754_/CLK hold133/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26189__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16165_ _16164_/X _16120_/S _16815_/A2 _28091_/Q _16165_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_6_5229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22462__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30940__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4186_A wire4187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16677__B1 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15116_ _16956_/A2 _15747_/A1 _28755_/Q _15116_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24739__A1 _31472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31162_ _31162_/Q _31162_/CLK _31162_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_68_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25936__B1 _25941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16096_ wire989/X _16096_/X _16095_/X _16068_/S _29013_/Q _16832_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_output640_A wire2430/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16141__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14688__C1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14152__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30113_ _30113_/Q _30474_/CLK _30113_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18418__A1 _28193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19924_ VGND VPWR _26900_/B _19520_/B wire1328/X _19924_/X _27091_/C1 _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_15047_ _15047_/A1 _16814_/A2 _15047_/X _15609_/B1 _29177_/Q wire1698/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_285_4106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_1030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31093_ _31093_/Q _32541_/CLK _31093_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16692__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27689__A0 _32423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xcore.RAM128 wire2402/X wire2405/X wire2411/X wire2424/X wire2430/X wire2769/X wire3122/X + _31920_/CLK wire2318/X wire2365/X wire2369/X wire2374/X wire2379/X wire2382/X wire2386/X + wire2685/X wire2689/A wire2694/X wire2697/X wire2322/X wire2701/X wire2706/X wire2709/A + wire2714/X hold121/X wire2390/X wire2725/A wire2731/X wire2394/X wire2737/A wire2325/X + hold115/X hold113/X wire2333/X wire2338/X wire2342/X wire2347/X wire2350/X wire2356/X + wire2360/X wire2130/A _17324_/B1 _17330_/B1 _17336_/B1 _17343_/A2 _17349_/B1 _17355_/A2 + _17363_/B1 _17370_/A2 _17374_/B1 _17381_/A2 wire2129/A _17387_/A2 _17391_/B1 _17398_/A2 + _17403_/A2 _17409_/B1 _17415_/A2 _17421_/A2 _17427_/A2 _17432_/A2 _17436_/B1 wire2128/A + _17441_/B1 _17446_/B1 wire2127/A _17280_/B1 _17289_/B1 _17296_/B1 wire2126/A _17312_/A2 + _17319_/B1 _17891_/Y _17909_/X _17908_/X _17907_/X _17906_/X VPWR VGND NF_RAM128 XANTENNA__16429__B1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30044_ _30044_/Q _30474_/CLK _30044_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23962__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28098__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19091__A1 wire4161/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19855_ VGND VPWR _26900_/B _19520_/B wire1330/A _19855_/X _27028_/A _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_98_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_4562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_4513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_3551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21973__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29343__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24678__B _24678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25164__A1 _25186_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18806_ wire1772/X _20870_/S wire1774/X wire1912/A _18806_/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a31o_1 XFILLER_59_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19786_ VPWR VGND _19786_/X _19786_/B _19786_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__20698__S _20714_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16998_ _16998_/X _29773_/Q _29988_/Q _30373_/Q _22484_/A2 VGND VPWR _16997_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__15652__A1 wire1074/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19918__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24911__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21383__A _30350_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18737_ _18736_/X _19367_/B1 _19380_/A2 _28178_/Q _18737_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_20_2653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15949_ _15949_/X wire1032/X _16041_/A1 _15948_/X _15946_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_94_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21725__A1 hold455/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31995_ hold500/A _32282_/CLK _31995_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30320__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31446__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14860__C1 _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17072__S _17089_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2578_A _18666_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18668_ _18668_/Y _29343_/Q _29344_/Q _18668_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 X_30946_ _30946_/Q _32127_/CLK _30946_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_44 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_2472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29493__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_4877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26664__A1 _31789_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27070__A _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17619_ _31715_/Q _17539_/B _17619_/X _31714_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19788__A _24273_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27935__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_5592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30877_ _30877_/Q _32347_/CLK _30877_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18599_ VGND VPWR _18601_/S wire3896/X _28313_/Q _28313_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14758__A3 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14612__C1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire891_A wire892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_1793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20630_ VGND VPWR _20650_/S _27690_/A1 _29176_/Q _29176_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_4667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21830__B _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30470__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17157__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_5070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31596__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17157__B2 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25219__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15168__B1 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20561_ VGND VPWR _20562_/S _27687_/A1 _29077_/Q _29077_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32547_ _32547_/Q _32547_/CLK _32547_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_5229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16904__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_4498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_4555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22300_ VGND VPWR _22300_/S _29886_/Q _29145_/Q _29886_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14915__B1 _29248_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_2653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23280_ VGND VPWR _23283_/S wire3879/X _30262_/Q _30262_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_opt_25_0_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20492_ VGND VPWR _20504_/S _27684_/A1 _29010_/Q _29010_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32478_ _32478_/Q _32513_/CLK _32478_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_153_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19449__A3 _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14444__B _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_3535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22231_ _22231_/X _22230_/X _30109_/Q _18664_/X wire2286/X VGND VPWR _22092_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_255_3253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18657__A1 wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31429_ VGND VPWR _31429_/D _32402_/CLK _31429_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_273_2129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23650__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18631__S _18631_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23757__B _31779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22661__B _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23249__S _23250_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17865__C1 _17864_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22162_ _22161_/X _22509_/C1 wire828/X _29823_/Q _29823_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25927__B1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_2405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput530 _31115_/Q la_output[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_290_2465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_2875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput541 _28711_/Q la_output[34] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21113_ VGND VPWR _21129_/S _24216_/A0 _29557_/Q _29557_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18409__A1 _28184_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput552 _28721_/Q la_output[44] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_99_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19067__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15340__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22205__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26970_ _27042_/C _26970_/B _26970_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_22093_ _22092_/Y _22513_/C1 _22092_/B _20868_/S _29814_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xoutput563 _28731_/Q la_output[54] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16683__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17474__C _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput574 _28677_/Q la_output[64] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20181__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1309_A _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput585 _28687_/Q la_output[74] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15891__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput596 _28697_/Q la_output[84] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_25921_ _25920_/X _26148_/A _31476_/Q _24716_/A _31477_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2017 VPWR VGND wire2017/X _17886_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21044_ VGND VPWR _21057_/S _30040_/Q _29505_/Q _29505_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23953__A2 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23773__A _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32221__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26787__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18814__D1 wire2270/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2028 VPWR VGND wire2028/X _17341_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_216_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_2883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25691__C _25693_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2039 VPWR VGND wire2039/X _14333_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21964__A1 _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1305 VPWR VGND wire1305/X _20372_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_214_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21964__B2 _21940_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24588__B _24588_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1316 VPWR VGND wire1316/X wire1317/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25155__A1 _31211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28640_ _28640_/Q _32544_/CLK _28640_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_64_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3620_A wire3621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25852_ _31447_/Q _31448_/Q _31446_/Q _25844_/X _25854_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__17632__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1327 VPWR VGND _24454_/A wire1328/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26352__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_3347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_4316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23166__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15643__A1 _29331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19909__A1 _28604_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28710__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22508__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23705__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24803_ _24803_/B _31052_/Q _31682_/Q _24803_/X _31681_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__29836__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_5022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17490__B _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28571_ _28571_/Q _32039_/CLK _28571_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_2979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_3825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20401__S _20418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25783_ _31419_/D _31419_/Q _25782_/Y _25780_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_274_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18078__S _18078_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22995_ wire3479/A _32455_/Q _22995_/X _23036_/S1 _32447_/Q _32463_/Q _32407_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_fanout1580_A _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16387__A _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout936_A wire944/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14851__C1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27522_ _27522_/A _27522_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_99_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32371__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13804__A _31142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26104__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24734_ _25836_/C _24734_/B _31456_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xnor2_4 X_21946_ _21946_/Y _21946_/B _21946_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_279_5134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19924__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26655__A1 _31892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30813__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26589__B1_N wire3452/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27453_ VGND VPWR _27475_/S _32283_/Q _32284_/Q _27453_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19698__A _19698_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_4095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23469__A1 wire4153/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24665_ _24665_/X _24666_/B _31444_/Q _24666_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_266_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30756__D input45/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_2966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21877_ _22061_/S hold223/A _21878_/A _22071_/C _21554_/A _21866_/A hold232/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_231_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15946__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28860__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1845_A _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19137__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29986__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26404_ _31691_/Q _26420_/C _31690_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__24130__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23616_ _23616_/Y _31070_/Q wire1353/X _24847_/C wire1292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 X_20828_ _20832_/B _20832_/D _21645_/A _21746_/S _14424_/Y _20830_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 X_27384_ VGND VPWR _27384_/S _32236_/Q _27280_/X _32236_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18345__A0 _28123_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17148__A1 _29894_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24596_ _24597_/A _24596_/Y _31530_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__17148__B2 _23135_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_2513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21232__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29123_ _29123_/Q _31927_/CLK _29123_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_3269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15159__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26335_ _26335_/A _26335_/B _26335_/C _26335_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_23547_ VGND VPWR _23560_/S _30468_/Q _30038_/Q _30468_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17699__A2 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20759_ VGND VPWR _20784_/S _27236_/A0 _29273_/Q _29273_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_4704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22692__A2 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30963__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24969__A1 _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29216__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29054_ _29054_/Q _32063_/CLK _29054_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_2579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_2_0_1_core_clk clkbuf_3_1_0_core_clk/A clkbuf_2_0_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_14280_ VGND VPWR _14281_/A _24447_/A _14280_/A _29980_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_26266_ _26184_/A _26265_/X _26263_/A wire3466/X _31621_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_234_4005 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23478_ VGND VPWR _23524_/S _23477_/X _31943_/Q _30425_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16371__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_4027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_3744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25630__A2 _31364_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3964 _22427_/A _22610_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28005_ _28005_/Q _30450_/CLK _28005_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_251_5053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25217_ _25217_/X _25263_/B1 _29849_/D hold105/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_30_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18648__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22429_ _29980_/D _22619_/S _14367_/X wire3953/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23641__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19845__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26197_ _31587_/Q _26227_/A2 _26198_/B _32277_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_216_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_3151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2386_A wire2387/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14921__A3 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3226_A _21471_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_41 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25918__A0 wire4186/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31319__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21652__B1 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17856__C1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3102 _16981_/Y _18664_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_191_3064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25148_ _25148_/B _31208_/D _25148_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_input65_A la_input[118] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3113 _14284_/Y _30332_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16123__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20372__A _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17320__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17320__B2 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28240__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14134__A1 wire3496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25394__A1 _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24197__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15331__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14134__B2 wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17970_ VGND VPWR _17974_/S wire3848/X _27907_/Q _27907_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25079_ _25079_/A wire1296/X _25079_/X _25079_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29956_ _29956_/Q _32574_/CLK _29956_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_156_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17871__A2 _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16674__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3157 _18659_/X _21030_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17384__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22998__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3168 VPWR VGND _23191_/C1 _18534_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_4437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15882__A1 _28406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14685__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1700 VPWR VGND _16924_/A3 wire1702/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2445 VPWR VGND _25197_/D _24499_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16921_ VGND VPWR _16922_/B _16928_/B1 _16967_/A1 _16918_/X _16920_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28907_ _28907_/Q _32538_/CLK _28907_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15882__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23944__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3252 _14546_/A _14544_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1711 _23376_/S _23532_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_1_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29887_ _29887_/Q _31910_/CLK _29887_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1722 _14442_/Y _23376_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3274 VPWR VGND _14518_/A _22078_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30343__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_1247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31469__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17084__B1 _30386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24498__B _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3285 VPWR VGND wire3285/X wire3287/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1744 _16874_/A2 _15537_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout2489 VPWR VGND _20933_/S _20921_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19640_ _19640_/X _20654_/B _20060_/A _20654_/A _20654_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_wire2720_A wire2721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2551 VPWR VGND _20261_/S _20258_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1755 VPWR VGND _25254_/A2 _25195_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17623__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16852_ VGND VPWR _16852_/X _16849_/X _16851_/X wire963/X wire1044/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_250_1269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28838_ _28838_/Q _32548_/CLK _28838_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_210_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2562 VPWR VGND _20223_/S _20205_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21915__B _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1766 VPWR VGND _24467_/C _19509_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28390__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1777 _27265_/A0 _18332_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__15634__A1 wire3246/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23157__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26994__A _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_1922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout790 _25022_/X _25086_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26894__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1788 _27512_/A1 _18312_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__15634__B2 _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15803_ VGND VPWR wire969/X _28837_/Q _28869_/Q _15803_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire1850 VPWR VGND _21900_/B _14439_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_147_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_287_core_clk _31920_/CLK clkbuf_5_23_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_19571_ VGND VPWR wire2668/X _19522_/A _19598_/A _19571_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_253_517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20311__S _20311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16783_ _16783_/X _16967_/A1 wire912/X _16782_/X _16780_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_1_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28769_ _28769_/Q _32329_/CLK _28769_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27518__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13995_ _28502_/Q _13995_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_253_528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1883 VPWR VGND wire1883/X wire1885/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22904__B1 _30112_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_3734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18522_ VGND VPWR _18522_/S _23291_/A1 _28294_/Q _28294_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30800_ _30800_/Q _31918_/CLK _30800_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_216_core_clk _31607_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_15734_ _15737_/B1 _15733_/X wire1209/X _15734_/Y _15731_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 X_31780_ _31780_/Q _32582_/CLK _31780_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30493__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17387__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18584__B1 _21103_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17387__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23622__S _31076_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19781__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27843__B1 _32545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30731_ _30731_/Q _32535_/CLK hold159/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18453_ VGND VPWR _18458_/S wire3850/X _28227_/Q _28227_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20391__A0 _28913_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23004__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15665_ VGND VPWR _15665_/X _15662_/X _15664_/X _15705_/A1 _15749_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_248_1187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30666__D _30666_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_150 _23116_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26110__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_161 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19128__A2 wire1997/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22746__B _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_172 _23890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17404_ VGND VPWR _17403_/X wire2023/X hold17/A hold16/X _17447_/B2 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_201_4730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24121__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14616_ VGND VPWR _14818_/S _28774_/Q _28806_/Q _14616_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire4101_A _28647_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_183 _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18384_ VGND VPWR _18390_/S _23286_/A1 _28161_/Q _28161_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30662_ hold149/A _31510_/CLK _30662_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18336__A0 _28114_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25122__B _31199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17139__A1 _29893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_194 _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15596_ _16791_/A2 _15607_/A1 _28896_/Q _15596_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_output590_A _28692_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22132__A1 _29819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17139__B2 _23130_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_1873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19533__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output688_A wire3193/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21142__S _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32401_ _32401_/Q _32401_/CLK _32401_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_201_4774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17335_ hold43/X _17447_/B2 _17335_/X input177/X _17447_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_271_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14547_ _14547_/X _23393_/C wire1698/X _14544_/B _14442_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_89_3546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18887__A1 _28025_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20143__B1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22683__A2 _21328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30593_ _30593_/Q _31871_/CLK hold301/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14545__A _14545_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25606__C1 _31373_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23880__B2 _30563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15140__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20694__A1 _29210_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32332_ _32332_/Q _32332_/CLK _32332_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23858__A _23858_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17266_ _17266_/X wire4185/X wire3558/A _17295_/B2 wire2066/X VGND VPWR _17265_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__20981__S _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14478_ _30438_/Q _14478_/X _29453_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_67_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16362__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25776__C _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26234__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25621__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19005_ _19005_/X _19002_/X wire1905/X _19004_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_132_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_1967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16217_ VGND VPWR _16218_/B _16214_/X _16216_/X _16736_/S _16967_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_230_5104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18639__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2518_A _20719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32263_ _32263_/Q _32550_/CLK _32263_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23093__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22435__A2 _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29709__CLK _30219_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18451__S _18458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17197_ _21629_/A _17197_/Y _17197_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_83_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1486_A wire1486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31214_ _31214_/Q _31746_/CLK _31214_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_4242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27764__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25909__B1 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16148_ wire985/X _16148_/X _16147_/X _15957_/S _32422_/Q _16448_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_6_781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32244__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32194_ _32194_/Q _32225_/CLK _32194_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_2140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17311__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17311__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19851__A3 _20120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18223__C_N _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25385__A1 _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24188__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31145_ VGND VPWR _31145_/D _32544_/CLK _31145_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_170_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_2583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16079_ wire890/A _29660_/D _16061_/X _16078_/X _16069_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA_wire1653_A _19700_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22199__A1 _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_2720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15873__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14676__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28733__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19907_ _19906_/X _28603_/Q _28603_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__23935__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19064__A1 _28388_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22738__A3 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29859__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3680 _30424_/Q _20982_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_211_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31076_ _31076_/Q _31363_/CLK _31076_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19605__A_N _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27126__A2 _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_4922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_5044 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23348__D_N _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17075__B1 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_4201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30027_ _30027_/Q _30027_/CLK _30027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__32394__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_4944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26334__B1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19838_ _19837_/X _28571_/Q _28571_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_256_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1918_A _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23148__B1 _23147_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23743__D _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25688__A2 _25693_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26885__A1 _31892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30836__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput1 VPWR VGND input1/X clk_in VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_0_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_5342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_5222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20221__S _20227_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19769_ _26771_/A _19768_/Y _19782_/A _28541_/Q _28541_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_187_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_3935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2862_A wire2869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24896__B1 _24895_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28883__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21800_ VGND VPWR _21800_/Y _21853_/B _21381_/B _21381_/A _21473_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_183_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_4630 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19367__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24360__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1232 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22780_ _22777_/X _22745_/X _22776_/X _30465_/Q wire3133/X _22781_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_4 XFILLER_228_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19906__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31978_ _31978_/Q _32431_/CLK _31978_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_225_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22371__A1 _30474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18575__B1 _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23532__S _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21731_ VGND VPWR _21853_/B _21729_/X _21730_/Y _21731_/X _21365_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_185_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30929_ _30929_/Q _32036_/CLK _30929_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_280_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30576__D _30576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15928__A2 wire1021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27231__C _32579_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30986__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20921__A2 _18079_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24661__A_N _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19119__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16050__B2 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24112__A2 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_1992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3201_A _14429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24450_ VGND VPWR _14367_/B _14167_/S _24543_/A _24450_/X _24447_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_244_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29239__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21662_ _29884_/Q _21447_/B _21426_/Y _21430_/Y _21662_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_198_5198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22123__A1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18327__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23320__A0 _17104_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14600__A2 _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23401_ _31962_/Q wire3412/A _23400_/Y _30407_/D _23403_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_72_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20613_ VGND VPWR _20613_/S _27706_/A1 _29128_/Q _29128_/D VGND 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_30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23332_ VGND VPWR wire820/X _30310_/Q _17198_/X _30310_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20544_ VGND VPWR _20550_/S _29061_/Q _27703_/A1 _29061_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length3238 VPWR VGND _16814_/A1 _16445_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_222_1861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20891__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15156__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16353__A2 _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17550__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1520_A wire1521/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2515 VPWR VGND _20708_/S _20695_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17550__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25612__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28263__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2526 VPWR VGND _20528_/S _20548_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_217_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29389__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26051_ _26055_/C _26062_/D _31533_/Q _26055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_277_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_2314 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19684__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1426_A _18298_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25002_ _25081_/A _24937_/B _25002_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_172_3936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_3482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22214_ _22221_/C _22221_/B _21051_/B _22214_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_270_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21634__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27674__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21288__A _22934_/A VGND VPWR VPWR VGND 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VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29810_ VGND VPWR _29810_/D _30118_/CLK hold230/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_216_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20842__D1 _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_4093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24179__A2 wire733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22145_ _22145_/X _20980_/S _18668_/C _18666_/C _23304_/C _30296_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__15313__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17853__A2 _14067_/A VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__decap_8 XFILLER_86_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput382 _13923_/Y la_oenb[121] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29741_ _29741_/Q _29782_/CLK hold449/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23926__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1007 _16206_/A2 _16965_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_187_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput393 _13807_/Y la_oenb[16] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22076_ VGND VPWR _23226_/S _22620_/D _18563_/C _22076_/X _22076_/D VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 X_26953_ _26955_/D _31975_/Q _31978_/Q _31977_/Q _31974_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 Xfanout1018 wire1021/A _16448_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27117__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21398__C1 _21389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21937__A1 hold250/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17066__B1 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25128__A1 _25136_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17705__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25904_ VPWR VGND _31469_/D _25904_/B _25904_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_148_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21027_ VGND VPWR _21051_/B _30027_/Q _29492_/Q _29492_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_247_322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26325__B1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18802__A1 _28277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1113 VPWR VGND wire1113/X wire1113/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29672_ _29672_/Q _32425_/CLK _29672_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_214_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32031__D _32031_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26884_ _26884_/Y _26884_/B wire752/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_242_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15077__C1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14419__A2 _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15616__A1 _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1135 VPWR VGND wire1135/X _14551_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20262__A_N _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_3319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_3488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15616__B2 _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28623_ _28623_/Q _31119_/CLK _28623_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_4416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_380_core_clk _30382_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_186_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31761__CLK _31761_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25835_ _31441_/D _25834_/X _31441_/Q _25832_/Y _31429_/Q _27854_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_129_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xload_slew2658 VPWR VGND _14189_/A _19563_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_281_3611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_1754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19205__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xload_slew2669 VPWR VGND _19574_/B _19573_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_275_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1962_A wire1968/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26340__A3 _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15092__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19358__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23154__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24351__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19212__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28554_ _28554_/Q _31884_/CLK _28554_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_227_3152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13780_ _31166_/Q _13780_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2134_A _19782_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25766_ _32094_/Q _27198_/B _27204_/B hold413/A _32093_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_249_1452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17369__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22978_ VGND VPWR _22977_/X _22976_/X _31395_/Q _22978_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_262_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17369__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26628__A1 _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19763__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27505_ VGND VPWR _27505_/S _27698_/A1 _32320_/Q _32320_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24717_ _31564_/Q _24722_/B _31563_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_281_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21929_ _21929_/Y _21955_/B _21929_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_199_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28485_ _28485_/Q _31570_/CLK _28485_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16577__C1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15919__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25697_ _25696_/X _31396_/Q _31396_/D _25693_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xclkbuf_1_1_0_core_clk clkbuf_1_1_1_core_clk/A clkbuf_0_core_clk/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_280_1218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32117__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21570__C1 _21288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16041__A1 _16041_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19859__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3176_A _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24103__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15450_ _15450_/Y _15449_/X _15319_/B _15445_/X _15443_/X _15757_/C1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_4 X_27436_ VGND VPWR _27476_/S _32276_/Q _27435_/X _32276_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_3702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24648_ _24648_/B _31466_/Q _24666_/B _31464_/Q _24678_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_4 XFILLER_220_3926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23311__A0 _17029_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22114__A1 _22181_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18318__B1 wire3175/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_1772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22114__B2 _30093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14401_ VGND VPWR _14168_/S _14401_/A1 wire2597/X _14398_/Y _14401_/X _14367_/X VGND + VPWR NF_sky130_fd_sc_hd__a311o_4 XPHY_853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3535_A wire3536/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18869__A1 _28347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15381_ VGND VPWR _15381_/X _15521_/S _15757_/C1 _15380_/X _15379_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27367_ hold143/A _31384_/Q _27404_/B _31386_/Q _27375_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_160_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28606__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24579_ VGND VPWR _25648_/B _27280_/C hold487/A _27280_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__23862__A1 _31865_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25877__B _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14365__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3343_A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23862__B2 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_4054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17120_ _17115_/Y _17119_/Y _22756_/C _17118_/X _17120_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_197_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21873__A0 _21853_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29106_ _29106_/Q _32421_/CLK _29106_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14332_ _14332_/X _14313_/X wire3987/A _14316_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_26318_ _26317_/Y _23599_/B _31647_/Q _26327_/B _31647_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_101_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_4862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_2988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23678__A _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31141__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27298_ VGND VPWR _27301_/S _32161_/Q _27274_/X _32161_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32267__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16344__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17541__A1 hold261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20140__A3 _20175_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25603__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_1371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17051_ _16971_/A _30382_/Q _17051_/X wire3791/A _29422_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29037_ _29037_/Q _32110_/CLK _29037_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length3761 _21778_/A _17077_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__30709__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26249_ _31613_/Q _26249_/X _26267_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14263_ _31269_/Q _13829_/A _14263_/X _14263_/B2 wire3975/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA_wire2670_A wire2671/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15552__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23614__A1 _31067_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4759 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2768_A hold189/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_4136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length3783 VPWR VGND _23538_/A0 _30029_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_231_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3608_A wire3617/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16002_ VGND VPWR _16002_/X _16120_/S _16807_/B1 _16001_/X _16000_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23828__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28756__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19294__A1 wire1885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17395__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14194_ _14194_/Y _14193_/X _14167_/S hold246/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_234_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20306__S _20327_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19833__A3 _26878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25367__A1 _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26564__B1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17844__A2 _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25367__B2 _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2935_A _20357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14658__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15855__A1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30859__CLK _30866_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23917__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19046__A1 _28193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17953_ VGND VPWR _17983_/S wire3912/X _27890_/Q _27890_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29939_ hold317/A _30900_/CLK _29939_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_286_3511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_3819 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_4150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17057__A0 _17056_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21928__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output436_A wire3367/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3060 VPWR VGND _23421_/A _23417_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22050__A0 _21633_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17615__S _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16904_ wire1010/X wire1482/X _30515_/Q _16904_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26316__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3082 VPWR VGND _17980_/S _17981_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire4051_A wire4052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21645__B _21645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17884_ _24386_/A _17885_/D _17884_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_130_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_3521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15607__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2370 VPWR VGND wire2370/X wire2371/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_212_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27035__D _27035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20600__A1 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21137__S _21137_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19623_ _26218_/A _19622_/Y _19638_/A _28479_/Q _28479_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31901_ VGND VPWR _31901_/D _32571_/CLK _31901_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xwire2381 VPWR VGND wire2381/X wire2382/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16835_ wire3237/A wire1733/X _16835_/X _16835_/B1 _29267_/Q _14544_/D VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 Xfanout1585 VPWR VGND wire1587/A wire1588/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output603_A _28703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1596 VPWR VGND _24888_/C _23825_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_clkbuf_4_4_0_core_clk_A clkbuf_4_5_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14815__C1 _14810_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_21_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15083__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19349__A2 _19341_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24342__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19554_ _19554_/Y _19617_/A _19554_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_169_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31832_ _31832_/Q _31894_/CLK _31832_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1691 VPWR VGND _29845_/D _17286_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16766_ _16765_/X wire903/X _16766_/Y _16760_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_13978_ _28519_/Q _13978_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20976__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22353__A1 _30465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23550__A0 _30041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22757__A _29887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21787__S0 wire3922/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14259__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18954__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18505_ VGND VPWR _18507_/S wire3902/X _28277_/Q _28277_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_91_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21661__A _21661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15717_ _15760_/A1 wire1741/X _15717_/X _15760_/B1 _28771_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_19_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24426__A2_N _24424_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19485_ VGND VPWR _19485_/X _25469_/A _19485_/A _19485_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_31763_ _31763_/Q _31763_/CLK _31763_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_4836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16568__C1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16697_ _16697_/X _16934_/A2 _16696_/X _29093_/Q _16944_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_76_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18446__S _18465_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16032__A1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27292__A1 _32156_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2276_A _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26095__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4071 VGND VPWR VGND VPWR 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VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_160_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22105__A1 _30027_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16583__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15386__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17780__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28286__CLK _30285_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_5313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14594__A1 _32413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_2257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_1113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30645_ _30645_/Q _31836_/CLK hold356/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18367_ VGND VPWR _30484_/Q _30413_/Q _18367_/X _30414_/Q _23269_/C VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_206_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15579_ _15578_/X _15576_/X wire1214/A _15579_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_239_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29531__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23853__B2 _31862_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17318_ wire3580/X _30813_/Q _30830_/Q _17317_/X _17332_/B1 _17318_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XFILLER_15_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold73_A hold73/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19785__B _20654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30576_ hold256/A _32038_/CLK _30576_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_4011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25053__C_N _19959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18298_ _18298_/Y _18316_/A _18298_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_67_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15138__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17532__A1 _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4071 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26252__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_2498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32315_ _32315_/Q _32355_/CLK _32315_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_2213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19277__S _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_3971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17586__A _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1770_A _19089_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23066__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17249_ _30854_/Q _17249_/C _17249_/Y _30919_/Q _29197_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_8_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23605__A1 _31066_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19809__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31634__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23605__B2 _31063_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14897__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27494__S _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20260_ VGND VPWR _20261_/S _28803_/Q _27709_/A1 _28803_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32246_ _32246_/Q _32499_/CLK _32246_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23100__B _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29681__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1080 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23081__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20216__S _20219_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3819 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26004__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_1955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16099__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_288_211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23170__D_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21092__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17296__B1 _17296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17835__A2 _17834_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26555__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32177_ _32177_/Q _32177_/CLK _32177_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20191_ wire877/X _19782_/B _20191_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_252_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_3920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_4042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_1810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_3814 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_4443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14649__A2 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23908__A2 _23905_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23527__S _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19037__A1 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_1952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31128_ _31128_/Q _32528_/CLK _31128_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31784__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_154_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length952_A _16124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21919__A1 hold253/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17048__A0 _30381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27226__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_4329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22041__B1 _22040_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_138_core_clk _31937_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_23950_ _23943_/X _23949_/X _24199_/B1 _30861_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 XANTENNA_wire3151_A _18661_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31059_ _31059_/Q _31689_/CLK _31059_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_282_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25027__B _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_3617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3249_A wire3249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1007_A _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22592__A1 _30357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26858__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21047__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22901_ _22901_/A _22901_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_183_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17063__A3 _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18260__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19025__B _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23881_ _23881_/X _20673_/D _30691_/Q _30755_/Q _19926_/B VGND VPWR _23880_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_2_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31014__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15074__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_4649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25620_ _13753_/Y _25629_/A _25620_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__24333__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22832_ _22809_/C _22830_/X _22835_/B _22870_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_224_4037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29061__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_908 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20886__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14282__B1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22344__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23541__A0 _30032_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_919 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29160__D _29160_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26139__A _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14821__A2 _14648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19745__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23262__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_4914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21571__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25043__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25551_ VGND VPWR _25551_/X _31353_/Q _31335_/Q _31352_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_202_4302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22763_ VPWR VGND _22763_/X _22763_/B _22763_/A VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XANTENNA__28629__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18356__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16023__A1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26047__D_N _26055_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24502_ _24543_/A _24543_/B _24546_/B _24502_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XPHY_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21714_ _14331_/A _21709_/Y _21714_/Y _21712_/X _21687_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_1 XFILLER_107_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28270_ _28270_/Q _30484_/CLK _28270_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25482_ _25482_/Y _25482_/B _31321_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__31164__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27822__A3 _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24097__A1 wire4135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22694_ _29881_/Q _22779_/A1 _22694_/Y _22692_/X _29731_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_263_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20187__A wire881/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16574__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17771__A1 _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17771__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27221_ _32102_/Q _32103_/Q _32101_/Q _25771_/X _27222_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_240_575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14585__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20618__C _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24433_ VGND VPWR _31016_/D _14386_/D _24432_/X _31016_/Q _24437_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_124_3481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21645_ _21645_/X _21645_/A _21645_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_120_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1543_A _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23844__B2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_1978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_3356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length3013 VPWR VGND _18431_/S _18426_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27152_ VGND VPWR _27154_/S wire1792/A _32058_/Q _32058_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_4881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28779__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24364_ _32029_/Q _24370_/A2 _24364_/X _31997_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_33_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21576_ _21576_/Y _21576_/A _22010_/B _22010_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XANTENNA__15129__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_50 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17523__A1 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16326__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_61 _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18720__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3046 _18152_/S _18150_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_33_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26103_ _31546_/D _26020_/Y _14305_/Y _31546_/Q _26120_/A2 VGND VPWR _26102_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21950__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_72 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14337__A1 _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23315_ VGND VPWR wire820/A _30293_/Q _17063_/X _30293_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_83 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17496__A _31614_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25597__A1 hold104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14337__B2 _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20527_ VGND VPWR _20548_/S _29044_/Q _27143_/A1 _29044_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_4718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15534__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27083_ VGND VPWR _32019_/D wire772/X _27082_/X _26801_/B _27007_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire3952_A _14092_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18091__S _18119_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_94 _14596_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1710_A _23376_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24295_ hold177/A _24273_/D hold176/X _24284_/X _31674_/Q wire1351/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__25597__B2 hold101/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21870__A3 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32604__A _32604_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26034_ _26034_/X _26047_/C wire2425/X _26120_/A2 _14399_/B _26031_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_23246_ VGND VPWR _23248_/S _29494_/Q _30229_/Q _30229_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_273_1000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22804__C1 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20458_ VGND VPWR _20458_/S _28977_/Q _27140_/A1 _28977_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_136_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23072__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28009__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19815__A3 wire2206/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25802__A_N _32540_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_3886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21083__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22280__A0 _30405_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25349__A1 _25347_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_3728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17826__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23177_ hold265/A _23192_/A2 _23177_/X _30113_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_248_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2084_A wire2085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20389_ VGND VPWR _20391_/S wire2012/X _28911_/Q _28911_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input167_A la_input[95] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15837__A1 wire1043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26010__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26321__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22128_ VGND VPWR _30030_/Q _22126_/X _22127_/X _22128_/X _21032_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__24021__A1 wire4072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27985_ _27985_/Q _30225_/CLK _27985_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_1805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24021__B2 _31168_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15301__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17039__A0 _17038_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19861__D _19861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19579__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22032__B1 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29724_ _29724_/Q _32075_/CLK _29724_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_251_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14950_ VGND VPWR _15516_/S _29015_/Q _28983_/Q _14950_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2251_A _19530_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28159__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26936_ _31960_/Q _26936_/A2 _31960_/D wire2709/X _26936_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_265_4830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22059_ _21634_/X _21946_/A _22058_/X wire3146/X _22059_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__21465__B _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18787__A0 _18782_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2349_A wire2350/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22583__A1 hold138/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20043__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24309__C1 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29404__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23780__B1 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13901_ _28596_/Q _13901_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_60_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29655_ _29655_/Q _32419_/CLK _29655_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18251__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14881_ _14881_/X _14887_/A2 wire1104/X _28877_/Q wire1508/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 X_26867_ _25512_/A _26866_/Y wire752/X _31883_/Q _31883_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_265_4885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_2678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25116__A4 _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15065__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16262__A1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16620_ VGND VPWR _16918_/S _28426_/Q _29091_/Q _16620_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_5_1573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28606_ _28606_/Q _32014_/CLK _28606_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_166_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24324__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25521__A1 wire2952/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13832_ _13832_/Y _14459_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XFILLER_109_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25818_ VGND VPWR _27854_/C _31434_/Q _30150_/Q _25818_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_161_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16801__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3734 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29586_ _29586_/Q _32379_/CLK _29586_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26694__D _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20796__S _20796_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26798_ _27003_/B1 _26797_/X _26833_/A _31849_/Q _31849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22335__A1 hold411/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18539__B1 wire3171/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31507__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14812__A2 _14884_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3652_A _21413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16551_ _16551_/X _16548_/X _16784_/A3 wire1038/A _16550_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_28537_ _28537_/Q _31470_/CLK _28537_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_199_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_3485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25749_ _14068_/Y _31413_/D _25567_/B _25635_/A _31413_/Q _31411_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_2 X_13763_ _31183_/Q _13763_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14794__S _14794_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3460_A _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22886__A2 wire1866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29554__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_7 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_5169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_4380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17170__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15502_ _15500_/C _15561_/C1 _29577_/Q _15500_/A _15502_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_246_2893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19751__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19270_ _19270_/X _27979_/Q _19268_/S wire1993/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_125_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16482_ _16956_/A2 _16956_/A1 _28759_/Q _16482_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24088__A1 _30587_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28468_ VGND VPWR _28468_/D _32553_/CLK _28468_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_164_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24088__B2 _30523_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16565__A2 wire944/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17762__A1 _31645_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25285__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17762__B2 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18221_ _18221_/B _18221_/Y _18278_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_142_3570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22099__B1 _22123_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15433_ _14545_/B _16646_/A2 _15433_/X _15638_/A2 _29060_/Q _18661_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_27419_ VGND VPWR _27421_/S _32266_/Q _27276_/X _32266_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15773__B1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22638__A2 _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30531__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14095__A _14095_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28399_ VGND VPWR _28399_/D _30051_/CLK _28399_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__31657__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23835__B2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_4689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20649__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30430_ VGND VPWR _30430_/D _30430_/CLK _30430_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18152_ VGND VPWR _18152_/S _18499_/A1 _28080_/Q _28080_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15364_ wire1083/X _15360_/X _15363_/X _15509_/A1 _15364_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_272_4823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16317__A2 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27577__A2 _27597_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18711__B1 wire1931/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output386_A _13919_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17103_ _17220_/C _21641_/A _17103_/Y _14092_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XPHY_1282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14315_ _21777_/B _17077_/A _21778_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_86_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23048__C1 _18540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15525__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30361_ _30361_/Q _31912_/CLK _30361_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18083_ VGND VPWR _18083_/S wire3822/X _28013_/Q _28013_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20171__C_N _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15295_ VGND VPWR _15295_/X _15294_/X _15293_/X _15630_/A1 _15307_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16514__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16722__C1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_4878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_2391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32100_ _32100_/Q _32225_/CLK _32100_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14879__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17034_ VGND VPWR _17034_/X _22449_/A _17032_/X _29992_/Q _17033_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_84_3251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_4277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold309 hold309/A hold309/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__24796__C1 _24820_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14246_ _14245_/B _14263_/B2 _31281_/Q _29511_/Q _14246_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XANTENNA__30681__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30292_ _30292_/Q _30445_/CLK _30292_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23063__A2 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output553_A _28722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14542__B _14545_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3855 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21074__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32031_ _32031_/Q _32293_/CLK _32031_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22271__B1 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14177_ _14177_/A _14177_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XANTENNA__23855__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22810__A2 _22733_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_4475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15828__A1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26001__A2 _14189_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20821__A1 _29334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18949__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19019__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24012__A1 _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_18_1_core_clk clkbuf_opt_18_1_core_clk/X clkbuf_opt_18_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22251__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18985_ _18985_/X _27966_/Q _19151_/S _19203_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_234_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14500__A1 _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18668__C _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_231_core_clk _32580_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_17936_ VGND VPWR _17949_/S _18644_/A1 _27874_/Q _27874_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1351_A wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5052 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24389__D _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29084__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1449_A _15775_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26343__B1_N wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22574__A1 wire3701/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18778__B1 _20870_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25562__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2585_A _22181_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17867_ _17820_/X _17777_/B _17866_/X _17867_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_227_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1382 wire1387/X _20061_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_239_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16789__C1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1393 wire1397/X _26949_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_184_3648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19606_ _26815_/B _26949_/A _19606_/X _19849_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_149_3779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24315__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16818_ _16818_/X _32368_/Q _16818_/A2 _16841_/B2 _16841_/C1 _16817_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19990__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30061__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31187__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14264__B1 _14263_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22326__A1 _18535_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17798_ VGND VPWR _17797_/X _17774_/X _17832_/S _17798_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__23523__A0 _30448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22326__B2 wire3160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14803__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2752_A _24441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32432__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_2398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_3361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31815_ _31815_/Q _31815_/CLK _31815_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19537_ _27077_/C1 _19536_/Y _19598_/A _28455_/Q _28455_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_241_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16749_ _16749_/X _29578_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16748_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_71_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_1213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_3093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_3547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_22_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17080__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31015__D _31015_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17202__B1 _29441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_1809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13902__A _28595_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19742__A2 _19570_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27489__S _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31746_ VGND VPWR _31746_/D _31746_/CLK _31746_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19468_ VGND VPWR _19461_/X _28449_/Q _28450_/Q _19468_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__24079__A1 _28504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17753__A1 _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25276__B1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28921__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18950__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18419_ VGND VPWR _18431_/S _28194_/Q _23287_/A1 _28194_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14567__A1 _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_895 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15764__B1 wire1064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31677_ _31677_/Q _32024_/CLK _31677_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19399_ VGND VPWR _19419_/S _27245_/A0 _28415_/Q _28415_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18904__S _19088_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32582__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_290_4901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14436__C _21661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25291__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21430_ _21430_/Y _30345_/Q _21551_/B _14114_/Y _21427_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XANTENNA__21837__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30628_ hold291/A _31563_/CLK _30628_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_191_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_2371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25310__B _31264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15516__A0 _30796_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25579__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21361_ VGND VPWR _14422_/Y _14420_/Y _21444_/A _21361_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_219_2704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30559_ _30559_/Q _31803_/CLK hold127/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16424__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3199_A _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23100_ _30433_/Q _23100_/X _23190_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_20312_ VGND VPWR _20321_/S _24227_/A0 _28853_/Q _28853_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19258__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24080_ _24080_/X _24078_/X _28536_/Q _24163_/B2 _19718_/B VGND VPWR wire809/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 Xinput70 VPWR VGND la_input[122] input70/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_176_2464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21292_ _29905_/Q _16992_/X _21966_/A _22935_/A _21611_/C _21953_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_63_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23054__A2 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24251__A1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput81 VPWR VGND la_input[17] input81/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_239_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15531__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput92 VGND VPWR input92/X la_input[27] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_271_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21065__A1 _31964_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17269__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23031_ VGND VPWR _25733_/C _30153_/Q _23030_/X _30153_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20243_ VGND VPWR _20258_/S _28786_/Q _27247_/A0 _28786_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_288_5564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22262__B1 _23415_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32229_ _32229_/Q _32538_/CLK _32229_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_319_core_clk _30254_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_150_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17808__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3807 VPWR VGND _22838_/A _29895_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout1124_A wire1134/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3818 VPWR VGND wire3818/X _29870_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26141__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3829 VPWR VGND _18223_/B wire3831/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__29427__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15819__B2 _15818_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23257__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20174_ _25567_/B _20173_/X _20192_/A2 _28731_/Q _28731_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_189_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17284__A3 wire3099/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25200__B1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_4273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22014__B1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_2768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27770_ VGND VPWR _27774_/S _25029_/B _32496_/Q _32496_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21285__B _21285_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24982_ _25081_/A wire1283/A _24982_/X _25047_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_2_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21368__A2 _21366_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18769__B1 _18768_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30404__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_61_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20025__C1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21999__S0 wire3922/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26721_ _23755_/D _26999_/A _26720_/Y _31813_/D _26720_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__23781__A _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23933_ _23933_/X _23931_/X _13975_/A _24163_/B2 _19718_/B VGND VPWR _23932_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_245_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19430__A1 _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28451__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15047__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29577__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout849_A wire852/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24596__B _24597_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17441__B1 _17441_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23109__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29440_ _29440_/Q _30387_/CLK _29440_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3700_A _30341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_4894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19981__A2 _24945_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26652_ VGND VPWR _26652_/B _26652_/Y _31787_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_273_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23864_ _30849_/D _24310_/B _23864_/A _24888_/C _26837_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_208_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold162_A hold162/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22317__A1 _29903_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22397__A _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16795__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17992__A1 wire3896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_705 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_716 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25603_ _25603_/X _25582_/X hold119/A hold97/A _24493_/X VGND VPWR _25602_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_161_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22815_ _22831_/C _22825_/A _22815_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_199_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29371_ _29371_/Q _30250_/CLK _29371_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_727 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26583_ _31770_/Q _26583_/X _23745_/X _26616_/B2 wire3461/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA_738 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22868__A2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18086__S _18086_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23795_ _30826_/D _23813_/C _23795_/A _23807_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__30554__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_2009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_749 _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19194__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1758_A _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28322_ _28322_/Q _30406_/CLK _28322_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20879__A1 _20878_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19733__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13812__A _31134_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25534_ _31346_/Q _25533_/Y _31346_/D _25539_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_241_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27399__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22746_ _22733_/A _22747_/C _22746_/X _23095_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_16_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16547__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17744__B2 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18941__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_35_core_clk _32545_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_281_1379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14558__A1 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28253_ _28253_/Q _30449_/CLK _28253_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_4233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_82 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25465_ _19481_/A _25454_/A _31312_/D _25464_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_22677_ _22677_/B _22678_/B _29729_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_65_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27008__A1 _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_2048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27204_ _32095_/Q _27206_/C _27204_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_33_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24416_ VGND VPWR _24420_/D _31009_/Q _24415_/Y _31009_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_191_5533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21628_ _21628_/X _21628_/C _21628_/A _21674_/B _21628_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 X_28184_ _28184_/Q _30484_/CLK _28184_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25396_ _31282_/D _25395_/X _26238_/A _25394_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22096__A3 _22095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24490__A1 _25197_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21240__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27135_ VGND VPWR _27135_/C _21173_/B _27135_/X _27485_/D _27485_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_219_4662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15507__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24347_ hold239/X _24357_/B1 wire1668/X _24353_/A1 _30976_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26767__B1 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21559_ _21559_/Y _21559_/A _21559_/C _21559_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_237_3549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2299_A _32598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20364__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14100_ _29381_/Q _14100_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_120_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26231__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15080_ _15079_/X _15561_/C1 _15723_/A2 _30900_/Q _15080_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27066_ _27066_/X _27122_/B _32011_/Q _27076_/A _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_4_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23045__A2 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24278_ VGND VPWR _24278_/X _31687_/Q _24281_/A _24281_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_194_2564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_4898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22860__A _29897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15522__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25874__C _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2175 VPWR VGND _24933_/B _19601_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21056__A1 _30049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14031_ _28466_/Q _14031_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26017_ _26017_/A _26017_/B _26017_/C _26139_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_85_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22253__B1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23229_ VGND VPWR _23226_/S _20982_/B _20839_/Y _23229_/X _30220_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__14730__A1 _28873_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26519__B1 _17504_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32305__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23675__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_1595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26051__B _26055_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_4010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_5326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27192__B1 hold396/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_76_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16483__A1 _29321_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26986__B _31977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17680__B1 _23611_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16483__B2 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18770_ _18770_/X _19216_/D1 _27860_/Q _19368_/B1 _19218_/A2 _18770_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA_wire2633_A wire2634/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_218_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15982_ _15982_/X _28978_/Q _16434_/A2 _16722_/B2 _15975_/S _15981_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__30084__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27968_ _27968_/Q _30758_/CLK _27968_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_150_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_5372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17721_ _17488_/B _17721_/X _17863_/C _17720_/X _17488_/A _17863_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_29707_ _29707_/Q _30430_/CLK _29707_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23691__A _23691_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32455__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24950__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3867_A wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14933_ _14546_/A wire1732/X _14933_/X _14933_/B1 _32350_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__18224__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26919_ _31943_/Q _26907_/Y _31943_/D wire2342/X _26764_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_92_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27899_ _27899_/Q _30276_/CLK _27899_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15038__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27495__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20031__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17432__B1 input194/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19972__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17652_ _17565_/C _17662_/A _17651_/Y _17652_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29638_ _29638_/Q _32277_/CLK _29638_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14864_ _15621_/A2 _14864_/X _14863_/X _15630_/A1 _29215_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14246__B1 _29511_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23505__A0 _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22308__A1 _29894_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16786__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17983__A1 _18532_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28944__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19709__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16603_ wire1552/X _16943_/A1 _29638_/Q _16603_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_79_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_369_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13815_ _31131_/Q _13815_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_144_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14797__A1 _29043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17583_ _17764_/B _17582_/Y _17583_/Y _17561_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_29569_ _29569_/Q _32114_/CLK _29569_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_3233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14795_ VGND VPWR _14795_/X _14794_/X _14795_/B1 _15235_/A1 _14793_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19185__A0 _27943_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_3807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31600_ _31600_/Q _32280_/CLK _31600_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19322_ _28369_/Q _19377_/B _19278_/S _19322_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_16534_ VGND VPWR _16918_/S _29025_/Q _28993_/Q _16534_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_1_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_1916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13746_ _30759_/Q _24876_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_32580_ _32580_/Q _32580_/CLK hold303/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_109_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4014_A _28717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17735__A1 _31725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16538__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_2592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17735__B2 _31724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14537__B _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_4839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_3862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14549__A1 _14101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15746__A0 _28836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31531_ _31531_/Q _31754_/CLK _31531_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_51_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19253_ _19253_/X _19250_/X wire1914/X _19252_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_53_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_3990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16465_ _16465_/X _30789_/Q _16934_/A2 _16960_/B2 _16949_/A1 _16464_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23808__A1 _31847_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23808__B2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_106_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15210__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18204_ _18204_/X _18157_/Y _18201_/X _18203_/X _18202_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_255_4317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_20_0_core_clk clkbuf_opt_20_1_core_clk/A clkbuf_5_21_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_15416_ VGND VPWR _15702_/S _32323_/Q _28931_/Q _15416_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31462_ VGND VPWR _31462_/D _31462_/CLK _31462_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19184_ _19184_/X _28071_/Q _19151_/S _19201_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_275_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16396_ _16965_/A2 _16952_/A1 _28789_/Q _16396_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_output670_A wire2332/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21150__S _21151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18135_ VGND VPWR _18143_/S wire3864/A _28063_/Q _28063_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30413_ VGND VPWR _30413_/D _30415_/CLK _30413_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_138_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15347_ _15342_/X _15338_/X wire1085/X _15346_/X _15347_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_170_5628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31393_ _31393_/Q _32464_/CLK _31393_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_177_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21834__A3 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18160__A1 wire3884/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_2694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18160__B2 wire3859/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28324__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25557__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18066_ VGND VPWR _18079_/S wire3873/X _27996_/Q _27996_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30344_ _30344_/Q _32423_/CLK _30344_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_158_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold106 hold106/A hold106/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_211_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15278_ VGND VPWR _15627_/S _29603_/Q _29635_/Q _15278_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_leaf_257_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold117 la_input[3] hold117/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_155_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25784__C _31417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26242__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14272__B _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16710__A2 wire894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2500_A _20809_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold128 hold128/A hold128/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21047__A1 _30042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22244__A0 _30400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17017_ _29723_/Q _14334_/B _17017_/X _29878_/Q _21459_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 Xhold139 hold139/A hold139/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14721__A1 _14648_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14229_ _13829_/A _17881_/D _14228_/X _31271_/Q _14263_/B2 hold374/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_47_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25981__A1 _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30275_ _30275_/Q _30276_/CLK _30275_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_1646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30427__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18999__B1 _18998_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_4946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32014_ _32014_/Q _32014_/CLK _32014_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23992__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27772__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold36_A hk_dat_i[30] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27183__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14699__S _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28474__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16474__A1 wire3285/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26896__B _26896_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_5521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1733_A wire1733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26930__B1 _26935_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18968_ _18964_/X _18967_/X _19156_/S _18966_/X _18968_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_188_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22547__A1 _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20007__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2712 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19948__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire817_A wire817/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17919_ VGND VPWR _17946_/S wire3917/X _27857_/Q _27857_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19412__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30849__D _30849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18899_ _28282_/Q _18899_/X _19087_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__30577__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15029__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24252__A_N _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27486__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26289__A2 _14185_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1190 wire1199/A _15638_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20022__A2 _14176_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16226__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1900_A wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19963__A2 _24927_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18766__A3 _18761_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20930_ VGND VPWR _20930_/S _29395_/Q _29498_/Q _29395_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31822__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14237__B1 _29514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17974__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_145_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27581__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21770__A2 _21651_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length4083_A _28654_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14788__A1 _29213_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20861_ VGND VPWR _23519_/S _20860_/X _29359_/Q _29359_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15985__B1 wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16419__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19176__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27238__A1 _32113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22600_ _22600_/X _22578_/S _22594_/S wire3708/X _30360_/Q VGND VPWR _22599_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_228_1141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23580_ VGND VPWR _23588_/S _27694_/A1 _30500_/Q _30500_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_30_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_3727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20792_ VGND VPWR _20796_/S _29305_/Q wire2012/X _29305_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_282_1666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16529__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17726__A1 _31721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25249__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_1174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18923__B1 wire1896/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23540__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31972__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22531_ VGND VPWR _22550_/S _29820_/Q _30031_/Q _30031_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_104_2403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15737__B1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31729_ _31729_/Q _31738_/CLK _31729_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30584__D _30584_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26997__B1 _31983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18634__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_296_core_clk_A clkbuf_opt_21_3_core_clk/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15201__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25250_ _26238_/A _25249_/X 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VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__26749__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31202__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16154__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22393_ VGND VPWR _22610_/S _29952_/Q wire831/X _29952_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32328__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21825__A3 hold465/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18151__A1 wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26213__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2802 VGND VPWR VGND VPWR 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XFILLER_271_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21038__A1 _29500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28817__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14712__A1 _14816_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22235__B1 _21051_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28940_ _28940_/Q _32427_/CLK _28940_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3650_A hold483/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24063_ _20126_/A _24062_/X _28726_/Q _19993_/X _24063_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xclkbuf_leaf_153_core_clk _32424_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_21275_ _21274_/X _22552_/B _20837_/S _21746_/S _29736_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_134_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32304__D _32304_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19692__C _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20912__B _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2808 VPWR VGND _27149_/S wire2811/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_154_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23014_ VGND VPWR _31396_/Q _23013_/X _23010_/X _23014_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2819 _25416_/A _25380_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23983__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27682__S _27683_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20226_ VGND VPWR _20227_/S _28771_/Q _27709_/A1 _28771_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31352__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21296__A _21633_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3626 VPWR VGND _30755_/D hold275/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__32478__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20797__A0 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28871_ _28871_/Q _32547_/CLK _28871_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17257__A3 _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3637 VPWR VGND wire3637/X _30715_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20404__S _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_5608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2903 VPWR VGND _20556_/S _20562_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3648 VPWR VGND _30519_/D _30520_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout966_A wire970/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15268__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3659 VPWR VGND _21320_/A hold494/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_clkbuf_leaf_184_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27822_ _27823_/B _32534_/Q _32535_/Q _32533_/Q _25799_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__13807__A _31139_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20157_ VGND VPWR _14174_/A _19566_/A _20192_/A2 _20157_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_269_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3915_A wire3916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26921__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_3367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17468__A_N _26441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2947 VPWR VGND _20284_/S _20290_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22538__A1 _29827_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold377_A hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28967__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24932__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20549__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27753_ VGND VPWR _27756_/S _19937_/B _32481_/Q _32481_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19403__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24965_ _31126_/D _25029_/B _24964_/X _25041_/A _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_20088_ VGND VPWR _14177_/A _19555_/A _20106_/A _20088_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__16217__A1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20013__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17414__B1 wire2077/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_32_0_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26704_ hold197/A hold196/X _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_189_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19954__A2 _19988_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18757__A3 _18756_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23916_ wire742/A _25022_/B wire4097/X _13788_/A _19995_/B VGND VPWR _23915_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_27684_ VGND VPWR _27696_/S _27684_/A1 _32418_/Q _32418_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2047_A wire2047/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24896_ _25652_/A _24895_/Y _24941_/A _31092_/Q _31092_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_148_3064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17965__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16768__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21761__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21235__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_502 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29423_ _29423_/Q _30217_/CLK _29423_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_2915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26635_ _31782_/Q _23759_/A _31781_/Q _26619_/A _31783_/Q _26635_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA_513 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23847_ _23847_/X _24317_/A _31860_/Q _26772_/A _31892_/Q _24317_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_92_2126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21462__C _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_524 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27991__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16329__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19167__B1 _19166_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_535 _30570_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_546 _30592_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24160__B1 wire1248/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27229__B2 _27423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29354_ _29354_/Q _30217_/CLK _29354_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_557 input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14580_ wire3249/X wire1727/X _14580_/X _14705_/B1 _28869_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_26566_ wire3454/X _31765_/D _26564_/X _26859_/C1 _31870_/Q _26565_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_568 input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23778_ VGND VPWR _23879_/A _23876_/B _20657_/C _23778_/X _24069_/A2 _24273_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_261_1717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_579 input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18914__B1 _18913_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17717__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25869__C _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_5606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26327__A _26896_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_2983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28305_ _28305_/Q _30428_/CLK _28305_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_5327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25517_ VGND VPWR _19429_/D _31338_/Q _25524_/C _25517_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_221_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20721__A0 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23451__A2_N _29367_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22729_ _22729_/A _22728_/Y _22729_/X _22729_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29285_ _29285_/Q _32067_/CLK _29285_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26497_ _26476_/S _31706_/D _26496_/X _31706_/Q _26491_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_35_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18390__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3256_A wire3261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26452__A2 _26441_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmgmt_core_wrapper_4218 mgmt_core_wrapper_4218/LO flash_io2_oeb VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 XANTENNA__26046__B _31532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28347__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16250_ VGND VPWR _16826_/S _32054_/Q _29113_/Q _16250_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28236_ _28236_/Q _29389_/CLK _28236_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24999__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25448_ _25448_/Y _25448_/A _25507_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA_input95_A la_input[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24463__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14400__B1 _14367_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16940__A2 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15201_ _16417_/A2 wire3298/X _29569_/Q _15201_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_219_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21277__A1 _29737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18678__C1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16181_ VGND VPWR _16566_/S _29313_/Q _28751_/Q _16181_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14951__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28167_ _28167_/Q _29550_/CLK _28167_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_174_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16064__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25379_ VPWR VGND _25379_/X _31279_/Q _25379_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__14373__A _31002_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21816__A3 _17060_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_1914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18142__A1 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3423_A wire3429/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20094__B _26015_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27401__A1 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_1072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_2661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_2954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15132_ VGND VPWR _15132_/X _15131_/X _15611_/A1 _15610_/B1 _15130_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27118_ VGND VPWR _27118_/X _24779_/X _31523_/Q _31048_/Q _31049_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_259_1657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_3038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24215__A1 _30891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28098_ _28098_/Q _32063_/CLK _28098_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18693__A2 _29812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19890__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26062__A _31534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28497__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21029__A1 wire3782/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14703__A1 _28912_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22226__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19940_ _25776_/C _19939_/X _19968_/A2 _28618_/Q _28618_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_15063_ VGND VPWR _15063_/X _15515_/C1 _15640_/C1 _15062_/X _15061_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_190_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27049_ VGND VPWR _27051_/B _32003_/Q _32001_/Q _32002_/Q _27050_/D VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_152_3923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24766__A2 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25963__A1 _19648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29742__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_3693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20822__B _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14014_ _14014_/Y _28483_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__23974__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30060_ hold246/A _32287_/CLK _30060_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19871_ _19870_/X _28585_/Q _28585_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__20314__S _20321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3792_A _29945_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25109__C _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold6_A hold6/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17653__B1 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18822_ VGND VPWR _19278_/S _18821_/X _18820_/X _18822_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31845__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18850__C1 wire1563/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14467__B1 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22529__A1 _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29892__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18753_ _18753_/X wire2270/A _28115_/Q wire2281/A wire2582/A _19368_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA_clkbuf_opt_26_2_core_clk_A clkbuf_opt_26_2_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA__25191__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15965_ VGND VPWR wire970/X _32417_/Q _32345_/Q _15965_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_185_4477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_2250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21737__C1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output516_A wire4022/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24310__A _31194_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23852__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16208__A1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_1986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27468__A1 _32292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20004__A2 wire2641/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17704_ _31640_/Q _17704_/X _17875_/B _17475_/X _17881_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_128_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19945__A2 _19559_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14916_ _15597_/A2 _14916_/X _14915_/X wire1104/A _28950_/Q wire1506/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_79_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18684_ _30331_/Q _29812_/Q _18684_/Y _29811_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_111_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30962_ _30962_/Q _32039_/CLK _30962_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_3776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15896_ wire999/X _16091_/C _29521_/Q _15896_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25479__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16759__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17956__A1 wire3902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_5088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27563__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21145__S _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31995__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26140__A1 wire2231/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17635_ _17635_/X _24459_/B _17474_/C _17473_/X _17457_/B VGND VPWR _14067_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_144_4152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14847_ VGND VPWR _14847_/X _15628_/B1 _15307_/C1 _14844_/X _14846_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_248_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15967__B1 wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21372__C _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30893_ _30893_/Q _32403_/CLK _30893_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29122__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24151__B1 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15431__A2 _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26691__A2 _14216_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1314_A wire1314/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17566_ _31710_/Q _17539_/B _17566_/X hold261/A _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_140_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27340__B _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_5563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14778_ _15228_/A2 _14777_/X _32418_/Q _15228_/A3 _14778_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_264_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18905__A0 _28218_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17708__A1 _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22701__A1 _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15982__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2450_A _24223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23360__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19305_ _19301_/X _19304_/X wire1912/A _19303_/X _19305_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_16517_ VGND VPWR _16517_/X _16514_/X _16516_/X _16068_/S wire1048/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20712__A0 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15719__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_7_2_core_clk clkbuf_opt_7_3_core_clk/A clkbuf_opt_7_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_32563_ hold437/A _32577_/CLK _32563_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_90_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31225__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17497_ _31614_/Q _17502_/B _17501_/D _26464_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_70_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18454__S _18456_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18381__A1 wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4084 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17184__A2 _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_2160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27640__A1 _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26443__A2 _26446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25100__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31514_ _31514_/Q _31801_/CLK _31514_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19236_ _19298_/A2 _28010_/Q _19367_/B1 _19236_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_3031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27767__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16448_ _16448_/X _28758_/Q _16448_/A2 _16448_/A3 _16120_/S _16447_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__29272__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_105_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32494_ _32494_/Q _32523_/CLK _32494_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_4415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24980__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21268__A1 _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31445_ _31445_/Q _31460_/CLK _31445_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19167_ _19189_/A2 _28393_/Q _19166_/X _28393_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_51_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16379_ _16815_/A2 _16379_/X _16378_/X _16843_/A2 _29534_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14942__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18133__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2523_A wire2530/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18118_ VGND VPWR _18118_/S wire3814/X _28047_/Q _28047_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_195_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31375__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16144__B1 _30896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27068__A _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24206__A1 _28740_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19098_ _19178_/B _28035_/Q _19097_/X _19098_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19793__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31376_ _31376_/Q _32297_/CLK _31376_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_157_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18684__A2 _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24206__B2 _13792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22480__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput701 wire3517/X user_irq_ena[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_177_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22217__B1 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30327_ _30327_/Q _31921_/CLK hold346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18049_ VGND VPWR _18049_/S _18239_/B _27981_/Q _27981_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_82_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25954__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16702__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1948_A wire1948/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_4039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27864__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23965__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21060_ _32079_/Q _32077_/Q _21062_/D _32076_/Q _32078_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XANTENNA__14170__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30258_ VGND VPWR _30258_/D _30258_/CLK _30258_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19633__A1 _28482_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20224__S _20225_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2892_A wire2901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16447__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20011_ _26224_/A _20010_/Y wire851/X _28652_/Q _28652_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_42_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1014_A _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25706__A1 _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30189_ _30189_/Q _30453_/CLK _30189_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_99_3559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16998__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21991__A2 _21672_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23535__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24914__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_3_2_1_core_clk clkbuf_3_2_2_core_clk/A clkbuf_3_2_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_146_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18629__S _18631_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27459__A1 _32286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19936__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24750_ VGND VPWR _24770_/A _31467_/Q _24657_/B _24751_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_149_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21962_ hold235/A _22074_/B1 _29796_/D _21961_/Y _21960_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__25035__B _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_5297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17947__A1 wire3822/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_164_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22940__A1 _30452_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26667__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32000__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21055__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23701_ VGND VPWR _23879_/C _24273_/C _20673_/B _23701_/X _23700_/X _31500_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_58_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20913_ _23228_/S _29385_/Q _20912_/X _29385_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26131__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24681_ VPWR VGND _24681_/X _31450_/Q _24682_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_3_1874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21893_ VGND VPWR _21812_/B _21654_/X _21655_/X _21893_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_123_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14458__A hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1191_A wire1199/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24142__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_3660 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26420_ _26420_/D _26420_/C _26420_/Y _31693_/Q _31692_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__26682__A2 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23632_ _23628_/X _24475_/C _23631_/Y _30769_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_36_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_4247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20844_ _20848_/B _20848_/A _21339_/C _20844_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_270_776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20894__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29615__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23270__S _23296_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_3925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_5013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25051__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26351_ _27003_/B1 _26350_/X wire781/X _31663_/Q _31663_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20703__A0 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23563_ VGND VPWR _23563_/X _23563_/B _23563_/A _23563_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_10_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20775_ VGND VPWR _20788_/S _27697_/A1 _29289_/Q _29289_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18364__S _18364_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32150__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18372__A1 wire3899/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17175__A2 _21616_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1456_A wire1459/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3800 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_1469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25302_ _31262_/Q _31264_/Q _25341_/A _25303_/D _25305_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27631__A1 _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22514_ _30411_/Q _23354_/C _30018_/D _23201_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_29070_ _29070_/Q _32395_/CLK _29070_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15186__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27677__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26282_ _26281_/Y _26184_/A _31629_/Q _26301_/B _31629_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17488__B _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23494_ VGND VPWR _23518_/S _23493_/X _31951_/Q _30433_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire806 VPWR VGND wire806/X wire806/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_238_4345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_1723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31718__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire817 VPWR VGND wire817/X wire817/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28021_ _28021_/Q _30428_/CLK _28021_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21259__A1 _29721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire828 VPWR VGND wire828/X wire828/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_197_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25233_ _25233_/X _25263_/B1 _29857_/D _31233_/Q _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_175_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22445_ _22444_/X _23354_/C _22445_/X _22445_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__14933__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_334_core_clk _30390_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_88_3975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29765__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18124__A1 wire3903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1623_A _19787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25164_ _25408_/B _25163_/X _25186_/C _24576_/B _24493_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XANTENNA__16135__B1 _28782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22376_ _22384_/B _22376_/Y _22376_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__19872__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17372__D_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24115_ _24115_/X _24207_/B1 _28539_/Q _28699_/Q _19715_/C VGND VPWR _24114_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_5_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22208__B1 _21045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4102 VPWR VGND wire4102/X wire4103/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21327_ _21462_/B _21651_/B _21427_/B _29730_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_4 XFILLER_134_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25945__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30742__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4113 VPWR VGND wire4113/X _28573_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_156_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25095_ _25087_/X _31190_/D _26539_/B _25094_/Y wire1371/X wire2253/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 X_29972_ _29972_/Q _31998_/CLK _29972_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3317 VPWR VGND _25718_/A wire3320/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31868__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold494_A hold494/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4124 VPWR VGND wire4124/X _28559_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3328 wire3331/A _26694_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22759__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16150__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4135 VPWR VGND wire4135/X _28474_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_43_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3339 _27059_/C1 wire3345/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__22759__B2 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3401 VPWR VGND wire3401/X _32333_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire4146 VPWR VGND _15765_/A _28394_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_115_3030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_2518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_1991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28923_ _28923_/Q _32355_/CLK _28923_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24046_ _28501_/Q _24046_/B1 _24045_/X _28597_/Q _24046_/X _24069_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_169_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19085__C1 _19085_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3412 VPWR VGND wire3412/X wire3412/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21258_ VGND VPWR _23228_/S _29720_/Q _30436_/Q _29720_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_156_2698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26032__D _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4157 VPWR VGND _19357_/A _28143_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold470 hold470/A hold470/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_8_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4168 VPWR VGND _14397_/D hold70/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_47_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold481 hold481/A hold481/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout1992_A _18678_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4179 VPWR VGND wire4179/X hold86/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3434 wire3435/X wire3434/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_3517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold492 hold492/A hold492/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire3445 VPWR VGND _26902_/B wire3446/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2700 VPWR VGND wire2700/X wire2701/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27698__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_5006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20209_ VGND VPWR _20209_/S _28754_/Q _27692_/A1 _28754_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17635__B1 _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3456 VPWR VGND wire3456/X hold491/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2711 VPWR VGND wire2711/X _14161_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28854_ _28854_/Q _32134_/CLK _28854_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2722 VPWR VGND wire2722/X _14156_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23971__A3 _23970_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2164_A _19764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3467 VPWR VGND _24648_/B _31465_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_191_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1926 _19367_/B1 wire1931/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_21189_ VGND VPWR _21194_/S _29631_/Q _27614_/A1 _29631_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14449__B1 _29453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2575 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2733 VPWR VGND wire2733/X _14153_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_277_364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1937 _22088_/B1 wire1939/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xfanout950 wire963/A _16124_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23708__B1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2744 VPWR VGND wire2744/X wire2744/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3489 VPWR VGND wire3489/X _31266_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21982__A2 _21713_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18319__A2_N _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30892__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27805_ _32526_/Q _32525_/Q _32527_/Q _27806_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire2755 VPWR VGND _19860_/C _14141_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1959 VPWR VGND _19306_/B _19311_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26370__A1 wire1351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout972 wire981/A _16566_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_38_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28785_ _28785_/Q _32320_/CLK _28785_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19388__A0 _28404_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21719__C1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout983 VPWR VGND wire985/A wire989/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_150_2286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29145__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25997_ VGND VPWR _14195_/A _19551_/A _26015_/A _25997_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_265_548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout994 _15772_/X wire996/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_76_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_4136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2331_A _14207_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15750_ VGND VPWR _15750_/S _32073_/Q _29132_/Q _15750_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27736_ VGND VPWR _27737_/S wire2222/A _32467_/Q _32467_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21195__A0 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24920__A2 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24948_ _25676_/B1 _24947_/Y _24947_/A _31118_/Q _31118_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_227_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2429_A wire2430/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17938__A1 wire3847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_3697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22931__A1 _30115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18060__A0 _27990_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14701_ _14700_/X _14822_/B1 _14882_/A2 _29306_/Q _14701_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_50_core_clk _32160_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_128_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26122__A1 _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20942__A0 _29510_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30122__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15949__B1 _16041_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15681_ _15721_/A2 _15681_/X _15680_/X _15692_/S _29332_/Q wire1515/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_27667_ VGND VPWR _27667_/S _27737_/A1 _32404_/Q _32404_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_4_9_0_core_clk_A clkbuf_4_9_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16059__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31248__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_310 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24879_ wire868/A _31086_/Q _24879_/Y _24480_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_141_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_321 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3373_A _14133_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16610__A1 _16609_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15413__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17420_ wire2075/X _17272_/A _17420_/X _31928_/Q wire3561/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA_332 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29406_ _29406_/Q _30477_/CLK _29406_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14632_ _14823_/A1 wire1202/X _14630_/X _14632_/Y _14631_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 X_26618_ wire3452/X _31778_/D _26616_/X _27059_/C1 _31883_/Q _26617_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_243_3361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_343 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29295__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_354 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27598_ _27598_/C _27485_/D _27678_/D _27598_/X _21173_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XANTENNA__26439__A1_N _17502_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14621__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_365 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15964__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_376 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15898__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21498__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17351_ wire3575/X _30818_/Q _30835_/Q _17350_/X wire3191/X _17351_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 X_29337_ VGND VPWR hold201/X _31970_/CLK _29452_/D VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_387 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14563_ _14563_/X _29455_/Q _14562_/X wire1171/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22695__B1 _29731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26549_ VGND VPWR _14206_/Y _14398_/B _26543_/B _26549_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_398 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18274__S _18333_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18363__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31113__D _31113_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27083__C1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16302_ _16282_/X _16301_/X _29666_/D wire892/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19560__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27622__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30272__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31398__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17282_ _30965_/Q _17282_/Y _30931_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_29268_ _29268_/Q _31927_/CLK _29268_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20170__A1 _28729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16374__B1 wire894/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23239__A2 _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14494_ _14494_/X _14489_/X _14490_/X _14493_/X _14492_/Y _14491_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__24436__A1 _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20309__S _20324_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_4164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26976__A3 _31974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19021_ _19020_/X _23525_/S _19010_/X wire1883/X _19021_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_87_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26830__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16233_ VGND VPWR _16842_/S _29467_/Q _32121_/Q _16233_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28219_ _28219_/Q _29550_/CLK _28219_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22447__B1 _22445_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14924__A1 _32051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_WE0[1] _17908_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24987__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29199_ _29199_/Q _32440_/CLK _29199_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18115__A1 wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_5628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_5171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19312__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27887__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14534__C _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31230_ hold110/A _31754_/CLK _31230_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_191_5193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26189__A1 _31583_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16164_ _16814_/A1 _16814_/A2 _16164_/X _16434_/A2 _29047_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__21929__A _21929_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26189__B2 _32273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22524__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22462__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16677__A1 wire3242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15115_ _15115_/X _15749_/C1 _15108_/X _15110_/X _15735_/B _15114_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14137__C1 _14136_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length982 VPWR VGND _16806_/S wire981/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_100_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21670__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17874__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31161_ _31161_/Q _32531_/CLK _31161_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24739__A2 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25936__A1 _25836_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4081_A wire4082/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16095_ _16798_/A2 wire3276/A _28981_/Q _16095_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_190_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_2206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1097_A wire1097/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18303__A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16141__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4179_A hold86/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23947__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30112_ _30112_/Q _30404_/CLK _30112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27138__A0 _32044_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15046_ VGND VPWR _15610_/A2 _29315_/Q _15045_/X _15046_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_170_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19923_ _19922_/X _28611_/Q _28611_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_215_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14152__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31092_ _31092_/Q _32528_/CLK _31092_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_25_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output633_A _24600_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1090 VPWR VGND _15151_/B1 wire1089/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27689__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30043_ _30043_/Q _30474_/CLK _30043_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_269_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_5516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[29] _19631_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19854_ _19853_/X _28579_/Q _28579_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_267_5286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1264_A _23983_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19091__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20979__S _20979_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26897__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21973__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32023__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18805_ _19090_/B _28344_/Q _18804_/X _18805_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15101__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3990 VPWR VGND wire3990/X _29386_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25136__A _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26361__A1 _31668_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25164__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2498_A _20813_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19785_ _19785_/X _19785_/C _19860_/C _20654_/A _19785_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 X_16997_ _30376_/Q _16971_/A _16997_/X _29416_/Q wire3791/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18449__S _18449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_288_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15652__A2 _15632_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24372__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19918__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18736_ _28210_/Q _18736_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__21383__B _21551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24911__A2 _19562_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15948_ wire989/X _15948_/X _15947_/X wire951/X _29009_/Q wire1458/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_111_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31994_ _31994_/Q _32583_/CLK _31994_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17929__A1 wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28512__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21725__A2 _21365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29638__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22922__A1 _30478_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18051__A0 _27983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27310__A0 _32171_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27056__D_N _27053_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20933__A0 hold374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18667_ _29344_/Q _18667_/X _29343_/Q _18668_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_209_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30945_ _30945_/Q _31966_/CLK hold177/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15879_ _15879_/X _28807_/Q _16026_/A2 _16039_/B2 _16039_/C1 _15878_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_20_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32173__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15404__A2 _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26664__A2 _31788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17618_ _17618_/X _17852_/A _17586_/A _31716_/Q _17596_/D _17617_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_198_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27070__B _27070_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30876_ _30876_/Q _31510_/CLK _30876_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19788__B _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18598_ VGND VPWR _18598_/S wire3901/X _28312_/Q _28312_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24675__A1 _24678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_3191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30615__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17549_ _17541_/Y _31709_/D _17547_/X _17783_/B2 _17548_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_225_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28662__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_5178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23883__C1 _23882_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18354__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27613__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire884_A wire884/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27497__S _27517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20560_ VGND VPWR _20572_/S _27143_/A1 _29076_/Q _29076_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32546_ _32546_/Q _32546_/CLK _32546_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_225_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16365__B1 wire921/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20219__S _20219_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25624__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16904__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19219_ VGND VPWR _19219_/X _19311_/B _22088_/B1 _28073_/Q _19218_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_144_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14915__A1 _15590_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length4046_A _28668_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20491_ VGND VPWR _20495_/S wire1833/X _29009_/Q _29009_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30862__D _30862_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30765__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32477_ _32477_/Q _32545_/CLK _32477_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18106__A1 wire3849/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19303__B1 _19302_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_157_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29018__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22230_ VGND VPWR _22280_/S _30308_/Q _30398_/Q _22230_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27377__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31428_ _31428_/Q _32204_/CLK _31428_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21110__A0 _29554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16117__B1 wire890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19854__A1 _28579_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length982_A wire981/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16668__A1 _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17865__B1 _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22161_ VGND VPWR _22161_/X _22158_/Y _22160_/X wire2273/X _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25927__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3181_A wire3182/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31359_ VGND VPWR _31359_/D _31369_/CLK _31359_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_9_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_2_3_0_core_clk clkbuf_2_3_1_core_clk/A clkbuf_2_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__21558__B _21559_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput520 _31106_/Q la_output[15] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14679__B1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput531 _31116_/Q la_output[25] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_fanout1037_A wire1043/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23938__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21112_ VGND VPWR _21116_/S wire1833/X _29556_/Q _29556_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_116_4084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput542 wire4017/X la_output[35] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22092_ _22092_/Y _22092_/B _22095_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xoutput553 _28722_/Q la_output[45] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19028__B _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28042__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput564 _24118_/A la_output[55] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29168__CLK _30866_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17474__D _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput575 _28678_/Q la_output[65] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_4562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput586 _28688_/Q la_output[75] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15891__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25920_ _31477_/Q _25920_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_21043_ VGND VPWR _21057_/S _30039_/Q _29504_/Q _29504_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_151_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput597 _28698_/Q la_output[85] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23773__B _31793_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3446_A _31936_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2029 VPWR VGND wire2029/X _17310_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20889__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1204_A _14610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_824 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29163__D _29163_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17093__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1306 VPWR VGND _20680_/C _25738_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23265__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input2_A core_rstn VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1317 VPWR VGND wire1317/X wire1317/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25851_ _31447_/Q _25850_/Y _31447_/D _25853_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_214_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25155__A2 _24565_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26352__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1598_A _24888_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1328 VPWR VGND wire1328/X wire1328/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18359__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1339 wire1339/A _26335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23166__A1 _22620_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16840__A1 wire3281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24363__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15643__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24802_ _31687_/Q _24801_/Y _31688_/Q _24803_/B _31685_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_285_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_21_3_core_clk clkbuf_opt_21_3_core_clk/X clkbuf_opt_21_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19909__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32516__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21177__A0 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28570_ VGND VPWR _28570_/D _31892_/CLK _28570_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__24902__A2 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22508__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28192__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25782_ _25782_/Y _31419_/Q _27280_/C _25780_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XANTENNA__17490__C _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22994_ VGND VPWR _31395_/Q _22993_/X _22992_/X _22994_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_2361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_3837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_4300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_3001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27521_ _25643_/C _32189_/Q _27522_/A _25643_/B _32181_/Q _32197_/Q _32173_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_224_4934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27301__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26104__A1 _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24733_ VGND VPWR _31474_/Q _24708_/B _24770_/A _24734_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_19_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20924__A0 _29492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21945_ wire3146/X _21955_/B _21944_/X wire725/A _21945_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_240_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_2633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17396__A2 _30983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout929_A wire933/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24115__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27852__A1 _32549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26655__A2 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27452_ VGND VPWR _27476_/S _32284_/Q _27451_/X _32284_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30295__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24664_ _24666_/C _31462_/Q _31463_/Q _31461_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_91_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold242_A hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21876_ hold223/A _22074_/B1 _29789_/D _21875_/X _21874_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19698__B _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_5179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_1932 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14603__B1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25863__B1 _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31540__CLK _31689_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_3711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26403_ _26403_/B _26403_/Y _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_231_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23615_ VGND VPWR _24847_/C _32564_/Q _23615_/B VGND VPWR NF_sky130_fd_sc_hd__xnor2_2 XFILLER_240_3545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17499__A _26456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_1391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20827_ VGND VPWR _20837_/S _20826_/Y _29346_/Q _29346_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14338__D _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27383_ VGND VPWR _27384_/S _32235_/Q _27278_/X _32235_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3982_A wire3983/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18094__S _18117_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24595_ _24446_/B _24446_/A _24595_/X _31549_/Q _17883_/B _29974_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__18345__A1 wire3877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17148__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1838_A _18166_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27065__C1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27604__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29122_ _29122_/Q _32427_/CLK _29122_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13820__A _31126_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15159__A1 _29318_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26334_ _31655_/D _26263_/A _26509_/D _26333_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_32_2525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23546_ VGND VPWR _23560_/S _30467_/Q hold493/X _30467_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20152__A1 _28720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20758_ VGND VPWR _20785_/S _27680_/A1 _29272_/Q _29272_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_5439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25615__B1 _25582_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26812__C1 _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_2265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_4033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29053_ _29053_/Q _32136_/CLK _29053_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22429__B1 _14367_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26265_ _31621_/Q _26265_/X _26301_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__24969__A2 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23477_ VGND VPWR _23477_/S _28377_/Q _30425_/Q _23477_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25091__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18822__S _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20689_ _29454_/D _29452_/D _29453_/D _21173_/B _21107_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_4 XANTENNA__31690__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input197_A mprj_dat_i[30] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28004_ _28004_/Q _30272_/CLK _28004_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_123_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25216_ _25595_/A _25215_/X _25254_/A2 hold123/A _31232_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_221_1575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27368__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22428_ _21611_/C _22427_/X _14367_/B _21611_/A _29979_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19845__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5539 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26196_ VPWR VGND _31586_/D _26196_/B _26913_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__28242__D _28242_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_2856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_2740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16659__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25918__A1 wire3440/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25147_ _31208_/Q _25148_/B _25145_/X _25149_/B _24561_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_216_4473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2281_A wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22359_ _29929_/D _22385_/B1 _30468_/Q _31920_/D _22356_/B VGND VPWR _22358_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_69_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_3027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16123__A3 wire1459/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26040__B1 _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17320__A2 input205/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2379_A wire2380/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3114 _23417_/A _22509_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_3_933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20372__B _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3219_A _21288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23929__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32046__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15331__A1 _15507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14134__A2 wire3541/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25394__A2 _25402_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29955_ hold188/A _31918_/CLK _29955_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25078_ _25810_/C _25077_/X _25086_/A2 _31182_/Q _31182_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26591__A1 _31771_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input58_A la_input[111] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23436__A1_N _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3158 wire3160/X _22385_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_229_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3169 VPWR VGND wire3171/A _18533_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_268_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17608__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24779__B _25836_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15882__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14685__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16920_ _16920_/X _29099_/Q _16947_/A2 _16920_/A3 _16930_/A1 _16919_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_254_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28906_ _28906_/Q _32545_/CLK _28906_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24029_ _24029_/X _24081_/A3 _19928_/B _28627_/Q _31105_/Q _24165_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 Xfanout1701 wire1707/X _18661_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3242 VPWR VGND wire3242/X wire3243/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2446 VPWR VGND _24223_/S _24210_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23944__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19073__A2 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2546_A _20447_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29886_ _29886_/Q _31904_/CLK _29886_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20799__S _20809_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3264 VPWR VGND wire3264/X _14096_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28535__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_4823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2530 wire2530/A _20543_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_186_5284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26681__B1_N _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17084__A1 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26879__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1734 VPWR VGND _16814_/A2 _23395_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2479 VPWR VGND _20997_/S _20989_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21484__A _21484_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17084__B2 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18281__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27540__A0 _27538_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1745 VPWR VGND wire1748/A fanout1749/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26343__A1 _31659_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16851_ _16851_/X _28769_/Q wire1029/X _16944_/B2 _16856_/A2 _16850_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28837_ _28837_/Q _32403_/CLK _28837_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_186_4561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1756 _25381_/C _25413_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_182_4403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31070__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23157__A1 hold428/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32196__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout780 VPWR VGND _26347_/A2 _26335_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16292__C1 wire1449/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1778 VPWR VGND _27709_/A1 _18328_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24354__B1 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15634__A2 wire1556/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23157__B2 _30109_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15802_ _15802_/X _28805_/Q _16026_/A2 _16039_/B2 _16039_/C1 _15801_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__16831__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1840 wire1840/X wire1840/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_186_4594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout791 _24957_/X _25017_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_59_2105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1789 _18267_/Y _27696_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26894__A2 _14153_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19570_ _19570_/X _19584_/A _19570_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA_wire2713_A wire2714/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21168__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16782_ wire992/A _16782_/X _16781_/X _16930_/A1 _30913_/Q _16928_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28768_ _28768_/Q _32318_/CLK _28768_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13994_ _28503_/Q _13994_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__22365__C1 _22364_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30638__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14842__B1 _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27518__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18033__A0 _27965_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18521_ VGND VPWR _18523_/S wire3844/X _28293_/Q _28293_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22904__B2 wire1866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15733_ _15732_/X wire1134/X _15737_/A2 _29615_/Q _15733_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_56_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27719_ VGND VPWR _27719_/S _19734_/A _32452_/Q _32452_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire1895 VPWR VGND _20872_/S wire1896/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_223_5167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20915__B1 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28685__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14098__A _29370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28699_ VGND VPWR _28699_/D _30630_/CLK _28699_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_141_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18584__A1 _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17387__A2 _17387_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24106__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3719 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27843__A1 _25804_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26646__A2 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30730_ hold263/A _32499_/CLK input77/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18452_ VGND VPWR _18452_/S wire3855/X _28226_/Q _28226_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_4922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15664_ _15664_/X _15738_/A2 _15663_/X _29066_/Q _15738_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_234_776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20391__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3781 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_140 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23004__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_4196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_151 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_4155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_162 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17403_ _17441_/B2 _17403_/A2 _17403_/X _17432_/B2 input189/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_54_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22746__C _23095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14615_ _14610_/X _15612_/B wire1081/X _14614_/X _14615_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_89_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_173 _23890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18383_ VGND VPWR _18390_/S _18516_/A1 _28160_/Q _28160_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30661_ _30661_/Q _32110_/CLK hold149/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_256_core_clk _32071_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_184 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15595_ _15610_/A2 _15595_/X _15594_/X _15610_/B1 _28800_/Q _15608_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__30788__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_3503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18336__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17139__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_195 _30237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27823__C_N _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22132__A2 wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32400_ _32400_/Q _32403_/CLK _32400_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17334_ VGND VPWR _26974_/B _17333_/X _29852_/D _17245_/X _32288_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_258_3817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14546_ _14546_/A _23365_/S _15770_/B _14546_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_280_1989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16347__B1 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30592_ _30592_/Q _32357_/CLK _30592_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18887__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25606__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output583_A _28685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23880__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14545__B _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27071__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32331_ _32331_/Q _32557_/CLK _32331_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21891__A1 _21554_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17265_ wire2128/X _17446_/B2 _17265_/X wire3447/X wire3561/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22o_4 XANTENNA__30682__D _30682_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14477_ _14477_/Y _29454_/D _30439_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__23858__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25082__A1 _31184_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30018__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19004_ _19003_/X _19318_/B1 _19201_/A2 _28322_/Q _19004_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_50_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16216_ _16216_/X _29112_/Q _16966_/A2 _16966_/A3 _16964_/B1 _16215_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_256_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27359__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32262_ _32262_/Q _32470_/CLK _32262_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21659__A _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23093__B1 _23092_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19836__A1 _28570_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17196_ _17195_/X _30400_/Q _17234_/A1 _17197_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_50_1979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4540 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31213_ _31213_/Q _31746_/CLK _31213_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_139_3383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17847__B1 _31736_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16147_ _16798_/A2 wire3272/X _32350_/Q _16147_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25909__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29310__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22840__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32193_ _32193_/Q _32537_/CLK _32193_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26031__B1 _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17311__A2 input204/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_2682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19851__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31144_ _31144_/Q _32543_/CLK _31144_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_212_5583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16078_ _16073_/X wire890/A _16839_/A1 _16077_/X _16078_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__25385__A2 _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30168__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14280__B _24447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_3902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_5613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23396__A1 _30370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23396__B2 hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15873__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14676__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15029_ _15028_/X _15610_/B1 _15610_/A2 _30497_/Q _15029_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_19906_ VGND VPWR _20106_/B _26694_/D _25980_/A2 _19906_/X _27075_/C1 wire1386/X + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__31413__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3670 _30442_/Q _23302_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__32539__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31075_ _31075_/Q _32562_/CLK _31075_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23935__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19064__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1646_A _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19790__C _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_2980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2935 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17075__A1 hold461/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29460__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27780__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30026_ VGND VPWR _30026_/D _30294_/CLK _30026_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_59_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27531__A0 _32198_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26334__A1 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19837_ VGND VPWR _26882_/B _19520_/B _19853_/A2 _19837_/X _27091_/C1 _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20502__S _20515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18811__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15086__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27902__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24345__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15625__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_3903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26885__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21159__A0 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput2 VGND VPWR input2/X core_rstn VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_19768_ _19768_/Y _19768_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_263_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24896__A1 _31092_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14833__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18024__A0 _27956_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31563__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18719_ VGND VPWR _18719_/X _19379_/B _19380_/B1 _28049_/Q _18718_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_74_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30857__D wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19699_ _27077_/C1 _19698_/X _19711_/A2 _28510_/Q _28510_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31977_ _31977_/Q _31977_/CLK _31977_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__26098__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_1244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22371__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21730_ _21730_/Y _21367_/X _21366_/Y _21364_/X _21778_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_124_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30928_ _30928_/Q _32282_/CLK _30928_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20382__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15389__B2 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3027_A wire3027/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22108__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25845__B1 _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15928__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_3630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16050__A2 wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_2888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_1531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_3242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21661_ _21661_/B _21661_/X _21661_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_241_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19311__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30859_ _30859_/Q _30866_/CLK _30859_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_2850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_2697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_3663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_3595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20552__B_N _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23400_ _31954_/Q hold245/A _23400_/Y _23403_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__14600__A3 wire1693/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20612_ VGND VPWR _20615_/S _27705_/A1 _29127_/Q _29127_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_146_1985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24380_ _26903_/B _24380_/C _24380_/A _24380_/B _24585_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__20134__A1 _28711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16338__B1 _16319_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21592_ _22035_/A _21592_/X _21592_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__21331__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23871__A2 _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18732__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27062__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16889__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28408__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23331_ VGND VPWR wire820/X _30309_/Q _17191_/X _30309_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21882__A1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32529_ _32529_/Q _32529_/CLK _32529_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20543_ VGND VPWR _20543_/S _29060_/Q _27702_/A1 _29060_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_4353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30592__D _30592_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23768__B _31789_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18642__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3239 VPWR VGND _16445_/A1 wire3237/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire3396_A _32602_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15010__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1154_A _14884_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16353__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17550__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26270__B1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_23_1_core_clk clkbuf_5_23_1_core_clk/X clkbuf_5_23_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_66_3311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2516 VPWR VGND _20695_/S _20719_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_175_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26050_ wire2597/X _26049_/X _31532_/Q _17877_/X _31532_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__32069__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21569__A _21569_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23262_ VGND VPWR _23267_/S _29510_/Q _30245_/Q _30245_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19827__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20474_ VGND VPWR _20480_/S _28993_/Q _27254_/A0 _28993_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15561__B2 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1804 VPWR VGND _14544_/B _20848_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_175_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25001_ _25681_/B1 _25000_/X _25017_/A2 _31144_/Q _31144_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_27_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22213_ _22213_/X _29829_/Q _29831_/Q hold444/A _22213_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_238_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21634__A1 _29904_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15567__A _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21634__B2 _21427_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23193_ VGND VPWR _23193_/X _23191_/X _23192_/X _23190_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21288__B _21288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14471__A _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_5561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28558__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20842__C1 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22144_ _22144_/Y _22150_/B _21032_/B _22142_/X _21032_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XANTENNA__23784__A _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16510__B1 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29803__CLK _29803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_3983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput350 _13983_/Y la_iena[93] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_252_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31093__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23387__A1 _30365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput361 _13942_/Y la_oenb[102] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_216_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout879_A wire883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24599__B _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14667__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15864__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput372 _13932_/Y la_oenb[112] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_4713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29740_ _29740_/Q _29914_/CLK _29776_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3730_A wire3731/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22075_ _22075_/A2 _29806_/D _22074_/X hold395/A _22073_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_268_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput383 _13922_/Y la_oenb[122] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26952_ _32002_/Q _32003_/Q _26971_/A _32001_/Q _32004_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_183_5402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_73 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19055__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1008 VPWR VGND _16725_/A _16206_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_213_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput394 _13806_/Y la_oenb[17] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_187_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1019 VPWR VGND wire1021/A _15768_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_192_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20920__B hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21937__A2 _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length1882_A wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21026_ VGND VPWR _21030_/S wire3784/X _29491_/Q _29491_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27690__S _27710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25903_ VGND VPWR _25903_/S _19738_/A _31469_/Q _25904_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_268_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26325__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25128__A2 _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29671_ _29671_/Q _32557_/CLK _29671_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_116_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20412__S _20412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26883_ _27087_/C1 _26882_/Y _26900_/A _31891_/Q _31891_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18802__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18089__S _18118_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1690_A _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20070__B1 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15616__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24336__B1 wire1346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4734 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13815__A _31131_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28622_ _28622_/Q _32528_/CLK _28622_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25834_ VGND VPWR _31438_/Q _31441_/Q _25834_/X _31439_/Q _31440_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__29953__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24887__A1 _31089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold457_A hold457/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14824__B1 wire1067/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22347__C1 _22346_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26340__A4 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28553_ VGND VPWR _28553_/D _30580_/CLK _28553_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19212__C1 _27881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25765_ _27205_/B _25765_/Y _32093_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_274_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30767__D _30767_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22977_ _25691_/B _32485_/Q _22977_/X _25693_/B _32477_/Q _32493_/Q _32469_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_125_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_1333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26089__B1 _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1955_A wire1968/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22362__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26628__A2 _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27504_ VGND VPWR _27507_/S _27697_/A1 _32319_/Q _32319_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30930__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22993__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24716_ _24716_/Y _26164_/A _24716_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_264_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input112_A la_input[45] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21928_ _21925_/Y _21926_/Y _21927_/Y _21966_/A _21929_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 X_28484_ _28484_/Q _32552_/CLK _28484_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_240_4043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25696_ _31395_/Q _25692_/A _31396_/Q _25692_/C _25696_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_243_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21570__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_2010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15919__A3 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21243__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19859__D _19859_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3263_A _14744_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14588__C1 _14627_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24422__B1_N _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27435_ VGND VPWR _27483_/S _32274_/Q _32275_/Q _27435_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24103__A3 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24647_ _24674_/A _25895_/A _24669_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_262_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21859_ VGND VPWR _21851_/X _21900_/B _21858_/Y _21859_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XPHY_821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18318__A1 _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22114__A2 _22113_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19515__B1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14400_ _14400_/Y _14367_/X _14401_/A1 _14398_/Y _14168_/S wire2597/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XPHY_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3169_A _18533_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27366_ VGND VPWR _27366_/S _32220_/Q _27280_/X _32220_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15380_ VGND VPWR _15750_/S _32322_/Q _28930_/Q _15380_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20125__A1 _28708_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_5556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24578_ _31420_/Q _31418_/Q _31417_/Q _27280_/D _31419_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XANTENNA__18869__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_5567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23862__A2 _19861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28088__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26335__A _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14365__B _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29105_ _29105_/Q _32113_/CLK _29105_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14331_ _21687_/C _14331_/B _14331_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26317_ _26317_/Y _26327_/B _26886_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21873__A1 _29788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23529_ VGND VPWR _23529_/S wire4142/X hold360/A _23529_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29333__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27297_ VGND VPWR _27301_/S _32160_/Q _27417_/A0 _32160_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23678__B _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15001__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17541__A2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3336_A wire3362/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_5561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3740 VPWR VGND _23061_/B _23043_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_275_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17050_ VGND VPWR _23348_/C _30193_/Q _30382_/Q _17050_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26800__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29036_ _29036_/Q _32280_/CLK _29036_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_136_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14262_ VGND VPWR _14262_/X _24446_/A _24446_/B _29962_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_26248_ _26184_/A _26247_/X _26263_/A _31672_/Q _31612_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_231_5414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15552__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_3433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16001_ VGND VPWR _16443_/S _32306_/Q _28914_/Q _16001_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_2770 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21625__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17829__B1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30310__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2781 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31436__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2663_A wire2664/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14193_ _14300_/B _14300_/A hold123/X _14193_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26179_ _26179_/X _31578_/Q _26179_/B1 _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__14381__A _31015_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_4893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17395__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26013__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19833__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25367__A2 _25265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26564__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2221 VPWR VGND _19732_/A _19550_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_65_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24575__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2830_A _23292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17952_ VGND VPWR _17983_/S wire3917/X _27889_/Q _27889_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout2232 VPWR VGND wire2234/A _19656_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29938_ hold415/A _31931_/CLK _29938_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_279_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3050 VPWR VGND _18117_/S _18113_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27376__C_N hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2254 _19522_/X wire2255/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_75_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24302__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18254__A0 _29856_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30460__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2265 VPWR VGND _19196_/D1 _19216_/D1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31586__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16903_ VGND VPWR _16903_/X _16458_/S _16940_/B1 _16900_/X _16902_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22050__A1 hold476/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26316__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2276 VPWR VGND _19196_/B1 _19368_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_5256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20322__S _20322_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17883_ _17883_/B _14245_/X _24600_/B _24386_/A _19504_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_130_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1542 _16721_/A2 _16840_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_29869_ _29869_/Q _32569_/CLK _29869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2287 _17495_/Y _17539_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__15068__B1 wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3094 VPWR VGND wire3094/X _17318_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1553 VPWR VGND wire1557/A _14538_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_output429_A wire3366/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18300__B _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2360 wire2361/X wire2360/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16804__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15607__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24327__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15416__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31900_ _31900_/Q _32567_/CLK _31900_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26867__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19622_ _19622_/Y _26890_/B _19638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xwire2371 VPWR VGND wire2371/X _14183_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16834_ VGND VPWR _16834_/X _16491_/S _16834_/B1 _16833_/X _16832_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_182_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2382 wire2383/X wire2382/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4044_A wire4045/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24878__A1 wire2255/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2393 VPWR VGND wire2393/X wire2394/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14276__D1 _29980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14815__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18006__A0 _27940_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16280__A2 _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19553_ _26861_/C1 _19552_/Y _19598_/A _28459_/Q _28459_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_242_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31831_ _31831_/Q _32282_/CLK _31831_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length2196_A _19584_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16765_ _16765_/X _16762_/X wire912/X _16949_/C1 _16764_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_13977_ _28520_/Q _13977_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_228_2249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22353__A2 _14365_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23550__A1 _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_12_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22757__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18504_ VGND VPWR _18512_/S wire3903/X _28276_/Q _28276_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22984__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21787__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14259__C _29961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15716_ VGND VPWR _15716_/S _30917_/Q _29195_/Q _15716_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_1575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21661__B _21661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19484_ _19481_/A _31313_/Q _19484_/X _31316_/Q _31315_/Q _31314_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_31762_ _31762_/Q _31762_/CLK _31762_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_258_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16696_ wire1552/X _16696_/X _16911_/A2 wire1450/X _14104_/Y _28428_/Q VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__28147__D _28147_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17765__C1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25827__B1 _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_4848 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21153__S _21168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14579__C1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30713_ VGND VPWR hold429/X _32168_/CLK _30713_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18435_ VGND VPWR _18438_/S wire3918/X _28209_/Q _28209_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_91_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15647_ _15646_/X _15705_/A1 _15737_/A2 _32441_/Q _15647_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_106_4083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31693_ _31693_/Q _31693_/CLK _31693_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_223_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16247__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_4094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_4774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22105__A2 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout2269_A _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30644_ hold278/A _31798_/CLK _30644_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18366_ VGND VPWR _18366_/S _18499_/A1 _28144_/Q _28144_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14594__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15791__A1 _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20992__S _20999_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15578_ wire1500/X _15577_/X _29545_/Q _15615_/A2 _15578_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_236_5325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23853__A2 _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32211__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26245__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18714__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_2883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24992__C_N _24927_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27044__A2 _27050_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17317_ _30936_/Q _17317_/X _30970_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_236_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14529_ _14309_/X _14486_/X _14529_/Y _22444_/B _14528_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_1 X_30575_ _30575_/Q _32039_/CLK hold256/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18297_ VGND VPWR _22372_/A2 _29762_/Q _18296_/X _18298_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__18462__S _18466_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19785__C _19785_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17532__A2 _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2436_A wire2440/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_2654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26573__B1_N wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_4365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32314_ _32314_/Q _32426_/CLK _32314_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21389__A _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17248_ _17248_/X _30999_/Q _19503_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XANTENNA__23066__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19809__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17586__B _31713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold66_A input7/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28700__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16740__B1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23605__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29826__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32245_ _32245_/Q _32467_/CLK _32245_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14751__C1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17179_ _21953_/A2 wire3930/X _29898_/Q _22026_/B1 _17183_/B VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22oi_4 XFILLER_8_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19285__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32361__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2603_A _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_3082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_1092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16099__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17296__A1 wire3558/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18493__A0 _28266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire847_A wire847/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17296__B2 wire3555/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27076__A _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26555__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30803__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20190_ _26771_/A _20189_/X _20192_/A2 _28739_/Q _28739_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32176_ _32176_/Q _32259_/CLK _32176_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_137_1929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31929__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17835__A3 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23369__A1 _30347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15846__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14649__A3 _30487_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31127_ VGND VPWR _31127_/D _32499_/CLK _31127_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_22_3203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1930_A wire1931/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28850__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_5470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_4189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23908__A3 _23907_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29976__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_1844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24030__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21919__A2 _17143_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17048__A1 _30192_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22041__A1 wire2030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_51_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18245__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22041__B2 _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31058_ _31058_/Q _32032_/CLK _31058_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_43 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20232__S _20236_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_5307 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_4177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19306__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15059__B1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_1276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20052__B1 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24318__B1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18796__B2 wire1948/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22900_ _22911_/D _22901_/A _22934_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_285_3055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30953__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30009_ _30009_/Q _30460_/CLK _30009_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26858__A2 wire2664/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23880_ _30627_/Q _19857_/B _23880_/X _30563_/Q _20671_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_268_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18260__A3 _29342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24869__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29206__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23543__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22831_ _22831_/C _22831_/D _22870_/A _22831_/A _22831_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_0_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25324__A _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_178_core_clk _32039_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_241_5053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23770__C _31789_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18637__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_3976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_4049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_909 _18842_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23541__A1 _30462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27807__A1 _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26139__B _26139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25550_ _31352_/Q _31335_/Q _31353_/Q _25552_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21571__B _21672_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22762_ _22752_/Y _22766_/A _22763_/B _22765_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xclkbuf_leaf_107_core_clk _32419_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25043__B _25043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16559__B1 wire1038/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20355__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22159__S _22273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21552__B1 _21389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24501_ _25578_/C _24501_/X _25416_/B _31042_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_266_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21713_ _21713_/A _21713_/B _21812_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XPHY_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28230__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25481_ _31320_/D _31319_/Q _25480_/Y _31320_/Q _25478_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__29356__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22693_ _22692_/X _29731_/Q _22779_/A1 _29881_/Q _22693_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_16_2317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14466__A _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25294__A1 _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24097__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1271_A _23779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15231__B1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20187__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26491__B1 _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27220_ _32102_/Q _27219_/Y _32102_/D _25773_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_fanout1369_A _19645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24432_ _24432_/X _31019_/Q _31018_/Q _31017_/Q _24434_/D _24434_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20107__A1 _28699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21644_ _21644_/Y _21645_/A _21645_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__23779__A _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25782__B1_N _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21304__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23844__A2 _19861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22501__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27151_ VGND VPWR _27163_/S _27614_/A1 _32057_/Q _32057_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21855__A1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30333__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24363_ _24362_/X _24888_/D wire1668/A _23611_/A _30984_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_33_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21575_ VGND VPWR _21575_/X _22010_/C _21576_/A _22010_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__18372__S _18372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_40 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25046__A1 _31166_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_51 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26243__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17523__A2 _27423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16326__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18720__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1536_A wire1539/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26102_ VGND VPWR _26102_/C _26112_/D _26102_/X _26123_/D _26102_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA_62 _31145_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23057__A0 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28380__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23314_ VGND VPWR wire820/A _30292_/Q _17056_/X _30292_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21950__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_73 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20526_ VGND VPWR _20545_/S _29043_/Q _23647_/A1 _29043_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27685__S _27696_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15534__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27082_ _27082_/X _27122_/B _32019_/Q _27058_/C _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_235_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length3058 VPWR VGND _18086_/S _18083_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_33_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17496__B _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25597__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26794__A1 _31847_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_84 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24294_ _30944_/D _26378_/A4 _31596_/Q _24284_/X _31673_/Q wire1351/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_159_2844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16731__B1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20407__S _20407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_95 _14596_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_5532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27948__CLK _30198_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26033_ _31525_/Q _31528_/Q _31527_/Q _31526_/Q _26047_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 Xmax_length1612 VPWR VGND _24281_/A _24269_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_46_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23245_ VGND VPWR _23248_/S wire3981/X _30228_/Q _30228_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_leaf_90_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20457_ VGND VPWR _20458_/S _28976_/Q _21070_/A1 _28976_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_189_5622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1703_A _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_50 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30483__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18484__A0 _28257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19815__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27743__A0 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26546__A1 _31756_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23176_ _23191_/C1 _23191_/B1 _23185_/B _30448_/Q _23176_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_153_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_137_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20388_ VGND VPWR _20406_/S wire1837/A _28910_/Q _28910_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19681__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_3720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3011_A _18423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22127_ _29818_/Q _21032_/B _29819_/Q _22133_/D _22127_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_231_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_1933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16620__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27984_ _27984_/Q _30477_/CLK _27984_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24021__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2077_A wire2078/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_208_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18401__A _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21238__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18236__B1 _29750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22032__A1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29723_ _29723_/Q _31955_/CLK _29723_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_153_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26935_ _31959_/Q _26936_/A2 _31959_/D wire2705/X _26935_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22058_ VGND VPWR _22058_/S _21956_/A _21812_/B _22058_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_248_632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19433__C1 _28439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_4842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18787__A1 _18786_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24309__B1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23780__A1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13900_ _28597_/Q _13900_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_21009_ VGND VPWR _21017_/S _29474_/Q _27253_/A0 _29474_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26849__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29654_ _29654_/Q _32379_/CLK _29654_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_40_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14880_ _14880_/X _15631_/A1 _14877_/X _14879_/X _14937_/A1 _14875_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_26866_ VGND VPWR wire2678/X _26866_/A1 wire752/X _26866_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20594__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_1934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_5571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28605_ _28605_/Q _32016_/CLK _28605_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25817_ VGND VPWR _25825_/S _25816_/X _31432_/Q _31432_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_13831_ _20964_/S _13831_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_235_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25521__A2 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_359_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29585_ _29585_/Q _32110_/CLK _29585_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26797_ _26797_/B wire1272/X _27122_/B _26797_/X _27058_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_207_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18539__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15470__B1 wire1084/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23532__A1 _30453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22335__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_3757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_4220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16550_ _16550_/X _16964_/A2 _16549_/X _29089_/Q _16920_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_wire2411_A _19859_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28536_ _28536_/Q _32549_/CLK _28536_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13762_ _31184_/Q _13762_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_224_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20346__A1 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25748_ _25752_/C _31412_/D _26153_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_55_4280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2509_A _20739_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21543__B1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32234__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15501_ _15503_/A2 wire1496/X _15501_/X _15718_/B1 _15500_/X _29232_/Q VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_242_3459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16014__A2 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_8 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28467_ VGND VPWR _28467_/D _31892_/CLK _28467_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_16481_ _16964_/B1 _16480_/X wire1058/X _16481_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_107_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16067__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25679_ VGND VPWR _25682_/C _25677_/Y _25661_/X _25679_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__24088__A2 _24140_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5369 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25285__A1 _31359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26482__B1 _31703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17762__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18220_ _18219_/X wire3174/A _29747_/Q _18221_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_107_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22099__A1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15432_ _15432_/X _30794_/Q _15638_/A2 _15638_/A3 _15640_/A1 _15431_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23296__A0 _30278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27418_ VGND VPWR _27421_/S _32265_/Q _27274_/X _32265_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_3912 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_10_0_core_clk clkbuf_opt_10_1_core_clk/A clkbuf_5_5_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XPHY_640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22099__B2 _30091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14576__A2 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28398_ _28398_/Q _30446_/CLK _28398_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28723__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23835__A2 wire1605/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29849__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18151_ VGND VPWR _18151_/S wire3814/X _28079_/Q _28079_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15363_ VGND VPWR _15368_/S _15362_/X _15361_/X _15363_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27349_ _31386_/Q hold144/A hold143/X _27349_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_4 XANTENNA__14981__C1 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2482 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_2775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32384__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17102_ _17102_/X _17101_/X wire3791/X _29428_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_197_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14314_ _21778_/B _14314_/Y _17077_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_177_2922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_5258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15525__A1 wire1128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30360_ _30360_/Q _32557_/CLK _30360_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18082_ VGND VPWR _18085_/S _23297_/A1 _28012_/Q _28012_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15294_ VGND VPWR _15623_/S _28792_/Q _28824_/Q _15294_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30826__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20317__S _20321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output281_A _13761_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_247_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17033_ _16971_/A _30380_/Q _17033_/X wire3791/A _29420_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_158_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29019_ _29019_/Q _32127_/CLK _29019_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14245_ _14245_/A _24446_/A _14245_/X _14245_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_136_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28873__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30960__D _30960_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30291_ _30291_/Q _30452_/CLK _30291_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29999__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_1806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32030_ _32030_/Q _32036_/CLK _32030_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22271__A1 _29839_/Q VGND VPWR VPWR VGND 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XFILLER_160_4383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24079__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16410__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31601__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_286_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23287__A0 _30269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18418_ VGND VPWR _18418_/S _28193_/Q wire3859/X _28193_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_250_885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23599__A _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire797_A wire798/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14567__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19398_ VGND VPWR _19419_/S _27244_/A0 _28414_/Q _28414_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31676_ _31676_/Q _32024_/CLK _31676_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15764__B2 _15763_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_1583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21837__A1 _21834_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18349_ VGND VPWR _18359_/S wire3866/X _28127_/Q _28127_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30627_ _30627_/Q _31578_/CLK hold291/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14972__C1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25028__A1 _31157_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_EN0 _17891_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18702__A1 _29814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26225__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27568__A3 _32242_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2818_A _25448_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21360_ VGND VPWR _21741_/B _21360_/B _21360_/A _21360_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_274_2000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26776__A1 _31838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25579__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30558_ hold198/A _32017_/CLK _30558_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20227__S _20227_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31751__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_2484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20311_ VGND VPWR _20311_/S _27694_/A1 _28852_/Q _28852_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24787__B1 _23679_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14724__C1 _29243_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput60 VGND VPWR input60/X la_input[113] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_191_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30870__D _30870_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25984__C1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21291_ _22067_/A _21613_/B _21609_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xor2_4 XFILLER_176_3199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_4165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_1310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19258__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30489_ _30489_/Q _32110_/CLK _30489_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xinput71 VGND VPWR input71/X input71/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA_wire3094_A _17318_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24251__A2 _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput82 la_input[18] input82/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_235_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17269__A1 _30921_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18466__A0 _28240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23030_ VGND VPWR _31396_/Q _23026_/X _23029_/X _23030_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xinput93 VGND VPWR input93/X la_input[28] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_232_3617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20242_ VGND VPWR _20249_/S _28785_/Q wire1826/X _28785_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_5505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23538__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32228_ _32228_/Q _32259_/CLK _32228_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21065__A2 _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22262__A1 _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26528__A1 _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25319__A _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19663__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_3065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_288_4831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1211_A wire1210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32107__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3261_A wire3261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_174_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20173_ wire877/X _19764_/B _20173_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_32159_ _32159_/Q _32464_/CLK _32159_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_44_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_154_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24003__A2 _19786_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25200__A1 _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18221__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18218__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22014__B2 _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24981_ _25776_/C _24980_/X _25017_/A2 _31134_/Q _31134_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_359_core_clk _29914_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_230_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18769__A1 _28374_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_2944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15056__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26720_ _31813_/Q _26720_/Y _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_79_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21999__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23932_ _28490_/Q _19646_/B _23932_/X _28682_/Q _24207_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_258_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23781__B _31870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20576__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19430__A2 _19429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20897__S _23477_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21773__B1 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31131__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32257__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23273__S _23296_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15047__A3 wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16244__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17441__A1 wire3564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26651_ _26650_/X _27087_/C1 _26637_/B _31891_/Q _31786_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17441__B2 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23863_ _19792_/C _23862_/X _31830_/Q _19858_/B _23864_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19981__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23514__A1 _23513_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16795__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_706 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25602_ _13756_/Y _25629_/A _25602_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_246_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22814_ _22815_/B _22814_/B _22814_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_57_2439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29370_ _29370_/Q _31931_/CLK _29370_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_717 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26582_ wire3454/X hold182/A _26580_/X _27071_/C1 hold181/X _26581_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_246_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_728 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23794_ wire1807/X _23793_/X hold332/X wire1625/X _23795_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__28746__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold155_A hold155/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_739 wire3443/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19194__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28321_ _28321_/Q _31962_/CLK _28321_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_5479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25533_ VGND VPWR _25539_/A _31346_/Q _25511_/X _25533_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_74_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22745_ _22747_/B _22733_/B _29735_/Q _22745_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 XFILLER_256_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3895_A wire3896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31281__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17744__A2 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18941__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28252_ _28252_/Q _30294_/CLK _28252_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14558__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25464_ _25464_/Y _31312_/Q _25464_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_35_2759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_5200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22676_ VGND VPWR _22686_/A wire3661/X _29729_/Q _22779_/A1 _22674_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__30849__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23817__A2 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27203_ hold397/A _27204_/B _27276_/C _27202_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_65_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27008__A2 _27011_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24415_ _31009_/Q _24437_/B _24415_/Y _24420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__21828__A1 hold279/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23302__A _30441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21627_ _21956_/B _21628_/A _21674_/B _21628_/D _21628_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XANTENNA_max_length3059_A _18083_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28183_ VGND VPWR _28183_/D _28183_/CLK _28183_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_240_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28896__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25019__A1 _31153_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1820_A _18257_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32037__D wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25395_ _25395_/X _25380_/C _31282_/Q _25266_/Y _31274_/Q _24501_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_68_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24490__A2 _25197_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27134_ _24716_/A _25745_/A _27133_/Y _32041_/D _27132_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 Xclkbuf_leaf_75_core_clk _31836_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15507__A1 _15507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24346_ hold238/X _26772_/A hold239/A _31988_/Q _26376_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_172_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26767__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20500__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21558_ VGND VPWR _21558_/C _21530_/Y _21558_/X _21558_/D _21559_/C VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_155_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_3482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3831 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20364__C _20364_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2132 VPWR VGND _25181_/B _25173_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14715__C1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20509_ VGND VPWR _20518_/S _23663_/A1 _29027_/Q _29027_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27065_ VGND VPWR _32010_/D wire772/A _27064_/X _19803_/C _27075_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_232_5553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25975__C1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30999__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24277_ _30932_/D _24276_/X _24308_/C _24275_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_46_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2194_A wire2195/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21489_ _21674_/D _21674_/C _21491_/B _21588_/A _21674_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_218_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22860__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18457__A0 _28231_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14030_ _28467_/Q _14030_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26016_ _26859_/C1 _26015_/Y _26015_/A _31523_/Q _31523_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_257_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23228_ VGND VPWR _23228_/S _17036_/B _23227_/X _30218_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22253__A1 _22243_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21757__A _21769_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14730__A2 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25990__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20264__A0 _28806_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26051__C _26055_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2361_A wire2362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23159_ _30179_/D _23190_/B _23158_/X _30179_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_164_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30229__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2459_A _23596_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input40_A irq[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17680__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16483__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_3310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26986__C _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_3933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17680__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28276__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27967_ _27967_/Q _31938_/CLK _27967_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_15981_ _16817_/A2 _16817_/A1 _29010_/Q _15981_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_20_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20016__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29706_ _29706_/Q _30430_/CLK _29706_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29521__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17720_ VGND VPWR _17720_/S _17719_/X _17672_/X _17720_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_163_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14932_ VGND VPWR _14932_/X _14931_/X _14930_/X _14642_/S _15631_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_26918_ _31942_/Q wire1573/X _31942_/D wire2340/X wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23691__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20567__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2626_A _14215_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27898_ _27898_/Q _32078_/CLK _27898_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_131_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_5248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_3999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_41 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_2083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25043__C_N wire1296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16235__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17432__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17651_ _17651_/B _17651_/Y _17662_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_144_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29637_ _29637_/Q _30863_/CLK _29637_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17432__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_1236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14863_ _16081_/A2 _14883_/A1 _29279_/Q _14863_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30379__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26849_ _26859_/C1 _26848_/Y wire749/X hold181/A _31874_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_226_4656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20600__S _20604_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14246__B2 _14263_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23505__A1 _28391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15443__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_1941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31624__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16602_ VGND VPWR _16942_/S _29477_/Q _32131_/Q _16602_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24702__B1 _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13814_ _31132_/Q _13814_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_204_4910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20319__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29568_ _29568_/Q _30339_/CLK _29568_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17582_ _17563_/B _17581_/X _17582_/Y _17530_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_105_4318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15994__A1 wire1053/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14797__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14794_ VGND VPWR _14794_/S _29590_/Q _29622_/Q _14794_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19185__A1 _28362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29671__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19321_ _19335_/B _28046_/Q _19320_/X _19321_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_16533_ _16533_/X _16967_/A1 _16530_/X _16532_/X _16784_/A3 _16528_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28519_ _28519_/Q _32548_/CLK _28519_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_73_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13745_ _31406_/Q _13745_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_183_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23160__D_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25258__A1 hold92/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29499_ _29499_/Q _30404_/CLK _29499_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_232_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17735__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_4987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14537__C _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31530_ _31530_/Q _31694_/CLK _31530_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19252_ _19251_/X _19336_/B1 _19375_/A2 _28170_/Q _19252_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_38_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16464_ _16878_/A2 _16878_/A1 _30503_/Q _16464_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14549__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_3202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4007_A wire4008/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24466__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_4121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23808__A2 wire1605/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22527__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31774__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output496_A _28658_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18203_ _18203_/X _18201_/A _18244_/A wire3892/X _18163_/B wire3712/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_142_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15415_ VGND VPWR _15415_/X _15414_/X _15413_/X _15543_/S _15744_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XPHY_470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14393__A_N _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31461_ VGND VPWR _31461_/D _31470_/CLK _31461_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19183_ _28295_/Q _19183_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XPHY_481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16395_ VGND VPWR _16395_/X _16394_/X _16653_/B1 _16389_/X _16384_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_259_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_4329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16525__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26207__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19342__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18134_ VGND VPWR _18144_/S wire3869/X _28062_/Q _28062_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30412_ _30412_/Q _30412_/CLK _30412_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_3786 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15346_ VGND VPWR _15346_/X _15718_/B1 _15757_/C1 _15345_/X _15344_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_177_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22492__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31392_ VGND VPWR _31392_/D _32417_/CLK _31392_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_192_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output663_A wire2722/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18160__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31004__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18065_ VGND VPWR _18078_/S wire3878/X _27995_/Q _27995_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30343_ _30343_/Q _32379_/CLK _30343_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16171__A1 wire918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15277_ VGND VPWR _15277_/S _15276_/X _15275_/X _15277_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_3450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold107 hold107/A hold107/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_233_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold118 hold118/A hold118/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_211_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25784__D _31418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29051__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17016_ _14334_/B _29878_/Q _29723_/Q _21459_/D _21661_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 Xhold129 hold129/A hold129/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23358__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14228_ VGND VPWR _14228_/X _14300_/B _14300_/A _29964_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__21667__A _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25139__A _31205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30274_ _30274_/Q _30274_/CLK _30274_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14721__A2 _14648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25981__A2 wire797/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20255__A0 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_5104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18999__A1 _18999_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28619__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16459__C1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32013_ _32013_/Q _32015_/CLK _32013_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_20_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23992__A1 _28464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14159_ _14159_/Y _14159_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_16 XFILLER_211_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2301_A wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24978__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31154__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16474__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_1923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26930__A1 _31954_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18967_ _18960_/X wire1896/X _22090_/B1 _18962_/X _18967_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_214_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold29_A hold29/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26930__B2 wire2684/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18259__C_N _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_4390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_4294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17880__A _24588_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17918_ VGND VPWR _18087_/B _30414_/Q _17918_/X _30484_/Q _30413_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_3_2724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20558__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18898_ VGND VPWR _18906_/S _18897_/X _18896_/X _18898_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21755__B1 _21660_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28769__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire712_A wire712/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16226__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_3318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1191 VPWR VGND _15350_/B1 wire1199/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_58_2704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17849_ _17874_/A2 _31728_/Q _17848_/X _17849_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19963__A3 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20510__S _20515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18187__S _18222_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15434__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14237__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13913__A _28584_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20860_ VGND VPWR _20866_/S _30228_/Q _29390_/Q _20860_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15985__A1 _16449_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21507__B1 _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20618__A_N _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19519_ wire883/A _25022_/A _25022_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_241_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_2177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30865__D _30865_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20791_ VGND VPWR _20809_/S _29304_/Q _27680_/A1 _29304_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17187__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25249__A1 _29865_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length908_A _16821_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25249__B2 hold98/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18923__A1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17726__A2 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22530_ VGND VPWR _22551_/S _29819_/Q _30030_/Q _30030_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_5277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_5228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31728_ _31728_/Q _31738_/CLK _31728_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26997__A1 _31982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20730__A1 wire2002/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3107_A _14365_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16934__B1 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24457__C1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22461_ _30332_/D _22460_/X _22513_/A2 _17029_/X _29991_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_202_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31659_ VGND VPWR _31659_/D _32036_/CLK _31659_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__16435__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18216__A _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28149__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24472__A2 wire798/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_2623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24200_ wire1629/A _24200_/X _14147_/Y _26949_/A _28484_/Q _28580_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XFILLER_195_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21412_ _21842_/A _21424_/B _21424_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_238_3837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22483__A1 _17120_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25180_ _25180_/X _31218_/Q _31220_/Q _31219_/Q _25180_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__26749__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22392_ VGND VPWR _22613_/S _29951_/Q wire832/X _29951_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14960__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23680__B1 _23679_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_3127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_4885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24131_ _24131_/X _24205_/B1 _30643_/Q _30707_/Q _24273_/C VGND VPWR wire1252/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_89_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21343_ _21343_/X _29729_/Q _21462_/B _21464_/B _21340_/X _21419_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_156_3548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_1944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16162__A1 _16415_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18650__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23776__B _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23027__A3 _32507_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25421__A1 _31360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_1966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22680__B _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16701__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18439__A0 _28213_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23268__S _23268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22235__A1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21038__A2 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24062_ _28470_/Q _24139_/A2 _24062_/X _28598_/Q _19858_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__25049__A wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21274_ _21274_/X _14435_/Y wire3112/A wire1855/A _21830_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_214_5294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14712__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19636__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25972__A2 _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28299__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20246__A0 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19692__D _20106_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23013_ VGND VPWR _31395_/Q _23012_/X _23011_/X _23013_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20912__C _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15575__A _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20225_ VGND VPWR _20225_/S _28770_/Q _27708_/A1 _28770_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29544__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3616 VPWR VGND wire3616/X wire3616/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_137_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23983__B2 _30543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28870_ _28870_/Q _32403_/CLK _28870_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_1135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3627 VPWR VGND wire3627/X _30753_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17111__B1 _21649_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21994__A0 _17172_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19651__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3638 VPWR VGND _30711_/D hold482/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24888__A _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_2795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3649 VPWR VGND wire3649/X _30478_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27821_ hold451/A _27821_/B _27821_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__25185__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16465__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23792__A _23792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15122__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20156_ _25904_/A _20155_/Y _20192_/A2 _28722_/Q _28722_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_186_4935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26921__A1 hold225/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_193_core_clk _31722_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_115_2555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_1873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2937 VPWR VGND _20302_/S _20315_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26921__B2 wire2352/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2948 VPWR VGND _20290_/S _20282_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_281_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15673__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30521__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_3379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31647__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27752_ VGND VPWR _27756_/S _25029_/B _32480_/Q _32480_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_122_core_clk _32321_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_281_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_2479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24964_ _24964_/X _31126_/Q _25652_/A _25017_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21746__A0 _17017_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20087_ _26148_/A _20086_/Y _20106_/A _28689_/Q _28689_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_262_5546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_3622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3908_A wire3909/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29694__CLK _29697_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17414__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26703_ _26702_/Y _26859_/C1 _31804_/Q _26720_/A _31804_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_257_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23915_ wire1621/X _23914_/X _31126_/Q _24081_/A3 _23915_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26134__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17414__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27683_ VGND VPWR _27683_/S wire1833/X _32417_/Q _32417_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_247_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18097__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24895_ _24895_/Y _24955_/A _19530_/B _19617_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_163_3508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_1780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20161__C_N _24925_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_1977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26685__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16768__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29422_ _29422_/Q _30406_/CLK _29422_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13823__A _31123_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21761__A3 _17015_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23499__A0 _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_503 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26634_ _26633_/X _26950_/C _26637_/B _31887_/Q _31782_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_204_4217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23846_ _30843_/D _24310_/B _23846_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__14779__A2 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15976__A1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_514 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27711__B _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_525 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30671__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31797__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_536 _30570_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24160__A1 _30701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29353_ _29353_/Q _31955_/CLK _29353_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_547 _30626_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19672__D_N _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25512__A _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26565_ _26565_/X _31838_/Q wire3454/X wire817/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_39_2670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_161_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_558 input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23777_ wire1875/X _23740_/X _19857_/B wire817/X _23777_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_246_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20989_ _20989_/Y _20989_/A _27233_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__18825__S _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_569 input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18914__A1 _28381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19590__A_N _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28304_ _28304_/Q _30483_/CLK _28304_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25869__D _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26327__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25516_ _31337_/Q _25515_/Y _31337_/D _25513_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19510__A _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22728_ _22716_/B _22728_/Y _22727_/Y _22726_/X _22709_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 X_29284_ _29284_/Q _32122_/CLK _29284_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20182__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2207_A _19570_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16925__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26496_ _26496_/X _31706_/Q _26495_/X _26492_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_122_2504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20656__A _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21251__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28235_ _28235_/Q _31282_/CLK _28235_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31027__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmgmt_core_wrapper_4219 mgmt_core_wrapper_4219/LO flash_io3_oeb VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__conb_1 X_25447_ _25510_/D hold178/X _25447_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_259_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22659_ _22659_/X _22659_/C _22659_/A _22659_/B _22659_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_52_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14400__A1 _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24463__A2 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20375__B wire836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15200_ _15597_/A2 _15200_/X _15199_/X _15517_/A1 _29224_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__29074__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21277__A2 _18540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22474__A1 _22512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16180_ VGND VPWR _16180_/X _16180_/B _16180_/A wire923/X VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__18678__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28166_ _28166_/Q _30378_/CLK _28166_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_194_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25378_ VPWR VGND _31278_/D _25378_/B _26238_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_input88_A la_input[23] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_4914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22871__A _22871_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_1051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20485__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15131_ VGND VPWR _15627_/S _29599_/Q _29631_/Q _15131_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_273_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27117_ _27117_/C1 _27116_/X _27117_/A2 _32036_/Q _32036_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_4482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24329_ _24328_/X _24357_/B1 wire1672/X _24353_/A1 _30967_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_48_2906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28097_ _28097_/Q _30339_/CLK _28097_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_48_2917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2576_A _19387_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18693__A3 _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19890__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3416_A wire3428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30051__CLK _30051_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31177__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15062_ VGND VPWR _15639_/S _28094_/Q _29050_/Q _15062_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21487__A _30358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27048_ _27048_/C _32002_/D _27051_/A _27048_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_4_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14703__A2 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15900__A1 _29458_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32422__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20237__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14013_ _28484_/Q _14013_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_253_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5424 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26357__B1_N _26356_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20822__C _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23974__B2 _30737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16080__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27165__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19870_ VGND VPWR wire2231/X _26687_/D _25738_/B _19870_/X _26153_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20788__A1 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25109__D _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25176__B1 _31219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18821_ VGND VPWR _19333_/B _28182_/Q _28214_/Q _18821_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28911__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3977_A _29499_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17653__B2 _31719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18850__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26912__A1 _31936_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28999_ _28999_/Q _32365_/CLK _28999_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_5110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3785_A hold403/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14467__B2 _14086_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19391__S _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24923__B1 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18752_ _18749_/X _18751_/X _22090_/B1 _18752_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 XFILLER_111_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15964_ _15964_/X _28913_/Q wire1021/X _16039_/B2 wire933/X _15963_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_133_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_5143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23852__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24310__B _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17405__A1 _32284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17703_ _17539_/C _17702_/X _31723_/D _17524_/B _17700_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_111_2953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14915_ _16415_/A2 _15590_/A1 _29248_/Q _14915_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_111_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_146_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20330__S _20335_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19945__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30961_ _30961_/Q _32039_/CLK _30961_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_output411_A _13884_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18683_ _30331_/Q _29812_/Q _29811_/Q _18683_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_75_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15895_ _29655_/D _15866_/X _15894_/X wire898/X _15875_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_128_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output509_A wire4042/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16759__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_5603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13733__A _31979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_4355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17634_ _17634_/X _17777_/B _17685_/A _17553_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_1_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14846_ _15621_/A2 _14846_/X _14845_/X _15630_/A1 _28780_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_198_5518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15967__A1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_5_0_core_clk clkbuf_3_5_1_core_clk/A clkbuf_3_5_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_wire4124_A _28559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26140__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30892_ _30892_/Q _32114_/CLK _30892_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20960__A1 hold209/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19158__A1 _28198_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21372__D _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23641__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24151__B2 wire3639/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17565_ VGND VPWR _17565_/X _17596_/C _17576_/A _17565_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_264_1342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_1965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14777_ _32346_/Q _15233_/B1 _15575_/A _15575_/C _14777_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_105_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27340__C _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22162__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17708__A2 _17537_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19304_ _19297_/X _20868_/S wire1900/A _19299_/X _19304_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22701__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_5417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16516_ _16515_/X _16825_/S wire989/X _32320_/Q _16516_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_53_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15719__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32562_ hold303/A _32562_/CLK _32562_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_225_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_278_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29417__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20712__A1 _29228_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17496_ _26441_/B _31614_/Q _26464_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_259_4240 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21161__S _21167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_2667 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31513_ _31513_/Q _31798_/CLK _31513_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19235_ _19379_/B _27914_/Q _19234_/X _19235_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_231_192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16447_ _16447_/A2 _16447_/A1 _29320_/Q _16447_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_87_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16392__A1 _16415_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32493_ _32493_/Q _32543_/CLK _32493_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_255_4115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23111__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24980__B _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22465__A1 _17047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31444_ _31444_/Q _31462_/CLK _31444_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19166_ _23525_/S _19165_/X _19156_/X wire1896/X _19166_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XANTENNA__18669__B1 _30286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23662__A0 _30792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_2661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21899__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16378_ _16721_/A2 _16415_/A1 _29568_/Q _16378_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_177_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14942__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_3718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26253__A _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20476__A0 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18117_ VGND VPWR _18117_/S wire3818/X _28046_/Q _28046_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28441__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15329_ _15507_/A1 _16646_/A2 _15329_/X _15638_/A2 _28825_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__21673__C1 _21672_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29567__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16144__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19097_ _19203_/A2 _28003_/Q _19151_/S _19097_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31375_ _31375_/Q _31375_/CLK _31375_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18470__S _18491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1676_A _18766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23009__A3 _32473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17341__B1 wire2111/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27068__B _27068_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24206__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25403__A1 _31283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_4102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19793__C _27120_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19881__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22480__A4 _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22217__A1 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27783__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30326_ _30326_/Q _31921_/CLK hold373/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18048_ VGND VPWR _18048_/S _23297_/A1 _27980_/Q _27980_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_2424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_2757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15352__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23414__B1 _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25954__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20505__S _20505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4266 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19094__A0 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30544__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23965__A1 _28493_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13908__A _28589_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23965__B2 _28685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27156__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30257_ _30257_/Q _32071_/CLK _30257_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20779__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19633__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_290_1969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28591__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20010_ VGND VPWR wire2653/X wire3616/X wire851/X _20010_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_266_4200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26700__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25167__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16447__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27084__A _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18841__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30188_ _30188_/Q _30454_/CLK _30188_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_2875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19999_ _27077_/C1 _19998_/Y _20028_/A _28646_/Q _28646_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24501__A _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23178__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2885_A _20618_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16852__C1 wire1044/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3183 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30694__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19397__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20240__S _20247_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_4201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21961_ _22512_/A3 _22074_/B1 _21961_/Y _17159_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_227_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26740__A_N _31785_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16604__C1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23700_ _23700_/X wire1628/X _31560_/Q _26838_/A1 _31512_/Q _19716_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_20912_ VGND VPWR _23393_/A _30433_/Q _20912_/X _20912_/D _20912_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_247_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24680_ _24682_/B _24680_/B _24680_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__15958__A1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26131__A2 _19522_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21892_ _21892_/Y _21955_/B _21892_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_208_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14458__B _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23551__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23631_ _23631_/Y _31080_/Q wire1353/X _24865_/C wire1292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XANTENNA__15422__A3 _15402_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24142__B2 _28702_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20843_ _29352_/Q _23228_/S _29352_/D _20912_/B _20842_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_208_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18645__S _18646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14630__A1 _29304_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1184_A wire1199/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_788 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14630__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26350_ _27120_/B _24273_/D _27068_/B _26350_/X _26350_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__29097__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_3137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23562_ _30483_/D _20920_/Y _21279_/X _23561_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_123_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25051__B _25051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20164__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20774_ VGND VPWR _20780_/S _27696_/A1 _29288_/Q _29288_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16907__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21071__S _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25301_ VGND VPWR _25310_/C _31262_/Q _25341_/A _25303_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_30_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_3850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22513_ _22513_/C1 _22512_/X _22513_/A2 _17237_/X _30017_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_105_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14918__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26281_ VGND VPWR _26555_/A2 _14398_/B _26301_/B _26281_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_197_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_4373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15186__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23493_ VGND VPWR _23513_/S _28385_/Q _30433_/Q _23493_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16383__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3593_A wire3594/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14474__A hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17580__B1 _14132_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20195__B _27233_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire807 VPWR VGND wire807/X wire807/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_27_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28020_ _28020_/Q _30482_/CLK _28020_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30074__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25232_ _26236_/A _25231_/X _25264_/A2 hold102/A _31240_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_69_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22444_ VGND VPWR _22444_/X _22444_/B _29983_/Q _22444_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__22456__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire829 VPWR VGND wire829/X wire829/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23787__A _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15591__C1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14933__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22691__A _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold118_A hold118/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32445__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20467__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26163__A _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19321__A1 _28046_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25163_ VGND VPWR _25163_/X _25197_/C _25197_/A _25163_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16135__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22375_ _18312_/B _29937_/D _22374_/X _22384_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21bai_1 XANTENNA__18380__S _18388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17332__B1 _17332_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19872__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24114_ _24114_/X _24192_/A2 _31145_/Q wire1283/A _28731_/Q wire1633/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_121_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22208__A1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21326_ _29881_/Q _21459_/D _21378_/A _21326_/D _21326_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__27693__S _27710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16686__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23405__B1 _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28934__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4103 VPWR VGND wire4103/X _28645_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25094_ wire1371/X _31190_/Q _25094_/Y _25087_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_29971_ _29971_/Q _31966_/CLK _29971_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3307 _14069_/Y _21099_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_134_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_374_core_clk _32079_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_5_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20415__S _20415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20219__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4114 VPWR VGND wire4114/X _28570_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3318 wire3365/X _25660_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4125 VPWR VGND wire4125/X _28556_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3329 VPWR VGND _27131_/B wire3331/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15894__B1 wire890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22759__A2 _29887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4136 VPWR VGND wire4136/X _28463_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_251_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28922_ _28922_/Q _32426_/CLK _28922_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13818__A _31128_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24045_ _24441_/C _24045_/X _19786_/A _26949_/A _28469_/Q _28565_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XANTENNA__23956__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3402 VPWR VGND wire3402/X _32210_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19085__B1 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27147__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21257_ VGND VPWR _23532_/S _29719_/Q _30435_/Q _29719_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold460 hold460/A hold460/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xfanout2606 _23873_/D _14266_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xclkbuf_leaf_303_core_clk _30474_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_5_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4158 VPWR VGND wire4158/X wire4159/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold471 hold471/A hold471/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_hold487_A hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3424 VPWR VGND _25160_/A wire3425/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4169 VPWR VGND _30758_/D wire4170/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold482 hold482/A hold482/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_8_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3435 VPWR VGND wire3435/X wire3436/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16438__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17635__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold493 hold493/A hold493/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_250_1408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20208_ VGND VPWR _20223_/S _28753_/Q wire1826/X _28753_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18574__C_N _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2701 VPWR VGND wire2701/X hold137/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3446 VPWR VGND wire3446/X _31936_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21431__A2 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28853_ _28853_/Q _32575_/CLK _28853_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17635__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18832__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2712 wire2713/X _19611_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21188_ VGND VPWR _21195_/S _29630_/Q _27248_/A0 _29630_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_5018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3468 VPWR VGND _24645_/B _31462_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_41_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1927 wire1930/X _19278_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_284_4333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15646__B1 _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1985_A _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3479 wire3479/A _25691_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2734 VPWR VGND wire2734/X _14151_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout940 VPWR VGND _16458_/S fanout941/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1938 VPWR VGND wire1939/A wire1948/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27804_ _32525_/Q _27803_/Y _32526_/D _32526_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__24905__B1 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2745 VPWR VGND wire2745/X _19637_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_3846 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20139_ _20139_/X _28714_/Q _25703_/A _20162_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19505__A _19505_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15110__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input142_A la_input[72] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28784_ _28784_/Q _32322_/CLK _28784_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_76_4036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26370__A2 _26872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2157_A _25073_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout973 _16929_/S _16961_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_25996_ _25567_/B _25995_/Y _26014_/A2 _31513_/Q _31513_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_285_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2778 VPWR VGND _27707_/S _27709_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19388__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_5354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21246__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23184__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2789 _27627_/S _27626_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_max_length3293_A _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27735_ VGND VPWR _27737_/S _25033_/B _32466_/Q _32466_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_160_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24947_ _24947_/Y _24947_/B _24947_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_182_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19224__B _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22392__A0 wire832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17399__B1 wire2024/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15244__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14700_ wire3249/X wire1727/X _14700_/X _14705_/B1 _28744_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__22931__A2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18060__A1 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_3436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15680_ _16959_/A2 wire3303/A _28770_/Q _15680_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27666_ VGND VPWR _27667_/S _19732_/A _32403_/Q _32403_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26122__A2 _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2324_A _14213_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28314__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24878_ _24481_/X _31085_/D _26544_/C1 _24877_/Y wire863/X wire2255/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA_300 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_311 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14368__B _31008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24133__A1 _28541_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_322 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29405_ _29405_/Q _30477_/CLK _29405_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_3630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24133__B2 _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14631_ VGND VPWR _14818_/S _30888_/Q _29166_/Q _14631_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26617_ _26617_/X _31851_/Q wire3452/X _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__16610__A2 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15413__A3 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_333 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23829_ VGND VPWR _23829_/X _31886_/Q _24281_/A _24281_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_2_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2066 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_344 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27597_ VGND VPWR _32340_/Q _27595_/X _27596_/Y _32340_/D _27597_/B2 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__14621__A1 _28405_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22144__B1 _21032_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_355 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_366 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_90_core_clk _32311_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_17350_ _30941_/Q _17350_/X _30975_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_29336_ _29451_/D _31970_/CLK hold398/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_377 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14562_ _14562_/X _15296_/B1 wire1104/X _32109_/Q _14930_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA__30417__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22695__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26548_ _26184_/A _26547_/Y _26543_/B _31757_/Q _31757_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_388 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_1537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23892__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_399 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19560__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16301_ _16291_/Y wire904/X _16300_/X _16299_/Y _16301_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_141_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14909__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28464__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17281_ _17281_/X wire4182/X wire3558/A _17447_/B2 wire2054/X VGND VPWR _17280_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 X_29267_ _29267_/Q _29580_/CLK _29267_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16374__A1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15177__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14493_ hold436/A _23342_/C _22078_/A hold398/A _14493_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26479_ _26488_/C _26489_/C _26488_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_wire2693_A wire2694/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14384__A _31019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25633__A1 _31370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19020_ _19016_/X _19019_/X _19094_/S _19018_/X _19020_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28218_ _28218_/Q _32401_/CLK _28218_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16232_ VGND VPWR _16232_/X _16231_/X _16230_/X _16841_/C1 wire1055/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22447__A1 _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23644__A0 _30774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_WE0[0] _17909_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29198_ _29198_/Q _32112_/CLK _29198_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_278_2768 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20458__A0 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30567__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16163_ _16815_/A2 _16163_/X _16162_/X _15975_/S _30495_/Q _16448_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28149_ _28149_/Q _32440_/CLK _28149_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16126__A1 _28090_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26189__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17323__B1 hold51/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21929__B _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19863__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31812__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length961 wire962/X _16949_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22462__A4 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15114_ VGND VPWR _15114_/X _15113_/X _15112_/X _15752_/B1 _15762_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__24305__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31160_ _31160_/Q _32499_/CLK _31160_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__17874__A1 _31731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25397__B1 _31283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16677__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16094_ VGND VPWR _16826_/S _28949_/Q _29247_/Q _16094_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_252_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26594__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25936__A2 _25836_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20325__S _20327_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14688__A1 _29008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26801__A _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15885__B1 _32415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14688__B2 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23947__A1 _28459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30111_ _30111_/Q _30474_/CLK _30111_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20552__C _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15045_ _15045_/X _15609_/B1 _15277_/S _28753_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_19922_ VGND VPWR _20122_/B _20061_/C wire1328/X _19922_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_272_1633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19076__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27138__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31091_ VGND VPWR _31091_/D _32543_/CLK _31091_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_253_1021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4074_A wire4075/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1080 VPWR VGND _14919_/C1 wire1081/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21958__B1 _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16429__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17626__A1 _17625_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23636__S _31086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30042_ VGND VPWR _30042_/D _30471_/CLK _30042_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_267_5265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19853_ VGND VPWR _26898_/B _19520_/B _19853_/A2 _19853_/X _27007_/A _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_46_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_core.RAM256_Di0[28] wire2396/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22540__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31962__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output626_A _14302_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4212 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_5528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18804_ wire1994/X _27925_/Q wire1932/X _18804_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_111_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3980 VPWR VGND wire3980/X _29495_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_280_5421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19784_ _19784_/Y _24276_/C _19784_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 Xwire3991 VPWR VGND wire3991/X _29385_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25136__B _25136_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26361__A2 wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25164__A3 _24576_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1257_A _24077_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16996_ _16996_/X _16993_/Y _21676_/B _17078_/C _29876_/Q _21778_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_0_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21156__S _21168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_3251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18735_ _18727_/X _18734_/X wire1900/X _18729_/X _18735_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19918__A3 wire2143/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15947_ wire1533/A wire3276/X _28977_/Q _15947_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19134__B _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21186__A1 _29628_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31993_ _31993_/Q _32583_/CLK _31993_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_40_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14860__A1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22383__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26649__B1 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15154__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32318__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21725__A3 hold449/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22922__A2 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18051__A1 wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27310__A1 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18666_ _13831_/Y _18666_/B _18666_/C _18668_/C _18666_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 X_30944_ _30944_/Q _32277_/CLK _30944_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20995__S _20999_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15878_ wire1004/X wire1476/X _28775_/Q _15878_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_181_3438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24124__A1 _24124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23371__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_1869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25321__B1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17617_ _17537_/B _17616_/Y _17685_/A _17833_/S _17617_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_14829_ VGND VPWR _14829_/X _14826_/X _14828_/X _15610_/B1 _14829_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_224_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_3812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14993__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30875_ _30875_/Q _32306_/CLK _30875_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18597_ VGND VPWR _18598_/S wire3904/X _28311_/Q _28311_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_162_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18465__S _18465_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28807__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27070__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19788__C _19788_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25872__A1 _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14612__B2 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30097__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27778__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17548_ _31708_/Q _17539_/B _17548_/X _31707_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20146__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold96_A hold96/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23883__B1 _23881_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31342__CLK _31977_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32468__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20697__A0 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32545_ _32545_/Q _32545_/CLK _32545_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_159_3908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16365__A1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15168__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17479_ _26488_/A _17479_/X _17488_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_221_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25624__A1 wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19218_ _19218_/X _19368_/D1 _28297_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_220_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_13_1_core_clk clkbuf_5_13_1_core_clk/X clkbuf_5_13_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_wire877_A wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20490_ VGND VPWR _20495_/S _27237_/A0 _29008_/Q _29008_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14915__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23635__B1 wire1330/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32476_ _32476_/Q _32544_/CLK _32476_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28957__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24832__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20449__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19303__A1 _28077_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27282__C_N _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17809__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31427_ hold226/A _32527_/CLK _31427_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19149_ VGND VPWR _19185_/S _28038_/Q _28006_/Q _19149_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31492__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21110__A1 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17314__B1 _17332_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16713__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19854__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14128__B1 _29492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_1976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16668__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17865__A1 _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22160_ _22181_/B2 _22159_/X _22160_/X _30099_/Q wire2284/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_173_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31358_ VGND VPWR _31358_/D _32562_/CLK _31358_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__20235__S _20257_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25927__A2 _31479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_48_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14679__A1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput510 wire4039/X la_output[121] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_2565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_3370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15876__B1 _28839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput521 _31107_/Q la_output[16] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_268_5029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21111_ VGND VPWR _21116_/S _27237_/A0 _29555_/Q _29555_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_4287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput532 _31117_/Q la_output[26] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27981__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30309_ _30309_/Q _30398_/CLK _30309_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19067__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput543 _28713_/Q la_output[36] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22091_ _22513_/C1 _22090_/X wire828/A _29813_/Q _29813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_285_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 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NF_sky130_fd_sc_hd__buf_12 XFILLER_25_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17617__A1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput576 _28679_/Q la_output[66] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21042_ VGND VPWR _21051_/B _30038_/Q _29503_/Q _29503_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23546__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22610__A1 hold155/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18814__B1 wire2281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput587 _28689_/Q la_output[76] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 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XFILLER_71_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26333_ _26333_/B _26333_/X _26335_/A _26335_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__21885__C1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19995__A _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23545_ VGND VPWR _23560_/S hold483/A _30036_/Q _30466_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16356__A1 wire921/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15159__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_1267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20757_ VGND VPWR _20784_/S _27234_/A0 _29271_/Q _29271_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_2282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3975_A _29499_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25076__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25615__A1 wire3497/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31835__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25615__B2 hold100/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_88_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29052_ _29052_/Q _31959_/CLK _29052_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22429__A1 _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26264_ _26509_/D _26263_/Y _26263_/A _31659_/Q _31620_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_101_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_2277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23476_ VGND VPWR _23496_/S _23475_/X wire3444/X _30424_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_251_5011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24969__A3 _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20688_ _29206_/D _20684_/X _24442_/C _20687_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_84_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29882__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25091__A2 wire1301/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3944 VPWR VGND _22618_/A1 _22580_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28003_ _28003_/Q _30424_/CLK _28003_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_2766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25215_ _24572_/B _25214_/X _31363_/Q _25416_/A _25215_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xmax_length3955 VPWR VGND _23061_/C _29709_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_14_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17719__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22427_ VPWR VGND _22427_/X _29979_/Q _22427_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_84_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27368__A1 _32221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26195_ _31586_/Q _26227_/A2 _26196_/B _32276_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_273_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3977 VPWR VGND wire3976/A _29499_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19845__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_2868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16659__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17856__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20486__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25146_ _25144_/Y _25148_/A _31207_/D _25145_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__15316__C1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22358_ _22358_/X wire3213/X _18271_/X wire3712/X _22372_/A2 _29757_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_156_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31985__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26040__A1 _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3115 VPWR VGND _23417_/A _22513_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20372__C _26837_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23929__A1 _28458_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29112__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21309_ _21310_/B _21309_/A _21309_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__23929__B2 _28586_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_2308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25077_ _25081_/A _24947_/B _25077_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29954_ _29954_/Q _30057_/CLK _29954_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24051__B1 _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15331__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22289_ VGND VPWR _23365_/S _29875_/Q _29134_/Q _29875_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26591__A2 _23748_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3148 _22135_/A _22104_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_254_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3114_A _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3159 VPWR VGND wire3160/A _18590_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_254_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28905_ _28905_/Q _32523_/CLK _28905_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24028_ _24028_/X _24026_/X _28531_/Q _24163_/B2 _19718_/B VGND VPWR wire811/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_264_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22601__A1 hold131/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3232 _14146_/B wire3232/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24779__C _25836_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17608__B2 _31713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold290 hold290/A hold290/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xfanout2436 wire2440/X _27260_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_1_4405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3243 wire3243/X wire3243/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_251_2963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29885_ _29885_/Q _31910_/CLK _29885_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_278_663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1713 VPWR VGND _22307_/S _23376_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2458 VPWR VGND wire2461/A _23564_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_238_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31215__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2520 VPWR VGND _20722_/S _20720_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_3738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_5449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1735 _23236_/B _23395_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3276 VPWR VGND wire3276/X wire3276/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18281__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16850_ _16878_/A2 _16878_/A1 _29331_/Q _16850_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28836_ _28836_/Q _32355_/CLK _28836_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_4835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21484__B _21484_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3287 VPWR VGND wire3287/X wire3287/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26343__A2 wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2539_A _20486_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3298 VPWR VGND wire3298/X wire3298/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29262__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_2824 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23157__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15801_ wire1004/X wire1476/X _28773_/Q _15801_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_227_5260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3675_A _23491_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1779 _23671_/A1 _18328_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_284_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16831__A2 wire999/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2586 VPWR VGND _22243_/C _21211_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout792 VPWR VGND _25021_/A2 _24957_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_2991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16781_ _16781_/A2 wire3283/A _29191_/Q _16781_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28767_ _28767_/Q _32426_/CLK _28767_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25979_ _25978_/X _31505_/Q _31505_/D _25977_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xwire2597 _14396_/Y wire2597/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_13993_ _28504_/Q _13993_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_21_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14842__A1 _15286_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22365__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_3834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18520_ VGND VPWR _18523_/S wire3846/X _28292_/Q _28292_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_38_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18033__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27718_ VGND VPWR _27719_/S wire2222/A _32451_/Q _32451_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15732_ _15751_/A1 _16874_/A2 _15732_/X _15738_/A2 _29647_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 Xwire1885 VPWR VGND wire1885/X wire1885/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19230__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2706_A _14163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1896 VPWR VGND wire1896/X wire1896/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20915__A1 _18554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28698_ _28698_/Q _31877_/CLK _28698_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31365__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24106__A1 _24101_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18793__B _18795_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18584__A2 _14309_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19781__A1 _28547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18451_ VGND VPWR _18458_/S wire3859/X _28225_/Q _28225_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27843__A2 _32544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15663_ _15663_/X _28110_/Q _15737_/B1 _15737_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_27649_ _27658_/B _27657_/S _31397_/Q _27649_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_106_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_130 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22117__B1 _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17792__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_141 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_152 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17402_ wire3561/X _31925_/Q _17402_/X _17272_/A wire2082/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_208_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15702__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14614_ VGND VPWR _14614_/X _14613_/X _14612_/X _14642_/S _14928_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_280_1924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_163 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22668__A1 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30660_ hold358/A _30866_/CLK _30660_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_102_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18382_ VGND VPWR _18398_/S wire3866/X _28159_/Q _28159_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_174 _23890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15594_ _16791_/A2 _15607_/A1 _28832_/Q _15594_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_54_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_185 _17881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19533__A1 _28454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_196 _29075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29319_ _29319_/Q _32575_/CLK _29319_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17333_ VGND VPWR _17329_/X _17333_/X _17332_/X _17272_/A wire2116/X _17330_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_180_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14545_ _14545_/Y _14545_/B _14545_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__16347__A1 wire3237/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30591_ _30591_/Q _32010_/CLK _30592_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20143__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21340__A1 _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24409__A2 wire2296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25606__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26803__B1 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32330_ _32330_/Q _32442_/CLK _32330_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17264_ VGND VPWR _17263_/X wire2296/A _29842_/D _17245_/X _32294_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 X_14476_ _30439_/Q _14476_/X _29454_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_wire1005_A wire1005/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23617__B1 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_296_core_clk _30270_/CLK clkbuf_opt_21_3_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_84_5562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22535__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23858__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25082__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output576_A _28679_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19003_ _28255_/Q _19003_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_87_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_2232 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16215_ _16725_/A _16725_/C _32053_/Q _16215_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_87_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32261_ _32261_/Q _32513_/CLK _32261_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4191_A wire4192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_225_core_clk _31754_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_17195_ _30012_/Q _22510_/A2 _17195_/X _29440_/Q _17234_/B2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21659__B _21659_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24290__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15570__A2 wire1501/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19836__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31212_ _31212_/Q _32577_/CLK _31212_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_3996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_1263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15307__C1 _15307_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16146_ VGND VPWR _16146_/X _16249_/S wire1035/X _16143_/X _16145_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_117_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22840__A1 _22838_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32192_ _32192_/Q _32513_/CLK _32192_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25909__A2 _19574_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17847__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24750__S _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19129__B _19200_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1739 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_2484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26031__A1 _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26531__A _26537_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_26_0_core_clk clkbuf_5_26_1_core_clk/A clkbuf_5_27_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_237_2273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19049__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31143_ _31143_/Q _32470_/CLK _31143_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16077_ VGND VPWR _16077_/X _16491_/S _16834_/B1 _16076_/X _16075_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_215_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24042__B1 _24041_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23874__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26582__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25385__A3 _25389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14280__C _29980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23366__S _23366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25790__A0 _31426_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23396__A2 _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15028_ wire3251/X wire1733/X _15028_/X _15609_/B1 _30783_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_170_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19905_ _19904_/X _28602_/Q _28602_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__29605__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31074_ _31074_/Q _32579_/CLK _31074_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_41_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30025_ _30025_/Q _30402_/CLK _30025_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17075__A2 _30406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32140__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1541_A _23355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19836_ _19835_/X _28570_/Q _28570_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_4_4095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26334__A2 _26333_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27229__A1_N _17504_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24986__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2992 VPWR VGND _18499_/S _18467_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_148_3609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24345__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold11_A hold11/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31708__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15625__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19767_ _26771_/A _19766_/Y _19782_/A _28540_/Q _28540_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26509__A_N _32577_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16979_ _18666_/C _16979_/A _16979_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_20_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput3 VGND VPWR input3/X debug_in VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_77_2217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14833__A1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2583_A _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24896__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_1813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29755__CLK _30233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18024__A1 wire3904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18718_ _18718_/X wire3770/A _19218_/A2 _28273_/Q _19196_/B1 _19196_/D1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_4 XFILLER_72_4220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16035__A0 _32347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19698_ _27070_/C _20061_/A _19698_/A _19698_/X _27122_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_31976_ VGND VPWR _31976_/D _32431_/CLK _31976_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19799__B wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_89 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27295__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26098__B2 _14302_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32290__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18649_ VGND VPWR _18649_/S wire3839/X _28362_/Q _28362_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30927_ _30927_/Q _31375_/CLK _30927_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_146_2632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16586__A1 _28425_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15389__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22108__B1 _22107_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25845__A1 _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30732__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31858__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_59_1972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13921__A _28576_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21660_ _14431_/Y _14429_/X _17017_/X _21660_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20119__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30858_ _30858_/Q _31522_/CLK _30858_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23856__B1 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_3254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_5022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_4466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27301__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20611_ VGND VPWR _20617_/S _27704_/A1 _29126_/Q _29126_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30873__D wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21591_ _21592_/B _21591_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__25058__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21331__A1 _21651_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20134__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30789_ _30789_/Q _31586_/CLK _30789_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_159_3705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_4441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18732__C1 _28274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23871__A3 _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_3727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23330_ VGND VPWR wire820/X _30308_/Q _17184_/X _30308_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20542_ VGND VPWR _20550_/S _29059_/Q _23663_/A1 _29059_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32528_ _32528_/Q _32528_/CLK _32528_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27062__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23608__B1 wire1292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30882__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15010__A1 wire3258/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26270__A1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23130__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29135__CLK _30262_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2517 VPWR VGND _20710_/S _20714_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23261_ VGND VPWR _23267_/S hold221/X _30244_/Q _30244_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19288__B1 _19336_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20473_ VGND VPWR _20473_/S _28992_/Q _27253_/A0 _28992_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32459_ _32459_/Q _32464_/CLK _32459_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_66_3323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_4349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21569__B _21569_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16443__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15561__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_80_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19827__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3389_A _32605_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25000_ _25000_/A wire1283/X _25000_/X _25065_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_fanout1147_A wire1151/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22212_ _22211_/X _23417_/A wire828/X hold444/A _29830_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_274_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17299__C1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17838__A1 _31731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26558__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21634__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23192_ hold395/A _23192_/A2 _23192_/X _30116_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_257_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21288__C _21486_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26022__A1 _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14471__B _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26441__A _26441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30112__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31238__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22143_ _22157_/C _29819_/Q _29821_/Q _29820_/Q _22143_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_86_2092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24033__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15313__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16510__A1 _15770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26573__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27770__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput340 _13992_/Y la_iena[84] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25230__C1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput351 _13982_/Y la_iena[94] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29285__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_2024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23276__S _23286_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput362 _13941_/Y la_oenb[103] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_151_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25057__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22074_ _22074_/A2 _22074_/B1 wire3779/X _17235_/X _22074_/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15864__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput373 _13931_/Y la_oenb[113] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26951_ _27042_/B _32002_/Q _32004_/Q _32003_/Q _32001_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__22180__S _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput384 _13921_/Y la_oenb[123] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22595__A0 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1009 _16878_/A2 wire1010/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_268_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout774_A _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput395 _13805_/Y la_oenb[18] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_273_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25902_ _25904_/A _25901_/Y _25903_/S _31468_/Q _31468_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21937__A3 hold235/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21025_ _29490_/D _29490_/Q _18703_/Y _22104_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__17066__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29670_ hold251/A _32423_/CLK _29670_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_5507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26325__A2 _14153_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26882_ _26882_/Y _26882_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_99_3165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1104 wire1104/A wire1104/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_248_847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30262__CLK _30262_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15077__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_3457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold185_A hold185/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_4882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31388__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16274__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20070__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23139__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28621_ _28621_/Q _31119_/CLK _28621_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17471__C1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25533__B1 _25511_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24336__B2 _31983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_29_core_clk _32204_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_25833_ _31440_/D _31440_/Q _25832_/Y _25830_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_112_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_4175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout941_A wire944/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22347__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_349_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14824__A1 wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1683_A _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18015__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19212__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28552_ _28552_/Q _31877_/CLK _28552_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_77_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25764_ hold413/A _27205_/B _27198_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_164_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27877__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_2177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22976_ _25691_/B _32517_/Q _22976_/X _25693_/B _32509_/Q _28901_/Q _32501_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_266_3192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27286__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16026__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27503_ VGND VPWR _27503_/S _27696_/A1 _32318_/Q _32318_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24715_ _31456_/Q _26164_/B _24714_/X _24704_/B _24711_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_4 XFILLER_93_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26628__A3 _23772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22993__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21927_ _21530_/Y _21912_/Y _21927_/Y _21538_/A _21537_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 X_28483_ _28483_/Q _31887_/CLK _28483_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16577__A1 _29026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25695_ _25694_/X _31395_/Q _31395_/D _25692_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_51_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16577__B2 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21570__A1 _30359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21284__A_N _22620_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21570__B2 _30474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13831__A _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27434_ VGND VPWR _27484_/S _32275_/Q _27433_/X _32275_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_281_2978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14588__B1 _29165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16041__A3 _16040_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2022_A _17414_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24646_ _31461_/Q _31462_/Q _24669_/A _31464_/Q _31463_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_227_1741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input105_A la_input[39] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21858_ _21858_/Y _21623_/X wire3145/X _21857_/X _21856_/Y _22063_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_1 XANTENNA__23847__B1 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18318__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19515__A1 _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21858__C1 _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20809_ VGND VPWR _20809_/S _29322_/Q _27698_/A1 _29322_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27365_ VGND VPWR _27366_/S _32219_/Q _27278_/X _32219_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24577_ hold487/A _27280_/C _25793_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XPHY_855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20125__A2 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21789_ VGND VPWR _21789_/B _21789_/Y _21789_/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_103_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29104_ _29104_/Q _32388_/CLK _29104_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23862__A3 _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25877__D _25877_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_5579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14330_ _29719_/Q _17077_/A _14331_/B _14316_/Y _14328_/Y _21778_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__26335__B _26335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26316_ _26315_/Y _26893_/C1 _31646_/Q _26327_/B _31646_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23528_ VGND VPWR _23530_/S _23527_/X _31968_/Q _30450_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_1097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21873__A2 _21879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27296_ VGND VPWR _27301_/S _32159_/Q wire2801/X _32159_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_1105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32013__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25064__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29035_ _29035_/Q _31966_/CLK _29035_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14261_ _24604_/B _23618_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 X_26247_ _31612_/Q _26247_/X _26301_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_235_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2391_A wire2391/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23459_ VGND VPWR _23453_/X _23459_/X _23458_/X _23429_/Y _23430_/X _23457_/Y VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_275_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24272__B1 _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19818__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3231_A wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16000_ _16000_/X _32346_/Q _16448_/A2 _16448_/A3 _15975_/S _15999_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_256_2137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3329_A wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17829__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input70_A la_input[122] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28502__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3796 VPWR VGND _21419_/D _21355_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14760__B1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22822__A1 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29628__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14192_ _19559_/B _14192_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 X_26178_ _31577_/D _31577_/Q _26177_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_45_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22822__B2 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26013__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14381__B _31014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25129_ _25135_/D _25142_/B _31202_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XANTENNA__32163__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24024__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16501__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27761__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25221__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_388_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24575__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30605__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_1772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17951_ _18087_/B _30414_/Q _30484_/Q _17951_/X _30413_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XFILLER_171_2758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29937_ hold489/A _31921_/CLK _29937_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20603__S _20613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22586__A0 wire3703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_60_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28652__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1510 VPWR VGND _15355_/B2 wire1521/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16902_ _16911_/A2 _16902_/X _16901_/X _16884_/S _29614_/Q _16960_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__24302__C _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18254__A1 wire3812/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3062 _18039_/S _18048_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_239_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2823_A _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_4280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_3828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27513__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17882_ _17882_/A _17884_/A _17895_/B _17895_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 Xwire3073 VPWR VGND _18008_/S _18007_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1532 VPWR VGND wire1533/A wire1554/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29868_ _29868_/Q _32294_/CLK _29868_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_97_3839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15068__A1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1543 _16417_/A2 _16840_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout2288 VPWR VGND _17870_/A2 _17495_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_268_4692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_5268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3095 VPWR VGND wire3095/X _17314_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24327__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2350 wire2351/X wire2350/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_269_1808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19621_ _19621_/B _19558_/A _19772_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 Xwire2361 VPWR VGND wire2361/X wire2362/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16804__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16833_ VGND VPWR _16837_/S _28109_/Q _29065_/Q _16833_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28819_ _28819_/Q _32557_/CLK _28819_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26721__C1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_125_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1576 _25266_/Y _25414_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_95_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2383 VPWR VGND wire2383/X wire2384/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14276__C1 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29799_ hold428/A _30456_/CLK _29799_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14815__A1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24878__A2 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2394 VPWR VGND wire2394/X wire2395/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30755__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_3953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18006__A1 wire3847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1660 VPWR VGND wire1660/X _19641_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_56_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31830_ _31830_/Q _31894_/CLK _31830_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19552_ VGND VPWR wire2648/X _19522_/A _19598_/A _19552_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19203__B1 wire1942/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19756__D_N _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16764_ _16911_/A2 _16764_/X _16763_/X _16884_/S _30511_/Q _16928_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__29008__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13976_ _13976_/Y _28521_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 Xwire1682 VPWR VGND wire1682/X wire1682/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_108_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4037_A wire4037/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27277__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_1942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_3533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21010__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20839__A _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1693 wire1693/A wire1693/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16017__B1 _29011_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14291__A2 _17024_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18503_ VGND VPWR _18503_/S wire3910/X _28275_/Q _28275_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15715_ VGND VPWR _15715_/X _15712_/X _15714_/X _15543_/S _15762_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_56_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22757__C _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22984__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31761_ VGND VPWR _31761_/D _31761_/CLK _31761_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19483_ _31315_/Q _19485_/C _31316_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__16568__A1 _29476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16695_ VGND VPWR _16918_/S _32066_/Q _29125_/Q _16695_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_169_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16568__B2 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25827__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_2553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30712_ VGND VPWR input87/X _32498_/CLK hold482/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18434_ _18434_/B _18434_/X _30415_/Q _18434_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_223_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_276_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15646_ wire3261/X _16874_/A2 _15646_/X _15646_/B1 _32369_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_wire4204_A wire4204/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31692_ _31692_/Q _32107_/CLK _31692_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_output693_A _14123_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15240__A1 _29225_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27029__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28032__CLK _30452_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31789__D _31789_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21849__C1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29158__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25430__A _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_8_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30643_ _30643_/Q _31801_/CLK hold278/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18365_ VGND VPWR _18365_/S _29871_/Q _28143_/Q _28143_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30693__D _30694_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15577_ _15577_/A2 _15610_/B1 _29579_/Q _15435_/A _15577_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_19_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_406_core_clk _31158_/CLK clkbuf_opt_5_2_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17517__B1 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_4639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15791__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23853__A3 _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26245__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17316_ _17316_/A _17316_/B _27006_/A _29849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_106_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14528_ _14527_/X _14525_/X _14503_/Y _14528_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_258_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28163__D _28163_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26788__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30574_ hold134/A _32552_/CLK _30574_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18296_ _18295_/Y _18269_/X wire3174/X _18296_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18190__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26252__A1 _31665_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19785__D _19785_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30135__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32313_ _32313_/Q _32425_/CLK _32313_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_3058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23066__A1 _30426_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17247_ wire2130/X _17446_/B2 _17247_/X _17295_/B2 wire4166/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_15_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14459_ VPWR VGND _14459_/X hold480/A _14459_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__24263__B1 _24467_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_4549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19809__A2 wire1334/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32506__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28182__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32244_ _32244_/Q _32545_/CLK _32244_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17178_ VGND VPWR _17223_/S _30209_/Q _30398_/Q _17178_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_67_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold59_A hk_dat_i[18] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26261__A _31619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27201__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_3247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16129_ VGND VPWR _16129_/X _16120_/S _16807_/B1 _16126_/X _16128_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__17883__A _24600_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17296__A2 wire2048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18493__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24015__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32175_ _32175_/Q _32467_/CLK _32175_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27752__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27076__B _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26555__A2 _26555_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_164_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30285__CLK _30285_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire742_A wire742/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_5179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27791__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22026__C1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31126_ _31126_/Q _32529_/CLK _31126_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_174_2393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_2967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31530__CLK _31694_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20513__S _20517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22577__A0 _22576_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24030__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21919__A3 hold250/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18245__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31057_ _31057_/Q _32295_/CLK _31057_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18245__B2 _29854_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19442__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27504__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_3376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15059__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20052__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30008_ _30008_/Q _30399_/CLK _30008_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24318__B2 _31974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25515__B1 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27092__A _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19819_ VGND VPWR wire2200/X _19520_/B wire1330/A _19819_/X _27091_/C1 _19520_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_282_4645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_3349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30868__D _30868_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22329__B1 wire3160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14806__A1 wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18260__A4 _18215_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24869__A2 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31680__CLK _31689_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22830_ VGND VPWR _22830_/X _22825_/A _22822_/X _22824_/B _22829_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_74_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16008__A0 _29558_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25324__B _25334_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21001__A0 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19745__A1 _28529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22344__A3 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23125__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22761_ _22763_/A _22766_/B _22765_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_0_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31959_ _31959_/Q _31959_/CLK _31959_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21552__A1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17756__B1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25818__A1 _31434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24500_ _31042_/Q _24572_/B _25416_/B _31041_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_0_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17123__A _30217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21712_ _21712_/X _21713_/B _21713_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_206_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25480_ _19488_/X _25454_/A _25480_/Y _31320_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_241_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22692_ _22747_/C _22747_/B _21320_/A _22692_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_198_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32036__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14466__B hold410/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26491__A1 _26488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25294__A2 _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31699__D _31699_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26491__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24431_ _24437_/B _24434_/B _31015_/D _24430_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_244_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21643_ _21643_/A _21360_/A _21643_/X _21643_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_142_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_147_core_clk _32319_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__21304__A1 wire3690/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20107__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23779__B _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18653__S _18656_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21304__B2 _30477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23844__A3 _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27150_ VGND VPWR _27154_/S _27248_/A0 _32056_/Q _32056_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28525__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_3620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24362_ _32028_/Q _24370_/A2 _24362_/X _31996_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14990__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26680__B1_N _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21574_ _21574_/Y _22010_/B _22010_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_30 _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17777__B _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25046__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_41 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length3026 VPWR VGND _18388_/S _18389_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_33_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26101_ _31545_/Q _31546_/Q _31544_/Q _26100_/D _26102_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_268_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_52 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26243__B2 _32300_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18720__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23313_ VGND VPWR _23317_/S _30291_/Q _17047_/X _30291_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_28_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_63 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20525_ VGND VPWR _20545_/S _29042_/Q _27684_/A1 _29042_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31060__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27081_ _26950_/C _27080_/X wire772/X _32018_/Q _32018_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_89_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_2083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_74 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32186__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3673_A _30441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24293_ _30943_/D _24308_/C _31595_/Q _24284_/X _31672_/Q wire1351/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 Xmax_length3059 _18083_/S _18079_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_fanout1431_A _18288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_85 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26794__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_96 _14596_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26032_ _26032_/X _31527_/Q _31525_/Q _31526_/Q _31528_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__30628__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23244_ VGND VPWR _23268_/S _29492_/Q _30227_/Q _30227_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14742__B1 _32345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22804__A1 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_5544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold100_A hold100/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20456_ VGND VPWR _20481_/S _28975_/Q _27236_/A0 _28975_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_3738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20815__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28675__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_5178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_62 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18484__A1 wire3860/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24006__B1 wire1298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23175_ _23180_/B wire3739/X _23180_/A _23175_/X _29732_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__19681__B1 _19680_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20387_ VGND VPWR _20391_/S wire1840/X _28909_/Q _28909_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26546__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25203__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29920__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16495__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22126_ _22126_/X _13849_/Y _22141_/C _13848_/Y _22104_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_0_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20423__S _20425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27983_ _27983_/Q _30415_/CLK _27983_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22568__A0 _30345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18401__B _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30778__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_6_1_core_clk clkbuf_5_6_1_core_clk/X clkbuf_5_6_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_287_4578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_79_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29722_ VGND VPWR _29722_/D _31955_/CLK _29722_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__18236__A1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13826__A _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26934_ _31958_/Q wire1571/X _31958_/D wire2700/X wire1230/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_265_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_4207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22057_ _22056_/X _21597_/Y _22057_/X _21966_/A _17228_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_4 XFILLER_248_622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19433__B1 wire4141/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_5517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20043__A1 _24124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24309__A1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19984__A1 _28640_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17444__C1 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21008_ VGND VPWR _21008_/S _29473_/Q _27154_/A1 _29473_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25506__B1 _31333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_1388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23780__A2 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29653_ _29653_/Q _32421_/CLK _29653_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_22_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26865_ _25512_/A _26864_/Y wire752/X _31882_/Q _31882_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_79_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16798__A1 wire3278/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21791__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17732__S _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22858__B _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28604_ _28604_/Q _31877_/CLK _28604_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13830_ _31016_/Q _24434_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25816_ VGND VPWR _27854_/C _31433_/Q _30149_/Q _25816_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30008__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29584_ _29584_/Q _32345_/CLK _29584_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26796_ _26861_/C1 _26795_/Y wire777/A _31848_/Q _31848_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire2237_A _19654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27259__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15470__A1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18539__A2 _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21254__S _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28055__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28535_ VGND VPWR _28535_/D _32113_/CLK _28535_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_13761_ _31185_/Q _13761_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_18_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25747_ VPWR VGND _31411_/D _31392_/Q _25904_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_161_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22959_ VGND VPWR _22965_/S _30471_/Q _30136_/Q _30136_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17747__B1 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29300__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15500_ VGND VPWR _15500_/X _29296_/Q _15500_/A _15500_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_125_3236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3279_A wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17211__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_9 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2404_A _14148_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16480_ VGND VPWR _16961_/S _32319_/Q _28927_/Q _16480_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28466_ VGND VPWR _28466_/D _32014_/CLK _28466_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_164_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25678_ _31389_/Q _25673_/X _25682_/C _27413_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_243_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26482__A1 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25285__A2 _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30158__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15431_ _15500_/A _15500_/C _30508_/Q _15431_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26482__B2 _26492_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27417_ VGND VPWR _27421_/S _32264_/Q _27417_/A0 _32264_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_73_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24629_ VGND VPWR _24276_/B _31526_/Q _19860_/C _24629_/X _31528_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__23296__A1 wire3828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4084 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28397_ _28397_/Q _30225_/CLK _28397_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15773__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31403__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32529__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23835__A3 _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_5072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18150_ VGND VPWR _18150_/S wire3818/X _28078_/Q _28078_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15362_ VGND VPWR _15750_/S _29026_/Q _28994_/Q _15362_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27348_ VGND VPWR _27348_/S _32204_/Q _27280_/X _32204_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_5045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29450__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27431__A0 _32273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17101_ _30000_/Q _22512_/A2 _17101_/X _30388_/Q _17234_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XPHY_1262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18711__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14313_ _17077_/A _14313_/X _29719_/Q _21778_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_253_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23048__A1 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18081_ VGND VPWR _18086_/S wire3827/X _28011_/Q _28011_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15293_ _15621_/A2 _15293_/X _15292_/X _15628_/B1 _28856_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_197_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27279_ VGND VPWR _27281_/S _32147_/Q _27278_/X _32147_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2773_A _27698_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16183__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1509 VGND VPWR VGND VPWR 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_14244_/Y _24381_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_49_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25993__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30290_ _30290_/Q _30433_/CLK _30290_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15930__C1 _16041_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31553__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26081__A _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20806__A0 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19394__S _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1856 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2881 VPWR VGND _20785_/S _20772_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_62_4252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18475__A1 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14175_ _14300_/B _14300_/A hold100/X _14175_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_23_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27734__A1 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20282__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23855__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22008__C1 _22968_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20333__S _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18983_ VGND VPWR _18982_/X _18981_/X _18983_/S _18983_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__22559__A0 wire3703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_4217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24012__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output539_A _28709_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_4454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15427__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_4629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13736__A _31762_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17934_ VGND VPWR _17939_/S _18516_/A1 _27872_/Q _27872_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_117_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23220__A1 _30212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1072_A wire1074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25935__C_N _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16238__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19975__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18778__A2 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21231__B1 _23061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23644__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17865_ _17853_/X _17865_/X _17832_/S _17864_/X _17530_/B _17842_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_110_2815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16789__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27593__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_5049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2180 VPWR VGND _26876_/B _20100_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1384 _19520_/A _19518_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_1_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22768__B _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19604_ VPWR VGND _20171_/B _19604_/B _19566_/A VGND VPWR NF_sky130_fd_sc_hd__and2b_2 Xwire2191 VPWR VGND _24925_/B _19752_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16816_ VGND VPWR _16816_/X _16813_/X _16816_/B1 _16491_/S _16815_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xfanout1395 VPWR VGND _26386_/A _23601_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_242_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21672__B _21672_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25144__B _31207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17796_ _31648_/Q _17875_/B _17796_/X _19504_/B _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_247_2637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32059__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15461__A1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14264__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19727__A1 _28520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21164__S _21166_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22326__A3 _30452_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19535_ _19535_/X _19535_/A _19535_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_31813_ _31813_/Q _32017_/CLK _31813_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16747_ _16737_/X _29678_/D wire904/X _16746_/X _16729_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_73_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21391__C _21649_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13959_ _28538_/Q _13959_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_282_1816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18935__C1 _19085_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15162__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_3336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17202__A2 _30401_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31744_ hold447/A _31923_/CLK _31744_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19466_ _19466_/B _28449_/D _26139_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__28548__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15749__C1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16678_ _16677_/X _16856_/A2 _16911_/A2 _29479_/Q _16678_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_37_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27670__A0 _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2640_A wire2641/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18950__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18417_ VGND VPWR _18425_/S _28192_/Q _18516_/A1 _28192_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_1660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25160__A _25160_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2738_A _14151_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_3612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23287__A1 _23287_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15629_ _15629_/X _28969_/Q _15628_/X _15629_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__31083__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_240_core_clk _31761_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_19397_ VGND VPWR _19397_/S _27688_/A1 _28413_/Q _28413_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23599__B _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31675_ _31675_/Q _31966_/CLK _31675_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18473__S _18476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_4594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_3702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27017__A3 _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27786__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18348_ VGND VPWR _18355_/S wire3869/X _28126_/Q _28126_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30626_ _30626_/Q _32421_/CLK _30626_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18699__D1 _19069_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22495__C1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21837__A2 _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17400__D_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20508__S _20512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25028__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26225__B2 _32291_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19360__C1 wire1563/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18702__A2 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27422__B1 _18585_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17089__S _17089_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28698__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23039__A1 _30154_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24236__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_2395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18279_ VGND VPWR _18321_/S _28100_/Q _27698_/A1 _28100_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30557_ _30557_/Q _32332_/CLK hold198/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_258_3478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26776__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29943__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20310_ VGND VPWR _20327_/S _27693_/A1 _28851_/Q _28851_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_28_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_4477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14724__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput50 VPWR VGND la_input[104] input50/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_89_2496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_5454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21290_ _30366_/Q _21549_/B _21288_/Y hold501/A _21613_/B _21288_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_67_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput61 VGND VPWR input61/X la_input[114] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_30488_ _30488_/Q _32110_/CLK _30488_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_4286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput72 VPWR VGND input72/X la_input[124] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__24504__A _30759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput83 VGND VPWR input83/X la_input[19] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__23350__A_N _21222_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20241_ VGND VPWR _20247_/S _28784_/Q _27245_/A0 _28784_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32227_ _32227_/Q _32529_/CLK _32227_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17269__A2 wire3591/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18466__A1 _23301_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput94 VPWR VGND la_input[29] input94/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_172_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22262__A2 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27725__A1 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26528__A2 _26533_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25319__B _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20273__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16477__B1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21470__B1 wire3800/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_3_3_0_core_clk_A clkbuf_3_3_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_1339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32158_ _32158_/Q _32225_/CLK _32158_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20172_ _26687_/B _20171_/X _20128_/X _28730_/Q _28730_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_135_2141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20243__S _20258_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_3107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24003__A3 _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25200__A2 _29842_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18221__B _18221_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18218__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31109_ _31109_/Q _32541_/CLK _31109_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18218__B2 wire3884/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24980_ _25065_/A _19570_/X _24980_/X _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_269_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32089_ _32089_/Q _32538_/CLK _32089_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27534__B _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_4297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27489__A0 _32304_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20025__A1 _28659_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29452__D _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18769__A2 wire1405/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23554__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23931_ _23931_/X _24892_/C _30681_/Q _30745_/Q wire1633/X VGND VPWR wire1268/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_3_4897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_5537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_3427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23781__C _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18648__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21773__A1 _18535_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19430__A3 _19429_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29323__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_3848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17552__S _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26650_ _26684_/A2 _31859_/Q _26649_/Y _26650_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26161__B1 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_3127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17441__A2 _31932_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23862_ _23862_/X _19527_/Y _26542_/A _31897_/Q _31865_/Q _19861_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_183_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_399_core_clk _29550_/CLK clkbuf_opt_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_148_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3519_A _31087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19981__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14255__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21074__S _21095_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24172__C1 wire1247/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25601_ VGND VPWR _31372_/D _25601_/B _26498_/A _25601_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__24711__A1 _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22813_ _22814_/B _22825_/A _22814_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_707 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26581_ _26581_/X _31842_/Q wire3454/X wire817/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA_718 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23793_ _23793_/X _23805_/A _31842_/Q _19680_/B hold181/A _23805_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 Xclkbuf_leaf_328_core_clk _30483_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17729__B1 _24588_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14477__A _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1381_A wire1386/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_729 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31426__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22722__B1 _21428_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19194__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28320_ _28320_/Q _30453_/CLK _28320_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout1479_A wire1486/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25532_ _28449_/Q _28450_/Q _31345_/Q _19461_/X _25531_/Y _31345_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 X_22744_ _30096_/Q _22807_/S _30096_/D _22743_/X _22742_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_246_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15204__A1 _15500_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29473__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18941__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28251_ _28251_/Q _29697_/CLK _28251_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_143_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23278__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25463_ _25464_/A _25454_/A _31311_/D _25462_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27915__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22675_ _22674_/X _22779_/A1 wire3661/X _22677_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__18383__S _18390_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15755__A2 _15759_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16952__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3888_A wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23817__A3 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_5212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27202_ _27202_/X _32093_/Q _32094_/Q hold413/A _27198_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_191_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_95 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24414_ _24412_/Y _24437_/B _31008_/D _24420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_240_1012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27696__S _27696_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21626_ _21626_/X _21626_/C _21925_/B _21674_/B _21626_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_33_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_2287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14963__B1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28182_ _28182_/Q _30474_/CLK _28182_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21828__A2 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30450__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23302__B _23302_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25394_ _25394_/X _31282_/Q _25393_/Y _25402_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_107_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31576__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20418__S _20418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25019__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27133_ _31049_/Q _24716_/A _27133_/Y _25971_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_195_4981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24227__A0 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24345_ _24344_/X _24357_/B1 wire1668/X _24353_/A1 _30975_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_250_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21557_ _21556_/B _21546_/Y _21542_/X _21545_/X _21556_/A _21559_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111a_2 XANTENNA__15507__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_3529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26767__A2 _14216_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22238__C1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20508_ VGND VPWR _20512_/S _27700_/A1 _29026_/Q _29026_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27064_ _27064_/X _27122_/B _32010_/Q _27070_/C _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_219_4697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_4_7_0_core_clk clkbuf_4_7_0_core_clk/X clkbuf_4_7_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_272_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24276_ _24276_/X _24276_/C _31584_/Q _24276_/B _24276_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_113_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21488_ _21674_/C _21506_/D _21674_/B _21674_/D _21491_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_159_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_1531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26015_ _26015_/Y _26015_/B _26015_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__23986__C1 _23985_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22860__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18457__A1 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23227_ VGND VPWR _20912_/B _20909_/B _20982_/B _23227_/X _23236_/D VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_159_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20439_ VGND VPWR _20446_/S _28959_/Q _27154_/A1 _28959_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_3887 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input172_A la_input[9] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27716__A1 _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21757__B hold417/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2199 VPWR VGND _19748_/A _25051_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14730__A3 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2187_A _19756_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23675__D _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20264__A1 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16468__B1 wire902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21249__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_44_core_clk _32543_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_66_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23158_ VGND VPWR _23158_/X _23156_/X _23157_/X _23155_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xmax_length1487 VPWR VGND _14627_/C1 wire1488/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18862__D1 wire2270/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19227__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_2290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1498 VPWR VGND _15503_/A2 wire1500/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_41_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_5049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_12_0_core_clk_A clkbuf_4_6_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18209__A1 _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22109_ _22108_/X _22509_/C1 wire829/X _29816_/Q _29816_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17028__A _29879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22005__A2 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17680__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14151__S _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15980_ VGND VPWR _15980_/X _16722_/C1 wire1060/X _15979_/X _15978_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2354_A _14192_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23089_ _30165_/D _23190_/B _23088_/X _30165_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27966_ _27966_/Q _31955_/CLK _27966_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_4056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20016__A1 wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19957__A1 _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3904 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29705_ _29705_/Q _29705_/CLK _29705_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24950__A1 _31119_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14931_ VGND VPWR _14935_/S _30896_/Q _29174_/Q _14931_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_248_3625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32201__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26917_ _31941_/Q wire1573/X _31941_/D wire2335/X wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_276_761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24982__C_N wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23691__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27897_ _27897_/Q _30457_/CLK _27897_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15771__A _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17650_ VGND VPWR _17777_/B _17603_/A _17649_/X _17651_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29636_ _29636_/Q _32439_/CLK _29636_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17432__A2 _17432_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14862_ _14843_/Y _14861_/Y _29140_/D wire1067/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_26848_ VGND VPWR wire2645/X _19563_/A wire749/X _26848_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_40_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14246__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19709__A1 _28515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16601_ VGND VPWR _16601_/S _16600_/X _16599_/X _16601_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24163__C1 wire803/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24702__A1 _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29816__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13813_ _13813_/Y _31133_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_53_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_1953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_3825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17581_ VGND VPWR _17730_/S _17580_/X _17571_/Y _17581_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_207_4067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29567_ _29567_/Q _31959_/CLK _29567_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_3732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14793_ _14792_/X _15233_/B1 wire1172/X _29461_/Q _14793_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26779_ _26779_/B _26694_/B _26791_/A _26779_/X _27076_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_166_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_4922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14387__A _24434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14797__A3 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3563_A _30993_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22713__B1 wire3657/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_4201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19320_ _19375_/A2 _28014_/Q _19278_/S _19320_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_232_820 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32351__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16532_ _16532_/X _32129_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16531_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28518_ _28518_/Q _31436_/CLK _28518_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_1269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13744_ _30761_/Q _25750_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__27101__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17423__D_N _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17196__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29498_ VGND VPWR _29498_/D _31921_/CLK _29498_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_16_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25258__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_2827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_4819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31919__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19389__S _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19251_ _28138_/Q _19251_/X _19333_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_51_3230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16463_ VGND VPWR _16463_/X _16462_/X _16461_/X _16884_/S _16940_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28449_ _28449_/Q _31873_/CLK _28449_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_34_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16943__A1 _16943_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16806__S _16806_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28840__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29966__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31132__D _31132_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18202_ _29855_/Q _18158_/X _18202_/X hold453/A _18254_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_70_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24308__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15414_ VGND VPWR _15702_/S _30909_/Q _29187_/Q _15414_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_3274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_460 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31460_ VGND VPWR _31460_/D _31460_/CLK _31460_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19182_ _19182_/X _19179_/X _22090_/B1 _19181_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22477__C1 wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14954__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18145__A0 _28073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16394_ _16394_/X _16816_/B1 _16839_/A1 _16393_/X _16391_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_199_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output391_A _13809_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26207__A1 _31592_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_4166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26207__B2 hold214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output489_A _28651_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18133_ VGND VPWR _18143_/S wire3870/X _28061_/Q _28061_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30411_ _30411_/Q _30411_/CLK _30411_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24218__A0 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15345_ VGND VPWR _15716_/S _32321_/Q _28929_/Q _15345_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18696__A1 hold231/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30971__D _30971_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31391_ _31391_/Q _32547_/CLK _31391_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XPHY_1070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22492__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30943__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26523__B _26537_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14706__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18064_ VGND VPWR _18074_/S wire3882/X _27994_/Q _27994_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30342_ VGND VPWR _30342_/D _32420_/CLK _30342_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_218_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15276_ VGND VPWR _15627_/S _29537_/Q _29571_/Q _15276_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28990__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5031 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22543__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_4306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_2939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output656_A wire2323/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4076 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_4027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold108 hold108/A hold108/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_253_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17015_ VGND VPWR _17015_/X _22449_/A _17013_/X _29990_/Q _17014_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xhold119 hold119/A hold119/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18448__A1 _18607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17637__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14227_ _24606_/B _24380_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_171_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_5638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30273_ _30273_/Q _30450_/CLK _30273_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_64_2912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27707__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21667__B _21668_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25139__B _25139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1287_A wire1288/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32012_ _32012_/Q _32014_/CLK _32012_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_29_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21159__S _21172_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23992__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14158_ hold132/A _14157_/X _14167_/S hold131/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_84_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17120__A1 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_2224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27183__A2 _27185_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1940 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28220__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29346__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24978__B _25043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26391__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18966_ _19202_/B _28061_/Q _18965_/X _18966_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14089_ _29712_/Q _14089_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_248_5561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20998__S _21018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26930__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20007__A1 _28650_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21204__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3482 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_3437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_4448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_4235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19948__A1 _28622_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2590_A _18321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18976__B _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23374__S _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17917_ _18087_/B _29490_/Q _30415_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_247_3102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17880__B _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14996__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18897_ VGND VPWR _19200_/B _27898_/Q wire4163/X _18897_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21755__A1 _21661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18468__S _18496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30323__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31449__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2496_A _20789_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1621_A wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18620__A1 wire3828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17848_ _31735_/Q _17870_/A2 _17848_/X _31734_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xfanout1192 fanout1194/A _15760_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_1_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19963__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14237__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24994__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire705_A wire705/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2855_A _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27938__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17779_ _17779_/X _17692_/X _17685_/A _17778_/Y _17685_/B VGND VPWR _17485_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21507__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19176__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_4470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19518_ _19518_/X _20682_/C _19518_/A _26542_/B _20654_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_203_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18384__A0 _28161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20790_ VGND VPWR _20796_/S _29303_/Q _27679_/A1 _29303_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17187__A1 wire3806/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30473__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28616__D _28616_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31599__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17187__B2 _23160_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27643__A0 _32384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25249__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_1007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23403__A hold467/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19449_ _28444_/D _27091_/C1 _19447_/X _25512_/B _19448_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 X_31727_ _31727_/Q _31730_/CLK _31727_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_277_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19600__B _19601_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15737__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2928_A _20328_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22460_ VGND VPWR _22448_/C _21285_/A _22449_/A _22460_/X _29991_/Q _22448_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18136__A0 _28064_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31658_ _31658_/Q _31685_/CLK _31658_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_104_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20238__S _20249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18216__B _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_3816 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21411_ _21424_/B _21411_/A _21411_/C _21679_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_290_5456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19919__B1_N _19918_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30609_ _30609_/Q _31806_/CLK hold372/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18687__A1 _30088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_2635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30881__D wire715/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24209__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22391_ VGND VPWR _22598_/S _29950_/Q wire1578/X _29950_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22483__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23680__A1 _31506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19884__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31589_ _31589_/Q _32024_/CLK _31589_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23680__B2 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_3898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20494__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16698__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24130_ _30579_/Q _24204_/A2 _24130_/X _32553_/Q wire1614/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_21342_ _21342_/X _29729_/Q _21462_/B _21464_/B _21444_/A _21340_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23549__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25957__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16162__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_4027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_5262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22680__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24061_ wire4062/X _25022_/B _24060_/X _31172_/Q wire739/A _19995_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__18439__A1 wire3900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19328__A _28238_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15370__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21273_ VGND VPWR _22300_/S _29735_/Q hold360/X _29735_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_288_5341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25049__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19100__A2 wire1984/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23012_ VGND VPWR _23012_/X _25693_/C _32385_/Q _32377_/Q _23036_/S1 _32393_/Q _32401_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__21069__S _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21443__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20224_ VGND VPWR _20225_/S _28769_/Q _27707_/A1 _28769_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_28_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23983__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32224__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17111__A1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3617 VPWR VGND wire3617/X _30762_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3628 VPWR VGND wire3628/X _30751_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_235_1147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3639 VPWR VGND wire3639/X _30703_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_24_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24888__B _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27820_ _27821_/A _32534_/Q _27844_/C _32533_/Q _25799_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_63_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2905 _20576_/S _20580_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_20155_ VGND VPWR _19577_/B _19581_/A _20192_/A2 _20155_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire2916 VPWR VGND _20484_/S _20480_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_230_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16465__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26382__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23792__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3636_A hold208/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26921__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15673__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28713__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23284__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_4958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24393__C1 _31000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29839__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25065__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27751_ VGND VPWR _27756_/S wire2242/X _32479_/Q _32479_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24963_ _25776_/C _24962_/X _25017_/A2 _31125_/Q _31125_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20086_ VGND VPWR wire2671/X _19535_/A _20106_/A _20086_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20701__S _20708_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18378__S _18388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21746__A1 hold160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout854_A _19928_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1596_A _23825_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_96 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26702_ _26702_/Y _31766_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__32374__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23914_ _23914_/X _24081_/A3 _19928_/B _28616_/Q _31094_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__18611__A1 _23287_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17414__A2 _31927_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_2_0_core_clk clkbuf_opt_2_1_core_clk/A clkbuf_5_2_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_27682_ VGND VPWR _27683_/S _27682_/A1 _32416_/Q _32416_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_187_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24894_ _25676_/B1 _24893_/Y _24941_/A _31091_/Q _31091_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_167_2922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold265_A hold265/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_4857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30816__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16622__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29421_ _29421_/Q _30428_/CLK _29421_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_58_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27280__A _31428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26633_ _26684_/A2 _31855_/Q _26632_/Y _26633_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_273_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_5564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23845_ wire1812/A _23844_/X _31824_/Q wire1624/X _23846_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23499__A1 _28388_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_162_core_clk _31871_/CLK clkbuf_opt_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_504 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14779__A3 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24696__B1 _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_515 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29989__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19167__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_526 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_2589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_537 _30570_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24160__A2 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29352_ VGND VPWR _29352_/D _30411_/CLK _29352_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_145_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26564_ _26563_/X _26564_/X _23744_/D _26616_/B2 wire3461/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_2_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold432_A hold432/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_548 _30626_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25512__B _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17178__A1 _30209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18375__A0 _28152_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23776_ _23776_/A _26693_/B _26696_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_226_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20988_ VGND VPWR _29454_/D _29452_/D _21173_/B _27233_/B _29453_/D VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_204_3528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_559 input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27634__A0 _32376_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26437__A1 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19572__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18914__A2 wire1402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28303_ _28303_/Q _30471_/CLK _28303_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_max_length3071_A _18052_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25515_ VGND VPWR _25513_/B _31337_/Q _25524_/C _25515_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_126_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15189__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22727_ _22727_/B _22727_/Y _22727_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_29283_ _29283_/Q _32302_/CLK _29283_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19510__B _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26495_ _31706_/Q _26495_/X _26492_/Y _26509_/C _26539_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_224_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15728__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30966__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20656__B _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28234_ _28234_/Q _29389_/CLK _28234_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29219__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmgmt_core_wrapper_4209 debug_out mgmt_core_wrapper_4209/HI VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__conb_1 XANTENNA__22459__C1 wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2102_A wire2103/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14936__B1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25446_ _25445_/X _26498_/A _31363_/Q _25430_/Y _31303_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_240_182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18127__A0 _28055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22658_ _22629_/X _22644_/Y _22628_/Y _22643_/B _22659_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XFILLER_193_4918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_5031 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14400__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24463__A3 _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20375__C _25722_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18678__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21609_ _21609_/A _30220_/Q _21618_/B _21613_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_28165_ _28165_/Q _30431_/CLK _28165_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_33_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25377_ _25378_/B _25379_/A _31270_/Q _31278_/Q _25265_/X VGND VPWR _25376_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22474__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23671__A1 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22589_ VGND VPWR _22619_/S _30073_/Q _22588_/X _30073_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3144_A _21706_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15130_ _15129_/X _15638_/B1 _15605_/A2 _29470_/Q _15130_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16689__B1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27116_ _27116_/B _26900_/B _27116_/A _27116_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_174_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24328_ _32011_/Q wire1374/X _24328_/X _31979_/Q _26364_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_215_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_5398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28096_ _28096_/Q _31959_/CLK _28096_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_68_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28243__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19890__A3 wire2197/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15361__A0 _29260_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29369__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26062__C _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15061_ _15605_/A2 _15061_/X _15060_/X _15640_/A1 _30498_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_232_5373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27047_ VGND VPWR _27048_/C _32001_/Q _32002_/Q _27050_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_26_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2471_A _21151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22226__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24259_ _24467_/A _26301_/B _24259_/X _26542_/A _31681_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_250_4249 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16361__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21487__B _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14703__A3 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3311_A _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24620__B1 _31537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1240 VPWR VGND _26378_/A4 _24308_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3409_A wire3412/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14012_ _28485_/Q _14012_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21434__B1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_4672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23974__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25010__C_N _24945_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17102__A1 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1284 wire1283/A _20665_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_270_2251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30346__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1295 VPWR VGND _24051_/B1 wire1296/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_4713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21985__B2 _21984_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18820_ VGND VPWR _28313_/Q _28246_/Q _18856_/B _18820_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_63_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17653__A2 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18850__A1 wire1885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16310__C1 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27174__B hold396/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2736_A wire2737/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26912__A2 _26946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28393__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28998_ _28998_/Q _32444_/CLK _28998_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27567__A1_N _27565_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14467__A2 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23187__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16861__A0 _29581_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24923__A1 _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18751_ _18750_/X wire1942/X wire1996/X _28310_/Q _18751_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_209_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_1534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15963_ wire1005/X wire1477/X _32305_/Q _15963_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_167_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27949_ _27949_/Q _30276_/CLK _27949_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20611__S _20617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_5182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27548__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3680_A _30424_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21737__A1 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17192__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3778_A _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17702_ _17702_/X _17501_/X _31715_/Q _31719_/Q _17874_/A2 VGND VPWR _17701_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_185_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_3335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14914_ _14913_/X _15233_/B1 _15597_/A2 _28090_/Q _14914_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26125__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17405__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2903_A _20562_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18602__A1 _29849_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18682_ _18682_/A hold474/A _30333_/Q _18682_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 X_30960_ _30960_/Q _32297_/CLK _30960_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19260__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15894_ VGND VPWR _15893_/X wire890/X _15894_/X _15884_/X wire917/X VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA__30496__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19945__A4 wire2302/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_3481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24136__C1 _24135_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16613__B1 _28963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_3600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17633_ _17539_/C _17632_/X _31717_/D _17783_/B2 _17629_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29619_ _29619_/Q _32307_/CLK _29619_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31741__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25703__A _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_111_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14845_ _16798_/A2 _15620_/A1 _28812_/Q _14845_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_248_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_5442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_5615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30891_ _30891_/Q _32358_/CLK _30891_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_162_3019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27668__A_N _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17920__S _17947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24151__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17564_ _17563_/Y _17470_/B _17565_/C _17833_/S _17562_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA_clkbuf_opt_3_0_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1035_A wire1035/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14776_ _14776_/X wire1214/X _14769_/X _14771_/X wire1097/X _14775_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_261_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4117_A _28567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22538__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22162__A1 _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20847__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19303_ _19311_/B _28077_/Q _19302_/X _19303_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_92_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_3065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17708__A3 _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16515_ _15770_/C wire1733/A _16515_/X _16515_/B1 _28928_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_220_801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_4335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32561_ _32561_/Q _32580_/CLK hold308/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_203_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16377__C1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17495_ _17495_/B _17495_/Y _26446_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_125_2140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_2484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_3117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31891__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25100__A1 _24841_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31512_ _31512_/Q _31563_/CLK _31512_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19234_ _19380_/A2 _27882_/Q _19380_/B1 _19234_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire1202_A wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14927__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16446_ _16445_/X _15975_/S _16563_/A2 _30904_/Q _16446_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_278_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32492_ _32492_/Q _32551_/CLK _32492_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16392__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23111__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_3803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31443_ _31443_/Q _32412_/CLK _31443_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19165_ VGND VPWR _19165_/X _19159_/X wire1883/X wire1905/X _19164_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18669__A1 _29343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16377_ _16841_/A2 _16377_/X _16376_/X _16841_/C1 _29223_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__22465__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23662__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19866__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_1704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21899__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_4561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_4111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26253__B _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18116_ VGND VPWR _18119_/S _18239_/B _28045_/Q _28045_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23369__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15328_ _15323_/X _15536_/B1 wire1085/X _15327_/X _15328_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__21673__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31121__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31374_ _31374_/Q _32299_/CLK _31374_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_155_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32247__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19096_ _19178_/B _27907_/Q _19095_/X _19096_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17875__B _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22273__S _22273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17341__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16144__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17341__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27068__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26600__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24206__A3 _19993_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25403__A2 _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26600__B2 _23755_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30325_ _30325_/Q _32067_/CLK _30325_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18047_ VGND VPWR _18047_/S wire3828/X _27979_/Q _27979_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_190_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23414__A1 _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15259_ VGND VPWR _15259_/X _15256_/X _15258_/X _15752_/B1 _15749_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_155_4294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16271__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25954__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_4750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_4218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28736__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold41_A hold41/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23965__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19094__A1 _19093_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30256_ _30256_/Q _32114_/CLK _30256_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19608__A_N _19573_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_3577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21976__B2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25167__A1 _25172_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31271__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15104__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17891__A _17891_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32397__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26364__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17644__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18841__A1 _28183_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30187_ hold382/A _30431_/CLK _30187_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27084__B _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23269__A_N _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19998_ VGND VPWR _19531_/B _19522_/A _20028_/A _19998_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_0_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23178__B1 _23177_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15655__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24501__B _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2972_A _18601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30839__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16852__B1 _16851_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24914__A1 _31101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18949_ _28252_/Q _18949_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20521__S _20528_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27539__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21728__A1 _29776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28886__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2878_A _20756_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13924__A _28573_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21960_ _21960_/Y _21960_/B _21960_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_97_3285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26667__A1 _31895_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20400__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20911_ VGND VPWR _23226_/S _30433_/Q _20910_/Y _29384_/D _29384_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__27304__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25613__A _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23025__S0 wire3479/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30876__D _30876_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_4576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21891_ _21892_/A _21903_/A _21890_/X _21554_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_149_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15958__A2 _15957_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_3561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30989__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24142__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23630_ _24865_/C _23630_/B _32561_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xnor2_4 XANTENNA__28116__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_4617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20842_ _20842_/X _23393_/A _20982_/B _20909_/B _30433_/Q _14054_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__18357__A0 _28135_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14630__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22153__B2 wire2275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25890__A2 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_123_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_5053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23561_ VPWR VGND _23561_/X hold420/A _30483_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_56_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19330__B _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20773_ VGND VPWR _20780_/S wire1792/X _29287_/Q _29287_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_4896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_4330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18227__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25300_ _31263_/D _25298_/X _26498_/A _25297_/X _25299_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_22512_ VGND VPWR _22512_/A3 _22512_/A4 _22512_/A2 _22512_/X _30017_/Q _22512_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__30219__CLK _30219_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_2426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26280_ _26279_/Y _26184_/A _31628_/Q _26301_/B _31628_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_238_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23492_ VGND VPWR _23530_/S _23491_/X _31950_/Q _30432_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15040__C1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23102__B1 wire2842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14474__B _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26444__A _31614_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17580__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire808 VPWR VGND wire808/X wire808/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_197_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25231_ _25231_/X _25263_/B1 _17360_/X hold123/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_30_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22443_ _29983_/D _22443_/C _22443_/A _22445_/C _23354_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_238_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22456__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23653__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29511__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16970__A _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14933__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22691__B _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31500__D _31500_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26163__B _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19321__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23279__S _23286_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25162_ VGND VPWR _31214_/D _24502_/X _26539_/B _24543_/D _25161_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_82_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21588__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22374_ _22374_/X _30476_/Q _22385_/B1 hold489/A wire3779/X _14069_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_255_4683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25033__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16135__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17332__A1 wire3578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26159__C_N _31569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30369__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19872__A3 _19547_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24113_ _19926_/B _30647_/Q _24112_/X _24113_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_254_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_4217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21325_ _21640_/C _21444_/A _21640_/B _21640_/D _21326_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_191_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3753_A _22649_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16181__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25093_ _25109_/B _25087_/X _31189_/D _25092_/Y wire2253/X wire1353/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311oi_2 XFILLER_216_4678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29970_ _29970_/Q _31966_/CLK _29970_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_173_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16686__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1511_A wire1519/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31614__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4104 VPWR VGND _13865_/A _28632_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_251_4569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_1501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4115 VPWR VGND wire4115/X _28569_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14697__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15894__A1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21416__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4126 VPWR VGND wire4126/X wire4126/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28921_ _28921_/Q _32425_/CLK _28921_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_134_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24044_ _30870_/D _24037_/X _24199_/B1 _24043_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23956__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19085__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21256_ VGND VPWR _23536_/S _29718_/Q _30434_/Q _29718_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_191_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4137 VPWR VGND wire4137/X _28457_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold450 hold450/A hold450/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__29661__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4148 VPWR VGND wire4148/X _28393_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2607 VPWR VGND _26837_/A _14266_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold461 hold461/A hold461/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout971_A _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17096__A0 _30387_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21967__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4159 VPWR VGND wire4159/X _28129_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_1_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold472 hold472/A hold472/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23150__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3425 VPWR VGND wire3425/X _26764_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25158__A1 _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20207_ VGND VPWR _20211_/S _28752_/Q _27690_/A1 _28752_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold483 hold483/A hold483/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire3436 VPWR VGND wire3436/X _32041_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold494 hold494/A hold494/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16438__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28852_ _28852_/Q _32428_/CLK _28852_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17635__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3447 VPWR VGND wire3447/X _31904_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2702 VPWR VGND wire2702/X _14163_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1906 _19094_/S _19156_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_82_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21187_ VGND VPWR _21194_/S _29629_/Q _27247_/A0 _29629_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2713 VPWR VGND wire2713/X wire2714/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1917 VPWR VGND _19159_/S wire1935/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_3718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15646__A1 wire3261/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2724 wire2725/X wire2724/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout930 _16491_/S wire933/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_21_3825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1928 VPWR VGND wire1931/A wire1934/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_189_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16843__B1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27803_ VGND VPWR _32526_/Q _32525_/Q _27844_/C _27803_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__24905__A1 _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23708__A2 _19716_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout941 VPWR VGND fanout941/X wire944/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20138_ _28713_/D _19937_/B _20137_/X _25081_/A _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_264_4919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31764__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2746 wire2747/X _19637_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20431__S _20444_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28783_ _28783_/Q _32322_/CLK _28783_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19505__B _19505_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_343_core_clk _30473_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_fanout1880_A _18707_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21719__A1 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25995_ VGND VPWR _19551_/B _19573_/A _26014_/A2 _25995_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22916__A0 _29903_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26370__A3 _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21719__B2 _21704_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout974 wire981/X _16929_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2768 VPWR VGND wire2768/X hold189/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17951__D _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2779 VPWR VGND _27709_/S _27706_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27734_ VGND VPWR _27737_/S _19937_/B _32465_/Q _32465_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23184__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24946_ _25810_/C _24945_/Y _24947_/A _31117_/Q _31117_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire2052_A wire2053/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20069_ _26173_/B1 _20068_/Y _20073_/A2 _28680_/Q _28680_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input135_A la_input[66] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18596__A0 _28310_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17399__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26658__A1 _31861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26619__A _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3286_A wire3287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27665_ _32402_/D _32402_/Q _27664_/X _27667_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23016__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24877_ wire863/X _31085_/Q _24877_/Y _24481_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__15949__A2 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26122__A3 _26121_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26797__D_N wire1272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14606__C1 _14605_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_301 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16071__A1 _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_312 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29404_ _29404_/Q _31912_/CLK _29404_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14630_ _14817_/A2 _14630_/X _14629_/X _14822_/B1 _29304_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__24133__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26616_ _26619_/A _26616_/X _26615_/Y _26616_/B2 _31795_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_280_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19521__A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_323 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23828_ _30837_/D _24310_/B _23828_/A _23849_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__22786__A_N _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29041__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_3975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_334 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27596_ VGND VPWR _27590_/X _31382_/Q _25682_/B _27596_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire2317_A wire2318/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_2228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22144__A1 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_345 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4903 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_1397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14621__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21262__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19545__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_356 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_1505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29335_ hold244/A _30492_/CLK hold410/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_367 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_5503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3959 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14561_ _14884_/A2 _14561_/X _14560_/X _14642_/S _29584_/Q _14930_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_26547_ VGND VPWR _14209_/Y _19503_/A _26543_/B _26547_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20155__B1 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28609__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_378 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23759_ _26619_/A _26631_/B _23759_/A _31781_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_10_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22695__A2 _21320_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_389 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23892__B2 _28678_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20386__B _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27083__A1 _26801_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15260__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16300_ _16295_/Y wire923/A _16293_/Y wire1058/A _16300_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_256_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3359_A wire3364/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19560__A2 wire2656/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17280_ wire3562/X _31906_/Q _17280_/X _17446_/B2 _17280_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 X_29266_ _29266_/Q _32309_/CLK _29266_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31144__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14492_ hold410/A _14492_/Y _30440_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_26478_ _26478_/Y _26488_/B _26488_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xclkbuf_opt_27_1_core_clk clkbuf_opt_27_2_core_clk/A clkbuf_opt_27_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_243_1961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25094__B1 _31190_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22882__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_1972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26830__A1 _31865_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25633__A2 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16231_ VGND VPWR _16842_/S _29219_/Q _29283_/Q _16231_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28217_ _28217_/Q _32133_/CLK _28217_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_273_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18249__C_N _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3718_A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25429_ _25426_/X _24568_/X _25428_/Y _25425_/Y _31295_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__29191__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23644__A1 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29197_ _29197_/Q _32300_/CLK _29197_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2686_A _14167_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3526_A hold488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_2993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20458__A1 _28977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19312__A2 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28759__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16162_ _16415_/A2 _16415_/A1 _30781_/Q _16162_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28148_ _28148_/Q _31917_/CLK _28148_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18520__A0 _28292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17323__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20606__S _20606_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17323__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15113_ VGND VPWR _15756_/S _28418_/Q _29083_/Q _15113_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14137__A1 _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_4472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25397__A1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31294__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24305__C _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15334__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14137__B2 _14146_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16093_ _16092_/X _16090_/X _16151_/A1 _16093_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_6_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_16_0_core_clk clkbuf_5_16_1_core_clk/A clkbuf_4_8_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_276_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17874__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16677__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28079_ _28079_/Q _30474_/CLK _28079_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_230_4609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14604__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length984 VPWR VGND _16563_/A2 wire985/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_29_2125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25936__A3 _25836_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_5181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15885__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14688__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30110_ _30110_/Q _30474_/CLK _30110_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21407__B1 _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26801__B _26801_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15044_ _15043_/X _15042_/X wire1214/A _15044_/Y _15277_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_237_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19921_ _19920_/X _28610_/Q _28610_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_211_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23947__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27185__A _27185_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31090_ _31090_/Q _32036_/CLK _31090_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_29_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_31_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21958__A1 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24602__A _24602_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_1607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30041_ _30041_/Q _30225_/CLK _30041_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22080__B1 _22076_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26346__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_Di0[27] _19624_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16429__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19852_ _19851_/X _13919_/A _28578_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_42_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4067_A wire4068/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15637__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20091__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20630__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16834__B1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18803_ _19377_/B _28053_/Q _18802_/X _18803_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_269_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20341__S _20348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19783_ _26687_/B _19782_/Y _19782_/A _28548_/Q _28548_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_42_2358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3981 VPWR VGND wire3981/X hold190/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16995_ _21778_/B _21676_/B _29876_/Q _16993_/Y _21645_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XFILLER_111_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3992 VPWR VGND _22072_/C _29384_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25136__C _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22368__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output619_A _23611_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13744__A _30761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18734_ wire1916/X _20858_/S _18733_/X _18731_/X _18734_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_0_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24372__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28139__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1152_A wire1152/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15946_ wire989/X _15946_/X _15945_/X wire933/X _28945_/Q wire1458/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_111_3485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31992_ _31992_/Q _32024_/CLK _31992_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19918__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24748__S _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22383__A1 _30480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26649__A1 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23652__S _23661_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_401_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_4705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_4251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18665_ _29774_/Q _18665_/X _23342_/C _21211_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_111_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30943_ _30943_/Q _32275_/CLK _30943_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15877_ _15877_/X _28871_/Q _16026_/A2 _16039_/B2 _16040_/A2 _15876_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_244_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16062__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22776__B _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17650__S _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24124__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17616_ _17616_/B _17616_/Y _17685_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_204_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14828_ _15621_/A2 _14828_/X _14827_/X _15277_/S _29525_/Q _15608_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__18339__A0 _28117_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30874_ _30874_/Q _31577_/CLK _30874_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_244_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18596_ VGND VPWR _18617_/S wire3905/X _28310_/Q _28310_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23332__A0 _17198_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14612__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_5584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21172__S _21172_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19788__D _19788_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25872__A2 _25877_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2553_A _20257_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28289__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17547_ _17777_/B _17576_/A _17685_/A _17547_/X _17627_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_278_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14759_ _15228_/A2 _14758_/X _29010_/Q _15228_/A3 _14759_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_53_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23883__A1 _28517_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21343__C1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29534__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23883__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27074__A1 _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_890 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20697__A1 _29213_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_4271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32544_ _32544_/Q _32544_/CLK _32544_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21894__B1 _21706_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17478_ VGND VPWR _17605_/A _26488_/A _17490_/A _17605_/B _26488_/B VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA__15022__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25624__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19217_ VGND VPWR _19217_/X _19357_/B _19047_/S _28364_/Q _19216_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_88_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16429_ _16429_/X _30788_/Q _16966_/A2 _16722_/B2 _16720_/C1 _16428_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17886__A _23618_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23096__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32475_ _32475_/Q _32499_/CLK _32475_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19839__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23635__A1 _31086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30511__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18481__S _18488_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31637__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16770__C1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_70_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19303__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire772_A wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27794__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31426_ _31426_/Q _32535_/CLK hold227/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19148_ VGND VPWR _23515_/S wire3237/A _19147_/X _28392_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_105_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29684__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18511__A0 _28283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20516__S _20518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14128__A1 wire3495/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17097__S wire886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14128__B2 wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13919__A _13919_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19079_ _19079_/X _19076_/X wire1905/X _19078_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_157_2943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31357_ VGND VPWR _31357_/D _32299_/CLK _31357_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xoutput500 output500/A la_output[112] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_215_5390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput511 wire4036/X la_output[122] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15876__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17291__D_N _17290_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21110_ VGND VPWR _21136_/S _27236_/A0 _29554_/Q _29554_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_48_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput522 _31108_/Q la_output[17] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30308_ _30308_/Q _30398_/CLK _30308_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23938__A2 _23936_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19067__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30661__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput533 _31118_/Q la_output[27] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22090_ wire1547/X _18661_/C _22090_/X _22090_/B1 _14083_/Y wire2273/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__31787__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31288_ VGND VPWR _31288_/D _32564_/CLK _31288_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xoutput544 _28714_/Q la_output[37] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21949__A1 hold281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19662__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24512__A _31290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput555 _28724_/Q la_output[47] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_4329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput566 _28734_/Q la_output[57] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21041_ VGND VPWR _21057_/S hold493/A _29502_/Q _29502_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length1117_A wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17617__A2 _17537_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18814__A1 wire3766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput577 _28680_/Q la_output[67] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19606__A _26815_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30239_ _30239_/Q _31931_/CLK _30239_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput588 _28690_/Q la_output[77] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput599 _28700_/Q la_output[87] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_115_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26888__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20621__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_288_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20251__S _20261_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24899__B1 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31017__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26352__A3 _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1319 VPWR VGND _25884_/B wire1319/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_190_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15345__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24800_ _31051_/Q _31053_/Q _24800_/Y _31050_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_clkbuf_leaf_339_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25560__A1 _31359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24363__A2 wire1668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25780_ VGND VPWR _25780_/X _31418_/Q hold487/A _31417_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_22992_ VGND VPWR _22992_/X _25691_/B _32511_/Q _32503_/Q _25693_/B _32519_/Q _28903_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_58_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29064__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23571__A0 _30491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22374__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18578__B1 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22374__B2 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19775__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27837__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24731_ _24730_/Y _24732_/B _24704_/B _24770_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_167_2037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21943_ _21943_/B _21943_/Y _22067_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_266_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_4985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18656__S _18656_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_3238 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1294_A wire1298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25312__A1 _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24115__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27450_ VGND VPWR _27476_/S _32283_/Q _27449_/X _32283_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3501_A _31192_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24662_ _24772_/C _31442_/Q _31461_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__25312__B2 _31265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30041__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2526 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31167__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21874_ _21874_/X _21946_/A wire3779/X _21873_/X _22074_/A2 VGND VPWR _21872_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22126__A1 _13848_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_2324 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_3391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_3069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14603__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15800__A1 _16041_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19527__C1 _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21082__S _21095_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26401_ VGND VPWR _14194_/Y _14398_/B _26386_/X _26401_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_123_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25863__A2 _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23613_ _23613_/X wire1335/X _31071_/Q _31068_/Q wire1371/X VGND VPWR _23612_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_90_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20825_ VGND VPWR _20837_/S _20832_/B _29345_/Q _29345_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_262_1825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27381_ VGND VPWR _27384_/S _32233_/Q _27274_/X _32233_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20137__B1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24593_ VPWR VGND _24593_/X _31543_/Q _24593_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_205_2922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1461_A _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17002__A0 _30377_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17499__C _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27065__A1 _19803_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29120_ _29120_/Q _31953_/CLK _29120_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_2201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26332_ _26331_/Y _23599_/B _31654_/Q _26331_/B _31654_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_279_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_3979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21885__B1 _21882_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23544_ VGND VPWR _23560_/S _30465_/Q _30035_/Q _30465_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20756_ _27598_/C _27485_/D _21107_/C _20756_/X _21173_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XFILLER_257_5468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19995__B _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28901__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25615__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30191__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29051_ _29051_/Q _32067_/CLK _29051_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_3009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_4_13_0_core_clk_A clkbuf_3_6_2_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3870_A wire3871/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26263_ _26263_/Y _26464_/A _26263_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_101_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_4718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_227_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22429__A2 wire3953/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23475_ VGND VPWR _23529_/S wire4151/X _20982_/B _23475_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18391__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20687_ _20687_/Y _31060_/Q wire1354/X _24828_/C wire1292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XFILLER_216_5121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_3752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24823__B1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1726_A wire1750/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28002_ _28002_/Q _30276_/CLK _28002_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_270_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_5023 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25091__A3 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25214_ _29848_/D _25261_/C1 _31043_/Q _25416_/C _25214_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xmax_length3945 VPWR VGND _22580_/S _17228_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_203_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22426_ VGND VPWR _22057_/X _22598_/S _22425_/Y _29978_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__23434__A_N _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26194_ VPWR VGND _31585_/D _26194_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__18502__A0 _28274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20426__S _20444_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3967 VPWR VGND _23212_/S _23221_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_191_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22207__A hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19845__A3 _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25145_ _31206_/Q _25135_/Y _31207_/Q _25145_/X _31205_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__13829__A _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22357_ wire3213/X _29928_/D _18267_/B _22356_/X _14109_/Y _22378_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_178_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15867__A1 _28943_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26040__A2 _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21308_ _21309_/B _22026_/B1 _29901_/Q _23170_/C _21953_/A2 VGND VPWR _21307_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_82_4096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_378_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3116 _14284_/Y _22513_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23929__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25076_ _25076_/C1 _25075_/X _25086_/A2 _31181_/Q _31181_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29953_ _29953_/Q _31927_/CLK _29953_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22288_ VGND VPWR _23228_/S _29874_/Q _29133_/Q _29874_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_5_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3138 VPWR VGND _23526_/S _22439_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15331__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3149 _22104_/A wire3151/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_130_4028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22062__A0 _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3211 _22846_/B _22661_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_47_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28904_ _28904_/Q _32525_/CLK _28904_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24027_ _28499_/Q _19680_/B wire811/A _28691_/Q _20061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xwire3222 VPWR VGND _21288_/B _21465_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17608__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26328__B1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21239_ VGND VPWR _22954_/S _29718_/Q hold349/A _29701_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold280 hold280/A hold280/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19516__A _19518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29884_ VGND VPWR _29884_/D _31910_/CLK _29884_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_8_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold291 hold291/A hold291/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_5417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_4575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1703 _16891_/A3 _16910_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_8_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20073__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20612__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29407__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21257__S _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16816__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3266 _21778_/C _21966_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_28835_ _28835_/Q _32435_/CLK _28835_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_169_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2532 VPWR VGND _20505_/S _20504_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1736 VPWR VGND _15765_/B wire1748/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3288 wire3288/X _14079_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_clkbuf_leaf_115_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16292__A1 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1758 VPWR VGND _24269_/C _19527_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15095__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15800_ _15795_/X wire898/X _16041_/A1 _15799_/X _15800_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire2565 _20227_/S _20209_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout771 _27053_/X wire772/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16292__B2 _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17036__A _21778_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24354__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2576 VPWR VGND wire2576/X _19387_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2434_A _27262_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16780_ wire992/A _16780_/X _16779_/X _16925_/B1 _29329_/Q _16920_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_1_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28766_ _28766_/Q _32557_/CLK _28766_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_169_2836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1842 VPWR VGND wire1842/X _17896_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_13992_ _28505_/Q _13992_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xfanout793 _24892_/X _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_150_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25978_ VGND VPWR _25978_/X _25977_/X _24781_/Y _31505_/Q _26153_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_265_358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22365__A1 _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2598 _17891_/A _26904_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14379__B _14383_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22365__B2 _29932_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23562__B1 _21279_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27828__B1 _32538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23472__S _23514_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15731_ VGND VPWR _15736_/S _29486_/Q _32140_/Q _15731_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27717_ VGND VPWR _27719_/S _25033_/B _32450_/Q _32450_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire1875 VPWR VGND wire1875/X wire1876/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24929_ _24929_/Y _24929_/B _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_182_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28697_ _28697_/Q _31871_/CLK _28697_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_76_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28431__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1897 VPWR VGND _20878_/S _18706_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25839__C1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20915__A2 _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29557__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17241__A0 _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3476_A _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22596__B _22614_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24106__A2 _24104_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18450_ VGND VPWR _18456_/S _18516_/A1 _28224_/Q _28224_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2601_A wire2601/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19781__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15662_ VGND VPWR _15736_/S _30514_/Q _30800_/Q _15662_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_54_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27648_ _27654_/S _27649_/C _27793_/D _27793_/B _31398_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_2_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_120 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_266_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23314__A0 _17056_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22117__A1 _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25079__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32092__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17792__A1 _31730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_131 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15252__C1 _29055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_76_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17792__B2 _31729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17401_ _30950_/Q _30984_/Q _30878_/Q _30844_/Q wire3192/X _17401_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA_142 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3835_A wire3837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14613_ VGND VPWR _14935_/S _30486_/Q _30772_/Q _14613_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_153 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18381_ VGND VPWR _18388_/S wire3869/X _28158_/Q _28158_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_164 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15593_ _15579_/X _15592_/X wire1097/X _15583_/X _15593_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27231__B_N _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27579_ VGND VPWR _27579_/X _25643_/C _32219_/Q _32211_/Q _25643_/B _32227_/Q _32235_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__22668__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30534__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14395__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_175 _23890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3193 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_1444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_186 _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_2872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17332_ wire3578/X _30815_/Q _30832_/Q _17331_/X _17332_/B1 _17332_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XANTENNA__19533__A2 _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29318_ _29318_/Q _32316_/CLK _29318_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_197 _29075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14544_ _14544_/X _14544_/C _14544_/A _14544_/B _14544_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_81_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28581__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30590_ hold148/A _31507_/CLK _30590_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16347__A2 _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21340__A2 _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26264__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26803__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25606__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19397__S _19397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2970_A _18622_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17263_ VGND VPWR _17263_/X input185/X _17259_/X _17447_/A1 _17262_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_13_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23078__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29249_ _29249_/Q _32311_/CLK _29249_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15555__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14475_ _14471_/Y _14472_/X _14473_/Y _14474_/X _14475_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_100_3120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_5631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_2739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19002_ _19001_/X _19151_/S _19201_/A2 _28191_/Q _19002_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_84_5574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23858__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16214_ VGND VPWR _16961_/S _28415_/Q _29080_/Q _16214_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_45_5536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32260_ _32260_/Q _32523_/CLK _32260_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30684__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19297__A1 _27917_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17194_ _21630_/B1 _29730_/Q _21629_/A _22026_/A2 _29900_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_139_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20336__S _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25485__A_N _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26016__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24290__B2 _31592_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15570__A3 wire1496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output569_A _31096_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31211_ _31211_/Q _32578_/CLK _31211_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16145_ _16145_/X _29174_/Q _16150_/A2 _16150_/A3 _15957_/S _16144_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__26730__A_N _31780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13739__A _31756_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32191_ _32191_/Q _32467_/CLK _32191_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_212_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22840__A2 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15858__A1 _29209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26031__A2 _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_154_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20851__A1 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23647__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19049__A1 _27969_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31142_ _31142_/Q _32544_/CLK _31142_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_4428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21956__A _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20851__B2 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16076_ VGND VPWR _16837_/S _32308_/Q _28916_/Q _16076_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_61_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22551__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_265_core_clk _32574_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_237_2285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23874__C _24888_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_1562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15027_ VGND VPWR _15027_/X _15024_/X _15026_/X _15640_/A1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_174_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19904_ VGND VPWR wire2168/A _26694_/D _25980_/A2 _19904_/X _27075_/C1 _20061_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18257__C1 _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26319__B1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31073_ _31073_/Q _31763_/CLK _31073_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_1994 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29087__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20603__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16807__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21167__S _21167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30024_ hold231/A _30385_/CLK _30024_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21800__B1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19835_ VGND VPWR _26880_/B _19789_/C _19853_/A2 _19835_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_229_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18272__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_3110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_3850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2982 VPWR VGND _18507_/S _18500_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_228_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15086__A2 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16283__A1 wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24986__B _25051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17480__B1 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24345__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_5602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30064__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19766_ _19766_/Y _20042_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_16978_ _29982_/Q _20958_/S _30410_/Q hold467/A _16979_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_245_5372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14294__B1 hold187/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22787__A _29890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput4 VGND VPWR input4/X flash_io1_di VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__15491__C1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19757__C1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18984__B _19200_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23382__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32435__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18717_ VGND VPWR _18717_/X _19335_/B _19278_/S _28017_/Q _18716_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_285_2559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_4611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25163__A _25197_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19221__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15929_ VGND VPWR _15929_/X _16040_/A2 wire1032/X _15926_/X _15928_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_265_881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_2357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31975_ _31975_/Q _32431_/CLK _31975_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19697_ _27071_/C1 _19696_/Y _19711_/A2 _28509_/Q _28509_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18476__S _18476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16035__A1 _32419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19799__C _26779_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17232__B1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27789__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18648_ VGND VPWR _18649_/S _23291_/A1 _28361_/Q _28361_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30926_ _30926_/Q _31762_/CLK _30926_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22108__A1 wire2273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_3981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17783__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15243__C1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23305__B1 _18667_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28924__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3099 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_2644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18980__B1 _18979_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17783__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25845__A2 _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_33_3504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_1560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15794__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18579_ _30433_/Q _20914_/C _30432_/Q _18580_/C _20912_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_30857_ _30857_/Q _31846_/CLK wire724/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23856__A1 _31895_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20100__A _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23856__B2 _31863_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20610_ VGND VPWR _20615_/S _27703_/A1 _29125_/Q _29125_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26706__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21590_ VPWR VGND _21592_/B _21590_/B _22046_/B VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_239_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30788_ _30788_/Q _32351_/CLK _30788_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_5056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18732__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24507__A _31224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14349__A1 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_193_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20541_ VGND VPWR _20551_/S _29058_/Q _27507_/A1 _29058_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32527_ _32527_/Q _32527_/CLK _32527_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15546__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2910_A _20471_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23608__B2 _24837_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17913__B_N wire1688/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15010__A2 _15010_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23260_ VGND VPWR _23267_/S _29508_/Q _30243_/Q _30243_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_3198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23130__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20472_ VGND VPWR _20484_/S _28991_/Q _27154_/A1 _28991_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32458_ _32458_/Q _32464_/CLK _32458_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_3763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2518 VPWR VGND _20714_/S _20719_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23084__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20246__S _20259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26722__A _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19827__A3 _26872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21095__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22211_ VGND VPWR _22211_/X _22208_/X _22210_/X wire2273/X wire826/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_max_length1234_A _26936_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22292__A0 _29137_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17299__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31409_ _31409_/Q _31522_/CLK _31409_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17838__A2 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23191_ _23191_/C1 _23191_/B1 _22553_/A _29735_/Q _23191_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_274_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32389_ _32389_/Q _32548_/CLK _32389_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15567__C _15567_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_1949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1839 VPWR VGND _27679_/A1 wire1840/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_230_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15849__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26022__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28304__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26441__B _26441_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23557__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22142_ _22142_/X _22141_/C _22141_/A _22141_/B _22141_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__21866__A _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput330 _14001_/Y la_iena[75] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16510__A2 _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23784__C _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1401_A wire1402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput341 _13991_/Y la_iena[85] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_47_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput352 _13981_/Y la_iena[95] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_27_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22073_ _22073_/X _21900_/B _22071_/X _22072_/X _22070_/X _21960_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_26950_ VGND VPWR _31972_/D _27053_/C wire838/X _26950_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xoutput363 _13940_/Y la_oenb[104] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21585__B _21646_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25057__B _25069_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput374 _13930_/Y la_oenb[114] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_112_3013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput385 _13920_/Y la_oenb[124] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18799__B1 wire1817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21398__A2 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30407__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20055__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput396 _13804_/Y la_oenb[19] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21077__S _21077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25901_ VGND VPWR _19559_/B _19566_/A _25903_/S _25901_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_0_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21024_ VGND VPWR _21030_/S hold231/X _29489_/Q _29489_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_9_2583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_2301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_2683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26881_ _27087_/C1 _26880_/Y _26900_/A _31890_/Q _31890_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28454__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_5519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_17_0_core_clk_A clkbuf_4_8_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28620_ _28620_/Q _32529_/CLK _28620_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20070__A2 _19543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17471__B1 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23139__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25533__A1 _31346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24336__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25832_ _25832_/Y _31440_/Q _27854_/C _25830_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 Xload_slew2628 VPWR VGND _14213_/A _19531_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_2469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27272__B hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xload_slew2639 VPWR VGND _19543_/B _14204_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_2123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14285__B1 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26592__A1_N _26595_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22347__A1 _30462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23544__A0 _30035_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold178_A hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14824__A2 _14819_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23292__S _23292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25073__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28551_ _28551_/Q _32319_/CLK _28551_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19212__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1868_A _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25763_ _32088_/Q _32089_/Q _32090_/Q _27194_/C _27197_/C _32091_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_1 X_22975_ _25733_/C _22975_/A _22975_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_73_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18386__S _18386_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30557__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16026__A1 _28811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17223__A0 _30404_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_339 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26089__A2 _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15803__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27502_ VGND VPWR _27517_/S wire1792/X _32317_/Q _32317_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24714_ _24708_/X _24714_/B _24714_/X _24714_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__19763__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31802__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27699__S _27701_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21926_ _21527_/Y _21914_/Y _21926_/Y _21558_/D _21558_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 Xclkbuf_leaf_69_core_clk _31467_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_28482_ _28482_/Q _32553_/CLK _28482_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25694_ VGND VPWR _25693_/C _25693_/D _25693_/B _25694_/X _25692_/A _31395_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_243_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16577__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27729__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14421__A_N _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_1368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21570__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14588__A1 _14627_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27433_ VGND VPWR _27483_/S _32273_/Q _32274_/Q _27433_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_90_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25801__A _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24645_ _31463_/Q _31461_/Q _24645_/B _24666_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_4 XFILLER_205_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14588__B2 _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21857_ VGND VPWR _21857_/S _21712_/X _22067_/B _21857_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23847__A1 _31892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16982__C1 wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17918__A_N _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_812 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27038__A1 _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19515__A2 _24260_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_1081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20808_ VGND VPWR _20811_/S _29321_/Q _27697_/A1 _29321_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27364_ VGND VPWR _27366_/S _32218_/Q _27276_/X _32218_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_3543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24576_ _24576_/B _31044_/D _24576_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_240_3377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_2471 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21788_ _17035_/X _21776_/Y _21789_/B _21335_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_123_3164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27589__A2 _32220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18723__B1 _18722_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29103_ _29103_/Q _32401_/CLK _29103_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_2947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31952__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26315_ _26315_/Y _26327_/B _26819_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23527_ VGND VPWR _23527_/S wire4143/X _30450_/Q _23527_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20530__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15537__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20739_ VGND VPWR _20739_/S _27694_/A1 _29254_/Q _29254_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27295_ VGND VPWR _27301_/S _32158_/Q _27268_/X _32158_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_155_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21873__A3 _29790_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_5421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15001__A2 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3057_A _18054_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29034_ _29034_/Q _31918_/CLK _29034_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14260_ _14127_/A _14260_/Y _14259_/X _31268_/Q wire3235/X _29498_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 X_26246_ _31611_/D _24820_/B _26188_/A _26245_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_84_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23458_ VGND VPWR _23434_/X _23458_/X _23435_/X _29368_/Q _22185_/B _23438_/Y VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_273_3120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24272__A1 _31685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24272__B2 _31583_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21086__A1 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22409_ VGND VPWR _22616_/S _29965_/Q wire726/X _29965_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_84_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22283__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26549__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17829__A2 _17565_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14191_ VGND VPWR _14167_/S hold156/X _14190_/X hold157/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_26177_ _26177_/X _31482_/Q _26179_/B1 _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__32308__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2384_A _14174_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23389_ _23389_/X _20980_/S _30367_/Q _18666_/C _22180_/S _22284_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__22822__A2 _29893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_3468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26013__A2 _14171_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14381__C _24424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23467__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25128_ VGND VPWR _25149_/B _25136_/B _31202_/Q _25128_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_136_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input63_A la_input[116] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24024__A1 _28467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_1965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20680__A _32340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16501__A2 wire999/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25221__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24024__B2 _28595_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26070__C _26070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19246__A _28266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25059_ _25065_/A _24051_/B1 _25059_/X _25059_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_wire2551_A _20258_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24575__A2 _25186_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29936_ hold409/A _32365_/CLK _29936_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_17950_ VGND VPWR _17950_/S _18499_/A1 _27888_/Q _27888_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_183_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_5361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30087__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22586__A1 wire3692/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3041 VPWR VGND _18144_/S _18132_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_152_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16901_ _16959_/A2 wire3285/X _29646_/Q _16901_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_266_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1511 wire1519/A _15561_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3052 VPWR VGND _18118_/S _18119_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32458__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3063 VPWR VGND _18037_/S _18043_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_17881_ _17881_/C _24591_/B _19508_/A _17881_/D _24588_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 Xfanout1522 _15577_/A2 _15575_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29867_ _29867_/Q _31282_/CLK _29867_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_4502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3074 _18007_/S _18015_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_286_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_5209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2340 VPWR VGND wire2340/X _14204_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3085 VPWR VGND _17939_/S _17948_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1544 _16781_/A2 _16956_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout2289 VPWR VGND _17490_/B _26435_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19620_ _26218_/A _19619_/Y _19638_/A _28478_/Q _28478_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_229_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2351 VPWR VGND wire2351/X wire2352/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_212_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24327__A2 _20127_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3096 VPWR VGND wire3096/X _17306_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16832_ _16832_/X _30799_/Q _16835_/B1 _16832_/A3 _16068_/S _16831_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28818_ _28818_/Q _32574_/CLK _28818_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2362 VPWR VGND wire2362/X _14189_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1566 _27476_/S _27484_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_wire2816_A _25511_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2373 VPWR VGND wire2373/X wire2374/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14276__B1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29798_ hold268/A _30460_/CLK _29798_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23535__A0 _30026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1577 _23879_/X _24163_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_3981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2384 VPWR VGND wire2384/X _14174_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19739__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28947__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2395 VPWR VGND wire2395/X wire2396/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1599 _19994_/X wire1600/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_264_4579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19203__A1 _28331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19551_ _19551_/A _19551_/X _19551_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_186_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1661 VPWR VGND _24260_/D _19641_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_280_103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16763_ wire1556/X wire3287/X _30797_/Q _16763_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28749_ _28749_/Q _32318_/CLK _28749_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_13975_ _13975_/A _13975_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1672 VPWR VGND wire1672/X wire1672/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout3760_A _30217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16017__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17214__A0 _17213_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31482__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20839__B _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18502_ VGND VPWR _18507_/S wire3912/X _28274_/Q _28274_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_91_3428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15714_ _15714_/X _15727_/A2 _15713_/X _29131_/Q wire1515/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_245_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19482_ _31313_/Q _31315_/Q _19481_/A _31314_/Q _19488_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31760_ _31760_/Q _31760_/CLK _31760_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16694_ _16911_/A2 _16694_/X _16693_/X _16884_/S _28797_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16568__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17765__A1 _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_4030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18962__B1 _18961_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_3649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26807__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30711_ VGND VPWR _30711_/D _32440_/CLK _30711_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18433_ VGND VPWR _18433_/S _28208_/Q _23301_/A1 _28208_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27402__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15645_ VGND VPWR _15645_/X _15644_/X wire1209/X _15705_/A1 _15643_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14579__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15776__B1 wire1449/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31691_ _31691_/Q _32107_/CLK _31691_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_2866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27971__CLK _28183_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23838__B2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27029__A1 hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_1241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26526__B _26537_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_3125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21849__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30642_ _30642_/Q _32349_/CLK _30642_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18364_ VGND VPWR _18364_/S wire3818/X _28142_/Q _28142_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_1706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_5636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25430__B _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15576_ _29234_/Q wire1500/X _15576_/X _15277_/S _15575_/X _15615_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__28444__D _28444_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_4798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22546__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22510__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17517__B2 _26543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18714__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_5617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17315_ _17424_/B wire3095/X _32285_/Q _17424_/C _17316_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23231__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14527_ VGND VPWR _14527_/X _20982_/B _30422_/Q _23231_/A _20847_/C VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20521__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26245__C _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15528__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30573_ _30573_/Q _32566_/CLK hold134/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18295_ _18295_/Y _29864_/Q _18295_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_236_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18190__A1 wire3901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26252__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28327__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32312_ _32312_/Q _32352_/CLK _32312_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24799__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17246_ wire2122/X _17302_/A _17246_/X _17447_/A1 input174/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_15_2599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14458_ VGND VPWR _29713_/Q _14458_/Y hold364/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__23066__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24263__A1 _31682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16740__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19809__A3 wire2212/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26542__A _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21077__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2516_A _20719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32243_ _32243_/Q _32259_/CLK _32243_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22274__B1 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17177_ VGND VPWR _17238_/S _17170_/X _17176_/X _30397_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14751__B2 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14389_ _27230_/A _26509_/C _26539_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_48_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26004__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26261__B _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20824__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23377__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16128_ _16128_/X _30780_/Q _16448_/A2 _16448_/A3 _15975_/S _16127_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_83_2222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32174_ _32174_/Q _32532_/CLK _32174_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27076__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28477__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22026__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31125_ _31125_/Q _32540_/CLK _31125_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25763__A1 _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1651_A wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16059_ VGND VPWR _16826_/S _28948_/Q _29246_/Q _16059_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29722__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20037__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire735_A wire735/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3480 _31393_/Q _25693_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_286_5494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20588__A0 _29103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31056_ _31056_/Q _31748_/CLK _31056_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_257_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18245__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_3366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21785__C1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20052__A2 _19628_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30007_ _30007_/Q _30455_/CLK _30007_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_284_431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24318__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19818_ _19817_/X _28561_/Q _28561_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__31825__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27092__B _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23526__A0 _31967_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22329__A1 _14412_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire902_A wire904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24869__A3 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29872__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_9_0_core_clk clkbuf_5_9_1_core_clk/A clkbuf_5_9_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_39_3724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_3890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19749_ _25718_/A _19748_/X _19772_/A _28531_/Q _28531_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_285_1611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length4099_A _28648_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_1986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2958_A _18626_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15623__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19745__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13932__A _28565_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22760_ VGND VPWR _22756_/X _22765_/B _22757_/X _22779_/A1 _21413_/A _22745_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XANTENNA_wire3032_A _18366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_2621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23125__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31958_ _31958_/Q _31961_/CLK _31958_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16559__A2 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25279__B1 _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17756__B2 _31728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14747__B _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18953__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21711_ _21711_/A _29911_/Q _21713_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XANTENNA__31975__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_1027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30909_ _30909_/Q _32064_/CLK _30909_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17123__B _29891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20760__A0 _29274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30884__D wire709/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29102__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22691_ VGND VPWR _22691_/X _22747_/B _29881_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_263_1931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31889_ _31889_/Q _32039_/CLK _31889_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_181_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26491__A2 _17481_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24430_ _24430_/X _24424_/B _31015_/Q _31014_/Q _14383_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_244_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21642_ _21642_/X _21459_/D _29722_/Q _29877_/Q _14334_/B VGND VPWR _21355_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_202_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21304__A2 _21288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18705__B1 _30090_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23779__C _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24361_ _24360_/X _24888_/D wire1668/A _23611_/A _30983_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31205__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21573_ _22010_/B _21573_/B _21672_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xor2_4 XANTENNA_20 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16454__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3005 VPWR VGND _18465_/S _18460_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_31 _30855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3499_A _31194_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3016 VPWR VGND _18407_/S _18433_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_26100_ _26112_/D _31546_/Q _31544_/Q _31545_/Q _26100_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA_42 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26243__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27440__A1 _32278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23312_ VGND VPWR wire820/A _30290_/Q _17038_/X _30290_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20524_ VGND VPWR _20528_/S _29041_/Q _27140_/A1 _29041_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_53 _30871_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29252__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27080_ _27120_/B wire2200/X _27098_/A _27080_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_33_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_64 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16192__B1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24292_ _30942_/D _24273_/D _31594_/Q _24284_/X _31671_/Q wire1351/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 Xmax_length2304 VPWR VGND _26947_/B2 _26687_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xmax_length3049 VPWR VGND _18109_/S _18113_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_187_core_clk _31762_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_75 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16731__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25451__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2315 VPWR VGND fanout2307/A wire2316/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_176_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_86 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21068__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26031_ _31526_/Q _31528_/Q _31525_/Q _31527_/Q _26031_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_97 _17228_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23243_ VGND VPWR _23251_/S _29491_/Q _30226_/Q _30226_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22265__B1 _30049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14742__A1 _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20455_ VGND VPWR _20473_/S _28974_/Q _27680_/A1 _28974_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23795__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22804__A2 _30467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_116_core_clk _32309_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_189_5602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1424_A _18303_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19130__B1 wire1939/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_88_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23287__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31355__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24006__A1 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23174_ _30182_/D _23185_/B _23173_/X _30182_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_170_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19681__A1 _28501_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20386_ _20386_/X _27485_/D _27678_/D _27598_/C _21173_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XANTENNA__24006__B2 _31167_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20704__S _20716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25203__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1658 VPWR VGND _24140_/A2 _24204_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_131_4112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26400__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22017__A0 _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16495__A1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3288 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22125_ _22124_/X _23417_/A wire829/X _29818_/Q _29818_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17692__B1 _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3833_A wire3834/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27982_ _27982_/Q _30466_/CLK _27982_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_251_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22568__A1 wire3705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_5534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29721_ _29721_/Q _31938_/CLK _29721_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_40_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xload_slew3104 _26123_/C _26102_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_26933_ _31957_/Q wire1571/X _31957_/D wire2696/X wire1230/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22056_ _21593_/Y _21942_/S _21298_/X _21595_/X _22056_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18236__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19433__A1 _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20043__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21240__A1 _21463_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21007_ VGND VPWR _21008_/S _29472_/Q _27696_/A1 _29472_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24309__A2 _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25506__A1 _19498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19984__A2 _19984_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29652_ VGND VPWR _29652_/D _30451_/CLK _29652_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__18120__D _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26703__B1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26864_ VGND VPWR wire2675/X _26866_/A1 wire752/X _26864_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_2_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23517__A0 _30445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16798__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17995__A1 wire3886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28603_ _28603_/Q _31877_/CLK _28603_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25815_ VGND VPWR _25825_/S _25814_/X _31431_/Q _31431_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_21_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_3824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29583_ _29583_/Q _32067_/CLK _29583_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19513__B _19513_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1960_A _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26795_ VGND VPWR wire2668/X _19522_/A wire777/A _26795_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27994__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19197__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15533__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24190__B1 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18539__A3 _30086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13842__A _29826_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28534_ _28534_/Q _31351_/CLK _28534_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13760_ _31186_/Q _13760_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_207_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25746_ _31410_/D wire2251/X _25745_/X _31365_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA_input215_A spi_sdi VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22958_ VGND VPWR _22965_/S _30470_/Q hold434/A _30135_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_285_2890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17747__A1 _31719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21543__A2 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18944__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17747__B2 _31723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_5598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21909_ _14365_/B _21909_/X _22065_/B1 _22969_/S _23180_/A _17127_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_129_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_1007 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_1176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28465_ _28465_/Q _32552_/CLK _28465_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_4146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25677_ VGND VPWR _27395_/B _25677_/Y _31390_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__14149__S _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22889_ _22934_/A _22891_/A _22911_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_125_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15222__A2 _15503_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26482__A2 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25285__A3 _25187_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15430_ VGND VPWR _15430_/X _15427_/X _15429_/X _15640_/A1 _15509_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27416_ VGND VPWR _27421_/S _32263_/Q wire2801/X _32263_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_3434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24628_ _24637_/B _24627_/X _24626_/X _24622_/X _24612_/X _24611_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_103_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28396_ VGND VPWR _28396_/D _30387_/CLK _28396_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_clkbuf_opt_8_0_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20675__A _32335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14430__B1 _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25690__B1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21270__S _23536_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15361_ VGND VPWR _15750_/S _28962_/Q _29260_/Q _15361_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27347_ VGND VPWR _27348_/S _32203_/Q _27278_/X _32203_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_3373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24559_ _31203_/Q _24559_/Y _31204_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XPHY_675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14981__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3341_A _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_4020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32130__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2599_A hold194/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17100_ _29888_/Q _22026_/A2 _21866_/A _29718_/Q _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_257_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27431__A1 _32272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14312_ _14334_/B _21778_/B _21778_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_7_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_123_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18080_ VGND VPWR _18085_/S wire3830/X _28010_/Q _28010_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_237_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15292_ _16081_/A2 _15607_/A1 _28888_/Q _15292_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_136_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27278_ _27278_/X _27280_/C hold226/A hold487/A _27280_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XPHY_1274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23048__A2 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16722__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25442__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14392__B _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21059__A1 _29516_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17031_ VGND VPWR _23348_/C _30191_/Q _30380_/Q _17031_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29017_ _29017_/Q _32125_/CLK _29017_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14243_ _14127_/A _14243_/Y _14242_/X wire3490/X wire3235/A _29495_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XANTENNA__22256__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26229_ _31603_/Q _24820_/B _26230_/B _32293_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__17984__A _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25993__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24796__A2 _24255_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_4269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_253_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29745__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19121__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2860 VPWR VGND _21204_/S _21199_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_27_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23197__S _23199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14174_ _14174_/Y _14174_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_16 XFILLER_49_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32280__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20614__S _20614_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_4545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2893 VPWR VGND _20589_/S _20605_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16486__A1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22008__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30722__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31848__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18982_ VGND VPWR _18982_/S _28190_/Q _28222_/Q _18982_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26942__B1 wire1235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22559__A1 hold210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20019__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2020 VPWR VGND _17874_/A2 _17503_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_234_1532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24012__A4 _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17933_ VGND VPWR _17948_/S wire3864/A _27871_/Q _27871_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_285_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29919_ hold325/A _31910_/CLK _29919_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29895__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19424__A1 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_4466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30969__D _30969_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output434_A _13863_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24610__A _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27498__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21231__A1 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17435__B1 _17248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17923__S _17923_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19975__A2 _24939_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18778__A3 _18775_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19704__A _19704_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17864_ _17864_/X _17879_/A _31654_/Q _17474_/X _14067_/A VGND VPWR _17563_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_247_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1352 VPWR VGND wire1354/A wire1355/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_97_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1065_A wire1066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25425__B _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14249__B1 _29510_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1363 _19706_/B _24069_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_213_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2170 VPWR VGND _25065_/B _20171_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27593__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23640__B_N _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30872__CLK _32438_/CLK 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X_17795_ _17539_/C _17794_/X _31731_/D _17524_/B _17791_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__29125__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4005 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19188__B1 _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15461__A2 _15450_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24181__B1 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13752__A _31265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19727__A2 _19718_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19534_ _19652_/A _19628_/A _19534_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 X_31812_ _31812_/Q _32016_/CLK _31812_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16746_ _16741_/X wire894/X wire912/X _16745_/X _16746_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire1232_A wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13958_ _28539_/Q _13958_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_1086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_1926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17738__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_1941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22731__A1 _30095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18935__B1 _23355_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17738__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26537__A _26537_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23660__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2466_A _23251_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30102__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31743_ _31743_/Q _31923_/CLK _31743_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20742__A0 _29257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19465_ _19466_/B _28448_/Q _28449_/Q _19457_/X _25540_/C _19464_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_16677_ wire3242/X _16874_/A2 _16677_/X _16934_/A2 _32133_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__31228__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13889_ _28608_/Q _13889_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_91_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15213__A2 wire1172/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18416_ VGND VPWR _18423_/S _28191_/Q wire3866/X _28191_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16410__B2 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_2395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15628_ _15628_/X _15628_/A2 _15628_/B1 _29267_/Q _15628_/A3 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA__25160__B _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2024 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19396_ VGND VPWR _19415_/S _27687_/A1 _28412_/Q _28412_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31674_ _31674_/Q _32127_/CLK _31674_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24484__A1 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_4584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23599__C _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25681__B1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21180__S _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30625_ _30625_/Q _30865_/CLK _30626_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_241_1536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18347_ VGND VPWR _18357_/S wire3870/X _28125_/Q _28125_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14972__A1 _29313_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15559_ _15558_/X wire1113/A _15723_/A2 _32068_/Q _15559_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14972__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19360__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27422__A1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26225__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18702__A3 _18683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30252__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31378__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18278_ _18278_/B _18278_/Y _18278_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_30556_ hold347/A _31892_/CLK input46/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_4325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_280_core_clk _32572_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25433__B1 _31297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2800_A _27272_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26630__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14724__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17229_ _21633_/A wire3217/X _17228_/X _17229_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22247__B1 _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput40 irq[1] input40/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__25984__A1 _19648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15921__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1866_A wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30487_ _30487_/Q _32110_/CLK _30487_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput51 la_input[105] input51/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_236_4489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_5512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput62 VPWR VGND input62/X la_input[115] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_67_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27867__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput73 VPWR VGND input73/X la_input[125] VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24504__B _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire852_A wire853/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32226_ _32226_/Q _32538_/CLK _32226_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20240_ VGND VPWR _20247_/S _28783_/Q _27244_/A0 _28783_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xinput84 VGND VPWR input84/X input84/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_253_4792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27186__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17269__A3 _17268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19663__A1 _28492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput95 VPWR VGND la_input[2] input95/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__20524__S _20528_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length783_A _26347_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25319__C _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_2615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_1_0_0_core_clk clkbuf_1_0_1_core_clk/A clkbuf_0_core_clk/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__16477__A1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17674__B1 _17673_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13927__A _28570_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20171_ wire881/A _20128_/B _20171_/X _20171_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_32157_ _32157_/Q _32467_/CLK _32157_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26933__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_1621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25200__A3 _25416_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31108_ _31108_/Q _32541_/CLK _31108_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24944__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27307__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18218__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19415__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32088_ _32088_/Q _32233_/CLK _32088_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30879__D wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21758__C1 wire3991/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16229__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27489__A1 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20025__A2 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17426__B1 wire2073/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17833__S _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_5226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19966__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23930_ _30617_/Q _19857_/B _23930_/X _30553_/Q wire1609/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_31039_ _31039_/Q _31607_/CLK _31039_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3247_A _14102_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17977__A1 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21773__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_5549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32003__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26161__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23861_ _30848_/D _23861_/C _23861_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_22_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19333__B _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19179__B1 _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21033__B1_N _21032_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15353__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15452__A2 _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24172__B1 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25600_ VGND VPWR _25601_/C _25571_/C _25578_/X _25632_/B _31372_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_22812_ _30468_/Q _22811_/X _22814_/B _22933_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_265_2749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26580_ _23745_/X _26580_/X _26579_/Y _26616_/B2 wire3461/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA_708 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23792_ _30825_/D _23813_/C _23792_/A _23807_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_165_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_719 _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14660__B1 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18926__B1 wire1935/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22722__A1 _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29618__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17729__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14477__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23570__S _23582_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25531_ _19471_/A wire2813/X _25531_/Y _31345_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_165_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22743_ _22743_/X _22740_/B _22741_/B _22740_/A _22661_/B _14404_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__20733__A0 _29248_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_3568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_2883 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16401__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15204__A2 _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27661__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28250_ _28250_/Q _32320_/CLK _28250_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25462_ _25462_/A _25462_/X _25462_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_72_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22674_ VGND VPWR _22674_/X _22733_/A _29879_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_108_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_2176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_368_core_clk _32075_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_16_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15755__A3 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16952__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21090__S _21090_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27201_ _32093_/D _25765_/Y _27276_/C _27200_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_219_5322 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24413_ VGND VPWR _24420_/D _14382_/C _31008_/Q _24434_/B _14388_/C _24434_/D VGND + VPWR NF_sky130_fd_sc_hd__a311o_2 XFILLER_224_1745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21625_ _21626_/D _21925_/B _21625_/Y _21674_/B _21626_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 X_28181_ _28181_/Q _30387_/CLK _28181_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28642__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25393_ _31282_/Q _25408_/B _25393_/Y _25402_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_8_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29768__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23302__C _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19351__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1639_A wire1643/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4231 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27132_ _27132_/Y _24779_/X _32041_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_222_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24344_ _32019_/Q _19710_/B _24344_/X _31987_/Q _26376_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_258_4692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold210_A hold210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21556_ _21890_/B _21556_/B _21556_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__16165__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_5400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25424__A0 _31294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15507__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26182__A _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_1267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20507_ VGND VPWR _20517_/S _27254_/A0 _29025_/Q _29025_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27063_ VGND VPWR _32009_/D wire772/A _27062_/X _26781_/B _27075_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_219_3942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30745__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24275_ _31686_/Q _26542_/A _24275_/X _31661_/Q _26335_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14715__B2 wire1508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15912__B1 _16151_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21487_ _21674_/D _21514_/B _30358_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_279_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1400 VPWR VGND _19275_/A2 wire1402/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_254_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19103__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1806_A _19788_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22789__A1 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_4267 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26014_ _26771_/A _26013_/Y _26014_/A2 _31522_/Q _31522_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22789__B2 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23226_ VGND VPWR _23226_/S _21778_/A _23225_/X _30217_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28792__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20438_ VGND VPWR _20444_/S _28958_/Q _27251_/A0 _28958_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14191__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20434__S _20447_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19508__B _26904_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22253__A3 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21997__C1 _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16468__A1 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17665__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13837__A _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23157_ hold428/A _23157_/A2 _23157_/X _30109_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_268_707 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26924__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2082_A wire2083/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20369_ _25881_/B wire838/A _26542_/A _24467_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_213_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input165_A la_input[93] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1499 wire1500/X _15228_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_63_3883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15676__C1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23738__B1 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22108_ _22108_/X _22105_/X wire2273/A _22107_/X _22092_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XANTENNA__30895__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18209__A2 _30326_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19406__A1 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27965_ _27965_/Q _30449_/CLK _27965_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_27_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23088_ VGND VPWR _23088_/X _23086_/X _23087_/X _23085_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__17028__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29148__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_3039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_3146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20016__A2 wire2664/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22410__A0 _21916_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_1776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17743__S _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29704_ _29704_/Q _30433_/CLK _29704_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19957__A2 _19581_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14930_ _15629_/A2 _14930_/X _14929_/X _14675_/S _29312_/Q _14930_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_265_4630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22039_ _14407_/A _22034_/X _22072_/C wire3991/X _22039_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26916_ _31940_/Q wire1573/A _31940_/D _26916_/B2 wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19524__A _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24950__A2 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_84_core_clk _31846_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_185_3916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_3968 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27896_ _27896_/Q _30482_/CLK _27896_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2347_A wire2348/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17968__A1 wire3857/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23691__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22961__A1 _30473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18090__A0 _28019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21265__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_2340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29635_ _29635_/Q _32302_/CLK _29635_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26152__A1 _19567_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15771__B _15771_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14861_ _14860_/X _14851_/X _14861_/Y wire1067/X wire1097/A _14847_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311oi_2 Xclkbuf_leaf_13_core_clk _32432_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_229_3047 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26847_ _27131_/B _26846_/Y wire749/X _31873_/Q _31873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30125__CLK _30285_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16359__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3291_A _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16600_ VGND VPWR _16942_/S _29540_/Q _29574_/Q _16600_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15443__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19709__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13812_ _31134_/Q _13812_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__17044__A _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24702__A2 _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17580_ _31629_/Q _17580_/X _17875_/B _17475_/X _14132_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_57_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29566_ _29566_/Q _31586_/CLK _29566_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29298__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14792_ _15047_/A1 _16814_/A2 _14792_/X _14933_/B1 _32115_/Q _16814_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_166_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26778_ _26859_/C1 _26777_/X wire777/X _31839_/Q _31839_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_148_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22713__A1 _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18917__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14387__B _14388_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23480__S _23518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23910__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16531_ _16965_/A2 _16952_/A1 _29475_/Q _16531_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_268_1694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28517_ _28517_/Q _31351_/CLK _28517_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13743_ _31464_/Q _24650_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20724__A0 _29239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25729_ VGND VPWR _25733_/D _25723_/A _25727_/X _25730_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_57_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_1998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29497_ VGND VPWR _29497_/D _30483_/CLK _29497_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_105_3608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18393__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17196__A2 _30400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3556_A _30995_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31413__D _31413_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27652__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19250_ _19249_/X _19278_/S _19375_/A2 _27978_/Q _19250_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_183_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30275__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28448_ _28448_/Q _31806_/CLK _28448_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16462_ VGND VPWR _16918_/S _29023_/Q _28991_/Q _16462_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_53_2839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24466__A1 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20609__S _20615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_4268 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16943__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_1943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31520__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18201_ VGND VPWR _18201_/X _18244_/A _18201_/A _18249_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_144_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15413_ _15413_/X _15727_/A2 _15412_/X _28763_/Q wire1515/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_103_3332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19181_ _19180_/X wire1942/X wire1984/A _28039_/Q _19181_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_242_1845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14954__A1 _28091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24308__C _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16393_ _16815_/A2 _16393_/X _16392_/X _16843_/A2 _28957_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16094__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28379_ _28379_/Q _30483_/CLK _28379_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23674__C1 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14607__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18145__A1 _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3723_A _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26207__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19342__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18132_ VGND VPWR _18132_/S wire3873/X _28060_/Q _28060_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30410_ VGND VPWR _30410_/D _30410_/CLK _30410_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XPHY_494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4781 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_5477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15344_ _15344_/X _32361_/Q _15760_/B1 _15561_/B2 _15561_/C1 _15343_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_240_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16156__B1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31390_ _31390_/Q _32545_/CLK _31390_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XPHY_1060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18696__A2 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19893__A1 _28596_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17353__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25415__B1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22492__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22229__B1 _22236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30341_ VGND VPWR _30341_/D _31945_/CLK _30341_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XPHY_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18063_ VGND VPWR _18083_/S wire3886/X _27993_/Q _27993_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_4618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25966__A1 _26779_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15275_ VGND VPWR _15275_/S _29226_/Q _29290_/Q _15275_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15903__B1 wire1043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31670__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4097_A wire4098/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_5081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_86_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17014_ _30378_/Q _16971_/A _17014_/X _29418_/Q wire3791/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xhold109 hold109/A hold109/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23977__B1 _28622_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14226_ _14245_/B _17881_/C _14225_/X _31272_/Q wire3232/X wire3974/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XANTENNA__14182__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30272_ _30272_/Q _30272_/CLK _30272_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27168__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output551_A _28720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20344__S _20357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output649_A wire2378/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16459__A1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32011_ _32011_/Q _32014_/CLK _32011_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length2690 VPWR VGND wire2689/A _14167_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21452__A1 _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17656__B1 _17655_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13747__A _31273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14157_ _14157_/X _31250_/Q _24446_/B _24446_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_236_1638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_2372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26915__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_3417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32026__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23655__S _23672_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24926__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_3563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26391__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18965_ _19203_/A2 _28285_/Q _19318_/B1 _18965_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14088_ _29698_/Q _14088_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_132_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20007__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17408__B1 input190/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19948__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17916_ _30414_/Q _30413_/Q _18434_/C _30484_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_239_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18896_ VGND VPWR _19180_/B _28026_/Q _27994_/Q _18896_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17880__C _17881_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17959__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28515__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4752 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22952__A1 _21392_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21755__A2 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1160 wire1172/X _15597_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21175__S _21184_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1182 wire1199/X _14887_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_17847_ _17847_/X _17840_/X _17490_/B _31736_/Q _17846_/X _17845_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_225_4113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1193 _15751_/B1 _15727_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_264_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_4796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31050__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32176__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24154__B1 _28639_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24994__B _25059_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15434__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16631__A1 wire3287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2489_A _20921_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25351__C1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1614_A _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_5172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17778_ VGND VPWR _17776_/X _17777_/B _17777_/Y _17778_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_18_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30618__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18908__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23901__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_3161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19517_ _26542_/B _23618_/C _24467_/C _26837_/A _23618_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_36_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20715__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16729_ _16714_/X _16728_/X _16784_/A3 _16718_/X _16729_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__28665__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18484__S _18497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_5178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17187__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18384__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_4163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27643__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15198__A1 _15536_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27797__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31726_ _31726_/Q _31726_/CLK _31726_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_108_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19448_ VGND VPWR _19440_/X _28443_/Q _28444_/Q _19448_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__23403__B _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16395__B1 _16653_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24457__A1 _24454_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16934__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22072__A_N wire3991/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26851__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30768__CLK _32580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31657_ hold481/A _32573_/CLK _31657_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19379_ _28144_/Q _19379_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__18136__A1 wire3863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21410_ _21410_/A _21424_/A _21410_/B _21410_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XFILLER_156_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26714__B hold431/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18216__C _29342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30608_ hold320/A _31873_/CLK _30608_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_260_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16147__B1 _32350_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24209__A1 _24201_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27098__A _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22390_ VGND VPWR _22619_/S _29949_/Q wire1869/X _29949_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_3828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18687__A2 _18666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19884__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31588_ _31588_/Q _32280_/CLK _31588_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25406__B1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23680__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length998_A wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16698__A1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21341_ _21464_/B _21462_/B _29729_/Q _21657_/B _21340_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_4 XFILLER_276_1418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25957__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30539_ _30539_/Q _31815_/CLK hold441/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19609__A _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16732__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_2204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24060_ wire1621/X _24059_/X _31140_/Q _24081_/A3 _24060_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_99_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14173__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21272_ VGND VPWR _23536_/S _29734_/Q _23395_/A _29734_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19636__A1 _28483_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20254__S _20259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19328__B _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28045__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23011_ _25693_/C _32457_/Q _23011_/X _23036_/S1 _32449_/Q _32465_/Q _32409_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_258_1885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20223_ VGND VPWR _20223_/S _28768_/Q _27261_/A0 _28768_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32209_ _32209_/Q _32532_/CLK _32209_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26906__B1 _31901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3364_A wire3365/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15575__C _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1122_A _14551_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17111__A2 _21616_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3618 wire3619/X _30761_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_63_3179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_3127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15658__C1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3629 VPWR VGND _30749_/D wire3630/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_3258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21994__A2 _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23565__S _23573_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20154_ _25718_/A _20153_/Y _20168_/A2 _28721_/Q _28721_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_6_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24888__C _24888_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25185__A2 _31221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26382__A1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25346__A _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15122__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30148__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2917 _20480_/S _20471_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23792__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24250__A _31762_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2939 VPWR VGND _20322_/S _20311_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15673__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14330__C1 _14328_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27750_ VGND VPWR _27756_/S wire2248/A _32478_/Q _32478_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_4673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32519__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24962_ _25041_/A wire1283/X _24962_/X _25027_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__24932__A2 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28195__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20085_ _26694_/C _20084_/Y _20122_/A _28688_/Q _28688_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25065__B _25065_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_2361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3629_A wire3630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14881__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22943__A1 wire3661/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21085__S _21098_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29440__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26701_ _26700_/Y _26859_/C1 _31803_/Q _26720_/A _31803_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_257_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23913_ _23913_/X _23911_/X _28520_/Q _24163_/B2 _19718_/B VGND VPWR _23912_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_273_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27681_ VGND VPWR _27683_/S wire2012/X _32415_/Q _32415_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24893_ VGND VPWR _19521_/B _19617_/A _24947_/A _24893_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_243_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16083__C1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29420_ _29420_/Q _30382_/CLK _29420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26685__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26632_ VGND VPWR _26631_/Y _26684_/A2 _26637_/B _26632_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_2_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_5381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23844_ _23844_/X _19527_/Y _26949_/A _31891_/Q _31859_/Q _19861_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_227_4989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30298__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold160_A hold160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27280__B hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24696__A1 _31472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14633__B1 wire1097/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_505 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_5576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25893__B1 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_516 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31543__CLK _31689_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27711__D _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_3827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_2978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25081__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29351_ _29351_/Q _30382_/CLK _29351_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_96_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_527 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20706__A0 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26563_ hold222/A _26563_/X _31764_/Q _26616_/B2 wire3461/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_265_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_538 _30570_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23775_ _26696_/D _23775_/Y _23776_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_278_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18394__S _18394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20987_ VGND VPWR _29449_/D _23307_/B hold461/X _20987_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_549 _30626_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18375__A1 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29590__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1756_A _25381_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27095__C1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28302_ _28302_/Q _30462_/CLK _28302_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27634__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26437__A2 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25514_ hold285/A _28437_/Q _28438_/Q _31336_/Q _25513_/Y _31336_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_282_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22726_ _22727_/A _22704_/B _22726_/X _22726_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_161_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29282_ _29282_/Q _32355_/CLK _29282_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20182__A1 _28735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16386__B1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26494_ _31705_/D _31705_/Q _26493_/X _26476_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__24448__A1 _14143_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20429__S _20429_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_3398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_17_1_core_clk clkbuf_opt_17_1_core_clk/X clkbuf_opt_17_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16925__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24448__B2 _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28233_ _28233_/Q _30282_/CLK _28233_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27500__S _27507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length3064_A _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_3865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25445_ _25430_/A _31303_/Q _24502_/X _24543_/D _25445_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20194__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24999__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22657_ _22657_/Y _22659_/C _22659_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__18127__A1 wire3891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_131_core_clk _32423_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_224_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31693__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19324__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_2992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14400__A3 _14398_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21608_ _21608_/A _21618_/A _21608_/B _22067_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 X_28164_ _28164_/Q _30274_/CLK _28164_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20375__D _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16138__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25376_ VGND VPWR _25376_/C _31278_/Q _25376_/X _31277_/Q _25381_/C VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__18678__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22588_ VGND VPWR _22594_/S _30355_/Q wire3702/X _22588_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22474__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_4790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16689__A1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27115_ _27117_/C1 _27114_/X _27117_/A2 _32035_/Q _32035_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_276_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24327_ _24326_/X _24357_/B1 _20127_/C _24353_/A1 _30966_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_159_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25948__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21539_ _21550_/A _30467_/Q _21677_/C _21550_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_120_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19519__A _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28095_ _28095_/Q _31937_/CLK _28095_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_191_4654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_3639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23959__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15060_ wire1547/A _15560_/A1 _30784_/Q _15060_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__32049__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19890__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27046_ _32001_/Q _32002_/Q _27048_/B _27050_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_4_5105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24258_ _26329_/B hold468/X _24256_/Y _26470_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_172_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_4640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14011_ _28486_/Q _14011_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_clkbuf_leaf_21_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23209_ VGND VPWR _23209_/S _30201_/Q _30131_/Q _30201_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_3363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_3937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22631__B1 _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14162__S _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2464_A _23250_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24189_ wire710/A _24184_/X wire732/X _24209_/B1 _24188_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 Xmax_length1274 VPWR VGND _26616_/B2 _26696_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_81_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_3279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28538__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15649__C1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23475__S _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24908__C1 _25687_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25176__A2 _25180_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3698_A _30343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17653__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28997_ _28997_/Q _31933_/CLK _28997_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_59_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23187__A1 hold476/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32199__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22599__B _22614_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23187__B2 _30115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15664__A2 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15782__A _28395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18750_ _28243_/Q _18750_/X _19200_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_210_4982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21198__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24923__A2 _19584_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15962_ _15959_/X _15961_/X wire1032/X _15962_/Y wire933/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 X_27948_ _27948_/Q _30198_/CLK _27948_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2729_A wire2730/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27548__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17701_ _31722_/Q _17539_/B _17701_/X _31721_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_max_length3865_A wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14913_ wire3251/X wire1732/X _14913_/X _15609_/B1 _29046_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_248_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26125__A1 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_4010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18681_ _23304_/C _18681_/X _18680_/X _30377_/Q _21211_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__20945__A0 _29513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15893_ _15893_/X wire1032/X _15890_/X _15892_/X _16041_/A1 _15888_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27879_ _27879_/Q _30385_/CLK _27879_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28688__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14398__A _31901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24136__B1 wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16613__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17632_ _17873_/B1 _31713_/Q _17631_/X _17632_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_243_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29618_ _29618_/Q _32421_/CLK _29618_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29933__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14844_ VGND VPWR _15623_/S _28844_/Q _28876_/Q _14844_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_2706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30890_ _30890_/Q _32117_/CLK _30890_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_264_2023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_3402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22147__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14624__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_5627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_1431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_1045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17563_ _17563_/B _17563_/Y _17563_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_29549_ _29549_/Q _32127_/CLK _29549_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14775_ VGND VPWR _14775_/X _14772_/X _14774_/X _15235_/A1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14399__C_N _14398_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18366__A1 _18499_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_219_core_clk _31679_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_18_3457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18666__D_N _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22162__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20847__B _30424_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19302_ _22086_/B1 _28301_/Q wire1939/X _19302_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_4021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27625__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30910__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16514_ VGND VPWR _16826_/S _32432_/Q _32360_/Q _16514_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_4218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17502__A _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32560_ hold308/A _32560_/CLK input40/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_2002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17494_ _17495_/B _31615_/Q _26245_/C _31616_/Q _31614_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_105_3438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_49 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20339__S _20352_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17574__C1 _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25097__D1 _20651_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25636__B1 _25635_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_4347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3771 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26815__A _27100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19233_ _28396_/Q wire1403/A _28396_/D _19221_/X _19232_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_31511_ _31511_/Q _31874_/CLK _31511_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27410__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16445_ _16445_/A1 wire1733/X _16445_/X _16448_/A2 _29182_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__25100__A2 _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32491_ _32491_/Q _32531_/CLK _32491_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30982__D _30982_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18118__A1 wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_1653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19315__B1 wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23111__A1 _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_2065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26534__B _26537_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_60_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27389__A0 _27270_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31442_ VGND VPWR _31442_/D _32112_/CLK _31442_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19164_ _19164_/X _19161_/X _19156_/S _19163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_174_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16129__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16376_ _16721_/A2 wire3281/A _29287_/Q _16376_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_179_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18669__A2 _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19866__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28068__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27349__C _27349_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18115_ VGND VPWR _18117_/S wire3825/X _28044_/Q _28044_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17648__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15327_ VGND VPWR _15327_/X _15324_/X _15326_/X _15543_/S _15762_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21673__A1 _29898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29313__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19095_ _19179_/A2 _27875_/Q _19176_/B1 _19095_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19429__A _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31373_ _31373_/Q _32297_/CLK _31373_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21673__B2 wire3930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16552__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_1126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1397_A _23601_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17341__A2 _31915_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_3741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25403__A3 _25402_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26600__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30324_ VGND VPWR _30324_/D _32357_/CLK _30324_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18046_ VGND VPWR _18046_/S wire3831/X _27978_/Q _27978_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15352__A1 wire1134/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15258_ _15752_/A2 _15258_/X _15257_/X _15740_/B1 _28855_/Q wire1515/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_190_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23414__A2 _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17629__B1 _31717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14209_ _14209_/Y _14208_/X _14168_/S hold248/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__31416__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30255_ _30255_/Q _32071_/CLK _30255_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1564_A _14545_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15189_ _15189_/X _15638_/A2 _15638_/B1 _28925_/Q _15561_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_214_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_2581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23385__S _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29463__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15104__A1 _28955_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25167__A2 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26364__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold34_A hold34/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16301__B1 wire904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2798_A _27506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17891__B _17891_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30186_ _30186_/Q _30387_/CLK _30186_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20802__S _20817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18841__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19997_ _27077_/C1 _19996_/Y _20028_/A _28645_/Q _28645_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18479__S _18499_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27084__C _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27905__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_cap2616_A _24384_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24375__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15655__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16852__A1 wire963/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24501__C _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_329_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21189__A0 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24914__A2 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18948_ _18947_/X _19367_/B1 _19380_/A2 _28188_/Q _18948_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_253_1793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_1801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27539__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21728__A2 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22925__A1 _30480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30440__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31566__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26116__A1 _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2965_A _18656_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20936__A0 _29504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18879_ _18879_/X _19069_/D1 _28121_/Q _19069_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_181_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24127__B1 wire735/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16604__A1 _29606_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26667__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20910_ _20848_/A _20912_/D _30450_/Q _18554_/B _20848_/B _20910_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__16604__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_5521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21890_ _21890_/B _21890_/X _21890_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_205_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14101__A _14101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28627__D _28627_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23025__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14615__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15812__C1 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20841_ VGND VPWR _29351_/Q _20839_/Y _20840_/X _29351_/D _23532_/S VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_188_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19611__B _19611_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length913_A wire912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_3253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18357__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30590__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_2129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22153__A2 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27077__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31053__D _31053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27616__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13940__A _28557_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17412__A _32270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3112_A wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23560_ VGND VPWR _23560_/S hold501/A _30051_/Q _30481_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20164__A1 _28726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20772_ VGND VPWR _20772_/S _27694_/A1 _29286_/Q _29286_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_52_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20249__S _20249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21361__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25627__B1 _25582_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16907__A2 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26824__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18227__B _22340_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22511_ _23417_/A _22510_/X _22511_/A2 _17229_/X _30016_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27320__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14918__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31709_ hold261/A _32567_/CLK _31709_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_260_2476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23491_ VGND VPWR _23529_/S _28384_/Q _23491_/A0 _23491_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_104_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18109__A1 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17951__A_N _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_217_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23102__A1 _29788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_5232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26444__B _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25230_ _26244_/A _25229_/X _25264_/A2 hold103/A _31239_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_225_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22442_ _22441_/Y _22440_/X _29983_/Q _22443_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire809 VPWR VGND wire809/X wire809/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_277_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15591__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22456__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24850__A1 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23787__C _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24245__A _31757_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16970__B _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22691__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26163__C _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25161_ _25161_/X _31212_/Q _31214_/Q _31213_/Q _25159_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_216_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1529_A _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22373_ _29936_/D _22385_/B1 _30475_/Q hold409/A _22356_/B VGND VPWR _22372_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22861__B1 _30473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16462__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21588__B _21668_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_3669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17332__A2 _30815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1337_A _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24112_ _20673_/D _30711_/Q wire1254/X _24112_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_255_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21324_ _21640_/C _21640_/B _21326_/D _21640_/D _21444_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__19872__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15343__A1 _15500_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25092_ wire1353/X _31189_/Q _25092_/Y _25087_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_82_4267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_368_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23405__A2 _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29806__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3309 _24820_/A _26470_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__31096__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21416__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4116 VPWR VGND wire4116/X _28568_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_43_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15894__A2 _15884_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28920_ _28920_/Q _32352_/CLK _28920_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_5150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24043_ wire4119/X _19994_/B _24043_/X wire740/X _24042_/X wire1622/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_82_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21255_ _29717_/D _17094_/A _20839_/Y _23532_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_115_3011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold440 hold440/A hold440/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32341__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19085__A2 _19079_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4138 VPWR VGND wire4138/X _28456_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold451 hold451/A hold451/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout1504_A wire1506/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4149 VPWR VGND _14539_/A _28389_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_251_3869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold462 hold462/A hold462/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23295__S _23295_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold473 la_input[81] hold473/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20206_ VGND VPWR _20211_/S _28751_/Q _27689_/A1 _28751_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_43_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold484 hold484/A hold484/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25158__A2 _31211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26355__A1 _31665_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28851_ _28851_/Q _30503_/CLK _28851_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21186_ VGND VPWR _21199_/S _29628_/Q wire1826/A _29628_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3437 wire3438/X wire3437/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20712__S _20716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31909__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold495 hold495/A hold495/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18832__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18389__S _18389_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2703 _19605_/B _19604_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire3448 VPWR VGND wire3448/X _31903_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1907 _18697_/Y _19094_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_2955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout964_A _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2714 VPWR VGND wire2714/X _14161_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_2898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24366__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15646__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27802_ _32525_/D _32525_/Q _27844_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_clkbuf_leaf_105_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout931 _16120_/S fanout932/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xwire2725 VPWR VGND wire2725/X wire2725/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28830__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20137_ _20137_/X _28713_/Q _25076_/C1 _20162_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__24905__A2 _19550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29956__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23708__A3 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3913_A _29842_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2736 wire2737/X _19631_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_8_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28782_ _28782_/Q _32430_/CLK _28782_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_73_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout953 _16841_/C1 _16720_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_25994_ _26179_/B1 _25993_/Y _26014_/A2 _31512_/Q _31512_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2747 VPWR VGND wire2747/X hold113/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_262_5323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19505__C _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22377__C1 _22376_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2758 VPWR VGND _23879_/C _24284_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18045__A0 _27977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout964 _16823_/S _16826_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22916__A1 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26370__A4 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2769 VPWR VGND wire2769/X hold189/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout975 wire979/A _16918_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27304__A0 _32165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26107__A1 _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27733_ VGND VPWR _27737_/S _25029_/B _32464_/Q _32464_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32491__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout986 wire989/A _16815_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20927__A0 wire3980/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25804__A _25804_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24945_ _24945_/Y _24945_/B _24947_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_20068_ VGND VPWR _19539_/B _19555_/A _20073_/A2 _20068_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_110_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_4177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout997 VPWR VGND wire999/A wire1005/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_3599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1873_A _26329_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18596__A1 wire3905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17399__A2 hold25/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2089 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26658__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30933__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26619__B _31779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_4081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27664_ _27793_/B _27664_/X _27664_/B _27649_/C _27658_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XFILLER_128_3427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2045_A wire2046/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24876_ _24876_/B _31084_/D _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__23016__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input128_A la_input[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14606__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_383_core_clk _30118_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_clkbuf_leaf_256_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28980__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_302 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29403_ _29403_/Q _30477_/CLK _29403_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_180_4355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16071__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26615_ _26615_/Y _23753_/X _31778_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA_313 wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_3741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23827_ _23828_/A _24467_/A _31853_/Q _31818_/Q _24370_/A2 VGND VPWR _23826_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_2_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19521__B _19521_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_324 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27595_ _31382_/Q _27594_/Y _27592_/Y _27594_/B _27595_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18348__A1 wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_312_core_clk _30462_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_335 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22144__A2 _22150_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27607__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_346 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15541__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13850__A _29815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29334_ _29334_/Q _32359_/CLK _29334_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_357 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14560_ wire1533/A _14883_/A1 _29616_/Q _14560_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire2212_A wire2213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26546_ _26184_/A _26545_/Y _26543_/B _31756_/Q _31756_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20155__A1 _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1675 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23043__B _23043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_368 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23758_ _23759_/A _23758_/Y _26619_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_52_4071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_379 wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17556__C1 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25618__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23892__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18753__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_1_1_3_core_clk clkbuf_1_1_4_core_clk/A clkbuf_1_1_3_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__20386__C _27678_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27083__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14909__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22709_ _22727_/A _22704_/B _22710_/C _22709_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_70_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29265_ _29265_/Q _32365_/CLK _29265_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28210__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14491_ VPWR VGND _14491_/X hold410/A _30440_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__29336__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26477_ _26465_/X _26466_/X _26463_/Y _26488_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25094__A1 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23689_ VGND VPWR _23879_/C _24273_/C _24273_/A _23689_/X _23688_/X _31497_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_278_3449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15031__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_2948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26291__B1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17571__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16230_ _16230_/X _29564_/Q _16818_/A2 _16841_/B2 _16843_/A2 _16229_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28216_ _28216_/Q _28216_/CLK _28216_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26830__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25633__A3 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_4273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25428_ _24547_/Y _24546_/C _25428_/Y _25427_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_input93_A la_input[28] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29196_ _29196_/Q _32073_/CLK _29196_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19848__A1 _28576_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_24_0_core_clk_A clkbuf_5_25_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_2147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30313__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16161_ VGND VPWR _16161_/X _16160_/X _16159_/X wire958/X wire1038/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__17859__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28147_ _28147_/Q _30279_/CLK _28147_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_174_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31439__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25359_ _25359_/X _25414_/B1 _31275_/Q _25355_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22852__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_3015 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_4150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3421_A _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18520__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26043__B1 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17323__A2 input175/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15112_ _15752_/A2 _15112_/X _15111_/X _15740_/B1 _32056_/Q wire1515/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_139_2822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28360__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length952 VPWR VGND wire951/A _16124_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_259_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29486__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14137__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15334__A1 _15503_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_144_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16092_ VGND VPWR _16092_/X _16826_/S _16068_/S _28089_/Q _16091_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_155_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28078_ _28078_/Q _28216_/CLK _28078_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_159_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3742 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27928__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21407__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15885__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15043_ VGND VPWR _15627_/S _32313_/Q _28921_/Q _15043_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_19920_ VGND VPWR _20120_/B _19520_/B _25980_/A2 _19920_/X _27091_/C1 _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_61_3606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27029_ hold500/A _27028_/A _27029_/Y _27035_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_26_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26801__C _27058_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18808__C1 _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19076__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27185__B _32086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17087__A1 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18284__A0 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24602__B _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30463__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_172_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31589__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30040_ _30040_/Q _30466_/CLK _30040_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22080__A1 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19851_ VGND VPWR _20120_/B _20061_/C wire1334/A _19851_/X _26999_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__26346__A1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[26] wire2724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20622__S _20625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3790_A _29945_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18299__S _18317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15098__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold4_A hold4/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24357__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15716__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18802_ _19375_/A2 _28277_/Q _19375_/B1 _18802_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26897__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19782_ _19782_/Y _19782_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19939__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16994_ _16993_/Y _21676_/B _29876_/Q _21778_/B _21365_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_284_827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3982 VPWR VGND wire3982/X wire3983/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_211_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3993 VPWR VGND wire3993/X _29365_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18733_ VGND VPWR _18733_/X _19374_/B _19380_/B1 _28050_/Q _18732_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27405__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15945_ _16081_/A2 wire3276/X _29243_/Q _15945_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25714__A _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31991_ _31991_/Q _32024_/CLK _31991_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_output514_A wire4027/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16047__C1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24109__B1 _28635_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23580__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22383__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17931__S _17939_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2703 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19712__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30942_ _30942_/Q _32277_/CLK _30942_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18664_ _18664_/X _18668_/C _18664_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_280_4755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20394__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15876_ wire1004/X wire1476/X _28839_/Q _15876_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_40_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22549__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16062__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17615_ VGND VPWR _17720_/S _17614_/X _17573_/X _17616_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_128_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22776__C _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14827_ wire1541/X _23393_/C _29559_/Q _14827_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_252_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24124__A3 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18595_ VGND VPWR _18624_/S wire3912/X _28309_/Q _28309_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30873_ _30873_/Q _31507_/CLK wire721/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18339__A1 wire3899/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27059__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18328__A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19536__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13760__A _31186_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17546_ _17552_/S _26441_/A _17470_/B _17545_/Y _17627_/B _17602_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_4 XANTENNA__20146__A1 _28717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19000__A2 wire1403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14758_ _28978_/Q _15233_/B1 _15223_/A _15575_/C _14758_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_248_1895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25609__B1 _25582_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23883__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32214__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17011__A1 _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26806__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_880 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27140__S _27142_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27074__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_891 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32543_ _32543_/Q _32543_/CLK _32543_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21894__A1 _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_183_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17477_ _17488_/A _17486_/A _26488_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XFILLER_70_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14689_ _14689_/X _14686_/X _14684_/X _15631_/A1 _14688_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_225_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26282__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19216_ _19216_/X _19216_/D1 _27945_/Q _19368_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_220_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16428_ _16725_/A _16725_/C _30502_/Q _16428_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_278_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23096__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32474_ _32474_/Q _32544_/CLK _32474_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_3803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19839__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28703__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17886__B _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23635__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24832__A1 _24454_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29829__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31425_ _31425_/Q _32532_/CLK _31425_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19147_ VGND VPWR _19147_/X _19146_/X wire1402/X _20872_/S _19131_/Y _19136_/Y VGND + VPWR NF_sky130_fd_sc_hd__a311o_2 XFILLER_277_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16359_ VGND VPWR _16837_/S _28788_/Q _28820_/Q _16359_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32364__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18511__A1 wire3877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17314__A2 _30812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26034__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_5520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14128__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15325__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27376__A _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27782__A0 _32507_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19078_ _19077_/X _22088_/B1 _19358_/A2 _28325_/Q _19078_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31356_ _31356_/Q _31923_/CLK _31356_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30806__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16522__B1 _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19807__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput501 _28662_/Q la_output[113] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_82_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15876__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23399__B2 _23304_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput512 wire4035/X la_output[123] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_18029_ VGND VPWR _18044_/S wire3885/X _27961_/Q _27961_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30307_ _30307_/Q _30399_/CLK _30307_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28853__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput523 _31109_/Q la_output[18] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_285_5301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23938__A3 wire762/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19067__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29979__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31287_ _31287_/Q _31763_/CLK _31287_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput534 _31119_/Q la_output[28] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24060__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput545 _28715_/Q la_output[38] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21949__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput556 _28725_/Q la_output[48] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21040_ _29501_/D hold374/A _21039_/Y _22104_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_285_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30238_ _30238_/Q _30468_/CLK _30238_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput567 _28735_/Q la_output[58] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_5_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20532__S _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17617__A3 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18814__A2 wire2582/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput578 _28681_/Q la_output[68] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19606__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2890_A wire2891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput589 _28691_/Q la_output[78] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_2415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20082__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_1118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16286__C1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15628__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31048__D _31048_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24348__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26888__A2 hold132/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13935__A _28562_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30956__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_4032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3062_A _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30169_ _30169_/Q _30387_/CLK _30169_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18002__S _18007_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24899__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29209__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22359__C1 _22358_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26352__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27315__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22991_ VGND VPWR _25733_/C _30148_/Q _22990_/X _30148_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18578__A1 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23571__A1 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22374__A2 _14069_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24730_ _24730_/Y _24770_/A _31475_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_167_2027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19622__A _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21942_ wire725/A _21942_/S _21941_/Y _17148_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_209_4472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_5048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_2603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_3228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25848__B1 _31446_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24661_ VGND VPWR _31442_/Q _31461_/Q _24661_/X _24661_/D _24661_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__25312__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21873_ _22061_/S _29788_/Q _21873_/X _21999_/S1 _21879_/A _21853_/A _29790_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__16457__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15261__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19527__B1 _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15361__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26400_ _26184_/A _26399_/Y _26386_/X _31687_/Q _31687_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_208_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14603__A3 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23612_ _23612_/X wire1877/X _24246_/B _32564_/Q _31029_/Q _24260_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_181_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20824_ _21746_/S _20823_/Y _14436_/A _20832_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 X_27380_ VGND VPWR _27384_/S _32232_/Q _27417_/A0 _32232_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20137__A1 _28713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_5414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24592_ _24593_/A _24592_/Y _31543_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_197_4115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21334__B1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26455__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25000__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17499__D _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27065__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26331_ _26331_/Y _26331_/B _26900_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_240_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30336__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23543_ VGND VPWR _23560_/S _30464_/Q _30034_/Q _30464_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20755_ VGND VPWR _20755_/S _27265_/A0 _29270_/Q _29270_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21885__B2 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23798__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3696_A _30344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15013__B1 wire1064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19995__C _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26273__B1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29050_ _29050_/Q _31910_/CLK _29050_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26812__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28383__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26262_ _26182_/A _26261_/X _26263_/A _31658_/Q _31619_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21599__A _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23087__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23474_ VGND VPWR _23514_/S _23473_/X _31941_/Q _30423_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_hold123_A hold123/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20686_ VGND VPWR _20686_/B _24828_/C _24826_/B VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__20707__S _20710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_4992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_26_1_core_clk_A clkbuf_opt_26_1_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28001_ _28001_/Q _30450_/CLK _28001_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_71_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25213_ _26498_/A _25212_/X _25254_/A2 hold133/A _31231_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_175_3712 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22425_ _22425_/Y _29978_/Q _22598_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_84_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3863_A _29856_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2932 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26193_ _31585_/Q _26227_/A2 _26194_/B _32275_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_216_4410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26025__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18502__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3968 VPWR VGND _23221_/S _23209_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_121_2380 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22207__B _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30486__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26902__B _26902_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3979 VPWR VGND wire3978/A _29496_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19845__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25144_ _25144_/Y _31207_/Q _25144_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__26576__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22356_ _22356_/A hold218/A _22356_/X _22356_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_65_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16513__B1 wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15316__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31731__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26190__A _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27658__A_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3106 _14365_/Y _22356_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_21307_ _21309_/A _21307_/A _21665_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_82_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25075_ _25079_/A _24945_/B _25075_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_171_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29952_ _29952_/Q _32569_/CLK _29952_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19058__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22287_ _22286_/X _30332_/D _22284_/Y _17047_/X _29873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_2_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold492_A hold492/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3128 _14168_/S _14167_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14006__A _28491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24051__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3201 _14429_/B _21427_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28903_ _28903_/Q _32525_/CLK _28903_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24026_ _24026_/X _24892_/C _30663_/Q _30727_/Q wire1633/X VGND VPWR wire1261/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22062__A1 hold486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3212 VPWR VGND wire3212/X hold241/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18266__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26328__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21238_ VGND VPWR _22965_/S _17220_/C hold340/A _29700_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold270 hold270/A hold270/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__20442__S _20446_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29883_ _29883_/Q _29914_/CLK _29883_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18805__A2 _19090_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19516__B _20654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold281 hold281/A hold281/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_1365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_2380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_6_2_core_clk clkbuf_opt_6_3_core_clk/A clkbuf_opt_6_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_28_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold292 hold292/A hold292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16277__C1 wire1449/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16816__A1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24339__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1704 VPWR VGND _16891_/A3 wire1706/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_25_3770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26879__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_2695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28834_ _28834_/Q _31917_/CLK _28834_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2162_A _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3267 VPWR VGND _22046_/A _14094_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21169_ VGND VPWR _21169_/S _29612_/Q wire1783/X _29612_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1726 VPWR VGND _15770_/A wire1750/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31881__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2533 VPWR VGND _20504_/S _20515_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout3002_A _18434_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3278 VPWR VGND wire3278/X wire3278/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_2616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2544 VPWR VGND _20449_/S _20440_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout750 wire752/A _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_210_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23011__A0 _32465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1810 wire1810/X _19994_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_41_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2555 _20244_/S _20245_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_277_186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16292__A2 _14104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28765_ _28765_/Q _30911_/CLK _28765_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_3667 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17036__B _17036_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2577 VPWR VGND _22236_/A _18672_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_125_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13991_ _28506_/Q _13991_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25977_ _25977_/X _31503_/Q _31504_/Q _24782_/Y _25971_/B _24780_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 Xfanout794 VPWR VGND _24947_/A _24892_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2588 _18222_/S _18321_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__16029__C1 _29107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22365__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27828__A1 _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2599 hold194/X wire2599/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22996__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14379__C _31008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15730_ VGND VPWR _15735_/C _15729_/X _15728_/X wire1134/X _15730_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27716_ VGND VPWR _27719_/S _19937_/B _32449_/Q _32449_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24928_ _25652_/A _24927_/Y _24941_/A _31108_/Q _31108_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire1876 VPWR VGND wire1876/X _19785_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19230__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2427_A _14135_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28696_ _28696_/Q _31871_/CLK _28696_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_5197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20678__A _32338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25839__B1 _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31111__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_4130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32237__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21273__S _22300_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20915__A3 _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22596__C _22596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26068__C _26102_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24106__A3 _24105_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15661_ _15661_/X _15749_/C1 _15654_/X _15656_/X _15735_/B _15660_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27647_ VGND VPWR _27647_/S _27737_/A1 _32388_/Q _32388_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_19_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19251__B _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_110 _19918_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24859_ wire863/X _31075_/Q _24859_/Y _24470_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_284_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3371_A _23155_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_121 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15252__B1 _15751_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22117__A2 _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17792__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17400_ _27006_/A _17400_/B _17400_/C hold26/X _29863_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA_132 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_3511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3469_A _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14612_ _15629_/A2 _14612_/X _14611_/X _14675_/S _28082_/Q _14930_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_265_1450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_143 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18380_ VGND VPWR _18388_/S wire3870/X _28157_/Q _28157_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_4267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_154 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15592_ _15592_/X wire1214/A _15589_/X _15591_/X _15611_/B1 _15587_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27578_ _25641_/B _32259_/Q _27578_/X _25641_/A _32251_/Q _32267_/Q _32243_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__21325__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28726__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_165 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14395__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18726__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_176 _23947_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_187 hold365/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17331_ _30938_/Q _17331_/X _30972_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_180_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29317_ _29317_/Q _32355_/CLK _29317_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21876__A1 hold223/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14543_ _14442_/B _30435_/Q _14544_/B _14544_/D _14543_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_275_4802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26529_ _31748_/Q _31750_/Q _31749_/Q _26522_/X _26531_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_198 _29075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31261__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32387__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16347__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17544__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27188__A_N _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21340__A3 _30340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26803__A2 wire2682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17262_ _17262_/X _30920_/Q wire3592/X _17261_/X _30999_/Q _19792_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23078__B1 _23077_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29248_ _29248_/Q _32351_/CLK _29248_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_208_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14474_ hold364/A _14474_/X _29452_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_122_2144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30829__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_1_1_core_clk clkbuf_3_1_2_core_clk/A clkbuf_3_1_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_89_2827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20617__S _20617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_5553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19001_ _19001_/X _28223_/Q _19180_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_106_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16213_ VGND VPWR _16218_/A _16964_/B1 wire1060/X _16212_/X _16211_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21302__A _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17193_ VGND VPWR _18664_/B _30211_/Q _30400_/Q _17193_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2963_A _18657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29179_ _29179_/Q _32355_/CLK _29179_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_1833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19297__A2 _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_5548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24290__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_3285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31210_ _31210_/Q _31746_/CLK _31210_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15307__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16144_ _16149_/A2 _16149_/A1 _30896_/Q _16144_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_230_5119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27196__A _32089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26567__A1 hold222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32190_ _32190_/Q _32532_/CLK _32190_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_132_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16504__B1 wire1048/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20300__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25709__A _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_5589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length782 wire781/A _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26031__A3 _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31141_ _31141_/Q _32543_/CLK _31141_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17926__S _17947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20851__A2 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30979__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16075_ _16075_/X _32348_/Q _16814_/B1 _16805_/A3 _16838_/A1 _16074_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_217_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19049__A2 wire1984/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21956__B _21956_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24042__A2 _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28106__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4177_A hold81/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23874__D _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15026_ _15026_/X _15609_/B1 _15025_/X _29251_/Q _15638_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_19903_ _19902_/X _28601_/Q _28601_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_113_3504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22053__A1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26319__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31072_ _31072_/Q _31693_/CLK _31072_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20352__S _20352_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output631_A _24586_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22133__A _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20064__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16268__C1 _16546_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15446__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30023_ hold474/A _30285_/CLK _30023_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13755__A hold136/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21800__A1 _21381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19834_ _19833_/X _28569_/Q _28569_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_113_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_4011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30209__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18009__A0 _27943_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23002__A0 _23000_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23663__S _23671_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16283__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_5633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25542__A2 _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19765_ _26771_/A _19764_/Y _19782_/A _28539_/Q _28539_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28256__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16977_ _29981_/Q _29686_/Q _23199_/S _29737_/Q _16979_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_215_1894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14294__A1 _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_234_core_clk _31923_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_280_5253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14294__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23553__A1 _30474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19757__B1 _19756_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27819__A1 _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22787__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17661__S _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29501__CLK _30139_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22987__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26259__B _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput5 VPWR VGND input5/X gpio_in_pad VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_0_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18716_ _18716_/X _19346_/D1 _27985_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_4_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15928_ _15928_/X _29168_/Q wire1021/X _16039_/B2 _16039_/C1 _15927_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_20_3188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25163__B _25197_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31974_ _31974_/Q _32583_/CLK _31974_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19696_ _25982_/A _27053_/A _19696_/Y _20110_/B _20061_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_209_3034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_5297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_3657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21183__S _21184_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25023__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26098__A3 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17232__B2 _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18647_ VGND VPWR _18649_/S wire3843/X _28360_/Q _28360_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30925_ _30925_/Q _31762_/CLK _30925_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30359__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15859_ _16149_/A2 _16149_/A1 _29520_/Q _15859_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_59_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22108__A2 _22105_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23305__A1 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_5070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31604__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_1501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20119__A1 _28705_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18578_ VGND VPWR _20847_/C _20982_/B _18580_/A _18578_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_30856_ _30856_/Q _31479_/CLK _30856_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_241_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23856__A2 _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22513__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20100__B _20100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29651__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_5013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17529_ _17764_/B _17530_/B _17563_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XANTENNA__17897__A _24600_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23140__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18492__S _18499_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1896_A wire1896/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30787_ _30787_/Q _32136_/CLK _30787_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18732__A1 wire3766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24507__B _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire882_A wire883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20540_ VGND VPWR _20543_/S _29057_/Q _27699_/A1 _29057_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32526_ _32526_/Q _32528_/CLK _32526_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_157_4110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16743__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20527__S _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31754__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15010__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_5333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14754__C1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20471_ VGND VPWR _20471_/S _28990_/Q _27251_/A0 _28990_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32457_ _32457_/Q _32547_/CLK _32457_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19288__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23130__C _23130_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25610__B1_N wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26007__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23084__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22210_ _22281_/B2 _22209_/X _22210_/X _30106_/Q wire2284/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18496__A0 _28269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19827__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31408_ _31408_/Q _32310_/CLK _31408_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22292__A1 _29878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23190_ hold360/A _23190_/X _23190_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__26558__A1 _31762_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24018__C1 _24017_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_cap2291 _17552_/S _17730_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_170_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_4362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25619__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32388_ _32388_/Q _32388_/CLK _32388_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19693__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_4384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15849__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24569__B1 _24568_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26787__D_N wire1272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26022__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22141_ _22141_/A _22141_/C _22163_/D _22141_/D _22141_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XANTENNA_max_length1227_A wire1228/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20842__A2 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31339_ _31339_/Q _32032_/CLK _31339_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_170_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19617__A _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_5090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24033__A2 _24031_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25230__A1 hold103/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput320 _14010_/Y la_iena[66] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_216_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput331 _14000_/Y la_iena[76] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16510__A3 wire1693/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22776__A_N _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18248__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput342 _13990_/Y la_iena[86] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22044__A1 _21646_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27507__A0 _32322_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22072_ wire3991/X _22072_/B _22072_/X _22072_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 Xoutput353 _14044_/Y la_iena[96] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_170_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14521__A2 wire3272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_3615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput364 _13939_/Y la_oenb[105] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_27_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput375 _13929_/Y la_oenb[115] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18799__A1 _27893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_1978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_290_1576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput386 _13919_/Y la_oenb[125] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_25900_ _25904_/A _25899_/Y _25903_/S _31467_/Q _31467_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_21023_ _29488_/D _29488_/Q _18682_/X _21030_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19996__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput397 _13822_/Y la_oenb[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_44_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26880_ _26880_/Y _26880_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_246_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31134__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23573__S _23573_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16274__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17471__A1 _31686_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25831_ _25830_/X _27854_/C _31439_/D _25831_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__25354__A _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25533__A2 _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1128 VPWR VGND _15368_/S wire1128/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_2113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14285__A1 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27272__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18239__C_N _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29181__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18020__B_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22347__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23544__A1 _30465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31506__D _31506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_5608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5435 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19352__A _28271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28550_ _28550_/Q _31892_/CLK _28550_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_77_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2488 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25762_ _32088_/Q _32089_/Q _32090_/Q _27194_/C _32091_/Q _27198_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XANTENNA__25073__B _25073_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20358__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19212__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22974_ _25693_/D _22975_/A _22975_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_249_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_3172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3709_A wire3710/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28749__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21093__S _21098_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16026__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27501_ VGND VPWR _27513_/S _27614_/A1 _32316_/Q _32316_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18420__A0 wire3850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24713_ _31474_/Q _24707_/B _31475_/Q _24714_/C _31457_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_3_2194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21925_ _21925_/B _21925_/Y _21966_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_77_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28481_ VGND VPWR _28481_/D _31896_/CLK _28481_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25693_ _25693_/X _25693_/C _31395_/Q _25693_/B _25693_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__16187__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31284__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25297__A1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout927_A wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_1358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27432_ VGND VPWR _27484_/S _32274_/Q _27431_/X _32274_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_4789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24644_ _25971_/C _26164_/A _24644_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_71_3031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14588__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15785__A1 _29455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21856_ _21856_/Y _21856_/B _21955_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__25801__B _32538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16982__B1 _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23847__A2 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27038__A2 _27036_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_824 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20807_ VGND VPWR _20817_/S _29320_/Q _27696_/A1 _29320_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23602__A _31089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27363_ VGND VPWR _27366_/S _32217_/Q _27274_/X _32217_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3980_A _29495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19515__A3 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_835 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24575_ VGND VPWR _25186_/C _25632_/B _26498_/A _24576_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_240_2622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28899__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21787_ wire3922/X hold162/A _21787_/X _21999_/S1 _17053_/X _17035_/X hold307/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XPHY_846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26246__B1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18723__A1 wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29102_ _29102_/Q _32388_/CLK _29102_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27589__A3 _32212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_2483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19920__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26314_ _26313_/Y _26218_/A _31645_/Q _26327_/B _31645_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_14_4194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23526_ VGND VPWR _23526_/S _23525_/X _31967_/Q _30449_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15537__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20738_ VGND VPWR _20754_/S _27248_/A0 _29253_/Q _29253_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27294_ VGND VPWR _27301_/S _32157_/Q _27266_/X _32157_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_38_core_clk _32233_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_51_2959 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20530__A1 _29047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20437__S _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_5580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26913__A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15001__A3 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29033_ _29033_/Q _32425_/CLK _29033_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26245_ _26509_/C _26245_/X _26539_/A _26245_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_270_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23457_ wire3997/X _23457_/Y _29369_/Q _23456_/X _13848_/Y _22185_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_10_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20669_ _20669_/X _20669_/C _20673_/B _20669_/B _23879_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_194_4888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input195_A mprj_dat_i[29] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24272__A2 _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18487__A0 _28260_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22408_ VGND VPWR _22613_/S _29964_/Q _21892_/A _29964_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23480__A0 _31944_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22283__A1 _29840_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27746__A0 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3776 VPWR VGND _23053_/D _14459_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26549__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26176_ _31576_/D _31576_/Q _26175_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_14190_ _14300_/B _14300_/A _31233_/Q _14190_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_84_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14760__A2 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23388_ VGND VPWR _23388_/S _30366_/Q _29684_/Q _30366_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20294__A0 _28836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_4627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25127_ _25430_/B _25135_/D _25160_/A _31201_/D _25127_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__14381__D _14383_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_5581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22339_ wire3213/A _29919_/D _18221_/B _22338_/X _14116_/Y _22328_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_156_2240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25221__A1 _29851_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24024__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2377_A _14177_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20680__B _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25221__B2 hold104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21268__S _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25963__S wire755/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25058_ _25652_/A _25057_/X _25082_/A2 _31172_/Q _31172_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23049__A _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29935_ hold427/A _31914_/CLK _29935_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_input56_A la_input[10] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19246__B _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28279__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3020 VPWR VGND _18394_/S _18399_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_43_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20046__B1 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3031 VPWR VGND _18357_/S _18359_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_166_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19987__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16900_ VGND VPWR _16948_/S _29485_/Q _32139_/Q _16900_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24009_ wire1633/A wire3644/X _24008_/X _24009_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_264_5215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29524__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2246 VPWR VGND wire2248/A _19530_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_114_3868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2544_A _20440_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29866_ _29866_/Q _31304_/CLK _29866_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17880_ _23598_/C _17881_/C _24588_/B _24591_/B _17881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 Xfanout2257 VPWR VGND wire2259/A wire2264/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_2061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20597__A1 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_1026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1523 VPWR VGND _15435_/C wire1531/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2268 wire2270/X _19346_/D1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__21794__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1534 VPWR VGND _16081_/A2 wire1554/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3075 VPWR VGND _18015_/S _18012_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2279 wire2281/X _19346_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23483__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3086 VPWR VGND _17948_/S _17949_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1545 _16781_/A2 wire1547/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_16831_ wire999/A _16091_/C _30513_/Q _16831_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28817_ _28817_/Q _32320_/CLK _28817_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_5611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2352 VPWR VGND wire2352/X _14195_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3097 VPWR VGND wire3097/X _17298_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_76_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20900__S _20902_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29797_ hold266/A _30468_/CLK _29797_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18577__S _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1567 VPWR VGND _27424_/S _27230_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2374 wire2375/X wire2374/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23535__A1 hold411/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30501__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19739__B1 _19738_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2385 _14171_/Y wire2385/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__31627__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19550_ _19550_/B _19550_/Y _19584_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_268_3993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1651 VPWR VGND _26542_/C wire1651/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2396 _14154_/Y wire2396/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30320__D _30320_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16762_ _16762_/X _29063_/Q wire1029/X _16928_/A3 _16928_/B1 _16761_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28748_ _28748_/Q _32420_/CLK _28748_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20349__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_4247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13974_ _28523_/Q _13974_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__19203__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_2667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1673 VPWR VGND wire1673/X _18911_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_280_115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29674__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18501_ VGND VPWR _18522_/S wire3914/X _28273_/Q _28273_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18411__A0 wire3880/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16017__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3945_A _17228_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15713_ _15713_/X _32072_/Q _15692_/S _15721_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_19_4050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19481_ _25469_/A _19481_/A _31314_/Q _31313_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_95_3598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27092__D_N _26876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16693_ wire1552/X wire3287/X _28829_/Q _16693_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28679_ VGND VPWR _28679_/D _31578_/CLK _28679_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_262_852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15225__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_2_2_0_core_clk clkbuf_2_2_1_core_clk/A clkbuf_2_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__16422__C1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30710_ hold282/A _32470_/CLK input88/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18432_ VGND VPWR _18432_/S _28207_/Q wire3813/X _28207_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26807__B _26872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15644_ VGND VPWR _15644_/S _30915_/Q _29193_/Q _15644_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14579__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15776__A1 _14104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31690_ _31690_/Q _31738_/CLK _31690_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16973__B1 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24496__C1 _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23838__A2 wire1605/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31777__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24608__A _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27029__A2 _27035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21849__A1 _23155_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19652__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22649__A_N _29877_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18363_ VGND VPWR _18366_/S wire3820/X _28141_/Q _28141_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30641_ _30641_/Q _32310_/CLK _30642_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21849__B2 _17085_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15575_ VGND VPWR _15575_/X _29298_/Q _15575_/A _15575_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_fanout3920_A wire3922/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16825__S _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17517__A2 _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26237__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18714__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22510__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17314_ _30863_/Q _30812_/Q _30829_/Q _17313_/X _17332_/B1 _17314_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA_wire1010_A wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14526_ VPWR VGND _23231_/A _23236_/D _20982_/B VGND VPWR NF_sky130_fd_sc_hd__and2_2 XANTENNA__23231__B _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30572_ hold389/A _31892_/CLK _30572_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18294_ VGND VPWR _18329_/S _28103_/Q _23663_/A1 _28103_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20347__S _20354_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output581_A _28683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_4490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26823__A _27100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18190__A2 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output679_A wire2300/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32311_ _32311_/Q _32311_/CLK _32311_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_3593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2244_A _19652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21032__A _30032_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17245_ _24805_/A _24820_/A _30996_/Q _17245_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_180_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14457_ _14457_/Y _30435_/Q _29711_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_278_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25996__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_20_3_core_clk clkbuf_opt_20_3_core_clk/X clkbuf_opt_20_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_32_2870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_4316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24263__A2 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21389__D _21389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16740__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18478__A0 _28251_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26542__B _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29054__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19809__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32242_ _32242_/Q _32543_/CLK _32242_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_15_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23658__S _23661_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23471__A0 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22274__A1 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17176_ _21674_/A _17175_/Y _17220_/C _17174_/X _17176_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_278_1663 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28460__D _28460_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22274__B2 _30115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14751__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19675__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire970 wire970/A wire970/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_14388_ _14388_/B _14388_/A _24407_/A _24434_/D _14388_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_214_4914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22562__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire981 VPWR VGND wire981/X wire981/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_154_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire992 VPWR VGND wire992/X wire992/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_176_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16127_ _16387_/A _16387_/C _30494_/Q _16127_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_217_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32173_ _32173_/Q _32538_/CLK _32173_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_4215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25212__A1 _31362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24015__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1477_A wire1477/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17883__C _19504_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30031__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31157__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21178__S _21202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22026__A1 _29901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23223__A0 _30145_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31124_ _31124_/Q _32528_/CLK _31124_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16058_ _16058_/X _28980_/Q _16828_/A2 _16832_/A3 _16068_/S _16057_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__22026__B2 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25763__A2 _32089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32402__CLK _32402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26355__B1_N _26354_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15009_ VGND VPWR _15516_/S _32424_/Q _32352_/Q _15009_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_65_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31055_ _31055_/Q _31750_/CLK _31055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout3481 _31381_/Q _27594_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire1644_A _26793_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20588__A1 wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_1978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19442__A2 _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21785__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30006_ _30006_/Q _30392_/CLK _30006_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16256__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19817_ VGND VPWR wire2203/X _19789_/C _19853_/A2 _19817_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_229_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20810__S _20813_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30181__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2791 VPWR VGND _27503_/S _27485_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18487__S _18491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27092__C _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23526__A1 _23525_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22329__A2 _22338_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16661__C1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1811_A _19788_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19748_ _19760_/B _19973_/A1 _19748_/A _19748_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__32552__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1909_A _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18402__A0 wire3918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17205__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17205__B2 _17228_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31957_ _31957_/Q _31961_/CLK _31957_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19679_ _27131_/B _19678_/Y _19695_/A2 _28500_/Q _28500_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_108_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26476__A0 _31702_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25279__A1 _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23125__C _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2853_A _21173_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_2472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_2420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21710_ _21710_/X _29911_/Q _21711_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_260_4978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30908_ _30908_/Q _32434_/CLK _30908_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_107_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22690_ _22686_/B _22687_/A _22686_/A _22706_/C _22690_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire3025_A _18389_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20760__A1 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16964__B1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31888_ _31888_/Q _31896_/CLK _31888_/D VPWR VGND VGND VPWR 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XANTENNA__28571__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29697__CLK _29697_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21006_ VGND VPWR _21013_/S _29471_/Q _24227_/A0 _29471_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17444__A1 _32275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29651_ _29651_/Q _31918_/CLK _29651_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25506__A2 _31330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26703__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26863_ _27003_/B1 _26862_/Y wire752/X _31881_/Q _31881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20720__S _20720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18397__S _18397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15455__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23517__A1 _28397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1786_A _18316_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16652__C1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28602_ _28602_/Q _31871_/CLK _28602_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_2109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25814_ VGND VPWR _27854_/C _31432_/Q _30148_/Q _25814_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_40_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_5281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29582_ _29582_/Q _32569_/CLK _29582_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26794_ _26859_/C1 _26793_/X wire777/X _31847_/Q _31847_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_hold455_A hold455/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21528__B1 _21619_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_2408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19513__C _24381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30674__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19197__A1 _28072_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24190__A1 _28579_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27503__S _27503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28533_ _28533_/Q _31836_/CLK _28533_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24190__B2 _28483_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25745_ _25745_/A _31410_/Q _25745_/X _25745_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_35_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22957_ VGND VPWR _22968_/S _30469_/Q _30134_/Q _30134_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_38_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20200__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1953_A _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15207__B1 _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_4220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17747__A2 _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27846__A_N _25808_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19593__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input110_A la_input[43] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21908_ _14407_/A wire3802/X _21908_/X _21907_/X _21900_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_28464_ VGND VPWR _28464_/D _31815_/CLK _28464_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_227_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15758__A1 _15758_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2125_A wire2125/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25676_ _25675_/Y _25676_/B1 _31389_/Q _25661_/X _31389_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input208_A resetn_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20751__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22647__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22888_ _30476_/Q _22887_/X _22911_/C wire3133/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_253_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27415_ VGND VPWR _27421_/S _32262_/Q _27268_/X _32262_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_160_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15222__A3 wire1493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21778__D_N _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24627_ _24585_/X _24627_/X _24598_/Y _24591_/X _24584_/Y _24599_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_21839_ _21099_/C _21839_/X wire3206/A _22954_/S _23145_/A _17075_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XPHY_621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28395_ _28395_/Q _30118_/CLK _28395_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_51_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16645__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14430__A1 wire4004/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26219__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25690__A1 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20675__B _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3167_A _18534_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29077__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15360_ VGND VPWR _15360_/X _15359_/X _15358_/X _15368_/S wire1228/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_240_2441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27346_ VGND VPWR _27348_/S _32202_/Q _27276_/X _32202_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_90_2783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_4903 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_3596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20503__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24558_ _31202_/Q _31203_/Q _24560_/D _31208_/Q _31204_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XPHY_1220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16707__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27739__A _27739_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14981__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_4630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26643__A _31785_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14311_ _30333_/Q _14308_/Y _30334_/Q _29947_/D _22444_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_272_4816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23509_ VGND VPWR _23513_/S wire4148/X _30441_/Q _23509_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25978__C1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27277_ VGND VPWR _27281_/S _32146_/Q _27276_/X _32146_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15291_ _15290_/Y _15286_/Y wire1089/A _15291_/Y wire1067/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_4 XANTENNA__16183__A1 _30897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14165__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2494_A _20921_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24489_ _26559_/A _24505_/D _31040_/D _24488_/Y _31335_/Q hold178/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311oi_2 XFILLER_201_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16183__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17380__B1 wire2095/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25442__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3334_A _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30054__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14392__C _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17030_ VGND VPWR wire886/A _17022_/X _17029_/X _30379_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29016_ _29016_/Q _32351_/CLK _29016_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_155_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24773__B1_N _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_5613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_4073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23478__S _23524_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14242_ VGND VPWR _14242_/X _14268_/B _14303_/A _29958_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__21059__A2 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22256__A1 _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26228_ VPWR VGND _31602_/D _26228_/B _26244_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_133_5624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15391__C1 wire1134/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15930__A1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23453__B1 _23451_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17984__B _30414_/Q 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NF_sky130_fd_sc_hd__o21ai_1 X_26159_ _26159_/A _31569_/Q _26159_/X _26159_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_188_5102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_3228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16380__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17132__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2883 VPWR VGND _20786_/S _20788_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_49_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2894 VPWR VGND _20605_/S _20598_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_114_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22008__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_3531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28914__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18880__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18981_ VGND VPWR _18982_/S _28321_/Q _28254_/Q _18981_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26942__A1 _31966_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_4298 VPWR VGND VGND VPWR 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NF_sky130_fd_sc_hd__mux2_1 X_29918_ hold365/A _29928_/CLK _29918_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_3_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32575__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_3789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24610__B _24610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1320 VPWR VGND _26687_/C _19926_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16238__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18554__C_N _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21231__A2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17863_ _17863_/B _17778_/Y _17863_/A _17863_/X _17863_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_62_2896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29849_ _29849_/Q _30057_/CLK _29849_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19975__A3 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20630__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19704__B _27058_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14249__A1 _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output427_A _13869_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25425__C _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14249__B2 _14263_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2160 VPWR VGND _20110_/B _19768_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19602_ _26813_/B _26949_/A _19602_/X _19849_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 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VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_wire4042_A wire4043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18100__S _18109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15997__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26170__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17794_ _17873_/B1 _31727_/Q _17793_/X _17794_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire2193 VPWR VGND _26015_/B _19752_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21519__B1 _21638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1058_A wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20990__A1 _29455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19188__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1470 VPWR VGND wire1470/X wire1470/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24181__A1 _30569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31811_ _31811_/Q _31874_/CLK _31811_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19533_ _27087_/C1 _19532_/Y _19609_/A _28454_/Q _28454_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_75_3947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24181__B2 _32581_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17199__A0 _17198_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16745_ VGND VPWR _16745_/X _16964_/B1 wire1058/X _16744_/X _16743_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_73_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30985__D _30985_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13957_ _28540_/Q _13957_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_95_2650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23597__A_N _23402_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_4088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18935__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22731__A2 wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31742_ _31742_/Q _31748_/CLK _31742_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19464_ VGND VPWR _19457_/X _28448_/Q _28449_/Q _19464_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_143_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15749__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16676_ VGND VPWR _16676_/X _16856_/A2 _16949_/C1 _16675_/X _16674_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__24469__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20742__A1 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22557__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13888_ _28609_/Q _13888_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_260_2817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_2041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18415_ VGND VPWR _18418_/S _28190_/Q _18607_/A1 _28190_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16410__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25130__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_1997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15627_ VGND VPWR _15627_/S _29033_/Q _29001_/Q _15627_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_2227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19395_ VGND VPWR _19407_/S _27143_/A1 _28411_/Q _28411_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31673_ _31673_/Q _32290_/CLK _31673_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25681__A1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23141__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20585__B _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18346_ VGND VPWR _18359_/S wire3873/X _28124_/Q _28124_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30624_ _30624_/Q _32309_/CLK _30624_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_91_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18699__B1 _19069_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15558_ wire3258/X wire1741/A _15558_/X _15760_/B1 _29127_/Q wire1702/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__27649__A _31397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14972__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23692__B1 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_7_5_core_clk clkbuf_opt_7_6_core_clk/A clkbuf_opt_7_5_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_241_1548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19360__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27422__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14509_ _30443_/Q _14509_/X _29453_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__28444__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16174__A1 _28783_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30555_ _30555_/Q _32017_/CLK hold347/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18277_ _18278_/B _18276_/X _22372_/A2 _29758_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_195_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_2093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15489_ _15489_/X _15481_/X _15488_/X _15730_/C1 _15483_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__17371__B1 wire2027/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25433__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_2413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23388__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22247__A1 _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17228_ VGND VPWR _17228_/X _17228_/B _17228_/A _17228_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__21697__A _21711_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput30 hold36/X hold37/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_176_2424 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold64_A hold64/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22292__S _23366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14724__A2 wire1750/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17894__B _24590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput41 VGND VPWR input41/X irq[2] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_30486_ _30486_/Q _32421_/CLK _30486_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_3111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_3783 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25984__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput52 VGND VPWR input52/X la_input[106] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_236_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_4711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput63 VGND VPWR input63/X la_input[116] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_63_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22798__A2 _22807_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30547__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32225_ _32225_/Q _32225_/CLK _32225_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xinput74 la_input[126] input74/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__24504__C _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17159_ _17159_/B _17159_/Y _17159_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_67_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput85 VGND VPWR input85/X la_input[20] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_3_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19663__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput96 VGND VPWR input96/X la_input[30] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_80_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4023 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28594__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17674__A1 _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2995_A _18499_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20170_ _26687_/B _20169_/X _20128_/X _28729_/Q _28729_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32156_ _32156_/Q _32525_/CLK _32156_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26394__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26933__B2 wire2696/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20106__A _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24801__A _31686_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20187__C_N _19778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15685__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31107_ _31107_/Q _32529_/CLK _31107_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17908__A_N _17891_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32087_ _32087_/Q _32233_/CLK _32087_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_4889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14104__A _14104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30697__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16229__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17426__A1 wire3562/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18623__A0 _28337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31038_ _31038_/Q _31375_/CLK _31038_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17426__B2 wire3558/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23417__A _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19698__D_N _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20540__S _20543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31942__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19614__B _19614_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length943_A fanout941/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20430__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15437__B1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26697__B1 wire778/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16634__C1 _16633_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13943__A _28554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_1853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23860_ _23861_/A _24467_/A _31864_/Q _31829_/Q _24370_/A2 VGND VPWR _23859_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18010__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15988__A1 wire3276/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26161__A2 _14171_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_2143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19179__A1 _27911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24172__A1 _30635_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22811_ VGND VPWR _22811_/X _22820_/B _29892_/Q _22820_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_285_2165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27323__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24172__B2 wire3640/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_1997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_2127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23791_ wire1807/X _23790_/X hold498/X wire1625/A _23792_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_246_2138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_709 _20671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14660__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22183__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18926__A1 _28187_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22722__A2 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25530_ VGND VPWR _26139_/A _25540_/C _31344_/D _25530_/C _19467_/C VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_226_885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22742_ VGND VPWR _22740_/B _22740_/A _22741_/B _22742_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_55_2111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27110__A1 _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21930__B1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24248__A _31760_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16401__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25121__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25461_ _19476_/X _31310_/D _25460_/Y _25454_/A _31309_/Q _31310_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA_max_length1559_A _22554_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22673_ VGND VPWR _22671_/B _22671_/A _22669_/A _22678_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_90_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27200_ _27200_/X hold413/X _32093_/Q _27198_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_fanout1367_A wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30077__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24412_ VGND VPWR _24412_/A2 _14382_/C _31008_/Q _24412_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_143_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21624_ VPWR VGND _21624_/X _21624_/B _21966_/B VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XANTENNA__22486__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28180_ _28180_/Q _30470_/CLK _28180_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25392_ _31281_/D _25391_/X _26238_/A _25390_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_240_387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14963__A2 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23683__B1 _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31322__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32448__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20497__A0 _29015_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24880__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5526 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19351__A1 _28207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27131_ VPWR VGND _32040_/D _27131_/B _27131_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_24343_ _24342_/X _24357_/B1 wire1668/X _24353_/A1 _30974_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16165__A1 _28091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21555_ _21556_/B _17115_/Y _21552_/X _21388_/X _21655_/C _21655_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_4 XANTENNA__21103__C _21103_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17362__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27278__B hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25424__A1 _31363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1534_A wire1554/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23298__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22238__A1 _30110_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20506_ VGND VPWR _20506_/S _27698_/A1 _29024_/Q _29024_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27062_ _27062_/X _27122_/B _32009_/Q _27070_/C _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_271_5572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25079__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15373__C1 _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24274_ _31660_/Q _24273_/X _30931_/D _24273_/D wire801/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22238__B2 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23435__B1 _14098_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14715__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19639__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28937__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_29_0_core_clk_A clkbuf_5_29_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21486_ _21674_/C _21486_/B _30473_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_279_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20715__S _20720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20249__A0 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_337_core_clk _30391_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_fanout994_A _15772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1401 wire1402/X _19189_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_26013_ VGND VPWR _14171_/A _19551_/A _26014_/A2 _26013_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22789__A2 _29890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23225_ _30422_/Q _20914_/A _23225_/X _20912_/B _23236_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21400__A _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1412 VPWR VGND _23519_/S _23497_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23986__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20437_ VGND VPWR _20449_/S _28957_/Q wire1792/X _28957_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_11_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27177__A1 hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31472__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1701_A wire1707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_5589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21997__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_2822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25188__B1 _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17665__A1 _31719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23156_ _23049_/A _21211_/B _23190_/B _30444_/Q _23156_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_4877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17665__B2 _31718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26385__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18862__B1 wire2281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26924__A1 _31948_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20368_ _31405_/Q _31401_/Q _25733_/A _31402_/Q _25722_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_192_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26924__B2 wire2367/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23738__A1 _31797_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27961__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22107_ _22167_/A1 _22106_/X _22107_/X _30092_/Q _22123_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__16873__C1 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27964_ _27964_/Q _30294_/CLK _27964_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23087_ hold279/A wire3171/X _23087_/X _30095_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18209__A3 wire3812/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2075_A wire2076/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20299_ VGND VPWR _20302_/S _27237_/A0 _28840_/Q _28840_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14014__A _28483_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17028__C _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input158_A la_input[87] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_1875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29703_ hold323/A _30118_/CLK _29703_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_44_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26915_ hold406/A wire1570/X _31939_/D wire2321/X wire1230/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_248_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22038_ VGND VPWR _22038_/S _21956_/A _21812_/B _22038_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19957__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20450__S _20452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19524__B _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27895_ _27895_/Q _28216_/CLK _27895_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_3004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20421__A0 wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26688__B1 _31797_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13853__A _28644_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_3529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_4615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18090__A1 wire3905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29634_ _29634_/Q _31586_/CLK _29634_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14860_ _14860_/X wire1214/A _14853_/X _14855_/X _14859_/X _15632_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_79_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26846_ VGND VPWR wire2641/X _19535_/A wire749/X _26846_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__26152__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_4517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24163__A1 _28544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13811_ _31135_/Q _13811_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__24163__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17044__B _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29565_ _29565_/Q _29565_/CLK _29565_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_4386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14791_ VGND VPWR _14791_/X _14788_/X _14790_/X _15235_/A1 wire1214/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_26777_ _27058_/B _26694_/B _26791_/A _26777_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_147_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23989_ _23989_/X wire1289/X wire4079/X _31165_/Q wire1600/A VGND VPWR _23988_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__22174__B1 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14651__A1 _28083_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3284_A fanout3284/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22713__A2 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23910__A1 _30621_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14387__C _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16530_ wire992/A _16530_/X _16529_/X _16930_/A1 _29604_/Q _16966_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28516_ _28516_/Q _31815_/CLK _28516_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23910__B2 _30557_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13742_ _25895_/A _24648_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_25728_ VGND VPWR _25730_/A _31403_/Q _25727_/X _25727_/B _25733_/D VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xclkbuf_leaf_53_core_clk _31460_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_wire2507_A _20739_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20724__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16928__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29496_ _29496_/Q _32437_/CLK _29496_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_16_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20686__A _24826_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21281__S _22968_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25112__B1 _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_4075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28467__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16461_ _16911_/A2 _16461_/X _16460_/X _16458_/S _28959_/Q _16960_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14939__C1 _29281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28447_ _28447_/Q _31803_/CLK _28447_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_38_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25659_ _27281_/S _31386_/Q hold143/A _27349_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 XFILLER_103_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3451_A wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18156__A _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24466__A2 wire798/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23123__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29712__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18200_ VGND VPWR _18309_/S _28086_/Q _24216_/A0 _28086_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_3701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15412_ _15412_/X _29325_/Q _15692_/S _15721_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22477__A1 _17095_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19180_ _28007_/Q _19180_/X _19180_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_207_1955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16392_ _16721_/A2 _16415_/A1 _29255_/Q _16392_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_86_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28378_ VGND VPWR _28378_/D _30030_/CLK _28378_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_clkbuf_leaf_50_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23674__B1 _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14954__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24871__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2610 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3810_A wire3812/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19342__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18131_ VGND VPWR _18143_/S wire3877/X _28059_/Q _28059_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_122_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15343_ _15500_/A _15500_/C _32433_/Q _15343_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27329_ VGND VPWR _27330_/S _27278_/X _32187_/Q _32187_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21685__C1 _21684_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16156__A1 _29281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2876_A _21092_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1278 VPWR VGND VGND VPWR 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_14989_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22165__B1 _21037_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23901__A1 _28487_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26267__B _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19516_ VGND VPWR _19516_/X _20654_/A _19518_/A _20682_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_277_5203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23901__B2 _28679_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16728_ _16728_/X wire1060/A _16720_/X _16722_/X _16727_/X wire912/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_179_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4412 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20176__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31345__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21191__S _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2743_A hold115/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19447_ _19436_/Y _28443_/Q _28444_/Q _28442_/Q _19447_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 X_31725_ _31725_/Q _31730_/CLK _31725_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_30_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16659_ _16965_/A2 _16952_/A1 _32065_/Q _16659_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15198__A2 _15179_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16395__A1 _16389_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24457__A2 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_207_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16934__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22468__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31656_ _31656_/Q _31762_/CLK _31656_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19378_ _27984_/Q _19378_/X _19377_/X wire1995/X wire1930/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_4 XFILLER_69_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24862__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20479__A0 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18329_ VGND VPWR _18329_/S _28111_/Q _23671_/A1 _28111_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30607_ _30607_/Q _31806_/CLK hold320/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16147__A1 wire3272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31495__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27098__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31587_ _31587_/Q _32277_/CLK _31587_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24209__A2 wire759/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18687__A3 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19884__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23680__A3 wire1876/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14158__B1 _14157_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21340_ _21340_/X _21339_/C _21451_/B _21339_/Y _30340_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_236_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15355__C1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30538_ hold142/A _32553_/CLK input55/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_195_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_5510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25957__A2 _31500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20535__S _20535_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19609__B _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_4052 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_2115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_358_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23968__A1 _31131_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27984__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13938__A _28559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19097__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21271_ VGND VPWR _23533_/S _29733_/Q hold377/X _29733_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27159__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15370__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30469_ _30469_/Q _31914_/CLK _30469_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24090__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18005__S _18008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19636__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_5516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_5286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_4880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23010_ VGND VPWR _31395_/Q _23009_/X _23008_/X _23010_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26730__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20222_ VGND VPWR _20227_/S _28767_/Q _27705_/A1 _28767_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32208_ _32208_/Q _32547_/CLK _32208_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_63_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27318__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22640__A1 _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21443__A2 _21655_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18844__B1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26906__A1 _26762_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3619 wire3620/X wire3619/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_41_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24917__B1 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_3139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20153_ VGND VPWR _19574_/B _19628_/A _20168_/A2 _20153_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__21994__A3 hold255/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32139_ _32139_/Q _32557_/CLK _32139_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19625__A _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15122__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24888__D _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25346__B _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26382__A2 _26819_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1115_A wire1118/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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VPWR wire2666/A _19563_/A _20122_/A _20084_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_266_4940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_5073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26700_ _26700_/Y hold222/X _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_6_2373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18072__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32120__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23912_ _28488_/Q _19646_/B _23912_/X _28680_/Q _24207_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_27680_ VGND VPWR _27696_/S _27680_/A1 _32414_/Q _32414_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26134__A2 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24892_ _24892_/X _24892_/C _25022_/A _24892_/B _25022_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_184_4662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_2503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_3871 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24145__A1 _31148_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26458__A _31701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23581__S _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26631_ VGND VPWR _26631_/B _26631_/Y _31782_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA_clkbuf_leaf_246_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16622__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_232 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23843_ _30842_/D _24310_/B _23843_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_78_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14307__A_N _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27280__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14633__A1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22156__B1 _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_2957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25893__A1 _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24696__A2 _31471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15830__B1 _30486_/Q VGND VPWR VPWR VGND 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NF_sky130_ef_sc_hd__decap_12 X_26562_ _26561_/X _27131_/B wire3454/X _31869_/Q _31764_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25081__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_528 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23774_ _23773_/Y _31791_/Q _31792_/Q _23768_/Y _26696_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XFILLER_126_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20986_ VGND VPWR _13831_/Y _16979_/A _16979_/B _29448_/D _29448_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA_539 _30576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19572__A1 _28464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28301_ _28301_/Q _30390_/CLK _28301_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32270__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25513_ _25513_/B _25513_/Y _25513_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__26437__A3 _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22725_ _22729_/B _22725_/Y _22729_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_29281_ _29281_/Q _32430_/CLK _29281_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15189__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26493_ _26493_/X _26492_/Y _31705_/Q _27230_/C _26486_/X VGND VPWR _26491_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__16195__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20182__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24448__A2 _25197_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25645__A1 _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30712__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31838__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_397_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26842__B1 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_206_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28232_ _28232_/Q _30219_/CLK _28232_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_107_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22459__A1 _17019_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25444_ _25443_/X _26498_/A _31362_/Q _25430_/Y _31302_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14457__A_N _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22656_ _22656_/B _22656_/A _22659_/C _22656_/D _22656_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_241_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14936__A2 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24853__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29885__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19631__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21607_ _21608_/B _21942_/S _21610_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_276_3333 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28163_ _28163_/Q _30471_/CLK _28163_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_191_5334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25375_ _25414_/B1 _25379_/A _25388_/D _25408_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21bai_2 XANTENNA__27398__A1 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21131__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17335__B1 hold43/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22587_ VGND VPWR _22613_/S hold124/A _22586_/X _30072_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16923__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19875__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_2_2_0_core_clk_A clkbuf_2_3_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22474__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27114_ _27116_/B _26898_/B _27116_/A _27114_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_46_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24326_ _32010_/Q _27053_/A _24326_/X _31978_/Q _26364_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_30_3883 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23408__B1 wire3412/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21538_ _21559_/B _21558_/D _21538_/A _21538_/B _21558_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_28094_ _28094_/Q _29565_/CLK _28094_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_3894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_4928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_134_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25948__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20445__S _20452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30862__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19519__B _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_171_core_clk _31860_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__31988__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15897__B1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23959__A1 wire4086/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_1874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_137_4163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29115__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15539__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27045_ _32001_/Q _27044_/Y _32001_/D _27050_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_46_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13848__A _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23959__B2 _13784_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24257_ _26470_/B _24256_/Y hold468/A _26263_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 XFILLER_215_3604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2192_A _26015_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24081__B1 _28632_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21469_ _14116_/Y _21463_/B _21653_/B _21653_/D _21444_/A _21471_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XANTENNA_clkbuf_5_1_0_core_clk_A clkbuf_5_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_3615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1220 VPWR VGND _14823_/C1 wire1221/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_100_core_clk _32417_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_254_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24620__A2 _14263_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_3342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14010_ _28487_/Q _14010_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_254_2941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_5230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29654__D _29654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23208_ VGND VPWR _23212_/S _30200_/Q _30130_/Q _30200_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21434__A2 _21426_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_2398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24188_ _24188_/X _20128_/B _24188_/A1 _28738_/Q _24188_/A2 VGND VPWR _24180_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_27_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22631__B2 _22627_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24441__A _24441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17754__S _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23139_ _30175_/D _23190_/B _23138_/X _30175_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__19535__A _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_285_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16310__A1 _16727_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26373__A2 _26335_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25030__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2457_A _23573_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28996_ _28996_/Q _32302_/CLK _28996_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_232_3984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29265__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_5149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23187__A2 _23192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22599__C _22599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15664__A3 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15782__B _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15961_ wire989/X _15961_/X _15960_/X _16039_/C1 _30891_/Q _16039_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_24_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27947_ _27947_/Q _30484_/CLK _27947_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_210_4994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17700_ VGND VPWR _31723_/Q _17698_/X _17699_/X _17700_/X _17490_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_2_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18063__A1 wire3886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14912_ _15597_/A2 _14912_/X _14911_/X _15610_/B1 _30494_/Q wire1506/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_249_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17055__A _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19260__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18680_ _29344_/Q _30287_/Q _29343_/Q _18668_/C _18680_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire2624_A wire2625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15892_ _15892_/X _28743_/Q _16026_/A2 _16039_/B2 _16040_/A2 _15891_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_27878_ _27878_/Q _30453_/CLK _27878_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_248_3457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_5048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30242__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31368__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14398__B _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24136__A1 _28669_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23491__S _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24136__B2 _31179_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29617_ _29617_/Q _32350_/CLK _29617_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17631_ _17874_/A2 hold261/A _17630_/X _17631_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25333__B1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16613__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25272__A _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14843_ VGND VPWR _14843_/Y _14842_/X _14829_/X wire1097/A _14833_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA_max_length3858_A wire3859/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26829_ _26829_/B _26772_/C _27100_/B _26829_/X _27098_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_208_5591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17347__C_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_92_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22147__B1 _22146_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25703__C _27739_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15821__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_1924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_2456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17562_ VGND VPWR _17764_/B _17545_/Y _17561_/Y _17562_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22698__A1 _30092_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29548_ _29548_/Q _31927_/CLK _29548_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20158__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14774_ _14774_/X _14933_/B1 _14773_/X _29106_/Q _14930_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__27857__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19301_ _22086_/B1 _27949_/Q _19300_/X _19301_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_109_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16513_ VGND VPWR _16513_/X _16512_/X wire1032/A _16068_/S _16511_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20847__C _20847_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30392__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17502__B _17502_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2993_A _18499_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17493_ _26464_/C _31613_/Q _17452_/X _17502_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29479_ _29479_/Q _31917_/CLK _29479_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_210_39 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25097__C1 wire838/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16377__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25636__A1 _31391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_173_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_4855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31510_ _31510_/Q _31510_/CLK _31510_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19232_ _19232_/X wire1885/A _19226_/X _19231_/X wire3151/X wire1564/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_73_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_5267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26815__B _26815_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16444_ VGND VPWR _16444_/X _16120_/S _16807_/B1 _16443_/X _16442_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_87_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32490_ _32490_/Q _32498_/CLK _32490_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14927__A2 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4544 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24844__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output494_A _28656_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_259_core_clk _32064_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23111__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31441_ _31441_/Q _32401_/CLK _31441_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19163_ _19162_/X _19318_/B1 _19358_/A2 _28166_/Q _19163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17929__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16375_ _16356_/X _29668_/D _16365_/X wire898/A _16374_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__27389__A1 _32239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17326__B1 _17332_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21122__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16833__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_292 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18669__A3 _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19866__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18114_ VGND VPWR _18118_/S wire3827/X _28043_/Q _28043_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15326_ _15723_/A2 _15326_/X _15325_/X _15718_/B1 _28961_/Q _15759_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__17877__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19094_ VGND VPWR _19093_/X wire1770/X _19094_/S _19094_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_31372_ _31372_/Q _31763_/CLK _31372_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21673__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20355__S _20359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output661_A wire2715/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19429__B _19429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26061__A1 _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26831__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3510 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15888__B1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20881__A0 _29369_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_3401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18045_ VGND VPWR _18049_/S _18217_/B _27977_/Q _27977_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30323_ _30323_/Q _32349_/CLK _30323_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13758__A _31189_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19079__B1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26600__A3 wire1275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15257_ _16938_/A2 wire3305/X _28887_/Q _15257_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_258_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15352__A2 _15349_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1292_A wire1293/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_3141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3775 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17629__A1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14208_ _24446_/A _24446_/B hold104/X _14208_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23666__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27138__S _27142_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14560__B1 _29616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30254_ _30254_/Q _30254_/CLK _30254_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17629__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26349__C1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29608__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25447__A _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15188_ _15188_/X _15509_/A1 _15185_/X _15187_/X _15319_/B _15183_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__22570__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17082__A1_N _29886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_5549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32143__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14139_ _14303_/B _14139_/X _14303_/A _29951_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_231_4184 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15104__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30185_ _30185_/Q _30392_/CLK _30185_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27561__A1 _32193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26364__A2 wire2197/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25021__C1 wire3320/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19996_ VGND VPWR _19522_/B _19522_/A _20028_/A _19996_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_7_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21186__S _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24375__A1 wire2017/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_2468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16852__A2 _16849_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21808__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18947_ _28220_/Q _18947_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_286_357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold27_A hk_dat_i[8] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22386__B1 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14863__A1 _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28632__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29758__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22925__A2 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_4056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26116__A2 _26121_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_24 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18878_ _18875_/X _18878_/B1 _18877_/X _18878_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_0_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16065__B1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire710_A wire710/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2860_A _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24127__A1 _28572_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32293__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17262__C1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17801__A1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16604__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_4545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire808_A wire808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17829_ VGND VPWR _17829_/X _17565_/C _17852_/A _17662_/A _17651_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_261_5571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18495__S _18495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22138__B1 _18667_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14615__A1 wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30735__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31334__D _31334_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_1852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_3893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_2665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20840_ _30422_/Q _30424_/Q _20840_/X _20912_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__19736__D_N _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22689__A1 _30091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_3522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23886__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28782__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27601__S _27605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21897__C1 _22966_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16368__A1 _30902_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17412__B _30996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20771_ VGND VPWR _20788_/S _27693_/A1 _29285_/Q _29285_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20164__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length906_A _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2933_A _20328_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25627__A1 hold123/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25627__B2 hold102/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22510_ VGND VPWR _22512_/A3 _22510_/A4 _22510_/A2 _22510_/X _30016_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_69_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31708_ _31708_/Q _32566_/CLK _31708_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23490_ VGND VPWR _23496_/S _23489_/X wire3443/X _30431_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23638__B1 wire1292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30885__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15040__B2 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23102__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28012__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29138__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23430__A _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22441_ VGND VPWR _29983_/Q _29984_/Q _29985_/Q _22441_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_101_3826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26444__C _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31639_ _31639_/Q _31685_/CLK _31639_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_3596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21113__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15591__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22456__A4 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24850__A2 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24245__B _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16970__C _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17868__A1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25160_ _25430_/B _25159_/X _25160_/A _31213_/D _25160_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_22372_ _22372_/X wire3213/X _18306_/X wire3712/X _22372_/A2 _29764_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__22861__A1 _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20265__S _20269_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_3085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_2963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_3659 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26052__A1 _26055_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22046__A _22046_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15879__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30115__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24111_ _30583_/Q _24140_/A2 _24111_/X _30519_/Q wire1614/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15359__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21323_ _21640_/C _21419_/D _21640_/B _21640_/D _21323_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_192_4986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25091_ _31188_/D _25090_/Y wire2253/X _25087_/X _26539_/B wire1301/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__24063__B1 _24062_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15343__A2 _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25260__C1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28162__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29288__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4106 VPWR VGND _13919_/A _28578_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_173_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23576__S _23590_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24042_ _20126_/A _24041_/X _28724_/Q _24192_/A2 _24042_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__14551__B1 wire1489/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21254_ VGND VPWR _23533_/S _23095_/C _23096_/A1 _29716_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire4117 VPWR VGND wire4117/X _28567_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold430 hold430/A hold430/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18817__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4128 VPWR VGND wire4128/X _28554_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold441 hold441/A hold441/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_2057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4139 wire4139/X _28454_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_1_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16979__A _16979_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold452 hold452/A hold452/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold463 la_input[1] input84/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20205_ VGND VPWR _20205_/S _28750_/Q wire1682/X _28750_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_60_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3641_A _30697_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19355__A _30282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold474 hold474/A hold474/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_28850_ _28850_/Q _32574_/CLK _28850_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3427 wire3427/A wire3427/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21185_ VGND VPWR _21199_/S _29627_/Q _27245_/A0 _29627_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_119_2480 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25158__A3 _24565_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26355__A2 wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold485 hold485/A hold485/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_41_3220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3739_A _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3438 VPWR VGND wire3438/X wire3439/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_43_2828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30265__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold496 hold496/A hold496/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_186_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2704 VPWR VGND _19605_/B wire2705/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout910 VPWR VGND wire912/A wire915/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_154_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21096__S _21097_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23169__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25507__D _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24366__A1 _32030_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25563__A0 _31363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27801_ VGND VPWR _27801_/S _25037_/B _32524_/Q _32524_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25791__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2715 VPWR VGND wire2715/X hold121/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_278_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20136_ _28712_/D _25029_/B _20135_/X _25081_/A _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__16843__A2 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24366__B2 _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15646__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31510__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout932 VPWR VGND fanout932/X wire944/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28781_ _28781_/Q _32342_/CLK _28781_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1883 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25993_ VGND VPWR _19547_/B _19551_/A _26014_/A2 _25993_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire2737 VPWR VGND wire2737/X wire2737/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14854__A1 _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22377__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout954 wire958/A _16720_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_fanout957_A wire963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout965 wire981/A _16823_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18045__A1 _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1699_A _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27732_ VGND VPWR _27737_/S wire2242/X _32463_/Q _32463_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_4156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout976 VPWR VGND _16948_/S wire979/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19242__B1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27304__A1 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24944_ _25076_/C1 _24943_/Y _24955_/A _31116_/Q _31116_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20067_ _26179_/B1 _20066_/Y _20073_/A2 _28679_/Q _28679_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26107__A2 _26112_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3906_A wire3908/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout987 VPWR VGND wire989/A _15772_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_2281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17306__C _17306_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16056__B1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26188__A _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_2923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27855__A2 _25810_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27663_ VGND VPWR _27667_/S wire2234/A _32401_/Q _32401_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22129__A0 _30384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24875_ _26238_/A _24874_/Y _31083_/Q _24873_/Y _31083_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_93_3630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15803__A0 _28869_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14606__A1 _15307_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16918__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_2967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29402_ _29402_/Q _30250_/CLK _29402_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15822__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19090__A _30270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31660__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26614_ wire3452/X _31777_/D _26612_/X _26861_/C1 _31882_/Q _26613_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_303 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23826_ VGND VPWR _23826_/X _31885_/Q _23859_/A _24281_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_314 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27594_ _27594_/Y _27594_/B _27594_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__23877__B1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2038_A _24439_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_325 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19545__A1 _28457_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_336 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22144__A3 _22142_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_347 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29333_ _29333_/Q _32575_/CLK _29333_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27511__S _27515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26545_ VGND VPWR wire2630/X _19503_/A _26543_/B _26545_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_76_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_358 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23757_ _31780_/Q _23759_/A _31779_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20155__A2 _19577_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20969_ VGND VPWR _20980_/S _30175_/Q _29434_/Q _29434_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_204_3338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_369 wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17556__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25618__A1 wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18753__C1 _28115_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23629__A0 _31080_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22708_ _22710_/B _22709_/B _22708_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_193_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20386__D _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29264_ _29264_/Q _32444_/CLK _29264_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_74_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_3983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14490_ _14515_/B _14490_/X _14086_/Y _22078_/C hold216/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 X_26476_ VGND VPWR _26476_/S _26475_/X _31702_/Q _31702_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_23688_ _23688_/X wire1628/X _31557_/Q _26838_/A1 _31509_/Q _23737_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__32016__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25094__A2 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26291__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28215_ _28215_/Q _30030_/CLK _28215_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25427_ _25427_/Y _31297_/Q _31296_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 X_22639_ _22747_/B _22663_/B _29876_/Q _22642_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XFILLER_224_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29195_ _29195_/Q _32435_/CLK _29195_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15582__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19848__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18434__A _30415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16160_ VGND VPWR _16566_/S _29594_/Q _29626_/Q _16160_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17859__A1 _31736_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3399 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28505__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25966__S wire754/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28146_ _28146_/Q _30462_/CLK _28146_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17859__B2 _31735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25358_ _31274_/D _25356_/X _26244_/A _25357_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22852__A1 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input86_A la_input[21] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19249__B _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26043__A1 _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27240__A0 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18153__B _27485_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15111_ _16938_/A2 wire3302/X _29115_/Q _15111_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_65_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length942 VPWR VGND _16601_/S _16856_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_120_2072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3606_A _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24309_ _24246_/B _23611_/A _26837_/A _24889_/A1 _24311_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XANTENNA__31040__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16091_ VGND VPWR _16091_/X _29045_/Q _16091_/A _16091_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__32166__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28077_ _28077_/Q _30294_/CLK _28077_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_4184 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15334__A2 wire1496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16531__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24054__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25289_ _25289_/B _25303_/D _25289_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__27791__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_2094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2435 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26594__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3414_A wire3430/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25251__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23486__S _23514_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15042_ _15042_/X _32353_/Q _15628_/A2 _15608_/B2 _15610_/B1 _15041_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_27028_ _27035_/D _31994_/D _27028_/A _27028_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__30608__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22065__C1 _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22604__A1 hold129/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18808__B1 _18807_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25267__A _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22390__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1050 VPWR VGND _16807_/B1 _16834_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20903__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28655__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17087__A2 _21679_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2741_A wire2742/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19850_ _26224_/A _19849_/X _19856_/A2 wire4107/A _28577_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_169_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM256_Di0[25] _14159_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22080__A2 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30323__D _30323_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26346__A2 wire2226/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25003__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29900__CLK _30479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20091__A1 _28691_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16295__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31190__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24357__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18801_ _19311_/B _28021_/Q _18800_/X _18801_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_189_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16834__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19781_ _26687_/B _19780_/Y _19782_/A _28547_/Q _28547_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_150_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16993_ _17077_/A _17027_/B _16993_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 X_28979_ _28979_/Q _32358_/CLK _28979_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_205_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22368__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3972 VPWR VGND _23223_/S _23224_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14845__A1 _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3983 VPWR VGND wire3983/X _29491_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_133_2477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30758__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18036__A1 _23285_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3994 VPWR VGND _23432_/B wire3995/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_248_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18732_ _18732_/X wire2270/A _28274_/Q wire2281/A wire2582/A wire3766/A VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_211_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15944_ VGND VPWR _15944_/X _15941_/X _15943_/X _15957_/S wire1048/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_245_4821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31990_ _31990_/Q _32024_/CLK _31990_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24109__A1 _31113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24109__B2 wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25306__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18663_ _21211_/A _23348_/B _23348_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XANTENNA__26503__C1 _26508_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30941_ _30941_/Q _31927_/CLK _30941_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15875_ _15875_/X wire1053/X _15872_/X _15874_/X _16522_/B1 _15870_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__16598__A1 wire901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19712__B _20657_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output507_A wire4044/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_4767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17614_ VGND VPWR _17832_/S _17613_/X _17593_/X _17614_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14826_ VGND VPWR _15627_/S _29214_/Q _29278_/Q _14826_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_283_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_4789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21643__C_N _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4122_A _28562_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18594_ VGND VPWR _18598_/S wire3916/X _28308_/Q _28308_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30872_ _30872_/Q _32438_/CLK wire704/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23868__B1 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27059__B1 _27058_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19536__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18328__B _22382_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27421__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2274_A _23343_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3184 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17545_ _17542_/Y _17552_/S _17544_/Y _17545_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 X_14757_ _14757_/X _14754_/X _15151_/B1 _15611_/A1 _14756_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_92_2450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20146__A2 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21343__A1 _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22540__A0 _30040_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25609__A1 hold96/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_1115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25609__B2 _31237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_870 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17011__A2 _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_881 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32542_ _32542_/Q _32543_/CLK _32542_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27074__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_892 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17476_ _31621_/Q _17457_/X _17474_/X _31685_/Q _26488_/B _17875_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA_wire1305_A _20372_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14688_ _15629_/A2 _14688_/X _14687_/X _14642_/S _29008_/Q _14930_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__22565__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15022__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26282__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19215_ VGND VPWR _19215_/X _19357_/B wire1924/A _28041_/Q _19214_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__30138__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17659__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16427_ VGND VPWR _16427_/X _16424_/X wire1038/X _16720_/C1 _16426_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_157_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23096__A1 _23096_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32473_ _32473_/Q _32473_/CLK _32473_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_179_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24293__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16770__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19839__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32509__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24832__A2 wire863/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28185__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31424_ _31424_/Q _32527_/CLK _31424_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19146_ _19146_/X _19138_/Y _19145_/X _19156_/S _19140_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_51_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14781__B1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16358_ _16358_/X _28884_/Q _16814_/B1 _16805_/A3 _16491_/S _16357_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_274_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29430__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_4934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26034__A1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26034__B2 wire2425/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15309_ _15309_/Y _15308_/X wire1089/A _15299_/X _15295_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XFILLER_26_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_5532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31355_ _31355_/Q _32554_/CLK _31355_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19077_ _28258_/Q _19077_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__16522__A1 wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24045__B1 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15325__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1674_A _18878_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16289_ VGND VPWR _16929_/S _28417_/Q _29082_/Q _16289_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_1968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27376__B _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27782__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26585__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25242__C1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2514_A _20690_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30288__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput502 wire4059/X la_output[114] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_135_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25793__A0 _30761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23399__A2 _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30306_ _30306_/Q _30314_/CLK _30306_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18028_ VGND VPWR _18051_/S wire3888/X _27960_/Q _27960_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_211_5234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput513 wire4030/X la_output[124] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_82_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31533__CLK _31694_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15730__C1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31286_ _31286_/Q _32294_/CLK _31286_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput524 _31110_/Q la_output[19] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20813__S _20813_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput535 _31120_/Q la_output[29] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24060__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput546 wire4015/X la_output[39] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19175__A _28135_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput557 _28726_/Q la_output[49] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29580__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30237_ _30237_/Q _31916_/CLK _30237_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19472__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26337__A2 _26347_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput568 _28736_/Q la_output[59] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23409__B _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_2893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1939_A wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15089__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_1146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput579 _28682_/Q la_output[69] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_5_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20082__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21173__C_N _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15628__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_2619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30168_ _30168_/Q _30387_/CLK _30168_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_60_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19979_ VGND VPWR wire1319/A wire2308/X _19618_/X _19979_/X _25867_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_99_2615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20114__A _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22359__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length856_A _19984_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24899__A2 _19538_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18027__A1 wire3892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31683__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22990_ VGND VPWR _31396_/Q _22986_/X _22989_/X _22990_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30099_ _30099_/Q _31938_/CLK _30099_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14112__A _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_5043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27298__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21031__A0 wire3978/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_9_1_core_clk clkbuf_opt_9_1_core_clk/X clkbuf_opt_9_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18578__A2 _20847_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19775__A1 _28544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22374__A3 _30476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27837__A2 _25804_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23425__A _29840_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21941_ VGND VPWR _21941_/B _21941_/Y _21941_/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__16589__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19622__B _26890_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16738__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25848__A1 _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19114__S _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13951__A _28546_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24660_ _31462_/Q _24661_/B _31443_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_wire3222_A _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21872_ _21872_/B _21872_/Y _21946_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_33_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25312__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32039__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19527__A1 wire2420/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24520__A1 _31293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23611_ _24464_/C _26542_/D _23611_/A _24467_/C _23611_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_16_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20823_ _20823_/Y _29345_/Q _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_222_4651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24591_ _24591_/B _24591_/X _31541_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__20137__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21334__A1 _21651_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22531__A0 _30031_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1182_A wire1199/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_5426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26455__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26330_ _26329_/Y _27117_/C1 _31653_/Q _26329_/B _31653_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_23542_ VGND VPWR _23559_/S _30463_/Q _30033_/Q _30463_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28528__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20754_ VGND VPWR _20754_/S _23671_/A1 _29269_/Q _29269_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21885__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_4083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15013__A1 wire1085/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25076__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23798__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26273__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23160__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26261_ _31619_/Q _26261_/X _26267_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__23087__A1 hold279/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31063__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23473_ VGND VPWR _23497_/S _28375_/Q _30423_/Q _23473_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3591_A _30857_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32189__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16473__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21599__B _22067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23087__B2 _30095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30408__D _30408_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20685_ VGND VPWR _31061_/Q _31057_/Q _31060_/Q _20686_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15564__A2 _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16761__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24823__A2 _24256_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28000_ _28000_/Q _30451_/CLK _28000_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_178_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25212_ _24572_/B _25211_/X _31362_/Q _25416_/A _25212_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_192_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25786__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22424_ VGND VPWR _22047_/Y _22598_/S _22423_/Y _29977_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_179_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26192_ VPWR VGND _31584_/D _26192_/B _26244_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_87_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_4059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_1557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold116_A hold116/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26025__A1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26025__B2 wire2408/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_3689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28678__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25143_ _25141_/Y _25148_/A _31206_/D _25144_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_216_5178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22207__C _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22355_ _29927_/D _22385_/B1 hold483/X hold432/A _22356_/B VGND VPWR _22354_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_195_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15316__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24036__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16513__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27773__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26576__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25233__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29923__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_4_0_core_clk clkbuf_3_4_1_core_clk/A clkbuf_3_5_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_270_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21306_ VPWR VGND _21307_/A _21665_/B _21588_/A VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_273_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25087__A _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25074_ _25810_/C _25073_/X _25086_/A2 _31180_/Q _31180_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_216_4488 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29951_ _29951_/Q _31937_/CLK _29951_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_22286_ _22286_/X _23304_/B hold230/A _29873_/Q _23307_/B VGND VPWR _22285_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_254_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22598__A0 _22597_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3129 _14126_/Y _14168_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24051__A3 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28902_ _28902_/Q _32525_/CLK _28902_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24025_ _30599_/Q _24204_/A2 _24025_/X _30535_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_1_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21237_ VGND VPWR _22954_/S _14360_/B hold344/A _29699_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold260 hold260/A hold260/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__22062__A2 _21610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_1967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19463__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27525__A1 _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29882_ VGND VPWR _29882_/D _31961_/CLK _29882_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xwire3213 wire3213/X wire3213/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__30900__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold271 hold271/A hold271/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xhold282 hold282/A hold282/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19516__C _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21270__A0 _30448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20073__A1 _28682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3235 wire3235/A wire3235/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__24339__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold293 hold293/A hold293/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire3246 VPWR VGND wire3246/X wire3247/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_28_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25536__B1 _25565_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27506__S _27506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28833_ _28833_/Q _32321_/CLK _28833_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2512 _20754_/S _20749_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1716 VPWR VGND _23539_/S _23380_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21168_ VGND VPWR _21168_/S _29611_/Q _27261_/A0 _29611_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_25_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_4133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14827__A1 _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1983_A wire1997/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2534 VPWR VGND _20515_/S _20506_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1800 VPWR VGND _29854_/D _17347_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_99_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout751 VPWR VGND wire752/A wire753/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18018__A1 _18499_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1749 VPWR VGND fanout1749/X _14441_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20119_ _26861_/C1 _20118_/Y _20124_/A _28705_/Q _28705_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1811 VPWR VGND _19994_/B _19788_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19215__B1 wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2556 VPWR VGND _20236_/S _20249_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_input140_A la_input[70] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28764_ _28764_/Q _32428_/CLK _28764_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_3590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13990_ _28507_/Q _13990_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_21099_ _14459_/A _22338_/A _21099_/C _23342_/C _23347_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 X_25976_ _25975_/X _31504_/Q _31504_/D _25974_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA_wire2155_A _19698_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14022__A _28475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout773 VPWR VGND _27117_/A2 _27053_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_41_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28548__D _28548_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27289__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1833 wire1833/A wire1833/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_164_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16029__B1 wire1021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout784 _26139_/B _26159_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_21_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout795 _24892_/X _24955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_41_2371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2589 _18309_/S _18317_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_98_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28058__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27715_ VGND VPWR _27719_/S _25029_/B _32448_/Q _32448_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27828__A2 _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1855 VPWR VGND _21817_/S wire1855/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22996__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24927_ _24927_/Y _24927_/B _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_189_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_5176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1866 VPWR VGND wire1866/X wire1866/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28695_ _28695_/Q _31806_/CLK _28695_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_128_3214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1877 VPWR VGND wire1877/X _19785_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_1727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25839__A1 _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29303__CLK _32402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1888 _20858_/S _20906_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20678__B _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3197_A _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2322_A wire2323/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15660_ VGND VPWR _15660_/X _15659_/X _15658_/X _15705_/A1 _15744_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_93_4194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_3520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27646_ VGND VPWR _27647_/S _19732_/A _32387_/Q _32387_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_100 _18720_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24858_ _24865_/C _31074_/D _25160_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__26068__D _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_2617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_111 _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15252__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_122 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22117__A3 _22119_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14611_ wire1539/X _15607_/A1 _29038_/Q _14611_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27241__S _27262_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_133 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23809_ wire1807/X _23808_/X _31812_/Q wire1625/X _23810_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_2_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15591_ _15610_/A2 _15591_/X _15590_/X _15277_/S _28108_/Q _15608_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_144 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27577_ _32338_/Q _27597_/B2 _32338_/D _27576_/X _27575_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22522__A0 _30022_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14168__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24789_ _26179_/B1 _24788_/Y _24787_/Y _31048_/Q _31048_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_155 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31406__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18726__C1 _27858_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_166 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14395__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17330_ wire3562/A _31913_/Q _17330_/X _17446_/B2 _17330_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA_177 _23947_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29316_ _29316_/Q _32574_/CLK _29316_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14542_ _14545_/A _14542_/Y _30435_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_275_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26528_ _31749_/Q _26527_/Y _31749_/D _26533_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_265_1495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_188 _28242_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21876__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29453__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_199 _29107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_4650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26264__A1 _31659_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27461__A0 _32288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16201__B1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23070__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17261_ _30928_/Q _30962_/Q wire3186/X _17261_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 X_29247_ _29247_/Q _32320_/CLK _29247_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2691_A wire2692/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14473_ _14473_/Y _29452_/D hold364/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26459_ _26459_/Y _26459_/A _26459_/C _26459_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_35_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30318__D _30318_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24275__B1 _26335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15555__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3531_A wire3536/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2789_A _27626_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19000_ wire1403/A _28385_/Q _18999_/X _28385_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_273_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16212_ VGND VPWR _16961_/S _28848_/Q _28880_/Q _16212_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_89_2839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30430__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29178_ _29178_/Q _29565_/CLK _29178_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17192_ VGND VPWR _17238_/S _17186_/X _17191_/X _30399_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31556__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26016__A1 _31523_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27213__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24290__A3 _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16143_ VGND VPWR _16823_/S _29312_/Q _28750_/Q _16143_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28129_ _28129_/Q _28402_/CLK _28129_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_opt_6_6_core_clk_A clkbuf_opt_6_6_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24027__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27764__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26567__A2 _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25224__C1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17701__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31140_ _31140_/Q _32541_/CLK _31140_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length783 VPWR VGND wire781/A _26347_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16074_ _16387_/A _16387_/C _32420_/Q _16074_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_256_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20633__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22589__A0 _22588_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24042__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_4618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15025_ _15025_/X _28953_/Q _15638_/B1 _15605_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_19902_ VGND VPWR wire2174/X _20061_/C _25980_/A2 _19902_/X _26999_/A _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18257__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30580__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31071_ _31071_/Q _31548_/CLK _31071_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23250__A1 _29498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19454__B1 _31342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14631__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26319__A2 hold132/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27516__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25381__A_N _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4072_A wire4073/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18103__S _18109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21261__A0 _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20064__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22133__B _29819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30022_ _30022_/Q _30451_/CLK _30022_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_65_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29842__D _29842_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16807__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25527__B1 _25511_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27416__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19833_ VGND VPWR _26878_/B _19520_/B _19853_/A2 _19833_/X _27091_/C1 _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_257_806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21800__A2 _21381_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output624_A _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14818__A1 _30893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2962 VPWR VGND _18656_/S _18626_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18009__A1 wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2973 _18593_/X _18624_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_269_699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17942__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19206__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17480__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19764_ _19764_/Y _19764_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_283_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3791 VPWR VGND wire3791/X wire3791/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_133_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16976_ VGND VPWR _16976_/Y _16975_/X _14317_/Y _16974_/X _17094_/A VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA_wire1255_A _24098_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21013__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14294__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19757__A1 _28535_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15491__B2 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24750__A1 _31467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18715_ VGND VPWR _18715_/X _19335_/B _19336_/B1 _27889_/Q _18714_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27819__A2 _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22787__C _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22987__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_8_core_clk _32428_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_15927_ wire1005/X wire1477/X _30890_/Q _15927_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xinput6 VGND VPWR input6/X input6/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_0_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24962__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31973_ VGND VPWR _31973_/D _32039_/CLK _31973_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19695_ _27071_/C1 _19694_/Y _19695_/A2 _28508_/Q _28508_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25163__C _25163_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17768__B1 _31729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_4553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_4673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18646_ VGND VPWR _18646_/S wire3846/X _28359_/Q _28359_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30924_ _30924_/Q _31762_/CLK _30924_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15858_ VGND VPWR _16443_/S _29209_/Q _29273_/Q _15858_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_274_core_clk _30911_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_37_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16440__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15243__B2 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23305__A2 _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2848 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27151__S _27163_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18980__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14809_ VGND VPWR _14818_/S _28843_/Q _28875_/Q _14809_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31086__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30855_ _30855_/Q _32401_/CLK _30855_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18577_ VGND VPWR _23231_/A _18580_/A _20982_/B _18577_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20119__A2 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15789_ _28396_/Q wire1698/X _15789_/X _22307_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__15794__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_203_core_clk _31748_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_109_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23856__A3 _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32331__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17528_ _17530_/B _26441_/A _17842_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__27132__A_N _24779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18193__A0 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22295__S _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17897__B _17897_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30786_ _30786_/Q _31959_/CLK _30786_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20808__S _20811_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25058__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_3910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18732__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26585__B1_N wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32525_ _32525_/Q _32525_/CLK _32525_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23069__A1 _30161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24507__C _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17459_ _17457_/B _26441_/A _17452_/X _31618_/Q _26245_/C _31682_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XFILLER_274_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24266__B1 _26335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15546__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28820__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1889_A _20876_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29946__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_14_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3848 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32456_ _32456_/Q _32547_/CLK _32456_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20470_ VGND VPWR _20482_/S _28989_/Q wire1792/X _28989_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26007__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21539__C_N _30467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32481__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31407_ _31407_/Q _32310_/CLK _31407_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19129_ _28261_/Q _19129_/X _19200_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_118_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18496__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17299__A2 wire3583/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19693__B1 _19692_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32387_ _32387_/Q _32390_/CLK _32387_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27755__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26558__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_78 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30923__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14107__A _21463_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24569__A1 _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22140_ _22139_/X _22509_/C1 wire828/A _29820_/Q _29820_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_233_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31338_ VGND VPWR _31338_/D _32295_/CLK _31338_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_83_4396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28970__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20543__S _20543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput310 _13955_/Y la_iena[57] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19617__B _19618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_2245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24033__A3 _24032_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput321 _14009_/Y la_iena[67] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25230__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput332 _13999_/Y la_iena[77] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18248__A1 _28094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19109__S _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13946__A _28551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22071_ VGND VPWR _22071_/X _22071_/B _22072_/C _22071_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__17418__A _32271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput343 _13989_/Y la_iena[87] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19445__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27507__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31269_ _31269_/Q _31282_/CLK _31269_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput354 _14043_/Y la_iena[97] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18013__S _18017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27834__B _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput365 _13938_/Y la_oenb[106] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20055__A1 _28674_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21252__A0 _30430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1028_A _15768_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3627 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_2552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput376 _13928_/Y la_oenb[116] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18799__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29752__D _29788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21022_ _29487_/D _29487_/Q _18673_/X _21030_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19996__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_1976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_4082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput387 _13918_/Y la_oenb[126] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27326__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_2663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25635__A _25635_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput398 _13803_/Y la_oenb[20] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_77_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28200__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29326__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_2986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25830_ VGND VPWR _25830_/X _31439_/Q _31429_/Q _31438_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_187_4874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_3400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16274__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17471__A2 _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26191__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_4716 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1118 VPWR VGND wire1118/X wire1118/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25354__B _31273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3437_A wire3438/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21004__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14285__A2 _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15482__A1 _15567_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27272__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_809 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1491_A _14550_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24741__A1 _31471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23155__A _23155_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25761_ _27194_/C _27193_/B _32088_/Q _32089_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__19352__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1589_A _24276_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22973_ _22975_/B _13745_/Y _31429_/Q _22972_/X _27854_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XFILLER_224_5447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30303__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31429__CLK _32402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18249__A _30326_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27500_ VGND VPWR _27507_/S _27693_/A1 _32315_/Q _32315_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24712_ _31475_/Q _31474_/Q _31473_/Q _24701_/D _24714_/B _31457_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_1 XFILLER_266_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16026__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18420__A1 _28195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21924_ _22061_/S hold354/A _21924_/X _22071_/C _17148_/X _21915_/A hold281/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_28480_ VGND VPWR _28480_/D _31860_/CLK _28480_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25692_ _25692_/C _31394_/D _25692_/A _25692_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__28350__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29476__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_2893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16431__B1 wire1060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27431_ VGND VPWR _27483_/S _32272_/Q _32273_/Q _27431_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24643_ _26182_/A _24642_/X _26245_/C _31680_/Q _31047_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_58_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21855_ _21856_/B _21853_/Y _21854_/Y _21853_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__27918__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout822_A _23307_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16982__A1 _16979_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23847__A3 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29199__D _29199_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20806_ VGND VPWR _20811_/S _29319_/Q _24227_/A0 _29319_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27362_ VGND VPWR _27366_/S _32216_/Q _27417_/A0 _32216_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_3182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30453__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21858__A2 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24574_ _24574_/C _31043_/D _25109_/B _25149_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__23602__B _26386_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21786_ hold162/A wire1855/A _29781_/D _21785_/X _21784_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XPHY_836 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20718__S _20719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31579__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26246__A1 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27443__A0 _32279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29101_ _29101_/Q _32417_/CLK _29101_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19920__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18723__A2 _18715_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26313_ _26313_/Y _26327_/B _26882_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_5218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23525_ VGND VPWR wire4144/X hold377/A _23525_/S _23525_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_51_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_253_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20737_ VGND VPWR _20749_/S _27247_/A0 _29252_/Q _29252_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27293_ hold143/A _27404_/B _31384_/Q _31386_/Q _27301_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XANTENNA_wire3973_A _29649_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15537__A2 _15537_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16734__A1 _32067_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1731_A _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_4391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1829_A _18237_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19929__C_N wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29032_ _29032_/Q _32379_/CLK _29032_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_197_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26244_ VPWR VGND _31610_/D _26244_/B _26244_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__14745__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22807__A1 _30102_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3722 _18328_/A _18332_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_7_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23456_ _23456_/X _23455_/X _23454_/X _23448_/Y _14100_/Y _29839_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 X_20668_ VGND VPWR _25722_/D _31392_/Q _19776_/C _20668_/X wire1296/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_197_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22933__S _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20818__A0 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24272__A3 _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22407_ VGND VPWR _22613_/S _29963_/Q _21882_/Y _29963_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18487__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3137_A _23530_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26175_ _26175_/X hold412/X _26179_/B1 _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_270_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22283__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3777 VPWR VGND _14459_/A _18535_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26549__A2 _14206_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23387_ VGND VPWR _23560_/S _30365_/Q hold351/X _30365_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25206__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_78_core_clk _31570_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_20599_ VGND VPWR _20615_/S _27692_/A1 _29114_/Q _29114_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14017__A _28480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14760__A3 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3788 _20958_/S _20964_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_input188_A mprj_dat_i[22] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20294__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_3579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25126_ _25149_/B _25135_/D _25136_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_10_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22338_ _22338_/A hold325/A _22338_/X _22338_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_69_2282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_3713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_3830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22234__A _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25221__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20680__C _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3304_A wire3305/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13856__A _28641_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25057_ _25065_/A _24927_/B _25057_/X _25069_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__23232__A1 _22649_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29934_ hold366/A _32365_/CLK _29934_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_62_3746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22269_ wire828/X _29838_/D _22267_/X _22509_/C1 _29838_/Q _22268_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_43_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23049__B _30086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_4004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3010 VPWR VGND _18420_/S _18418_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_79_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20046__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21243__A0 _30421_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3021 VPWR VGND _18397_/S _18386_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19987__A1 wire1376/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29662__D _29662_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24008_ _24205_/B1 wire3632/X _24007_/X _24008_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17447__C1 _17445_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3032 VPWR VGND _18339_/S _18366_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_191_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout2236 _19538_/Y _25029_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27236__S _27255_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32204__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1502 wire1506/A _15628_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29865_ _29865_/Q _31761_/CLK _29865_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_input49_A la_input[103] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1513 VPWR VGND _15748_/B2 wire1519/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21794__A1 _18535_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_5074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3065 VPWR VGND _18043_/S _18044_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2320 _14216_/Y wire2320/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout2269 VPWR VGND wire2270/A _19216_/D1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2331 _14207_/Y wire2331/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1535 wire1539/A _16798_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_16830_ wire918/A _16829_/X _16825_/X wire1048/A _16830_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 X_28816_ _28816_/Q _32332_/CLK _28816_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19543__A _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17462__A2 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2342 wire2343/X wire2342/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout1546 VPWR VGND wire1547/A wire1557/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_95_4245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_12_1_core_clk clkbuf_5_12_1_core_clk/X clkbuf_5_12_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_wire2537_A _20517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26721__A2 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3098 VPWR VGND wire3098/X _17291_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29796_ hold235/A _30456_/CLK _29796_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20689__A _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2364 VPWR VGND wire2364/X wire2365/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_76_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_2499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19739__A1 _28526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1630 VPWR VGND _24441_/C _19785_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2375 VPWR VGND wire2375/X wire2376/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24193__C1 _24192_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16670__B1 wire911/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29819__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23065__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26079__C _26102_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2386 VPWR VGND wire2386/X wire2387/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16761_ _16878_/A2 _16878_/A1 _28107_/Q _16761_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28747_ _28747_/Q _32394_/CLK _28747_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13973_ _28524_/Q _13973_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_281_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25959_ _25958_/X _26179_/B1 _31501_/Q _25935_/X _31493_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_1_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3481_A _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1663 VPWR VGND _23813_/C _23861_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22743__B1 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1674 VPWR VGND wire1674/X _18878_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_18500_ VGND VPWR _18626_/B _30414_/Q _18500_/X _30484_/Q _30413_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_245_3235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_4873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_4250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32354__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15712_ VGND VPWR _15716_/S _28434_/Q _29099_/Q _15712_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1685 wire1686/X wire1685/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_186_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19480_ VGND VPWR _25470_/B _31313_/Q _19481_/A _31314_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_227_4381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2704_A wire2705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16692_ _16692_/X _16947_/A2 _16691_/X _28893_/Q _16928_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_28678_ VGND VPWR _28678_/D _32419_/CLK _28678_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_1_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26485__A1 _31703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3840_A wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_864 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18962__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18431_ VGND VPWR _18431_/S _28206_/Q wire3816/X _28206_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_147_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25280__A _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27629_ VGND VPWR _27630_/S _27709_/A1 _32371_/Q _32371_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15643_ _15642_/X wire1118/X _15737_/A2 _29331_/Q _15643_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_12_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23299__A1 _29870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24496__B1 _24543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15776__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_1991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28843__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16973__B2 _29414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23838__A3 _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29969__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24608__B _24805_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30640_ hold322/A _31798_/CLK _30640_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18362_ VGND VPWR _18364_/S _23297_/A1 _28140_/Q _28140_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21849__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15574_ _15573_/X _29159_/D _15544_/X wire1068/X _15553_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_32_4251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20628__S _20638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18175__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_2289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26237__B2 _32297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18714__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17313_ _30935_/Q _17313_/X _30969_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_180_2570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_90 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14525_ _14525_/X _14513_/Y _14524_/Y _14510_/Y _14514_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__21313__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22510__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30571_ _30571_/Q _32431_/CLK hold389/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_5209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18293_ _18293_/B _18293_/Y _18328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__15528__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23231__C _23231_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26788__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30946__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_2614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_4032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17002__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32310_ _32310_/Q _32310_/CLK _32310_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26823__B _26823_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24799__A1 _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14736__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17244_ VGND VPWR _23402_/A _31378_/Q wire3471/X _17244_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_3932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21032__B _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14456_ _14456_/Y _29711_/Q _30435_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_200_2128 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28993__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output574_A _28677_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20809__A0 _27698_/A1 VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__diode_2 X_14387_ _24434_/B _14388_/C _24434_/D _14399_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__27737__A1 _27737_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20285__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16126_ VGND VPWR _16443_/S _28090_/Q _29046_/Q _16126_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_1686 VGND VPWR VGND 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VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19816_ _19815_/X _28560_/Q _28560_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_113_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16256__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26173__B1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18650__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1637_A _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28373__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29499__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_3731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_809 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21194__S _21194_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24184__C1 _24183_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19747_ _26771_/A _19746_/Y _19782_/A _13967_/A wire744/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_241_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16959_ _16959_/A2 wire3283/X _32372_/Q _16959_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_256_168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2581_A _18666_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22734__B1 _22733_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23931__C1 wire1268/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18402__A1 _28177_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17205__A2 _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_3969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_4031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31956_ _31956_/Q _31956_/CLK _31956_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19678_ _26017_/B _19680_/B _14171_/A _19535_/A _19680_/A _19678_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__30476__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15216__A1 wire1085/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27673__A0 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_2342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25279__A2 _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2940_A _20315_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_5079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16413__B1 wire912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3379 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_3046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17756__A3 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18953__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31721__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30907_ _30907_/Q _32321_/CLK _30907_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23703__A _23703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18629_ VGND VPWR _18631_/S wire3910/X _28342_/Q _28342_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_90_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27648__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16964__A1 _28772_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14340__A_N _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31887_ _31887_/Q _31887_/CLK _31887_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31342__D _31342_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15920__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire992_A wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24518__B _31294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21640_ _21640_/X _21640_/C _21640_/A _21640_/B _21640_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_209_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_3081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_2689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_5543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30838_ _30838_/Q _32583_/CLK _30838_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20538__S _20551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27425__A0 _32270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19363__C1 _19362_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19902__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21223__A hold384/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24239__A0 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21571_ _21573_/B _21672_/B _21588_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xor2_4 XANTENNA__16716__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30769_ _30769_/Q _31698_/CLK _30769_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_4299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18008__S _18008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_11 _29199_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_22 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31871__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23310_ VGND VPWR _23317_/S _30288_/Q _17019_/X _30288_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_33 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32508_ _32508_/Q _32531_/CLK _32508_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20522_ VGND VPWR _20528_/S _29039_/Q wire2013/X _29039_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14727__B1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_44 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25987__B1 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24290_ _30940_/D _24284_/D _31592_/Q _24284_/X _31669_/Q _26376_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_50_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16192__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_55 _30871_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24534__A _31216_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_66 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_99 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_77 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23241_ _23268_/S _23241_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18469__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_88 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20453_ _20453_/B _27598_/C _27485_/D _20453_/X _20453_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_274_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32439_ _32439_/Q _32439_/CLK _32439_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19628__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23462__A1 _22141_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27728__A1 _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_99 _18718_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3387_A wire3388/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1145_A wire1152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23795__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20276__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24253__B _31761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19130__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31101__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25739__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23172_ hold262/A _23192_/A2 _23172_/X _30112_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__32227__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20273__S _20284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20384_ VGND VPWR _20384_/S _25037_/B _28908_/Q _28908_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_118_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_3175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1638 VPWR VGND _19776_/B _26781_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_217_4594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26400__A1 _31687_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1649 _26335_/A _26949_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__25203__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15367__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22123_ _22123_/B1 _30094_/Q _22123_/X _22122_/X _22167_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_6_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22017__A2 _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23214__A1 _30206_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17692__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27980_ _27980_/Q _30279_/CLK _27980_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_5_6_0_core_clk_A clkbuf_5_7_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24411__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27564__B _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1312_A _20060_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19969__A1 _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28716__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_1352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23584__S _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26931_ _31955_/Q wire1571/X _31955_/D wire2688/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22054_ _14069_/Y _22054_/X _22065_/B1 _22965_/S _23180_/A _17220_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_9_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_1325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27283__C _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19433__A3 _19429_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21005_ VGND VPWR _21010_/S _29470_/Q _27614_/A1 _29470_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31251__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32377__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29650_ _29650_/Q _30425_/CLK _29650_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3721_A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18641__A1 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17444__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26862_ VGND VPWR wire2672/X _26866_/A1 wire749/A _26862_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_251_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_2122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold183_A hold183/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_196_core_clk _31698_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__30819__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28601_ _28601_/Q _31877_/CLK _28601_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25813_ VGND VPWR _25825_/S _25812_/X _31430_/Q _31430_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25911__B1 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19082__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29581_ _29581_/Q _32571_/CLK _29581_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26793_ _26793_/B wire1272/X _26793_/A _26793_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_224_5233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1681_A _18227_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_125_core_clk _30903_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_263_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28866__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19197__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1779_A _18328_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28532_ _28532_/Q _31436_/CLK _28532_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_2589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24190__A2 _19786_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25744_ _25743_/X _31409_/Q _31409_/D _25745_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_55_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27113__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22956_ VGND VPWR _22969_/S _30468_/Q hold401/A _30133_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14300__A _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15207__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold448_A hold448/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26196__A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16404__B1 _16784_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_3588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_4270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_3949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18944__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21907_ wire726/A wire3145/X _21907_/X _21946_/A _21906_/X _21708_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_129_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28463_ _28463_/Q _32553_/CLK _28463_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25675_ VGND VPWR _25674_/Y _25673_/X _25661_/X _25675_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_202_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_5_25_0_core_clk clkbuf_5_25_1_core_clk/A clkbuf_5_25_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_16_4246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15758__A2 _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22887_ VGND VPWR _22887_/X _22924_/B _29900_/Q _22924_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_90_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30969__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27414_ VGND VPWR _27421_/S _32261_/Q _27266_/X _32261_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_1940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_3651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24626_ _24626_/X _24626_/C _24626_/A _24626_/B _24626_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__22489__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input103_A la_input[37] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21838_ _14408_/A _22074_/A2 _21838_/X _21837_/X _21830_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_202_5586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28394_ _28394_/Q _29550_/CLK _28394_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XPHY_611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27890__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2118_A wire2118/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20448__S _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27416__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14430__A2 _29728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26219__B2 _32288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25690__A2 _25693_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20675__C _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3254_A _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_1465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_5053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27345_ VGND VPWR _27348_/S _32201_/Q _27274_/X _32201_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24557_ _31205_/Q _24560_/C _31207_/Q _31206_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XPHY_1210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21769_ _21769_/Y hold162/A _21769_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_33_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27739__B _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14310_ _18682_/A _30333_/Q _22444_/B _22554_/B VPWR VGND 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NF_sky130_fd_sc_hd__diode_2 X_26089_ _31542_/Q _31543_/Q _31541_/Q _26077_/X _26089_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_188_4402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26942__A2 wire1575/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28396__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20019__A1 _28656_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2000 VPWR VGND wire2002/A _18206_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_62_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15694__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_309_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21216__B1 _22518_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23494__S _23518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2011 VGND VPWR wire2013/A _18179_/Y VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_114_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16891__B1 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17931_ VGND VPWR _17939_/S wire3870/X _27869_/Q _27869_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_171_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29917_ hold407/A _32365_/CLK _29917_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29641__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2033 wire2035/X _22846_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_264_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27578__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21767__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23130__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1310 _20060_/X _24079_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_269_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16238__A3 _16841_/B2 VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__decap_3 XANTENNA__31744__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2172 VPWR VGND _20104_/B _20171_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_112_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29779_ VGND VPWR _29779_/D _29782_/CLK hold160/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_17793_ _17874_/A2 _31723_/Q _17792_/X _17793_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire2183 VPWR VGND _26874_/B wire2184/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_226_319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15997__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14431__A1_N hold249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2194 VPWR VGND wire2194/X wire2195/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_184_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19188__A2 _19172_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23913__C1 _23912_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29791__CLK _29803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31810_ _31810_/Q _32010_/CLK _31810_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19532_ VGND VPWR wire2630/X _19792_/A _19609_/A _19532_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__24181__A2 _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16744_ VGND VPWR _16929_/S _32326_/Q _28934_/Q _16744_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3442 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1482 VPWR VGND wire1482/X wire1482/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13956_ _28541_/Q _13956_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__25722__B wire836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_1955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14210__A _19534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1493 VPWR VGND wire1493/X wire1493/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_140_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_1354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_4774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31741_ _31741_/Q _32579_/CLK _31741_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19463_ _19461_/X _26139_/A _28448_/D _19462_/Y _25540_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XFILLER_147_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16675_ VGND VPWR wire979/X _29542_/Q _29576_/Q _16675_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16946__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13887_ _28610_/Q _13887_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__26777__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_1901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23631__A2_N wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31162__D _31162_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31894__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18414_ VGND VPWR _18423_/S _28189_/Q wire3871/X _28189_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15626_ _15626_/X _15623_/X _16798_/A2 _14642_/S hold364/A VGND VPWR _14539_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_wire4202_A wire4202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29021__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31672_ _31672_/Q _32573_/CLK _31672_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_15_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19394_ VGND VPWR _19407_/S wire2002/X _28410_/Q _28410_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_201_5063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20358__S _20359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output691_A wire3384/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27407__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23141__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30623_ _30623_/Q _31563_/CLK _30624_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18345_ VGND VPWR _18355_/S wire3877/X _28123_/Q _28123_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18699__A1 _18770_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15557_ VGND VPWR _15557_/X _15692_/S _15749_/C1 _15556_/X _15555_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23692__A1 _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22495__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19896__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_2340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14508_ _14508_/Y _29453_/D _30443_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__23669__S _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31124__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27422__A3 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18276_ _18275_/Y _18269_/X wire3175/X _18276_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_30554_ hold288/A _30580_/CLK input47/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22573__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15488_ _15488_/X _15485_/X _15735_/B _15744_/B1 _15487_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__17371__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25433__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2521_A _20717_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_348_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18229__C_N _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17227_ _30404_/Q _16971_/A _17226_/X _17228_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_67_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29171__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput20 VPWR VGND hold2/A hold1/X VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA_max_length2619_A _17881_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14439_ _29385_/Q _14459_/A _29384_/Q wire2030/X _14439_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XANTENNA__15382__B1 wire1064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput31 hold34/A hold33/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_30485_ _30485_/Q _31578_/CLK _30485_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_119_3511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15921__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14724__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1587_A wire1587/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17894__C _24594_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput42 VPWR VGND input42/X irq[3] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_193_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput53 VGND VPWR input53/X la_input[107] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_154_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21189__S _21194_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21455__B1 wire3270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32224_ _32224_/Q _32464_/CLK _32224_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28739__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput64 VPWR VGND la_input[117] input64/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_214_4723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23995__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17158_ _17157_/X _22510_/A2 _30007_/Q _17159_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_239_1434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput75 VPWR VGND input75/X la_input[127] VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_63_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24504__D _24505_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold57_A hk_dat_i[11] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_5536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput86 VGND VPWR input86/X la_input[21] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_217_3156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput97 VPWR VGND la_input[31] input97/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_217_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16109_ _16445_/A1 wire1733/X _16109_/X _16814_/B1 _28749_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_3_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31274__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32155_ _32155_/Q _32225_/CLK _32155_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18871__A1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17674__A2 _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17089_ VGND VPWR _17089_/S _17088_/X _17087_/X _30386_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_214_4778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_1489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26933__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14488__A2 _29698_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20106__B _20106_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire740_A wire740/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21207__B1 _21206_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24801__B _31684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31106_ _31106_/Q _32541_/CLK _31106_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_113_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24944__A1 _31116_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire838_A wire838/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2988_A _18491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32086_ VGND VPWR hold108/X _32086_/CLK _32086_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_272_1060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20821__S _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_4480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27569__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21758__A1 _21769_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22955__A0 _30132_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18498__S _18498_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2796_A _27485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28889__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3290 _15620_/A1 _15607_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19183__A _28295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17426__A2 _31929_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31037_ _31037_/Q _31607_/CLK _31037_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18623__A1 _18623_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_1810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_4581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20430__A1 _28950_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16634__B1 wire903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24157__C1 wire805/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_4104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21218__A _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27604__S _27616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_236_core_clk_A clkbuf_opt_34_1_core_clk/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA__20122__A _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15988__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_1865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_3288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19179__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22810_ _22745_/X _22733_/Y _29722_/Q _22814_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__24172__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26728__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28119__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25632__B _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23790_ _23790_/X _23805_/A _31841_/Q _24069_/A2 _31873_/Q _23805_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_272_458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22183__A1 _29826_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23380__A0 _29676_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26449__A1 _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14660__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18926__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22741_ _22741_/B _22741_/Y _22741_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_94_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31939_ hold406/A _31956_/CLK _31939_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__32168__D _32168_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27110__A2 _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21930__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24248__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_387_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_2475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25460_ _31309_/Q _31310_/Q _25460_/Y _19476_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_wire3302_A wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22672_ VGND VPWR _23342_/A _22671_/X _30089_/Q _30089_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20268__S _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23132__B1 wire2842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28269__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24411_ _24409_/Y _24437_/B _31007_/D _24410_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_159_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21623_ VGND VPWR _21623_/X _21623_/B _21623_/A _21679_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_241_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25391_ _25391_/X _25416_/A _31281_/Q _25266_/Y _31273_/Q _24501_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__22486__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_3914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29514__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14963__A3 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20497__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27130_ VGND VPWR _27130_/S _27129_/X _32040_/Q _27131_/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19351__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_3537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24342_ _32018_/Q _26772_/A _24342_/X _31986_/Q _26376_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23579__S _23596_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21554_ _21556_/A _21554_/A _21554_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_202_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16165__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17362__A1 wire3573/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27278__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_124_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20505_ VGND VPWR _20505_/S _27697_/A1 _29023_/Q _29023_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_68_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27061_ VGND VPWR _32008_/D wire772/A _27060_/X _26779_/B _27075_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_max_length1719_A _23539_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24273_ _24273_/X _24273_/C _24273_/A _24284_/B _24273_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__22238__A2 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21485_ _21485_/X _21484_/A _21476_/B _21381_/Y _21480_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__25079__B _25079_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31617__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15912__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24632__B1 _17895_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23435__B2 _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_4247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19103__A2 _18903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26012_ _26148_/A _26011_/Y _26014_/A2 _31521_/Q _31521_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_8_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_2820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23224_ VGND VPWR _23224_/S _30216_/Q _30146_/Q _30216_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_200_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23986__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20436_ VGND VPWR _20449_/S _28956_/Q _27694_/A1 _28956_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_5568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29664__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19077__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27177__A2 _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_3032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2169 VPWR VGND wire2168/A _19605_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18311__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21997__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_4894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout987_A _15772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21997__B2 _17183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25188__A1 _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15125__B1 wire1064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23155_ _23170_/B _18535_/B _23155_/A _23155_/X _29728_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_232_4867 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_2943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17665__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18862__A1 wire3766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20367_ _20367_/C _31402_/Q _31405_/Q _25752_/C _31401_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XANTENNA_wire3936_A _29723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_275_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25807__B _32547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26924__A2 wire1573/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold398_A hold398/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_377_core_clk _30430_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_252_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22106_ VGND VPWR _23304_/C _30291_/Q _30381_/Q _22106_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15676__B2 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_2577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23738__A2 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30641__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31767__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27963_ _27963_/Q _30449_/CLK _27963_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23086_ _23191_/C1 _23191_/B1 _23190_/B _30430_/Q _23086_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20731__S _20739_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20298_ VGND VPWR _20302_/S wire2012/X _28839_/Q _28839_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19805__B wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_7_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22639__A_N _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21749__A1 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14884__C1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_306_core_clk _30051_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29702_ hold341/A _30454_/CLK _29702_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18614__A1 wire3845/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26914_ _31938_/Q _26936_/A2 _31938_/D wire2319/X _26936_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22037_ _21966_/A _22037_/Y _21586_/A _22035_/Y _22036_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 XFILLER_235_1887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27894_ _27894_/Q _30415_/CLK _27894_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19957__A4 wire2302/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2068_A wire2069/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19524__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15428__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26688__A1 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20421__A1 _28941_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_4080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29633_ _29633_/Q _32322_/CLK _29633_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27514__S _27516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26845_ _26694_/C _26844_/Y wire749/X _31872_/Q _31872_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_22_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20032__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25896__C1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30791__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13810_ _31136_/Q _13810_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20756__B_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24163__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29564_ _29564_/Q _32324_/CLK _29564_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_5626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14790_ _14790_/X _29524_/Q _14789_/X _15597_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19792__D_N _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2235_A _19656_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18378__A0 _28155_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29044__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26776_ _26694_/C _26775_/X wire777/X _31838_/Q _31838_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14030__A _28467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23988_ wire1622/X _23987_/X _31133_/Q _24186_/A3 _23988_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22174__A1 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27637__A0 wire3399/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26021__A1_N _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24439__A _31019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14651__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18917__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28515_ _28515_/Q _32014_/CLK _28515_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23343__A _23355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23910__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13741_ _31620_/Q _26464_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25727_ _25727_/B _25727_/X _31404_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_57_3678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22939_ _22936_/Y _22938_/X _22965_/S _22937_/Y _30116_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20185__B1 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29495_ VGND VPWR _29495_/D _31938_/CLK _29495_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_166_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27101__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16656__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21921__A1 _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17050__A0 _30382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_163_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14939__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16460_ _16959_/A2 wire3285/X _29257_/Q _16460_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30021__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2402_A wire2404/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25969__S wire754/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28446_ hold479/A _32431_/CLK _28446_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31147__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25658_ VGND VPWR _31383_/Q _27395_/B _31384_/Q _25660_/B _31386_/Q hold143/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_259_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15061__C1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18156__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25663__A2 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26860__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15411_ _15404_/Y _15745_/A1 _15744_/B1 _15406_/Y _15411_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_31_3818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24609_ _24609_/B _24609_/X _31531_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_177_4114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29194__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16391_ _16391_/X _28989_/Q _16818_/A2 _16841_/B2 _16841_/C1 _16390_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_259_3713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28377_ _28377_/Q _32437_/CLK _28377_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22477__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23674__A1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19878__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25589_ _25589_/X hold89/A _31223_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_202_4682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_93_core_clk _32422_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_12_3228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20488__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18130_ VGND VPWR _18139_/S wire3881/X _28058_/Q _28058_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19342__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23489__S _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15342_ VGND VPWR _15342_/X _15339_/X _15341_/X _15561_/C1 _15509_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_240_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27328_ VGND VPWR _27330_/S _27276_/X _32186_/Q _32186_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_2458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22393__S _22610_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16156__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17353__A1 _32291_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_22_core_clk _32550_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XPHY_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20906__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27188__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26612__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30171__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14167__A1 hold89/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18061_ VGND VPWR _18085_/S wire3894/X _27991_/Q _27991_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31297__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15273_ _15273_/Y wire1064/X _15735_/B _15263_/X _15272_/X _15259_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_177_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2771_A hold189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27259_ VGND VPWR _27259_/S _32134_/Q _27624_/A1 _32134_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length4083 VPWR VGND wire4082/A _28654_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_197_2160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3611_A wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length4094 VPWR VGND wire4093/A _28650_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XPHY_1095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18172__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15903__A2 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32542__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17012_ VGND VPWR _17089_/S _17002_/X _20987_/C _30377_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_250_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_2357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14224_ _24380_/B _24591_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_49_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23977__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30270_ _30270_/Q _30270_/CLK _30270_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27168__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19647__C_N _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_2341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25179__A1 _31219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14155_ VGND VPWR _14168_/S hold76/X hold125/X _14155_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17656__A2 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26376__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18853__A1 _28184_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21452__A3 _30344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_5507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26915__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_2081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15667__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_3198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16864__B1 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18963_ _28352_/Q _19202_/B _19151_/S _18963_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14086_ hold201/A _14086_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_287_5580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20641__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19715__B _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output537_A _31121_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17914_ VPWR VGND _17914_/X _31797_/Q _31801_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__26128__B1 _31554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18605__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17408__A2 wire2079/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4152_A _28374_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18111__S _18113_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18894_ _18893_/X _23523_/S _18883_/X _19382_/A1 _18894_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_287_4890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_1117 VGND VPWR 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_17693_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xfanout1162 _15515_/A2 _15332_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_40_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1173 VPWR VGND wire1175/A _15435_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14627__C1 _14627_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1184 _15296_/B1 wire1199/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_97_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24154__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5261 VGND VPWR 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X_13939_ _28558_/Q _13939_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_105_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16919__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16566__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21912__A1 _21485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29537__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17041__B1 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17251__A _30960_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_2161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_1773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25879__S _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19446_ _28444_/Q _19446_/Y _28443_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__26300__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31724_ _31724_/Q _31730_/CLK _31724_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_220_5461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16658_ VGND VPWR _16929_/S _28427_/Q _29092_/Q _16658_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25059__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32072__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24457__A3 _24442_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15609_ wire3251/X _16814_/A2 _15609_/X _15609_/B1 _29192_/Q _16814_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_34_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_5_5_1_core_clk clkbuf_5_5_1_core_clk/X clkbuf_5_5_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_31655_ hold468/A _32107_/CLK _31655_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19377_ _30283_/Q _19377_/X _19377_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__22468__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23665__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30514__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16589_ _16956_/A2 wire3283/X _28762_/Q _16589_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18781__S _19333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18328_ _22382_/A _18328_/Y _18328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_30606_ hold164/A _31873_/CLK _30606_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_255_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_2774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28561__CLK _32553_/CLK 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XFILLER_103_3890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21501__A _21501_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19178__A _19178_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18259_ _18295_/B _18259_/X _29342_/Q _18254_/X _29340_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 X_30537_ _30537_/Q _31803_/CLK hold142/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_25_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24614__B1 _24260_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_3570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_5522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23968__A2 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30664__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21270_ VGND VPWR _23536_/S _29732_/Q _30448_/Q _29732_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_67_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_1220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30468_ VGND VPWR _30468_/D _30468_/CLK _30468_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__24090__A1 _28505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20221_ VGND VPWR _20227_/S _28766_/Q _27624_/A1 _28766_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32207_ _32207_/Q _32513_/CLK _32207_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_172_2119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17647__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22640__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3085_A _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14115__A _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30399_ _30399_/Q _30399_/CLK _30399_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_80_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3609 wire3609/A _19573_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_154_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15658__B2 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24917__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_3571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20152_ _26148_/A _20151_/Y _20128_/X _28720_/Q _28720_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_189_3306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32138_ _32138_/Q _32571_/CLK _32138_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23428__A _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20551__S _20551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19625__B _26323_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22332__A _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26382__A3 wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25346__C _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2919 VPWR VGND _20391_/S _20406_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14330__A1 _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24250__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26119__B1 _14396_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13954__A _28543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24393__A2 _14388_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25590__A1 hold111/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24960_ _25041_/A wire1283/X _24960_/X _25025_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_wire3252_A _14544_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32069_ _32069_/Q _32125_/CLK _32069_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_2616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20083_ _26173_/B1 _20082_/Y _20106_/A _28687_/Q _28687_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25590__B2 hold116/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18021__S _18047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29067__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20403__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_4952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_5364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14881__A2 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27334__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23911_ _23911_/X _20673_/D _30685_/Q _30749_/Q _19926_/B VGND VPWR _23910_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_3_4697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25643__A _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23028__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24891_ _24890_/X _26184_/A _24841_/A _24888_/Y _31090_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_110_3850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_2485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16083__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26458__B _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17280__B1 _17280_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24145__A2 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26630_ _26637_/B _31781_/D _26628_/X _26218_/A _31886_/Q _26629_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__19006__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19641__A _19641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23842_ _23843_/A _24467_/A _31858_/Q _31823_/Q _24370_/A2 VGND VPWR _23841_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__30044__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3517_A _31089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22156__A1 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27280__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23353__B1 _22444_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15830__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19557__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25893__A2 _19543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24696__A3 _31470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32415__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_507 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19021__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28091__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26561_ wire817/X _31837_/Q _26560_/Y _26561_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_518 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27216__A_N _25771_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23773_ _31793_/Q _23773_/Y _31794_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_58_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20985_ _29447_/Q _23365_/S _29447_/D _20984_/X _20982_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21364__C1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_529 wire703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_2862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15380__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27095__A1 _26813_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28300_ _28300_/Q _30225_/CLK _28300_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_74_3288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25512_ _25512_/Y _25512_/A _25512_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__19572__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25789__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22724_ wire3133/A _22721_/X _29734_/Q _22729_/B _21428_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_161_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29280_ _29280_/Q _32134_/CLK _29280_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_143_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26492_ _31705_/Q _26492_/D _26492_/Y _31703_/Q _31704_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_0_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_3258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16386__A2 _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15189__A3 _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17583__A1 _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18780__A0 _28244_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold146_A hold146/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28904__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25645__A2 _25642_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26842__A1 _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28231_ _28231_/Q _28363_/CLK _28231_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30194__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25443_ _25430_/A _31302_/Q _24502_/X _24543_/D _25443_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_13_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22655_ _22659_/B _22656_/A _22656_/B _22652_/X _22650_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XANTENNA__15594__B1 _28832_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22459__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23656__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21066__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16791__C1 _15774_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3886_A _29849_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_1582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32565__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31530__D _31530_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19324__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21606_ _21966_/A _21608_/A _21606_/B _21606_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 X_28162_ _28162_/Q _30276_/CLK _28162_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_219_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25374_ _25389_/D _31276_/Q _31278_/Q _31277_/Q _25374_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_107_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16138__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17335__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22586_ _22586_/X _22586_/S wire3703/X wire3692/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_224_1577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20726__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17335__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27113_ _27117_/C1 _27112_/X _27117_/A2 _32034_/Q _32034_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14149__A1 hold94/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24325_ _24324_/X _24357_/B1 wire1672/X _24353_/A1 _30965_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_121_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15346__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_4120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23408__A1 _23347_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21537_ _21537_/Y _21558_/C _21558_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_28093_ _28093_/Q _32302_/CLK _28093_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25948__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_5332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15897__A1 _29555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27044_ VGND VPWR _27050_/D _32001_/Q _26188_/A _27044_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_191_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23959__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19088__A1 _28195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24256_ _24256_/Y _24252_/X _24255_/X _31739_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__27509__S _27513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_4175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21468_ _21653_/C wire3800/A _21653_/B _21653_/D _21472_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22941__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24081__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_5617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17099__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23207_ VGND VPWR _23221_/S _30199_/Q _30129_/Q _30199_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_24_4312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_5628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20419_ _29453_/D _20419_/X _29454_/D _29452_/D _20989_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_2 XANTENNA__26358__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input170_A la_input[98] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18835__A1 _27927_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24187_ wire732/A _25022_/B _28674_/Q _31184_/Q _19994_/X VGND VPWR _24186_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_189_5242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2185_A _19756_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21399_ _21400_/B _21399_/X _21866_/A _21400_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__14025__A _28472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_3706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_4052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24441__B _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20642__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_3728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16846__B1 _28432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15649__B2 wire1519/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24908__A1 wire3513/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14306__D1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23138_ VGND VPWR _23138_/X _23136_/X _23137_/X _23135_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_267_4705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20461__S _20473_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19535__B _19535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16310__A2 _16309_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28995_ _28995_/Q _30507_/CLK _28995_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_4552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_140_core_clk _32067_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22919__B1 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23041__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15960_ wire1533/A wire3276/X _29169_/Q _15960_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_23069_ _30161_/D _23057_/S _23068_/X _30161_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_150_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27946_ _27946_/Q _31914_/CLK _27946_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_2_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput210 ser_rx wire4197/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_249_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19796__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14911_ _16415_/A2 _15607_/A1 _30780_/Q _14911_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_264_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27244__S _27264_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19260__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23019__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17055__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15891_ wire1004/X wire1476/X _29305_/Q _15891_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27877_ _27877_/Q _30424_/CLK _27877_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28434__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16074__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17271__B1 wire2296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24136__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17630_ _31716_/Q _17539_/B _17630_/X _31715_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29616_ _29616_/Q _32416_/CLK _29616_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_148_4271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19551__A _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14842_ _14842_/X _15286_/C1 _14839_/X _14841_/X _15632_/A1 _14837_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_26828_ _23599_/B _26827_/Y _26835_/A _31864_/Q _31864_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25272__B _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2617_A _14243_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22147__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32095__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23344__B1 _30417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14624__A2 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_4078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17561_ VGND VPWR _17551_/Y _17552_/S _17560_/X _17561_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_208_4880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29547_ _29547_/Q _32571_/CLK _29547_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14773_ _14773_/X _32047_/Q _14675_/S _15629_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_53_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26759_ _26758_/Y _27117_/C1 _31832_/Q _26760_/B _31832_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_243_4771 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23895__A1 _31124_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22698__A2 _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_4119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30537__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19300_ _28368_/Q _19306_/B _19047_/S _19300_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17023__B1 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16512_ VGND VPWR _16826_/S _28423_/Q _29088_/Q _16512_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_3789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20847__D _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17492_ _17452_/X _26464_/C _31613_/Q _26446_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__21305__B _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29478_ _29478_/Q _32436_/CLK _29478_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28584__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16377__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17502__C _26456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17574__A1 _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25097__B1 _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18771__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19231_ _19231_/X _19228_/X _19156_/S _19230_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_224_3480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16443_ VGND VPWR _16443_/S _32318_/Q _28926_/Q _16443_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_4233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_1660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28429_ _28429_/Q _30503_/CLK _28429_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_2356 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_2195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26815__C _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20177__C_N _19768_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23647__A1 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16782__C1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31440_ _31440_/Q _32388_/CLK _31440_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19162_ _28134_/Q _19162_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_31_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30687__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16374_ _16369_/X wire894/A _16839_/A1 _16373_/X _16374_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_196_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18523__A0 _28295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17326__A1 wire3579/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16129__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20636__S _20646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26815__D_N _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22417__A _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19688__D_N _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output487_A _28649_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19866__A3 _19535_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31932__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18113_ VGND VPWR _18113_/S wire3830/X _28042_/Q _28042_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21321__A _30342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15325_ _16781_/A2 _15747_/A1 _29259_/Q _15325_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20330__A0 _28870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15337__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31371_ _31371_/Q _31375_/CLK _31371_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19093_ wire1814/X _19091_/X _19093_/X _19380_/B1 _19092_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_201_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17877__A2 _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18106__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_86_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4575 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19429__C _28439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26061__A2 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_299_core_clk _30484_/CLK clkbuf_5_21_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_237_3841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26831__B _26896_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_3287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30322_ _30322_/Q _31923_/CLK _30322_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29845__D _29845_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20881__A1 _20880_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18044_ VGND VPWR _18044_/S wire3837/X _27976_/Q _27976_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27419__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15256_ VGND VPWR _15756_/S _28791_/Q _28823_/Q _15256_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24072__A1 _28663_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output654_A _14166_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3190 VPWR VGND _17332_/B1 wire3191/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_leaf_228_core_clk _31552_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_215_4851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14207_ _19539_/B _14207_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XFILLER_177_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17945__S _17946_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22083__B1 _22076_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14560__A1 _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_116_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17629__A2 _17807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26349__B1 _26348_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30253_ _30253_/Q _30395_/CLK _30253_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15187_ _15723_/A2 _15187_/X _15186_/X _15718_/B1 _32058_/Q _15561_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_253_2430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18826__B2 wire1949/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25447__B hold178/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27010__A1 _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_2002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20633__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14138_ _14138_/Y _20673_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XFILLER_25_2707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_2704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30184_ _30184_/Q _30391_/CLK _30184_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_5550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_3509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_1339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_2024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19995_ VGND VPWR wire853/A _19995_/B _25022_/A _25022_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__26364__A3 _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24375__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18946_ _18938_/X _18945_/X _19310_/B1 _18940_/X _18946_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_14069_ _14069_/Y _14069_/A VPWR VGND VGND VPWR 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XANTENNA__22257__A1_N _30048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_36 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17262__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24127__A2 wire1807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17828_ _17539_/C _17827_/X _31734_/D _17524_/B _17824_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__26521__B1 _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_3970 VGND VPWR VGND VPWR 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XFILLER_162_2866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27951__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16773__C1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19400__S _19403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_5622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22440_ _29984_/Q _26946_/A _29985_/Q _22440_/X _29983_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_104_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 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VPWR VGND wire4107/X wire4107/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold420 hold420/A hold420/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21416__A3 _21419_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4118 VPWR VGND wire4118/X _28566_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold431 hold431/A hold431/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_3794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4129 VPWR VGND wire4129/X _28552_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_145_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold442 hold442/A hold442/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout1225_A fanout1225/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20085__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20624__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold453 hold453/A hold453/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16979__B _16979_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16828__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20204_ VGND VPWR _20223_/S _28749_/Q _27687_/A1 _28749_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3406 _25692_/A wire3406/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__21821__B1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold464 hold464/A hold464/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_5185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_5426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20281__S _20284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21184_ VGND VPWR _21184_/S _29626_/Q _27689_/A1 _29626_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19355__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold475 hold475/A hold475/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire3428 VPWR VGND wire3428/X wire3429/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_47_2987 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold486 hold486/A hold486/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__14839__C1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28457__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout900 VPWR VGND wire904/A _15790_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_217_2082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3439 VPWR VGND wire3439/X wire3440/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_2946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold497 hold497/A hold497/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_27800_ VGND VPWR _27801_/S _25035_/B _32523_/Q _32523_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_150_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2705 VPWR VGND wire2705/X wire2706/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_41_3232 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20135_ _20135_/X _28712_/Q _25076_/C1 _20162_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23169__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24366__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25563__A1 _31362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout922 VPWR VGND wire923/A wire926/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29702__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3634_A _30729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28780_ _28780_/Q _32049_/CLK _28780_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21466__A1_N _21465_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25992_ _26694_/C _25991_/Y _26015_/A _31511_/Q _31511_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2727 VPWR VGND wire2727/X _14155_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_277_358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22377__A1 _30477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27120__D_N _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14854__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout955 _16736_/S _16930_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23592__S _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27731_ VGND VPWR _27737_/S _19721_/A _32462_/Q _32462_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25373__A _31278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout966 wire970/A _16837_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19242__A1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24943_ VGND VPWR _19618_/B _19617_/A _24955_/A _24943_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_20066_ VGND VPWR _19534_/B _19573_/A _20073_/A2 _20066_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xfanout977 VPWR VGND wire979/A wire981/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_189_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1594_A _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25315__A1 _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31805__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27662_ VGND VPWR _27667_/S _25029_/B _32400_/Q _32400_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_41_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24874_ _24874_/C _24874_/Y _26559_/A _31079_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__23326__A0 _17152_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25866__A2 _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29401_ _29401_/Q _31912_/CLK _29401_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_93_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26613_ _26613_/X _31850_/Q wire3452/X _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__29852__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21406__A _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23825_ _30836_/D _23861_/C _23825_/A _23825_/B _23849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__19090__B _19090_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_304 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17603__B _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27593_ _25643_/C _32164_/Q _27594_/A _25643_/B _32156_/Q _32172_/Q _32148_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__23877__A1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_315 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1761_A _23865_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_326 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_91 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1859_A _14404_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19545__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29332_ _29332_/Q _32442_/CLK _29332_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_337 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26544_ VGND VPWR _31755_/D _26543_/B _26543_/Y _24841_/A _26544_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_54_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_348 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23756_ VPWR VGND _23761_/C _31779_/Q _26607_/A _23756_/C _26607_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_19_3779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20968_ VGND VPWR _20979_/S _30174_/Q _29433_/Q _29433_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_183_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_359 wire770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15016__C1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23043__D _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18753__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24717__A _31564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25618__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2080 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31955__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_4152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22707_ _22709_/B _22705_/X _22686_/A _22706_/X _22686_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 X_29263_ _29263_/Q _32133_/CLK _29263_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20560__A0 _29076_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26756__A_N _31793_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26475_ _26475_/X _26474_/Y _17481_/Y _26473_/X _26467_/X _26468_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_126_2463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23687_ _30805_/D _23807_/B _23687_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__16764__C1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20899_ VGND VPWR _23477_/S _20898_/X _29378_/Q _29378_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_161_3099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15031__A2 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26291__A2 _14182_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28214_ _28214_/Q _30475_/CLK _28214_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2100_A wire2101/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25426_ _25430_/A _31295_/Q _25425_/A _24493_/X _25426_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_22638_ _22663_/B _22747_/B _30452_/Q _22642_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_204_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29194_ _29194_/Q _32071_/CLK _29194_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18505__A0 _28277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20456__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22301__A1 _29887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18434__B _18434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28145_ _28145_/Q _32439_/CLK _28145_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13859__A _28638_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25357_ _25357_/X _25380_/C _31274_/Q _25414_/B1 wire3489/X _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__17859__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22569_ VGND VPWR _22598_/S hold163/A _22568_/X _30063_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_3574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22852__A2 _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3142_A _21717_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_392_core_clk _30431_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_237_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26043__A2 _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15110_ _15109_/X _15740_/B1 _15752_/A2 _28851_/Q _15110_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_100_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18153__C _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24308_ VGND VPWR _30958_/D _24308_/B _31610_/Q _24308_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_215_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29232__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length943 fanout941/X _16856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_13_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16090_ VGND VPWR _16090_/X _16826_/S _16825_/S _30493_/Q _16089_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27239__S _27255_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28076_ _28076_/Q _30051_/CLK _28076_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24054__A1 _24046_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25288_ _25289_/B _31260_/Q _31261_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_input79_A la_input[15] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25251__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16531__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_321_core_clk _30457_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_139_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_5073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15041_ _15575_/A _15575_/C _32425_/Q _15041_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27027_ _27035_/D _31992_/Q _31994_/Q _31993_/Q _27027_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__22065__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18808__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24239_ VGND VPWR _24239_/S _30915_/Q _27707_/A1 _30915_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19546__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3801 VGND VPWR wire3803/A _29910_/Q VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 Xmax_length998 VPWR VGND _16091_/A wire999/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_156_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25267__B _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_3845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3407_A _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20615__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31335__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1073 VPWR VGND _15536_/B1 wire1074/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_core.RAM256_Di0[24] wire2717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17087__A3 _17085_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26346__A3 wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15098__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15285__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18800_ _18800_/X _19151_/S _27989_/Q _19203_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XANTENNA__29382__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20091__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17492__B1 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24357__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19218__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19780_ _19780_/Y _19780_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_wire2734_A _14151_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26751__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16992_ _17077_/A _16992_/X _17027_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 X_28978_ _28978_/Q _32352_/CLK _28978_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_81_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3962 VPWR VGND wire3962/X _22405_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_1_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3973 VPWR VGND wire3973/X _29649_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_150_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14845__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19769__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18731_ VGND VPWR _18731_/X _19335_/B _19278_/S _28341_/Q _18730_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xwire3984 VPWR VGND _18434_/B _29490_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19233__A1 _28396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3968_A _23209_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15943_ _15943_/X _29041_/Q _16150_/A2 _16150_/A3 _16249_/S _15942_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27929_ _27929_/Q _28402_/CLK _27929_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3995 VPWR VGND wire3995/X _29362_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_231_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18596__S _18617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16047__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17244__A0 wire3471/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31485__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21040__A1 hold374/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24109__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_2792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25306__A1 _31363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18662_ _23533_/S _21030_/S _18661_/B _18662_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_248_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26503__B1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30940_ _30940_/Q _32038_/CLK _30940_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25306__B2 _31264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_4855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15874_ _15874_/X _29039_/Q _16150_/A2 _16150_/A3 wire933/X _15873_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23317__A0 _17079_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19712__C _19716_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17795__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17795__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23007__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17613_ VGND VPWR _17842_/S _17600_/Y _17612_/Y _17613_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_163_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27702__S _27709_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14825_ _14825_/B _29139_/D _14825_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_57_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30871_ _30871_/Q _32115_/CLK _30871_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18593_ VGND VPWR _30413_/Q _30484_/Q _18401_/C _18593_/X _30414_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA__23868__A1 _31899_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_3212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27974__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23868__B2 _31867_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19536__A2 _19535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17544_ VGND VPWR _26470_/B _31625_/Q _17543_/X _17544_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_109_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21035__B _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14756_ _14755_/X _15233_/B1 _15597_/A2 _29460_/Q _14756_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_18_3256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4115_A _28569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21343__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22540__A1 _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18744__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25609__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_860 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_871 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32541_ _32541_/Q _32541_/CLK _32541_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length2267_A _19196_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20551__A0 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15558__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1296 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17475_ _31051_/Q _26245_/C _17475_/C _31052_/Q _17475_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA_882 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_14_0_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14687_ _16798_/A2 _15607_/A1 _28976_/Q _14687_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_105_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_893 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19214_ _19214_/X _19216_/D1 _28009_/Q _19368_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_203_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_3141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16426_ _16425_/X _16722_/C1 _16841_/A2 _28958_/Q _16426_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_70_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32472_ _32472_/Q _32499_/CLK _32472_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23096__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24293__A1 _31672_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24293__B2 _31595_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19839__A3 _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_2626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24832__A3 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31423_ _31423_/Q _32233_/CLK _31423_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13769__A _31177_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19145_ _19145_/X _19142_/Y _19145_/B1 _22090_/B1 _19144_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xmax_cap2441 VPWR VGND _27597_/B2 _25637_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16357_ _16387_/A _16387_/C _28852_/Q _16357_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_199_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32110__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_1_0_core_clk clkbuf_opt_1_1_core_clk/A clkbuf_5_1_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_274_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15308_ _15308_/X wire1202/A _15301_/X _15303_/X _15307_/X wire1081/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17314__A4 _17313_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27149__S _27149_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19076_ _19075_/X _19047_/S _19358_/A2 _28194_/Q _19076_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_220_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31354_ _31354_/Q _32554_/CLK _31354_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24045__A1 _28565_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16288_ _16288_/X _29114_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16287_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__22581__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16522__A2 _16519_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_5544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30305_ _30305_/Q _30395_/CLK _30305_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18027_ VGND VPWR _18048_/S wire3892/X _27959_/Q _27959_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_9_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22056__B1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15239_ _15239_/X _29536_/Q _15238_/X _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25793__A1 _31428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_47 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput503 wire4056/X la_output[115] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19456__A _19456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29725__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31285_ _31285_/Q _31998_/CLK _31285_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_275_1250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput514 wire4027/X la_output[125] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26990__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput525 _31092_/Q la_output[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20067__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20606__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput536 _31093_/Q la_output[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21197__S _21199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21803__B1 _21705_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput547 _31094_/Q la_output[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30236_ _30236_/Q _30398_/CLK _30236_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_2823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_3568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32260__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19472__A1 _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput558 wire3514/X la_output[4] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19175__B _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3800 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_3298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput569 _31096_/Q la_output[5] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_253_2271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15089__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15195__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20082__A2 _19566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16286__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30702__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24348__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30167_ _30167_/Q _30367_/CLK _30167_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31828__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19978_ _19977_/X _28637_/Q _28637_/D _19988_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__25503__A_N _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14297__B1 _29506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22359__A1 _30468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20114__B _20114_/B VGND VPWR VPWR VGND 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XANTENNA__27470__A1 _32293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26260_ _26184_/A _26259_/X _26263_/A hold481/X _31618_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_260_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23160__B _23170_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23472_ VGND VPWR _23514_/S _23471_/X _31940_/Q _30422_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29255__CLK _30783_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23087__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20276__S _20291_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20684_ _20684_/X _24454_/A _31061_/Q _31023_/Q _24370_/A2 VGND VPWR _20683_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__16761__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25211_ hold79/A _25261_/C1 _31043_/Q _25416_/C _25211_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__24823__A3 _26435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21098__A1 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22423_ _22423_/Y _29977_/Q _22598_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26191_ _31584_/Q _26227_/A2 _26192_/B _32274_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_178_2125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3948 VPWR VGND _14360_/B _23095_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_179_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_2254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20845__A1 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30232__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25142_ _25142_/B _24559_/Y _31206_/Q _25144_/A _31205_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__23587__S _23595_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_2772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22354_ _22384_/B _22354_/Y _22354_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_175_3758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24036__A1 _28500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17710__A1 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25233__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24036__B2 _28692_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold109_A hold109/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26576__A3 wire1275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17710__B2 _17709_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21305_ _21665_/B _21674_/B _21305_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_237_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_1058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29950_ _29950_/Q _32293_/CLK _29950_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25073_ _25079_/A wire1296/X _25073_/X _25073_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_62_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15721__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22285_ _22285_/X _23348_/B _30285_/Q _23348_/C _29343_/Q _29344_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_271_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25087__B _25087_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26981__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3849_A wire3850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1607_A wire1614/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19999__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28901_ _28901_/Q _32225_/CLK _28901_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24024_ _28467_/Q _24139_/A2 _24024_/X _28595_/Q _24046_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_21236_ VGND VPWR _23342_/A _29715_/Q _29698_/Q _29698_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_47_3496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold250 hold250/A hold250/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_29881_ _29881_/Q _31961_/CLK _29881_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xhold261 hold261/A hold261/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__22062__A3 hold395/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold272 hold272/A hold272/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__30382__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16277__A1 wire1547/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_4326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold283 hold283/A hold283/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21270__A1 _29732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20073__A2 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16277__B2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25536__A1 _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24339__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold294 hold294/A hold294/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_28832_ _28832_/Q _32136_/CLK _28832_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_1209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3247 VPWR VGND wire3247/X _14102_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21167_ VGND VPWR _21167_/S _29610_/Q _27705_/A1 _29610_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_284_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26733__B1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2513 VPWR VGND wire2513/X _20723_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14288__B1 _30324_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3258 VPWR VGND wire3258/X wire3258/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14303__A _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23547__A0 _30038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2524 VPWR VGND _20545_/S _20548_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout730 _26243_/B1 _26235_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1728 VPWR VGND _14539_/B _23395_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15485__C1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14827__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1739 _15010_/A2 _16646_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_20118_ VGND VPWR wire2733/X _19522_/A _20124_/A _20118_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_268_4888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1801 VPWR VGND _29847_/D hold79/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_24_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2546 VPWR VGND _20452_/S _20447_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28763_ _28763_/Q _32064_/CLK _28763_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1812 VPWR VGND _19788_/C wire1812/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24211__S _24220_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25975_ _31504_/Q _31503_/Q _25975_/X _24781_/Y _26153_/A _25973_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_21098_ VGND VPWR _21098_/S _27265_/A0 _29549_/Q _29549_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_115_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22520__A _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27997__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16929__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16029__A1 _15770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout774 _26833_/A _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_fanout1976_A _18679_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27289__A1 _32153_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout785 VPWR VGND _26014_/A2 _26015_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17226__B1 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27714_ VGND VPWR _27719_/S wire2242/X _32447_/Q _32447_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout796 VPWR VGND _24950_/A2 _24892_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2050_A wire2050/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24926_ _25652_/A _24925_/Y _24941_/A _31107_/Q _31107_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20049_ _25703_/A _20048_/Y wire847/X _28671_/Q _28671_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_262_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input133_A la_input[64] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28694_ _28694_/Q _31871_/CLK _28694_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_287_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2148_A _26323_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_5188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22770__A1 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1878 _23876_/B _20654_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__25839__A2 _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20678__C _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1889 VPWR VGND _20858_/S _20876_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27645_ VGND VPWR _27647_/S _27664_/B _32386_/Q _32386_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_54_4135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15788__B1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24857_ _26498_/A _24856_/Y _31073_/Q _24855_/Y _31073_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_240_5442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20040__A wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_101 _18820_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_112 _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15252__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_4119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14610_ VGND VPWR _14610_/X _14675_/S _14610_/B1 _14607_/X _14609_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_123 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23808_ _23808_/X _23808_/A3 _24139_/A2 _31879_/Q _31847_/Q wire1605/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_261_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_134 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15590_ _16791_/A2 _15590_/A1 _29064_/Q _15590_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27576_ _27576_/X _31382_/Q _25682_/B _27570_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_19_3565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24788_ _26164_/B _24644_/A _24788_/Y _24787_/Y _31048_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XANTENNA_145 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14460__B1 _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22522__A1 _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24447__A _24447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18726__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_156 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29315_ _29315_/Q _30783_/CLK _29315_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_167 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14541_ hold364/A _14539_/X _14541_/Y _16798_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_19_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20533__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26527_ VGND VPWR _26533_/D _31749_/Q _26537_/A _26527_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_178 _23947_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3549_A _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23739_ _23739_/X _26694_/A wire3454/A _31835_/Q _19715_/C VGND VPWR _23738_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__32086__D hold108/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_189 _27931_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16664__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16737__C1 _16784_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16201__A1 _30782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_2484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26264__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3357_A _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27461__A1 _32287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_5396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29246_ _29246_/Q _31970_/CLK _29246_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17260_ _29199_/Q _17260_/D _17260_/Y _30805_/Q _30822_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XANTENNA__23070__B _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14472_ _30436_/Q _14472_/X _27485_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_26458_ _31701_/Q _31615_/Q _26459_/C _26470_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__24275__A1 _31686_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24275__B2 _31661_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_4072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16211_ _16211_/X _28816_/Q _16966_/A2 wire1470/X wire958/X _16210_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__21089__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25409_ _25409_/X _25187_/X _31285_/Q _25407_/X _31277_/Q _25578_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__22286__B1 _23304_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17191_ wire3216/X _21659_/A _17191_/X _17220_/C _17190_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__28622__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29177_ _29177_/Q _32136_/CLK _29177_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2684_A wire2685/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15960__B1 _29169_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29748__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26389_ VGND VPWR wire2630/X _14398_/B _26386_/X _26389_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_259_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3524_A _31047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27213__A1 _32099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26016__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23497__S _23497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16142_ VGND VPWR _16142_/X _16139_/X _16141_/X _15975_/S wire1035/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28128_ _28128_/Q _30758_/CLK _28128_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25278__A _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24027__A1 _28499_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32283__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16504__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24027__B2 _28691_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17701__A1 _31722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17701__B2 _31721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22038__A0 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25709__C _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16073_ VGND VPWR _16073_/X _16491_/S _16816_/B1 _16070_/X _16072_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__30725__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28059_ _28059_/Q _30272_/CLK _28059_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20049__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15024_ VGND VPWR _15639_/S _29017_/Q _28985_/Q _15024_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_19901_ _19900_/X _28600_/Q _28600_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_269_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28772__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24983__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31070_ _31070_/Q _31548_/CLK _31070_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29898__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19454__A1 _28445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17508__B _17508_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16268__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_1456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_3287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20064__A2 _14213_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30021_ VGND VPWR _30021_/D _32277_/CLK _30021_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__21261__A1 _29723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22133__C _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25527__A1 _31343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19832_ _19831_/X _28568_/Q _28568_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_250_3189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2941 VPWR VGND _20323_/S _20295_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3686 VPWR VGND _22448_/A _30369_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14213__A _14213_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23538__A0 _23538_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21610__C_N _21613_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30875__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3770 VPWR VGND wire3770/X wire3770/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19206__A1 _27976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19763_ _26771_/A _19762_/X _19782_/A _28538_/Q _28538_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28002__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16975_ _17094_/A _16975_/X _14360_/B _14316_/Y _14313_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_98_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29128__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output617_A _23618_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2996 VPWR VGND _18443_/S _18434_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_3376 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17217__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15491__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19757__A2 _19715_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18714_ _18714_/X _19346_/D1 _27857_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__22210__B1 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15926_ VGND VPWR wire969/X _29306_/Q _28744_/Q _15926_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_237_542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_3003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31972_ _31972_/Q _32067_/CLK _31972_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19694_ _25982_/A _27053_/A _19694_/Y _26884_/B _20061_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_283_158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput7 VPWR VGND input7/X input7/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_94_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1248_A wire1249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18965__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17768__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26837__A _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27432__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30923_ _30923_/Q _32275_/CLK _30923_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_285_1839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18645_ VGND VPWR _18646_/S wire3848/X _28358_/Q _28358_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15779__B1 _29552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30105__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15857_ _15838_/X _29654_/D _15847_/X wire898/X _15856_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_0_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15243__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14808_ _14817_/A2 _14808_/X _14807_/X _14823_/A1 _28779_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__28152__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18576_ _18576_/X _20912_/B _18575_/X _30432_/Q _18541_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__29278__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30854_ _30854_/Q _32300_/CLK _30854_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_146_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15788_ _15781_/X wire917/X _15787_/X wire1043/X _15788_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22576__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_2248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18717__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15794__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23710__B1 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17527_ _17596_/C _17863_/A _17863_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__20524__A0 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2649_A _14197_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14739_ wire3249/X wire1750/X _14739_/X _15296_/B1 _28745_/Q wire1705/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_92_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16728__C1 wire912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30785_ _30785_/Q _31586_/CLK _30785_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_33_2806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_2923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19390__A0 _28406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_690 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27452__A1 _32284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32524_ _32524_/Q _32531_/CLK _32524_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30255__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17458_ _26245_/C _31683_/Q _31619_/Q _17457_/X _17563_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_11_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23069__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24266__A1 _31683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_2276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold87_A hk_dat_i[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17940__A1 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16743__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25463__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24266__B2 _31658_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15546__A3 _15546_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31500__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15400__C1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_243_core_clk _32293_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_66_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16409_ _16721_/A2 wire3281/X _32357_/Q _16409_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_157_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22277__B1 _29840_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15951__A0 _28809_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32455_ _32455_/Q _32498_/CLK _32455_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14754__B2 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19678__D1 _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17389_ _27006_/A _17389_/B _17389_/C _17389_/A _17389_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_31_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26007__A2 _19573_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31406_ _31406_/Q _32548_/CLK _31406_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19128_ _19127_/X _18983_/S wire1997/X _28197_/Q _19128_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24018__A1 _13967_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire868_A wire868/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32386_ _32386_/Q _32547_/CLK _32386_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19693__A1 _28507_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17299__A3 wire3097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24018__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23200__S _23201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22029__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_5010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1951_A wire1951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19059_ wire1984/X _28289_/Q _19176_/B1 _19059_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31337_ _31337_/Q _32127_/CLK _31337_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15703__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput300 _13964_/Y la_iena[48] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31650__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput311 _13954_/Y la_iena[58] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_66_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput322 _14008_/Y la_iena[68] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_213_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22070_ _21611_/A _22069_/X _21611_/C wire2848/X _22070_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_170_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput333 _13998_/Y la_iena[78] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27607__S _27616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2902 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31268_ VGND VPWR _31268_/D _32571_/CLK _31268_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xoutput344 _13988_/Y la_iena[88] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17418__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput355 _14042_/Y la_iena[98] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24820__A _24820_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27834__C _27834_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_5144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput366 _13937_/Y la_oenb[107] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21021_ VGND VPWR _21021_/S _29486_/Q _27265_/A0 _29486_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20055__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21252__A1 _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25518__A1 _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30219_ _30219_/Q _30219_/CLK hold436/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput377 _13927_/Y la_oenb[117] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19996__A2 _19522_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_5516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26715__B1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_5166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput388 _13917_/Y la_oenb[127] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_0_5121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25635__B _31392_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14123__A _14123_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31199_ _31199_/Q _32107_/CLK _31199_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_42_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput399 _13802_/Y la_oenb[21] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__23529__A0 hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_26_1_core_clk clkbuf_opt_26_2_core_clk/A clkbuf_opt_26_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_fanout4005_A _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32006__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26191__A1 _31584_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26191__B2 _32274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22340__A _22340_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25354__C _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1716 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_5573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31075__D _31075_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17208__B1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15482__A2 _15709_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13962__A _28535_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22201__B1 _30040_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25760_ _27194_/C _25760_/Y _32088_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__23155__B _23170_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22972_ VGND VPWR _31439_/Q _31441_/Q _31440_/Q _22972_/X _31438_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XFILLER_263_4741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_4861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17759__A1 _31724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14690__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18956__B1 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18249__B _18249_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22752__B2 _22741_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24711_ _31456_/Q _24700_/Y _24711_/Y _24704_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27342__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25651__A _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21923_ hold354/A _22074_/B1 _29793_/D _21922_/X _21921_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20763__A0 _29277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25691_ VGND VPWR _25692_/C _25691_/B _25693_/B _25693_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_266_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31030__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_15_0_core_clk clkbuf_5_15_1_core_clk/A clkbuf_4_7_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__32156__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27691__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26494__A2 _26476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27430_ VGND VPWR _27484_/S _32273_/Q _27429_/X _32273_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24642_ _26245_/C _31680_/Q _24640_/Y _24642_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_19_2116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21854_ VGND VPWR _21854_/B _21854_/Y _21854_/A VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_107_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22504__A1 _22512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16982__A2 _16979_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16992__B _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25801__D _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_30_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20805_ VGND VPWR _20805_/S _29318_/Q _27614_/A1 _29318_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27361_ VGND VPWR _27366_/S _32215_/Q _27270_/X _32215_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_73_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14993__A1 _29016_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24573_ _24572_/X _24574_/C _24508_/X _25416_/B _24506_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__28645__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21785_ _21099_/C _21785_/X wire3206/A _22954_/S _23145_/A _17034_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XPHY_826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18184__A1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout815_A _26662_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23602__C _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19517__A_N _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29100_ _29100_/Q _32557_/CLK _29100_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_4220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19381__B1 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26246__A2 _26245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27443__A1 _32278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26312_ _26311_/Y _26893_/C1 _31644_/Q _26327_/B _31644_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_14_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16195__A0 _32120_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19920__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23524_ VGND VPWR _23524_/S _23523_/X _31966_/Q _30448_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18723__A3 _18717_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20736_ VGND VPWR _20747_/S _21153_/A0 _29251_/Q _29251_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27292_ VGND VPWR _27292_/S _32156_/Q _27280_/X _32156_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31180__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24257__A1 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17931__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15537__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29031_ _29031_/Q _32437_/CLK _29031_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_194_4846 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26243_ _31610_/Q _24820_/B _26244_/B _32300_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22268__B1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14745__A1 _32305_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23455_ _29839_/Q _23455_/X _14100_/Y _29377_/Q _23448_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__30748__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20667_ VGND VPWR _13745_/Y _25648_/A wire1282/A _20667_/X wire1317/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_257_3833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19133__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_1918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20818__A1 _29331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22406_ VGND VPWR _22616_/S _29962_/Q wire727/X _29962_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28795__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24009__A1 wire3644/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25098__A _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_2791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26174_ _31575_/D _31575_/Q _26173_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_49_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3767 VPWR VGND _19368_/A1 wire3766/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23386_ VGND VPWR _23559_/S _30364_/Q _29682_/Q _30364_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20734__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20598_ VGND VPWR _20598_/S wire1826/X _29113_/Q _29113_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16498__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25125_ _31200_/Q _31199_/Q _31198_/Q _25122_/D _31201_/Q _25127_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_66_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25757__A1 _32084_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22337_ _29918_/D wire3160/X _21320_/A hold365/A _22338_/B VGND VPWR _22336_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_256_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_1830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2098_A wire2099/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22234__B _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29943__D _29943_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30898__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25056_ _25681_/B1 _25055_/X _25082_/A2 _31171_/Q _31171_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_156_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15170__A1 wire3298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29933_ hold234/A _31914_/CLK _29933_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27517__S _27517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19436__A1 wire2952/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22268_ _22265_/X _22092_/B _22243_/A _22243_/C _22268_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_5_5065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23232__A2 _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28025__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23049__C _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24730__A _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1716 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20046__A2 _19618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24007_ _30603_/Q wire1656/A _24007_/X _30539_/Q wire1609/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_234_1727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17447__B1 hold34/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25509__A1 _31334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21219_ VGND VPWR _23057_/S _29686_/Q _22553_/C _23350_/C VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19987__A2 _24951_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29864_ VGND VPWR _29864_/D _32277_/CLK _29864_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_250_1006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14033__A _28464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22199_ VGND VPWR _22213_/D _29829_/Q _22135_/A _22199_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire3044 VPWR VGND _18123_/S _18151_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1503 VPWR VGND _14930_/B2 wire1506/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xclkbuf_leaf_47_core_clk _32551_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_95_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17998__A1 wire3875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2310 VPWR VGND _26694_/D _19789_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_2_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1514 _15265_/B2 wire1515/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__21794__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2321 _14213_/Y wire2321/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3066 VPWR VGND _18044_/S _18048_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28815_ _28815_/Q _32424_/CLK _28815_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2332 VPWR VGND wire2332/X wire2333/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1536 wire1539/A _16791_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire3077 VPWR VGND _17991_/S _18017_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_112_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19543__B _19543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30128__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2343 VPWR VGND wire2343/X _14201_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17462__A3 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29795_ hold281/A _30468_/CLK _29795_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_43_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3099 VPWR VGND wire3099/X _17283_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2354 _14192_/Y wire2354/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1558 wire1565/A _15771_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20689__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2365 wire2366/X wire2365/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16670__A1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1569 VGND VPWR wire1571/A wire1573/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__19739__A2 _19715_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_5635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_3640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2376 VPWR VGND wire2376/X _14180_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25390__C1 _25381_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28746_ _28746_/Q _31479_/CLK _28746_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16760_ VGND VPWR _16760_/X _16757_/X _16759_/X _16884_/S _16940_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23065__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13972_ _28525_/Q _13972_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25958_ _31524_/Q _31493_/Q _31555_/Q _25934_/C _25958_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire2387 wire2388/X wire2387/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26079__D _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1653 _25982_/A _19700_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xwire2398 _20657_/D wire2398/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_265_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14681__B1 _30774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22743__A1 _22741_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1664 VPWR VGND _23861_/C _26837_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_281_629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29420__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18159__B _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23940__B1 _23939_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22743__B2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27252__S _27265_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15711_ VGND VPWR _15710_/Y _15708_/Y _15762_/A1 _15711_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_19_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1675 VPWR VGND wire1675/X wire1676/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24909_ VGND VPWR _19559_/B _19628_/A _24950_/A2 _24909_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_58_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1686 wire1687/X wire1686/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_267_1536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16691_ _14104_/A _16691_/X _28861_/Q wire1449/X _16781_/A2 wire992/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_262_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28677_ _28677_/Q _31796_/CLK _28677_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_73_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25889_ _25889_/X _25911_/B1 _31462_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__16422__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_4978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27682__A1 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18430_ VGND VPWR _18431_/S _28205_/Q wire3820/X _28205_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26485__A2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15642_ _15751_/A1 _16874_/A2 _15642_/X _15646_/B1 _28769_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_164_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30278__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27628_ VGND VPWR _27630_/S _27708_/A1 _32370_/Q _32370_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_76_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24496__A1 _31224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_5234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16973__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31523__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_2129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18361_ VGND VPWR _18365_/S wire3828/X _28139_/Q _28139_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_2811 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15573_ VGND VPWR _15557_/X _15572_/X _15571_/Y _15573_/X _15562_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_27559_ VGND VPWR _27559_/X _25643_/C _32217_/Q _32209_/Q _25643_/B _32225_/Q _32233_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_258_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_1736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18175__A1 wire3879/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18175__B2 wire3852/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27434__A1 _32275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26237__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17312_ VGND VPWR _17316_/A _17312_/A2 wire2029/X _17441_/B2 _17311_/X VGND VPWR + NF_sky130_fd_sc_hd__a211o_1 XFILLER_201_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_80 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_2683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14524_ _14524_/Y _14524_/A _14524_/C _14524_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_275_5357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19911__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_91 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16186__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30570_ hold321/A _32280_/CLK _30570_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18292_ _18291_/X _18293_/B _18162_/X _29761_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__21313__B _21659_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22510__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17922__A1 wire3903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26642__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17243_ _17243_/X _17243_/S _29946_/Q _29914_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_193_4323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22259__B1 _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29229_ _29229_/Q _30507_/CLK _29229_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_89_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14455_ _14455_/Y _14455_/A _14455_/C _14455_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XANTENNA__26823__C _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_338_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15933__B1 _29275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31673__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32240_ _32240_/Q _32473_/CLK _32240_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_3062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_3130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17174_ _22510_/A2 _30009_/Q _17173_/X _17174_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_141_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19675__A1 _28498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26542__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14386_ _31018_/Q _31016_/Q _24439_/B _14386_/D _31017_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XANTENNA__27000__B _31980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20644__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19718__B _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22425__A _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output567_A _28735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21220__A1_N _22554_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16125_ wire920/X _16124_/X _16120_/X _16807_/B1 _16125_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21482__A1 _21879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32171_ _32171_/Q _32525_/CLK _32171_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_2653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26945__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14642__S _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_1698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18114__S _18118_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17150__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25212__A3 _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31122_ _31122_/Q _32546_/CLK _31122_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__29853__D _29853_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32029__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24956__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16056_ _16053_/X _16055_/X wire1048/X _16056_/Y _16825_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__15161__A1 wire1066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27427__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19427__A1 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_5374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25763__A4 _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20037__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21234__A1 _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15007_ VGND VPWR _15516_/S _30898_/Q _29176_/Q _15007_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17438__B1 _17436_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3450 VPWR VGND _26678_/B wire3452/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17953__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19978__A2 _19988_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31053_ VGND VPWR _31053_/D _31750_/CLK _31053_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_230_3538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19734__A _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24971__A2 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_2815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17989__A1 wire3910/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28518__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3483 VPWR VGND _25641_/A _31380_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21785__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3005 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30004_ _30004_/Q _30392_/CLK _30004_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_4714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19815_ VGND VPWR wire2206/X _19789_/C _19853_/A2 _19815_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__27370__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16110__B1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20993__A0 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_226_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout2782 VPWR VGND _27618_/S _27598_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_256_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32179__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15473__S _15736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16661__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13782__A _31164_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17254__A _30767_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19746_ VGND VPWR _14177_/A _19558_/A _19782_/A _19746_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_16958_ VGND VPWR _16958_/X _16964_/B1 _16967_/A1 _16955_/X _16957_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_94_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22734__A1 _29735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14672__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18938__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23931__B1 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22734__B2 _23135_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27162__S _27167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_4010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_206_5156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15909_ _16149_/A2 _16149_/A1 _30488_/Q _15909_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_0_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20745__A0 _29260_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31955_ _31955_/Q _31955_/CLK _31955_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19677_ _26694_/C _19676_/X _19695_/A2 _28499_/Q _28499_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_108_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28668__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16949__C1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_4936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_5009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16889_ VGND VPWR _16889_/X _16886_/X _16888_/X _16884_/S _16940_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_91_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16413__A1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25279__A3 _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29913__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30906_ _30906_/Q _32353_/CLK _30906_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18628_ VGND VPWR _18656_/S wire3913/X _28341_/Q _28341_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_94_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23703__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_377_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31886_ _31886_/Q _32565_/CLK _31886_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20819__S _20819_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27331__D_N _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25684__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16964__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15621__C1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26881__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21504__A _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14975__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18559_ VPWR VGND _18559_/X _30433_/Q _20982_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_30837_ _30837_/Q _32293_/CLK _30837_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_3375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_5555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19363__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27425__A1 _32107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_2040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire985_A wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19902__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21223__B _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21170__A0 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21570_ _30359_/Q _21549_/B _21288_/Y _30474_/Q _21672_/B _21514_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_72_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16177__B1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30768_ _30768_/Q _32580_/CLK _30768_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_222_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25436__B1 _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16716__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_3506 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_2977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24815__A _31703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_12 _29199_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_114_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20521_ VGND VPWR _20528_/S _29038_/Q _27680_/A1 _29038_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_23 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32507_ _32507_/Q _32540_/CLK _32507_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14727__A1 wire1135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length4147_A wire4148/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25987__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_34 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15924__B1 _32304_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_45 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14118__A hold455/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_3703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30699_ _30699_/Q _32547_/CLK hold294/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19115__B1 wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_56 _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16192__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24534__B _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_67 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23998__B1 _28624_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23240_ hold420/A _18496_/S VPWR VGND _30483_/Q _23253_/S VGND VPWR NF_sky130_fd_sc_hd__mux2_8 XFILLER_154_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_78 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20452_ VGND VPWR _20452_/S _28972_/Q _27265_/A0 _28972_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32438_ _32438_/Q _32438_/CLK _32438_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27189__B1 _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20554__S _20556_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_89 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19628__B _19628_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2329 VPWR VGND _26916_/B2 _14210_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_196_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28048__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23462__A2 wire3996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17677__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25739__A1 _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13957__A _28540_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23171_ _23191_/C1 _23191_/B1 _23190_/B _22620_/B _23171_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20383_ VGND VPWR _20384_/S _25035_/B _28907_/Q _28907_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26936__B1 _26936_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32369_ _32369_/Q _32441_/CLK _32369_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout1040_A wire1044/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18024__S _18046_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17141__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_265_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1138_A _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26400__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22122_ VGND VPWR _22180_/S _30293_/Q _30383_/Q _22122_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_216_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15152__A1 _15435_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27337__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19418__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22017__A3 hold262/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24550__A _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_3403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21225__A1 _20987_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22422__A0 _22037_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19969__A2 _24933_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26930_ _31954_/Q wire1571/X _31954_/D wire2684/X _26935_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22053_ VGND VPWR _22049_/X _21946_/A _22052_/Y _22053_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19644__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_2579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28198__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27283__D _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22973__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16987__B _16987_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21004_ VGND VPWR _21008_/S _29469_/Q _27248_/A0 _29469_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29443__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27361__A0 _27270_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26861_ _26861_/C1 _26860_/Y wire749/A _31880_/Q _31880_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_25_2175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24175__B1 _28641_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28600_ _28600_/Q _31803_/CLK _28600_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16652__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25812_ VGND VPWR _27854_/C _31431_/Q _30147_/Q _25812_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25911__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3714_A _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29580_ _29580_/Q _29580_/CLK _29580_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26792_ _27131_/B _26791_/X wire777/X hold206/A _31846_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_229_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14663__B1 _32343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18929__B1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30420__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31546__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23922__B1 wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28531_ _28531_/Q _31119_/CLK _28531_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_99_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25743_ _26838_/A3 _26153_/A _25567_/A _25738_/C _25743_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_73_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24190__A3 _24441_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22955_ VGND VPWR _22965_/S _30467_/Q _30132_/Q _30132_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_3343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout932_A wire944/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14300__B _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29593__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_2_3_core_clk clkbuf_opt_2_4_core_clk/A clkbuf_opt_2_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16404__A1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_3988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21906_ _21905_/X wire3146/X _21676_/D _21903_/B _21906_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_164_3256 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_153_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28462_ VGND VPWR _28462_/D _30580_/CLK _28462_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14415__A0 _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25674_ _25674_/Y _25665_/X _25668_/A _31387_/Q _25671_/Y _25672_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_1 XANTENNA__24478__A1 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22886_ wire1866/X _30110_/Q _22885_/X _30110_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20729__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_3398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_4296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25675__B1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_165_core_clk _31815_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_207_2839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27413_ _27395_/C _31383_/Q _27413_/C _31384_/Q _27421_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_279_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27800__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21414__A _30348_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24625_ _24381_/A _24626_/B _24459_/C _24624_/X _31533_/Q _31535_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14966__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21837_ VGND VPWR _21837_/X _21766_/B _21846_/A _21834_/X _21836_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28393_ _28393_/Q _30330_/CLK _28393_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_227_1542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_1952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1841_A _18166_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30570__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31696__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26219__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19354__B1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_5322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_2752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27344_ VGND VPWR _27348_/S _32200_/Q _27272_/X _32200_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21161__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16168__B1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24556_ _24560_/B _31198_/Q _31195_/Q _31199_/Q _25136_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XPHY_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_5344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21768_ _21768_/X _21657_/X _21708_/B _21767_/X _21766_/Y _21830_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_141_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22944__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_656 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17365__C1 hold41/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16707__A2 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_4790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23507_ VGND VPWR _23515_/S _28392_/Q _30440_/Q _23507_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14718__A1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20719_ VGND VPWR _20719_/S _29235_/Q wire1783/X _29235_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27275_ VGND VPWR _27281_/S _32145_/Q _27274_/X _32145_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_5210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_3852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24487_ _31335_/Q _25507_/D _25564_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XANTENNA__16942__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21699_ _21615_/X _21697_/X _21700_/A _21618_/Y _21698_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_103_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_5390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17380__A2 _31921_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29014_ _29014_/Q _32114_/CLK _29014_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23989__B1 wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14240_ _14045_/Y _14167_/S _14239_/Y _24389_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 X_26226_ VPWR VGND _31601_/D _26226_/B _26244_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_218_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_3885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_3322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_4687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14194__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15391__A1 _29606_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23438_ _22185_/B _22221_/A _23438_/Y _29368_/Q _29374_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_1 XFILLER_7_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20464__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19538__B _19538_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15391__B2 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_1805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2841 VPWR VGND wire2840/A _23067_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_10_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14171_ _14171_/A _14171_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 X_26157_ VGND VPWR _14177_/A _19558_/A _26159_/B _26157_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_235_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23369_ VGND VPWR _23372_/S _30347_/Q hold192/X _30347_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26927__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2382_A wire2383/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17132__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29673__D _29673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25108_ _25148_/A _24543_/D _24546_/B _24543_/B _24543_/A _26559_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a41o_4 XANTENNA_input61_A la_input[114] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24938__C1 _25687_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27247__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19409__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24402__A1 _31003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26088_ wire2597/X _26087_/X _31542_/Q _17877_/X _31542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_188_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18880__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31076__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20019__A2 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22413__A0 _21955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21216__A1 _22619_/S VGND VPWR VPWR VGND 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VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27578__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1300 VPWR VGND wire1303/A _20655_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22964__A1 _30476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3783_A _30029_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27352__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26155__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_4070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_4460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17861_ _17501_/X _31733_/Q _17860_/X _17861_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29847_ _29847_/Q _29847_/CLK _29847_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20975__A0 _29440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1322 _25738_/B _24046_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_21_3230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2140 _24951_/B _19778_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_60_3290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24166__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19600_ _19601_/B _20169_/B _19566_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 Xwire2151 VPWR VGND _24945_/B _19772_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout3689_A _30369_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16812_ VGND VPWR _16812_/X _16812_/B _16812_/A wire921/X VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__28810__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_3039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25902__A1 _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2162 VPWR VGND _26819_/B _26884_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__29936__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2814_A _25513_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1366 _19710_/B _27053_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_1170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14654__A0 _28871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17792_ _31730_/Q _17870_/A2 _17792_/X _31729_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_53_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2173 VPWR VGND _26878_/B wire2174/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29778_ hold273/A _29788_/CLK _29778_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1377 VPWR VGND _19973_/A1 wire1385/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_1_2601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2184 VPWR VGND wire2184/X _19594_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1388 _26838_/A1 _26017_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_286_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3950_A _23095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1450 VPWR VGND wire1450/X wire1450/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_182_4035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2195 VPWR VGND wire2195/X _19584_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1399 VPWR VGND wire1403/A _18662_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_19531_ _19531_/X _19555_/A _19531_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__19188__A3 _19177_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32471__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16743_ _16743_/X _32366_/Q _16964_/A2 _16920_/A3 _16930_/A1 _16742_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20727__A0 _29242_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27104__B1 _32030_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28729_ _28729_/Q _31570_/CLK _28729_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_169_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13955_ _28542_/Q _13955_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_112_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18396__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25722__C _25722_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27655__A1 _27664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31740_ _31740_/Q _31748_/CLK _31740_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_203_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19462_ VGND VPWR _19467_/C _28447_/Q _28448_/Q _19462_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_16674_ _16674_/X _29295_/Q _16934_/A2 _16944_/B2 wire962/X _16673_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_286_1989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_2381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24469__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14406__B1 wire3213/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13886_ _28611_/Q _13886_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20639__S _20639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4028_A wire4029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16946__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26863__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23015__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18413_ VGND VPWR _18426_/S _28188_/Q wire3873/X _28188_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_54_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_1913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21324__A _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27710__S _27710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15625_ _15625_/X _29065_/Q _15628_/A2 _15628_/A3 _15628_/B1 _15624_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_182_2655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14957__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25130__A2 _25142_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19393_ VGND VPWR _19397_/S _27684_/A1 _28409_/Q _28409_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17521__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31671_ _31671_/Q _32291_/CLK _31671_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18148__A1 wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18109__S _18109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23141__A1 _30441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19345__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18344_ VGND VPWR _18357_/S wire3881/X _28122_/Q _28122_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30622_ hold400/A _31806_/CLK _30622_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29848__D _29848_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21688__D1 _21685_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20585__D _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1113_A wire1113/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21152__A0 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16159__B1 wire944/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15556_ VGND VPWR _15702_/S _28863_/Q _28895_/Q _15556_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25418__A0 _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18699__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19896__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_3687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23692__A2 _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14507_ _14510_/B _29452_/D _14515_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__14709__A1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17948__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27011__A _31988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25969__A1 _19660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18275_ _18275_/Y _29860_/Q _18295_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__29316__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30553_ _30553_/Q _31877_/CLK hold288/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15906__B1 _29008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15487_ _15721_/A2 _15487_/X _15486_/X _15705_/A1 _28428_/Q _15546_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__21978__B _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17371__A2 hold53/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26091__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25433__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26630__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17226_ _30016_/Q _22510_/A2 _17226_/X _29444_/Q _17234_/B2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_201_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput10 hold43/A hold42/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_14438_ _29385_/Q _14438_/X _14437_/Y _29384_/Q _14459_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_4 XANTENNA__15382__A1 wire1083/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14185__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput21 hold24/X hold25/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_30484_ VGND VPWR _30484_/D _30484_/CLK _30484_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_12_3999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput32 hold90/X hold91/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_275_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_3725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17894__D _24600_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput43 VGND VPWR input43/X irq[4] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__15468__S _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32223_ _32223_/Q _32464_/CLK _32223_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21455__A1 _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13777__A _31169_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput54 VGND VPWR input54/X la_input[108] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_193_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31419__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17157_ _17234_/A1 _30395_/Q _17157_/X _17234_/B2 _29435_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__26918__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput65 input65/X la_input[118] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA_wire1482_A wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14369_ _31010_/Q _14370_/B _31012_/Q _31011_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_253_4773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput76 la_input[12] input76/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_234_4161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_1446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput87 VPWR VGND la_input[22] input87/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__27040__C1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28340__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16108_ VGND VPWR _16826_/S _30895_/Q _29173_/Q _16108_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xinput98 VGND VPWR input98/X la_input[32] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__29466__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27157__S _27157_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32154_ _32154_/Q _32225_/CLK _32154_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26394__A1 _31684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17088_ VGND VPWR _23348_/C _30197_/Q _30386_/Q _17088_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16331__B1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_4047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_5182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_3644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27908__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22404__A0 _21843_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17683__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31105_ _31105_/Q _32470_/CLK _31105_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_83_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15685__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16039_ _16039_/A2 _16039_/X _16038_/X _16039_/C1 _30893_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__24801__C _31683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24944__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32085_ hold106/A _32233_/CLK _32085_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30522__D input64/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_4257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14893__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27569__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22955__A1 _30467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30443__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22602__B _22617_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire733_A wire733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31569__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2883_A _20788_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27343__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31036_ _31036_/Q _31548_/CLK _31036_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_113_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3291 _14883_/A1 _15620_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__19183__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19820__A1 _28562_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28490__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_5278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_4252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15437__A2 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16634__A1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24157__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26697__A2 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1914_A _19273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14645__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22168__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4127 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20122__B _20122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20718__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23714__A _23714_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19729_ _19728_/X _28521_/Q _28521_/D _19718_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_221_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_161_4119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18387__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25632__C _31378_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30593__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23380__A1 _30358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22183__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26449__A2 _26476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27646__A1 _19732_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19403__S _19403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14660__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22740_ _22740_/A _22741_/A _22740_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_126_3527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31938_ _31938_/Q _31938_/CLK _31938_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23433__B _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20549__S _20550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27110__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2804 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27620__S _27620_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24248__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14948__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22671_ VPWR VGND _22671_/X _22671_/B _22671_/A VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XANTENNA__18139__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31869_ _31869_/Q _31869_/CLK _31869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15070__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23132__A1 hold250/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19336__B1 _19336_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24410_ _14388_/C _14382_/C _24434_/B _24434_/D _24410_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_fanout1088_A wire1097/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26744__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21622_ _21623_/B _21623_/A _21857_/S _21679_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_202_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_4160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21143__A0 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25390_ _25381_/C _25389_/Y _25384_/X _31281_/Q _25390_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19887__A1 _28593_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22764__S _22807_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_5615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22486__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24880__A1 wire2255/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26606__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24341_ _24340_/X _24357_/B1 wire1668/X _24353_/A1 _30973_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 X_21553_ _21554_/B _21655_/C _21655_/B _21388_/X _21552_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_254_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_33_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26082__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17362__A2 _30820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27278__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26621__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20504_ VGND VPWR _20504_/S _27251_/A0 _29022_/Q _29022_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27060_ _27060_/X _27122_/B _32008_/Q _27070_/C _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_258_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15373__A1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24272_ wire801/A _24281_/A _31583_/Q _24308_/B _31685_/Q _24281_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__14176__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19639__A1 _28484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21484_ _21484_/B _21890_/A _21484_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__20284__S _20284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16570__B1 _30792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23435__A2 _29371_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29809__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24632__A1 _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31099__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26011_ VGND VPWR _14174_/A _19555_/A _26014_/A2 _26011_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_23223_ VGND VPWR _23223_/S _30215_/Q _30145_/Q _30215_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19103__A3 _19100_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20435_ VGND VPWR _20446_/S _28955_/Q _27693_/A1 _28955_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17159__A _17159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3664_A _30448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32344__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21997__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23595__S _23595_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15125__A1 _15106_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23154_ _30178_/D _23185_/B _23153_/X _30178_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_118_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25188__A2 _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26385__A1 wire2255/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20366_ _31404_/Q _25733_/A _31403_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_66_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18862__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25807__C _25807_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17593__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22105_ _21032_/B _30027_/Q _22104_/X _22105_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15676__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28833__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19374__A _28272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25593__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16873__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27962_ _27962_/Q _31158_/CLK _27962_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30432__D _30432_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23085_ _29714_/Q _23145_/A _23085_/X _23115_/B _23061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA__29959__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23738__A3 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20297_ VGND VPWR _20302_/S wire1837/X _28838_/Q _28838_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3929_A _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_2999 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19805__C _26785_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22946__A1 _21464_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29701_ hold349/A _31904_/CLK _29701_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27334__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26913_ VPWR VGND _31937_/D _31935_/Q _26913_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_22036_ _22035_/A _22035_/B _21942_/S _22036_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__32494__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_732 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_2404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27893_ VGND VPWR _27893_/D _30030_/CLK _27893_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_135_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_2308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15428__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19524__D _23618_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24148__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26688__A2 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_4070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30936__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29632_ _29632_/Q _32357_/CLK _29632_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26844_ VGND VPWR wire2636/A _19563_/A wire749/X _26844_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_251_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold460_A hold460/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14311__A _30334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20032__B _25059_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_3651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28983__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_346_core_clk _30468_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__21843__S _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20709__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29563_ _29563_/Q _32438_/CLK _29563_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_263_437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26775_ _26775_/B _26694_/B _26791_/A _26775_/X _27076_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_224_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23987_ _23987_/X _24186_/A3 wire1314/A _28623_/Q wire3511/X _24192_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__16937__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18378__A1 wire3877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22174__A2 _22173_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23371__A1 _30349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19575__B1 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15841__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27637__A1 _19660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24439__B _24439_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14651__A3 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28514_ _28514_/Q _32014_/CLK _28514_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_77_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13740_ _26543_/A _31755_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_226_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25726_ _25725_/Y _25703_/A _31403_/Q _25731_/B _31403_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_129_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input213_A serial_load_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23343__B _23355_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16389__B1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22938_ VPWR VGND _22938_/X _22938_/B _30116_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__20185__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29494_ VGND VPWR _29494_/D _29914_/CLK _29494_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_243_4975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_5105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20459__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2228_A _27664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16928__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17050__A1 _30193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26845__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_2674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27530__S _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14939__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28445_ _28445_/Q _32039_/CLK _28445_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_249_1096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28213__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25657_ _25656_/X hold143/A _31385_/D _27349_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_202_5362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29339__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22869_ VGND VPWR _22869_/C _22835_/A _22870_/B _22869_/D _22869_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_142_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3172_A _18533_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15410_ _15692_/S _15409_/X _15744_/B1 _15410_/Y _15407_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__24320__B1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18156__C _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26860__A2 wire2668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24608_ _26403_/B _24805_/A _24805_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_125_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16390_ _16817_/A2 _16817_/A1 _29021_/Q _16390_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XPHY_431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28376_ _28376_/Q _30395_/CLK _28376_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_51_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19878__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25588_ VGND VPWR _31370_/D _25588_/B _25595_/A _25588_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XPHY_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20983__A _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24871__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23674__A2 _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15341_ _15341_/X _15638_/A2 _15340_/X _28761_/Q _15561_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27327_ VGND VPWR _27330_/S _27274_/X _32185_/Q _32185_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30316__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24539_ _24539_/A _24539_/B _24526_/X _24541_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XPHY_1030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_opt_19_0_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2597_A _14396_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16156__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26073__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17353__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_27_4_core_clk clkbuf_opt_27_4_core_clk/X clkbuf_opt_27_4_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_142_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26612__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28363__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18060_ VGND VPWR _18086_/S wire3895/X _27990_/Q _27990_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29489__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15364__A1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15272_ _15272_/X _15749_/C1 _15265_/X _15267_/X _15271_/X _15745_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27258_ VGND VPWR _27263_/S _32133_/Q _27258_/A0 _32133_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_3400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16561__B1 wire894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_8_0_core_clk clkbuf_5_8_1_core_clk/A clkbuf_5_9_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XPHY_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_4659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18172__B _18172_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17011_ _21360_/A _17078_/C _20987_/C _17010_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XFILLER_177_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_2172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length3361 VPWR VGND _24383_/B wire3362/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22634__A0 _30086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26209_ _31593_/Q _26227_/A2 _26210_/B _32283_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14223_ _13829_/A _14223_/Y _14222_/X _31273_/Q wire3232/X _29503_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XANTENNA__17069__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23977__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2764_A _19641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27189_ _32087_/Q _32088_/Q _25757_/X _32086_/Q _27189_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_7_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27485__B _27485_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3604_A _19573_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_62_core_clk _32403_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_235_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_4031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30466__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3076 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15116__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14154_ _14154_/Y _19628_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XANTENNA__26376__A1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18853__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31711__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18599__S _18601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_3660 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_5519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15667__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16864__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2931_A _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24926__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18962_ _19202_/B _28029_/Q _18961_/X _18962_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14085_ _29451_/Q _14085_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_214_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14875__B1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19715__C _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_4419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26128__A1 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17913_ VGND VPWR _17891_/A _17913_/C wire1688/X _17913_/X _17913_/D VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA__21319__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27705__S _27709_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20948__A0 _29516_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_3688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19802__A1 _28553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18893_ _18889_/X _18892_/X _19283_/S _18891_/X _18893_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_231_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1130 VPWR VGND _15752_/B1 wire1134/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15419__A2 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24139__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16616__A1 wire3287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22141__C _22141_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26679__A2 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17813__B1 _17812_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26829__B _26829_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17844_ _17843_/X _17833_/S _17832_/S _17819_/X _17844_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_227_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31861__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25733__B _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4145_A _28399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14221__A _24588_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1163 wire1172/A _15332_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_188_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14627__B1 _32342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25887__B1 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_2397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21753__S _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1185 wire1189/X _15628_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16092__A2 _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24154__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27006__A _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25351__A2 _25346_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17775_ _17764_/B _17751_/X _17750_/X _17842_/S _17775_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_105_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14987_ _16840_/A2 wire3298/X _30782_/Q _14987_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18369__A1 wire3913/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_4029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23362__A1 _30340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22165__A2 _22185_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27089__C1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27628__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19514_ VGND VPWR _19514_/X _24441_/A _20060_/A _20654_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_207_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1291 VPWR VGND _25085_/B _20656_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire1230_A wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16726_ VGND VPWR _16726_/X _16961_/S wire958/A _28966_/Q _16725_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_95_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13938_ _28559_/Q _13938_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_199_5030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16919__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32217__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18774__D1 wire2270/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26836__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21912__A2 _21559_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24998__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27440__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17041__B2 _29421_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31723_ _31723_/Q _31730_/CLK _31723_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19445_ VGND VPWR _28443_/D _27091_/C1 _25512_/B _19444_/X _19443_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_182_3186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26300__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16657_ VGND VPWR _16657_/X _16656_/X _16655_/X _16841_/C1 wire1058/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_264_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13869_ _28628_/Q _13869_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_1_1785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_2346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15052__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19318__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17592__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26851__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15608_ _15610_/A2 _15608_/X _15607_/X wire1104/A _29330_/Q _15608_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_125_3571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31654_ _31654_/Q _31894_/CLK _31654_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19376_ _19376_/X _19373_/X wire1904/X _19375_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19869__A1 _28584_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16588_ _16588_/X wire1058/X _16581_/X _16583_/X wire923/X _16587_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__28706__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22584__S _22586_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22468__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24862__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22322__C1 _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2631_A _19534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_4960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30605_ _30605_/Q _31803_/CLK hold164/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18327_ VGND VPWR _18260_/X _29769_/Q _22372_/A2 _22382_/A _18326_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_2 XFILLER_280_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15539_ VGND VPWR _15716_/S _29544_/Q _29578_/Q _15539_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30517__D hold466/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31585_ _31585_/Q _32291_/CLK _31585_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31241__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32367__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26064__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4835 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27800__A1 _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26603__A2 _31773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19884__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15355__A1 _29605_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14158__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30536_ hold370/A _32016_/CLK input57/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18258_ VGND VPWR _18317_/S _28096_/Q _27694_/A1 _28096_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_214_5200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30809__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19178__B _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15355__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24075__C1 _24074_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24614__A1 _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24614__B2 _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_4267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17209_ _21630_/B1 _29732_/Q _21646_/A _22026_/A2 _22905_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_151_5534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23968__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19097__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18189_ _18244_/A _18188_/X _18201_/A _18239_/B _18189_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_30467_ VGND VPWR _30467_/D _30479_/CLK _30467_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_173_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27395__B _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24090__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire850_A wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20220_ VGND VPWR _20225_/S _28765_/Q _27703_/A1 _28765_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32206_ _32206_/Q _32523_/CLK _32206_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15107__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31391__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16304__B1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30398_ _30398_/Q _30398_/CLK _30398_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_45_4284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24378__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15658__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15926__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32137_ _32137_/Q _32137_/CLK _32137_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30959__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20151_ VGND VPWR _14183_/A _19551_/A _20192_/A2 _20151_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__24917__A2 _19574_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14830__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3078_A _18018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14866__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22332__B _22332_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27880__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26382__A4 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2909 VPWR VGND wire2909/X _20552_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_3_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17232__A2_N _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_21_0_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27316__A0 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26119__A1 _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27615__S _27621_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23050__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24250__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14330__A2 _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20082_ VGND VPWR _19566_/B _19555_/A _20106_/A _20082_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__25924__A _31479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19254__C1 wire1563/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32068_ _32068_/Q _32439_/CLK _32068_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24393__A3 _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25590__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_5354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16607__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23910_ _23805_/A _30557_/Q _23910_/X wire1656/A _30621_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__17804__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31019_ VGND VPWR _31019_/D _31760_/CLK _31019_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14881__A3 wire1508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25643__B _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24890_ _26837_/D wire3515/A wire1651/A _24889_/X _24890_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_208_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23028__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14618__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1003_A _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15815__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_2896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17280__A1 wire3562/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23444__A _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23841_ VGND VPWR _23841_/X _31890_/Q _23859_/A _24281_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__17280__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24145__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28236__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19641__B _24276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16757__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_4077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18538__A _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15291__B1 wire1067/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23353__A1 _22553_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27619__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15830__A2 _16091_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_5226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3412_A wire3412/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26560_ VGND VPWR wire817/X _31764_/Q wire3454/X _26560_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_508 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23772_ _23768_/Y _31792_/Q _31791_/Q _31793_/Q _23772_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__19021__A2 _19010_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20984_ VGND VPWR _20984_/C _29517_/Q _20984_/X _30412_/Q _30440_/Q VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__20279__S _20285_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21364__B1 _21676_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_519 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25511_ _25511_/X _25540_/C _27131_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XANTENNA__27350__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_4574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27095__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22723_ _22722_/X _29734_/Q wire3133/A _29884_/Q _22729_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30339__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26491_ _26491_/X _26489_/C _17490_/B _26435_/B _26488_/A _17481_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_39_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19309__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_3532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28230_ _28230_/Q _30451_/CLK _28230_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28386__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26842__A2 _19535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25442_ _25441_/X _26498_/A _31361_/Q _25430_/Y _31301_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_146_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22654_ _22656_/B _22656_/A _22652_/X _22650_/X _22654_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15594__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16791__B1 wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24853__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29631__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21605_ _21611_/A _21966_/A _21605_/B _21605_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 X_28161_ _28161_/Q _28326_/CLK _28161_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_5193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23120__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25373_ _31277_/Q _25388_/D _31278_/Q _25376_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_240_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16492__S _16806_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22585_ VGND VPWR _22613_/S hold146/A _22584_/X _30071_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18273__A _18332_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18532__A1 _18532_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17335__A2 input177/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19190__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27112_ _27116_/B _26896_/B _27116_/A _27112_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_224_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30489__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24324_ _32009_/Q _19710_/B _24324_/X _31977_/Q wire1346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_21536_ _21534_/A _21626_/C _21558_/C _17143_/B _21533_/Y _21626_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__21411__B _21679_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28092_ _28092_/Q _32134_/CLK _28092_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_68_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17740__C1 _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31734__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_4132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_2607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22616__A0 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_3622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15897__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27043_ _27050_/D _32000_/D _27051_/A _27043_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__14554__C1 _29552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24255_ _26543_/A _31756_/Q _24255_/C _31757_/Q _24255_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_232_5344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21467_ _14116_/Y _21463_/B _21653_/D wire3800/A _21653_/B _21472_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 XFILLER_43_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29781__CLK _29782_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1200 wire1199/A fanout1194/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__24081__A2 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1211 VPWR VGND _14795_/B1 wire1210/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_172_3322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17099__A1 _29888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23206_ VGND VPWR _23221_/S _30198_/Q _30128_/Q _30198_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17099__B2 _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20418_ VGND VPWR _20418_/S _27710_/A1 _28940_/Q _28940_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_189_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18296__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1233 VPWR VGND _26935_/B1 _26936_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26358__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23619__A _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24186_ wire1622/X _24185_/X _31152_/Q _24186_/A3 _24186_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20742__S _20754_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18835__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21398_ _21677_/B _21389_/D _21427_/B _14111_/Y _21393_/Y _21401_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__24214__S _24220_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_3328 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_172_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24369__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16846__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15649__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14306__C1 _29980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24441__C _24441_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23137_ hold281/A _23157_/A2 _23137_/X _30105_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__24908__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2080_A wire2081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20349_ VGND VPWR _20359_/S _27699_/A1 _28889_/Q _28889_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input163_A la_input[91] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31884__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25030__A1 _13788_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28994_ _28994_/Q _32359_/CLK _28994_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_2375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2178_A _20169_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14857__B1 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22756__A_N _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29011__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3018_A wire3027/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27307__A0 _32168_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_4406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23041__B1 _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27945_ _27945_/Q _30282_/CLK _27945_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23068_ VGND VPWR _23068_/X _23066_/X _23067_/X _23065_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_128_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput200 VPWR VGND mprj_dat_i[4] input200/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_1_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18599__A1 wire3896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput211 VPWR VGND wire4196/A serial_clock_in VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_248_4149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23592__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14910_ _14910_/X wire1214/X _14903_/X _14905_/X _15151_/B1 _14909_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_249_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22019_ _22016_/X _22063_/A _22018_/X _22019_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_24_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_5017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15890_ _16039_/A2 _15890_/X _15889_/X _16039_/C1 _30889_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_248_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2345_A _14198_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27876_ _27876_/Q _30384_/CLK _27876_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14041__A _28456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19260__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23019__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17055__C _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31114__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_180_core_clk _32024_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16074__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29615_ _29615_/Q _32067_/CLK _29615_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14841_ _14841_/X _30492_/Q _14840_/X _15629_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_57_3410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_4939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26827_ _26827_/Y _26892_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_load_slew1153_A _14549_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19551__B _19551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32089__D _32089_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29161__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25272__C _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15282__B1 wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23344__A1 _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19548__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15821__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17560_ _31681_/Q _17452_/X _17560_/X _17460_/X _17559_/X _17457_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_29546_ _29546_/Q _29644_/CLK _29546_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2512_A _20749_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20158__A1 _28723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19012__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14772_ VGND VPWR _15275_/S _28409_/Q _29074_/Q _14772_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26758_ _26758_/Y _31794_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_281_3052 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28729__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23895__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17023__A1 _30379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26818__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16511_ _16510_/X _16825_/S wire989/X _32061_/Q _16511_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25709_ _27636_/S _31400_/D _25867_/A _25709_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_144_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17491_ _17524_/A _17863_/A _31707_/Q _17586_/A _17576_/A _17470_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_29477_ _29477_/Q _32293_/CLK _29477_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_1467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26689_ _31797_/D _26686_/Y wire2264/A wire1282/A _26688_/X _26771_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__25097__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31264__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15034__B1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26294__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17574__A2 _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19230_ _19229_/X _22088_/B1 _19358_/A2 _28169_/Q _19230_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_73_2054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16442_ _16442_/X _32358_/Q _16814_/B1 _16448_/A3 _15975_/S _16441_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_242_1601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28428_ _28428_/Q _31917_/CLK _28428_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23801__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24844__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_5102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19161_ _19160_/X _19151_/S _19201_/A2 _27974_/Q _19161_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19279__A _30279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28359_ _28359_/Q _30272_/CLK _28359_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16373_ VGND VPWR _16373_/X _16370_/X _16372_/X _16838_/A1 wire1055/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_199_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28879__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2979_A _18523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18523__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17326__A2 _30814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_3555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18112_ VGND VPWR _18119_/S wire3832/X _28041_/Q _28041_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15324_ VGND VPWR _15702_/S _29025_/Q _28993_/Q _15324_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21321__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31370_ _31370_/Q _32299_/CLK _31370_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19092_ _19092_/X _19377_/B _28131_/Q _28163_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__20330__A1 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_3206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19429__D _19429_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22607__A0 _22606_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15888__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18043_ VGND VPWR _18043_/S wire3839/X _27975_/Q _27975_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30321_ _30321_/Q _31754_/CLK _30321_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_86_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15255_ VGND VPWR _15255_/Y _15254_/X _15241_/X _15735_/B _15245_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_253_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_5444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24072__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14216__A _14216_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4095_A wire4096/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28109__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14206_ _14206_/Y _14205_/X _14168_/S hold210/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_190_3433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22083__A1 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23280__A0 _30262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30252_ _30252_/Q _32433_/CLK _30252_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_2139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22083__B2 _22621_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15186_ _16781_/A2 _15747_/A1 _29117_/Q _15186_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14560__A2 wire1533/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27546__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17629__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18826__A2 _18824_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output647_A wire2368/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2490 _20948_/S _20947_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_253_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27010__A2 _27011_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15746__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14137_ _13829_/A _14137_/Y _14136_/X _31259_/Q _14146_/B _30021_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_235_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17527__A _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30183_ _30183_/Q _30482_/CLK _30183_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_214_2415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18122__S _18152_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25021__A1 _13792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19994_ _19994_/X _20666_/A _23879_/A _19994_/B _20669_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA_fanout2020_A _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1278_A _21215_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2719 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18039__A0 _27971_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26364__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_268_core_clk _30900_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__29861__D _29861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27435__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14068_ _31411_/Q _14068_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_18945_ wire1912/A _20870_/S _18944_/X _18942_/X _18945_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_209_5302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28259__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_3385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23583__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27849__A1 _32548_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17961__S _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29504__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18592__A2_N _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20397__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1445_A _17910_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18876_ _28249_/Q _18876_/X _19271_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_77_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22579__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16065__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17262__A1 _30920_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17827_ _17873_/B1 _31730_/Q _17826_/X _17827_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_23_2487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26521__A1 _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24127__A3 wire1625/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17801__A3 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15273__B1 wire1064/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22138__A2 wire2284/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_1269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13790__A _31156_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15812__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20149__A1 _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_5595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17758_ _17503_/A _31720_/Q _17757_/X _17758_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_229_3392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23886__A2 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29654__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27077__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21897__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16709_ _16941_/C _16708_/X _16709_/Y _16699_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_222_4845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18792__S _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17689_ _17874_/A2 _31714_/Q _17688_/X _17689_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25088__A1 wire1326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15025__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26285__B1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_2424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16222__C1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26824__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23061__A_N _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31706_ _31706_/Q _31750_/CLK _31706_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_207_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19428_ hold285/A _28437_/Q _28438_/Q _31337_/Q _31336_/Q _19428_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_4 XFILLER_277_4323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_1701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire898_A wire898/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23711__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20827__S _20837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30631__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31757__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_2258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23203__S _23209_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_3858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14784__C1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31637_ _31637_/Q _31685_/CLK _31637_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1981_A _18679_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19359_ _19359_/X _19356_/X _19283_/S _19358_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_241_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_4045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18514__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_2307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15328__A1 wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22370_ _22370_/X wire3213/X _18301_/X wire3712/X _22370_/A2 _29763_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__26588__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24048__C1 _24047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24245__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20321__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31568_ _31568_/Q _31836_/CLK _31568_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_195_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_5620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17722__C1 _17485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20128__A _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21321_ _21640_/D _30342_/Q _21462_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__15879__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30519_ _30519_/Q _32351_/CLK _30519_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30781__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31499_ _31499_/Q _31874_/CLK _31499_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24063__A2 _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14126__A _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3195_A wire3196/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25260__A1 hold93/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25582__A_N _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24542__B _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29034__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24040_ wire740/A _25022_/B wire4067/X _31170_/Q _19995_/B VGND VPWR _24039_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22074__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23271__A0 _30253_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21252_ VGND VPWR _23228_/S _29714_/Q _30430_/Q _29714_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_67_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold410 hold410/A hold410/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_119_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_5074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14551__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27537__B1 _32334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20562__S _20562_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold421 hold421/A hold421/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18817__A2 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4119 VPWR VGND wire4119/X wire4120/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold432 hold432/A hold432/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_28_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold443 hold443/A hold443/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20203_ VGND VPWR _20223_/S _28748_/Q _27686_/A1 _28748_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_2542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13965__A _28532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold454 hold454/A hold454/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21183_ VGND VPWR _21184_/S _29625_/Q _27688_/A1 _29625_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3362_A wire3362/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_3036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold465 hold465/A hold465/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout1120_A _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18032__S _18051_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3940 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold476 hold476/A hold476/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__30011__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3429 wire3429/X wire3430/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_186_5438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold487 hold487/A hold487/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__31137__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23023__A0 _23022_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20134_ _25904_/A _20133_/Y _20192_/A2 _28711_/Q _28711_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold498 hold498/A hold498/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27345__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2706 wire2706/X _14163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_210_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25654__A _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2717 wire2718/X wire2717/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_41_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25991_ VGND VPWR wire2641/X _19535_/A _26015_/A _25991_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_214_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29184__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26353__B1_N _26352_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23574__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22377__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout945 wire951/X _16039_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire2739 VPWR VGND wire2739/X hold115/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_45_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27730_ VGND VPWR _27737_/S _24958_/B _32461_/Q _32461_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout956 wire958/A _16736_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19652__A _19652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24942_ _25676_/B1 _24941_/Y _24947_/A _31115_/Q _31115_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20065_ _26179_/B1 _20064_/Y _20106_/A _28678_/Q _28678_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_93_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20388__A1 wire1837/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout967 _16806_/S _16443_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25373__B _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_4109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26665__A1_N _26668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_4603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18450__A0 _28224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16056__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27661_ VGND VPWR _27667_/S wire2242/X _32399_/Q _32399_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26512__A1 _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25315__A2 _25325_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24873_ _24873_/Y _31037_/Q _31039_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__30161__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout845_A _20061_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15264__B1 _32359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_5050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29400_ _29400_/Q _30468_/CLK _29400_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16461__C1 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24523__B1 _31219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26612_ _26612_/X wire1275/X wire3461/X wire3462/X _26611_/Y _23753_/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_2_2069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23824_ wire1808/A _23823_/X _31817_/Q wire1624/X _23825_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__32532__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27592_ _27592_/A _27592_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_58_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21337__B1 _21640_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_305 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23877__A2 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_316 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17005__A1 _30285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_327 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29331_ _29331_/Q _32441_/CLK _29331_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18202__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_4030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1946_A _19296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21888__A1 _29790_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26543_ _26543_/B _26543_/Y _26543_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_338 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23755_ _23755_/A _23755_/D _26607_/A _23756_/C _26619_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XFILLER_91_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20967_ VGND VPWR _20980_/S _30173_/Q _29432_/Q _29432_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_349 wire779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17522__A_N _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3996_A _29361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26276__B1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17556__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18753__A1 _19368_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_1629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24717__B _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22706_ _22693_/X _22706_/B _22706_/X _22706_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_29262_ _29262_/Q _32324_/CLK _29262_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17900__A _31063_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26474_ _26474_/Y _26473_/C _26472_/X _26473_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XFILLER_256_5119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_2092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20560__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23686_ _23805_/C _23685_/X hold435/X _23805_/A _23687_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_104_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20737__S _20749_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20898_ VGND VPWR _20906_/S _30247_/Q _29409_/Q _20898_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_100_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28213_ _28213_/Q _32108_/CLK _28213_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_126_2475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25425_ _31223_/Q _25430_/A _25425_/Y _31224_/Q _25425_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_180_2989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14775__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22637_ _22642_/B _29726_/Q _22663_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__22837__B1 _30105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29193_ _29193_/Q _30359_/CLK _29193_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1921_A wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18207__S _18309_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18505__A1 wire3902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28144_ _28144_/Q _30254_/CLK _28144_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_1217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_1386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26579__A1 _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25356_ _25356_/X _31274_/Q _25355_/Y _25363_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__20312__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16516__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22568_ VGND VPWR _22578_/S wire3705/X _30345_/Q _22568_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14790__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22952__S _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20038__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26043__A3 _31531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24307_ VGND VPWR _30957_/D _24308_/B _31609_/Q _26386_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14527__C1 _20847_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21519_ _21638_/A _21518_/A _21518_/C _21519_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 Xclkbuf_5_31_1_core_clk clkbuf_5_31_1_core_clk/X clkbuf_5_31_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_28075_ _28075_/Q _30484_/CLK _28075_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25287_ _31259_/Q _31261_/Q _31260_/Q _25274_/B _25287_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_11_3092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14036__A _28461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25251__A1 _29866_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22499_ _22509_/C1 _22498_/X _22511_/A2 _17184_/X _30010_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24054__A2 _24048_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15040_ _15630_/A1 _15631_/A1 _15038_/X _15037_/X _15039_/X _15040_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_2 X_27026_ VGND VPWR _27028_/B _31994_/Q _31992_/Q _31993_/Q _27027_/D VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_156_3862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22065__A1 _23155_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27528__A0 _32262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1752 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24238_ VGND VPWR _24238_/S _30914_/Q _27261_/A0 _30914_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_139_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length988 VPWR VGND _16039_/A2 wire989/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20472__S _20484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19546__B _19546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20076__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28401__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13875__A _28622_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29527__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[23] _19611_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17347__A _17347_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24169_ wire714/A _24163_/X wire734/X _24209_/B1 _24168_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XANTENNA__25003__A1 _31145_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_4503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26346__A4 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29681__D _29681_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23014__A0 _23010_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_361_core_clk _30219_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25049__C_N _19955_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16295__A2 _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17492__A1 _31613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15098__A3 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3930 wire3930/X _29728_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__32062__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27255__S _27255_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19218__C1 _28297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26751__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16991_ _17077_/A _29721_/Q _21676_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 X_28977_ _28977_/Q _32110_/CLK _28977_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_7_1202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_1870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3952 VPWR VGND _22614_/B _14092_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_1925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_359 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23565__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3963 VPWR VGND _22405_/S _22610_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22368__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30504__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3974 VPWR VGND wire3974/X _29502_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_248_3201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18730_ _18730_/X _19346_/D1 _27922_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_1_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19562__A _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15942_ _16149_/A2 _16149_/A1 _28085_/Q _15942_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27928_ _27928_/Q _30254_/CLK _27928_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3985 VPWR VGND _14069_/A _29447_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30620__D _30620_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20379__A1 _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_98_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19233__A2 wire1403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3996 VPWR VGND wire3996/X _29361_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22399__S _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_2774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28551__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29677__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17244__A1 _31378_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18441__A0 _28215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21040__A2 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24109__A3 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18661_ _18661_/A _18661_/B _18661_/C _18661_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__25306__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27859_ _27859_/Q _29803_/CLK _27859_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15873_ _16149_/A2 _16149_/A1 _28083_/Q _15873_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_54_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_2826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output228_A wire1842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4867 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19712__D _23876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17612_ VGND VPWR _26470_/B _31632_/Q _17611_/X _17612_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_20_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_2105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14824_ _14825_/B wire1067/X wire1081/X _14823_/X _14815_/X _14819_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_79_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18592_ VGND VPWR wire3160/A _18172_/B _22328_/A _28307_/D hold179/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_30870_ _30870_/Q _32310_/CLK _30870_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_261_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23868__A2 _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30654__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27059__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17543_ _17543_/X _19849_/A _17474_/C _17473_/X _17457_/B VGND VPWR _26245_/C VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_72_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29529_ _29529_/Q _32063_/CLK _29529_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_4250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14755_ wire3251/X wire1732/X _14755_/X _15609_/B1 _32114_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_clkbuf_1_1_0_core_clk_A clkbuf_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_2561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_4272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20000__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18744__A1 _28146_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_850 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21343__A3 _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26806__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_2583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_861 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32540_ _32540_/Q _32540_/CLK _32540_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4010_A _29203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15558__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_771 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_872 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17474_ _17474_/X _26470_/B _17474_/C _31051_/Q _31052_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_259_4020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14686_ _14685_/X _14675_/S _15629_/A2 _28944_/Q _14686_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16755__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20647__S _20647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_883 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_894 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23023__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19213_ VGND VPWR _19213_/X _19311_/B _22088_/B1 _27913_/Q _19212_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_53_2458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_4_0_0_core_clk_A clkbuf_4_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16425_ _15771_/B _16646_/A2 _16425_/X _16434_/A2 _29256_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_281_1480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14766__C1 wire1228/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32471_ _32471_/Q _32513_/CLK _32471_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_1442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18117__S _18117_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24293__A2 wire1351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21676__A_N _17027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17021__S wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29057__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19839__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31422_ _31422_/Q _32532_/CLK _31422_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19144_ _28360_/Q _19143_/X _19144_/Y _19178_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__29856__D _29856_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16356_ _16356_/X _16346_/X _16350_/X _16355_/X wire921/X _16342_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__21051__B _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_4952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20303__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16507__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15307_ VGND VPWR _15307_/X _15304_/X _15306_/X _15630_/A1 _15307_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_26_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17956__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31353_ _31353_/Q _31738_/CLK _31353_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_48_3921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19075_ _28226_/Q _19075_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_16287_ _16965_/A2 _16952_/A1 _32055_/Q _16287_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_157_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17180__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24045__A2 _19786_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25242__A1 hold136/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30034__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18026_ VGND VPWR _18047_/S wire3897/X _27958_/Q _27958_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30304_ _30304_/Q _30314_/CLK _30304_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15238_ _15238_/X _15727_/A2 _15740_/B1 _29570_/Q _15265_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_174_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15730__A1 wire1134/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20382__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31284_ _31284_/Q _31998_/CLK _31284_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput504 wire4053/X la_output[116] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26990__A1 _31980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19456__B _31343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32405__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22163__A _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28081__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_59 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput515 wire4025/X la_output[126] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_22_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput526 _31111_/Q la_output[20] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_275_1262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13785__A _31161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21803__A1 _21713_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput537 _31121_/Q la_output[30] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30235_ _30235_/Q _30471_/CLK _30235_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15169_ VGND VPWR _15169_/X _15166_/X _15509_/A1 _15640_/A1 _15168_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xoutput548 _28717_/Q la_output[40] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_170_3859 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput559 _28727_/Q la_output[50] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_4_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_16_1_core_clk clkbuf_opt_16_1_core_clk/X clkbuf_opt_16_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16286__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27165__S _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30166_ hold209/A _30424_/CLK _30166_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_29_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19977_ VGND VPWR wire1321/X wire2308/X _24941_/B _19977_/X wire3427/X wire1376/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_42_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30184__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14297__A1 _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18787__S _18797_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14297__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22359__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23556__A1 _30477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16691__C1 wire1449/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_4669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18928_ _18927_/X _19318_/B1 _19201_/A2 _28318_/Q _18928_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_248_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30097_ _30097_/Q _30386_/CLK _30097_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_97_3042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_2581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16038__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire813_A wire814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18432__A0 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17235__B2 _29448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18859_ _18858_/X _19380_/B1 _19380_/A2 _28152_/Q _18859_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_228_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_5078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23308__A1 _30286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21870_ _21641_/B _21869_/X _21866_/A _21712_/X _21870_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_75_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17423__C _17423_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16994__B1 _21676_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20821_ VGND VPWR _20821_/S _29334_/Q _27710_/A1 _29334_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_3906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_20_core_clk_A clkbuf_leaf_20_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_1807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18196__C1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30999_ VGND VPWR _30999_/D _32032_/CLK _30999_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17538__A2 _17537_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18735__A1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19411__S _19416_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23540_ VGND VPWR _23560_/S hold421/A _30031_/Q _30461_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_140_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_771 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20752_ VGND VPWR _20752_/S wire1783/X _29267_/Q _29267_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23441__B _29373_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16746__B1 wire894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20557__S _20562_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24808__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22338__A _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18535__B _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2784 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16210__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23471_ VGND VPWR _23497_/S wire4152/X _30422_/Q _23471_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_104_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20683_ _20683_/X _19785_/X _24826_/B _26542_/A _31058_/Q _14147_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__23160__C _23160_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1070_A wire1074/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18027__S _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27848__B _27848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_1553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25210_ _26498_/A _25209_/X _25254_/A2 wire3497/X _31230_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26752__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1168_A wire1170/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18499__A0 _28272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22422_ VGND VPWR _22598_/S _29976_/Q _22037_/Y _29976_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_3519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23492__A0 _31950_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22295__A1 _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_5524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26190_ VPWR VGND _31583_/D _26190_/B _26236_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_260_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_5595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24553__A _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_2137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25141_ VGND VPWR _25139_/B _31205_/Q _31206_/Q _25141_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_12_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20845__A2 _20847_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22353_ _29926_/D wire3160/X _30465_/Q hold440/A _14365_/Y VGND VPWR _22352_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19647__A _19785_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17171__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25233__A1 _29857_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24036__A2 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3577_A _30867_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18551__A _30427_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25233__B2 _31233_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21304_ _21549_/B wire3690/X _30477_/Q _21288_/B _21305_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__22047__A1 _22046_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_3603 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32085__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25072_ _25810_/C _25071_/X _25082_/A2 _31179_/Q _31179_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_47_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22284_ _22284_/Y hold230/A _23307_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__20292__S _20292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26981__A1 _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25087__C _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout795_A _24892_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18270__B _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_119_core_clk _30783_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_28900_ _28900_/Q _32332_/CLK _28900_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30527__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24023_ _30868_/D _24021_/X _24199_/B1 _24018_/X _24022_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_251_2902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21235_ VGND VPWR _23342_/A _29714_/Q hold216/A _29697_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_191_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold240 hold240/A hold240/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_134_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3744_A _14534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29880_ VGND VPWR _29880_/D _31961_/CLK _29880_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xhold251 hold251/A hold251/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_4801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1502_A wire1506/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19463__A2 _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3204 VPWR VGND _21486_/B _21464_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold262 hold262/A hold262/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_63_2031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2419 VPWR VGND _20666_/A _14135_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28574__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold273 hold273/A hold273/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16277__A2 _14104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28831_ _28831_/Q _32327_/CLK _28831_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xhold284 hold284/A hold284/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25384__A _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3237 VPWR VGND _15770_/C wire3237/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_232_3079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18671__B1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21166_ VGND VPWR _21166_/S _29609_/Q _27624_/A1 _29609_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26733__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold295 hold295/A hold295/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_4845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22801__A _29891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14303__B _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20167__C_N _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23547__A1 _30468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31536__D _31536_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout731 _26243_/B1 _24820_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_20117_ _26861_/C1 _20116_/Y _20122_/A _28704_/Q _28704_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_4709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3911_A wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28762_ _28762_/Q _32332_/CLK _28762_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19215__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2547 VPWR VGND _20446_/S _20447_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25974_ _25974_/C _31503_/D _26153_/A _25974_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 X_21097_ VGND VPWR _21097_/S _23671_/A1 _29548_/Q _29548_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_4108 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_3765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1813 VPWR VGND wire1813/X _19267_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout764 _24209_/B1 _24199_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30677__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22520__B _22520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18423__A0 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16029__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout775 wire777/A _26833_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_115_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27713_ VGND VPWR _27719_/S _19721_/A _32446_/Q _32446_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_286_690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21022__A2 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout786 VPWR VGND _26015_/A _25982_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24925_ _24925_/Y _24925_/B _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_98_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21417__A _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20048_ _20048_/Y _24945_/B wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_132_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19620__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31922__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28693_ VGND VPWR _28693_/D _30630_/CLK _28693_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_164_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1871_A _26329_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20230__A0 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15237__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1969_A _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17106__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1879 _20654_/B _19785_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_27644_ VGND VPWR _27647_/S wire2234/A _32385_/Q _32385_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_210_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2043_A wire2044/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15788__A1 wire1043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24856_ _24856_/C _24856_/Y _26559_/A _31069_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__25831__B _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input126_A la_input[58] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20781__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16985__B1 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22947__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20040__B _24937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22507__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_102 _19045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_113 _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15252__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23807_ _30830_/D _23813_/C _23807_/A _23807_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_233_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3277_A wire3278/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_124 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27575_ _27573_/X _27594_/B _27574_/Y _27575_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_24787_ _24782_/Y _23679_/Y _24787_/Y _24783_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_135 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21999_ wire3922/X hold428/A _22000_/A _21999_/S1 _21629_/A _21672_/A hold267/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__18726__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_146 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29314_ _29314_/Q _32434_/CLK _29314_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_157 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24447__B _25197_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14540_ _14540_/X _14539_/X hold364/A wire1541/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XANTENNA_wire2210_A _19738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26526_ _26533_/D _26537_/A _31748_/D _26526_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA_168 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23738_ _23738_/X _24205_/B1 _31801_/Q _25884_/B _31797_/Q wire1875/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_205_4895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_179 _23985_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20467__S _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21730__B1 _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16201__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29245_ _29245_/Q _30865_/CLK _29245_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[9] max_length2363/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14471_ _14471_/Y _27485_/D _30436_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26457_ _26441_/B _31700_/Q _26447_/X _26459_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_35_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23070__C _23170_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23669_ VGND VPWR _23669_/S wire1783/X _30799_/Q _30799_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_44 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_328_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24275__A2 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16210_ _16725_/A _16725_/C _28784_/Q _16210_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30057__CLK _30057_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25408_ _25408_/C _25408_/Y _31285_/Q _25408_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_input91_A la_input[26] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22286__A1 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23483__A0 _30428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17190_ _17190_/X _21659_/A _17190_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 X_29176_ _29176_/Q _32322_/CLK _29176_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15960__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19687__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26388_ _26188_/A _26387_/Y _26386_/X _31681_/Q _31681_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__31302__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32428__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19151__A1 _19150_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16141_ _16141_/X _29110_/Q _16448_/A2 _16448_/A3 _16249_/S _16140_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28127_ _28127_/Q _30276_/CLK _28127_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25339_ _31270_/D _25337_/X _26242_/A _25338_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__24027__A2 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25278__B _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25224__A1 hold97/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2677_A wire2678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17701__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2223 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22038__A1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16072_ _16815_/A2 _16072_/X _16071_/X wire951/A _30894_/Q _16805_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28058_ _28058_/Q _28326_/CLK _28058_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15173__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28917__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24432__C1 _24434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15023_ _15023_/X _15640_/C1 _15016_/X _15018_/X wire1093/A _15022_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_19900_ VGND VPWR _20100_/B _26694_/D _25980_/A2 _19900_/X _27075_/C1 _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_27009_ VGND VPWR _27009_/X _27009_/B _27009_/A _31987_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_9_2009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3610 _26866_/A1 wire3616/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17077__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2844_A _21713_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21797__A0 _17044_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2800 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18257__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19454__A2 _19447_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30020_ VGND VPWR _30020_/D _32277_/CLK _30020_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_81_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19831_ VGND VPWR _26876_/B _19520_/B wire1330/A _19831_/X _27028_/A _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22133__D _22133_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5007 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23807__A _23807_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25527__A2 _19456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20930__S _20930_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold2_A hold2/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15476__B1 _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23538__A1 _30459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27941__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_216_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2008_A _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19762_ _19776_/B _19718_/A _20171_/B _19762_/X _19776_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__19206__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16974_ _30318_/Q _16973_/X _29986_/Q _30370_/Q _16974_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_268_178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3782 VPWR VGND wire3782/X _30029_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire4058_A _28664_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2986 _18467_/X _18497_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_270_1181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3793 _17243_/S _29944_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_285_2508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_4219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18414__A0 wire3871/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17217__A1 _29903_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23018__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18713_ _18712_/X _19310_/B1 _18700_/X _18690_/X _18713_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA__22210__A1 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17217__B2 wire3926/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27713__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15925_ _15925_/X _28912_/Q _16026_/A2 wire1458/X _16040_/A2 _15924_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_7_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22210__B2 _30106_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17524__B _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31971_ _31971_/Q _31971_/CLK _31971_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19693_ _27071_/C1 _19692_/Y _19695_/A2 _28507_/Q _28507_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_output512_A wire4035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_2665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20221__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput8 input8/X input8/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_209_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_4203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_29_0_core_clk clkbuf_opt_29_1_core_clk/A clkbuf_5_26_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_94_3248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18644_ VGND VPWR _18655_/S _18644_/A1 _28357_/Q _28357_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30922_ _30922_/Q _31760_/CLK _30922_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_59_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15779__A1 wire3272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15856_ _15851_/X wire890/X _16522_/B1 _15855_/X _15856_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_181_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20772__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_367_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24638__A _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16440__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14807_ wire1533/X _14816_/A1 _28811_/Q _14807_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_98_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_3524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30853_ _30853_/Q _32379_/CLK wire813/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18575_ VGND VPWR _18575_/X _18574_/X _20914_/C _18541_/X _30433_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_127_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15787_ VGND VPWR _15957_/S _15786_/X _15785_/X _15787_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16855__S wire979/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23171__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22513__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19914__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23710__B2 _31467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17526_ _17863_/C _17526_/Y _17863_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_248_1695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14738_ VGND VPWR _14935_/S _30891_/Q _29169_/Q _14738_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20524__A1 _29041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20377__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1408_A _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30784_ _30784_/Q _32122_/CLK _30784_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_2282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19390__A1 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_680 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_691 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32523_ _32523_/Q _32523_/CLK _32523_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_4462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28447__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17457_ _17474_/C _17457_/B _26470_/B _17457_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA_clkbuf_leaf_104_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14669_ VGND VPWR _14818_/S _29305_/Q _28743_/Q _14669_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14203__A1 _30057_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27668__B _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23069__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24266__A2 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16743__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16408_ VGND VPWR _16408_/X _16925_/B1 _16727_/B1 _16405_/X _16407_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23474__A0 _31941_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22277__A1 _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32454_ _32454_/Q _32473_/CLK _32454_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14754__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15951__A1 _28777_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19678__C1 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17388_ VGND VPWR _17387_/X wire2025/X _17389_/A hold64/X _17447_/B2 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA__22592__S _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19142__A1 _28069_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_4722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31405_ _31405_/Q _32412_/CLK _31405_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19127_ _28229_/Q _19127_/X _19200_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_max_length2809_A _27167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16339_ wire1547/A _14518_/A _29286_/Q _16339_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17153__A0 _17152_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32385_ _32385_/Q _32401_/CLK _32385_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24018__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25215__A1 _31363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19693__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22605__B _22617_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28597__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_283_core_clk _30470_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_277_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire763_A wire763/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_255_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19058_ _19179_/A2 _27937_/Q _19057_/X _19058_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15164__C1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31336_ _31336_/Q _32127_/CLK _31336_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15703__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29842__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_5022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput301 _13963_/Y la_iena[49] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_10_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21001__S _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23777__A1 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_212_core_clk _31694_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xoutput312 _13953_/Y la_iena[59] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_18009_ VGND VPWR _18015_/S wire3839/X _27943_/Q _27943_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput323 _14007_/Y la_iena[69] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_66_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31267_ _31267_/Q _31998_/CLK _31267_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_135_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput334 _13997_/Y la_iena[79] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_192_1934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19445__A2 _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14404__A _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_Di0[19] wire2697/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_4108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17418__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput345 _13987_/Y la_iena[89] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_170_2911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput356 _14041_/Y la_iena[99] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24820__B _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21020_ VGND VPWR _21020_/S _29485_/Q _27709_/A1 _29485_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18653__A0 _28366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput367 _13936_/Y la_oenb[108] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30218_ _30218_/Q _30412_/CLK _30218_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_153_1918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_4977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_1_0_3_core_clk clkbuf_1_0_4_core_clk/A clkbuf_1_0_3_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__23717__A _23717_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26715__A1 hold431/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25518__A2 _19429_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput378 _13926_/Y la_oenb[118] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_135_3798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_3620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31945__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19850__C1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31198_ _31198_/Q _31737_/CLK _31198_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput389 _13811_/Y la_oenb[12] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22621__A _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20460__A0 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15467__B1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23529__A1 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26746__A_N _31788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19406__S _19406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1108_A _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30149_ _30149_/Q _32464_/CLK _30149_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29992__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_2365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26191__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_4136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22340__B _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_2387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18405__A0 hold475/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17208__B2 _21462_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27623__S _27627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_1997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22201__B2 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22971_ _31402_/Q _20367_/C _31405_/Q _22971_/X _31401_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_0_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23155__C _29728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20212__A0 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17759__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21106__B1_N _22433_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16416__C1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24710_ _24704_/Y _24709_/X _24705_/Y _24706_/X _24716_/A _24700_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111o_4 XFILLER_0_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21922_ _14365_/B _21922_/X _22065_/B1 _22969_/S _23180_/A _17134_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_3_2175 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27140__A1 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25690_ _25691_/B _25693_/B _25692_/B _25693_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25651__B _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20763__A1 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_143_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16967__B1 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29222__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24548__A _31297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16431__A2 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24641_ _24641_/Y _26464_/C _31680_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_19_2106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_2436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14978__C1 _29282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21853_ _21853_/Y _21853_/B _21853_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_71_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18546__A _18546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1285_A wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19366__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23701__A1 _31500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22504__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24267__B _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_3608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20804_ VGND VPWR _20821_/S _29317_/Q _27693_/A1 _29317_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27360_ VGND VPWR _27366_/S _32214_/Q _27268_/X _32214_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24572_ _24572_/B _24551_/B _25197_/D _24572_/X _24572_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20515__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16719__B1 _30796_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21784_ _21784_/X _21846_/A _23061_/D _21783_/X _14408_/B VGND VPWR _21782_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__20287__S _20292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_816 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31325__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26763__A _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23602__D _24881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19381__A1 _19378_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26311_ _26311_/Y _26327_/B _26880_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23523_ VGND VPWR _28400_/Q _30448_/Q _23523_/S _23523_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_20735_ VGND VPWR _20747_/S _27690_/A1 _29250_/Q _29250_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27291_ VGND VPWR _27292_/S _32155_/Q _27278_/X _32155_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19920__A3 _20120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29372__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3694_A _30348_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17392__B1 input187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1452_A wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24257__A2 _24256_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26651__B1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29030_ _29030_/Q _32438_/CLK _29030_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26242_ VPWR VGND _31609_/D _26242_/B _26242_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__22268__A1 _22243_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23454_ _14099_/Y _23454_/X _29379_/Q _29833_/Q _13835_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA_hold121_A hold121/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15942__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14745__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23465__B1 _23450_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19669__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20666_ _20666_/A _20673_/C _20673_/D _25020_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_84_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_3845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22405_ VGND VPWR _22405_/S _29961_/Q _21856_/B _29961_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_3233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26173_ _26173_/X _31480_/Q _26173_/B1 _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_216_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31475__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23385_ VGND VPWR _23385_/S _30363_/Q _29681_/Q _30363_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_5294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24009__A2 wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25206__A1 hold119/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20597_ VGND VPWR _20617_/S _27245_/A0 _29112_/Q _29112_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_49_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25124_ _31200_/D _25122_/Y _25181_/B _25123_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_136_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16498__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22336_ _22336_/Y _22328_/A _18215_/D _22338_/A _18212_/Y _18163_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__15155__C1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18892__B1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27964__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22234__C _22241_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25055_ _25065_/A _24925_/B _25055_/X _25069_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29932_ _29932_/Q _31914_/CLK _29932_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_22267_ _18664_/X _22266_/X _22267_/X _30114_/Q wire2286/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15170__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19436__A2 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14314__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_4140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3001 VPWR VGND _18452_/S _18443_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23049__D _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24730__B _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24006_ _24006_/X wire1298/X wire4074/X _31167_/Q _19994_/X VGND VPWR _24005_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__17447__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3012 VPWR VGND _18423_/S _18431_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2216 _19554_/Y _19734_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_21218_ VGND VPWR _21222_/B _21218_/B _22553_/A _22553_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_191_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_4113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17447__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29863_ VGND VPWR _29863_/D _32067_/CLK hold453/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xfanout2227 VPWR VGND _27664_/B _19546_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20750__S _20754_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19987__A3 wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22198_ _22197_/X _22509_/C1 wire828/X _29828_/Q _29828_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24222__S _24242_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_182_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20451__A0 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15458__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2300 VPWR VGND wire2300/X _17911_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1504 wire1506/A _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_232_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3056 VPWR VGND _18078_/S _18085_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_3139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28814_ _28814_/Q _32421_/CLK _28814_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2322 VPWR VGND wire2322/X wire2323/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_212_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25914__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2160_A _19768_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3067 VPWR VGND _18046_/S _18048_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21149_ VGND VPWR _21169_/S _29592_/Q _27242_/A0 _29592_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_246_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2333 wire2334/X wire2333/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_99_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29794_ hold250/A _30460_/CLK _29794_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire3078 VPWR VGND _18017_/S _18018_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1537 VPWR VGND _16415_/A2 wire1539/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3089 VPWR VGND _17923_/S _17946_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_4528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2355 VPWR VGND wire2355/X wire2356/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24193__A1 _28675_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1621 VPWR VGND wire1621/X wire1622/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20689__C _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2366 VPWR VGND wire2366/X wire2367/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24193__B2 _31185_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25842__A _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28745_ _28745_/Q _32113_/CLK _28745_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_13971_ _28526_/Q _13971_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25957_ _25956_/X _26179_/B1 _31500_/Q _25935_/X _31492_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2377 _14177_/Y wire2377/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20203__A0 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1643 VPWR VGND _27100_/B wire1643/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2388 VPWR VGND wire2388/X _14171_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_1227 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14681__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_87_core_clk _31578_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xwire1654 VPWR VGND _19700_/C _24888_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2399 VPWR VGND _20657_/D _19811_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23940__A1 wire3631/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15710_ _28867_/Q _15709_/X _15710_/Y _15702_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__32100__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24908_ _25687_/B1 _24907_/Y _24955_/A wire3513/X _31098_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_3849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1676 VPWR VGND wire1676/X _18766_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_1526 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28676_ _28676_/Q _31462_/CLK _28676_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2425_A _19784_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16690_ _16689_/X _16676_/X _16941_/C _16680_/X _16690_/Y _16684_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_2 XFILLER_1_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20754__A1 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16958__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1687 VPWR VGND wire1687/X _17893_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25888_ _25904_/A _25887_/Y _25911_/B1 _31461_/Q _31461_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_16_core_clk _32137_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xwire1698 VPWR VGND wire1698/X wire1698/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24458__A _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1548 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_4394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_2867 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15641_ VGND VPWR _15641_/X _15641_/B _15641_/A _15735_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__26485__A3 _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27627_ VGND VPWR _27627_/S _27707_/A1 _32369_/Q _32369_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14969__C1 _28919_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24839_ _24847_/C _31064_/D _26539_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__32097__D _32097_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16675__S wire979/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_164_3972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24496__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23153__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17360__A _17360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_5246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18360_ VGND VPWR _18365_/S wire3831/X _28138_/Q _28138_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_3092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15572_ _15566_/Y _15735_/B _15564_/Y _15749_/C1 _15572_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22051__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27558_ _25641_/B _32257_/Q _27558_/X _25643_/B _32249_/Q _32265_/Q _32241_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__20506__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20197__S _20202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_1857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32250__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18175__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17311_ _17447_/A1 input204/X _17311_/X _17447_/B2 hold29/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_180_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_70 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14523_ _14524_/C _14520_/Y _14518_/Y _14519_/Y _18562_/A _14085_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 X_26509_ VGND VPWR _32577_/D _26509_/D _26510_/C _26509_/C _26539_/A VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_32_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16186__A1 _28919_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18291_ _18290_/Y _18269_/X wire3174/X _18291_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XPHY_92 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27489_ VGND VPWR _27505_/S _27489_/A1 _32304_/Q _32304_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25445__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31818__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17242_ VGND VPWR _17243_/S _28306_/Q hold245/A _17242_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29228_ _29228_/Q _32322_/CLK _29228_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14454_ _23393_/C _14455_/C _14453_/Y _30329_/Q _29450_/Q _14452_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_243_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22259__B2 _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14736__A2 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15933__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20925__S _20928_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25996__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29865__CLK _31761_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19124__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19611__A_N _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_4911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23301__S _23301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21610__A _30220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21467__C1 wire3800/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17173_ _17234_/A1 _30397_/Q _17173_/X _17234_/B2 _29437_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_wire2961_A _18654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29159_ hold379/A _31912_/CLK _29159_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17135__B1 _21619_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14385_ _24434_/C _14388_/C _31017_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_234_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3801_A _29910_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire951 VPWR VGND wire951/X wire951/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19675__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27000__C _27001_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19718__C _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire962 VPWR VGND wire962/X wire962/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_275_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16124_ VGND VPWR _16124_/X _16121_/X _16123_/X _16124_/A1 _16816_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__17686__A1 _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32170_ _32170_/Q _32538_/CLK _32170_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27708__S _27709_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18883__B1 wire1674/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26945__A1 hold469/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30842__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31968__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire995 VPWR VGND wire995/X wire996/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26945__B2 wire2745/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_5342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15697__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19843__D_N wire1629/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31121_ VGND VPWR _31121_/D _32546_/CLK _31121_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_6_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16055_ _16055_/X _30778_/Q _16828_/A2 _16832_/A3 _16068_/S _16054_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_215_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32560__D input40/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1093_A wire1093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14224__A _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15006_ _15332_/A2 _15006_/X _15005_/X _15356_/A2 _29314_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__17438__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31052_ VGND VPWR _31052_/D _31750_/CLK _31052_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26158__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3451 VPWR VGND wire3452/A wire3454/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_187_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27009__A _27009_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19734__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24971__A3 _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20442__A0 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15449__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30003_ _30003_/Q _30445_/CLK _30003_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3484 _31379_/Q _25643_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16646__C1 _29060_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19814_ _19813_/X _28559_/Q _28559_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA_wire1260_A _24034_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30992__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18130__S _18139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26173__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2761 VPWR VGND _24284_/A _19641_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20993__A1 _29458_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2772 wire2781/X _27698_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29245__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24184__A1 _28546_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_26_0_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3590 VPWR VGND wire3590/X _30858_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_111_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27443__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24184__B2 _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19745_ _25703_/A _19744_/X _19772_/A _28529_/Q _28529_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_61_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25752__A _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17254__B _30766_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16957_ wire992/X _16957_/X _16956_/X _16736_/S _28435_/Q _16960_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_284_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_3695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14672__B2 _14671_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22734__A2 _22627_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15908_ VGND VPWR _15908_/X _16249_/S wire1035/X _15905_/X _15907_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23931__B2 _30745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_5086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31954_ _31954_/Q _31961_/CLK _31954_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_37_4131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19676_ _27070_/C _19680_/A _26801_/B _19676_/X _26781_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20745__A1 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30222__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22587__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16888_ _16888_/X _28770_/Q _16947_/A2 _16928_/A3 _16928_/B1 _16887_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__31348__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2661_A _14186_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_4948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15216__A3 _15215_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17610__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25133__B1 _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18627_ VGND VPWR _18655_/S wire3915/X _28340_/Q _28340_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30905_ _30905_/Q _32372_/CLK _30905_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_4055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17610__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15839_ wire1004/X wire1476/X _28774_/Q _15839_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_0_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29395__CLK _30233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31885_ _31885_/Q _32573_/CLK _31885_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23703__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_2366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25684__A1 _25683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2567_A _19387_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16964__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22498__A1 _22512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18558_ _18558_/X _30432_/Q _23231_/A _30433_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_244_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30836_ _30836_/Q _31937_/CLK _30836_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_3192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21504__B _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_696 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19363__A1 _27920_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_5_2_core_clk clkbuf_opt_5_2_core_clk/X clkbuf_opt_5_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_max_length2926_A _20407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17509_ _17506_/Y _17508_/X _17507_/B _31761_/Q _17509_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_221_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_5567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30372__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16177__A1 _29079_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19902__A3 wire2174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31498__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18489_ VGND VPWR _18489_/S _23291_/A1 _28262_/Q _28262_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30767_ _30767_/Q _31763_/CLK _30767_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_219_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17374__B1 _17374_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25436__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25173__A_N _25180_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_13 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24815__B _31704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20520_ VGND VPWR _20528_/S _29037_/Q _27234_/A0 _29037_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_3108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32506_ _32506_/Q _32545_/CLK _32506_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_24 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23447__B1 wire3996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15924__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_35 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25987__A2 _19535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30698_ hold392/A _32548_/CLK input94/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19115__A1 _27876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_46 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23211__S _23224_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_57 _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20451_ VGND VPWR _20452_/S _28971_/Q _23671_/A1 _28971_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_68 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23998__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32437_ _32437_/Q _32437_/CLK _32437_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_179_2254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27189__A1 _32086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_79 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17677__A1 _31720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23170_ _23170_/B wire3739/X _23180_/A _23170_/X _23170_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_179_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_4563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27618__S _27618_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17677__B2 _31719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20382_ VGND VPWR _20384_/S _25033_/B _28906_/Q _28906_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20130__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25739__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32368_ _32368_/Q _32429_/CLK _32368_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17429__B _17429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26936__B2 wire2709/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2874 VGND VPWR VGND VPWR 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VPWR wire2668/X _19522_/A wire749/A _26860_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27361__A1 _32215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18040__S _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_3_0_1_core_clk clkbuf_3_0_2_core_clk/A clkbuf_3_0_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__24175__A1 _31119_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25811_ _27854_/C _31429_/Q VPWR VGND _31406_/Q _25825_/S VGND VPWR NF_sky130_fd_sc_hd__mux2_8 XANTENNA__27353__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 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XFILLER_16_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24555_ _31197_/Q _31196_/Q _24560_/B _31201_/Q _31200_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_90_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21767_ VGND VPWR _21767_/S _21712_/X _21709_/Y _21767_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17365__B1 _17363_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1834_A _18192_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14309__A _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23506_ VGND VPWR _23516_/S _23505_/X _31957_/Q _30439_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20718_ VGND VPWR _20719_/S _29234_/Q _27261_/A0 _29234_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_4062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27274_ _27274_/X _27280_/C _31425_/Q hold487/A _27280_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__15376__C1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15915__A1 _28776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24486_ _31355_/Q _31353_/Q _31352_/Q _24505_/D _31354_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XANTENNA__20745__S _20749_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30865__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15915__B2 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21698_ _21698_/Y _21698_/A _21698_/C _21698_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_134_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24217__S _24220_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19106__A1 _28390_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_1131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29013_ _29013_/Q _32432_/CLK _29013_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_197_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23989__A1 wire4079/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_134_core_clk _32355_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_81_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29118__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26225_ _31601_/Q _26227_/A2 _26226_/B _32291_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23989__B2 _31165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23437_ _23437_/X wire3997/X _29815_/Q _13848_/Y _14095_/Y VGND VPWR _23436_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XPHY_1278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20649_ VGND VPWR _20650_/S _27709_/A1 _29195_/Q _29195_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_133_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input193_A mprj_dat_i[27] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15391__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19657__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3554 wire3555/X _17446_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_7_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_3063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29954__D _29954_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17668__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14170_ _14170_/Y _14169_/X _14167_/S hold166/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 X_26156_ _26771_/A _26155_/Y _26159_/B _31567_/Q _31567_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_7_5139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26388__C1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25837__A _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18865__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17668__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20121__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23368_ VGND VPWR _23372_/S _30346_/Q hold496/X _30346_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26927__A1 _31951_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22960__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26927__B2 wire2380/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2864 VPWR VGND _21116_/S _21136_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15679__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20672__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25107_ _25109_/B _24543_/D _24502_/X _25173_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_66_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2875 VPWR VGND _21097_/S _21098_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_234_2204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22319_ VGND VPWR _23388_/S _29905_/Q _29164_/Q _29905_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2886 VPWR VGND _20625_/S _20638_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_7_3704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15143__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26087_ _26087_/X _14399_/B _24380_/A _26120_/A2 _26085_/Y _26086_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA_wire2375_A wire2376/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2897 VPWR VGND _20606_/S _20613_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23299_ VGND VPWR _23299_/S _29870_/Q _30281_/Q _30281_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25060__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16340__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24402__A2 _31002_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28142__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29268__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18617__A0 _28331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14351__B1 wire3987/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29915_ _29915_/Q _31904_/CLK _29915_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_175_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22413__A1 _29969_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21216__A2 _24447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25038_ _25660_/A _25037_/X _25082_/A2 _13784_/A _31162_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_136_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input54_A la_input[108] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1563 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15694__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16891__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21847__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20480__S _20480_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23610__B1 _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19554__B _19554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20424__A0 _21070_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_763 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_1998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19046__S _19046_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18093__A1 wire3896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17860_ _17874_/A2 _31729_/Q _17859_/X _17860_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xfanout1312 _20060_/X _20061_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_29846_ VGND VPWR _29846_/D _31536_/CLK hold271/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19290__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26155__A2 _19574_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1323 wire1328/A _25738_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_239_638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17435__A4 _30850_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2130 VPWR VGND wire2130/X wire2130/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26668__A _26668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2141 VPWR VGND _26896_/B _20120_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16811_ VGND VPWR _16812_/B _16843_/A2 _16816_/B1 _16810_/X _16809_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xfanout1345 _19713_/X _19715_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27263__S _27263_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16643__A2 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length3776_A _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2152 VPWR VGND _26890_/B _20114_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1356 _19642_/X _26773_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_56_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25902__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17791_ VGND VPWR _31731_/Q _17789_/X _17790_/Y _17791_/X _17490_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 Xwire2163 _20042_/B _26884_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__28292__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29777_ hold449/A _30319_/CLK _29777_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1367 wire1374/X _19710_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26989_ _13733_/Y _26999_/A _27000_/D _31979_/D _26986_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__14654__A1 _28839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2174 VPWR VGND wire2174/X _19601_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1378 VPWR VGND _20128_/A wire1380/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_225_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1440 wire1441/X wire1440/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__15851__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2185 VPWR VGND _25059_/B _19756_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1389 VPWR VGND _24139_/A2 wire1392/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23913__A1 _28520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19530_ _19530_/B _19530_/Y _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_75_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19570__A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23913__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19042__B1 _19041_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16742_ _16965_/A2 _16952_/A1 _32438_/Q _16742_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28728_ _28728_/Q _31119_/CLK _28728_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27104__A1 _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20188__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13954_ _28543_/Q _13954_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20727__A1 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23804__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_4781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25722__D _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25115__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21605__A _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19461_ _19456_/A _31343_/Q _19461_/X _28447_/Q _28448_/Q _31344_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_95_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16673_ _16878_/A2 _16878_/A1 _29231_/Q _16673_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28659_ VGND VPWR _28659_/D _31860_/CLK _28659_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_199_5234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30395__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14406__A1 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13885_ _28612_/Q _13885_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_112_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18186__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24469__A2 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23126__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18412_ VGND VPWR _18425_/S _28187_/Q _18478_/A1 _28187_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31640__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15624_ _15435_/A _15624_/A1 _28109_/Q _15624_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_34_4359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19392_ VGND VPWR _19403_/S wire1833/A _28408_/Q _28408_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31670_ _31670_/Q _32427_/CLK _31670_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_108_2727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23677__B1 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14957__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_1925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17521__C _24817_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_1020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19345__A1 _28370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23141__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18343_ VGND VPWR _18359_/S wire3885/X _28121_/Q _28121_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30621_ _30621_/Q _31577_/CLK hold400/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_1091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21688__C1 _21624_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15555_ _15554_/X _15543_/S _15721_/A2 _28799_/Q _15555_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_201_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25418__A1 _31357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14219__A _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19896__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23692__A3 _19787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14506_ _30440_/Q _14506_/X hold244/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_50_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18274_ VGND VPWR _18333_/S _28099_/Q _27697_/A1 _28099_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30552_ hold371/A _31815_/CLK input48/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15906__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14709__A2 _14708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2063 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27011__B _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15486_ _16959_/A2 wire3303/X _29093_/Q _15486_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_275_5199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_4124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22436__A _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31790__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output677_A wire3108/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23031__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_4427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17225_ _22026_/B1 _21427_/C _21633_/A _22026_/A2 _29904_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 X_14437_ _21643_/A _21643_/B _21645_/A _14437_/Y _14436_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XFILLER_154_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17108__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput11 hold84/A hold83/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_30483_ _30483_/Q _30483_/CLK _30483_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18125__S _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22101__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput22 hold15/X hold16/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_253_4730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_49 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput33 hold87/X hold88/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_32222_ _32222_/Q _32259_/CLK _32222_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29864__D _29864_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15119__C1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput44 VGND VPWR input44/X irq[5] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__14590__B1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17156_ _22026_/B1 wire3933/X _17159_/B _21953_/A2 _22838_/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22o_4 XANTENNA__21455__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27438__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire770 VPWR VGND wire770/X wire770/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25747__A _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput55 VGND VPWR input55/X la_input[109] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_14368_ _31008_/Q _24418_/C _31009_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 Xinput66 VPWR VGND la_input[119] input66/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__26918__B2 wire2340/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire781 VPWR VGND wire781/X wire781/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24651__A _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput77 VGND VPWR input77/X la_input[13] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_193_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16107_ _16107_/X _16104_/X wire917/X wire1032/A _16106_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xinput88 VGND VPWR input88/X la_input[23] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__17964__S _17974_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31020__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32153_ _32153_/Q _32537_/CLK _32153_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32146__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput99 VGND VPWR input99/X la_input[33] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_154_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17087_ _17087_/X _17086_/Y _17085_/X _22756_/C _21679_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__26394__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14299_ _24602_/A _17882_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XFILLER_119_2845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18608__A0 _28322_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31104_ VGND VPWR _31104_/D _31436_/CLK _31104_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_7_4961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21207__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16038_ wire1533/X wire3276/X _29171_/Q _16038_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_149_5601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20390__S _20391_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32084_ _32084_/Q _32532_/CLK _32084_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_3044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22171__A _22185_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14597__A2_N _14596_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28635__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13793__A _31153_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22602__C _30345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18084__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31035_ _31035_/Q _31363_/CLK _31035_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_135_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26146__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_2801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19820__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31170__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24157__A1 wire4110/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32296__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17292__C1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire726_A wire726/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24157__B2 _28735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2580 wire2582/X _19346_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_78_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout2591 VPWR VGND _18284_/S wire2594/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_184_4846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18795__S _18795_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17989_ VGND VPWR _17991_/S wire3910/X _27923_/Q _27923_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22168__B1 _22167_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21218__C _22553_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14645__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30738__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15842__B1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23904__A1 _31125_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19033__B1 wire1942/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19728_ VGND VPWR _19543_/X _25738_/A _19715_/C _19728_/X _26153_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_2_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1890 _18706_/Y _20868_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_3281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_2040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23714__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28785__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23206__S _23221_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19659_ _26148_/A _19658_/X _19695_/A2 _28490_/Q _28490_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31937_ _31937_/Q _31937_/CLK _31937_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16398__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17595__A0 _17553_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout2851_A _21506_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25657__A1 hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26854__B1 wire753/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2949_A _20262_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22670_ _22671_/B _22654_/X _22657_/Y _22659_/A _22659_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XANTENNA__14948__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24248__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31868_ _31868_/Q _32552_/CLK _31868_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30888__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15070__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_5564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24826__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_3454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23132__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28015__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25421__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21621_ _21621_/Y _21621_/B _21621_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_206_3585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30819_ _30819_/Q _31937_/CLK _30819_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_1896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25409__A1 _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19887__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31799_ _31799_/Q _31896_/CLK _31799_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25409__B2 _31285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22486__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24880__A2 wire868/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_5627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24340_ _32017_/Q wire1374/X _24340_/X _31985_/Q _26364_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_21552_ _21549_/Y _21389_/D _21677_/B _21551_/Y _21552_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_195_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20565__S _20572_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_1216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_4636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17362__A3 _30837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20503_ VGND VPWR _20512_/S wire1792/X _29021_/Q _29021_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15659__S _15736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13968__A _28529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24271_ _24270_/X _23611_/A _24889_/A1 _23873_/D _25881_/D _30930_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111a_2 XFILLER_159_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21483_ _21425_/A _21482_/Y _21481_/X _21480_/Y _21484_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XANTENNA_wire3392_A wire3393/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16570__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18035__S _18049_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19639__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25290__C1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24632__A2 _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28165__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26010_ _26687_/B _26009_/Y _26014_/A2 _31520_/Q _31520_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_5_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26760__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23222_ VGND VPWR _23224_/S _30214_/Q _30144_/Q _30214_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14581__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20434_ VGND VPWR _20447_/S _28954_/Q _27692_/A1 _28954_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27348__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21446__A2 _21777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_3050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_5094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26909__A1 _26762_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20103__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29410__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17159__B _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24561__A _31209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27031__B1 _31996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_2_1_0_core_clk clkbuf_2_1_1_core_clk/A clkbuf_2_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_23153_ VGND VPWR _23153_/X _23151_/X _23152_/X _23150_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_157_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20365_ _31403_/Q _20367_/C _31404_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__25376__B _25381_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25188__A3 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26385__A2 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25042__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3657_A _30459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1415_A _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22104_ VGND VPWR _22104_/X _22104_/B _22104_/A _22104_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_235_2557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16873__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27961_ _27961_/Q _30367_/CLK _27961_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23084_ _30164_/D _23057_/S _23083_/X _30164_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__21829__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31513__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19374__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20296_ VGND VPWR _20302_/S _27679_/A1 _28837_/Q _28837_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26790__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20406__A0 _28928_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29700_ hold340/A _31914_/CLK _29700_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14884__B2 wire1508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18075__A1 wire3843/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26912_ wire3331/X hold491/X _26946_/A _31936_/Q _31936_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_22035_ _22035_/B _22035_/Y _22035_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__29560__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27892_ _27892_/Q _30294_/CLK _27892_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_3267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16086__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26488__A _26488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29631_ _29631_/Q _32316_/CLK _29631_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17822__A1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26843_ _26859_/C1 _26842_/Y wire749/X hold269/A _31871_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14636__A1 _29209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14311__B _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2907 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25896__A1 _19546_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1784_A _18320_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_4629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31663__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_2306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_290_202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19024__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17903__A _31078_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29562_ _29562_/Q _31507_/CLK _29562_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_3780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20709__A1 _29225_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26774_ _27131_/B _26773_/X wire777/X _31837_/Q _31837_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_229_682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold453_A hold453/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23986_ _23986_/X _23984_/X _28527_/Q _24163_/B2 _19718_/B VGND VPWR _23985_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_235_129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21906__B1 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19575__A1 wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28513_ _28513_/Q _31815_/CLK _28513_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25725_ VGND VPWR _25724_/X _25733_/D _25731_/B _25725_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_55_4050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22937_ _22937_/Y _22937_/B _22937_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_2_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_2973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29493_ VGND VPWR _29493_/D _30900_/CLK hold190/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_183_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23343__C _23343_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14738__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20185__A2 _19628_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23108__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_4364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16928__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17114__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_386_core_clk _30424_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_28444_ _28444_/Q _31896_/CLK _28444_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_196_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2123_A wire2124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25656_ VGND VPWR _31383_/Q _27395_/B _31384_/Q _25656_/X _25750_/A hold143/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__15597__C1 wire1104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22331__B1 wire3160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19878__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20983__B _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3165_A _23040_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24871__A2 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27326_ VGND VPWR _27330_/S _27417_/A0 _32184_/Q _32184_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15340_ _15340_/X _29323_/Q _15638_/B1 _15605_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_202_3950 VGND VPWR VGND VPWR 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VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22873__A1 _22809_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29433__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31584_ _31584_/Q _32032_/CLK _31584_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_3225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27261__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26064__A1 _26063_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26064__B2 _23618_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13788__A _13788_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26603__A3 _26595_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18257_ _18257_/Y _18256_/Y _18216_/X _22370_/A2 _18316_/A _18255_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 X_30535_ _30535_/Q _32016_/CLK hold370/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_86_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1592_A _25087_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15469_ _15468_/X _15466_/X _15705_/A1 _15467_/X _15469_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__24075__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15355__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout2432_A _27233_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25811__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24614__A2 _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17208_ _22026_/A2 _22905_/A _21586_/A _21462_/A _16993_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_4 XFILLER_64_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold62_A hold62/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30410__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18829__B1 _18828_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30466_ VGND VPWR _30466_/D _30466_/CLK hold483/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18188_ _29853_/Q _18158_/X _18188_/X _29861_/Q _18254_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_154_3201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15760__C1 _28772_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31536__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24381__A _24381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_5546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32205_ _32205_/Q _32523_/CLK _32205_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_151_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17139_ _22026_/A2 _23130_/C _29893_/Q _21630_/B1 _21925_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_217_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29583__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15107__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30533__D hold175/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26367__A2 _26335_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25024__C1 _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30397_ _30397_/Q _30399_/CLK _30397_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20150_ _25076_/C1 _20149_/Y _20162_/A2 _28719_/Q _28719_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_45_4296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32136_ _32136_/Q _32136_/CLK _32136_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_41_4138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22389__A0 wire2039/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_4891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18057__A1 wire3905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2899_A wire2901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30560__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31686__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23050__A1 _29652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19254__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20081_ _27131_/B _20080_/Y _20106_/A _28686_/Q _28686_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_230_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26119__A2 _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32067_ _32067_/Q _32067_/CLK _32067_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_2189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14330__A3 _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14412__A _14412_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25924__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17804__A1 _31731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16607__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25327__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31018_ _31018_/Q _31693_/CLK _31018_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17804__B2 _31730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25643__C _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31364__D wire756/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19414__S _19418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3510 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_289_2090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_1653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19006__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23840_ _30841_/D _24310_/B _23840_/A _23849_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_227_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3140_A _23518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17280__A2 _31906_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23889__B1 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19641__C _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15291__A1 wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19557__A1 _28460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23353__A2 _22552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18538__B _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27631__S _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25940__A _31485_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23771_ _31792_/Q _23768_/Y _26676_/A _31791_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_20983_ _23238_/B _20984_/C _30410_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_509 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21364__A1 _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22561__A0 wire3701/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25510_ _31335_/D _25510_/C _31334_/Q _28452_/Q _25510_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_281_1106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22722_ _22747_/C _22747_/B _21428_/A _22722_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_263_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26490_ _31704_/D _26487_/Y _31704_/Q _26483_/X _26488_/X _26489_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_143_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_50 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19309__A1 _28336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24556__A _31199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16240__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25441_ _25430_/A _31301_/Q _24502_/X _24543_/D _25441_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__31066__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22653_ _22656_/D _22663_/B _29714_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_0_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21116__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15594__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16791__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18554__A _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1365_A _19706_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24853__A2 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32311__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17045__C_N _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21604_ _21298_/A _21605_/C _21603_/C _21597_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21bai_1 X_28160_ _28160_/Q _30272_/CLK _28160_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_107_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25372_ _25370_/X _26544_/C1 _31277_/D _25371_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_198_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22584_ VGND VPWR _22586_/S _30353_/Q wire3706/X _22584_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27252__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14489__A2_N hold398/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26771__A _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18273__B _18273_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20875__A0 _29366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27111_ VGND VPWR _32033_/D _27117_/A2 _27110_/X _26829_/B _27051_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_219_4422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1724_A _22300_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24323_ _24322_/X _24357_/B1 wire1672/X _24353_/A1 _30964_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_121_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21535_ _17143_/B _21558_/D _21534_/X _21533_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_50_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28091_ _28091_/Q _32424_/CLK _28091_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2906 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15346__A2 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24066__B1 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28800__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_21_1_core_clk clkbuf_5_21_1_core_clk/X clkbuf_5_21_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_fanout1532_A wire1554/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25263__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17740__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23408__A3 _23407_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29926__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_5361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_5481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30090__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_4357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27042_ _27042_/B _31019_/Q _26988_/D _27042_/C _27050_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4b_4 XANTENNA__14554__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24254_ _31759_/Q _24253_/Y _31760_/Q _24255_/C _31758_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__15897__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21466_ _21466_/Y _21465_/A _21465_/B _14116_/Y _21463_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XFILLER_202_1866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15751__C1 _29100_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32461__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24081__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1212 VPWR VGND _14610_/B1 wire1210/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23205_ VGND VPWR _23221_/S _30197_/Q _30127_/Q _30197_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17099__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20417_ VGND VPWR _20417_/S _27709_/A1 _28939_/Q _28939_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18296__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24185_ _24185_/X _24186_/A3 _19927_/X _28642_/Q _31120_/Q _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__26358__A2 wire2206/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27555__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1234 _26936_/B1 wire1232/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__30903__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25015__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21397_ _21392_/Y _21389_/D _21677_/B _21393_/Y _21401_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23619__B _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24369__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14306__B1 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23136_ _23049_/A _21211_/B _23190_/B _30440_/Q _23136_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_4677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16846__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20348_ VGND VPWR _20348_/S _27698_/A1 _28888_/Q _28888_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28950__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3099 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_1500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28993_ _28993_/Q _32581_/CLK _28993_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14857__A1 _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25030__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18048__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23041__A1 hold455/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19245__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27307__A1 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27944_ _27944_/Q _28363_/CLK _27944_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23067_ hold162/A wire3171/A _23067_/X _30091_/Q _23067_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_153_2065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2073_A wire2074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20279_ VGND VPWR _20285_/S _24227_/A0 _28821_/Q _28821_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_2289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_4576 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14322__A _30335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input156_A la_input[85] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput201 mprj_dat_i[5] input201/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_248_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17256__C1 _17247_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput212 serial_data_2_in wire4190/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__25318__B1 _31267_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_6_5_core_clk clkbuf_opt_6_6_core_clk/A clkbuf_opt_6_5_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_265_5165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22018_ wire3779/X wire3802/X _22018_/X _22017_/X _21946_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_1_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27875_ _27875_/Q _30758_/CLK _27875_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24230__S _24238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16948__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3318 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29306__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15806__B1 _28404_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_1951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_2704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29614_ _29614_/Q _31937_/CLK _29614_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14840_ wire1541/X _14840_/X _30778_/Q _14550_/X _14102_/Y _15623_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_26826_ _26950_/C _26825_/Y _26833_/A _31863_/Q _31863_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17271__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2338_A wire2339/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15282__A1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19548__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26946__A _26946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_2415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29545_ _29545_/Q _32309_/CLK _29545_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_4860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15821__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14771_ _14771_/X _28778_/Q _14770_/X _15597_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_26757_ _26756_/Y _23599_/B _31831_/Q _26760_/B _31831_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_204_4702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23969_ _23969_/X wire1289/X wire4084/X _31163_/Q wire1600/A VGND VPWR _23968_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__20158__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17559__B1 _24260_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31409__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23895__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16510_ _15770_/C _15770_/A _16510_/X _16828_/A2 _29120_/Q wire1693/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_22_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17023__A2 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29679__D _29679_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25708_ _27636_/S _27793_/D _31398_/Q _27793_/B _27649_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_242_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_5204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29476_ _29476_/Q _32063_/CLK _29476_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17490_ _17479_/X _17490_/B _17863_/B _17490_/A _17490_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_243_4795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28330__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26688_ _26687_/D _31797_/Q _26687_/A _20665_/X _26688_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__29456__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26294__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25097__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18771__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28427_ _28427_/Q _32439_/CLK _28427_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16441_ _16387_/A _16387_/C _32430_/Q _16441_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_207_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25639_ _31379_/D _25641_/B _25638_/Y _25682_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22304__A0 _29149_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15585__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23801__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_103_3111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16782__B2 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24844__A2 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3547_A _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19160_ _30273_/Q _19160_/X _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_142_3182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16372_ _16815_/A2 _16372_/X _16371_/X _16843_/A2 _32316_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14793__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28358_ _28358_/Q _30758_/CLK _28358_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30433__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31559__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19279__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27243__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_cap2613 VPWR VGND _24618_/B _19518_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_237_4511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18111_ VGND VPWR _18113_/S wire3836/X _28040_/Q _28040_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19720__A1 _28517_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15323_ VGND VPWR _15323_/X _15322_/X _15321_/X wire1128/A _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27309_ VGND VPWR _27311_/S _27276_/X _32170_/Q _32170_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28480__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19091_ _19091_/X wire4161/X _19367_/B1 _19380_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_103_2443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24057__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28289_ _28289_/Q _30758_/CLK _28289_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27794__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26597__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25254__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23095__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30320_ _30320_/Q _32294_/CLK _30320_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18042_ VGND VPWR _18043_/S wire3841/X _27974_/Q _27974_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_4457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15254_ _15254_/X _15749_/C1 _15251_/X _15253_/X _15745_/A1 _15249_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_8_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20933__S _20933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3170 VPWR VGND _23192_/A2 wire3171/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_194_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24072__A3 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14205_ _24446_/A _14300_/A hold119/X _14205_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_253_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21815__C1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30251_ _30251_/Q _30474_/CLK _30251_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_4010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_4733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22083__A2 _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23280__A1 wire3879/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15185_ _15184_/X _15561_/C1 _15332_/A2 _28420_/Q _15185_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_250_5478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27546__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14931__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26349__A2 _26335_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18403__S _18432_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4088_A _28652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2480 VPWR VGND _20999_/S _21018_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22433__B _22433_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25557__A0 _31357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14136_ _14268_/B _14136_/X _14303_/A _29952_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__27716__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30182_ _30182_/Q _31938_/CLK _30182_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_2454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17527__B _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output542_A wire4017/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19993_ _23879_/A _20126_/B _23879_/B _19993_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_235_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25021__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14848__A1 _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18039__A1 wire3851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19236__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18944_ VGND VPWR _18944_/X _19357_/B _22088_/B1 _28060_/Q _18943_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_248_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14067_ _24820_/A _14067_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_4 XFILLER_0_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21049__B _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21043__A0 _29504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27849__A2 _25807_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26506__C1 _26508_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26559__C _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18875_ _18874_/X _19268_/S wire1993/X _28185_/Q _18875_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_79_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21594__A1 _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_5249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17262__A2 wire3592/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17826_ _17874_/A2 _31726_/Q _17825_/X _17826_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_3_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26521__A2 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1438_A wire1439/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_2499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15273__A1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16470__B1 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24532__A1 _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_237_core_clk _32329_/CLK clkbuf_opt_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_max_length2574_A _19418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27451__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25760__A _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17757_ _31727_/Q _17870_/A2 _17757_/X _31726_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__31089__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20149__A2 _19567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21346__A1 _29879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14969_ _15350_/A1 _16646_/A2 _14969_/X _15350_/B1 _28919_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__22543__A0 _30043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_10_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21346__B2 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32334__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23740__C1 _23739_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17014__A2 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18211__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16708_ _16703_/X wire894/X _16950_/A1 _16707_/X _16708_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27135__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1605_A _19861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21897__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17688_ _31721_/Q _17870_/A2 _17688_/X _31720_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__22595__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_2403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26285__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25088__A2 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5036 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_3279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18762__A2 wire1994/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31705_ _31705_/Q _32107_/CLK _31705_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19427_ _25513_/B _28437_/Q _31336_/Q hold285/A _28438_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_14_3804 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16639_ _16639_/X _16638_/X _16721_/A2 _16841_/C1 _23302_/C VGND VPWR _15765_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_223_677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15576__A2 wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30528__D input61/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24296__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23711__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28823__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16773__B2 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29949__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22608__B _22617_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19358_ _19357_/X _22088_/B1 _19358_/A2 _28175_/Q _19358_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 X_31636_ _31636_/Q _31722_/CLK _31636_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27367__D_N hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27234__A0 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32484__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20857__A0 _29357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_4273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21004__S _21008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18309_ VGND VPWR _18309_/S _28106_/Q _27624_/A1 _28106_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_195_3323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5318 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24048__B1 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31567_ _31567_/Q _32342_/CLK _31567_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19289_ _19289_/X _19288_/X _28076_/Q _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_219_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27785__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26588__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30926__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25245__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14407__A _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20128__B _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17474__A_N _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21320_ _21640_/C _21464_/B _21320_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_233_5632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30518_ hold466/A _32582_/CLK input66/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_255_4677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_3651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15879__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31498_ _31498_/Q _32115_/CLK _31498_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22624__A _29724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_79 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14126__B _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25260__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24063__A3 _19993_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15937__S wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21251_ VGND VPWR _23228_/S _29713_/Q _18552_/B _29713_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19409__S _19419_/S VGND VPWR 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VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16828__A2 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27626__S _27626_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21182_ VGND VPWR _21202_/S _29624_/Q _27242_/A0 _29624_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25935__A _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold455 hold455/A hold455/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_233_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold466 hold466/A hold466/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28203__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29329__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold477 hold477/A hold477/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__14839__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold488 hold488/A hold488/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_4415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20133_ VGND VPWR _19534_/B _19566_/A _20192_/A2 _20133_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_32119_ _32119_/Q _32322_/CLK _32119_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23023__A1 _30152_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24220__A0 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19933__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold499 hold499/A hold499/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_232_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25990_ _26687_/B _25989_/Y _26014_/A2 _31510_/Q _31510_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2707 VPWR VGND wire2707/X _14162_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25654__B _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3351 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2718 VPWR VGND wire2718/X hold121/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21034__A0 _29498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout935 _16843_/A2 _16722_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_150_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2729 wire2730/X _19624_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_8_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout946 _15957_/S wire951/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22231__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24941_ _24941_/Y _24941_/B _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_20064_ VGND VPWR _14213_/A _19551_/A _20106_/A _20064_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_41_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout957 VPWR VGND wire958/A wire963/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19652__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout968 VPWR VGND wire970/A wire981/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17789__B1 _17788_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30306__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18549__A _22620_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17453__A _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18450__A1 _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27660_ VGND VPWR _27667_/S _19721_/A _32398_/Q _32398_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24872_ VPWR VGND _31082_/D _32555_/Q _25595_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_110_3660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28353__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15264__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26611_ _26611_/Y _26607_/B _31777_/Q _26607_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XANTENNA__27361__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23823_ _23823_/X _24317_/C _26949_/A _31884_/Q _31852_/Q wire1605/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_41_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27591_ _25643_/C _32196_/Q _27592_/A _25643_/B _32188_/Q _32204_/Q _32180_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_167_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18983__S _18983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_306 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29330_ _29330_/Q _32318_/CLK _29330_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_317 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17005__A2 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_2088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18202__A1 _29855_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_3677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26542_ _26543_/B _26542_/C _26542_/A _26542_/B _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA_328 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18202__B2 hold453/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23754_ _31777_/Q _23756_/C _31778_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__21888__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30456__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_339 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20966_ VGND VPWR _20979_/S hold368/X _29431_/Q _29431_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_2000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_2342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold249_A hold249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26276__A1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27473__A0 _32294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15016__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16213__B1 wire1060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18753__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23190__A hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17410__C1 _17409_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22705_ _22705_/X _22687_/A _22706_/B _22693_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_243_2645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29261_ _29261_/Q _30507_/CLK _29261_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_99_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26473_ _26472_/X _26473_/B _26473_/X _26473_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA_wire3891_A wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17961__A0 _27898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23685_ _23685_/X wire1288/X _31496_/Q _31572_/Q _24184_/A2 VGND VPWR _23684_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24287__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_4834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20897_ VGND VPWR _23477_/S hold296/X _29377_/Q _29377_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_282_1971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16764__B2 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_318_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28212_ _28212_/Q _30479_/CLK _28212_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25424_ VGND VPWR _25424_/S _31363_/Q _31294_/Q _31294_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_4790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22636_ _22733_/B _22636_/Y _29726_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_104_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_1381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29192_ _29192_/Q _32318_/CLK _29192_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15972__C1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22837__B2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3055_A _18078_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28143_ _28143_/Q _30245_/CLK _28143_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25355_ _31274_/Q _25408_/B _25355_/Y _25363_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_259_2129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16516__A1 _32320_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22567_ VGND VPWR _22616_/S hold152/A _22566_/X _30062_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27776__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16008__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26579__A2 hold196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25236__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20038__B _25065_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31851__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25787__A0 _31423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24306_ VGND VPWR _30956_/D _24308_/B _31608_/Q _24306_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14527__B1 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21518_ _21521_/A _21518_/A _21518_/C _21638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_13_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28074_ _28074_/Q _30225_/CLK _28074_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_178_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length934 VPWR VGND wire933/A fanout932/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25286_ _31260_/D _31260_/Q _25265_/X _25413_/A _25595_/A _25285_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20753__S _20754_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22498_ VGND VPWR _22512_/A3 _22510_/A4 _22510_/A2 _22498_/X _30010_/Q _22512_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_6_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24225__S _24242_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_5142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25251__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4296 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27025_ _27027_/D _31993_/D _27028_/A _27024_/Y _31992_/Q _31993_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_215_4138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24237_ VGND VPWR _24241_/S _30913_/Q _27705_/A1 _30913_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_85_3172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21449_ _21449_/B _21449_/A _21475_/A _21449_/D _21449_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_178_2897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length978 VPWR VGND _16942_/S wire979/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22065__A2 _14069_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23262__A1 _29510_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2190_A _19754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27528__A1 _32254_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1020 VPWR VGND _16026_/A2 wire1021/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_191_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21273__A0 hold360/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20076__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3128_A _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[22] _19608_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2752 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32207__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_2020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24168_ _24168_/X _20126_/X wire4109/X _28736_/Q _24188_/A2 VGND VPWR _24167_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_172_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24988__C_N _19959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20054__A wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25003__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_4163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23119_ _30171_/D _23057_/S _23118_/X hold202/A wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_133_2414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24211__A0 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19218__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19843__A _19849_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_206_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17492__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3931 _23150_/C _29727_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_16990_ VGND VPWR _23348_/C hold382/X _30376_/Q _16990_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14052__A _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2455_A _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28976_ _28976_/Q _30865_/CLK _28976_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24099_ _24099_/X _20673_/D _30649_/Q _30713_/Q _19926_/B VGND VPWR wire1255/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__28578__D _28578_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3942 _22586_/S _22594_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_210_5495 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3953 VPWR VGND wire3953/X wire3954/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16991__A_N _29721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19769__A1 _28541_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_1882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15941_ VGND VPWR _16823_/S _30489_/Q _30775_/Q _15941_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27927_ _27927_/Q _28216_/CLK _27927_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_3435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3975 VPWR VGND wire3975/X _29499_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19562__B _19562_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3997 VPWR VGND wire3997/X wire3998/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_245_5558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31231__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13891__A _28606_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32357__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18441__A1 wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18660_ _18660_/Y _18682_/A _30333_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA_wire2622_A _14216_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_19_0_core_clk clkbuf_opt_19_1_core_clk/A clkbuf_5_21_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_15872_ _15871_/X wire951/X wire985/X _30487_/Q _15872_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27858_ _27858_/Q _30415_/CLK _27858_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27700__A1 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25306__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2231 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17429__D_N _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15255__A1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16452__B1 _29225_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17611_ _17611_/X _19512_/B _17474_/C _17473_/X _17457_/B VGND VPWR _14067_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__27271__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_330_core_clk _30367_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_clkbuf_leaf_357_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18992__A2 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3856_A wire3857/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14823_ VGND VPWR _14823_/X _14820_/X _14822_/X _14823_/A1 _14823_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25580__A _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26809_ _26809_/B _26772_/C _27120_/B _26809_/X _27098_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_287_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18591_ VGND VPWR _28306_/Q _22328_/A _18166_/B _28306_/D wire3160/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_224_408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27789_ VGND VPWR _27792_/S _25031_/B _32513_/Q _32513_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_166_2234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28846__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_5293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23868__A3 _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29528_ _29528_/Q _31479_/CLK _29528_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17542_ _17542_/Y _17552_/S _31624_/Q _26245_/C _17452_/X _24793_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_1 X_14754_ _15597_/A2 _14754_/X _14753_/X _15235_/A1 _29589_/Q wire1506/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_233_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20928__S _20928_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31381__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20000__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_840 wire4018/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29202__D wire834/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18744__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2734 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_851 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21613__A _30220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_4284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17473_ _31051_/Q _31053_/Q _31050_/Q _17473_/X _31052_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XANTENNA_862 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29459_ _29459_/Q _32345_/CLK _29459_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17360__C_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14685_ _14546_/A wire1732/X _14685_/X _15628_/A2 _29242_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__15558__A2 wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_873 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14557__C_N _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18194__A _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30949__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25475__C1 _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_884 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19212_ _19212_/X _19368_/D1 _27881_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_222_2729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_895 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16424_ VGND VPWR _16566_/S _29022_/Q _28990_/Q _16424_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32470_ _32470_/Q _32470_/CLK _32470_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27870__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28996__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output492_A _28654_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20229__A _24210_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24293__A3 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31421_ _31421_/Q _32532_/CLK _31421_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19143_ _19179_/A2 _27941_/Q _19143_/B1 _19143_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_16_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16355_ _16355_/X _16352_/X _16839_/A1 _16816_/B1 _16354_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_217_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_2281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32563__D _32563_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27767__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25227__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17704__B1 _17881_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14227__A _24606_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_4926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15306_ _15306_/X _32320_/Q _15305_/X _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_19074_ _19066_/X _19073_/X _22090_/B1 _19068_/X _19074_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_199_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31352_ _31352_/Q _31748_/CLK _31352_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_31_2779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15715__C1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16286_ _16841_/A2 _16286_/X _16285_/X _16843_/A2 _28850_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_138_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_245_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17180__A1 _29898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24045__A3 _24441_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25242__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17180__B2 wire3930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28226__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18025_ VGND VPWR _18034_/S wire3899/X _27957_/Q _27957_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30303_ _30303_/Q _30403_/CLK _30303_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_2696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15237_ _15226_/X _29150_/D _15612_/B _15236_/X _15216_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__23253__A1 hold374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27519__A1 _32221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31283_ _31283_/Q _31998_/CLK _31283_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_113_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18133__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24450__B1 _14367_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_2839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput505 wire4050/X la_output[117] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26990__A2 _27000_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21264__A0 _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20067__A1 _28679_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22163__B _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_5286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_3816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput516 wire4022/X la_output[127] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_272_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29872__D _29872_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput527 _31112_/Q la_output[21] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30234_ _30234_/Q _30412_/CLK _30234_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27446__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22461__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21680__A1_N _21648_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25755__A hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15168_ _15167_/X _15515_/C1 _15332_/A2 _29471_/Q _15168_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_211_5259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput538 _31122_/Q la_output[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_285_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput549 _28718_/Q la_output[41] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_49_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30329__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19472__A3 _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17972__S _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31907__D hold404/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14119_ _31320_/Q _14119_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__23005__A1 _23004_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19209__B1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_396_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18680__A1 _29343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30165_ _30165_/Q _32108_/CLK _30165_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_133_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24202__B1 _28644_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19976_ _19975_/X _28636_/Q _28636_/D _19984_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15099_ _15099_/X _28095_/Q _15098_/X _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_7_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25545__A3 _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28376__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21016__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_3003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14297__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16691__B1 _28861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24753__A1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29621__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18927_ _19185_/S _18927_/X _28251_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XANTENNA_hold25_A hold25/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_3021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30096_ _30096_/Q _31938_/CLK _30096_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_168_3712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22764__A0 _22763_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23110__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15492__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17235__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18432__A1 _28207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18858_ _28120_/Q _18858_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__30479__CLK _30479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15246__A1 _29023_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_133_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2956_A _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31724__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17809_ VGND VPWR _17842_/S _17796_/X _17808_/X _17809_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25848__A4 _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16994__A1 _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18789_ wire1402/X _28375_/Q _18788_/X _28375_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15797__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14343__A_N _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22516__B1 _22518_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_3300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29771__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20820_ VGND VPWR _20821_/S _29333_/Q _27709_/A1 _29333_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_266_1944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18196__B1 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27455__A0 _32285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30998_ _30998_/Q _32299_/CLK _30998_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_283_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17538__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23214__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21523__A _30468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20751_ VGND VPWR _20752_/S _27261_/A0 _29266_/Q _29266_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17943__A0 _27881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16746__A1 wire912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15549__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20375__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14836__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22338__B _22338_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31874__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_2548 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18535__C _18535_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14757__B1 _15151_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23470_ VGND VPWR _23530_/S _23469_/X hold406/X _30421_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3103_A _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22746__A_N _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29001__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15954__C1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20682_ _24442_/C _20682_/C _24618_/B _24881_/D _24467_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_140_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25622__B1_N wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27848__C _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22421_ _22025_/Y _22420_/X _14367_/B _22026_/X _29975_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_238_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18499__A1 _18499_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31619_ _31619_/Q _31760_/CLK _31619_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_273_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19928__A _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27758__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25218__C1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25649__B _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32599_ _32599_/A _32599_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_clkbuf_opt_33_0_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25140_ _31205_/D _25138_/X _25181_/B _25139_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_22352_ _22352_/Y _18256_/Y _18216_/X _22370_/A2 _22378_/B _18255_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__25769__B1 _32097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31104__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_1005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20845__A3 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20573__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17171__A1 _29897_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19647__B _26904_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22354__A _22354_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17171__B2 _23150_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25233__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18551__B _18552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31089__D _31089_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21303_ _21310_/A _21303_/B _21629_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xnor2_4 XFILLER_47_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29151__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13976__A _28521_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25071_ _25081_/A _24941_/B _25071_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_69_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15182__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23244__A1 _29492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19448__B1 _28444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3472_A wire3473/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22283_ _22282_/X _22509_/C1 wire829/X _29840_/Q _29840_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_65_2308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18043__S _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15721__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19999__A1 _28646_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24022_ _24022_/X _20128_/B wire4122/X _28722_/Q _24188_/A2 VGND VPWR _24014_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__28719__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_2731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21234_ VGND VPWR _23342_/A _29713_/Q hold201/A _29696_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27356__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold230 hold230/A hold230/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__22452__C1 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25665__A _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold241 hold241/A hold241/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_134_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold252 hold252/A hold252/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xhold263 hold263/A hold263/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_172_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3216 VPWR VGND wire3216/X _17078_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__31254__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_2152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28830_ _28830_/Q _32557_/CLK _28830_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_4201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold274 hold274/A hold274/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__18671__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3227 VPWR VGND _21471_/D _14314_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_277_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21165_ VGND VPWR _21172_/S _29608_/Q _27258_/A0 _29608_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xhold285 hold285/A hold285/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25384__B _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3737_A _30258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25536__A3 _31346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_21_4339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold296 hold296/A hold296/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21007__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2504 VPWR VGND _20819_/S _20821_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_251_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14288__A2 wire3730/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1708 _23365_/S _23228_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire3249 VPWR VGND wire3249/X wire3249/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22801__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15485__B2 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16682__B1 _28965_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24744__A1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_159_core_clk _31874_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_20116_ _20116_/Y _26323_/A _20122_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_5_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23185__A _23395_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28761_ _28761_/Q _30903_/CLK _28761_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_38_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25973_ _25973_/B _25974_/C _31503_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 Xwire2537 VPWR VGND _20518_/S _20517_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21096_ VGND VPWR _21097_/S _21203_/A0 _29547_/Q _29547_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_98_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2548 VPWR VGND wire2548/X _20419_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout955_A _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_4278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28869__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2559 _20202_/S _20205_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xwire1814 VPWR VGND wire1814/X wire1815/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout765 _23877_/X _24209_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22520__C _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27712_ VGND VPWR _27719_/S _24958_/B _32445_/Q _32445_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_252_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17183__A _17183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16029__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17226__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18423__A1 _28198_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout776 VPWR VGND wire777/A _26772_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24924_ _25676_/B1 _24923_/Y _24941_/A _31106_/Q _31106_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20047_ _25076_/C1 _20046_/Y wire847/X _28670_/Q _28670_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire3904_A hold475/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout787 VPWR VGND _25903_/S _25911_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21417__B _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28692_ _28692_/Q _31874_/CLK _28692_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_112_3799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_4251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1847 _27423_/S _27483_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__15237__A1 _15236_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26497__A1 _31706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16434__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1869 VPWR VGND wire1869/X _14356_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27643_ VGND VPWR _27647_/S _25029_/B _32384_/Q _32384_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_2291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24855_ _24855_/Y _31031_/Q _31033_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_65_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16985__B2 _29415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_103 _19045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23806_ _23807_/A _24178_/A2 hold206/A _31811_/Q _24069_/A2 VGND VPWR _23805_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_114 _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27574_ VGND VPWR _27572_/Y _27594_/B _31382_/Q _27574_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_128_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18187__A0 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27893__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24786_ _24786_/A _24786_/C _25836_/A _24786_/D _24786_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XANTENNA_125 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2036_A _14400_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20748__S _20755_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_4178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input119_A la_input[51] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21998_ hold428/A _22074_/B1 _29799_/D _21997_/X _21996_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_164_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_136 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14460__A2 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19923__A1 _28611_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18726__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29313_ _29313_/Q _32306_/CLK _29313_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_147 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_4874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26525_ _26533_/D _31746_/Q _31748_/Q _31747_/Q _31745_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_39_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_158 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23737_ _23737_/X wire1628/X _31869_/Q _26838_/A1 _31802_/Q _23737_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 X_20949_ VGND VPWR _20958_/S _30155_/Q _29414_/Q _29414_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16737__A1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_912 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_169 _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27541__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21730__A1 _21366_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17122__S _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29244_ _29244_/Q _31479_/CLK _29244_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_2768 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM256_Di0[8] wire2354/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16201__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14470_ _29698_/Q _18553_/C _14087_/Y _14469_/X _14470_/Y _30438_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XANTENNA_wire2203_A _19574_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26456_ _26459_/A _31701_/Q _26456_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_23668_ VGND VPWR _23668_/S _27261_/A0 _30798_/Q _30798_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22963__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14212__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4675 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_4506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_opt_27_2_core_clk_A clkbuf_opt_27_2_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XANTENNA__28249__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_4517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25407_ _25408_/C _25413_/A _25414_/B1 _25407_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_161_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27120__A _27120_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22619_ VGND VPWR _22619_/S hold112/A _22618_/X _30084_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29175_ _29175_/Q _31507_/CLK _29175_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22286__A2 _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26387_ VGND VPWR wire2626/X _14398_/B _26386_/X _26387_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_224_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27749__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16961__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25209__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23599_ VGND VPWR _30762_/D _23599_/B _23599_/A _23599_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__15960__A2 wire1533/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18591__A2_N _18166_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20297__A1 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16140_ _16387_/A _16387_/C _32051_/Q _16140_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28126_ _28126_/Q _30412_/CLK _28126_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_6_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25338_ _25338_/X _25380_/C _31270_/Q _25414_/B1 wire3495/X _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__25016__C_N _24951_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20483__S _20485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_278_1848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_4694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25278__C _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25224__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13886__A _28611_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16071_ _16791_/A2 _14518_/A _29172_/Q _16071_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23235__A1 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28057_ _28057_/Q _30279_/CLK _28057_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_159_2060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19439__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25269_ VGND VPWR _25269_/X _25269_/B _25413_/A _25269_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__24432__B1 _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_5584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28399__CLK _30051_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20049__A1 _28671_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21246__A0 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15022_ VGND VPWR _15022_/X _15021_/X _15020_/X _15640_/A1 _15509_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27008_ _27011_/C _31987_/Q _27007_/A _27008_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xfanout3600 VPWR VGND _19581_/A _19584_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_276_1572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24983__A1 _31135_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14920__B1 _28846_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3611 wire3616/X _19522_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17077__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21797__A1 hold158/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22994__A0 _22992_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19830_ _19829_/X _28567_/Q _28567_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xfanout2910 _20471_/S _20473_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__19573__A _19573_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26185__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23807__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_4042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15476__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30621__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23095__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2954 VPWR VGND _23304_/C _18668_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_19761_ _25904_/A _19760_/X _19772_/A _28537_/Q _28537_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21608__A _21608_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16973_ _16973_/X wire3791/A _29986_/Q _29414_/Q _22449_/A VGND VPWR _16972_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28959_ _28959_/Q _31586_/CLK _28959_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_81_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout2976 VPWR VGND _22328_/A _22378_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_270_1171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_5333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18295__A_N _29864_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_1133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_1876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23943__C1 _23942_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18712_ _18712_/X _18709_/X _18797_/S _18711_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 Xwire3794 VPWR VGND _31923_/D _29932_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__29794__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17217__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15924_ wire1004/X wire1476/X _32304_/Q _15924_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27134__C1 _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21327__B _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31970_ _31970_/Q _31970_/CLK _31970_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_91_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19692_ _27053_/A _20061_/A _19692_/Y _20106_/B _25982_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_249_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_4029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27685__A0 _32419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16425__B1 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput9 input9/X input9/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_267_2943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18965__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5399 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17622__C1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18643_ VGND VPWR _18646_/S _23286_/A1 _28356_/Q _28356_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30921_ _30921_/Q _31760_/CLK _30921_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26837__C wire838/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15855_ VGND VPWR _15855_/X _15854_/X _15853_/X _15957_/S _16151_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16976__A1 _16974_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15779__A2 wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output505_A wire4050/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32558__D input41/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30771__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31897__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24638__B _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14806_ _14825_/A _14805_/X wire1097/X _14795_/X _14791_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XANTENNA_wire4120_A _28564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25572__A_N _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14987__B1 _30782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18574_ _20912_/B _18580_/A _18574_/X _20909_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_30852_ _30852_/Q _32282_/CLK _30852_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26698__A_N _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29024__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15786_ VGND VPWR _16823_/S _29584_/Q _29616_/Q _15786_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_163_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18178__B1 _18177_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27437__A0 _32276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22439__A _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23171__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19914__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18717__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23034__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23710__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17525_ _17605_/A _17863_/C _17605_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 XFILLER_72_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14737_ _14737_/X wire1221/X _14730_/X _14732_/X wire1089/X _14736_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_146_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16728__A1 wire1060/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30783_ _30783_/Q _30783_/CLK _30783_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18128__S _18145_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_670 _24441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_681 _23661_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29867__D _29867_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32522_ _32522_/Q _32545_/CLK _32522_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14739__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30001__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1303_A wire1303/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17456_ _31052_/Q _17457_/B _31051_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 XANTENNA_692 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31127__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25999__B1 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14668_ _14667_/X _14823_/A1 _14817_/A2 _30889_/Q _14668_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_198_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24654__A _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14203__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15400__A1 _28963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24120__C1 wire1253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15400__B2 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16407_ _16407_/X _29181_/Q _16964_/A2 _16920_/A3 _16930_/A1 _16406_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_242_1251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17967__S _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29174__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32453_ _32453_/Q _32498_/CLK _32453_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_3713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19748__A _19748_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22277__A2 _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19678__B1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17387_ _17441_/B2 _17387_/A2 _17387_/X _17432_/B2 input186/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__30806__D _30806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14599_ _14598_/X _14642_/S wire1171/X _29208_/Q _14599_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_200_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20288__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19142__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31404_ _31404_/Q _32412_/CLK _31404_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19126_ _19275_/A2 _28391_/Q _19125_/X _28391_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21485__B1 _21484_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16338_ wire902/X _29667_/D _16337_/Y _16310_/X _16319_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__20393__S _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32384_ _32384_/Q _32401_/CLK _32384_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25215__A2 _24572_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_1560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30151__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31277__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22605__C _22605_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19057_ _28356_/Q _19178_/B _19109_/S _19057_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31335_ VGND VPWR _31335_/D _32577_/CLK _31335_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17268__A _30929_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23226__A1 _21778_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16269_ _16817_/A2 _16817_/A1 _29468_/Q _16269_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_255_3069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_4658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15703__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_4789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32522__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_3151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput302 _13787_/Y la_iena[4] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_18008_ VGND VPWR _18008_/S _23291_/A1 _27942_/Q _27942_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_2076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23777__A2 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26367__B1_N _26366_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput313 _13786_/Y la_iena[5] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire756_A wire756/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_5260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14911__B1 _30780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31266_ _31266_/Q _31761_/CLK _31266_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput324 _13785_/Y la_iena[6] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_135_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[18] wire2694/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput335 _13784_/Y la_iena[7] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21788__A1 _17035_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14404__B _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput346 _13783_/Y la_iena[8] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xoutput357 _13782_/Y la_iena[9] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30217_ VGND VPWR _30217_/D _30217_/CLK _30217_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_29_2472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18653__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput368 _13935_/Y la_oenb[109] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30541__D _30542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23717__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31197_ _31197_/Q _32554_/CLK _31197_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_285_5157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput379 _13925_/Y la_oenb[119] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_215_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22621__B _22621_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire923_A wire923/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20460__A1 _28979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29107__D _29107_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24726__A1 _31566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_252_core_clk _31918_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23209__S _23209_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30148_ _30148_/Q _32498_/CLK _30148_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25923__B1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4855 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19959_ VGND VPWR wire1316/X _25022_/C _19959_/A2 _19959_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22113__S _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_1876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_4216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17207__S _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26904__C_N _26903_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22970_ _31401_/Q _25733_/A _22975_/A _31405_/Q _31402_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_224_5417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30079_ hold129/A _32277_/CLK _30079_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_164_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14420__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25932__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27676__A0 wire2222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14690__A2 _14919_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_1405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25424__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21921_ _21918_/X _22063_/A _21920_/X _21921_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_20_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27205__A _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18810__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16967__A1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_2134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_2131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24640_ _26403_/B _31698_/Q _24639_/Y _24640_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__14978__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_3160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21852_ _21854_/B _21842_/A _21424_/A _21842_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_36_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_4197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20568__S _20572_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23162__B1 wire2842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18546__B _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20803_ VGND VPWR _20821_/S _29316_/Q _27692_/A1 _29316_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23701__A2 _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22504__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24267__C _24276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17450__B _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24571_ _24570_/X _24568_/X _24506_/Y _31042_/Q _31042_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16719__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21783_ _21769_/A hold417/A _21783_/X _21999_/S1 _17044_/X _21345_/C hold158/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XPHY_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18038__S _18049_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27523__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29517__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_4473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22370__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26310_ _26309_/Y _26893_/C1 _31643_/Q _26327_/B _31643_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_101_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26763__B _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23522_ VGND VPWR _23522_/S _23521_/X _31965_/Q _30447_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20734_ VGND VPWR _20747_/S _27689_/A1 _29249_/Q _29249_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27290_ VGND VPWR _27292_/S _32154_/Q _27276_/X _32154_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25039__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17392__A1 wire3564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32052__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19920__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24564__A _31211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17392__B2 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26241_ _31609_/Q _24820_/B _26242_/B _32299_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_274_5562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23453_ VGND VPWR _23453_/X _23426_/Y _23451_/X _23425_/X _23452_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19658__A _26783_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22268__A2 _22265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20665_ VGND VPWR _20665_/X _20673_/D _20673_/B _20669_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_274_5573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_4277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30716__D input85/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25379__B _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15942__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18562__A _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_5535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20279__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19133__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22404_ VGND VPWR _22405_/S _29960_/Q _21843_/X _29960_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26172_ _31574_/D _31574_/Q _26171_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__28541__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21700__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23384_ VGND VPWR _23385_/S _30362_/Q hold135/X _30362_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17144__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19377__B _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20596_ VGND VPWR _20617_/S _27244_/A0 _29111_/Q _29111_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25206__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17144__B2 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27600__A0 _32342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3769 VPWR VGND _18770_/A1 wire3770/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_max_length1804_A _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25123_ _25123_/X _31198_/Q _31200_/Q _31199_/Q _25122_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_62_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22335_ _29917_/D _22385_/B1 hold411/X hold407/A _22356_/B VGND VPWR _22334_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_49_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23217__A1 _30209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18892__A1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24414__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27594__B _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_5281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25611__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21228__B1 _29690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25054_ _25652_/A _25053_/X _25082_/A2 _31170_/Q _31170_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24965__A1 _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30644__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29931_ hold454/A _31921_/CLK _29931_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_47_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14902__B1 _29280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_load_slew2662_A _19566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22266_ VGND VPWR _22273_/S _30313_/Q _30403_/Q _22266_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_138_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21779__A1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14314__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24005_ _24005_/X _20673_/D wire1319/A _28625_/Q _31103_/Q _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_118_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28691__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21217_ _21103_/C _22554_/B _29687_/Q _21218_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26167__B1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27816__A_N _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18644__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17447__A2 input198/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_5089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29862_ _29862_/Q _32329_/CLK hold4/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3610 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19841__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22197_ _22194_/X _22196_/X _22243_/A _22243_/C _22197_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18501__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3024 VPWR VGND _18390_/S _18388_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_hold483_A hold483/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19987__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15458__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3035 VPWR VGND _18358_/S _18364_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_47_2594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16655__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24178__C1 wire802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1505 VPWR VGND wire1506/A wire1508/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28813_ _28813_/Q _32342_/CLK _28813_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_4605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21428__A _21428_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_2447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21148_ VGND VPWR _21148_/S _29591_/Q _27143_/A1 _29591_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1516 wire1519/X _15546_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_60_3462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2323 wire2324/X wire2323/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29793_ VGND VPWR _29793_/D _30460_/CLK hold354/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xfanout1527 VPWR VGND wire1531/A _14543_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_112_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23346__C _30332_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2334 VPWR VGND wire2334/X wire2335/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1538 VPWR VGND wire1539/A wire1541/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_2931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1600 VPWR VGND _19995_/B wire1600/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2345 _14198_/Y wire2345/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__30794__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1549 wire1552/A _16959_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_189_2031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3904 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1611 VPWR VGND _24317_/A _24281_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2356 wire2357/X wire2356/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24193__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28744_ _28744_/Q _32416_/CLK _28744_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13970_ _28527_/Q _13970_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_210_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2367 VPWR VGND wire2367/X _14186_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire1622 VPWR VGND wire1622/X wire1622/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2153_A _19772_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21079_ VGND VPWR _21090_/S _21153_/A0 _29530_/Q _29530_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25956_ _31524_/Q _31492_/Q _31555_/Q _25934_/C _25956_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19795__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25842__B _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29047__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1633 VPWR VGND wire1633/X wire1633/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_147_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2378 VPWR VGND wire2378/X wire2379/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22958__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16407__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1644 VPWR VGND _24841_/B _26793_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2389 VPWR VGND wire2389/X wire2390/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14681__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24907_ VGND VPWR _19554_/B _19617_/A _24955_/A _24907_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__23940__A2 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_4021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1666 VPWR VGND wire1666/X _19511_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28675_ _28675_/Q _31836_/CLK _28675_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25887_ VGND VPWR _19530_/B _19581_/A _25911_/B1 _25887_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_16_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1688 VPWR VGND wire1688/X _26559_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_245_3249 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_2340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_2963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24458__B _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15640_ VGND VPWR _15640_/C1 _15638_/X _15641_/B _15639_/X _15640_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_242_4849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27626_ VGND VPWR _27626_/S _27706_/A1 _32368_/Q _32368_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2320_A _14216_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30024__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14969__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24838_ _25595_/A _24837_/Y _31063_/Q _24836_/Y _31063_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_223_4237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2418_A _14138_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20478__S _20485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27419__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23153__B1 _23152_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15630__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26954__A _31979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_1814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24496__A3 _24576_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3554_A wire3555/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28071__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15571_ _15568_/X _15749_/C1 _15571_/Y _15570_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_27557_ _32336_/Q _25637_/Y _32336_/D _27556_/X _27555_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_125_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24769_ _24769_/Y _31442_/Q _24770_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__22051__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_1727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_56_core_clk _32546_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_17310_ wire3561/X _31910_/Q _17310_/X _17272_/A wire2043/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XPHY_60 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14522_ _22078_/C _14524_/B _22078_/A _14515_/Y _29453_/Q _29451_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_279_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26508_ _26559_/A _26508_/B _26507_/Y _31743_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XFILLER_141_2502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_71 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18290_ _18290_/Y hold453/A _29341_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_123_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27488_ VGND VPWR _27488_/S wire2012/X _32303_/Q _32303_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_102_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_82 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16186__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_93 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_4625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25445__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30174__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17241_ VGND VPWR _17243_/S hold179/X _30410_/Q _31903_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_50_2429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29227_ _29227_/Q _32433_/CLK _29227_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length3819_A _29870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14453_ _29454_/Q _14453_/Y _30439_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_26439_ VGND VPWR _26435_/B _17502_/B _26437_/X _26439_/X _26435_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_253_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15394__B1 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22259__A2 _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23456__A1 _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23000__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30626__D _30626_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15933__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32545__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_8_1_core_clk clkbuf_leaf_2_core_clk/A clkbuf_opt_8_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_17172_ _29897_/Q _22026_/A2 _17172_/X _23150_/C _22026_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_29158_ _29158_/Q _32575_/CLK _29158_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21610__B _21610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18868__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14384_ _31019_/Q _24434_/C _31018_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__17135__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27000__D _27000_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output288_A _13975_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16123_ _16123_/X _32118_/Q _16448_/A2 wire1459/X _16120_/S _16122_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28109_ _28109_/Q _29580_/CLK _28109_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire963 VPWR VGND wire963/X wire963/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15146__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18883__A1 wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29089_ _29089_/Q _30583_/CLK _29089_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24405__B1 _31005_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire985 VPWR VGND wire985/X wire985/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_256_3389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26945__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14505__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_2374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire996 VPWR VGND wire996/X wire996/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15697__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15100__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21219__B1 _22553_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31120_ _31120_/Q _32168_/CLK _31120_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16894__B1 wire894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24956__A1 _31122_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_4164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16054_ wire999/A _16091_/C _30492_/Q _16054_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_252_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_5411 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20941__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_3947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_80_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_1916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15005_ _16417_/A2 wire3298/X _28752_/Q _15005_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_237_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31051_ VGND VPWR _31051_/D _31698_/CLK _31051_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__18635__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17438__A2 wire2070/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4070_A wire4071/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18411__S _18420_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19734__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15449__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30002_ _30002_/Q _31938_/CLK _30002_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16646__B1 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19813_ VGND VPWR wire2208/X _19789_/C wire1334/A _19813_/X _26999_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__23029__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27724__S _27728_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3485 _25641_/B _31379_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25905__B1 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output622_A _24380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16110__A2 _16563_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22719__B1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23916__C1 _23915_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_43_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3580 VPWR VGND wire3580/X _30864_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_280_5021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24184__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19744_ _19760_/B wire1376/A _25047_/B _19744_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_147_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3591 VPWR VGND wire3591/X _30857_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27107__C1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16956_ _16956_/A2 _16956_/A1 _29100_/Q _16956_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_111_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24649__A _31467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23392__B1 _21221_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19596__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18938__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15907_ _15907_/X _28976_/Q _16150_/A2 _16150_/A3 _15957_/S _15906_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19060__A1 _28065_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23931__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2487_A _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31953_ _31953_/Q _31953_/CLK _31953_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19675_ _27131_/B _19674_/Y _19695_/A2 _28498_/Q _28498_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_4_2485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_2470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16949__A1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16887_ wire1010/A wire1482/A _29332_/Q _16887_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_2_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14409__C1 _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28414__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21942__A1 _17148_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2295_A _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_3_3_0_core_clk clkbuf_3_3_1_core_clk/A clkbuf_3_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_30904_ _30904_/Q _32379_/CLK _30904_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18626_ VPWR VGND _18626_/X _30413_/Q _30414_/Q _30484_/Q _18626_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_0_2349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26330__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15838_ _15823_/X _15828_/X _15838_/X _15837_/X _15832_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_244_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20388__S _20406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31884_ _31884_/Q _31884_/CLK _31884_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32075__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23144__B1 _23143_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23703__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25684__A2 _31391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15621__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18557_ _18554_/X _18556_/X _18557_/Y _18555_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_30835_ _30835_/Q _31937_/CLK _30835_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_91_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22498__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15769_ _14544_/C _30440_/Q _14544_/B _14544_/D _15769_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__30517__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2462_A _23253_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_4801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19363__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17508_ _17508_/B _17508_/X _31752_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_50_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold92_A hold92/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28564__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30766_ _30766_/Q _31923_/CLK _30766_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18488_ VGND VPWR _18488_/S wire3844/X _28261_/Q _28261_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_2372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16177__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17374__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19902__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17374__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25436__A2 _31358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_3604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32505_ _32505_/Q _32523_/CLK _32505_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17697__S _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_14 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17439_ VGND VPWR _26974_/B _32274_/Q _17424_/B _17424_/C _29870_/D _17438_/X VGND + VPWR NF_sky130_fd_sc_hd__a311o_4 XANTENNA__15385__B1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23447__A1 _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30536__D input57/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_25 _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15924__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23447__B2 _22141_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30697_ _30697_/Q _32160_/CLK hold392/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_31_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_36 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19115__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_47 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21458__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_58 _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20450_ VGND VPWR _20452_/S _28970_/Q _21203_/A0 _28970_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23998__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32436_ _32436_/Q _32436_/CLK _32436_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30667__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17126__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_69 _31158_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18323__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19668__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31912__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21012__S _21021_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19109_ VGND VPWR _19109_/S _19108_/X _19107_/X _19109_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15137__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26397__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17677__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20381_ VGND VPWR _20384_/S _25031_/B _28905_/Q _28905_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_1718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32367_ _32367_/Q _32439_/CLK _32367_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26936__A2 _26936_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25739__A3 _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15688__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22120_ _22120_/X _13849_/Y _22104_/A _13848_/Y _22104_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_238_1128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31318_ _31318_/Q _31363_/CLK _31318_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25419__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32298_ _32298_/Q _32300_/CLK _32298_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_44_3424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22051_ _22061_/S hold265/A _22051_/X _22071_/C _21633_/A _21646_/A hold476/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_9_3064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1218_A _15286_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26149__B1 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19417__S _19417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30271__D _30271_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15051__A1_N _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31249_ hold120/A _31375_/CLK _31249_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19823__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18321__S _18321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19969__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1026_A _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21002_ VGND VPWR _21013_/S _29467_/Q _21153_/A0 _29467_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16637__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21630__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27634__S _27638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22973__A3 _22972_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_60_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25810_ _31429_/D _25810_/C _27854_/C _25810_/B _32551_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_129_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24175__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26758__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19941__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30047__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3435_A wire3436/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26790_ _26859_/C1 _26789_/X wire777/X _31845_/Q _31845_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_285_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_5383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24559__A _31204_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14663__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15860__A1 _29554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32418__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20197__A0 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23922__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28094__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25741_ VGND VPWR _25738_/C _19531_/X _25738_/B _25741_/X _25745_/A _25738_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_249_1202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22953_ VGND VPWR _22965_/S _30465_/Q _30130_/Q _30130_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19660__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19051__B2 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27113__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25381__C _25381_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21394__C1 _21655_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1395_A _23601_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17062__B1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24278__B _31687_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21904_ wire726/A _21903_/Y _21902_/Y _21903_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_129_2611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28460_ VGND VPWR _28460_/D _31879_/CLK _28460_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25672_ _31389_/Q _25672_/X _27413_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_168_2671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20298__S _20302_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22884_ _22884_/X _22935_/A _22910_/B _22876_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__22079__A _30441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15073__C1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28907__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14415__A2 _23360_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_4284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27411_ VGND VPWR _27412_/S _32259_/Q _27278_/X _32259_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30197__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24623_ _24616_/Y _24600_/Y _24597_/X _24596_/Y _24626_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_209_3391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21835_ VGND VPWR _21812_/B _21670_/X _21671_/X _21835_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_142_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28391_ _28391_/Q _30430_/CLK _28391_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_271_686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22489__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1562_A _14537_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31442__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1424 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32568__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_5023 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27342_ VGND VPWR _27348_/S _32198_/Q _27268_/X _32198_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_142_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24554_ _31195_/Q _24560_/A _31199_/Q _31198_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_hold231_A hold231/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21766_ _21766_/Y _21766_/B wire769/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16168__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17365__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26624__A1 _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14309__B _18682_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2164 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23505_ VGND VPWR _23515_/S _28391_/Q _30439_/Q _23505_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21711__A _21711_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20717_ VGND VPWR _20717_/S _29233_/Q _27705_/A1 _29233_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27273_ VGND VPWR _27281_/S _32144_/Q _27417_/A0 _32144_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23438__A1 _29368_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27931__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24485_ _24481_/X _31039_/D _26544_/C1 _24484_/Y _24467_/X wire2255/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__15915__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21697_ _21697_/B _21697_/X _21711_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_235_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1827_A _18242_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19106__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29012_ _29012_/Q _31962_/CLK _29012_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_1744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26224_ VPWR VGND _31600_/D _26224_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_200_4590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_4377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23989__A2 wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23436_ VGND VPWR _29374_/Q _29828_/Q _14098_/Y _23436_/X _22221_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_7_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17117__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20648_ VGND VPWR _20650_/S _27708_/A1 _29194_/Q _29194_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_1143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_5070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31592__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17117__B2 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18314__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19511__C1 _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3135_A _23530_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26155_ VGND VPWR _19574_/B _19558_/A _26159_/B _26155_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_216_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23367_ VGND VPWR _23373_/S _30345_/Q _29663_/Q _30345_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27585__C1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20579_ VGND VPWR _20584_/S _27705_/A1 _29095_/Q _29095_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25837__B _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26927__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input186_A mprj_dat_i[20] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15679__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25106_ VGND VPWR _31194_/D _25106_/B _26182_/A _25106_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16876__B1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24938__A1 _31113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_174_core_clk _32582_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_253_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22318_ VGND VPWR _23559_/S _29904_/Q _29163_/Q _29904_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_216_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20672__B2 _31413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26086_ VGND VPWR _31541_/Q _26081_/D _31540_/Q _26086_/X _31542_/Q _31539_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_7_4439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20761__S _20785_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23298_ VGND VPWR _23298_/S wire3820/X _30280_/Q _30280_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24233__S _24239_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15143__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16340__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_2675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2898 VPWR VGND _20613_/S _20598_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_7_3716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14351__A1 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_103_core_clk _32347_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_25037_ _25041_/A wire1296/X _25037_/X _25037_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_66_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29914_ _29914_/Q _29914_/CLK _29914_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18617__A1 _18617_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22249_ _29835_/Q _21051_/B _29836_/Q _22255_/D _22249_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire2270_A wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23071__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2003 VPWR VGND _23647_/A1 _18206_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23610__A1 _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21216__A3 _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16891__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21847__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2014 VPWR VGND _27236_/A0 _18179_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2368_A wire2369/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3208_A _14407_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23460__A2_N _29371_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26949__A _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16628__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29845_ hold311/A _30479_/CLK _29845_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19290__A1 _27948_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input47_A la_input[101] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1313 VPWR VGND wire1314/A _19927_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14639__C1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28437__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2120 wire2121/X wire2120/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1324 wire1328/X _25980_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_114_2946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2131 _31392_/D _25687_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_16810_ VGND VPWR _16842_/S _32069_/Q _29128_/Q _16810_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24166__A2 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26668__B _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2142 VPWR VGND _20120_/B _19778_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26560__B1 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17790_ VGND VPWR _17606_/Y _17852_/A _17596_/D _17790_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_29776_ VGND VPWR _29776_/D _30410_/CLK _29776_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14060__A _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2153 VPWR VGND _20114_/B _19772_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_40_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26988_ _27000_/D _26988_/D _26988_/C _26988_/B _31019_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XANTENNA__23374__A0 hold251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2164 VPWR VGND _24937_/B _19764_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1368 _19645_/A _26772_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32098__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27100__D_N _26819_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2318 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3671_A _14515_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1379 VPWR VGND wire1380/A wire1386/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_207_4700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_5494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1441 VPWR VGND wire1441/X _17912_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2186 VPWR VGND _26809_/B _20165_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16741_ VGND VPWR _16741_/X _16925_/B1 _16967_/A1 _16738_/X _16740_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23913__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19042__A1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28727_ _28727_/Q _31570_/CLK _28727_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_73_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3769_A wire3770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19570__B _19570_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25939_ _31484_/Q _25941_/B _31485_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 Xwire2197 VPWR VGND wire2197/X _19581_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_13953_ _28544_/Q _13953_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_275_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_4602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_5396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27104__A2 _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21924__A1 hold354/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23804__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18467__A _30415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1485 VPWR VGND wire1485/X wire1486/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_264_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2702_A _14163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19460_ _28448_/Q _19460_/Y _28447_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__26312__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1496 VPWR VGND wire1496/X _14547_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16672_ _16653_/B1 _29676_/D _16671_/Y _16653_/X _16644_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_1_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28658_ VGND VPWR _28658_/D _32552_/CLK _28658_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__28587__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13884_ _13884_/Y _28613_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_242_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23126__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14406__A2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24469__A3 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18411_ VGND VPWR _18420_/S _28186_/Q wire3880/X _28186_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29832__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15623_ VGND VPWR _15623_/S _30513_/Q _30799_/Q _15623_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27609_ VGND VPWR _27626_/S _27689_/A1 _32351_/Q _32351_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_206_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19391_ VGND VPWR _19407_/S _27237_/A0 _28407_/Q _28407_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_262_3371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28589_ _28589_/Q _32311_/CLK _28589_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_262_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23677__B2 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14811__C1 _29107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19345__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30620_ hold357/A _32379_/CLK _30620_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18342_ VGND VPWR _18366_/S _18342_/A1 _28120_/Q _28120_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21688__B1 _21687_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15554_ _15751_/A1 _16910_/A2 _15554_/X _15727_/A2 _28831_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_15_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16159__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17356__A1 wire3562/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20936__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21783__S0 _21769_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14219__B _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19896__A3 _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31935__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23312__S wire820/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14505_ _14505_/Y hold244/A _30440_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_106_2452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_4433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18273_ _18273_/B _18273_/Y _18332_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_30551_ _30551_/Q _31570_/CLK _30551_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_201_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15485_ _15721_/A2 _15485_/X _15484_/X _15692_/S _32066_/Q wire1515/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_160_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15906__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18406__S _18431_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27011__C _27011_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29982__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_4466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17224_ _29904_/Q _17228_/B _22026_/A2 _21426_/A _16993_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_2 XFILLER_258_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14436_ VGND VPWR _14436_/X _14436_/B _14436_/A _21661_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_176_3129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27719__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30482_ _30482_/Q _30482_/CLK hold420/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17108__A1 _29889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17108__B2 _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output572_A _28739_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22101__A1 _29815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput12 hold56/A hold55/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_238_39 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput23 hold22/A hold21/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_32221_ _32221_/Q _32538_/CLK _32221_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xinput34 VPWR VGND hold73/A hold72/X VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_253_4742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17155_ _21953_/A2 wire3933/X _22838_/A _22026_/B1 _21628_/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22oi_4 Xinput45 input45/X la_input[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__20112__B1 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14367_ _14367_/X _29980_/Q _14367_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__32571__D input69/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire760 VPWR VGND wire760/X wire760/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_154_3405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_1464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21455__A3 _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25747__B _31392_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput56 VPWR VGND la_input[10] input56/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__26918__A2 wire1573/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17249__C _17249_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18930__A _30262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput67 VGND VPWR input67/X la_input[11] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_119_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24651__B _31467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16106_ _16106_/X _29077_/Q _16150_/A2 _16150_/A3 _15957_/S _16105_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 Xinput78 VPWR VGND la_input[14] input78/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__16867__B1 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29212__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32152_ _32152_/Q _32498_/CLK _32152_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21860__B1 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput89 VGND VPWR input89/X la_input[24] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_17086_ _22756_/C _21679_/A _17086_/Y _23095_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_193_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_3722 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14298_ _14297_/X _24447_/A _29969_/Q _17882_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_26_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16331__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27591__A2 _32188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31187__D _31187_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31103_ VGND VPWR _31103_/D _32160_/CLK _31103_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_16037_ VGND VPWR wire969/X _29309_/Q _28747_/Q _16037_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18608__A1 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32083_ _32083_/Q _32540_/CLK _32083_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23062__C1 _18540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21207__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18141__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22171__B _22185_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20415__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16619__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3260 _14101_/Y _14744_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14893__A2 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_5274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27454__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31034_ _31034_/Q _31547_/CLK _31034_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3271 VPWR VGND _22078_/B wire3278/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_58_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3282 wire3287/A wire3283/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_252_1659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26000__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16095__A1 wire3276/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29362__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17980__S _17980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17292__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24157__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26551__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2581 VPWR VGND wire2582/A _18666_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_169_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17988_ VGND VPWR _18018_/S wire3911/X _27922_/Q _27922_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_117_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23365__A0 _29661_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22598__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22168__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14645__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19569__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23904__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19727_ _19726_/X _28520_/Q _28520_/D _19718_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_78_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire719_A wire720/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1880 VPWR VGND wire1885/A _18707_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_284_277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26348__D_N _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16939_ wire995/X _16939_/X _16938_/X _16949_/A1 _29615_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_266_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23714__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31465__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31936_ _31936_/Q _32075_/CLK _31936_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19658_ _26773_/C _20128_/A _26783_/B _19658_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_0_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18792__A0 _18790_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16398__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15055__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23117__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25657__A2 _27349_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26854__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21007__S _21008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18609_ VGND VPWR _18615_/S _23285_/A1 _28323_/Q _28323_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_147_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23668__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31867_ _31867_/Q _32275_/CLK _31867_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19589_ _26218_/A _19588_/Y _19638_/A _28469_/Q _28469_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_5310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27954__CLK _30198_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15070__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19336__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24826__B _24826_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21620_ _21619_/B _21619_/D _21677_/B _21619_/C _21621_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_30818_ _30818_/Q _32438_/CLK _30818_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_121_5576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_2287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_1766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31798_ _31798_/Q _31798_/CLK _31798_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22627__A _29724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25409__A2 _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19741__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27803__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23222__S _23224_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24880__A3 _24480_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21531__A _30469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21551_ _21551_/Y _21551_/B _30351_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_258_4653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30749_ VGND VPWR _30749_/D _31945_/CLK _30749_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_198_4099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14844__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_11_1_core_clk clkbuf_5_11_1_core_clk/X clkbuf_5_11_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_159_3327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20502_ VGND VPWR _20515_/S _27694_/A1 _29020_/Q _29020_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19001__A _28223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24270_ _24270_/X _24308_/B _31659_/Q _31582_/Q wire1351/X VGND VPWR _24269_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_179_2030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27629__S _27630_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24093__A1 _28665_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21482_ _21390_/C _21390_/B _21879_/A _21399_/X _21482_/Y _21403_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_4 XFILLER_85_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_1_core_clk _31956_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_137_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16570__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24842__A _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_2733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23221_ VGND VPWR _23221_/S _30213_/Q _30143_/Q _30213_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20433_ VGND VPWR _20449_/S _28953_/Q _21153_/A0 _28953_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32419_ _32419_/Q _32419_/CLK _32419_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_258_3996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_3546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3385_A wire3386/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1143_A wire1152/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18840__A _28215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_50 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24561__B _24561_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21851__A0 _21410_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16858__B1 wire890/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5005 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_5415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23152_ hold268/A _23157_/A2 _23152_/X _30108_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_20364_ VGND VPWR _20364_/X _23807_/B _23807_/D _20364_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__20581__S _20581_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_2405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26385__A3 _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22103_ VGND VPWR _29813_/Q _18683_/X _29814_/Q _22104_/C _29816_/Q _29815_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__14333__A1 _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13984__A _28513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15530__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23083_ VGND VPWR _23083_/X _23081_/X _23082_/X _23080_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_118_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3552_A _30996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27960_ _27960_/Q _30279_/CLK _27960_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_154_3983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18051__S _18051_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20295_ _20295_/X _27485_/D _20328_/C _27485_/B _20453_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_270_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1310_A _20060_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21829__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_3595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20406__A1 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14884__A2 _14884_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26911_ VPWR VGND _31935_/D hold195/X _26913_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_22034_ _22061_/S hold262/A _22034_/X _22071_/C _21668_/A _21665_/A hold486/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__27364__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32240__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27891_ _27891_/Q _31971_/CLK _27891_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_170_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19272__B2 wire1949/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3760 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18986__S _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_60 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_3590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26488__B _26488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29630_ _29630_/Q _32277_/CLK _29630_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24148__A2 _24146_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_3279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26842_ VGND VPWR _19535_/B _19535_/A wire749/X _26842_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__31808__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23356__B1 _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold279_A hold279/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15833__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14311__C _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25896__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29855__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29561_ _29561_/Q _32306_/CLK _29561_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_96_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19601__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26495__A1_N _31706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26773_ _26773_/B _26687_/A _26791_/A _26773_/X _26773_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__22301__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17903__B _31035_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23985_ _24079_/B1 _28687_/Q _23985_/X _19646_/B _28495_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_2_2945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21906__A1 _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_1633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1777_A _18332_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28512_ _28512_/Q _32016_/CLK _28512_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_3306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19575__A2 wire2672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32390__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18232__C1 _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25724_ _25717_/C _25724_/X _25719_/X _25723_/B _25723_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_129_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22936_ _22929_/A _22929_/B _22936_/Y _22934_/X _22928_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_57_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29492_ VGND VPWR _29492_/D _30415_/CLK _29492_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_228_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_4010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold446_A hold446/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23343__D _30331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30832__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31958__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28443_ _28443_/Q _31887_/CLK _28443_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25655_ _27349_/C _31384_/D _25750_/A _25655_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__20590__A0 _29105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23659__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22867_ VGND VPWR _22867_/Y _22938_/B _22856_/Y _22851_/Y _22865_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_73_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14939__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1944_A wire1951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15061__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24606_ _31540_/Q _24626_/D _24606_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__24320__A2 wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input101_A la_input[35] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21818_ VGND VPWR _21819_/A _21381_/B _21461_/Y _21381_/A _21473_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XPHY_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28374_ _28374_/Q _31914_/CLK _28374_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2116_A wire2117/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17338__A1 wire3577/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27112__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25586_ _25588_/B _25584_/X _31371_/Q _25585_/X _25632_/B VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XPHY_422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22798_ _30101_/Q _22807_/S _30101_/D _22797_/X _22796_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__24228__S _24238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_5121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22331__A1 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19878__A3 wire2213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24871__A3 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27325_ VGND VPWR _27330_/S wire2801/X _32183_/Q _32183_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24537_ _24531_/Y _24537_/X _24533_/Y _24536_/X _24530_/X _31217_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XPHY_1010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_1899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21749_ _21745_/X _21830_/B _21748_/X _21749_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16546__C1 _16546_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30982__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16010__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17130__S _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_142_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26073__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_488 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3158_A wire3160/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_355_core_clk _31910_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_240_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15270_ VGND VPWR _15756_/S _30905_/Q _29183_/Q _15270_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27256_ VGND VPWR _27263_/S _32131_/Q _27701_/A1 _32131_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24468_ _24464_/C _31030_/Q _24468_/Y _24467_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__24084__A1 _28472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length4064 VPWR VGND wire4063/A _28662_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XPHY_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25281__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1076 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27766__C _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14221_ _24588_/B _24380_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26207_ _31592_/Q _26227_/A2 _26208_/B hold214/X _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_158_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23419_ VGND VPWR _30416_/D _23563_/B _23419_/A _23421_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_16_1998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18838__A1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27187_ VGND VPWR _27188_/B hold106/A _32086_/Q _27185_/A _32087_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25567__B _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14055__A _31751_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24399_ _24399_/B _24399_/Y _31003_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_7_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3325_A _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2640 VPWR VGND _14204_/A wire2641/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27485__D _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20645__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30212__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length2651 VPWR VGND _14195_/A _19555_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31338__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14152_ _14300_/B _14300_/A hold92/X _14152_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26138_ VGND VPWR _26019_/A _19539_/X _26137_/X _31558_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_190_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_4153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20491__S _20495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17510__A1 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_4164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27573__A2 _32154_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26376__A3 _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17510__B2 _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_4175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_4134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18960_ _19202_/B _27901_/Q _18959_/X _18960_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14083_ _30332_/Q _14083_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2652_A wire2653/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26069_ _31537_/D _26020_/Y _23618_/B _31537_/Q _26120_/A2 VGND VPWR _26068_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_171_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_3422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22398__A1 _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14875__A2 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17911_ VPWR VGND _17911_/X wire1688/X _26763_/A _17913_/D _17911_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_40_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_1908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_2369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18891_ _19379_/B _28348_/Q _18890_/X _18891_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_248_4811 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18896__S _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21319__C _21320_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30362__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1110 _15521_/S wire1113/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_269_2109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31488__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21070__A1 _21070_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17274__B1 wire2127/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1121 _14551_/X _14642_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24139__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19581__A _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17842_ VGND VPWR _17842_/S _17830_/X _17841_/X _17842_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1132 _14551_/X wire1134/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29828_ VGND VPWR _29828_/D _30398_/CLK _29828_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_267_756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2917_A _20471_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1143 wire1152/A _15639_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_97_2705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1154 _14884_/A2 _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_169_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14627__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15824__A1 wire3276/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25887__A2 _19530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1165 wire1172/A _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29205__D _29205_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18909__B _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19015__A1 _28287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_5570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21616__A _21616_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1176 _15500_/A _15435_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_266_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17773_ _31646_/Q _14067_/A _17773_/X _17474_/X _14305_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29759_ _29759_/Q _31921_/CLK hold281/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1187 VPWR VGND wire1189/A wire1199/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23898__A1 _23893_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14985_ VGND VPWR _14985_/X _14984_/X _14983_/X _15368_/S _15509_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_188_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output418_A _13877_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27006__C _27006_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1260 VPWR VGND wire1260/X _24034_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xclkbuf_leaf_71_core_clk _31119_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_1_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3959_A _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19512_ _19512_/B _24381_/C _24609_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_127_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16724_ VGND VPWR _16724_/X _16961_/S _16964_/B1 _29030_/Q _16723_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_75_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1282 _25018_/B wire1282/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_13936_ _28561_/Q _13936_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_105_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4033_A wire4034/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1293 VPWR VGND wire1293/X _20656_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17577__A1 _31711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22570__A1 wire3703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25639__A2 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24927__A _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18774__B1 wire2281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31721_ _31721_/Q _31738_/CLK _31721_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19443_ VGND VPWR _19441_/A _28442_/Q _28443_/Q _19443_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27303__A _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16655_ _16655_/X _28892_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16654_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_284_2191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_5442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13867_ _28630_/Q _13867_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_235_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_4438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_2563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_1198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15052__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19318__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24646__B _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15606_ VGND VPWR _15606_/X _15603_/X _15605_/X _15640_/A1 _15640_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23114__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4200_A wire4200/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31652_ _31652_/Q _31685_/CLK _31652_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19374_ _28272_/Q _19374_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_16586_ VGND VPWR _16961_/S _28425_/Q _29090_/Q _16586_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17329__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13798_ _31148_/Q _13798_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14260__B1 _29498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22322__A1 _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17329__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19723__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24862__A3 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18325_ VGND VPWR _18329_/S _28110_/Q _27708_/A1 _28110_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30603_ _30603_/Q _31873_/CLK hold314/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20333__A0 _28873_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15537_ wire3258/X _15537_/A2 _15537_/X _15760_/B1 _29297_/Q wire1702/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_249_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_1327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_1496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31583_ _31583_/Q _32032_/CLK _31583_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16537__C1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18136__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32113__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_35_1_core_clk clkbuf_opt_35_1_core_clk/X clkbuf_opt_35_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_50_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27261__A1 _32136_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26064__A2 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18256_ _29754_/Q _18163_/B _22356_/A _18256_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 X_30534_ hold175/A _32017_/CLK input58/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27449__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15468_ VGND VPWR _15644_/S _29608_/Q _29640_/Q _15468_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24075__A1 wire4117/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_4728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22881__S _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24075__B2 _28727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_4072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17207_ VGND VPWR _18664_/B _30213_/Q _30402_/Q _17207_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_119_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17975__S _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22086__B1 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14419_ VGND VPWR _29713_/Q _21339_/C _21451_/B _14422_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_176_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14563__A1 _29455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28602__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19756__A _19756_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18187_ VGND VPWR _18222_/S _28084_/Q _27489_/A1 _28084_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30465_ VGND VPWR _30465_/D _30473_/CLK _30465_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15760__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29728__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30814__D _30814_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15399_ wire1552/X wire3303/X _29261_/Q _15399_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_25_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27013__A1 _31988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24381__B _24618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20097__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27395__D _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20636__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32204_ _32204_/Q _32204_/CLK _32204_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17138_ VGND VPWR _17223_/S _30204_/Q _30393_/Q _17138_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21833__B1 _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold55_A hk_dat_i[14] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32263__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16304__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30396_ _30396_/Q _30399_/CLK _30396_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_193_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_5_24_0_core_clk clkbuf_5_24_1_core_clk/A clkbuf_5_25_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_271_2725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_3980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24378__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32135_ _32135_/Q _32426_/CLK _32135_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30705__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17069_ _17077_/A _21778_/B _29884_/Q _21664_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XFILLER_8_2609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23586__A0 _30506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14866__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28752__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire836_A wire837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29878__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19254__A1 _19274_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20080_ VGND VPWR _14189_/A _19563_/A _20106_/A _20080_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_32066_ _32066_/Q _32071_/CLK _32066_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19624__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26119__A3 _26121_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14412__B _14429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_4319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25327__A1 wire3496/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17265__B1 wire2128/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31017_ VGND VPWR _31017_/D _31369_/CLK _31017_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_41_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25327__B2 _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17804__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_4381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15815__A1 _30887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14618__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25643__D _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30855__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15815__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23217__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19006__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23889__A1 wire4139/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29108__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length934_A fanout932/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17017__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17215__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19557__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18538__C _30086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23353__A3 _14309_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23770_ _31790_/Q _26660_/B _31791_/Q _23770_/X _31789_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA_wire3133_A wire3133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25940__B _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20982_ _20982_/X _23236_/B _23231_/A _20982_/B _23236_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_243_3517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21364__A2 _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20021__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24837__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22721_ VGND VPWR _22721_/X _22747_/B _29884_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_263_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23741__A hold222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15579__B1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31919_ _31919_/Q _32444_/CLK hold218/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_89_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2040 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31380__D _31380_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19309__A2 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_62 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25440_ _25439_/X _25447_/A _31360_/Q _25430_/Y _31300_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28132__CLK _30274_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_308_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22652_ _22652_/X _22663_/B _29714_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__18517__A0 _28289_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20576__S _20576_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16791__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21747__S0 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18554__B _18554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24853__A3 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21603_ _21603_/B _21603_/C _21298_/A _21605_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XFILLER_17_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13979__A _28518_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25371_ _25266_/Y _31269_/Q _31277_/Q _25265_/X _25371_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_104_2912 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16528__C1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22583_ VGND VPWR _22610_/S hold138/A _22582_/X _30070_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18046__S _18046_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19190__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1358_A _19642_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27110_ _27110_/X _27116_/B _32033_/Q _27116_/A _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_24322_ _32008_/Q _27053_/A _24322_/X _31976_/Q wire1346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__30235__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21534_ VGND VPWR _21534_/X _21626_/C _21534_/A _21626_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__27359__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28090_ _28090_/Q _32311_/CLK _28090_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21107__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24066__B2 _30527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25263__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17740__A1 _31643_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24572__A _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15200__C1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_3760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17740__B2 _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28282__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_2303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27041_ VGND VPWR _27043_/B _32000_/Q _31998_/Q _31999_/Q _27036_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__22077__B1 _29807_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14554__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24253_ _31761_/Q _24253_/Y _31762_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_254_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19666__A _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21465_ _21653_/D _21465_/A _21465_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_236_5493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15751__B1 _15751_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30724__D input80/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20627__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23204_ VGND VPWR _23224_/S _30196_/Q _30126_/Q _30196_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_4661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_2068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20416_ VGND VPWR _20417_/S _27708_/A1 _28938_/Q _28938_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24184_ _24184_/X _24182_/X _28546_/Q _23879_/X _24184_/A2 VGND VPWR _24183_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19385__B _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21396_ _14111_/Y _21427_/B _21677_/B _21393_/Y _21599_/A _21400_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 XFILLER_257_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22092__A _22095_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_2601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26358__A3 _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30385__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15310__A2_N _15291_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21200__S _21204_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23135_ _23135_/B _18535_/B _23145_/A _23135_/X _23180_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__24369__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20347_ VGND VPWR _20354_/S _27697_/A1 _28887_/Q _28887_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_137_3499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28992_ _28992_/Q _32353_/CLK _28992_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31630__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_4910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold396_A hold396/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_2082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_5092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14857__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27943_ _27943_/Q _30282_/CLK _27943_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_23066_ _23049_/A _21211_/B _23057_/S _30426_/Q _23066_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19245__A1 _28202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23041__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20278_ VGND VPWR _20291_/S _27694_/A1 _28820_/Q _28820_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_63_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_3606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22820__A _29893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14322__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3000_A _18452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_4129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21052__A1 _29510_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_1966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput202 VPWR VGND mprj_dat_i[6] input202/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__25318__A1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22017_ wire3922/X hold255/A _22017_/X _22071_/C _21665_/A _21659_/A hold262/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__19796__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput213 VPWR VGND _32605_/A serial_load_in VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_79_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_1578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27874_ _27874_/Q _30282_/CLK _27874_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2066_A wire2067/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input149_A la_input[79] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15267__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15806__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14609__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_5420 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_4454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29613_ _29613_/Q _31927_/CLK _29613_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26825_ _26825_/Y _26890_/B _26833_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_264_726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31780__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_347_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_1018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14749__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23354__C _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22652__A_N _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17008__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3303 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19548__A2 wire2645/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26946__B hold491/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29544_ _29544_/Q _32365_/CLK _29544_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23344__A3 _23491_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14770_ _16415_/A2 _14770_/X _28810_/Q wire1488/X _15598_/A1 _15275_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_26756_ _26756_/Y _31793_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_109_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23968_ wire1622/X _23967_/X _31131_/Q _24186_/A3 _23968_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22966__S _22966_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18756__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17559__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24747__A _31451_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25707_ VPWR VGND _31400_/Q _27649_/C _31399_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_2 XFILLER_278_5527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20563__A0 _29079_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18220__A2 wire3174/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22919_ _22913_/Y _22938_/B _22921_/C _22917_/X _22919_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_29475_ _29475_/Q _32439_/CLK _29475_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_4335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26687_ _31796_/D _26687_/C _26687_/A _26687_/B _26687_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__31010__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23899_ _20671_/A _30559_/Q _23899_/X _19857_/B _30623_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__32136__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15034__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3275_A _14079_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27491__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16440_ VGND VPWR _16440_/X _16120_/S _16816_/B1 _16439_/X _16438_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2400_A _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28426_ _28426_/Q _32064_/CLK _28426_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25638_ _25641_/B _25867_/A _25638_/Y _25682_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_55_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23501__A0 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22304__A1 _29890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16782__A2 wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26962__A _31996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23801__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19705__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24844__A3 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16371_ _16721_/A2 _14518_/A _28924_/Q _16371_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28357_ _28357_/Q _30276_/CLK _28357_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28625__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25569_ _31366_/D _31366_/Q _25568_/Y _25571_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19181__B1 wire1942/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27243__A1 _32118_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18110_ VGND VPWR _18110_/S wire3838/X _28039_/Q _28039_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_3156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15322_ VGND VPWR _15716_/S _30505_/Q _30791_/Q _15322_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27308_ VGND VPWR _27311_/S _27274_/X _32169_/Q _32169_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19720__A2 _19718_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27269__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19090_ _30270_/Q _19090_/X _19090_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_68_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31160__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24057__A1 _28502_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28288_ _28288_/Q _30272_/CLK _28288_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32286__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18041_ VGND VPWR _18043_/S wire3844/X _27973_/Q _27973_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_5533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15253_ _15252_/X _15740_/B1 _15752_/A2 _28099_/Q _15253_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_68_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27239_ VGND VPWR _27255_/S _32114_/Q _27684_/A1 _32114_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30728__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15742__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_4469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_2_1_core_clk_A clkbuf_5_2_1_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20079__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14204_ _14204_/Y _14204_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XFILLER_194_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28775__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30250_ _30250_/Q _30250_/CLK _30250_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_29_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15184_ _15507_/A1 _16646_/A2 _15184_/X _15638_/A2 _29085_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__18287__A2 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_2084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21110__S _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3167 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14135_ _20673_/B _14135_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XANTENNA__25557__A1 _31356_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2492 VPWR VGND _20930_/S _20933_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_30181_ _30181_/Q _30391_/CLK _30181_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19992_ _19991_/X _28644_/Q _28644_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_49_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_215_4898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_3321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_386_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_4966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14848__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30878__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18943_ _18943_/X _19368_/D1 _28284_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__23826__A _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14066_ _31548_/Q _24590_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__28005__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26202__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21723__A2_N _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31465__D _31465_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21043__A1 _30039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17247__B1 wire4166/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22240__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26506__B1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18874_ _28217_/Q _18874_/X _19271_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_248_5386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26559__D _26559_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15258__C1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2006_A _18199_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_1941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18995__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23037__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27732__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_123_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17825_ _31733_/Q _17539_/B _17825_/X _31732_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xhold1 hk_dat_i[21] hold1/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_248_4685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30108__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17262__A3 _17261_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16470__A1 _28855_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_4268 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24532__A2 _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28155__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_3534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17756_ _17756_/X _17596_/D _31728_/Q _17490_/B _17749_/X _17755_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__25760__B _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14968_ _15515_/A2 _14968_/X _14967_/X _15517_/A1 _32423_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_261_4841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21346__A2 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18747__B1 _18746_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20003__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29400__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21977__S0 wire3922/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19944__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16707_ VGND VPWR _16707_/X _16928_/B1 _16940_/B1 _16704_/X _16706_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_71_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18211__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13919_ _13919_/A _13919_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_261_4885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_207_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17687_ _17687_/X _17852_/A _17586_/A _31722_/Q _17596_/D _17686_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_18_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14899_ VGND VPWR _14898_/X _14889_/X _15612_/B _14901_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_127_2923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15025__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16222__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_274_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26285__A2 wire2656/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27482__A1 _32299_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31704_ _31704_/Q _31748_/CLK _31704_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19426_ _19425_/X wire3429/X _28438_/D _19424_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xclkbuf_leaf_277_core_clk _31931_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_16638_ VGND VPWR _16842_/S _29230_/Q _29294_/Q _16638_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23099__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20396__S _20406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24296__A1 _31675_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22177__A _29826_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15576__A3 _15615_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25493__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17970__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16773__A2 wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26872__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15430__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31503__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23711__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_6_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26658__B1_N _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_206_core_clk _31693_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14784__A1 _29308_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22608__C _30347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19357_ _19357_/A _19357_/X _19357_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31635_ _31635_/Q _31894_/CLK _31635_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16569_ VGND VPWR _16569_/X _16566_/X _16568_/X _16720_/C1 wire1038/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14784__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15981__B1 _29010_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29550__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19172__B1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18308_ _18308_/B _18308_/Y _18332_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__19711__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_1157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_3327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31566_ _31566_/Q _31798_/CLK _31566_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19288_ _19375_/A2 _28300_/Q _19336_/B1 _19288_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_121_3278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_3045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17722__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25245__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26588__A3 wire1275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22905__A _22905_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_cap2754_A _14141_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14407__B _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23500__S _23522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22059__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20128__C _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18239_ _18244_/A _18201_/A _18239_/X _18239_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_30517_ _30517_/Q _32016_/CLK hold466/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25796__A1 _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15733__B1 wire1134/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30544__D input52/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31497_ _31497_/Q _31869_/CLK _31497_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31653__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16930__C1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20609__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22624__B _29874_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21250_ VGND VPWR _23365_/S _29712_/Q _30428_/Q _29712_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_67_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25000__B _25065_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30448_ VGND VPWR _30448_/D _30460_/CLK _30448_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xhold401 hold401/A hold401/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_255_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22074__A3 _17235_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold412 hold412/A hold412/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_239_1042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21020__S _21020_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold423 hold423/A hold423/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20201_ VGND VPWR _20223_/S _28746_/Q _27684_/A1 _28746_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20085__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21282__A1 wire1869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25548__A1 _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold434 hold434/A hold434/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_5106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21181_ VGND VPWR _21201_/S _29623_/Q _27143_/A1 _29623_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16828__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26745__B1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold445 hold501/A hold445/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_3_5121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30379_ _30379_/Q _32269_/CLK _30379_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16114__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25935__B _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold456 hold456/A hold456/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_284_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23559__A0 _30050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_1999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15497__C1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold467 hold467/A hold467/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__14839__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32009__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold478 hold478/A hold478/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20132_ _25703_/A _20131_/Y _20162_/A2 _28710_/Q _28710_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32118_ _32118_/Q _32430_/CLK _32118_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23736__A _31523_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold489 hold489/A hold489/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_252_1220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24220__A1 _30896_/Q VGND VPWR VPWR VGND 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VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2719 VPWR VGND _19618_/B _14159_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout925 _16941_/C wire926/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__21034__A1 _30033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout936 wire944/A _16722_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_210_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24940_ _25810_/C _24939_/Y _24941_/A _31114_/Q _31114_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20063_ _25567_/B _20062_/Y _20073_/A2 _28677_/Q _28677_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32049_ _32049_/Q _32049_/CLK _32049_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_2230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout947 wire951/A _16068_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_287_2017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19652__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17789__A1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_2028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_3617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_1286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1106_A _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_2449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18549__B _22620_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27642__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20793__A0 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17453__B _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27170__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24871_ _31081_/D _24870_/Y wire2253/X _24475_/C _25109_/B wire868/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_247_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31033__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32159__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_1562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15264__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16461__A1 _28959_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26610_ _26609_/X _27059_/C1 wire3452/X _31881_/Q _31776_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_148_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_2151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_5615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23822_ _30835_/D _23861_/C _23822_/A _23822_/B _23849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__16461__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27590_ VGND VPWR _27594_/B _27589_/X _27588_/X _27590_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_39_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3515_A wire3515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28684__D _28684_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29080__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22534__A1 _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21406__D _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_307 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26541_ _26541_/D _26904_/A _31754_/D _26559_/A _31754_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__20545__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_318 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18202__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23753_ VGND VPWR _23755_/A _31777_/Q _23753_/X _23755_/D _26607_/A VGND VPWR NF_sky130_fd_sc_hd__and4b_1 X_20965_ VGND VPWR _20980_/S hold202/X _29430_/Q hold203/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_329 wire810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28648__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30719__D _30719_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18565__A _30428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15016__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1475_A wire1486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27473__A1 _32293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22704_ _22708_/A _22704_/B _22704_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_29260_ _29260_/Q _32444_/CLK _29260_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19950__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23190__B _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26472_ _26472_/X _31701_/Q _26471_/X _26456_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_0_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21703__B _29351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24287__A1 wire3464/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31183__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23684_ _19787_/X _23684_/X _20126_/A _24188_/A2 _31508_/Q _31461_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XANTENNA_hold144_A hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20896_ VGND VPWR _20906_/S _30246_/Q hold295/X hold296/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24287__B2 _31589_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17961__A1 wire3882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16764__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28211_ _28211_/Q _31971_/CLK _28211_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_3421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22298__A0 hold224/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_2346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25423_ VGND VPWR _25424_/S _31362_/Q _31293_/Q _31293_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14775__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22635_ _22663_/B _22635_/Y _29713_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_277_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29191_ _29191_/Q _32426_/CLK _29191_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout900_A _15790_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3495 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3884_A _29849_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21422__C _21623_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_4199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19163__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28142_ _28142_/Q _30462_/CLK _28142_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25354_ _25360_/C _31272_/Q _31274_/Q _31273_/Q _25354_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__28798__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24039__A1 _31138_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22566_ _22566_/X _22578_/S _22599_/C wire3707/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__16516__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17713__A1 _31716_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold409_A hold409/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18910__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24305_ VGND VPWR _30955_/D _24308_/B _31607_/Q _26386_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_6_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14527__A1 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length913 VPWR VGND wire911/A wire912/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21517_ _21516_/B _21588_/A _21674_/B _21516_/C _21518_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28073_ _28073_/Q _30204_/CLK _28073_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15724__B1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length924 VPWR VGND _16784_/A3 wire923/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25285_ _31359_/Q _25578_/C _25285_/X _25414_/B1 _25284_/X _25187_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_259_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22497_ _22513_/C1 _22496_/X _22511_/A2 _17176_/X _30009_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18504__S _18512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1907_A _18697_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_3883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27024_ _31992_/Q _31993_/Q _27024_/Y _27027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27598__B_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24236_ VGND VPWR _24241_/S _30912_/Q _27624_/A1 _30912_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24995__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21448_ _21448_/Y _21449_/D _21449_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_155_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28028__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21273__A1 _29735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3804 VPWR VGND _22074_/A2 _29910_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20076__A2 _19555_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM256_Di0[21] _19604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24167_ _19858_/X _28608_/Q _24167_/X _26949_/A _28480_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_46_2423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2183_A wire2184/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21379_ _21379_/A _21379_/D _21379_/C _21379_/B _21381_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XFILLER_237_1749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_3400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20054__B _24951_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24431__B1_N _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1076 VPWR VGND _15236_/A1 _15611_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3910 VPWR VGND wire3910/X hold165/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23118_ VGND VPWR _23118_/X _23116_/X _23117_/X _23115_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_111_4115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19218__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24211__A1 _30887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28975_ _28975_/Q _32358_/CLK _28975_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24098_ _30585_/Q _24140_/A2 _24098_/X _30521_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__19843__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24241__S _24241_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3932 VPWR VGND wire3932/X _29726_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_172_2475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_4246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_4_1_core_clk clkbuf_5_4_1_core_clk/X clkbuf_5_4_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_8_3685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_3162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3954 VPWR VGND wire3954/X _29709_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_1_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_3523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19769__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22222__B1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15940_ VGND VPWR _15940_/X wire933/X wire1043/X _15937_/X _15939_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2350_A wire2351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23049_ _23049_/X _29774_/Q _23049_/A _30086_/Q _23342_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_27926_ _27926_/Q _32570_/CLK _27926_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_24_3477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28178__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3976 VPWR VGND wire3976/X wire3976/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_137_1894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2448_A _24223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_4961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3987 wire3987/A _21853_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_111_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18977__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29423__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3998 VPWR VGND wire3998/X _29360_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_115_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23970__B1 _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27161__A0 _32067_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15871_ _16445_/A1 wire1732/X _15871_/X _16150_/A2 _30773_/Q _15770_/B VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_248_2502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27857_ _27857_/Q _30415_/CLK _27857_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16452__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17610_ _17539_/C _17609_/X _31715_/D _17783_/B2 _17607_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_243_5250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26676__B _31793_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14822_ _14822_/X _28915_/Q _14887_/A2 wire1508/X _14822_/B1 _14821_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__25711__A1 _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26808_ _26218_/A _26807_/Y _26835_/A _31854_/Q _31854_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_18590_ _14408_/A wire3712/A _18590_/Y _14069_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25580__B _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27788_ VGND VPWR _27792_/S _25029_/B _32512_/Q _32512_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_54_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22525__A1 _29814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30400__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18729__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31526__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15660__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xload_slew1153 VPWR VGND wire1152/A _14549_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_128_3944 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17541_ _17541_/Y hold261/A _17783_/B2 _17586_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XFILLER_72_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20536__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29527_ _29527_/Q _32114_/CLK _29527_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_283_1725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14753_ _16415_/A2 _15607_/A1 _29621_/Q _14753_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26739_ _26738_/Y _26218_/A _31822_/Q _26760_/B _31822_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_127_2208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_4522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_5557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29573__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16204__A1 _16415_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_830 _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20000__A2 wire2634/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_1255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17401__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_841 wire4018/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_370_core_clk _30757_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_233_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_852 wire4079/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17472_ _17471_/X _26245_/C _31622_/Q _26488_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__21613__B _21613_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29458_ _29458_/Q _32113_/CLK _29458_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_161_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14684_ VGND VPWR _14684_/X _14675_/S _14928_/A1 _14683_/X _14682_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_232_453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_863 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25475__B1 _25448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15558__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16755__A2 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17952__A1 wire3917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_874 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26692__A _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18194__B _30326_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_1179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19211_ _28395_/Q wire1402/X _28395_/D _19199_/X _19210_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22289__A0 _29134_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_885 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16423_ _16423_/X wire1055/X _16416_/X _16418_/X wire923/X _16422_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28409_ _28409_/Q _32350_/CLK _28409_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14766__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_896 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15963__B1 _32305_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22828__A2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2984_A _18507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29389_ _29389_/Q _29389_/CLK _29389_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30550__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31676__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14508__A _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31420_ _31420_/Q _32233_/CLK _31420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19142_ _28069_/Q _19141_/X _19142_/Y _19202_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_16354_ _16353_/X _16491_/S wire985/A _28956_/Q _16354_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_239_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_2151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20944__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16507__A2 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25227__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17704__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23320__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15305_ _15305_/X _28928_/Q _15628_/B1 _15623_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_220_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19073_ _19156_/S _20870_/S _19072_/X _19070_/X _19073_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31351_ _31351_/Q _31351_/CLK _31351_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_290_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16285_ _16721_/A2 wire3283/A _28882_/Q _16285_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_255_3229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17911__A_N wire1688/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18414__S _18423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16723__A _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4198_A wire4198/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17180__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22444__B _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30302_ _30302_/Q _30391_/CLK _30302_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18024_ VGND VPWR _18046_/S wire3904/X _27956_/Q _27956_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15236_ _15231_/X wire1066/X _15236_/A1 _15235_/X _15236_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_289_5420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27727__S _27728_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19457__A1 _19456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31282_ _31282_/Q _31282_/CLK _31282_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_output652_A _14168_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput506 wire4047/X la_output[118] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_61_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_1816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21264__A1 _29726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20067__A2 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2315_A wire2316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22163__C _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput517 _31103_/Q la_output[12] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30233_ _30233_/Q _30233_/CLK _30233_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_68_2681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15167_ _15507_/A1 _16646_/A2 _15167_/X _15638_/A2 _32125_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__26727__B1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput528 _31113_/Q la_output[22] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire1283_A wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25755__B _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput539 _28709_/Q la_output[32] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_3358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14118_ hold455/A _14118_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_214_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30164_ _30164_/Q _30217_/CLK _30164_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16140__B1 _32051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27028__A _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24202__A1 _31122_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19975_ VGND VPWR wire1317/X _25022_/C _24939_/B _19975_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_15098_ _15098_/X _15727_/A2 _15740_/B1 _29051_/Q wire1515/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA__18680__A2 _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24202__B2 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_4627 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31056__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31195__D _31195_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16691__A1 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18926_ _18925_/X wire1935/X _19179_/A2 _28187_/Q _18926_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14049_ _29711_/Q _14049_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire1450_A wire1450/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16691__B2 wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24753__A2 _24678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25950__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32301__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30095_ _30095_/Q _30386_/CLK _30095_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_1997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23961__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27462__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25771__A _32099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18857_ _18856_/X _19367_/B1 _19298_/A2 _27960_/Q _18857_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_hold18_A hk_dat_i[26] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_1636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_3309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31923__D _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_1882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29916__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17808_ _31649_/Q _14067_/A _17808_/X _24594_/A _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_7_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30080__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18788_ _23523_/S _18779_/X _18787_/X _18999_/A1 _18788_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_227_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_5334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24387__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16994__A2 _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15797__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32451__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24910__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20527__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17739_ VGND VPWR _17739_/X _17565_/C _17488_/A _17596_/C _17488_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_71_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18196__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30997_ _30997_/Q _31754_/CLK _30997_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_162_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_4352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26258__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27455__A1 _32284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19932__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18735__A3 _18729_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20750_ VGND VPWR _20754_/S _27512_/A1 _29265_/Q _29265_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_2381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21523__B _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17943__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25466__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15549__A3 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28940__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26663__C1 _26662_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21015__S _21017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19409_ VGND VPWR _19419_/S _27507_/A1 _28425_/Q _28425_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_140_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14757__A1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length4065_A wire4066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20681_ _24467_/C _23611_/D _23611_/A _24881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_223_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14418__A _30452_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19145__B1 _19145_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27207__A1 _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22420_ VPWR VGND _22420_/X _29975_/Q _22427_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_31618_ _31618_/Q _31685_/CLK _31618_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_287_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length3907 VPWR VGND _23272_/A1 wire3908/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_287_68 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20854__S _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19928__B _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32598_ _32598_/A _32598_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__22635__A _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1150_A _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25769__A1 _32095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22351_ _29925_/D wire3160/X _30464_/Q hold385/A _22356_/B VGND VPWR _22350_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__15706__B1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31549_ _31549_/Q _31763_/CLK _31549_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_277_2753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17171__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3298_A wire3298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_1017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22354__B _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21302_ VPWR VGND _21629_/A _21302_/X _21303_/B VGND VPWR NF_sky130_fd_sc_hd__and2_2 X_25070_ _25810_/C _25069_/X _25086_/A2 _31178_/Q _31178_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24977__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27637__S _27638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19448__A1 _28443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22282_ _22279_/X _22281_/X _22243_/A _22243_/C _22282_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_238_2748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24021_ _24021_/X _25022_/B wire4072/X _31168_/Q _19994_/X VGND VPWR _24020_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__21255__A1 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21233_ VGND VPWR _23342_/A _29712_/Q hold398/A _29695_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_156_2448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold220 hold220/A hold220/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19999__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold231 hold231/A hold231/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_233_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_2330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3465_A _31664_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_2953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold242 hold242/A hold242/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout1223_A wire1228/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28320__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold253 hold253/A hold253/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_251_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3206 VPWR VGND _21960_/A wire3206/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__29446__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold264 hold264/A hold264/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27391__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3217 VPWR VGND wire3217/X _14358_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21164_ VGND VPWR _21166_/S _29607_/Q _27509_/A1 _29607_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16131__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold275 hold275/A hold275/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_8_2225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_4036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18671__A2 _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3228 VPWR VGND _21221_/A _23415_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold286 hold286/A hold286/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25384__C _25389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold297 hold297/A hold297/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_186_4514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2505 VPWR VGND _20821_/S _20805_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1709 _23365_/S _23226_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__15485__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16682__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20115_ _27077_/C1 _20114_/Y _20122_/A _28703_/Q _28703_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__13992__A _28505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22801__C _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22204__B1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28760_ _28760_/Q _32353_/CLK _28760_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_3734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3632_A wire3633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23401__C1 wire3412/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23185__B _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21095_ VGND VPWR _21095_/S wire1783/X _29546_/Q _29546_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25972_ _31503_/Q _24782_/Y _25971_/B _24780_/Y _25974_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14693__A0 _28808_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2538 VPWR VGND _20517_/S _20512_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_3523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_1072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22755__A1 _30097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18959__B1 wire1942/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30423__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26777__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15890__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23952__B1 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27372__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27711_ _27719_/S _31398_/Q _27729_/D _27784_/C _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 Xwire1815 VPWR VGND wire1815/X _19090_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_20046_ VGND VPWR _19618_/B _19617_/A wire847/X _20046_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_24923_ _24955_/A _24923_/Y _19584_/B _19584_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 Xwire1826 VPWR VGND wire1826/X wire1826/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20766__A0 _29280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17183__B _17183_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19620__A1 _28478_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28691_ _28691_/Q _31507_/CLK _28691_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_93_4121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1837 VPWR VGND wire1837/X wire1837/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout788 _25911_/B1 _25884_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__28470__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout948_A _16124_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29596__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout799 _24315_/Y _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_58_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26497__A2 _26476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27694__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27642_ VGND VPWR _27647_/S wire2242/X _32383_/Q _32383_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_199_core_clk _32554_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_24854_ VPWR VGND _31072_/D _32559_/Q _25447_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__23085__D_N _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold261_A hold261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_3712 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22507__A1 _17213_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16985__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23704__B1 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23805_ VGND VPWR _23805_/X _31878_/Q _23805_/A _23805_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_184_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_128_core_clk _32429_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_104 _19045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27573_ _25643_/C _32162_/Q _27573_/X _25643_/B _32154_/Q _32170_/Q _32146_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__17911__B _17911_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24785_ _24786_/D _24785_/C _24778_/C _24785_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XFILLER_269_1591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_115 _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30573__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21715__C1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21997_ _14365_/B _21997_/X _22065_/B1 _22965_/S _23180_/A _17183_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_265_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31699__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_126 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1857_A _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27446__A1 _32281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_137 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29312_ _29312_/Q _32347_/CLK _29312_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_4121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19923__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26524_ _31746_/Q _31748_/Q _31747_/Q _31745_/Q _26526_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_208_2541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_148 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23736_ _25982_/B _30820_/D _31523_/Q _26017_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__21191__A0 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16198__B1 _16727_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_159 _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20948_ VGND VPWR _20948_/S _29413_/Q _29516_/Q _29413_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_282_2481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2029_A _17310_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17934__A1 _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27541__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2747 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_2796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29243_ _29243_/Q _32417_/CLK _29243_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_core.RAM256_Di0[7] max_length2353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14748__A1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26455_ _26455_/D _26455_/C _26455_/Y _26539_/A _26509_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_70_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15945__B1 _29243_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23667_ VGND VPWR _23671_/S _27512_/A1 _30797_/Q _30797_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16019__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20879_ VGND VPWR _20901_/S _20878_/X _29368_/Q _29368_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19136__B1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25406_ _31284_/D _25405_/X _26242_/A _25404_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_32_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22618_ _22618_/X wire3699/X _22618_/A1 _22578_/S _30366_/Q VGND VPWR _22617_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 X_29174_ _29174_/Q _32310_/CLK _29174_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19687__A1 _28504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26386_ _26386_/A _26542_/C _26386_/C _26386_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__27120__B _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20764__S _20772_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25209__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24236__S _24241_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23598_ VGND VPWR _30999_/D _26244_/A _26763_/B _23598_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_196_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_3505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26017__A _26017_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28125_ _28125_/Q _30449_/CLK _28125_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15858__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17698__B1 _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25337_ _25413_/A _25350_/D _25346_/D _31270_/Q _25337_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_238_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22549_ VGND VPWR _22550_/S _29838_/Q _30049_/Q _30049_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_4231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2398_A _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_90 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25278__D _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_4_5_0_core_clk clkbuf_4_5_0_core_clk/X clkbuf_4_5_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_16070_ VGND VPWR wire981/A _29310_/Q _28748_/Q _16070_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15173__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28056_ _28056_/Q _30027_/CLK _28056_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_212_5514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25268_ _31295_/Q _25269_/C _31257_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_input77_A la_input[13] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23235__A2 _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24432__A1 _31019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31079__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20049__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15021_ VGND VPWR _15639_/S _29596_/Q _29628_/Q _15021_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_174_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27007_ _27011_/C _31986_/D _27007_/A _27007_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_251_5596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_1513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24219_ VGND VPWR _24238_/S _30895_/Q _27687_/A1 _30895_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_65_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14920__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3601 _19573_/A _19584_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26709__B1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24983__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2565_A _20209_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32324__CLK _32324_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3612 wire3616/A _19792_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14063__A _31537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25199_ _25254_/A2 _31225_/D _25197_/X _25595_/A hold105/A _25198_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__18111__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21797__A2 _21812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_3880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27382__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19573__B _19573_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26185__B2 _32271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23807__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2933 VPWR VGND _20357_/S _20328_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16673__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15476__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24196__B1 wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2944 VPWR VGND _20282_/S _20262_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28813__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3689 _30369_/Q _22510_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_245_5301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_1713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17870__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19760_ _19760_/B _19718_/A _20169_/B _19760_/X _19776_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__29939__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2732_A wire2733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3751 wire3751/A _22924_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23095__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16972_ _16971_/A _30374_/Q _16972_/X _30371_/Q _29773_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_284_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28958_ _28958_/Q _32134_/CLK _28958_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3762 wire3762/X _30200_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_1_473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2966 _18593_/X _18601_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_231_1112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14684__B1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26687__A _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3784 wire3784/X _30026_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_237_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_3296 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18711_ _18710_/X wire1931/X _19298_/A2 _27953_/Q _18711_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_187_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15923_ _15923_/X _32344_/Q _16026_/A2 wire1458/X _16039_/C1 _15922_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__32474__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27909_ _27909_/Q _30424_/CLK _27909_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20757__A0 _29271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19691_ _27071_/C1 _19690_/X _19695_/A2 _28506_/Q _28506_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_115_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_4671 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23346__A_N _23221_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28889_ _28889_/Q _32436_/CLK _28889_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_206_5318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21327__C _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3774_A _30085_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15228__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16425__A1 _15771_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31743__D _31743_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27685__A1 _27685_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30916__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17622__B1 _14244_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18642_ VGND VPWR _18649_/S wire3863/X _28355_/Q _28355_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30920_ _30920_/Q _32300_/CLK _30920_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15854_ VGND VPWR _16823_/S _32414_/Q _32342_/Q _15854_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26837__D _26837_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20939__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25696__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28963__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26893__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23315__S wire820/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14805_ _14799_/X wire1074/A _14937_/A1 _14804_/X _14805_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__21624__A _21966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14987__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24638__C _24638_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18573_ _18541_/X _18560_/X _18573_/X _18572_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_111_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30851_ _30851_/Q _32271_/CLK _30851_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_3391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15785_ VGND VPWR _16823_/S _29455_/Q _32109_/Q _15785_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_128_3752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3941_A _22580_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18409__S _18433_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23171__A1 _22620_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19375__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27437__A1 _32275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22439__B _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_3045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19914__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17524_ VPWR VGND _31707_/D _17524_/B _17524_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_243_4390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14736_ VGND VPWR _14736_/X _14675_/S _15631_/A1 _14733_/X _14735_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21182__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4113_A _28573_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16189__B1 wire894/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30782_ _30782_/Q _32352_/CLK _30782_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_2652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17925__A1 wire3894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24935__A _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_660 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21721__A2 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_4385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_671 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32521_ _32521_/Q _32523_/CLK _32521_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14739__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_682 _24586_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_2352 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25999__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17455_ _26245_/C _31623_/Q _17470_/B _31051_/Q _17453_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_4 XANTENNA__29319__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15936__B1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14667_ wire3249/X wire1727/X _14667_/X _14705_/B1 _29167_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__32574__D _32574_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21062__C _31970_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_693 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15400__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24120__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16406_ _16965_/A2 _16952_/A1 _30903_/Q _16406_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_2396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32452_ _32452_/Q _32464_/CLK _32452_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_4497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19678__A1 _19535_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17386_ wire3561/X _31922_/Q _17386_/X _17272_/A wire2089/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_252_5305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19748__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14598_ wire3249/A _15770_/A _14598_/X _15296_/B1 _29272_/Q wire1693/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__24671__A1 _24666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25469__C _25510_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31403_ _31403_/Q _32390_/CLK _31403_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19125_ _23527_/S _19124_/X _19114_/X wire1883/X _19125_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17689__B1 _17688_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16337_ _16328_/X _16336_/X _16332_/X wire911/X _16337_/Y _16323_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_2 XFILLER_257_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22682__B1 _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32383_ _32383_/Q _32550_/CLK _32383_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26948__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2240_A _19724_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18144__S _18144_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18350__A1 _23285_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19467__C _19467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_4746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25215__A3 _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24959__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31334_ _31334_/Q _31548_/CLK _31334_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29469__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19056_ _19178_/B _28033_/Q _19055_/X _19056_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_157_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27457__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16268_ _16841_/C1 _16546_/C1 _16267_/X _16268_/Y _16265_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_250_5040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15164__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22029__A3 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24670__A _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25620__B1 _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15703__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2336 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21237__A1 _14360_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18007_ VGND VPWR _18007_/S wire3843/X _27941_/Q _27941_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17983__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31918__D hold432/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15219_ VGND VPWR _15516_/S _28854_/Q _28886_/Q _15219_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_174_3772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput303 _13962_/Y la_iena[50] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14911__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19764__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31265_ VGND VPWR _31265_/D _31923_/CLK _31265_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_170_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_3734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23777__A3 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput314 _13952_/Y la_iena[60] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30822__D _30822_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_902 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16199_ _16199_/X _16192_/X _16198_/X wire1055/X _16194_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_187_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18102__A1 wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM128_Di0[17] wire2689/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput325 _14006_/Y la_iena[70] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_273_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput336 _13996_/Y la_iena[80] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30446__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30216_ _30216_/Q _30455_/CLK _30216_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput347 _13986_/Y la_iena[90] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27373__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26176__A1 _31576_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21318__A_N _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput358 _13823_/Y la_oenb[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16113__B1 wire951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20996__A0 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19850__A1 wire4107/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31196_ _31196_/Q _31738_/CLK _31196_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_116_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput369 _13813_/Y la_oenb[10] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16599__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23717__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28493__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32599__A _32599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24187__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15467__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25923__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30147_ _30147_/Q _32160_/CLK _30147_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19958_ _19957_/X _28627_/Q _28627_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__21518__B _21638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23934__B1 _28618_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18909_ _28122_/Q _18909_/X _19087_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_263_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19063__C1 _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30078_ hold131/A _32127_/CLK _30078_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_274_128 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_4228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19889_ _19888_/X _28594_/Q _28594_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_266_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30596__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14420__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2874_A wire2877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16416__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21920_ _14407_/A wire3802/X _21920_/X _21919_/X _21946_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_228_556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_292_core_clk _28342_/CLK clkbuf_opt_27_4_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_227_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31841__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25687__B1 _25687_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_52 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21534__A _21534_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_221_core_clk _31375_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25006__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14978__A1 _15350_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21851_ _22061_/S hold298/A _21851_/X _22071_/C _21866_/A _21410_/A hold223/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_149_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1198_A fanout1194/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30269__D _30269_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23698__C1 _23697_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_3732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18169__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23162__A1 hold255/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19366__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27428__A1 _32272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17223__S _17223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23162__B2 _30110_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_1190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20802_ VGND VPWR _20817_/S _29315_/Q wire1826/X _29315_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_124_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19905__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24570_ _25416_/C _24570_/X _24570_/B _24508_/X _24551_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XANTENNA_wire3213_A wire3213/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23701__A3 _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22504__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24267__D _24276_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21782_ _21782_/B _21782_/Y _21846_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_90_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17377__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16719__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24845__A _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27523__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24978__C_N wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23521_ VGND VPWR _23527_/S wire4145/X _30447_/Q _23521_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_2605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31991__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26763__C _26763_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20733_ VGND VPWR _20747_/S wire1682/A _29248_/Q _29248_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15927__B1 _30890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19939__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14148__A _14148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1173_A _15435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17392__A2 _31923_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24111__B1 wire1614/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24564__B _24565_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26651__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26240_ VPWR VGND _31608_/D _26240_/B _26242_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 X_23452_ _23452_/X _29379_/Q _29817_/Q _13835_/Y wire3264/X VGND VPWR _23439_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_101_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20664_ _31391_/Q _31387_/Q _25686_/C _31388_/Q _25648_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__19669__A1 _28495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20584__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19658__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22268__A3 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3704 VPWR VGND _23360_/A1 _30338_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_203_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18562__B hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_5252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22403_ VGND VPWR _22405_/S _29959_/Q _21834_/X _29959_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26171_ _26171_/X _31479_/Q _27131_/B _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23229__A1_N _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23383_ VGND VPWR _23559_/S _30361_/Q _29679_/Q _30361_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14582__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26939__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3582_A _30862_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31221__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32347__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20595_ VGND VPWR _20598_/S wire1682/X _29110_/Q _29110_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_4993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17144__A2 _17143_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18341__A1 wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27061__C1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27600__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25122_ _25122_/D _31198_/Q _25122_/Y _31200_/Q _31199_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_235_4846 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15155__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22334_ _22334_/B _22334_/Y _22384_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_69_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16352__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21228__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25053_ _25065_/A _19959_/A2 _25053_/X _25069_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29930_ hold259/A _32572_/CLK _29930_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_62_3706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28836__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14902__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22265_ VGND VPWR _30049_/Q _22263_/X _22264_/Y _22265_/X _21051_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__24965__A2 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30732__D input76/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3847_A _29860_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24004_ _28497_/Q _24046_/B1 _24003_/X _28593_/Q _24004_/X _24069_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_186_5001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21216_ _23563_/A _29685_/D wire1278/X _22518_/B1 _24447_/A _22619_/S VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_112_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27364__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31371__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21709__A _29911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16104__B1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29861_ _29861_/Q _32581_/CLK _29861_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire3003 VPWR VGND _18461_/S _18438_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__32497__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_3187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19841__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22196_ _22196_/X _22195_/X _30104_/Q _22281_/B2 wire2284/X VGND VPWR _22092_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22304__S _23373_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17906__B _17910_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3025 VPWR VGND _18372_/S _18389_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_268_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24178__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15458__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3036 VPWR VGND _18353_/S _18364_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_279_979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28812_ _28812_/Q _32049_/CLK _28812_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30939__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2302 VPWR VGND _25022_/C wire2302/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21147_ VGND VPWR _21151_/S _29590_/Q wire2002/A _29590_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25914__A1 _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15707__A _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_3910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29792_ hold253/A _29803_/CLK _29792_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21428__B _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2313 _17913_/D _19520_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_169_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2324 VPWR VGND wire2324/X _14213_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14666__B1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3069 VPWR VGND _18049_/S _18051_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22189__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold476_A hold476/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27860__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23346__D _30482_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2335 VPWR VGND wire2335/X _14207_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23925__B1 wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28986__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2346 VPWR VGND wire2346/X wire2347/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28743_ _28743_/Q _32398_/CLK _28743_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_134_2598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_309_core_clk _30030_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_60_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2357 VPWR VGND wire2357/X wire2358/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21078_ VGND VPWR _21092_/S _27245_/A0 _29529_/Q _29529_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25955_ _25954_/X _27131_/B _31499_/Q _25935_/X _31491_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_112_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_2043 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_3916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2368 VPWR VGND wire2368/X wire2369/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_112_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2379 wire2380/X wire2379/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27667__A1 _27737_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24906_ _25652_/A _24905_/Y _24941_/A _31097_/Q _31097_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20029_ _27071_/C1 _20028_/Y _20028_/A wire4066/X _28661_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_186_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input131_A la_input[62] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1656 VPWR VGND _19857_/B wire1656/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28674_ _28674_/Q _32160_/CLK _28674_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_95_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2146_A _25079_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25886_ _25703_/A _25885_/Y _25911_/B1 _24770_/A _31460_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20759__S _20784_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1678 VPWR VGND wire1678/X wire1678/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16958__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26875__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21951__A2 _21941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1689 VPWR VGND _17891_/B _26541_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_234_526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21444__A _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27625_ VGND VPWR _27630_/S _27705_/A1 _32367_/Q _32367_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_77_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14969__A1 _15350_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24458__C _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24837_ _24837_/C _24837_/Y _26559_/A _31059_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_186_2975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15091__B1 _15751_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24350__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14490__A1_N _14515_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26954__B _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21164__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27556_ _27556_/X _31382_/Q _25682_/B _27550_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_93_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15570_ wire1501/X _15569_/X _32327_/Q wire1496/X _15570_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_145_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24768_ _24768_/A _31444_/Q _24775_/D _24768_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_245_1826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_50 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14521_ wire3272/X _14524_/A _14517_/Y _30329_/Q _29450_/Q _14516_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_26507_ _26507_/Y _31741_/Q _31742_/Q _31740_/Q _31743_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_265_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_61 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_3004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_3357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23719_ _23718_/X _19926_/B wire1875/X _31470_/Q _23720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA__15918__B1 _28407_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19849__A _19849_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27487_ VGND VPWR _27503_/S wire1837/A _32302_/Q _32302_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_3690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20911__B1 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24699_ _24699_/Y _24699_/B _31454_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_83 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16186__A3 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3355_A _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_4402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24102__B1 _28634_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_94 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17240_ VGND VPWR _17243_/S hold212/X wire3789/X hold213/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25445__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26642__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29226_ _29226_/Q _32302_/CLK _29226_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28366__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14452_ VPWR VGND _14452_/X _29454_/Q _30439_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_275_4637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16591__A0 _29186_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26438_ _26438_/X _26539_/A _26509_/C _17552_/S _17502_/B _26436_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14197__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15394__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20494__S _20506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24653__A1 _24678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23000__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29611__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26970__A _26970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25850__B1 _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_5013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_96_core_clk _32310_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19124__A3 _19118_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5193 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29157_ _29157_/Q _31914_/CLK _29157_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17171_ _22026_/A2 _23150_/C _29897_/Q _21630_/B1 _21674_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_239_2309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire920 VPWR VGND wire920/X wire921/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2682_A _14170_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14383_ _14383_/C _31016_/Q _24438_/C _24424_/B _14388_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 X_26369_ _26368_/X _31672_/Q _31672_/D wire781/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__17135__A2 _14092_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3522_A _31047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_25_core_clk _32513_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_16122_ _16447_/A2 _16447_/A1 _29464_/Q _16122_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30469__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28108_ _28108_/Q _32318_/CLK _28108_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27277__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29088_ _29088_/Q _31953_/CLK _29088_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18883__A2 _18880_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31714__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25602__B1 _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22416__A0 _21990_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16894__A1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16053_ VGND VPWR _16823_/S _28088_/Q _29044_/Q _16053_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28039_ _28039_/Q _30156_/CLK _28039_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19584__A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24956__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30642__D _30642_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29761__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2947_A _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_4176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22967__A1 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15004_ VGND VPWR _15004_/X _15004_/B _15004_/A _15226_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__18096__A0 _28025_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3420 wire3425/X _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_45_3959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31050_ VGND VPWR _31050_/D _31698_/CLK _31050_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27355__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_289_3111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21619__A _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_1928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19832__A1 _28568_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3453 VPWR VGND wire3454/A _31836_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27009__C _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30001_ _30001_/Q _32108_/CLK _30001_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_152_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16646__A1 _15771_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24169__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19812_ _27077_/C1 _19811_/X _19852_/A2 _28558_/Q _28558_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xfanout3475 VPWR VGND _27793_/B _31397_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25905__A1 _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16212__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31864__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4063_A wire4063/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14657__B1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23916__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_2687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3570 VPWR VGND wire3570/X _30874_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19743_ _25718_/A _19742_/Y _19772_/A _28528_/Q _28528_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire3581 VPWR VGND wire3581/X wire3582/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27107__B1 _27106_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16955_ VGND VPWR _16961_/S _32073_/Q _29132_/Q _16955_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_108_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3592 VPWR VGND wire3592/X _30856_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32569__D hold229/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2796 VPWR VGND _27513_/S _27485_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_output615_A _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25752__C _25752_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26210__A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18399__A1 _18499_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24649__B _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2880 VPWR VGND _20780_/S _20772_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_15906_ _16149_/A2 _16149_/A1 _29008_/Q _15906_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_228_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31952_ VGND VPWR _31952_/D _32114_/CLK hold257/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19674_ _19555_/A _14177_/A _19680_/A _24069_/A2 _26017_/B _19674_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 Xwire2891 VPWR VGND wire2891/X _20618_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19060__A2 _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1246_A _24194_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16886_ VGND VPWR _16918_/S _30916_/Q _29194_/Q _16886_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14409__B1 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25669__B1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_4917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15606__C1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17071__A1 _17067_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27740__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30903_ _30903_/Q _30903_/CLK _30903_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18625_ VGND VPWR _18625_/S _18625_/A1 _28339_/Q _28339_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26330__A1 _26329_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15837_ _15837_/X _15834_/X _16522_/B1 wire1043/X _15836_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_59_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31883_ _31883_/Q _31892_/CLK _31883_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_124_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29141__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18139__S _18139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15082__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19348__B1 _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24341__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15621__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26881__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_4079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1413_A _23485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30834_ _30834_/Q _32319_/CLK _30834_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21155__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18556_ _30445_/Q _18549_/Y _23231_/A _18556_/X hold377/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_223_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15768_ _15768_/Y _30440_/Q _15771_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XANTENNA__19899__A1 _28599_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28709__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22498__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22352__C1 _22378_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26618__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17507_ _17507_/B _17507_/Y _31761_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_37_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17978__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14719_ _14719_/X _14715_/X _14718_/Y wire1202/X _14717_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_280_2974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_2761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18487_ VGND VPWR wire3846/X _28260_/Q _18491_/S _28260_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_30765_ _30765_/Q _32271_/CLK _30765_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_198_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31244__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16882__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30817__D _30817_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15699_ _15699_/X _30801_/Q _15727_/A2 wire1515/X _15543_/S _15698_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_50_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18663__A _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18571__A1 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_2947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16177__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_490 wire707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17374__A2 _31920_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24384__B _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26633__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32504_ _32504_/Q _32531_/CLK _32504_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14188__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17438_ VGND VPWR _17438_/X wire2070/X _17436_/X _17302_/A hold46/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_200_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_1661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29291__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold85_A hk_dat_i[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_15 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24815__D _31706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16582__B1 _28890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23447__A2 wire3264/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30696_ hold312/A _32546_/CLK input96/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_200_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_26 _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26880__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_1976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_37 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_3812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_48 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32435_ _32435_/Q _32435_/CLK _32435_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_179_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_5293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28859__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17369_ wire3561/X _31919_/Q _17369_/X _17272_/A wire2100/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__23998__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_59 _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_2139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_5157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19108_ VGND VPWR _19178_/B _28196_/Q _28228_/Q _19108_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_2081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15137__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_3577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31394__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26397__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20380_ VGND VPWR _20384_/S _25029_/B _28904_/Q _28904_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20130__A1 _28709_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32366_ _32366_/Q _32438_/CLK _32366_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16334__B1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17531__C1 _17462_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25739__A4 _26838_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_3108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22407__A0 _21882_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16885__A1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19039_ _19203_/A2 _28288_/Q _19318_/B1 _19039_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31317_ _31317_/Q _31317_/CLK _31317_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_4587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_5444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30552__D input48/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32297_ _32297_/Q _32297_/CLK _32297_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18602__S _18602_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_3875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22958__A1 _30470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_4508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27883__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22050_ VGND VPWR _22061_/S hold476/A _21633_/A _22072_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27346__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26149__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20969__A0 _29434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31248_ hold74/A _32296_/CLK _31248_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19823__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21001_ VGND VPWR _21013_/S _29466_/Q _27245_/A0 _29466_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21630__A1 _29900_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17834__B1 _17833_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_3881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21630__B2 _29730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31179_ VGND VPWR _31179_/D _32551_/CLK _31179_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_wire3163_A _18666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_2191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15845__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1019_A _15768_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23907__B1 _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_2497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23744__A _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_402_core_clk _30258_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_60_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24175__A3 _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28239__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19941__B _25035_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23383__A1 _30361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24559__B _31203_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24580__B1 _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15860__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25740_ _25739_/X _31407_/Q _31407_/D _25738_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_228_5395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20197__A1 _28742_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22952_ VGND VPWR _22969_/S _21392_/A _30129_/Q _30129_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_263_4541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20579__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3428_A wire3429/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21394__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19660__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25006__C_N _24941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17062__A1 _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26857__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27650__S _27657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21903_ _21903_/Y _21903_/B _21903_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_228_4694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24278__C _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25671_ _25671_/Y _31389_/Q _27413_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_55_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22883_ _22877_/A _22883_/Y _22910_/B _22878_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21bai_1 XFILLER_129_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18049__S _18049_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19339__B1 _19338_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_2060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22079__B _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27410_ VGND VPWR _27412_/S _32258_/Q _27276_/X _32258_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16270__C1 wire1449/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24332__B1 wire1346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14415__A3 _29727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1388_A _26017_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24622_ _19505_/A _24622_/X _24590_/B _24615_/Y _31554_/Q _24590_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__28389__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_1960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21146__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21834_ _21832_/X _21834_/X _29885_/Q _21447_/B _21853_/B _21833_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_2 XFILLER_206_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28390_ VGND VPWR _28390_/D _30378_/CLK _28390_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_270_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14820__A0 _32347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23686__A2 _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24883__A1 _31087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22343__C1 _22342_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29634__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27341_ VGND VPWR _27348_/S _32197_/Q _27266_/X _32197_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length1747_A wire1748/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24553_ _25430_/B _24508_/X _24553_/X _24553_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XPHY_615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21765_ wire769/A _21853_/B _21764_/X _21345_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_276_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_2413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16168__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17365__A2 wire2102/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26624__A2 _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23504_ VGND VPWR _23522_/S _23503_/X _31956_/Q _30438_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20716_ VGND VPWR _20716_/S _29232_/Q _27624_/A1 _29232_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27272_ _27272_/X _27280_/C _31424_/Q hold487/A _27280_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_240_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14179__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21711__B _29911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24484_ _24467_/X _31039_/Q _24484_/Y _24481_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_hold224_A hold224/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16573__B1 wire1060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15376__B2 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30611__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21696_ VGND VPWR _21696_/C _21682_/X _21697_/B _21696_/D _21696_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_107_2987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22095__A _22095_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31737__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29011_ _29011_/Q _32358_/CLK _29011_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_1247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21203__S _21205_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26223_ _31600_/Q _26227_/A2 _26224_/B _32290_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_279_2656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18285__A_N _29862_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23435_ _13840_/Y _29371_/Q _23435_/X _29828_/Q _14098_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_20647_ VGND VPWR _20647_/S _27707_/A1 _29193_/Q _29193_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_4056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18314__A1 _18234_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2800 VPWR VGND _27417_/A0 _27272_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_88_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19511__B1 _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length3545 VPWR VGND _14268_/B _14303_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_192_5082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_5257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_2591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26154_ VGND VPWR _26019_/A wire2207/X _26153_/X _31566_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_49_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20121__A1 _28706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23366_ VGND VPWR _23366_/S _30344_/Q _29662_/Q _30344_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16325__B1 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_3639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20578_ VGND VPWR _20584_/S _27704_/A1 _29094_/Q _29094_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18865__A2 _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_2380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_2621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_3076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14325__B _29724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3030_A _18357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25105_ _24311_/C _26542_/C wire2626/X _14398_/B _24310_/B _25106_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 Xmax_length2855 VPWR VGND _21184_/S _21202_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16876__A1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22317_ VGND VPWR _23559_/S _29903_/Q _29162_/Q _29903_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_3942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20672__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24938__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26085_ _26085_/Y _26090_/C _31542_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__31887__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23297_ VGND VPWR _23300_/S _23297_/A1 _30279_/Q _30279_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25060__A1 _31173_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18512__S _18512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2096_A wire2096/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14887__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input179_A mprj_dat_i[14] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22949__A1 _21439_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19762__D_N _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29014__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27337__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25036_ _25776_/C _25035_/X _25082_/A2 _31161_/Q _31161_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_47_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29913_ hold212/A _29914_/CLK _29913_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21439__A _21439_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23071__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22248_ _22248_/B _22263_/C _22248_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__19814__A1 _28559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23610__A2 _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_3626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout2015 wire2017/X _24353_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16628__A1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17825__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26949__B _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29844_ VGND VPWR _29844_/D _32441_/CLK hold475/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_wire2263_A _19648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22179_ VGND VPWR _21051_/B _22178_/Y _22200_/D _22179_/X hold493/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_278_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14341__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19290__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22969__S _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2110 VPWR VGND wire2110/X wire2110/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25899__B1 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31117__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2121 wire2121/X wire2121/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1325 VPWR VGND wire1328/A _19857_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15300__A1 _15624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_143_core_clk _32038_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_286_2605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26560__A1 _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2143 VPWR VGND wire2143/X _19628_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29775_ hold455/A _30410_/CLK _29775_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1347 VPWR VGND _26364_/A1 wire1355/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26987_ _27059_/C1 _26986_/Y _26985_/C _31978_/Q _31978_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2154 VPWR VGND wire2154/X _19618_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25572__C _25577_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21909__C1 _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1358 VPWR VGND _27070_/C _19642_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29164__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18748__A _28211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23374__A1 _30352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2165 VPWR VGND _26882_/B _20106_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19578__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1369 VPWR VGND _24370_/A2 _19645_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_40_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24571__B1 _24568_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15851__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2176 VPWR VGND _25063_/B _20169_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16740_ _16740_/X _29190_/Q _16964_/A2 _16966_/A3 _16736_/S _16739_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire2430_A wire2430/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28726_ VGND VPWR _28726_/D _31351_/CLK _28726_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xwire1442 wire1443/X wire1442/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_210_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13952_ _28545_/Q _13952_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire2187 VPWR VGND _20165_/B _19756_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25938_ _25971_/B _31484_/D _25937_/Y _26159_/A _25935_/X _31484_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__20188__A1 _28738_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19042__A2 _19038_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20489__S _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2198 _19748_/A _26801_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire2528_A _20551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27104__A3 _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26965__A _31997_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23804__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21924__A2 _17148_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27560__S _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18250__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26312__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1486 wire1486/A wire1486/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16671_ _16661_/X _16671_/Y _16657_/X _16670_/X _16665_/X wire923/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_1 X_28657_ VGND VPWR _28657_/D _32282_/CLK _28657_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_227_4182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30141__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13883_ _28614_/Q _13883_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 X_25869_ _25877_/D _31454_/Q _31452_/Q _31453_/Q _25869_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_112_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31267__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23126__A1 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16800__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24323__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18410_ VGND VPWR _18410_/S _28185_/Q _29849_/Q _28185_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_4502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15622_ _15619_/X _15621_/X wire1202/A _15622_/Y _15628_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__26863__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27608_ VGND VPWR _27616_/S wire1682/X _32350_/Q _32350_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_1601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32512__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21137__A0 _29581_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_2639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19390_ VGND VPWR _19415_/S _27236_/A0 _28406_/Q _28406_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_73_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28588_ _28588_/Q _30630_/CLK _28588_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23677__A2 _23737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14811__B1 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_3170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17798__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18341_ VGND VPWR _18364_/S wire3892/A _28119_/Q _28119_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15553_ _15548_/X wire1074/X wire1084/X _15552_/X _15553_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27539_ _25641_/B _32223_/Q _27539_/X _25641_/A _32215_/Q _32231_/Q _32207_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_73_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26076__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16159__A3 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17356__A2 _31917_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19750__B1 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14504_ _14510_/A _14515_/B _29452_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__22980__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21783__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14219__C _29967_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_25_1_core_clk clkbuf_opt_25_2_core_clk/A clkbuf_opt_25_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19896__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30291__CLK _30452_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15367__A1 _28425_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16564__A0 _29573_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30550_ hold422/A _31887_/CLK input49/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_12_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18272_ _18273_/B _18271_/X _22372_/A2 _29757_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_138_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20360__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15484_ _16959_/A2 wire3303/X _29125_/Q _15484_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_51_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22209__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25649__C_N _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21113__S _21129_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17223_ VGND VPWR _17223_/S _30215_/Q _30404_/Q _17223_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29209_ _29209_/Q _32421_/CLK _29209_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_141_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14435_ _20832_/A _20836_/A _20832_/D _20832_/C _14435_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__14575__C1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30481_ VGND VPWR _30481_/D _30481_/CLK hold501/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17108__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_2729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14516__A _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5406 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_5455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22101__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput13 VGND VPWR hold48/A hold47/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__19502__B1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27025__C1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32220_ _32220_/Q _32543_/CLK _32220_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15119__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput24 hold5/X hold6/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_17154_ VGND VPWR _17223_/S _30206_/Q _30395_/Q _17154_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14366_ _20822_/A _29447_/Q _14459_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__20112__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput35 VPWR VGND hold78/A hold77/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_67_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23829__A _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14590__A2 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20952__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27576__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput46 VGND VPWR input46/X la_input[100] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 Xwire761 VPWR VGND wire761/X wire761/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22733__A _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output565_A _28733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput57 VPWR VGND input57/X la_input[110] VGND VPWR NF_sky130_fd_sc_hd__buf_2 Xwire772 VPWR VGND wire772/X wire772/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18930__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16105_ _16149_/A2 _16149_/A1 _28412_/Q _16105_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_278_1476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput68 VGND VPWR input68/X la_input[120] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__16867__A1 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_14_0_core_clk clkbuf_5_14_1_core_clk/A clkbuf_4_7_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_234_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27040__A2 _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32151_ _32151_/Q _32473_/CLK _32151_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_5529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput79 VPWR VGND la_input[15] input79/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__21860__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25587__C1 _31370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17085_ _17085_/X wire3791/X _29998_/Q _29426_/Q _22484_/A2 VGND VPWR _17084_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA_wire4180_A hold78/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14950__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14297_ _31276_/Q _14245_/B _14297_/X wire3232/X _29506_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18422__S _18423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14878__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16331__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18069__A0 _27999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27591__A3 _32180_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31102_ _31102_/Q _32528_/CLK _31102_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_26_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16036_ VGND VPWR _16036_/X _16035_/X _16034_/X _16039_/C1 wire1052/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_188_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27735__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32082_ _32082_/Q _32233_/CLK _32082_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_1020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26616__A1_N _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_1774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3250 VPWR VGND _14544_/A _14744_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_258_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31033_ _31033_/Q _31369_/CLK _31033_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17816__B1 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_3188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14251__A _14303_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4090 VPWR VGND wire4090/X wire4091/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3294 VPWR VGND _14883_/A1 wire3306/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_284_201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25029__C_N wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16095__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32042__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27036__A _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26551__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24011__C1 _24010_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17987_ VGND VPWR _18017_/S wire3918/X _27921_/Q _27921_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_5513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_2047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22168__A2 _22165_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23365__A1 _21465_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_3532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15842__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14645__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19726_ VGND VPWR _19539_/X _26017_/B _19715_/C _19726_/X _25745_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_269_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1870 VPWR VGND _26331_/B _26327_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_3835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16938_ _16938_/A2 wire3285/X _29647_/Q _16938_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_78_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20179__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23904__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19033__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18158__A_N _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20399__S _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1628_A _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28531__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29657__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23714__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_4883 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27470__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31935_ _31935_/Q _31966_/CLK _31935_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19657_ _26148_/A _19656_/X _19695_/A2 _28489_/Q _28489_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_263_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16869_ _16878_/A1 wire962/X _29066_/Q _16878_/A2 _16869_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_34_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23117__A1 hold232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32192__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_79_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24314__B1 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26854__A2 wire2655/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18608_ VGND VPWR _18616_/S wire3866/X _28322_/Q _28322_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_185_2271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19588_ _19588_/Y _26870_/B _19609_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_31866_ _31866_/Q _32565_/CLK _31866_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_3871 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30634__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14802__B1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23503__S _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15070__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_1171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18539_ _21101_/A wire3171/A _23342_/C _30086_/Q _29774_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 X_30817_ _30817_/Q _32063_/CLK _30817_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_4209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28681__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1997_A _18678_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31797_ _31797_/Q _31836_/CLK _31797_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_121_5588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26067__B1 _31537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27803__A1 _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22627__B _29874_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26606__A2 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25409__A3 _25187_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21550_ VGND VPWR _21655_/C _21550_/B _21550_/A _30351_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_124_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21531__B _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30748_ hold280/A _32259_/CLK _30748_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24078__C1 wire1257/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16555__B1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20351__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_4196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3009_A _18423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17752__C1 _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20501_ VGND VPWR _20505_/S _27248_/A0 _29019_/Q _29019_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_102_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19001__B _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21481_ _21481_/X _21424_/A _21424_/C _21421_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_159_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_124_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30784__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30679_ _30679_/Q _31436_/CLK hold336/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24093__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14426__A _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15021__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29037__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23220_ VGND VPWR _23223_/S _30212_/Q _30142_/Q _30212_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_137_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20432_ VGND VPWR _20444_/S _28952_/Q _27690_/A1 _28952_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32418_ _32418_/Q _32421_/CLK _32418_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_3817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14581__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20862__S _20866_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27567__B1 _32337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_1505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_1964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18840__B _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1406 VPWR VGND wire1405/A _19317_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_271_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27031__A2 _27035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15956__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_2895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23151_ _23191_/C1 _23191_/B1 _23185_/B _23302_/B _23151_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xmax_length1417 VPWR VGND _23477_/S _20901_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21851__A1 hold298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16858__B2 wire705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_62 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20363_ _25881_/D _24459_/B _23599_/A _20682_/C _23599_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 X_32349_ _32349_/Q _32349_/CLK _32349_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25042__A1 _31164_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_5427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_5141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_5028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14869__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30014__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1136_A _14549_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25376__D _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22102_ _22104_/B _22119_/D _29816_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_270_2417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_2207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27319__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27645__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23082_ hold289/A wire3171/X _23082_/X _30094_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__14333__A2 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20294_ VGND VPWR _20294_/S _27710_/A1 _28836_/Q _28836_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17456__B _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25593__A2 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20163__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28061__CLK _30274_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3987 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_1251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29187__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3946 VGND VPWR VGND VPWR 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VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_415 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16086__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_72 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26841_ _27071_/C1 _26840_/Y wire753/X _31870_/Q _31870_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_9_2194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length1697_A wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30164__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_337_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18568__A _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23356__A1 _23350_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15691__S _15702_/S VGND VPWR VPWR VGND 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VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23984_ _23984_/X wire1587/X _30671_/Q _30735_/Q wire1633/X VGND VPWR wire1264/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21367__B1 _21645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_5083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21906__A2 _21676_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26785__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28511_ _28511_/Q _30580_/CLK _28511_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27380__S _27384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length1864_A _22807_/S VGND VPWR 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VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17525__A_N _17605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_71 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26845__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28442_ _28442_/Q _31887_/CLK _28442_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21119__A0 _29563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25654_ _31384_/Q _31383_/Q _27395_/B _27349_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_241_5381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_2043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22866_ _22856_/Y _22851_/Y _22865_/Y _22866_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_16_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20590__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15597__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold439_A hold439/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_3816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4407 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24605_ _24626_/C _24606_/B _31540_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_224_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21817_ VGND VPWR _21817_/S hold289/A _21816_/X _29784_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3906 VGND VPWR VGND VPWR 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XANTENNA__18507__S _18507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1937_A wire1939/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22331__A2 _22338_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27324_ VGND VPWR _27330_/S _27268_/X _32182_/Q _32182_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19878__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15349__A1 _29228_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_33_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24536_ VGND VPWR _24536_/S _31287_/Q _31215_/Q _24536_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21748_ _14408_/A _22074_/A2 _21748_/X _21747_/X _21846_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20342__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2109_A wire2110/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16010__A2 _16447_/A2 VGND VPWR VPWR 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NF_sky130_fd_sc_hd__decap_4 X_21679_ _21679_/B _21679_/A _21679_/Y _21679_/D _21679_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_101_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25281__A1 _31358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24084__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_137_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3053_A _18054_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length4065 VPWR VGND output500/A wire4066/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_257_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25281__B2 _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24752__B _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18299__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14220_ wire3232/X _14219_/X _13829_/A _31274_/Q _29504_/Q _14220_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_2 X_26206_ VPWR VGND _31591_/D _26206_/B _26913_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_253_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_2486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23292__A0 _30274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23418_ _14146_/B _30416_/Q _23563_/A _30418_/Q _23419_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_7_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27558__A0 _32265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1088 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27186_ hold107/X _27276_/C _27185_/X hold108/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__20772__S _20772_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1763 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24398_ _31002_/Q _31001_/Q _31000_/Q _14399_/A _31003_/Q _24398_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_68_3767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22553__A _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25567__C _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2186 VGND VPWR VGND VPWR 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XANTENNA__17510__A2 _26543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_376_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3318_A wire3365/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26376__A4 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32065__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23044__B1 _18540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_324_core_clk _30385_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_14082_ _29774_/Q _14082_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26068_ VGND VPWR _26102_/C _26066_/X _26068_/X _26123_/D _26068_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_171_2315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_1340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_2659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30507__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23595__A1 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22398__A2 wire743/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25019_ _25810_/C _25018_/X _25021_/A2 _31153_/Q _31153_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_17910_ VPWR VGND _17910_/X wire1688/X _26763_/A _17913_/D _17910_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_114_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24792__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26518__D1 _17504_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2645_A _14200_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18890_ _19298_/A2 _27929_/Q wire1931/A _18890_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14071__A _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19263__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1100 fanout1103/X _14675_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28554__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3781_A _23061_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1111 _14552_/Y wire1113/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16077__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17274__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18300__A_N wire3834/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18471__A0 _28244_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17841_ _31652_/Q _14067_/A _17841_/X _14238_/X _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xfanout1122 _14551_/X _15610_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17274__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29827_ _29827_/Q _30051_/CLK _29827_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19581__B _19581_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_113_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27098__D_N _26882_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1144 wire1152/A _15516_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_267_768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1155 VPWR VGND _14884_/A2 wire1171/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15824__A2 wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1166 _15752_/A2 _15721_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_169_2222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_3811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19015__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29758_ _29758_/Q _31921_/CLK hold250/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17772_ _17772_/X _17685_/A _17863_/B _17595_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21616__B _29718_/Q VGND VPWR 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VPWR NF_sky130_fd_sc_hd__o211a_4 XANTENNA__27089__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21108__S _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1261 VPWR VGND wire1261/X _24025_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_40_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16723_ VGND VPWR _16723_/X _28998_/Q _16725_/A _16725_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_264_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28709_ _28709_/Q _32546_/CLK _28709_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19658__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13935_ _28562_/Q _13935_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1272 VPWR VGND wire1272/X _26772_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__31902__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1283 VPWR VGND wire1283/X wire1283/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29689_ _29689_/Q _30454_/CLK _29689_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_144_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15037__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17577__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26297__B1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18774__A1 wire3766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16234__C1 _29628_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19971__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24927__B _24927_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26836__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31720_ _31720_/Q _31730_/CLK _31720_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19442_ VGND VPWR _28442_/D _27091_/C1 _25512_/B _19441_/Y _19440_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA_clkbuf_leaf_264_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16654_ _16965_/A2 _16952_/A1 _28860_/Q _16654_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15588__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13866_ _28631_/Q _13866_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__23831__B _23849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27303__B hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15333__C _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4026_A _28675_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20581__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16785__B1 wire892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20947__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_5454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18925__B _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23323__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15605_ _15605_/X _32328_/Q _15604_/X _15605_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__24646__C _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31651_ _31651_/Q _32567_/CLK _31651_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_186_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19373_ _19372_/X _19278_/S _19375_/A2 _28208_/Q _19373_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_16585_ wire996/X _16585_/X _16584_/X _16964_/B1 _32063_/Q wire1470/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14945__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13797_ _31149_/Q _13797_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14260__A1 _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18417__S _18425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26049__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17329__A2 input176/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18526__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14260__B2 wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22322__A2 _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_40_core_clk _32535_/CLK clkbuf_leaf_40_core_clk/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_30602_ hold161/A _31806_/CLK _30602_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18324_ _22380_/A _18324_/Y _18328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_199_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15536_ _15526_/X _29158_/D _15536_/B1 _15535_/X _15518_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__27797__A0 _32520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20333__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31582_ _31582_/Q _32271_/CLK _31582_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_output682_A _31459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1209_A wire1210/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26064__A3 _26070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18255_ _18255_/Y _18254_/X _18295_/B _29340_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 X_30533_ _30533_/Q _32435_/CLK hold175/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_275_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15467_ _15467_/X _29479_/Q wire1118/X _15737_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_121_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32582__D input74/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3812 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24075__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30037__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24662__B _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17206_ VGND VPWR _17238_/S _17200_/X _17205_/X _30401_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_190_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22086__A1 wire1547/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27549__A0 _32232_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14418_ _14429_/B _14418_/Y _30452_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_102_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18186_ _18186_/Y _18278_/A _22328_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XANTENNA__14563__A2 wire1171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15760__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30464_ _30464_/Q _30481_/CLK _30464_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_12_3799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18829__A2 wire1405/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19756__B _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15398_ VGND VPWR _15644_/S _29027_/Q _28995_/Q _15398_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_1814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_3405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28084__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18660__B _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32203_ _32203_/Q _32204_/CLK _32203_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17137_ VGND VPWR _17238_/S _17130_/X _17136_/X _30392_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_265_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14349_ _14331_/A _14338_/Y _14353_/C _14355_/B _14355_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__25024__A1 _31155_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30395_ _30395_/Q _30395_/CLK _30395_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18152__S _18152_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_152_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1578_A wire1579/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16304__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26221__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32134_ _32134_/Q _32134_/CLK _32134_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27465__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17068_ VPWR VGND _21436_/B _21447_/B _29884_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_214_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30187__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23586__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17991__S _17991_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16019_ VGND VPWR _16566_/S _28087_/Q _29043_/Q _16019_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24783__B1 _24779_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19772__A _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31432__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32065_ _32065_/Q _32439_/CLK _32065_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30830__D _30830_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32558__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19254__A2 _19248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2881_A _20772_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17265__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31016_ _31016_/Q _31693_/CLK _31016_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_26_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_3968 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17265__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire829_A wire829/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26524__A1 _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25327__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_3_7_2_core_clk clkbuf_3_7_2_core_clk/X clkbuf_3_7_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_152_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_3945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23338__A1 _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23338__B2 _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15815__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1912_A wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25732__C1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19006__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16400__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21349__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23889__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17017__A1 _29723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18214__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21018__S _21018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31582__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17017__B2 _29878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19709_ _27003_/B1 _19708_/Y _19711_/A2 _28515_/Q _28515_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_247_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20981_ VGND VPWR _22679_/S _29446_/Q _14362_/Y _29446_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_1699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15028__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2954_A _18668_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26288__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22720_ _30094_/D _14404_/B _22719_/Y _30094_/Q _22661_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_260_4555 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31918_ _31918_/Q _31918_/CLK hold432/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23741__B _31764_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20572__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20857__S _23497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16776__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24838__A1 _31063_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1180_A _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16240__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25014__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24556__C _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22651_ _22656_/C _22663_/B _29727_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__22849__B1 _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31849_ _31849_/Q _32017_/CLK _31849_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18517__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1086_A wire1087/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17231__S _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21747__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21602_ VGND VPWR _21597_/Y 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XFILLER_273_4905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_5317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24321_ _24320_/X _24357_/B1 wire1668/X _24353_/A1 _30963_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22076__C _22620_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28427__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21533_ _21626_/D _21588_/A _21533_/Y _21674_/B _21626_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XFILLER_124_2372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19947__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_5339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3495_A _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24066__A2 _24140_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25263__A1 _29872_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17740__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_2569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24572__B _24572_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27040_ _27036_/C _31999_/D _27051_/A _27039_/Y _31998_/Q _31999_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_222_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22077__A1 _22076_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24252_ _24252_/X _26509_/C _26539_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__32088__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22077__B2 _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21464_ _21653_/C _21464_/B _21464_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14554__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15751__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20592__S _20605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19666__B _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_83 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20088__B1 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23203_ VGND VPWR _23209_/S hold394/A hold402/X _30195_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15686__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19158__S _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20415_ VGND VPWR _20415_/S _27707_/A1 _28937_/Q _28937_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__13995__A _28502_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3662_A _30453_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24183_ _20061_/B _28706_/Q _24183_/X _19710_/B _28514_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__25015__A1 _31151_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1420_A _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21395_ _21392_/Y _21599_/A _21677_/B _21393_/Y _21400_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_236_4793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3948 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18062__S _18079_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22092__B _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26358__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28577__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23134_ _30174_/D _23185_/B _23133_/X _30174_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__27375__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20346_ VGND VPWR _20360_/S _27251_/A0 _28886_/Q _28886_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_2627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_24_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28991_ _28991_/Q _31977_/CLK _28991_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29822__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23577__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19682__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27942_ _27942_/Q _30432_/CLK _27942_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_46_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23065_ _23115_/B _23061_/B _23145_/A _23065_/X _29710_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__30740__D _30740_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20277_ VGND VPWR _20294_/S _27693_/A1 _28819_/Q _28819_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3927_A _29732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19245__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_1934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22820__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17256__A1 _31902_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22016_ _22016_/X _22015_/X _21955_/B _22014_/X _21630_/X wire3146/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_133_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21052__A2 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput203 mprj_dat_i[7] input203/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_96_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27873_ _27873_/Q _30378_/CLK _27873_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__31925__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17914__B _31797_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput214 VPWR VGND wire4189/A serial_resetn_in VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22312__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20260__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18298__A _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1887_A _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15806__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29612_ _29612_/Q _29644_/CLK _29612_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24526__B1 _31221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26824_ _27117_/C1 _26823_/X _26835_/A _31862_/Q _31862_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__29972__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_4466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_287_2766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2059_A wire2060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17008__A1 _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_1986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17008__B2 _29877_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18205__B1 _18204_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29543_ _29543_/Q _32438_/CLK _29543_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_208_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27404__A _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26755_ _26754_/Y _27117_/C1 _31830_/Q _26760_/B _31830_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23344__A4 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23967_ _23967_/X _20669_/B _19927_/X _28621_/Q wire3512/X _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_2_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26279__B1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18756__A1 _27955_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20012__B1 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14490__B2 _22078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26818__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19953__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25706_ _31399_/Q _31400_/Q _25709_/B _25701_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_148_2840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input211_A serial_clock_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22918_ _22921_/C _22917_/X _22918_/Y _22913_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_204_4726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29474_ _29474_/Q _32302_/CLK _29474_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20563__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2226_A _19547_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26686_ _26686_/Y _26687_/D _26687_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_281_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20767__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29202__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24239__S _24239_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23898_ _30856_/D _23893_/X _23896_/X _24209_/B1 _23897_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_268_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21760__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_41 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_3891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15034__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28425_ _28425_/Q _32134_/CLK _28425_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_196_5228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25637_ _31391_/Q _31388_/Q _31387_/Q _25686_/C _25637_/Y _25635_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_4 XFILLER_148_2895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22849_ _22820_/C _22820_/B _30472_/Q _22849_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_202_5173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_3703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_4838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18508__A1 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23501__A1 _14539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3268_A wire3270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26962__B hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_5613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16370_ VGND VPWR _16837_/S _32428_/Q _32356_/Q _16370_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_3503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28356_ _28356_/Q _30758_/CLK _28356_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20315__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16519__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25859__A _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25568_ _31366_/Q wire2814/X _25568_/Y _25571_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__15990__A1 wire3276/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14793__A2 wire1172/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22982__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24763__A _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_3769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15321_ _15321_/X _28101_/Q _15320_/X _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_196_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27307_ VGND VPWR _27311_/S _27417_/A0 _32168_/Q _32168_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24519_ _24519_/Y _31294_/Q _31222_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_12_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19857__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29352__CLK _30411_/CLK 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_14895_/X _14897_/X _14937_/A1 _14893_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_242_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_3_4_0_core_clk_A clkbuf_3_5_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21362__A _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31703_ _31703_/Q _32579_/CLK _31703_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19425_ _19425_/X _28437_/Q wire3536/X hold285/A _28438_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_127_2935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14769__C1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16637_ _16637_/X _29575_/Q _16818_/A2 _16841_/B2 _16843_/A2 _16636_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_264_2585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13849_ _29817_/Q _13849_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14675__S _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18147__S _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23099__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24296__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26690__B1 _31798_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26872__B _26872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_3825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31634_ _31634_/Q _31685_/CLK _31634_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19356_ _19355_/X _19278_/S _19375_/A2 _27983_/Q _19356_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_34_3265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_3213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20306__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14784__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15981__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16568_ _16841_/A2 _16568_/X _16567_/X _16722_/C1 _29476_/Q _16642_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_199_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_4291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24673__A _31446_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32230__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_1185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18307_ _18306_/X _18308_/B _22372_/A2 _29764_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_88_3929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15519_ VGND VPWR _15750_/S _28798_/Q _28830_/Q _15519_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31565_ _31565_/Q _31798_/CLK _31565_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16890__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19287_ _19374_/B _28044_/Q _19286_/X _19287_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_12_4286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16499_ _16499_/X _29258_/Q _16515_/B1 _16832_/A3 _16825_/S _16498_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__24048__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25245__A1 _29863_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25245__B2 hold103/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_3893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_2031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22905__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18238_ VGND VPWR _18309_/S _28092_/Q _27690_/A1 _28092_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30516_ _30516_/Q _32372_/CLK _30516_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_1581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15733__A1 _29615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_246_core_clk _32277_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_253_5060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31496_ _31496_/Q _31874_/CLK _31496_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_121_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29845__CLK _30479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21806__A1 _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17287__A _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30447_ _30447_/Q _32078_/CLK _30447_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18169_ _18244_/A _18168_/X _18201_/A _18223_/B _18169_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_233_4933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32380__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold402 hold402/A hold402/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_271_2501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold413 hold413/A hold413/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_47_3659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20200_ VGND VPWR _20205_/S _28745_/Q wire1833/X _28745_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_2632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_2078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_4392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold424 hold424/A hold424/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_239_1054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21180_ VGND VPWR _21202_/S _29622_/Q wire2002/X _29622_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25548__A2 _31352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26745__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30822__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold435 hold435/A hold435/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_239_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24205__C1 wire1245/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30378_ _30378_/Q _30378_/CLK _30378_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31948__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold446 hold446/A hold446/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20490__A0 _29008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold457 hold457/A hold457/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23559__A1 _30480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20131_ VGND VPWR _19530_/B _19617_/A _20162_/A2 _20131_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xhold468 hold468/A hold468/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16694__C1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32117_ _32117_/Q _32117_/CLK _32117_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_63_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length4108_A _28577_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold479 hold479/A hold479/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__29995__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23736__B _25982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18610__S _18624_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2709 VPWR VGND wire2709/X wire2709/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23228__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22231__A1 _30109_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32048_ _32048_/Q _32417_/CLK _32048_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_23_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20062_ VGND VPWR _14216_/A _19573_/A _20073_/A2 _20062_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_80_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout937 _16964_/B1 _16925_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22231__B2 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_3375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_1839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout948 _16838_/A1 _16124_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_171_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20242__A0 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15249__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout959 wire962/A _16884_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_41_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30972__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18327__A2_N _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18549__C _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24870_ wire868/X _31081_/Q _24870_/Y _24475_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_286_896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1001_A wire1005/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16997__B1 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27170__B2 wire2415/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21990__B1 _21989_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2028 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_5_7_0_core_clk clkbuf_5_7_1_core_clk/A clkbuf_5_7_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_247_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23821_ wire1808/A _23820_/X _31816_/Q wire1625/X _23822_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__16461__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25720__A2 _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23731__A1 _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26540_ _32577_/D _26539_/X _31753_/D _26516_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_208_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_308 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23752_ _31775_/Q _31773_/Q _26607_/B _26595_/B _31774_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 X_20964_ VGND VPWR _20964_/S _30170_/Q _29429_/Q _29429_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_319 wire811/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16749__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30202__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20587__S _20589_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3508_A wire3508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31328__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18565__B _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16213__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17410__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22703_ VGND VPWR _22704_/B _21464_/A _21463_/C _22779_/A1 _22699_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_260_3640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26471_ _26471_/X _26456_/A _31700_/Q _31701_/Q _26441_/B VGND VPWR _26447_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_197_4803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23683_ _30804_/D _23677_/X _23680_/X _26017_/C _23682_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_203_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29375__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_13_0_core_clk_A clkbuf_4_6_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18057__S _18077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1370_A wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20895_ VGND VPWR _22550_/S _20894_/X _29376_/Q _29376_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_17_3452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24287__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28210_ _28210_/Q _30027_/CLK _28210_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout1468_A _15770_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25422_ VGND VPWR _25424_/S _31361_/Q _31292_/Q _31292_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_52_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_3684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23495__A0 _30434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22298__A1 _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22634_ VGND VPWR _23342_/A _22633_/Y _30086_/Q _30086_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29190_ _29190_/Q _32557_/CLK _29190_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_4331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_3433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15972__A1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19699__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_4858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold137_A hold137/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19163__A1 _28166_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27225__A2 _32103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28141_ _28141_/Q _30390_/CLK _28141_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25353_ _25352_/Y _26559_/A _31273_/D _25351_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_100_3308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30352__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22565_ VGND VPWR _22619_/S hold156/A _22564_/X _30061_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_5294 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24039__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25398__B _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3877_A wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1635_A _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26433__B1 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17713__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24304_ VGND VPWR _30954_/D _24308_/B _31606_/Q _26386_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_219_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_4582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21516_ _21516_/C _21516_/B _21518_/C _21588_/A _21674_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 X_28072_ _28072_/Q _30449_/CLK _28072_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_2659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14527__A2 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15724__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25284_ _25284_/X _31260_/Q _25283_/Y _25277_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_254_4145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24444__C1 _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16921__B1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22496_ VGND VPWR _22512_/A3 _22512_/A4 _22510_/A2 _22496_/X _30009_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22307__S _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27023_ _31992_/D _31992_/Q _27022_/Y _27027_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_219_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27967__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24235_ VGND VPWR _24239_/S _30911_/Q _27703_/A1 _30911_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14932__C1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21447_ _21447_/B _21447_/A _21449_/D _21447_/D _29885_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_219_3564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16305__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_2118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM256_Di0[20] _19601_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22470__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24166_ wire734/A _24957_/B _31182_/Q _31150_/Q _25022_/B VGND VPWR _24165_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_load_slew2852_A _21288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21378_ _21378_/C _21378_/B _21378_/Y _21378_/D _21378_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_102_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20481__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26303__A _26872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15488__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3110_A _14294_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23117_ hold232/A _23157_/A2 _23117_/X _30101_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 Xwire3900 VPWR VGND wire3900/X wire3901/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xmax_length1077 VPWR VGND _15611_/B1 _15632_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20329_ VGND VPWR _20335_/S _27679_/A1 _28869_/Q _28869_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input161_A la_input[8] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3911 VPWR VGND wire3911/X wire3912/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19218__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28974_ _28974_/Q _32117_/CLK _28974_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18520__S _18523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24097_ _25980_/A2 _28602_/Q _24097_/X _24139_/A2 wire4135/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22o_4 XANTENNA_wire2176_A _20169_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3922 VPWR VGND wire3922/X _21769_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19843__C _26823_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3933 VPWR VGND wire3933/X _23140_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18426__A0 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17229__A1 wire3217/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21025__A2 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23048_ VGND VPWR _23048_/X _30422_/Q _23047_/X _22553_/A _18540_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27925_ _27925_/Q _28275_/CLK _27925_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22222__B2 _30043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19623__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20233__A0 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18977__A1 _28157_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23970__A1 _28557_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_4973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26957__B _31983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3999 VPWR VGND _14095_/A _29357_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_3459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23970__B2 wire4014/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15870_ VGND VPWR _15870_/X _16249_/S wire1035/X _15867_/X _15869_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27856_ _32551_/D _32551_/Q _27855_/Y _25810_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_wire2343_A _14201_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27161__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20784__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24758__A _31464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14821_ _14648_/A _14648_/C _32307_/Q _14821_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16452__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26807_ _26807_/Y _26872_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_93_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14999__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25711__A2 _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27787_ VGND VPWR _27792_/S _25027_/B _32511_/Q _32511_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14463__A1 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24999_ _25676_/B1 _24998_/X _25017_/A2 _31143_/Q _31143_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23183__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29718__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23722__A1 _31471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17540_ _17538_/X _17783_/B2 _17539_/X _31708_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29526_ _29526_/Q _32432_/CLK _29526_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_15_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_5585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14752_ VGND VPWR _14752_/X _14749_/X _14751_/X _15610_/B1 wire1214/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_26738_ _26738_/Y _31784_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_148_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20497__S _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2608_A wire2609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21985__A1_N wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21733__B1 _21705_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22278__A _29840_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_820 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32253__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16204__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_831 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17471_ _31052_/Q _17452_/X _31051_/Q _31686_/Q _17471_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_842 wire4018/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29457_ _29457_/Q _32350_/CLK _29457_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14683_ VGND VPWR _14794_/S _28084_/Q _29040_/Q _14683_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26669_ _23770_/X _26669_/X _26668_/Y _31795_/Q _26696_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA_853 wire4079/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15412__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_864 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19210_ _19210_/X wire1883/X _19204_/X _19209_/X _18661_/C _22554_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__26672__B1 _31792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_875 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18194__C _18244_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28408_ _28408_/Q _32379_/CLK _28408_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16422_ VGND VPWR _16422_/X _16419_/X _16421_/X _16720_/C1 wire1038/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22289__A1 _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23486__A0 _31947_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_2889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_886 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15963__A1 wire1477/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29388_ _29388_/Q _30446_/CLK _29388_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_4881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_897 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28742__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24493__A _31224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19154__A1 _28361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29868__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14508__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19614__A_N _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_4280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19141_ _19201_/A2 _28293_/Q _19318_/B1 _19141_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_16353_ _16445_/A1 _23395_/B _16353_/X _16814_/B1 _29254_/Q _14544_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_259_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_4922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28339_ _28339_/Q _31920_/CLK _28339_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17165__B1 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25227__A1 _17347_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2977_A _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25227__B2 wire3497/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18901__A1 _28349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16507__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15304_ VGND VPWR _15623_/S _32432_/Q _32360_/Q _15304_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_157_3607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19072_ VGND VPWR _19072_/X _19357_/B _22088_/B1 _28066_/Q _19071_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__17475__D_N _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31350_ _31350_/Q _31796_/CLK _31350_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15176__C1 _15598_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15715__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16284_ _16841_/A2 _16284_/X _16283_/X _16720_/C1 _28786_/Q _16642_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_179_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25778__A2 _31417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26975__A1 _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30845__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24435__C1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16912__B1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21717__A_N wire3991/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21121__S _21134_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30301_ _30301_/Q _30391_/CLK _30301_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_103_2286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18023_ VGND VPWR _18048_/S _23272_/A1 _27955_/Q _27955_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_3522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22444__C _22444_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15235_ VGND VPWR _15235_/X _15234_/X _15233_/X _15235_/A1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_155_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28892__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31281_ _31281_/Q _31282_/CLK _31281_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_116_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4093_A wire4093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19457__A2 _31343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput507 wire4044/X la_output[119] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30232_ _30232_/Q _30294_/CLK _30232_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22461__A1 _17029_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15166_ VGND VPWR _15639_/S _29600_/Q _29632_/Q _15166_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_237_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput518 _31104_/Q la_output[13] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26727__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20960__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_3255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput529 _31114_/Q la_output[23] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_2705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output645_A wire2317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20472__A0 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14117_ _21328_/A _14117_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__24738__B1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30163_ _30163_/Q _30406_/CLK _30163_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30995__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16140__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19974_ _19973_/X _28635_/Q _28635_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15097_ _15097_/X _15749_/C1 _15090_/X _15092_/X _15735_/B _15096_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_46_3692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18430__S _18431_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24202__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28122__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18680__A3 _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29248__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18417__A0 _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27743__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18925_ _28219_/Q _18925_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14048_ _29972_/Q _14048_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__16691__A2 _14104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23410__B1 _22387_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30094_ _30094_/Q _30386_/CLK _30094_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25950__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20224__A0 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18968__A1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_4000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1443_A _17911_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18856_ _18856_/B _18856_/X _30259_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_0_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20775__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21972__A0 _17159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30225__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17640__A1 _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17807_ _17852_/A _17807_/X _17807_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_97_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_4123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4795 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28272__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18787_ VGND VPWR _18797_/S _18786_/X _18782_/X _18787_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29398__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15999_ _16447_/A2 _16447_/A1 _32418_/Q _15999_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_97_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18666__A _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2485_A wire2488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15651__B1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23713__A1 _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22516__A2 wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24387__B _24638_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_1301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17738_ _17539_/C _17737_/X _31726_/D _17524_/B _17734_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_244_2901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_2347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_5357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_4781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_3939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30996_ _30996_/Q _31547_/CLK _30996_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_162_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18196__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19393__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_36_2615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30375__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17669_ _17669_/X _23618_/B _17474_/C _17473_/X _17457_/B VGND VPWR _14067_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14206__A1 hold210/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_2213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15403__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26663__B1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19408_ VGND VPWR _19418_/S _27699_/A1 _28424_/Q _28424_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_5081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23477__A0 _30425_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20680_ VGND VPWR _29205_/D _20680_/B _32340_/Q _20680_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__15954__A1 wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19145__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14418__B _14429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27207__A2 _32094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23511__S _23515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31617_ _31617_/Q _31762_/CLK _31617_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19339_ wire4144/X wire1403/X _28401_/D _19327_/X _19338_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_192_5434 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_1966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17156__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25218__A1 _31233_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32597_ VGND VPWR _32597_/X _32597_/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__18605__S _18624_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27210__C _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19928__C _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22635__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22350_ _22350_/Y _18251_/Y _18216_/X _22370_/A2 _22384_/B _18250_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__23229__B1 _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15706__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31548_ _31548_/Q _31548_/CLK _31548_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20160__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16903__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31770__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21031__S _21034_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21301_ _21303_/B _21629_/B _21588_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xor2_4 XFILLER_203_1974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_3139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22281_ _22281_/X _22280_/X _30116_/Q _22281_/B2 wire2284/X VGND VPWR _22092_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_255_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15182__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31479_ 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VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_49_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3229 _30328_/D _23415_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold287 hold287/A hold287/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_271_1641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18408__A0 _29847_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_95 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold298 hold298/A hold298/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20114_ _20114_/Y _20114_/B _20124_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__22204__A1 _30105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27653__S _27654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16682__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25962__A _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18266__A2_N _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21094_ VGND VPWR _21094_/S _27261_/A0 _29545_/Q _29545_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25971_ VGND VPWR _25973_/B _25971_/B _31049_/Q _25971_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_115_2146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20171__A wire881/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20215__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2528 _20550_/S _20551_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__14693__A1 _28776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28615__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2539 VPWR VGND wire2539/X _20486_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22755__A2 wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27710_ VGND VPWR _27710_/S _27710_/A1 _32444_/Q _32444_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_210_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1805 VPWR VGND _30484_/D _23563_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26777__B _27058_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24922_ _25676_/B1 _24921_/Y _24947_/A _31105_/Q _31105_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20045_ _25703_/A _20044_/Y wire847/X _28669_/Q _28669_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_246_502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19081__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23952__B2 _30549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1816 VPWR VGND wire1816/X _19088_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27143__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3625_A _30757_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28690_ _28690_/Q _31837_/CLK _28690_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20766__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17183__C _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19620__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout789 _25022_/X _25082_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31150__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21417__D _21419_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1849 VPWR VGND _22063_/A _21830_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32276__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16434__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17631__A1 hold261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27641_ VGND VPWR _27647_/S _19721_/A _32382_/Q _32382_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26351__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24853_ _24464_/C _31071_/D _25109_/B _24852_/Y wire868/X wire2253/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_110_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout843_A _20061_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30718__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15642__B1 _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1585_A wire1588/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23704__A1 _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22507__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19908__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24901__B1 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23804_ _30829_/D _23813_/C _23804_/A _23807_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_265_2146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27572_ _27572_/A _27572_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20518__A1 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24784_ _24784_/C _24785_/C _24784_/A _24784_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_105 _19046_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold254_A hold254/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21996_ _21993_/X _21900_/B _21995_/X _21996_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__28765__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_116 _20660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26793__A _26793_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18295__B _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29311_ _29311_/Q _32379_/CLK _29311_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_127 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19637__A_N _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26523_ _26522_/X _26537_/A _31747_/D _26523_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA_138 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_2_6_core_clk clkbuf_opt_2_7_core_clk/A clkbuf_opt_2_6_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_23735_ _30819_/D _23822_/B wire766/X _23735_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_240_4745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_149 _22615_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20947_ VGND VPWR _20947_/S hold375/A _29515_/Q _29412_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3994_A wire3995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_5580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_2575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29242_ _29242_/Q _32350_/CLK _29242_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_3421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM256_Di0[6] wire2345/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26454_ _26453_/A _26453_/C _26455_/D _26453_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xclkbuf_leaf_168_core_clk _31884_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_hold421_A hold421/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15945__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_3481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23666_ VGND VPWR _23666_/S _27624_/A1 _30796_/Q _30796_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30868__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20878_ VGND VPWR _20878_/S _30237_/Q hold471/X _20878_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_104_3230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25405_ _25405_/X _25380_/C _31284_/Q _25414_/B1 _31276_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_104_3252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22617_ _22594_/S _22617_/B _22617_/X _22617_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_29173_ _29173_/Q _32309_/CLK _29173_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26385_ _26386_/C _31680_/D _26544_/C1 _26384_/Y wire868/X wire2255/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__17147__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25209__A1 _29846_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18515__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23597_ _30760_/D _23402_/A _23597_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XANTENNA__19687__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27120__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22140__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25209__B2 _31361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_2592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28124_ _28124_/Q _30282_/CLK _28124_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26017__B _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17698__A1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19200__A _28232_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25336_ VGND VPWR _25346_/D _31268_/Q _31269_/Q _25336_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_52_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_2502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18895__B1 _18894_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17698__B2 _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22548_ VGND VPWR _22551_/S _29837_/Q _30048_/Q _30048_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24968__B1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28055_ _28055_/Q _32269_/CLK _28055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14905__C1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25267_ _25269_/B _31257_/Q _31295_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_22479_ _22513_/C1 _22478_/X _22511_/A2 _17104_/X _30000_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16035__S wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23235__A3 _23231_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28145__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15020_ _15605_/A2 _15020_/X _15019_/X _15638_/B1 _29467_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_276_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27006_ _27006_/A _27006_/C _27011_/C _27006_/D _27006_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_191_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_4_0_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24218_ VGND VPWR _24223_/S _30894_/Q _27686_/A1 _30894_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_2128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26709__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21877__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20780__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14920__A2 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19844__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3602 _19551_/A _19566_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_25198_ _24572_/B _25263_/C1 _31356_/Q _25416_/A _25198_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_272_1405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_3116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20454__A0 wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26033__A _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3613 _14398_/B _19503_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_43_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21797__A3 hold289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16122__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24149_ _28479_/Q _26949_/A wire805/A _28607_/Q _25980_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__26185__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3300_A wire3306/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_2708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30248__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout2923 VPWR VGND _20407_/S _20386_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26968__A _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24196__A1 _28739_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23807__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_2224 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3730 wire3731/X wire3730/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_1_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_4325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25393__B1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24196__B2 _31153_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16673__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15476__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16971_ _16971_/Y _16971_/A _23307_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 X_28957_ _28957_/Q _30339_/CLK _28957_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26590__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17870__B2 _31736_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28295__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_2246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23095__C _23095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20206__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21608__C _22067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18710_ _30252_/Q _18710_/X _19046_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_248_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26687__B _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2978 _18524_/S _18512_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29540__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15922_ wire1004/X wire1476/X _32416_/Q _15922_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27908_ _27908_/Q _30272_/CLK _27908_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_20_3128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23943__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19072__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27134__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2725_A wire2725/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19690_ _27070_/C _20061_/A _20104_/B _19690_/X _27122_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20757__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_2635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_3313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28888_ _28888_/Q _29580_/CLK _28888_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3861_A _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14510__C _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15228__A3 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16425__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17622__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18641_ VGND VPWR _18655_/S wire3866/X _28354_/Q _28354_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_185_2601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15853_ _15853_/X _28910_/Q _16515_/B1 _16150_/A3 _16249_/S _15852_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17622__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27839_ _32542_/Q _25804_/A _32543_/Q _27840_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_20_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30398__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output226_A wire3505/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25696__A1 _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23156__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16976__A3 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16830__C1 wire918/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31643__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14804_ _14803_/X _14801_/X _15611_/A1 _14804_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_248_2355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18572_ _18564_/Y _18567_/X _18572_/X _18571_/Y _18561_/X _18552_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_30850_ _30850_/Q _32271_/CLK _30850_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_280_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20509__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21624__B _21624_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15784_ wire915/A _15782_/X _15771_/A _30443_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__14987__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18178__A2 wire3174/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19375__A1 wire4154/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_4943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29690__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3764 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23171__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21116__S _21116_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25811__S _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17523_ VGND VPWR _27423_/S _17539_/B _17521_/X _17523_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_29509_ VGND VPWR _29509_/D _30245_/CLK hold221/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_128_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_1665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14735_ _14735_/X _28408_/Q _14734_/X _15629_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_57_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16189__A1 wire911/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19914__A3 _26890_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30781_ _30781_/Q _32114_/CLK _30781_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_4419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17386__B1 wire2089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_650 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18583__C1 wire3682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_1578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_661 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24935__B _24935_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32520_ _32520_/Q _32538_/CLK _32520_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_2342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17454_ _31051_/Q _17465_/D _31053_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_672 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14666_ VGND VPWR _14666_/X _14822_/B1 _14823_/C1 _14665_/X _14664_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14739__A2 wire1750/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_683 _30319_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20955__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25999__A2 wire2655/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21062__D _21062_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_694 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31793__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26208__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23331__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16405_ VGND VPWR _16929_/S _29319_/Q _28757_/Q _16405_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_3964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21640__A _21640_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24120__B2 _30709_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32451_ _32451_/Q _32464_/CLK _32451_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2258_A _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_2670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17385_ _30947_/Q _30981_/Q wire3569/X _30841_/Q wire3192/X _17389_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XFILLER_141_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14597_ _15612_/B _29133_/D _14596_/Y _14564_/X _14577_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__18425__S _18425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19678__A2 _14171_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22131__B1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19748__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31402_ _31402_/Q _32403_/CLK _31402_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19124_ _19116_/X _19123_/X _22090_/B1 _19118_/X _19124_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_220_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19110__A _30271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16336_ VGND VPWR _16336_/X _16964_/B1 wire1058/X _16335_/X _16334_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_1286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22682__A1 _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18886__B1 wire1930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32382_ _32382_/Q _32402_/CLK _32382_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24408__C1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24951__A _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20693__A0 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19055_ _19179_/A2 _28001_/Q wire1935/X _19055_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31333_ _31333_/Q _31748_/CLK _31333_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31023__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32149__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16267_ _16841_/A2 _16267_/X _16266_/X _16925_/B1 _29531_/Q _16920_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__15164__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25766__B _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_5052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18006_ VGND VPWR _18007_/S wire3847/X _27940_/Q _27940_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_64_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15218_ _15217_/X _15517_/A1 _15515_/A2 _28790_/Q _15218_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_170_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_3363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31264_ VGND VPWR _31264_/D _32295_/CLK _31264_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xoutput304 _13961_/Y la_iena[51] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14911__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23631__B1 wire1292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16198_ VGND VPWR _16198_/X wire944/X _16727_/B1 _16195_/X _16197_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_272_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19764__B _19764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_4460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[16] wire2685/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput315 _13951_/Y la_iena[61] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20445__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput326 _14005_/Y la_iena[71] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_187_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28638__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_116_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput337 _13995_/Y la_iena[81] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30215_ _30215_/Q _30473_/CLK _30215_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_273_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17565__A _17576_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15149_ _15149_/X _32057_/Q _15148_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_155_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25908__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput348 _13985_/Y la_iena[91] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_218_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26176__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31195_ VGND VPWR _31195_/D _32578_/CLK _31195_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_116_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17310__B1 wire2043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput359 _13944_/Y la_oenb[100] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_4_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19850__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_2695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26878__A wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31173__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24187__A1 _28674_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23717__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold30_A hk_dat_i[28] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32299__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24187__B2 _31184_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2794_A _27507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27473__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30146_ _30146_/Q _30455_/CLK _30146_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19957_ VGND VPWR wire1319/A wire2302/A _19581_/X _19957_/X wire3406/A _19973_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_131_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_54 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22198__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_1371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15872__B1 wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23934__A1 _31096_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19780__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18908_ _18907_/X _19109_/S wire1984/X _27962_/Q _18908_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23934__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19063__B1 _19062_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30077_ hold122/A _32296_/CLK _30077_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20748__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_5282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19888_ VGND VPWR wire2201/X _26694_/D _24046_/B1 _19888_/X _26139_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_1060 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_164_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21945__B1 wire725/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28788__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire811_A wire811/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17074__C1 _17073_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16416__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23506__S _23516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18810__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18839_ _18835_/X _18838_/X _19283_/S _18837_/X _18839_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22410__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14427__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_4707 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_3730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_5_30_1_core_clk clkbuf_5_30_1_core_clk/X clkbuf_5_30_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__25687__A1 _31391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27205__C _32094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24648__D_N _24666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_42 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21850_ hold298/A _21817_/S _29787_/D _21849_/X _21848_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_209_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14978__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23698__B1 _26694_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25006__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25151__A3 _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_64 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_184 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_2264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18169__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19366__A1 _19368_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_3405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21026__S _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23162__A2 _23192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28018__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20801_ VGND VPWR _20801_/S _29314_/Q _27245_/A0 _29314_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_75_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21781_ _21782_/B _21780_/X _21651_/X _21708_/B wire830/A _21708_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__23701__A4 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25439__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30979_ _30979_/Q _32280_/CLK _30979_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_222_4453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14429__A _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22370__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15024__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24845__B _32564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23520_ VGND VPWR _23522_/S _23519_/X _31964_/Q _30446_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1798 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_4931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20732_ VGND VPWR _20752_/S _27687_/A1 _29247_/Q _29247_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_261_core_clk _32433_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_205_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15927__A1 wire1477/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3206_A wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20865__S _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19939__B _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19118__A1 _28036_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_4126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24111__A1 _30583_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21550__A _21550_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15959__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25022__A _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23451_ VGND VPWR _14095_/A _22185_/C _29367_/Q _23451_/X _22095_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_14_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20663_ _31389_/Q _25686_/C _31390_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_192_5220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18335__S _18339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19669__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19658__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28168__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1166_A _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22402_ VGND VPWR _21821_/X _22405_/S _22401_/Y _29958_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__18562__C _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26170_ _31573_/D _31573_/Q _26169_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_23382_ VGND VPWR _23388_/S _30360_/Q _29678_/Q _30360_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18877__B1 wire1949/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29413__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20594_ VGND VPWR _20605_/S _27242_/A0 _29109_/Q _29109_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26939__B2 wire2391/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_4874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25121_ _25119_/X _25148_/A _31199_/D _25120_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_max_length1525_A _15577_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20684__B1 _24454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22333_ _29916_/D _22385_/B1 _30455_/Q hold404/A _22356_/B VGND VPWR _22332_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_277_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3575_A _30869_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25072__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24414__A2 _24420_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18892__A3 _18887_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_3512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_1861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25052_ _25810_/C _25051_/X _25086_/A2 _31169_/Q _31169_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21228__A2 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23622__A0 _31075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22264_ VGND VPWR _22278_/D _29838_/Q _22135_/A _22264_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_173_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14902__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24965__A3 _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_2579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout793_A _24892_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20436__A0 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24003_ _19786_/B _24003_/X _19786_/A _26949_/A _28465_/Q _28561_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XFILLER_131_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21215_ wire3962/X _21214_/X _22075_/A2 _21215_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__17475__A _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29563__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29860_ _29860_/Q _32575_/CLK hold11/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_47_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_3245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26167__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18070__S _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22195_ VGND VPWR _22280_/S _30303_/Q _30393_/Q _22195_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17301__B1 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3004 VPWR VGND _18438_/S _18466_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21709__B _21711_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19841__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3015 VPWR VGND _18428_/S _18407_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_3199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24178__A1 wire4107/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28811_ _28811_/Q _32548_/CLK _28811_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27383__S _27384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25085__C_N _24955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1894_A _20872_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15458__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16655__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24178__B2 _28737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25692__A _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21146_ VGND VPWR _21151_/S _29589_/Q _27684_/A1 _29589_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3037 VPWR VGND _18365_/S _18364_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_268_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3048 VPWR VGND _18110_/S _18109_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29791_ hold232/A _29803_/CLK _29791_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25914__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1507 _14544_/X wire1508/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_fanout960_A wire963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2325 VPWR VGND wire2325/X wire2326/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23925__A1 _28713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30540__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2336 wire2336/X _14204_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__31666__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19690__A _20104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23925__B2 _31127_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28742_ _28742_/Q _31462_/CLK _28742_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_2089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_3509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21077_ VGND VPWR _21077_/S _27689_/A1 _29528_/Q _29528_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25954_ _31524_/Q _31491_/Q _31555_/Q _25934_/C _25954_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire2347 wire2348/X wire2347/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20739__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2358 VPWR VGND wire2358/X _14192_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4812 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21936__B1 hold250/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold469_A hold469/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1624 VPWR VGND wire1624/X wire1625/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2369 wire2370/X wire2369/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_169_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_2736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16407__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17604__A1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24905_ _24905_/Y _24955_/A _19550_/B _19584_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 X_20028_ _20028_/Y _26015_/B _20028_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xwire1646 VPWR VGND _25738_/A _26017_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18801__B1 _18800_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28673_ VGND VPWR _28673_/D _31119_/CLK _28673_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_169_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22320__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25885_ VGND VPWR _19521_/B _19617_/A _25911_/B1 _25885_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_21_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23138__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1668 wire1668/A wire1668/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_95_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1679 _18586_/X wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_262_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27624_ VGND VPWR _27630_/S _27624_/A1 _32366_/Q _32366_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_145_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2041_A wire2042/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24836_ _24836_/Y _31025_/Q _31027_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_132_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21444__B _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input124_A la_input[56] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_349_core_clk _31938_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14969__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_2927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2139_A _19780_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15091__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30690__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_4299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26954__C _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27555_ _27553_/X _27594_/B _27554_/Y _27555_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_160_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24767_ _24768_/A _24767_/Y _31444_/Q _24768_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21bai_1 XFILLER_54_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17368__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21979_ _21503_/D _21492_/X _21979_/Y _21964_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_15_3208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22361__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3083_A _17951_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_40 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14520_ _14520_/Y _29453_/Q _22078_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26506_ _26504_/Y _26508_/B _26539_/B _31742_/D _26505_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XPHY_51 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23718_ _23718_/X _20671_/A _31517_/Q _25566_/B _31565_/Q _20671_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__15379__C1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15918__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27486_ VGND VPWR _27488_/S _27679_/A1 _32301_/Q _32301_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_62 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_15_1_core_clk clkbuf_opt_15_1_core_clk/X clkbuf_opt_15_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__27131__B _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1128 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20775__S _20788_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24698_ _31454_/Q _24698_/X _24699_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__19849__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20911__B2 _29384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16040__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26028__A _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_84 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29225_ _29225_/Q _30503_/CLK _29225_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24102__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_95 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14451_ _18553_/B _14455_/B _18553_/A _14448_/Y _29451_/Q _29452_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__31046__CLK _32402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26437_ _26437_/X _26509_/C _26436_/Y _26539_/A _17552_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_204_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22113__A0 _30382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23649_ VGND VPWR _23668_/S _27242_/A0 _30779_/Q _30779_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15394__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3250_A _14744_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3348_A _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29093__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17170_ VGND VPWR _17223_/S _30208_/Q _30397_/Q _17170_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29156_ _29156_/Q _32574_/CLK _29156_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22664__A1 _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21467__A2 _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18868__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14382_ _14382_/C _31013_/Q _14386_/D _24424_/B _14388_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA__25867__A _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26368_ VGND VPWR wire1651/A _24308_/C _26870_/B _26368_/X _27051_/A _26382_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22990__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire921 VPWR VGND wire921/X wire921/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_65_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14487__A2_N _14086_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27052__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16121_ VGND VPWR _16443_/S _29593_/Q _29625_/Q _16121_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26581__B1_N wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28107_ _28107_/Q _31912_/CLK _28107_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_62_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25319_ VGND VPWR _25319_/X _25380_/B _31259_/Q _25380_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_30_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15146__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29087_ _29087_/Q _32067_/CLK _29087_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30923__D _30923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2675_A _14176_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14074__A hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26299_ VGND VPWR _14170_/Y wire3616/A _26331_/B _26299_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__29906__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24405__A2 _31003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_3601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_3058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31196__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21219__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16052_ _16051_/X _16047_/X _15771_/A _30443_/Q _15782_/X _16052_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 X_28038_ _28038_/Q _30378_/CLK _28038_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23613__B1 wire1335/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19584__B _19584_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24810__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32441__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20427__A0 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15003_ VGND VPWR _15004_/B _15000_/X _15762_/A1 _15368_/S _15002_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_212_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3410 wire3427/A wire3412/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_65_core_clk _32416_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18096__A1 wire3886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3421 _25109_/B _26539_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_215_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27355__A1 wire3402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26158__A2 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19832__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30000_ _30000_/Q _30483_/CLK _30000_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_113_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19811_ wire881/X _19786_/B _19811_/A _19811_/X _26791_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_191_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_3981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16646__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17843__A1 _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15303__C1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28930__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3476 _23036_/S1 _25693_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__25905__A2 _14186_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29989_ _29989_/Q _30406_/CLK _29989_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15854__A0 _32342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23916__A1 wire4097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19045__A0 _28257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23916__B2 _13788_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19742_ VGND VPWR _19570_/B _19628_/A _19772_/A _19742_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_26_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3571 VPWR VGND wire3571/X _30873_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27107__A1 _32031_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16954_ VGND VPWR _16954_/X _16951_/X _16953_/X _16736_/S wire1058/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_1_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23834__B _23849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3582 VPWR VGND wire3582/X _30862_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4056_A wire4057/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3593 VPWR VGND _17249_/C wire3594/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19596__A1 _28471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25118__B1 _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23392__A2 _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23326__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15905_ VGND VPWR _16823_/S _28944_/Q _29242_/Q _15905_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_24_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_3199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31951_ VGND VPWR _31951_/D _32424_/CLK _31951_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_output510_A wire4039/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19673_ wire3331/A _19672_/X _19695_/A2 _28497_/Q _28497_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22230__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14409__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16885_ _16941_/C _16881_/X _16884_/X _16940_/B1 _16885_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_228_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output608_A _28708_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26866__B1 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_69_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30902_ _30902_/Q _32316_/CLK _30902_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18624_ VGND VPWR _18624_/S wire3813/X _28338_/Q _28338_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_59_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1141_A _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15836_ _15836_/X _28974_/Q _16150_/A2 _16150_/A3 _15957_/S _15835_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_98_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31882_ _31882_/Q _31884_/CLK _31882_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15082__A1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23144__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24341__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18555_ _18555_/X _30433_/Q _30450_/Q _30432_/Q _20912_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_244_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30833_ _30833_/Q _31884_/CLK _30833_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_59_2489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15767_ _15765_/X wire1547/A _30442_/Q _15767_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__17359__B1 _17358_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19899__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22498__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17506_ _31761_/Q _17505_/X _17506_/Y _17507_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_14718_ VGND VPWR _14718_/Y wire1081/X _14711_/Y wire1202/X _14713_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__15909__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28310__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30764_ _30764_/Q _32290_/CLK _30764_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18486_ VGND VPWR _18489_/S wire3848/X _28259_/Q _28259_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_2765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29436__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16031__A0 _29075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15698_ _15709_/A3 _15707_/C _30515_/Q _15698_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__26094__A1 _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27291__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_480 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18663__B _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2542_A _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_491 wire707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32503_ _32503_/Q _32531_/CLK _32503_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_50_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24384__C _24384_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17437_ _17447_/A1 hold45/X _17435_/X _17447_/B2 hold46/A input195/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 X_14649_ _15228_/A2 _15228_/A3 _14649_/X _14675_/S _14648_/X _30487_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_140_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14683__S _14794_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16582__A1 wire3283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15385__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30695_ _30695_/Q _32168_/CLK hold312/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_33_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_1955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_16 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25841__A1 _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_27 _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26880__B _26880_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_1061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_38 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14593__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32434_ _32434_/Q _32434_/CLK _32434_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21458__A2 _21777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27468__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18859__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30413__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20115__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17368_ _30944_/Q _30978_/Q wire3572/X _30838_/Q wire3192/X _17372_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_50_2954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_49 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31539__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_3824 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold78_A hold78/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18087__A_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19107_ VGND VPWR _19178_/B _28327_/Q _28260_/Q _19107_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17994__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2807_A _27155_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16319_ _16314_/X wire902/X wire911/X _16318_/X _16319_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__28460__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29586__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32365_ _32365_/Q _32365_/CLK _32365_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_5169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1775_A _18796_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26397__A2 _14200_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17299_ _17299_/X _30925_/Q wire3583/X wire3097/X _30999_/Q _19503_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20130__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25054__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17531__B1 _24793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_3147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23075__D_N _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire761_A wire761/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19038_ _19201_/A2 _27936_/Q _19037_/X _19038_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31316_ _31316_/Q _31317_/CLK _31316_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22407__A1 _29963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23604__B1 _32580_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19808__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32296_ _32296_/Q _32296_/CLK _32296_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28303__D _28303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22405__S _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14896__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30563__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31689__CLK _31689_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1942_A wire1942/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31247_ hold82/A _32287_/CLK _31247_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_83_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19284__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26149__A2 _14189_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21529__B _21619_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19823__A2 wire1330/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16098__B1 _16839_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21000_ VGND VPWR _21013_/S _29465_/Q _27244_/A0 _29465_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_157_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25357__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16637__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26554__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21630__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31178_ _31178_/Q _32168_/CLK _31178_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_4_14_0_core_clk_A clkbuf_3_7_2_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23907__A1 wire4130/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_327_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23907__B2 _28711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30129_ _30129_/Q _30483_/CLK _30129_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_1753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23744__B hold196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3156_A _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21918__B1 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_5547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29134__D _29134_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_2471 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_3554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_1797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15860__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22951_ VGND VPWR _22969_/S _22951_/A1 _30128_/Q _30128_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_59_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21394__A1 _30349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22591__A0 _22590_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17598__B1 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_1827 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_2512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 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XFILLER_243_880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15552_ VGND VPWR _15552_/X _15551_/X _15744_/B1 _15543_/S _15550_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27538_ VGND VPWR _27538_/X _25641_/B _32247_/Q _32239_/Q _25641_/A _32255_/Q _32263_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__22885__A1 _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30436__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27273__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26076__A1 _24585_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16013__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19750__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_1958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26076__B2 _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14503_ _14488_/Y _14502_/Y _14503_/Y _14494_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_125_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3824_A wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_2361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18271_ _18270_/Y _18269_/X wire3174/X _18271_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__28483__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22980__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15483_ _15483_/X _28829_/Q _15727_/A2 _15546_/A3 _15705_/A1 _15482_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_27469_ VGND VPWR _27483_/S _32291_/Q _32292_/Q _27469_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24087__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_4086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_5169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17761__B1 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17222_ VGND VPWR wire886/X _17215_/X _17221_/X _30403_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29208_ _29208_/Q _32347_/CLK _29208_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_3081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_2689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_1993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_2476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27288__S _27292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14434_ _20836_/A _21746_/S _14433_/Y _21661_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_197_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30480_ _30480_/Q _31916_/CLK _30480_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_158_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput14 hold40/A hold39/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__30586__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17153_ VGND VPWR _17238_/S _17146_/X _17152_/X _30394_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_13_2061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29139_ _29139_/Q _32421_/CLK _29139_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19595__A _26809_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput25 hold19/A hold18/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 Xwire740 VPWR VGND wire740/X wire740/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_234_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16316__A1 wire3285/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14365_ _14365_/Y _23180_/A _14365_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_218_5598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27576__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26379__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20112__A2 wire2721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput36 VPWR VGND hold86/A hold85/X VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__25036__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17513__B1 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput47 la_input[101] input47/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_67_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31831__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire762 wire762/X wire762/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__22733__B _22733_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_142_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16104_ _16104_/X _29109_/Q _16515_/B1 _16150_/A3 _16249_/S _16103_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_48_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput58 VPWR VGND input58/X la_input[111] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_193_2722 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_2891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32150_ _32150_/Q _32525_/CLK _32150_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25587__B1 _25578_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput69 VPWR VGND input69/X la_input[121] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__27040__A3 _27036_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17084_ hold230/A _30368_/Q _17084_/X _16971_/A _30386_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_193_2733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21860__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26784__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14296_ _14295_/X _14293_/B _29968_/Q _24446_/B _24593_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XFILLER_132_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_2758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14878__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output558_A wire3514/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31101_ _31101_/Q _32113_/CLK _31101_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_158_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18069__A1 wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16035_ VGND VPWR wire970/X _32419_/Q _32347_/Q _16035_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_97_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23062__A1 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32081_ _32081_/Q _32535_/CLK hold243/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27328__A1 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4173_A wire4174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_4160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17277__C1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17816__A1 _31725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31032_ _31032_/Q _31553_/CLK _31032_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25339__B1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16619__A2 wire1029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17816__B2 _31729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31981__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_293_core_clk_A clkbuf_5_21_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14251__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20820__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15827__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4080 VPWR VGND wire4080/X _28655_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3284 VPWR VGND wire3287/A fanout3284/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_2053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4091 VPWR VGND wire4091/X _28651_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17292__A2 wire3585/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24011__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26551__A2 _14203_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17986_ _17986_/X _30413_/Q _30484_/Q _30414_/Q _18626_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_247_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2583 VPWR VGND _22181_/B2 _18664_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19569__A1 _28463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3390 wire3391/X wire3390/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_113_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2492_A _20933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23056__S _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27751__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19725_ _25703_/A _19724_/X _19772_/A _28519_/Q _28519_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_16937_ VGND VPWR _16942_/S _29486_/Q _32140_/Q _16937_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1871 _26329_/B _26327_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14678__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20179__A2 _14159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22573__A0 _22572_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_3847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_1396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1893 VPWR VGND wire1896/A _18706_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32337__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18241__A1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_4715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31934_ _31934_/Q _32571_/CLK _31934_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19656_ _26773_/C _20128_/A _19656_/A _19656_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__27500__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16868_ _30514_/Q _16867_/X _16868_/Y wire979/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__15055__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_2865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23117__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16252__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24314__A1 _19518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18607_ VGND VPWR _18607_/S _18607_/A1 _28321_/Q _28321_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_72_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17989__S _17991_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2757_A _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15819_ _15788_/X _29653_/D wire890/X _15800_/X _15818_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_0_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_1860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21128__A1 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31865_ _31865_/Q _32582_/CLK _31865_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19587_ _19587_/B _19558_/A _19752_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XFILLER_241_817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_2447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16799_ wire985/X _16799_/X _16798_/X _16825_/S _28968_/Q _16832_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_52_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28826__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18674__A _30331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24395__B _31002_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_5594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_4570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18538_ _18538_/Y _23342_/C _29774_/Q _30086_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 XFILLER_241_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30816_ _30816_/Q _32014_/CLK _30816_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21812__B _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31796_ _31796_/Q _31796_/CLK _31796_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27264__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31361__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32487__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20887__A0 _29372_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2924_A _20417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_181_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22627__C _22627_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30747_ _30747_/Q _32470_/CLK hold280/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24078__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18469_ VGND VPWR _18498_/S wire3912/X _28242_/Q _28242_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15358__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_18_0_core_clk_A clkbuf_4_9_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30929__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_2729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20500_ VGND VPWR _20512_/S _27692_/A1 _29018_/Q _29018_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22089__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21480_ _21480_/Y _21480_/B _21480_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_120_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28976__CLK _30865_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30678_ hold313/A _31436_/CLK _30678_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_191_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_2655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_5545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_5042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22924__A _29904_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24093__A3 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20431_ VGND VPWR _20444_/S _28951_/Q _27244_/A0 _28951_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_11_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32417_ _32417_/Q _32417_/CLK _32417_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_max_length1056_A _16546_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24842__C _24842_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30563__D hold204/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20103__A2 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18613__S _18615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_4221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27567__B2 _27597_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22643__B _22643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23150_ _23180_/B _18535_/B _23180_/A _23150_/X _23150_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_198_1976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16858__A2 _16830_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15515__C1 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20362_ _24604_/B _24467_/C _23618_/B _23825_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_32348_ _32348_/Q _32420_/CLK _32348_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28033__D _28033_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21851__A2 _21866_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25042__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28206__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22101_ _22100_/X _22509_/C1 wire828/X _29815_/Q _29815_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_228_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_5253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23081_ _23049_/A _21211_/B _23057_/S _18552_/B _23081_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19257__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20293_ VGND VPWR _20294_/S _27709_/A1 _28835_/Q _28835_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15530__A2 _15530_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32279_ _32279_/Q _32290_/CLK _32279_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_27_2219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14442__A _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1031_A wire1043/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26790__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20163__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_1995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1129_A wire1133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22032_ _21960_/A _22074_/B1 _22032_/Y _22030_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__23755__A _23755_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30309__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20811__A0 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19009__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26840_ VGND VPWR _19531_/B _19522_/A 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NF_sky130_fd_sc_hd__diode_2 XANTENNA__27661__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29601__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26771_ VGND VPWR _31836_/D _26771_/B _26771_/A _26771_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_265_3925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23983_ _30607_/Q wire1656/A _23983_/X _30543_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__22564__A0 _22596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_4009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18768__C1 wire1398/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28510_ _28510_/Q _32016_/CLK _28510_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26785__B _26785_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25722_ VGND VPWR _25722_/C _31403_/Q _25723_/B _25722_/D wire836/X VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__18232__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22934_ _22935_/B _22934_/X _22934_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_265_3969 VPWR VGND VGND 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VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24535_ _31215_/Q _31287_/Q _24538_/C _31217_/Q _24533_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XPHY_435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_2391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21747_ _21746_/S hold449/A _21747_/X _21999_/S1 _17017_/X _21365_/B hold160/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__16546__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17743__A0 _17696_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24069__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1832_A _18192_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16308__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1012 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_4580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_4132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31854__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27254_ VGND VPWR _27264_/S _32129_/Q _27254_/A0 _32129_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold501_A hold501/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24466_ _24464_/C _26539_/B _24465_/Y _31029_/D wire798/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_8_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21678_ _21679_/C _21679_/A _21679_/B _21679_/D _21844_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_197_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_1056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22834__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25281__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_3052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26205_ _31591_/Q _26227_/A2 _26206_/B _32281_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_235_5153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21827__C1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23417_ VGND VPWR _30415_/D _23417_/B _23417_/A _23417_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_max_length3238_A _16445_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20629_ VGND VPWR _20650_/S _27689_/A1 _29175_/Q _29175_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27185_ VGND VPWR _27185_/X _32086_/Q _27185_/A hold106/X VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__23292__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input191_A mprj_dat_i[25] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24397_ _24437_/B _24399_/B _24395_/Y _31002_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__18523__S _18523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length4099 VPWR VGND _20003_/A1 _28648_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18838__A3 _18833_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22553__B _22553_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2631 VPWR VGND _24897_/A2 _19534_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_26136_ VGND VPWR _26019_/A _19535_/X _26135_/X _31557_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_14150_ hold115/A _14168_/S hold114/X hold95/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_49_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15506__C1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23348_ _23348_/B _21101_/A _29737_/Q _23349_/B _23348_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_49_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3405_A _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29131__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1941 VPWR VGND _19176_/B1 wire1942/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23044__A1 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14081_ _30444_/Q _14081_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__24241__A0 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19248__B1 wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26067_ _31536_/Q _31537_/Q _31535_/Q _26066_/D _26068_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_7_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length1952 VPWR VGND wire1951/A wire1948/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2373_A wire2374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23279_ VGND VPWR _23286_/S wire3881/X _30261_/Q _30261_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_253_2649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_3451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_4079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21055__A0 _29513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17259__C1 _17258_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25018_ wire877/A _24953_/B _25018_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_40_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input52_A la_input[106] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_20_0_core_clk_A clkbuf_5_21_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26518__C1 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20802__A0 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15809__B1 _32413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1101 fanout1103/X _15277_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17840_ _17863_/B _17754_/X _17863_/A _17840_/X _17863_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__18471__A1 hold475/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29826_ _29826_/Q _30395_/CLK _29826_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xclkbuf_leaf_364_core_clk _29782_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_2384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27730__A1 _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1123 _14551_/X _15235_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_40_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2638_A _14206_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_3261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_1661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29281__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18120__B_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1145 wire1152/X _15716_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16482__B1 _28759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_3110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25741__B1 _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17771_ _17521_/X _17770_/X _31729_/D _17524_/B _17768_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_18_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_1976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29757_ _29757_/Q _31914_/CLK hold354/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1167 wire1170/X _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_95_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14983_ _15761_/A2 _14983_/X _14982_/X _15521_/S _29466_/Q _15748_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_26969_ _26970_/B _31998_/Q _32000_/Q _31999_/Q _31997_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__26584__A2_N _23748_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22555__B1 _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28849__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_1713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_3143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19510_ _19510_/Y _23599_/A _23599_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_232_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1251 VPWR VGND wire1251/X _24140_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_79_3886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16722_ _16841_/A2 _16722_/X _16721_/X _16722_/C1 _28106_/Q _16722_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_28708_ _28708_/Q _31815_/CLK _28708_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13934_ _28563_/Q _13934_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1262 VPWR VGND wire1262/X _24015_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19420__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1273 VPWR VGND wire1273/X _23779_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29688_ _29688_/Q _32269_/CLK _29688_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15037__A1 _14544_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31384__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26297__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16234__B1 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19971__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18774__A2 wire2582/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19441_ _19441_/Y _28442_/Q _19441_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_16653_ _16648_/X _16653_/B1 _16839_/A1 _16652_/X _16653_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_264_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28639_ _28639_/Q _32549_/CLK _28639_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_229_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22307__A0 _29152_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_5209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13865_ _13865_/A _13865_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__15588__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30648__D _30648_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23831__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27303__C _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15604_ _15604_/X _15638_/A2 _15638_/B1 _28936_/Q _15638_/A3 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_227_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14796__B1 _28087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31650_ _31650_/Q _32552_/CLK _31650_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19372_ _28240_/Q _19372_/X _19377_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_73_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21632__B _21777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27873__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16584_ _16956_/A2 wire3283/X _29122_/Q _16584_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24646__D _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_2128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13796_ _31150_/Q _13796_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__28999__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4019_A _28709_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26049__A1 _26047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14260__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20869__A0 _29363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19723__A1 _28518_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26049__B2 _24612_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21124__S _21131_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18323_ VGND VPWR _18260_/X _29768_/Q _22372_/A2 _22380_/A _18322_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_30601_ _30601_/Q _31803_/CLK hold161/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15535_ _15530_/X wire1069/X wire1083/X _15534_/X _15535_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_125_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16537__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31581_ _31581_/Q _32032_/CLK _31581_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27797__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17734__B1 _31726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25257__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14548__B1 wire1493/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30532_ hold350/A _31896_/CLK input59/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18254_ VGND VPWR wire3812/X _29856_/Q _18254_/S _18254_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA_wire1104_A wire1104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15466_ _15751_/A1 _16874_/A2 _15466_/X _15646_/B1 _32133_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_86_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20963__S _20979_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output675_A wire2355/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26216__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28229__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3767 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17205_ wire3216/X _21665_/A _17205_/X _17228_/A _17204_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_141_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14417_ _20832_/A _21746_/S _21643_/A _14416_/Y _21643_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_12_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_80_core_clk _31837_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22086__A2 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23283__A1 wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30463_ _30463_/Q _31916_/CLK _30463_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18185_ _18184_/X wire3174/A _29742_/Q _22328_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__25009__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15397_ _15396_/X wire1118/X _15737_/A2 _28103_/Q _15397_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18433__S _18433_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15760__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_4820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19756__C _19770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_4096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32202_ _32202_/Q _32536_/CLK _32202_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_28_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17136_ _21619_/D _17135_/Y _17220_/C _17134_/X _17136_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27746__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22491__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14348_ _14355_/A _14331_/A _14355_/B _14338_/Y _14348_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_171_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_3439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30394_ _30394_/Q _30398_/CLK _30394_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_265_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25024__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_2251 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_5562 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17049__S wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32133_ _32133_/Q _32133_/CLK _32133_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_2273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24232__A0 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19239__B1 _19238_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17067_ _17067_/X _17066_/X _16971_/A _30384_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_119_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16170__C1 _16449_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14279_ _29949_/Q _29948_/Q _14280_/A _14277_/Y _14278_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_119_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15512__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14262__A _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17276__C _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28379__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16180__C wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21046__B1 _21045_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16018_ _16018_/X _28979_/Q _16448_/A2 _16448_/A3 _15975_/S _16017_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__24783__A1 _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29624__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32064_ _32064_/Q _32064_/CLK _32064_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25980__B1 _31506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19772__B _19772_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19254__A3 _19253_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27042__D_N _26988_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15792__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31015_ _31015_/Q _32580_/CLK _31015_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_281_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17265__A2 wire3447/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18462__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32103__D _32103_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3092 VPWR VGND _17815_/B1 _17500_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_208_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26524__A2 _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25327__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27721__A1 _25023_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_4771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1738_A _15765_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20228__A_N _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26886__A wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24535__A1 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire724_A wire724/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30601__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27481__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31727__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24535__B2 _31217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20203__S _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17969_ VGND VPWR _17981_/S _18644_/A1 _27906_/Q _27906_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22546__A0 hold260/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18275__A_N _29860_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29774__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19708_ _26949_/B _19710_/B _19708_/Y _20122_/B _19789_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_2_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1690 VPWR VGND _17539_/C _17521_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_71_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20980_ VGND VPWR _20980_/S _30186_/Q _29445_/Q _29445_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_110_3899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15028__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26288__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20021__A1 _28657_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_3065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18765__A2 _19090_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17422__C1 _17421_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23514__S _23514_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19639_ _26218_/A _19638_/Y _19638_/A _28484_/Q _28484_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24837__C _24837_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31917_ VGND VPWR hold440/X _31917_/CLK _31917_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_264_3980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30558__D _30558_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24299__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18608__S _18616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24838__A2 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2537 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_3833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31877__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22650_ VPWR VGND _22650_/X _22663_/B _29727_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__14787__B1 wire1074/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16240__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22849__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3021_A _18386_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_3281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29004__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31848_ _31848_/Q _32017_/CLK _31848_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25014__B _25079_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27237__A0 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3119_A _17910_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21430__A2_N _21551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21034__S _21034_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21601_ _21603_/B _21601_/C _21298_/A _21606_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XFILLER_52_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22581_ VGND VPWR _22619_/S hold151/A _22580_/X _30069_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16528__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27788__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31779_ _31779_/Q _31884_/CLK _31779_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_254_5006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25248__C1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19190__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24320_ _32007_/Q wire1374/X _24320_/X _31975_/Q _26376_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_206_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21532_ _21548_/A _21548_/B wire3692/X _21626_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_72_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31107__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20873__S _23527_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19947__B _25041_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26460__A1 _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25263__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15200__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29154__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24251_ _25881_/D _23611_/A _26837_/A _24889_/A1 _24251_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22077__A2 _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3390_A wire3391/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21463_ _21653_/B _21463_/C _21465_/B _21463_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XANTENNA__23274__A1 wire3899/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18343__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14554__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15751__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3488_A _31267_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19666__C _26781_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20088__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23202_ VGND VPWR _23209_/S _30194_/Q _30124_/Q _30194_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20414_ VGND VPWR _20414_/S _27706_/A1 _28936_/Q _28936_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27656__S _27657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24182_ _24182_/X wire1588/X _30633_/Q wire3641/X _24273_/C VGND VPWR _24181_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_235_3025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21394_ _21641_/B _21549_/B _30349_/Q _21392_/A _21514_/B VGND VPWR _21655_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_176_3484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1215 VPWR VGND wire1214/A _14829_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_85_3378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25015__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30131__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31257__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23133_ VGND VPWR _23133_/X wire2838/X _23132_/X _23130_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_67_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23026__A1 _23024_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24223__A0 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20345_ VGND VPWR _20352_/S _24227_/A0 _28885_/Q _28885_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_3069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16161__C1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15503__A2 _15503_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28990_ _28990_/Q _32351_/CLK _28990_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16700__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3655_A hold421/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32502__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2639 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_3935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_opt_9_0_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26365__B1_N _26364_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27941_ _27941_/Q _32074_/CLK _27941_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23064_ VGND VPWR _23064_/S _30160_/Q _23063_/X _30160_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_3957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20276_ VGND VPWR _20291_/S _27247_/A0 _28818_/Q _28818_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19682__B _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18579__A _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22015_ VGND VPWR _22015_/S _21956_/A _21812_/B _22015_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_191_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22820__C _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17483__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18453__A1 wire3850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17256__A2 wire3564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27872_ _27872_/Q _30757_/CLK _27872_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_131_2311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput204 mprj_dat_i[8] input204/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_22_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27712__A1 _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21717__B _22072_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput215 VPWR VGND wire4188/A spi_sdi VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_148_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_3419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15267__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16464__B1 _30503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29611_ _29611_/Q _32136_/CLK _29611_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27391__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21209__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26823_ _26823_/B _26772_/C _27100_/B _26823_/X _27116_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_40_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22537__A0 hold493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1782_A _18320_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_1133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29542_ _29542_/Q _32133_/CLK _29542_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26754_ _26754_/Y _31792_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_109_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23966_ _23966_/X _23964_/X _28525_/Q _24163_/B2 _19718_/B VGND VPWR _23965_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__27404__B _27404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27896__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15019__A1 wire3298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26279__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20012__A1 wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_92_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16216__B1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18756__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19953__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3090_A _17947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_3739 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25705_ _25704_/X _31399_/Q _31399_/D _25701_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_245_975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22917_ _22917_/B _22917_/X _22934_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_57_2724 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_2890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29473_ _29473_/Q _32291_/CLK _29473_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_4315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26685_ _26684_/X _27117_/C1 _26637_/B _31900_/Q _31795_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_148_2852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23897_ _23897_/X _20126_/X wire4131/X wire4018/X _24178_/A2 VGND VPWR _23889_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18518__S _18532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27571__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24829__A2 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28424_ _28424_/Q _30583_/CLK _28424_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2121_A wire2121/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25636_ _31391_/Q _31388_/Q _31387_/Q _25686_/C _25635_/Y _25682_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XFILLER_57_2768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input204_A mprj_dat_i[8] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22848_ VGND VPWR _22848_/X _22924_/B _29896_/Q _22924_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_wire2219_A _19662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_1020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19166__C1 _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19705__A1 _28513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26962__C _31994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28355_ _28355_/Q _30378_/CLK _28355_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_227_1162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_2148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25567_ VGND VPWR _31365_/D _25567_/B _25567_/A _25738_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XPHY_232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27779__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22779_ _29889_/Q _22794_/B _22776_/X _22778_/X _22779_/A1 _22745_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_224_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25239__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17716__B1 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15990__A2 wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_5636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18913__C1 _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24763__B _31445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19181__A2 wire1984/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15320_ _15320_/X _15760_/B1 _15718_/B1 _29057_/Q _15759_/A3 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_240_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27306_ VGND VPWR _27311_/S wire2801/X _32167_/Q _32167_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24518_ _31222_/Q _24518_/X _31294_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_205_2172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28286_ _28286_/Q _30285_/CLK _28286_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20783__S _20783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_cap2616 VPWR VGND _24381_/A _24384_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_194_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26987__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19857__B _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25498_ _31327_/Q _19495_/X _25498_/Y _31328_/Q _31329_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XANTENNA__32032__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26451__A1 _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25254__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25578__C _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27237_ VGND VPWR _27238_/S _32112_/Q _27237_/A0 _32112_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15251_ _15752_/A2 _15251_/X _15250_/X _15752_/B1 _30503_/Q _15265_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_155_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22068__A2 _21613_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23265__A1 _29513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19469__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24449_ VGND VPWR _31021_/D _24449_/B _26244_/A _24449_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_29_4228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18253__S _18333_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15742__A2 _15758_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3330_A wire3364/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2588_A _18321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20079__A1 _28685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14202_ _24446_/A _24446_/B hold96/X _14202_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21276__B1 _22553_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28521__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25875__A _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22473__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15182_ _15181_/X _15561_/C1 _15723_/A2 _28789_/Q _15182_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27168_ hold328/A wire1570/X _32074_/D wire2398/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__29647__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18141__A0 _28069_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_3256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2450 VPWR VGND _24238_/S _24223_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26203__B2 _32280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14133_ VGND VPWR _14133_/X _14303_/B _14133_/A _29953_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_26119_ _26121_/D _26119_/Y _26118_/Y _14396_/Y _31551_/Q _31550_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_218_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24214__A0 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2472 VPWR VGND _21151_/S _21169_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32182__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19990_ _19989_/X _28643_/Q _28643_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__14082__A _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2755_A _14141_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27099_ _23599_/B _27098_/X wire772/X _32027_/Q _32027_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_275_1469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18692__B2 _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21028__A0 hold190/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17254__D_N wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1760 VPWR VGND _24281_/C _24269_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_235_3581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24765__A1 _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30624__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22225__C1 _22224_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23395__A _23395_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14702__B1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14064_ _31538_/Q _26070_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_18941_ _18941_/X _19346_/D1 _27932_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_7_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23826__C _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28671__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3797_A _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17704__A2_N _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18444__A1 wire3880/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17247__A2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29797__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18872_ _23523_/S _18871_/X _18861_/X _19382_/A1 _18872_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_248_4621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27703__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15258__A1 _28855_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20251__A1 _28794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15258__B2 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16455__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18995__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21119__S _21134_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17823_ _17823_/X _17640_/X _17732_/X _17863_/B _17709_/X VGND VPWR _17822_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__25814__S _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29809_ hold461/A _30428_/CLK _29809_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_231_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22528__A0 _30028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output423_A _13873_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold3 hold3/A hold3/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_261_5533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_5030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_4354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30774__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25190__A1 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17754_ VGND VPWR _17833_/S _17753_/X _17706_/X _17754_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_248_791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14966_ _14966_/X _14958_/X _14965_/X _15640_/C1 _14960_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_wire4136_A _28463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20958__S _20958_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27467__A0 _32291_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20003__A1 _20003_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21200__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16207__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19944__A1 _28620_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18747__A2 wire1405/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1081 VPWR VGND wire1081/X wire1081/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23334__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16705_ wire1010/A wire1482/A _30911_/Q _16705_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_283_3888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_79_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23740__A2 _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1092 VPWR VGND _15319_/B wire1093/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13917_ _13917_/Y _28580_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__17840__B _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17685_ _17685_/A _17685_/X _17685_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 Xclkbuf_2_0_0_core_clk clkbuf_2_0_1_core_clk/A clkbuf_2_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__16758__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14897_ _15621_/A2 _14897_/X _14896_/X _15628_/B1 _32309_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__18428__S _18428_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21751__A1 hold273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31702_ _31702_/Q _32107_/CLK _31702_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19424_ VGND VPWR _28437_/Q hold285/A _28438_/Q _19424_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__15641__A _15641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30004__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16636_ _16817_/A2 _16817_/A1 _29541_/Q _16636_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_34_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_95_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21362__B _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13848_ _29818_/Q _13848_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__15966__C1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16975__A2_N _14360_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24450__A1_N _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1319_A wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15430__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27219__B1 _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24296__A3 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26690__A1 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22177__C _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19355_ _19355_/X _30282_/Q _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__29177__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31633_ _31633_/Q _31685_/CLK _31633_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_105_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_4390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16567_ _16840_/A2 _16956_/A1 _32130_/Q _16567_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13779_ _31167_/Q _13779_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_260_1727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15981__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22700__B1 _21464_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18306_ _18305_/Y _18269_/X wire3174/X _18306_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_15518_ _15518_/X _15517_/X _15509_/X _15504_/X wire1083/X _15513_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_103_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31564_ _31564_/Q _31837_/CLK _31564_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19286_ _19380_/A2 _28012_/Q _19367_/B1 _19286_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20693__S _20695_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18380__A0 _28157_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16498_ wire999/X _16091_/C _28960_/Q _16498_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_106_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26442__A1 _17462_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25245__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_1891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30154__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15787__S _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30515_ _30515_/Q _31966_/CLK _30515_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18237_ _18237_/Y _18236_/Y _18216_/X _22372_/A2 _18316_/A _18235_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_195_2603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22905__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15194__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23256__A1 _29504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15449_ VGND VPWR _15449_/X _15446_/X _15762_/A1 _15561_/C1 _15448_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_69_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31495_ _31495_/Q _32015_/CLK _31495_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24453__B1 _31023_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15733__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16930__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1688_A _26559_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32525__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21267__A0 _30445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31002__D _31002_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold60_A hold60/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27476__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21806__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30446_ hold247/A _30446_/CLK _30446_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18168_ _18168_/X _18254_/S wire3883/X wire3855/X _18158_/X VGND VPWR _18157_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__17287__B _17287_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold403 hold403/A hold403/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_86_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_3192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold414 hold414/A hold414/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_17119_ _22756_/C _17115_/Y _17119_/Y _21616_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_64_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold425 hold425/A hold425/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__24205__B1 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1855_A wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_286_core_clk _30281_/CLK clkbuf_5_23_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_30377_ _30377_/Q _30453_/CLK _30377_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18099_ VGND VPWR _18118_/S wire3875/X _28028_/Q _28028_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19880__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold436 hold436/A hold436/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21019__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15497__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold447 hold447/A hold447/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_239_1077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2991_A _18497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20490__A1 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24756__A1 _24648_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20130_ _25810_/C _20129_/Y _20162_/A2 _28709_/Q _28709_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold458 hold458/A hold458/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_288_4434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32116_ _32116_/Q _32420_/CLK _32116_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23509__S _23513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold469 hold469/A hold469/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25953__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1943 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_215_core_clk _32300_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_132_3321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22413__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23736__C _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_1965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout905 VPWR VGND _16821_/A1 wire915/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23964__C1 wire1266/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout916 wire926/A wire918/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26112__C _31549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18435__A1 wire3918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20061_ _20061_/A _20061_/B _20061_/C _20061_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_32047_ _32047_/Q _32350_/CLK _32047_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_3_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout927 wire933/X _16040_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22231__A2 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1255 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout938 wire944/A _16964_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_171_2680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15249__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3069_A _18051_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_1_0_6_core_clk clkbuf_2_1_0_core_clk/A clkbuf_1_0_6_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_80_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout949 _15975_/S _16124_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16446__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24508__A1 _24546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21029__S _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17789__A3 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18549__D hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16997__A1 _30376_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27170__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21990__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23820_ _23820_/X _24317_/A _31851_/Q _19710_/B _31883_/Q _24317_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_127_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_1464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20868__S _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_5005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23192__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1290_A _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29142__D _29142_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23244__S _23268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23731__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25025__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23751_ _31774_/Q _26595_/B _31773_/Q _23755_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_4 X_20963_ VGND VPWR _20979_/S _30169_/Q _29428_/Q _29428_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17946__A0 _27884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_309 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_1053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27553__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18338__S _18365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17242__S _17243_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22702_ _29882_/Q _22779_/A1 _21463_/C _22704_/A _22700_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XFILLER_108_4271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19023__A _28224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26130__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17410__A2 hold22/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26470_ _31702_/Q _31616_/Q _26473_/B _26470_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_263_2052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23682_ VGND VPWR _23879_/C _24273_/C _24273_/A _23682_/X _23681_/X _31495_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_71_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20894_ VGND VPWR _20906_/S _30245_/Q _29407_/Q _20894_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32055__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20169__A wire881/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24287__A3 _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26681__A1 _23772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24141__C1 wire1251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25421_ VGND VPWR _25424_/S _31360_/Q _31291_/Q _31291_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length1555_A wire1556/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22633_ VGND VPWR _22633_/Y _22633_/A _22633_/B VGND VPWR NF_sky130_fd_sc_hd__xnor2_2 XFILLER_238_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_178_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_2621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_3696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24692__B1 _31472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1363_A _19706_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19163__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28140_ _28140_/Q _29389_/CLK _28140_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25352_ _25266_/Y _31265_/Q _31273_/Q _25265_/X _25352_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__28544__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22564_ VGND VPWR _22578_/S wire3709/X _22596_/C _22564_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_87_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22384__A _22384_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_2170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25398__C _25402_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24039__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26433__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25236__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27088__D_N _26872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18910__A2 wire1984/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24303_ VGND VPWR _30953_/D _24308_/B _31605_/Q _26386_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_30_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_1660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21515_ _21638_/B _21549_/B _30355_/Q _30470_/Q _21514_/B VGND VPWR _21288_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28071_ _28071_/Q _30430_/CLK _28071_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15185__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23247__A1 wire3980/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25283_ wire3496/X _25408_/B _25283_/Y _25277_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_139_3519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_2086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18073__S _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22495_ _23417_/A _22494_/X _22511_/A2 _17168_/X _30008_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_238_4878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21258__A0 _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17909__C _17913_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27022_ _31992_/Q _27028_/A _27022_/Y _27027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_191_4447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24234_ VGND VPWR _24234_/S _30910_/Q _27509_/A1 _30910_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24995__A1 _31141_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22455__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30647__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21446_ _22737_/A _21442_/Y _21777_/B _21443_/Y _21449_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XFILLER_5_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17197__B _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_1111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout990_A wire996/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_4130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19648__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_60 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_3576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28694__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26197__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24165_ wire1810/X _24164_/X wire4032/X _24165_/A3 _24165_/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a31o_1 XANTENNA__30751__D hold154/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22470__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21377_ _21379_/C _21378_/C _21378_/A _21378_/B _21378_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 Xmax_length1045 wire1043/A wire1044/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__15488__A1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1056 VPWR VGND wire1055/A _16546_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_63_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26303__B _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23116_ _23049_/A _21211_/B _23057_/S _30436_/Q _23116_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20328_ _20328_/X _27485_/D _20328_/C _27598_/C _20453_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 Xwire3901 VPWR VGND wire3901/X hold311/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xmax_length1078 VPWR VGND _14937_/A1 _15632_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28973_ _28973_/Q _32345_/CLK _28973_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24096_ _30875_/D _24209_/B1 _24095_/X wire736/X _24091_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 Xwire3912 wire3912/X wire3913/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_24_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21532__C_N wire3692/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22758__B1 _21413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3934 VPWR VGND _23140_/C _29725_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30797__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17229__A2 _21633_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23047_ VGND VPWR _29706_/Q _23115_/B _23047_/X _23053_/D _23061_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_63_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27924_ _27924_/Q _32572_/CLK _27924_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27832__C_N _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2071_A wire2071/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20259_ VGND VPWR _20259_/S _28802_/Q _21203_/A0 _28802_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21447__B _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input154_A la_input[83] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3956 _29691_/Q _18163_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_189_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_4775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20233__A1 _28776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3978 VPWR VGND wire3978/X wire3978/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_150_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18977__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21430__B1 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3989 _21903_/A _21942_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23970__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26957__C _31982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27855_ _27855_/Y _32551_/Q _27854_/C _25810_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XFILLER_249_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16988__A1 _14353_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21981__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24758__B _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14820_ VGND VPWR _14820_/S _32419_/Q _32347_/Q _14820_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26806_ _27087_/C1 _26805_/Y _26835_/A _31853_/Q _31853_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_148_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30027__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27786_ VGND VPWR _27792_/S _25025_/B _32510_/Q _32510_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20778__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25711__A3 wire836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24998_ _25079_/A wire1283/X _24998_/X _25063_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__27449__A0 hold214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23183__B1 _23182_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15660__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18729__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29525_ _29525_/Q _31962_/CLK _29525_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23722__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28074__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14751_ _15597_/A2 _14751_/X _14750_/X _15233_/B1 _29523_/Q wire1506/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_248_1825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26737_ _26736_/Y _26893_/C1 _31821_/Q _26760_/B _31821_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_79_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_3585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23949_ wire4126/X _19994_/B _23949_/X wire741/X _23948_/X wire1622/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__21733__A1 _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18248__S _18284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_810 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22930__B1 _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22278__B _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_821 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_19_core_clk _32537_/CLK clkbuf_leaf_19_core_clk/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_2_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17470_ _17470_/Y _17470_/B _17863_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_832 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29456_ _29456_/Q _32110_/CLK _29456_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14682_ _15629_/A2 _14682_/X _14681_/X _14642_/S _30488_/Q _14930_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__15948__C1 wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26668_ _26668_/Y _31791_/Q _26668_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_843 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14215__A2 _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_854 wire4107/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26672__A1 _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_865 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16421_ _16421_/X _32126_/Q _16818_/A2 _16722_/B2 _16722_/C1 _16420_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_126_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30177__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28407_ _28407_/Q _32113_/CLK _28407_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_233_989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_876 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25619_ VGND VPWR _31375_/D _25619_/B _26242_/A _25619_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_70_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_887 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29387_ _29387_/Q _30415_/CLK _29387_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_232_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14077__A _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26599_ _31773_/Q _31772_/Q _31771_/Q _23748_/B _31774_/Q _26599_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__25589__B _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15963__A2 wire1005/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_898 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31422__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32548__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24493__B _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19140_ _28037_/Q _19139_/X _19140_/Y _19178_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27349__A_N _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28338_ _28338_/Q _30483_/CLK _28338_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16352_ _16352_/X _28988_/Q _16814_/B1 _16805_/A3 _16838_/A1 _16351_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_70_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19587__B _19587_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17165__B2 _29436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25227__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15303_ _15621_/A2 _15303_/X _15302_/X _15630_/A1 _30906_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_103_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19071_ _19071_/X _19216_/D1 _28290_/Q _19368_/B1 _19368_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 X_16283_ _16721_/A2 wire3283/A _28818_/Q _16283_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire2872_A _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27911__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28269_ _28269_/Q _30445_/CLK _28269_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_177_3045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16373__C1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16912__A1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26975__A2 _27009_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21249__A0 _30427_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30300_ _30300_/Q _30390_/CLK _30300_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18022_ VGND VPWR _18048_/S wire3912/X _27954_/Q _27954_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15234_ VGND VPWR _15275_/S _30904_/Q _29182_/Q _15234_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16723__C _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27296__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14923__B1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31280_ _31280_/Q _31998_/CLK _31280_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_8_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18114__A0 _28043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31572__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_4279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_3490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_1233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_9_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30231_ _30231_/Q _30492_/CLK _30231_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15165_ VGND VPWR _15165_/X _15162_/X _15164_/X _15640_/A1 _15640_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xoutput508 _31102_/Q la_output[11] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16125__C1 wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30661__D hold149/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22461__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19862__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23837__B _23849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput519 _31105_/Q la_output[14] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_1709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4086_A wire4087/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_2060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15479__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22741__B _22741_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16676__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14116_ _14116_/Y _21464_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__23329__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30162_ _30162_/Q _30428_/CLK _30162_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21638__A _21638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output540_A _28710_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19973_ VGND VPWR wire1317/X wire2302/A _24937_/B _19973_/X _25867_/A _19973_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 X_15096_ VGND VPWR _15096_/X _15093_/X _15744_/B1 _15752_/B1 _15095_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16140__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_155_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output638_A wire2417/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27028__C _27035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24202__A3 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23946__C1 _23945_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14151__A1 hold93/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18924_ _18920_/X _18923_/X _19156_/S _18922_/X _18924_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_14047_ _29973_/Q _14047_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_116_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1171_A wire1172/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30093_ _30093_/Q _30445_/CLK _30093_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16231__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2011_A _18179_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17554__C _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27688__A0 _32422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25950__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_23_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18968__A2 _18964_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23961__A2 _23959_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22836__A1_N _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18855_ VGND VPWR _18855_/X _19374_/B _19278_/S _28315_/Q _18854_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_168_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_3327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14439__C1 wire2030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28417__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21972__A1 hold235/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18947__A _28220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_20_1_core_clk clkbuf_5_20_1_core_clk/X clkbuf_5_20_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_227_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17658__A2_N _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17806_ _17521_/X _17805_/X _31732_/D _17524_/B _17803_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_269_1026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26360__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18786_ _18783_/X _18784_/X _18786_/X wire1949/X _18785_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_0_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15998_ _15998_/X _29170_/Q _16448_/A2 _16448_/A3 _16124_/A1 _15997_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__32078__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14454__A2 _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18666__B _18666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23064__S _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2572_A _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23713__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22516__A3 _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_4640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17737_ _17873_/B1 _31722_/Q _17736_/X _17737_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_75_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14949_ _15515_/A2 _14949_/X _14948_/X _15356_/A2 _28951_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_181_3926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17928__A0 _27866_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_2009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30995_ _30995_/Q _31923_/CLK _30995_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_286_1373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18196__A3 wire3897/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_3095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_2312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28567__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17668_ _17539_/C _17667_/X _31720_/D _17783_/B2 _17664_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_260_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24684__A _31470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14206__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29812__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19407_ VGND VPWR _19407_/S _27698_/A1 _28423_/Q _28423_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17997__S _18008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2837_A _23301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16619_ _16619_/X _28891_/Q wire1029/X _16928_/A3 _16928_/B1 _16618_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_229_1780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19778__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30836__D _30836_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17599_ _31714_/D _17590_/X _17598_/X _17596_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_251_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18682__A _18682_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21488__B1 _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31616_ VGND VPWR _31616_/D _31698_/CLK _31616_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27207__A3 _32095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19338_ _19338_/X _19382_/A1 _19332_/X _19337_/X _22104_/A wire1563/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_88_3716 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18353__A0 _28131_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17156__A1 _22838_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18545__D_N _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22408__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17156__B2 wire3933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25218__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_4073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_1568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31915__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15167__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26716__A_N _31773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31547_ _31547_/Q _31547_/CLK _31547_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_220_3691 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19269_ _30278_/Q _19269_/X _19271_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__14534__A_N _23043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_2966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23229__B2 _30220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25623__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29962__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21300_ _21629_/B _21300_/A _21674_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__24977__A1 _31132_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14914__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22280_ VGND VPWR _22280_/S _30315_/Q _30405_/Q _22280_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31478_ _31478_/Q _31575_/CLK _31478_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_3131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_2619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21231_ _29693_/D _22661_/B _23061_/C _14404_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_86_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold200 hold200/A hold200/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26179__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17459__A2 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18656__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30429_ _30429_/Q _31959_/CLK _30429_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_216_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold211 hold211/A hold211/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_12_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22452__A2 _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19853__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18621__S _18625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3186_A _17260_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold222 hold222/A hold222/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22651__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold233 hold233/A hold233/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20463__A1 _28982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16667__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold244 hold244/A hold244/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__29137__D _29137_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21660__B1 _17017_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21548__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21162_ VGND VPWR _21166_/S _29605_/Q _27507_/A1 _29605_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17864__C1 _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold255 hold255/A hold255/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16131__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold266 hold266/A hold266/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_278_628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold277 hold277/A hold277/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_236_85 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20113_ _26861_/C1 _20112_/Y _20124_/A _28702_/Q _28702_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold288 hold288/A hold288/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_49_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18408__A1 _28183_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold299 hold299/A hold299/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_119_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_3883 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23401__A1 _31962_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22204__A2 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2507 VPWR VGND _20743_/S _20739_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_82_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25970_ VGND VPWR wire754/X _19662_/A _31502_/Q _31502_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_21093_ VGND VPWR _21098_/S _27705_/A1 _29544_/Q _29544_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_132_3151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25962__B wire863/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1111_A _14552_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20171__B _20171_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27679__A0 _32413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2529 _20551_/S _20543_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_115_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15890__A1 _30889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18959__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15890__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24921_ VGND VPWR _19581_/B _19617_/A _24947_/A _24921_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_20044_ _20044_/Y _24941_/B wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__23952__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28097__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout757 _24819_/Y _26227_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26777__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1817 VPWR VGND wire1817/X wire1818/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_60_2967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29342__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17092__B1 wire3791/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_3449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27640_ VGND VPWR _27647_/S _24958_/B _32381_/Q _32381_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_5550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16434__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17631__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24852_ wire868/X _31071_/Q _24852_/Y _24464_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_227_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20598__S _20598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3618_A wire3619/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15642__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19369__C1 _19368_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19908__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24901__A1 _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23704__A2 _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23803_ wire1807/X _23802_/X _31810_/Q wire1625/X _23804_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_58_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27571_ _25643_/C _32194_/Q _27572_/A _25643_/B _32186_/Q _32202_/Q _32178_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_149_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24783_ VGND VPWR _24729_/Y _31048_/Q _24779_/X _24783_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_58_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18068__S _18078_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21715__A1 _14333_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1480_A wire1485/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21995_ wire3779/X wire3802/X _21995_/X _21994_/X _21946_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_265_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_106 _19046_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31445__CLK _31460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21715__B2 _21705_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17911__D _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29310_ _29310_/Q _32420_/CLK _29310_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_260_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_117 _21892_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26793__B _26793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26522_ VGND VPWR _26522_/X _31746_/Q _31747_/Q _31745_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__26103__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_128 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23734_ wire766/A _23733_/X wire1875/X _31475_/Q _19926_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_205_4855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_139 _22594_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20946_ VGND VPWR _20947_/S hold495/A _29514_/Q _29411_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16198__A2 wire944/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29492__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24594__A _24594_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18592__B1 wire3160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_2776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29241_ _29241_/Q _31577_/CLK _29241_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_core.RAM256_Di0[5] max_length2344/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26453_ VGND VPWR _26455_/C _26453_/B _26453_/A _26453_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19688__A _20102_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_5368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23012__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23665_ VGND VPWR _23671_/S _27258_/A0 _30795_/Q _30795_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27934__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20877_ VGND VPWR _23523_/S _20876_/X _29367_/Q _29367_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_247_1891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3987_A wire3987/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15945__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1745_A fanout1749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_1170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_4989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25404_ VGND VPWR _25404_/X _25408_/C _25413_/A _25404_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_30_4140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22616_ VGND VPWR _22616_/S hold114/A _22615_/X _30083_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29172_ _29172_/Q _32428_/CLK _29172_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26384_ wire868/X _31680_/Q _26384_/Y _26386_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__18344__A0 _28122_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17147__A1 _29894_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23596_ VGND VPWR _23596_/S _27710_/A1 _30516_/Q _30516_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_104_3264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31595__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22318__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22140__A1 _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17147__B2 _23135_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27603__A0 _32345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25209__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_4631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19541__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28123_ _28123_/Q _30424_/CLK _28123_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15158__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25335_ _25344_/D _25408_/B _25335_/Y _31270_/Q _31269_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XANTENNA__26017__C _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22547_ VGND VPWR _22550_/S _29836_/Q hold492/A _30047_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19200__B _19200_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17698__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20151__B1 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_2563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24968__A1 _31128_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28054_ _28054_/Q _30462_/CLK _28054_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_4528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25266_ _25381_/C _25187_/X _25578_/C _25266_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_100_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_137_core_clk _32557_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_212_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22478_ VGND VPWR _22512_/A3 wire1748/X _22512_/A2 _22478_/X _30000_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_152_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25090__B1 _31188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19439__A3 _25512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4266 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3220_A _21551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24432__A3 _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27005_ _31985_/Q _31986_/Q _27007_/B _27000_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_24217_ VGND VPWR _24220_/S _30893_/Q wire2001/X _30893_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18647__A1 wire3843/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21429_ _21664_/D _30345_/Q _21551_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_276_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25197_ _25197_/X _25197_/C _25197_/A _29841_/D _25197_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_191_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21100__C1 _23343_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18531__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21877__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3603 VPWR VGND _19558_/A _19551_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_237_1526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_2902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26033__B _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3614 wire3616/A _14398_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_146_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17855__C1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24148_ wire718/A _24146_/X _24199_/B1 _24143_/X _24147_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_276_1597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_2683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16122__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20362__A _24604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2902 _20552_/X _20572_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25393__A1 _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24196__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15330__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3731 VPWR VGND wire3731/X wire3732/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_43_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16970_ _16970_/A _22448_/C _18661_/A _23307_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA_wire2453_A _24234_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28956_ _28956_/Q _32420_/CLK _28956_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17870__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24079_ _28504_/Q _27053_/A wire809/A _28696_/Q _24079_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14360__A _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_3495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3753 VPWR VGND _22747_/B _22649_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2957 VPWR VGND _22280_/S _18668_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_4348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24769__A _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5483 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15881__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14684__A2 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_1737 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15921_ VGND VPWR _15921_/X _16040_/A2 wire1032/X _15920_/X _15919_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23943__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27907_ _27907_/Q _29550_/CLK _27907_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_24_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19072__A1 _28066_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_2659 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32220__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3687_A _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26687__C _26687_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_3013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28887_ _28887_/Q _32372_/CLK _28887_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21954__A1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17083__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_2534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18640_ VGND VPWR _18649_/S wire3868/X _28353_/Q _28353_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14510__D _30219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2620_A _14223_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26342__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27838_ _32542_/Q _27837_/Y _32542_/D _25804_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__16425__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15852_ _16091_/A _16091_/C _32302_/Q _15852_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17622__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_59_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2718_A hold121/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23156__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26984__A _31977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25696__A2 _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22079__D_N _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3854_A wire3855/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14803_ _15228_/A2 _14802_/X _28947_/Q _15228_/A3 _14803_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__29835__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18571_ _23231_/A _14054_/Y _18568_/X _18570_/X _18571_/Y _18543_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_1 XFILLER_245_3945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15783_ _30443_/Q _15782_/X _15771_/A wire926/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__20301__S _20311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27769_ VGND VPWR _27774_/S wire2242/X _32495_/Q _32495_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22364__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output219_A _32577_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22903__B1 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3063 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19375__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17522_ _26539_/A _26435_/B _26509_/C _24817_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_4 XANTENNA__32370__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_3191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29508_ VGND VPWR _29508_/D _30477_/CLK _29508_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_111_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14734_ wire1539/X _14734_/X _29073_/Q wire1488/X _14102_/Y _15275_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_37_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30780_ _30780_/Q _32423_/CLK _30780_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_57_3096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19914__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17386__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18568__D_N _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_640 _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18583__B1 _30421_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14420__C_N _30337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17386__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30812__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26645__A1 _31858_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18311__A2_N _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24105__C1 _24097_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31938__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_651 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20390__A0 _28912_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_662 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17453_ _31053_/Q _31050_/Q _17453_/X _26245_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29439_ _29439_/Q _30392_/CLK _29439_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15397__B1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19598__A _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23003__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14665_ VGND VPWR _14818_/S _32303_/Q _28911_/Q _14665_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_673 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15936__A2 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14739__A3 wire1705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_684 _30319_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_4122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29985__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_695 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16404_ _16404_/X wire1058/A _16397_/X _16399_/X _16784_/A3 _16403_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_242_1221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_2930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24120__A2 wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32450_ _32450_/Q _32464_/CLK _32450_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_4144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17384_ VGND VPWR _17389_/C _17424_/B _32281_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_14596_ _14596_/B _14596_/Y _14596_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA_output490_A _28652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22131__A1 _30095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_3131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output588_A _28690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21132__S _21137_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31401_ _31401_/Q _32390_/CLK _31401_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19123_ _19122_/X wire1896/X _19120_/X _19156_/S _19123_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_70_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16335_ VGND VPWR _16961_/S _32315_/Q _28923_/Q _16335_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_3607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32381_ _32381_/Q _32547_/CLK _32381_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19110__B _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17689__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22682__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26948__A2 wire3331/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30962__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25605__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24951__B _24951_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20693__A1 _29209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16897__B1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24959__A1 _31123_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19054_ _19180_/B _27905_/Q _19053_/X _19054_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__29215__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31332_ _31332_/Q _31552_/CLK _31332_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16266_ wire1547/X wire3283/A _29565_/Q _16266_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_177_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20971__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25766__C _32094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26224__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25620__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18005_ VGND VPWR _18008_/S wire3848/X _27939_/Q _27939_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_4087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15217_ _14545_/B _16646_/A2 _15217_/X _15638_/A2 _28822_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_196_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18638__A1 wire3873/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_2218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_3020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_5064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31263_ _31263_/Q _31923_/CLK _31263_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16197_ _16197_/X _29627_/Q _16966_/A2 _16966_/A3 _16736_/S _16196_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19835__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18441__S _18460_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[15] wire2386/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1386_A wire1387/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput305 _13960_/Y la_iena[52] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23631__B2 _24865_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput316 _13950_/Y la_iena[62] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25485__D _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20445__A1 _28965_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_1517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30214_ _30214_/Q _30455_/CLK _30214_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput327 _14004_/Y la_iena[72] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31318__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21642__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27754__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15148_ _15148_/X _15609_/B1 _15277_/S _29116_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__22985__A3 _32406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput338 _13994_/Y la_iena[82] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_187_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17565__B _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31194_ VGND VPWR _31194_/D _31689_/CLK _31194_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_61_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16113__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17310__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput349 _13984_/Y la_iena[92] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_214_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_98_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17310__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_4803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29365__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17057__S wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24187__A2 _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26878__B _26878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30145_ _30145_/Q _32570_/CLK _30145_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_317_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19956_ _19955_/X _28626_/Q _28626_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15079_ wire3258/X wire1748/X _15079_/X _15760_/B1 _29178_/Q wire1702/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__17861__A2 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_1924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22198__A1 _29828_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15872__A1 _30487_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19599__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18907_ _30261_/Q _18907_/X _19087_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_228_4800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23934__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19063__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2787_A _27618_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19780__B _19780_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30076_ hold139/A _31998_/CLK _30076_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_1050 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19887_ _19886_/X _28593_/Q _28593_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_255_300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30342__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1061 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31468__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2595_A _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21945__B2 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17074__B1 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_631 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_277_2530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1061_A _15766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27061__A1 _26779_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2774 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1159_A _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25120_ VGND VPWR _25122_/D _31198_/Q _31199_/Q _25120_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_66_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16888__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22332_ _22332_/B _22332_/Y _22384_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_140_2785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20684__B2 _31023_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23758__A _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_356_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_230_core_clk _32560_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20881__S _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16352__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25611__A2 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15975__S _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25051_ _25081_/A wire1298/X _25051_/X _25051_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__18629__A1 wire3910/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1518_A _15546_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22263_ VGND VPWR _22263_/X _29837_/Q _29838_/Q _22263_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_wire3470_A _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23083__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21228__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29708__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18351__S _18364_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3568_A _30876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24002_ _30866_/D _23997_/X _24000_/X _24199_/B1 _24001_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_3_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21214_ _21214_/X _29692_/Q _23053_/D _22553_/C _14362_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_273_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32243__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17475__B _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22194_ VGND VPWR _21051_/B _22193_/Y _22213_/D _22194_/X _30039_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__16104__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17301__A1 _32299_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_3257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19841__A3 _26886_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17906__D _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28810_ _28810_/Q _32358_/CLK _28810_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25375__A1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24178__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15312__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21145_ VGND VPWR _21169_/S _29588_/Q wire1833/X _29588_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3027 VPWR VGND _18389_/S wire3027/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29790_ _29790_/Q _31938_/CLK _29790_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16655__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14180__A _19573_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_3635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_2439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15707__C _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24589__A _31538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14666__A2 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22189__B2 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15863__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28732__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2326 wire2327/X wire2326/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_clkbuf_5_25_0_core_clk_A clkbuf_5_25_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28741_ _28741_/Q _32394_/CLK _28741_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23925__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29858__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25953_ _25952_/X _27131_/B _31498_/Q _25935_/X _31490_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2337 VPWR VGND wire2337/X wire2338/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21076_ VGND VPWR _21077_/S _27688_/A1 _29527_/Q _29527_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19604__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19690__B _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22601__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2348 _14198_/Y wire2348/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_151_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout953_A _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17065__A0 _30384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18587__A _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1614 VPWR VGND wire1614/X _23859_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_4368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2359 VPWR VGND wire2359/X wire2360/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout1695_A wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21936__B2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_4933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1625 VPWR VGND wire1625/X wire1625/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_2726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32393__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24904_ _25652_/A _24903_/Y _24941_/A _31096_/Q _31096_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20027_ _26893_/C1 _20026_/Y wire851/X _28660_/Q _28660_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16407__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26324__B1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28672_ _28672_/Q _31738_/CLK _28672_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25884_ VGND VPWR _25884_/X _25884_/B _26017_/B _26017_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire1647 _26017_/B _27053_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_hold364_A hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23138__B1 _23137_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_244_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25678__A2 _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30835__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27623_ VGND VPWR _27627_/S _27703_/A1 _32365_/Q _32365_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_142_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24835_ VPWR VGND _31062_/D _32580_/Q _26509_/D VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_58_3350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14969__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1862_A _14404_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14823__C1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28882__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15091__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_3090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24350__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27554_ VGND VPWR _27552_/Y _31381_/Q _31382_/Q _27554_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_145_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2034_A _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24766_ _24768_/B _31461_/Q _31462_/Q _24770_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_input117_A la_input[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21978_ _22063_/A _21978_/Y _21978_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__22361__A1 _30469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5288 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26627__A1 _31780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26309__A _26878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_30 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3170_A wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26505_ _31741_/Q _31743_/Q _31742_/Q _26505_/X _31740_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_262_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3940 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23717_ _30813_/D _23807_/B _23717_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_261_1107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20929_ VGND VPWR _20930_/S _29394_/Q _29497_/Q _29394_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27485_ _27485_/X _27485_/D _27678_/D _27485_/B _21173_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XPHY_52 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_389_core_clk _30452_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22846__C_N _30106_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15918__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_395_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24697_ _24697_/B _24699_/B _24707_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__18526__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_63 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30985__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19849__C _26829_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24102__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29224_ _29224_/Q _32114_/CLK _29224_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26028__B _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28112__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14450_ _14084_/Y _14455_/A _14085_/Y _14449_/Y _30435_/Q _30436_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_145_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2201_A _19577_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26436_ VGND VPWR _26509_/C _26539_/A _31699_/Q _26436_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__29238__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_96 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23648_ VGND VPWR _23669_/S _27686_/A1 _30778_/Q _30778_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_2647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18317__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_318_core_clk _30294_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_243_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23310__A0 _17019_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15394__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29155_ _29155_/Q _31927_/CLK _29155_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18868__A1 _19368_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14381_ _31015_/Q _24424_/B _24434_/B _14383_/C _31014_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 X_26367_ _26366_/X _31671_/Q _31671_/D _26335_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_52_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23579_ VGND VPWR _23596_/S _27693_/A1 _30499_/Q _30499_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25867__B _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire911 wire911/X wire911/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_178_3151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16120_ VGND VPWR _16120_/S _16119_/X _16118_/X _16120_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28106_ _28106_/Q _32134_/CLK _28106_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire933 VPWR VGND wire933/X wire933/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_6_501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16879__B1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30215__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_132_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25318_ _25318_/X _25266_/Y _31267_/Q _25314_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_input82_A la_input[18] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire944 VPWR VGND wire944/X wire944/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_101_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29086_ _29086_/Q _32440_/CLK _29086_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20791__S _20809_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26298_ _26297_/Y _26184_/A _31637_/Q _26301_/B _31637_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17540__A1 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26260__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28262__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25602__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29388__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16051_ VGND VPWR _16051_/X _16249_/S _16500_/B1 _16048_/X _16050_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_221_1894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_1058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28037_ _28037_/Q _32074_/CLK _28037_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2570_A _19415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25249_ _25249_/X _25263_/B1 _29865_/D hold98/A _25263_/A2 VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_191_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23613__A1 _31071_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19817__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3410_A wire3427/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire999 VPWR VGND wire999/X wire999/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_178_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24271__D1 _24270_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23613__B2 _31068_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2668_A _14182_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20427__A1 _28947_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15002_ _15002_/X _32053_/Q _15001_/X _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_6_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19293__A1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3422 wire3425/X _25109_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_46_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26012__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_2945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30365__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_283_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19810_ _19809_/X _28557_/Q _28557_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_251_3971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26698__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24169__A2 wire734/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16646__A3 _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26563__B1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17843__A2 _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14090__A _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31610__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2835_A _23301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29988_ _29988_/Q _30428_/CLK _29988_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_43_3663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3477 _31394_/Q _23036_/S1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_26_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24499__A _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14657__A2 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23916__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19741_ _25718_/A _19740_/X _19772_/A _28527_/Q _28527_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire3561 VPWR VGND wire3561/X wire3562/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_117_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16953_ _16953_/X _28900_/Q _16966_/A2 _16966_/A3 _16964_/B1 _16952_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28939_ _28939_/Q _32557_/CLK _28939_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_65_1996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3572 wire3572/X _30872_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__27107__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23834__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3583 VPWR VGND wire3583/X wire3584/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3594 VPWR VGND wire3594/X wire3595/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_0_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19092__S _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15904_ VGND VPWR _15904_/X _15904_/B _15904_/A wire917/X VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19596__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_34_core_clk _32523_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_280_5046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_3909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23392__A3 _17087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31950_ VGND VPWR _31950_/D _32309_/CLK _31950_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19672_ _27076_/A _19680_/A _26797_/B _19672_/X _26781_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_20_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2871 VPWR VGND _21090_/S _21095_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16884_ VGND VPWR _16884_/S _16883_/X _16882_/X _16884_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4049_A _28667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14409__A2 _22338_/A VGND VPWR VPWR VGND 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VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31881_ _31881_/Q _32017_/CLK _31881_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_output503_A wire4056/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24877__B1 _31085_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_3704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19348__A2 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_1787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23144__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24341__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_4176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_1441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18554_ _30433_/Q _30432_/Q _18554_/X _18554_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_30832_ _30832_/Q _32014_/CLK _30832_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_37_2700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_206_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1134_A wire1134/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15766_ _16417_/A2 _30442_/Q _15766_/X _15765_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XANTENNA__17359__A1 _32292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27322__B _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20966__S _20979_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14290__B1 _17013_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22352__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22747__A _29886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19753__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17505_ VPWR VGND _17505_/X _31752_/Q _17508_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_128_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14717_ _14882_/A2 _14717_/X _14716_/X wire1135/X _29588_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_233_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_3027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_171_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18485_ VGND VPWR _18496_/S _18644_/A1 _28258_/Q _28258_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30386__D _30386_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30763_ _30763_/Q _32296_/CLK _30763_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_18_2132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24629__B1 _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15909__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15697_ _15696_/X _15735_/B _15692_/X _15749_/C1 _15697_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18436__S _18465_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26793__D_N wire1272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32116__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_470 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_481 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32502_ _32502_/Q _32523_/CLK _32502_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_92_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_492 wire707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1301_A _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17436_ wire3564/A _31931_/Q _17436_/X _17446_/B2 _17436_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_163_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27749__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14648_ VGND VPWR _14648_/X _30773_/Q _14648_/A _14648_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_30694_ _30694_/Q _32551_/CLK input97/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_14_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16582__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24962__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_17 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25841__A2 _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22185__C _22185_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2535_A _20506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_28 _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14593__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32433_ _32433_/Q _32433_/CLK _32433_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18859__A1 _28152_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28605__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17367_ VGND VPWR _17372_/C _17424_/B _32278_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_35_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_39 _30861_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14579_ _14817_/A2 _14579_/X _14578_/X _14823_/A1 _28773_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_242_1073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_5577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14265__A _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19106_ _19189_/A2 _28390_/Q _19105_/X _28390_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_31_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_3437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16318_ VGND VPWR _16318_/X _16458_/S _16940_/B1 _16315_/X _16317_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_48_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31140__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32364_ _32364_/Q _32436_/CLK _32364_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32266__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17298_ _17297_/Y _30827_/Q _17298_/C _30810_/Q _17298_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__16334__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17531__B2 _17452_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14345__A1 _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31315_ _31315_/Q _31317_/CLK _31315_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19267__S _19267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19037_ _28355_/Q _19185_/S wire1924/A _19037_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_48_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14316__C_N _29874_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17576__A _17576_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30708__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16249_ VGND VPWR _16249_/S _16248_/X _16247_/X _16249_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2510_A wire2513/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32295_ _32295_/Q _32295_/CLK _32295_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23604__B2 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1768_A wire1769/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20418__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14896__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire754_A wire755/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28755__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27484__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_3708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31246_ hold75/A _32296_/CLK _31246_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19284__A1 _27884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20206__S _20211_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16098__A1 _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19823__A3 wire2194/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21091__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17295__B1 wire4180/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25357__A1 wire3489/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_4201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_4944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16637__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25357__B2 _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31177_ _31177_/Q _31462_/CLK _31177_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_157_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_4789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15845__A1 _28405_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15845__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30858__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23517__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23907__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19036__A1 _28032_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30128_ _30128_/Q _30455_/CLK _30128_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_opt_27_1_core_clk_A clkbuf_opt_27_1_core_clk/A VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 X_19939_ _25041_/A wire1316/X _19939_/X _25033_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_22_3747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xcore.RAM256 wire2398/X wire2406/X wire2415/X wire2422/X wire2428/X wire2770/X wire3121/X + wire2599/X _29390_/CLK wire2320/X _14186_/Y max_length2372/X _14180_/Y wire2377/X + _14174_/Y wire2385/X _19587_/B _19590_/B _19594_/B wire2696/X wire2321/X _19601_/B + _19604_/B _19608_/B _19611_/B wire2717/X _14159_/Y wire2724/X _19624_/B wire2396/X + _19631_/B wire2328/X _19634_/B _19637_/B wire2331/X wire2336/X max_length2344/X + wire2345/X max_length2353/X wire2354/X max_length2363/X wire2125/A wire2121/A wire2118/A + wire2115/A wire2112/A wire2110/A wire2107/A wire2104/A wire2101/A wire2099/A wire2096/A + wire2094/A wire2090/A wire2088/A wire2085/A wire2083/A wire2081/A wire2078/A wire2076/A + wire2074/A wire2072/A wire2071/A wire2069/A wire2065/A wire2062/A wire2060/A wire2057/A + wire2053/A wire2050/A wire2047/A wire2044/A wire2042/A wire1685/X wire1438/X wire1440/X + wire1442/X wire1444/X VPWR VGND NF_RAM256 XFILLER_42_3184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27216__C _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21918__B2 _21916_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22040__B1 _22037_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26306__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22950_ VGND VPWR _22966_/S _21404_/A _30127_/Q _30127_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30059_ hold150/A _32568_/CLK _30059_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_74_5559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18795__A0 _28117_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21394__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20051__C1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21901_ _21902_/B _21890_/A _21556_/B _21556_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_249_1216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22881_ VGND VPWR _22933_/S _30475_/Q wire3806/X _22882_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_107_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24868__B1 _31080_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_4208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15073__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15035__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19339__A2 wire1403/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24620_ VGND VPWR _14263_/X _14262_/X _31537_/Q _24620_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__16270__B2 _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28135__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24332__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21832_ _21832_/X _21820_/B _21449_/C _21449_/A _21449_/D VGND VPWR _21436_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_266_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2117 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23760__B _31782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26641__B1_N _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20876__S _20876_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22343__A1 _30460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23540__A0 _30031_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18547__B1 hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_2669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23252__S _23268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_2660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25033__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24551_ _25425_/A _24551_/B _24551_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_21763_ _21764_/B _21752_/A _21353_/A _21752_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18346__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22894__A2 _22878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_3668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_5250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_33_3832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1276_A _23673_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22376__B _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23502_ VGND VPWR _23516_/S _23501_/X _31955_/Q _30437_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_4869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20714_ VGND VPWR _20714_/S _29230_/Q _27509_/A1 _29230_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30238__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27270_ _27270_/X _27276_/C _31423_/Q hold487/A _27280_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__27659__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24482_ VGND VPWR _24482_/Y _31038_/Q _24454_/A _24888_/B _24480_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_244_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21694_ _21675_/X _21693_/X _21634_/X _22058_/S _21674_/Y _21695_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_2 XFILLER_257_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20177__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16573__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17770__A1 _31721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25293__B1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24872__A _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_1260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17770__B2 _31725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28285__CLK _30274_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26221_ _31599_/Q _26227_/A2 _26222_/B _32289_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_33_3887 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22095__C _22095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14584__A1 _32042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23433_ _23433_/X _29366_/Q _29824_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 XFILLER_10_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20645_ VGND VPWR _20650_/S _27705_/A1 _29191_/Q _29191_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_68_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3503 VPWR VGND _25096_/B1 _31191_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XPHY_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3685_A hold245/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29530__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27034__A1 _27009_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24591__B _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_5357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19511__A2 _19859_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26152_ VGND VPWR _26019_/A _19567_/X _26151_/X _31565_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_23364_ VGND VPWR _23366_/S _30342_/Q _29660_/Q _30342_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20576_ VGND VPWR _20576_/S _27702_/A1 _29092_/Q _29092_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16325__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30388__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25103_ VGND VPWR _31193_/D _25103_/B _26182_/A _25103_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_136_3308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14336__A1 _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22315_ VGND VPWR _23559_/S _29901_/Q _29160_/Q _29901_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_49_2626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14336__B2 _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26083_ _31541_/Q _26083_/X _26020_/Y _24591_/B _17877_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_175_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_3652 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18081__S _18086_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1610_A _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23295_ VGND VPWR _23295_/S wire3831/X _30277_/Q _30277_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31633__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_2528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_2697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_5081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1708_A _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_3261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_3051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20409__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14887__A2 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_290_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25034_ _25652_/A _25033_/X _25082_/A2 _31160_/Q _31160_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29911_ VGND VPWR _29911_/D _30382_/CLK _29911_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_252_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27394__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22246_ wire828/X _29835_/D _22245_/X _22509_/C1 _29835_/Q _22243_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__29680__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23071__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_62_2804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_2935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21082__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2006 VPWR VGND _24216_/A0 _18199_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17286__B1 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25348__A1 wire3491/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3016_A _18433_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29842_ VGND VPWR _29842_/D _31369_/CLK _29842_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_134_3065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17825__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26545__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25348__B2 _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22177_ _22200_/D _29824_/Q _29826_/Q _29825_/Q _22177_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_hold481_A hold481/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23359__A0 _29655_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput680 wire3119/X mprj_sel_o[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2101 wire2101/X wire2101/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__26311__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25899__A2 _14195_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput691 wire3384/X serial_load_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2112 VPWR VGND wire2112/X wire2112/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21128_ VGND VPWR _21139_/S _27254_/A0 _29572_/Q _29572_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2123 wire2124/X wire2123/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_1843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31783__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24020__A1 _31136_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29773_ VGND VPWR _29773_/D _32269_/CLK _29773_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_26985_ _26985_/C _31977_/D _27007_/A _26985_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 Xwire2134 VPWR VGND _24955_/B _19782_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21909__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1338 _19717_/X _24184_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_232_1242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2145 VPWR VGND _19704_/A _19776_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_3363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1349 wire1351/X _26382_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire1411 VPWR VGND _23527_/S _23519_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_147_4116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2156 VPWR VGND _19698_/A _19770_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19578__A2 wire2675/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22031__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28724_ _28724_/Q _31351_/CLK _28724_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13950_ _28547_/Q _13950_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2151_A _19772_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25936_ _25937_/B _25941_/A _25836_/C _25836_/A _25836_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 Xwire2167 VPWR VGND _24935_/B _19605_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21059_ _22135_/A _29516_/Q _21058_/X _29516_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_281_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17589__A1 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2178 VPWR VGND _20102_/B _20169_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_1017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2249_A _26775_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1444 wire1445/X wire1444/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2189 _26872_/B _20096_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__22582__A1 _30352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18786__B1 _18785_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26848__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28655_ _28655_/Q _31860_/CLK _28655_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_281_4665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18250__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13881_ _28616_/Q _13881_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1477 VPWR VGND wire1477/X wire1477/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25867_ _25867_/D _25874_/D _31453_/D _25867_/A _25971_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_1_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16797__C1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31013__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24859__B1 _31075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1488 VPWR VGND wire1488/X _14550_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_1338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_3049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32139__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15064__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_4305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15620_ _16081_/A2 _15620_/A1 _29644_/Q _15620_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_186_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27606_ VGND VPWR _27614_/S _27686_/A1 _32348_/Q _32348_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24323__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25520__A1 _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24818_ _25881_/D _23611_/A _23873_/D _24889_/A1 _26335_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_223_4037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29060__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28586_ _28586_/Q _31801_/CLK _28586_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20786__S _20786_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25798_ _32531_/Q _25797_/X hold450/X _25799_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 XFILLER_21_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23531__A0 _30022_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_5074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14811__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19735__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15551_ VGND VPWR _15702_/S _29031_/Q _28999_/Q _15551_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27537_ VGND VPWR _32334_/Q _27535_/X _27536_/Y _32334_/D _27597_/B2 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_240_5096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24749_ VGND VPWR _24749_/B _24785_/B _31450_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__28628__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16549__C1 wire1450/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22885__A2 _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21542__C1 _21534_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16013__A1 _29622_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26076__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17210__B1 _29442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3458_A _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14502_ _14502_/B _14502_/Y _14502_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__19750__A2 _19584_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18270_ _18270_/Y wire3852/X _29341_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_275_5148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25878__A _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15482_ _15709_/A3 _15567_/C _28797_/Q _15482_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__31163__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27468_ VGND VPWR _27476_/S _32292_/Q _27467_/X _32292_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24087__A1 _28473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_152_core_clk _32352_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_223_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32289__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17761__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24782__A _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17221_ _17221_/X _17220_/X wire3217/X _21668_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 X_29207_ _29207_/Q _32421_/CLK _29207_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_2398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14433_ _14433_/Y _29349_/Q _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14575__A1 _29005_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3817_A _18623_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26419_ _31692_/D _26417_/X _26403_/Y _26418_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_193_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15772__B1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14575__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27399_ VGND VPWR _27403_/S _27417_/A0 _32248_/Q _32248_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2785_A _27618_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_4810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_3522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20648__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19502__A2 hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29138_ _29138_/Q _32302_/CLK _29138_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_197_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17152_ _17152_/X _17151_/Y _17150_/X _17220_/C _21638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__21845__B1 _21843_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28778__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput15 VPWR VGND hold53/A hold52/X VGND VPWR NF_sky130_fd_sc_hd__buf_2 X_14364_ _14362_/A wire3962/X _14362_/B _14363_/X _20848_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XFILLER_236_3708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19595__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire741 wire741/X wire741/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__28404__D _28404_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput26 hold13/A hold12/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__16316__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput37 VGND VPWR hold28/A hold27/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__17513__B2 _26543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire752 VPWR VGND wire752/X wire752/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23829__C _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16103_ wire999/X _16091_/C _32050_/Q _16103_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire763 VPWR VGND wire763/X wire763/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xinput48 VPWR VGND la_input[102] input48/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_101_3790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19087__S _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput59 VGND VPWR input59/X la_input[112] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__25587__A1 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17083_ _29886_/Q _21447_/B _21410_/A _21616_/A _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA_wire2952_A _19433_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29069_ _29069_/Q _32388_/CLK _29069_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_2444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14295_ _31275_/Q _13829_/A _14295_/X wire3232/X _29505_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__16867__A3 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21860__A3 _17093_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_289_509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31100_ _31100_/Q _32541_/CLK _31100_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14878__A2 wire1733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16034_ _16034_/X _28915_/Q wire1021/X wire1458/X _16040_/A2 _16033_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_114_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25817__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_154_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32080_ hold242/A _32528_/CLK _32080_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_136_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23062__A2 _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28008__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21073__A1 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17277__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31031_ _31031_/Q _31552_/CLK _31031_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3241 VGND VPWR wire3243/A _14103_/Y VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__22270__B1 _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17816__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16619__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1084_A wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4166_A hold66/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15288__C1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26000__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4070 VPWR VGND wire4070/X wire4071/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_6_2517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_4330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4081 VPWR VGND wire4081/X wire4082/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23337__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2540 VPWR VGND _20440_/S _20419_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_230_2628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21646__A _21646_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4092 VPWR VGND wire4092/X wire4093/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3296 VPWR VGND wire3298/A _15560_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_output620_A _24585_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24011__A1 _28529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17292__A3 wire3098/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17985_ _29490_/Q _18626_/B _30415_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_130_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24011__B2 _28689_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27036__C _27036_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2573 wire2576/X _19419_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_284_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22022__A0 _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3380 wire3381/X wire3380/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__19569__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19724_ _19760_/B _19973_/A1 _19724_/A _19724_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xwire3391 wire3392/X wire3391/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28158__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2595 VPWR VGND _26120_/A2 _17876_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16936_ VGND VPWR _16941_/A _16935_/X _16934_/X _16949_/A1 _16949_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21365__B _21365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_3203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1872 VPWR VGND _26301_/B _26267_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20033__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18777__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24957__A _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29403__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20584__A0 _29100_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19655_ _26148_/A _19654_/X _19695_/A2 _28488_/Q _28488_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31933_ _31933_/Q _31933_/CLK hold470/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18241__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16867_ _30800_/Q _16601_/S _16878_/A2 _16878_/A1 _16867_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_226_837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_4896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24676__B _24678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18606_ VGND VPWR _18616_/S wire3870/X _28320_/Q _28320_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_228_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24314__A2 wire2611/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15818_ _15818_/X _15817_/X _15808_/X wire917/X _15804_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_252_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19586_ _25512_/A _19585_/Y _19632_/A _28468_/Q _28468_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31864_ _31864_/Q _32566_/CLK _31864_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_56_3854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20696__S _20708_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16798_ _16798_/A2 wire3278/X _29266_/Q _16798_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_280_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14263__B1 wire3975/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22325__A1 _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31506__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18674__B _29811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14802__A2 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21381__A _21381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18537_ _18666_/B _23342_/C _29774_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 X_30815_ _30815_/Q _32010_/CLK _30815_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_279_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15749_ VGND VPWR _15749_/X _15746_/X _15748_/X _15752_/B1 _15749_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_241_3447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_4582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31795_ VGND VPWR _31795_/D _32567_/CLK _31795_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_248_1293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29553__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26067__A2 _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2558_A _20195_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16004__B2 wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31005__D _31005_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17201__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19741__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold90_A hk_dat_i[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27479__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30746_ hold448/A _32540_/CLK _30746_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18468_ VGND VPWR _18496_/S wire3915/X _28241_/Q _28241_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_50_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25075__C_N _24945_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24078__B2 _30717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16555__A2 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17752__A1 _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25275__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_11_3404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_4033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14566__A1 _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26539__D_N _31055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17419_ _30953_/Q _30987_/Q _30881_/Q _30847_/Q wire3192/X _17423_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_128_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19786__A _19786_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30530__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30844__D _30844_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30677_ _30677_/Q _31436_/CLK hold313/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_3933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18399_ VGND VPWR _18399_/S _18499_/A1 _28176_/Q _28176_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_163_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31656__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16960__C1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20639__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22924__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32416_ _32416_/Q _32416_/CLK _32416_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20430_ VGND VPWR _20449_/S _28950_/Q _27688_/A1 _28950_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21836__B1 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4812 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_217_5054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire969_A wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22416__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18701__B1 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14318__A1 _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20361_ _31399_/Q _27793_/C _31400_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_102_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32347_ _32347_/Q _32347_/CLK _32347_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_41_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21851__A3 hold223/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22100_ VGND VPWR _22100_/X _22097_/X _22099_/X wire2273/X _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14869__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26470__C_N _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23080_ _23115_/B _23061_/B _23145_/A _23080_/X _29713_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__30680__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32278_ _32278_/Q _32287_/CLK _32278_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_20292_ VGND VPWR _20292_/S _21203_/A0 _28834_/Q _28834_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14442__B _14442_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21064__A1 _31956_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31675__D _31675_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22031_ VGND VPWR _22031_/X _22510_/A2 _22065_/B1 _30013_/Q _17202_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22261__B1 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31229_ VGND VPWR _31229_/D _31763_/CLK hold96/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26527__B1 _26537_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3266_A _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27227__B _27227_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1024_A wire1030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15818__A1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_2875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23247__S _23251_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19009__A1 _27967_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31036__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_85 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22013__B1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18568__C _22620_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26770_ _26687_/A _19715_/C _14216_/A _19566_/A _26687_/D _26771_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA_wire3433_A wire3434/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_7_1_core_clk clkbuf_opt_7_2_core_clk/A clkbuf_opt_7_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_180_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23982_ wire4136/X _26838_/A1 _23982_/X _28591_/Q _24046_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_77_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22564__A1 wire3709/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18768__B1 _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24867__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25721_ VPWR VGND _25723_/A _31403_/Q _25727_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__23771__A _31792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26785__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22933_ VGND VPWR _22933_/S hold501/A _29905_/Q _22935_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_1929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1393_A wire1397/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15046__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24586__B _24586_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17440__B1 wire3192/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25502__A1 _19498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28440_ VGND VPWR _28440_/D _32277_/CLK _28440_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_249_1046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25652_ VGND VPWR _31383_/D _25652_/B _25652_/A _27404_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19980__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30060__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22864_ _22864_/B _22869_/D _22871_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__31186__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14254__B1 hold221/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23513__A0 wire3668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_1961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16794__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17991__A1 wire3898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24603_ _24603_/Y _24604_/B _31536_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__21291__A _21609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32431__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21815_ wire3206/A _21814_/X _21808_/X _21830_/B _21815_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_129_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28371_ _28371_/Q _29389_/CLK _28371_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_2308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25583_ hold105/A _24493_/X _25584_/A _31233_/Q _25582_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_202_4622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18076__S _18078_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22795_ _22781_/B _22809_/C _22794_/Y _22793_/X _22773_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 XANTENNA__16385__A _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout916_A wire926/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19193__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_1918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_2933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27255__A1 _32130_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26058__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_1858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27322_ _27330_/S _31384_/Q _27322_/C _27395_/B _31383_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_263_2993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20878__A1 _30237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13802__A _31144_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24534_ VGND VPWR _31288_/Q _24536_/S _31216_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_276_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27389__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21746_ VGND VPWR _21746_/S hold160/A _17017_/X _21746_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24069__A1 _28503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_436 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25266__B1 _25381_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24069__B2 _28695_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17743__A1 _17742_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_447 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28920__CLK _32352_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18940__B1 wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_1511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27253_ VGND VPWR _27259_/S _32128_/Q _27253_/A0 _32128_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19696__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24465_ VGND VPWR _24465_/Y _31029_/Q wire1326/X _26542_/C _24464_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__15754__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21677_ VGND VPWR _21677_/C _21903_/B _21677_/X _21677_/D _21677_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XPHY_1046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1825_A _18242_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32581__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26204_ VPWR VGND _31590_/D _26204_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__25281__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21827__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23416_ _30414_/Q _30415_/Q _30484_/Q _30413_/Q _23417_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_120_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20628_ VGND VPWR _20638_/S wire1682/X _29174_/Q _29174_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27184_ hold106/A _27183_/Y _32085_/D _27185_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XPHY_1079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_3064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28224__D _28224_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24396_ _31000_/Q _31002_/Q _24399_/B _31001_/Q _24407_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_120_3687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_1577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_2341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22553__C _22553_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26135_ _26159_/A _31557_/Q _26135_/X _26159_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_175_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23347_ VPWR VGND _23347_/X _21279_/A hold420/A _23347_/C _23347_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_10_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_3_2_0_core_clk clkbuf_3_2_1_core_clk/A clkbuf_3_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_20559_ VGND VPWR _20562_/S _23647_/A1 _29075_/Q _29075_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_138_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input184_A mprj_dat_i[19] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_3621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length1920 VPWR VGND _18906_/S _19159_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_88_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14080_ _18546_/A _22078_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 X_26066_ _26066_/X _31537_/Q _31535_/Q _31536_/Q _26066_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_66_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23278_ VGND VPWR _23298_/S wire3885/X _30260_/Q _30260_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23044__A2 _30421_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_3151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21055__A1 _30048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17259__B1 wire4203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25017_ _25076_/C1 _25016_/X _25017_/A2 _31152_/Q _31152_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_62_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_4216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22252__B1 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22229_ _21049_/Y _22236_/A _22229_/Y _22228_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__26518__B1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_4830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2366_A wire2367/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15809__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28300__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29426__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1102 _15233_/B1 wire1104/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_29825_ _29825_/Q _30051_/CLK _29825_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_input45_A la_input[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22061__S _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27191__B1 _32089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20370__A _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1124 _15640_/A1 wire1134/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_130_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16482__A1 _16956_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18208__C1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22004__B1 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1146 wire1152/X _15750_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25741__A1 _25738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2533_A _20515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17770_ _17770_/X _17873_/B1 _31721_/Q _31725_/Q _17874_/A2 VGND VPWR _17769_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_43_2088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29756_ _29756_/Q _31921_/CLK hold253/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1157 _15629_/A2 _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_14982_ _16956_/A2 _15747_/A1 _32120_/Q _14982_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_229_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26968_ _26970_/A _26968_/C _31987_/Q _27009_/B _26968_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 Xfanout1168 wire1170/X _15737_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_1_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14493__B1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18759__B1 _18758_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1230 VPWR VGND wire1230/X wire1230/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30403__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20015__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_1703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1179 _14545_/Y _15500_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__31529__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1241 VPWR VGND _24308_/C _24306_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16721_ _16721_/A2 wire3281/X _29062_/Q _16721_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_247_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_3545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28707_ _28707_/Q _30580_/CLK _28707_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_169_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3767_A wire3766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13933_ _28564_/Q _13933_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1252 wire1252/X _24130_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__19420__A1 wire3536/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25919_ _25917_/X _27131_/B _24716_/A _25918_/X _31476_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_235_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_2860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_4451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29687_ _29687_/Q _30330_/CLK _29687_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1263 VPWR VGND wire1263/X _23993_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_26899_ _23599_/B _26898_/Y wire752/A _31899_/Q _31899_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__28450__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_19_3_core_clk clkbuf_opt_19_3_core_clk/X clkbuf_opt_19_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_95_2432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15037__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16234__A1 _15771_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_4260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_4211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27494__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26297__A2 wire2679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17431__B1 wire2072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19440_ wire2952/X _31340_/Q _19440_/X _28441_/Q _28442_/Q _31341_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_207_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2700_A wire2701/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1296 VPWR VGND wire1296/X wire1296/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19971__A2 _24935_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16652_ VGND VPWR _16652_/X _16651_/X _16650_/X _16841_/C1 _16816_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_235_656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28638_ _28638_/Q _32549_/CLK _28638_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23065__D_N _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13864_ _28633_/Q _13864_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_267_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_333_core_clk _32108_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23504__A0 _31956_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22307__A1 _29893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17982__A1 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23831__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_2888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2768 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15603_ VGND VPWR _15639_/S _32440_/Q _32368_/Q _15603_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14796__A1 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19371_ _19363_/X _19370_/X wire1900/A _19365_/X _19371_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_16583_ wire992/X _16583_/X _16582_/X _16964_/B1 _28858_/Q wire1470/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28569_ _28569_/Q _32553_/CLK _28569_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_250_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15993__B1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13795_ _31151_/Q _13795_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__30553__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21515__C1 _21288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3742_A _30223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31679__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19184__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30600_ hold343/A _31874_/CLK _30600_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18322_ _18623_/A1 wire3175/X _18322_/Y _18295_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_279_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19723__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15534_ VGND VPWR _15534_/X _15533_/X _15762_/A1 _15561_/C1 _15532_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_223_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27299__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31580_ _31580_/Q _32271_/CLK _31580_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_147_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25257__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18931__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17734__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14548__A1 _15507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30531_ _30531_/Q _32553_/CLK hold350/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18253_ VGND VPWR _18333_/S _28095_/Q _27248_/A0 _28095_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15745__B1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15465_ _15705_/A1 _15730_/C1 _15463_/X _15465_/Y _15464_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__30664__D _30664_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17204_ _21665_/A _17204_/Y _17204_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_258_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14416_ _14416_/Y _29348_/Q _21746_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_201_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18184_ _18184_/X _18157_/Y _18181_/X _18183_/X _18182_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 X_30462_ VGND VPWR _30462_/D _30462_/CLK _30462_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_218_5374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15396_ _15751_/A1 _16874_/A2 _15396_/X _15738_/A2 _29059_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_output570_A _28737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22086__A3 wire2273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15760__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output668_A wire2739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_49_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32201_ _32201_/Q _32536_/CLK _32201_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length2233_A _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20097__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17135_ _17220_/C _21619_/D _17135_/Y _14092_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_214_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14347_ _14347_/A _14347_/D _14347_/C _21355_/A _14355_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__26757__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30393_ _30393_/Q _30403_/CLK _30393_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_231_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_4125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26221__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_4204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32132_ _32132_/Q _32574_/CLK _32132_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_3852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_4147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_3522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17066_ _29996_/Q _22484_/A2 _17066_/X _29424_/Q wire3791/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_252_2105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14278_ _29651_/Q _14278_/Y _29949_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_28_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26232__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14262__B _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25575__A4 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31059__CLK _31689_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21046__A1 _29506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16017_ _16387_/A _16387_/C _29011_/Q _16017_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_80_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32063_ _32063_/Q _32063_/CLK _32063_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25980__A1 _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32304__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31014_ _31014_/Q _31746_/CLK _31014_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23991__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27762__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3093 VPWR VGND _17503_/B _17500_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_247_4313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26524__A3 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_4373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17065__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26886__B _26886_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_3992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25193__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25732__A1 _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29919__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24535__A2 _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1633_A wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30083__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17968_ VGND VPWR _17974_/S wire3857/X _27905_/Q _27905_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_61_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21349__A2 _14431_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22546__A1 _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24687__A _31451_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_55 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15681__C1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19707_ _27077_/C1 _19706_/Y _19711_/A2 _28514_/Q _28514_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire717_A wire718/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32454__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24940__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1680 wire1682/A _27688_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20557__A0 _29073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2867_A _21139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16919_ wire1010/A wire1482/A _28434_/Q _16919_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19411__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_3375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17899_ VPWR VGND _31058_/Q _30325_/D _31023_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_2 XFILLER_221_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15028__A2 wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16225__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26288__A2 _31632_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20021__A2 wire850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17422__B1 _17420_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1800_A _17347_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19962__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31916_ _31916_/Q _31916_/CLK hold385/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19638_ _19638_/Y _26900_/B _19638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_0_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25496__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17973__A1 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16776__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15433__C1 _29060_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28943__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4579 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_21603_/C _21601_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_91_2852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24803__D_N _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22580_ _22580_/X _22580_/S wire3710/X _30351_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 X_31778_ _31778_/Q _31884_/CLK _31778_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17725__A1 _31717_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22935__A _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3706 VPWR VGND VGND VPWR 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X_23201_ VGND VPWR _23201_/S _30193_/Q hold442/X _30193_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_3736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1333_A _25982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20088__A2 _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17489__B1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20413_ VGND VPWR _20417_/S _27512_/A1 _28935_/Q _28935_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18686__C1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24181_ _24317_/A _32581_/Q _24181_/X _24204_/A2 _30569_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_8_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21393_ _21393_/Y _30349_/Q _21514_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__14453__A _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18150__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4784 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_4172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1239_A wire1244/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29449__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1227 VPWR VGND fanout1225/A wire1228/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23132_ hold250/A _23157_/A2 _23132_/X _30104_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_20344_ VGND VPWR _20357_/S _27694_/A1 _28884_/Q _28884_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_192_2030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23766__A _31787_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25420__A0 _31290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15503__A3 wire1493/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16700__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15983__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_4902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_2757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14711__A1 _29556_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27940_ _27940_/Q _30431_/CLK _27940_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23063_ _23049_/A _23063_/X _23050_/X _23062_/X hold417/A _30090_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_20275_ VGND VPWR _20290_/S wire1826/X _28817_/Q _28817_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_44_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19682__C _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3648_A _30520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18989__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30426__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18579__B _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22014_ _21942_/S _21629_/A _22014_/X _22012_/Y _22013_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_4 XFILLER_265_5125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23982__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27672__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21286__A _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21442__D1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20796__A0 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17483__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27871_ _27871_/Q _30453_/CLK _27871_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_24_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27173__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput205 mprj_dat_i[9] input205/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__28473__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout866_A _19646_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29599__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15267__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16464__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_3458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29610_ _29610_/Q _32327_/CLK _29610_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26822_ _26893_/C1 _26821_/Y _26835_/A _31861_/Q _31861_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_183_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_2345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3815_A _29871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26920__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22537__A1 _29826_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24597__A _24597_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_61 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19938__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29541_ _29541_/Q _32428_/CLK _29541_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1967_A _18982_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20548__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18205__A2 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26753_ _26752_/Y _26893_/C1 _31829_/Q _26760_/B _31829_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19402__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23965_ _24207_/B1 _28685_/Q _23965_/X _19646_/B _28493_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_281_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30749__D _30749_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_1999 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30576__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15019__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26279__A2 _14200_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27476__A1 _32296_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20012__A2 wire2656/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17413__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25704_ VGND VPWR _27793_/B _27784_/C _31398_/Q _25704_/X _25867_/A _31399_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_243_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19953__A2 _19574_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31821__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22916_ VGND VPWR _22933_/S _30479_/Q _29903_/Q _22917_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29472_ _29472_/Q _32063_/CLK _29472_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_38_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26684_ _26684_/A2 _31868_/Q _26683_/X _26684_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_246_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold444_A hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23896_ _23896_/X wire1289/A _28646_/Q wire3508/X _19994_/X VGND VPWR wire763/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_245_987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27748__A_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17964__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27571__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21760__A2 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_2864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28423_ _28423_/Q _31953_/CLK _28423_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_17_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25635_ _25635_/Y _25635_/A _31392_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 X_22847_ VGND VPWR _22845_/X _22938_/B _22846_/X _30106_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_232_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27228__A1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19705__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28354_ _28354_/Q _30452_/CLK _28354_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_262_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2114_A wire2115/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25566_ VGND VPWR _25745_/B _25566_/B _25738_/A _25738_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XPHY_222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22778_ _22820_/C _22820_/B _30465_/Q _22778_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16519__A2 _16835_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17716__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25239__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14347__B _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26317__A _26886_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27305_ VGND VPWR _27311_/S _27268_/X _32166_/Q _32166_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24958__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31971__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24517_ _31293_/Q _31291_/Q _24527_/C _31292_/Q _24531_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_224_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20720__A0 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21729_ _21729_/X _21364_/X _21366_/Y _21367_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__15727__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28285_ _28285_/Q _30274_/CLK _28285_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30484__D _30484_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25497_ _31328_/D _31327_/Q _25496_/Y _31328_/Q _19495_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_120_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19857__C _20126_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25578__D _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26451__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15250_ _16938_/A2 wire3302/X _30789_/Q _15250_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27236_ VGND VPWR _27255_/S _32111_/Q _27236_/A0 _32111_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_2263 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24448_ _24449_/C _24447_/Y _14143_/Y _22598_/S _25197_/C VGND VPWR _24445_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19469__A1 _19471_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22068__A3 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24462__A1 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15742__A3 _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14201_ _19547_/B _14201_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XFILLER_120_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20079__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length3152 VPWR VGND _18661_/C _23355_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_14_2190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18677__C1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15181_ wire3258/X wire1741/A _15181_/X _15760_/B1 _28821_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__14950__A1 _29015_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31201__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26739__B1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27167_ VGND VPWR _27167_/S _27710_/A1 _32073_/Q _32073_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2483_A _20997_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24379_ _24378_/X _24888_/D _24889_/A1 wire2017/X _30992_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14363__A _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18141__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3323_A _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27400__A1 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26203__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27793__D _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14132_ _14132_/A _14132_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 X_26118_ _31550_/Q _31551_/Q _26118_/Y _26121_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_49_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23676__A _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_21_2_core_clk clkbuf_opt_21_3_core_clk/A clkbuf_opt_21_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16152__B1 _16151_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24214__A1 _30890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27098_ _27116_/B _26882_/B _27098_/A _27098_/X _27098_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__18692__A2 _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2484 VPWR VGND _21018_/S _20997_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_172_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21028__A1 _30028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2495 VPWR VGND _20935_/S _20921_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_165_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28816__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14702__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22225__B1 wire826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18940_ VGND VPWR _18940_/X _19357_/B wire1924/A _28028_/Q _18939_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_287_5350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14063_ _31537_/Q _26070_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_137_3992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2650_A _14195_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26049_ _26049_/X _14399_/B _24612_/A _26120_/A2 _26047_/X _26048_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_7_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24765__A2 _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23395__B _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3380 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_114_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23973__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21433__D1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31351__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32477__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18871_ _18863_/X _18870_/X wire1900/A _18865_/X _18871_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_188_3312 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20304__S _20315_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_3206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21984__C1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_2_6_core_clk_A clkbuf_opt_2_6_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15258__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30919__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17822_ _17833_/S _17821_/X _17822_/Y _17820_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xclkbuf_5_10_1_core_clk clkbuf_5_10_1_core_clk/X clkbuf_5_10_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_29808_ VGND VPWR _29808_/D _30424_/CLK hold384/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_5_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_1872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22528__A1 _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_4677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold4 hold4/A hold4/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_255_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28966__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24922__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20539__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29739_ _29739_/Q _29914_/CLK hold455/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17753_ _17752_/X _17832_/S _17753_/X _17730_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_14965_ _14965_/X _14962_/X _15226_/B _15509_/A1 _14964_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_261_5556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_4980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_3233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output416_A _13879_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1060 VPWR VGND wire1060/X wire1060/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16207__A1 _29250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_2278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3957_A _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3080 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20003__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17404__B1 wire2023/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17613__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16704_ VGND VPWR _16918_/S _29327_/Q _28765_/Q _16704_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19944__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13916_ _28581_/Q _13916_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_263_751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4031_A _28673_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1093 VPWR VGND _15226_/B wire1093/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_17684_ VGND VPWR _17720_/S _17683_/X _17638_/X _17685_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_1517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14896_ _16798_/A2 _15607_/A1 _28917_/Q _14896_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_225_3228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17840__C _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4129_A _28552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17955__A1 wire3903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16758__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15415__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27766__B_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4828 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21751__A2 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21135__S _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31701_ _31701_/Q _31750_/CLK _31701_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19423_ _19422_/X wire3429/X hold286/A _19421_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_122_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16635_ _29675_/D _16606_/X _16634_/Y wire903/X _16615_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_56_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15641__B _15641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13847_ _29819_/Q _22141_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__14769__B2 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14538__A _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24150__B1 _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26690__A2 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31632_ _31632_/Q _31894_/CLK _31632_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19354_ _19354_/X _19351_/X wire1900/A _19353_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_125_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1214_A wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16566_ VGND VPWR _16566_/S _29605_/Q _29637_/Q _16566_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13778_ _31168_/Q _13778_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20974__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18904__A0 _28250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22161__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22700__A1 _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18952__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18305_ _18305_/Y _18223_/B _29341_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_260_1739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15517_ VGND VPWR _15517_/X _15516_/X _15515_/X _15517_/A1 _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20711__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15718__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19285_ _19379_/B _27916_/Q _19284_/X _19285_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31563_ _31563_/Q _31563_/CLK _31563_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_load_slew3104_A _26102_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16497_ VGND VPWR _16826_/S _29024_/Q _28992_/Q _16497_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18444__S _18449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18380__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26442__A2 _26446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28346__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18236_ _29750_/Q _18163_/B wire3712/X _18236_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 X_30514_ _30514_/Q _31927_/CLK _30514_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24989__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15448_ _15448_/X _32065_/Q _15447_/X _15723_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_258_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_3565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16391__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31494_ _31494_/Q _31563_/CLK _31494_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_4938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22059__A3 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24453__A1 wire1651/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25650__B1 _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21267__A1 _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2615_A _19504_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_2347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14941__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30445_ VGND VPWR _30445_/D _30445_/CLK _30445_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_69_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18167_ VGND VPWR _18222_/S _28081_/Q _27234_/A0 _28081_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15379_ _15761_/A2 _15379_/X _15378_/X _15368_/S _32434_/Q _15759_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_9_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21806__A3 _17052_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14273__A _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18132__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_4020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30449__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_2058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17118_ _22512_/A2 _30002_/Q _17117_/X _17118_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16143__A0 _28750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold404 hold404/A hold404/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_119_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold53_A hold53/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27058__A _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold415 hold415/A hold415/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_30376_ _30376_/Q _30385_/CLK _30376_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18098_ VGND VPWR _18113_/S wire3878/X _28027_/Q _28027_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_119_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19880__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold426 hold426/A hold426/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17340__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24205__B2 wire3643/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold437 hold437/A hold437/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__28496__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold448 hold448/A hold448/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32115_ _32115_/Q _32115_/CLK _32115_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_1802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17049_ VGND VPWR wire886/A _17048_/X _17047_/X _30381_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1750_A _23236_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16694__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold459 hold459/A hold459/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__24756__A2 _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25953__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29741__CLK _29782_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23964__B1 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire834_A wire834/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27492__S _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20060_ _20060_/X _20654_/D _20060_/A _24118_/C _20654_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_132_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32046_ _32046_/Q _32113_/CLK _32046_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_4479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26112__D _26112_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20214__S _20218_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout928 _16825_/S _16249_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_214_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30599__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout939 fanout941/X _16928_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_262_5309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25705__A1 _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31844__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_255_core_clk _31917_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_167_3418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22519__A1 _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16997__A2 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21990__A2 _17183_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23525__S _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29891__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24210__A _24210_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23752__C _31773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21727__C1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18619__S _18624_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23192__A1 hold395/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27458__A1 _32287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22649__B _22649_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23192__B2 _30116_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_5017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23750_ _23749_/Y _31768_/Q _23750_/A _23743_/Y _26595_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XANTENNA__23731__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20962_ VGND VPWR _20980_/S _30168_/Q _29427_/Q _29427_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_3317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25025__B _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_1617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3229_A _30328_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16749__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17946__A1 wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15406__C1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27553__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22701_ _22700_/X _21463_/C _22779_/A1 _29882_/Q _22727_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_260_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31994__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26130__A1 _17879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_2665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19023__B _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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XFILLER_243_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26137__A _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23260__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25041__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25351_ VGND VPWR _25351_/X _25346_/Y _25363_/D _25350_/A _25408_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_178_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20702__A0 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15709__B1 _15543_/S VGND VPWR VPWR VGND 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XANTENNA__27091__C1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26433__A2 _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24302_ VGND VPWR _30952_/D _24308_/B _31604_/Q _26386_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__25398__D _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27630__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21514_ _21516_/C _21514_/B _30355_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_28070_ _28070_/Q _30451_/CLK _28070_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27667__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29271__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25282_ _31259_/D _25280_/X _25595_/A _25281_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__16382__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24444__A1 _14367_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22494_ VGND VPWR _22512_/A3 _22510_/A4 _22510_/A2 _22494_/X _30008_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_241_1672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16921__A2 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_3687 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_5282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27021_ _27027_/D _31991_/D _27028_/A _27021_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_max_length1715_A _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24233_ VGND VPWR _24239_/S _30909_/Q _27701_/A1 _30909_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14932__A1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28839__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21445_ VGND VPWR _21655_/A _21441_/Y _21419_/D _21447_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_237_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24995__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14183__A _14183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18123__A1 wire3910/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_172_3102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19320__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26197__A1 _31587_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27394__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_72 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24164_ _24164_/X _24186_/A3 _19927_/X _28640_/Q _31118_/Q _24165_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__31374__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16134__B1 wire901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21376_ _21789_/A _21378_/C _21378_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__26197__B2 _32277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_4494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22604__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22470__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16685__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19185__S _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23115_ _23115_/B _23061_/B _23145_/A _23115_/X _23115_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_253_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20327_ VGND VPWR _20327_/S _27710_/A1 _28868_/Q _28868_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_189_5056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3932_A _29726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28972_ _28972_/Q _32291_/CLK _28972_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24095_ _24095_/X _20128_/B wire4115/X _28729_/Q _24188_/A2 VGND VPWR _24087_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_235_2155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16602__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3902 wire3902/X hold311/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_hold394_A hold394/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14696__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22758__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3913 _29842_/Q wire3913/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_63_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32602__A _32602_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_5643 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15893__C1 _15888_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3924 VPWR VGND _21289_/C _29735_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_2860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23955__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28989__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27146__A0 _32052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23046_ VGND VPWR _23056_/S _30156_/Q _23045_/X _30156_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3935 VPWR VGND _23135_/B _29724_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27923_ _27923_/Q _28342_/CLK _27923_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20258_ VGND VPWR _20258_/S _28801_/Q wire1783/A _28801_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19623__A1 _28479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3946 VPWR VGND _17228_/A wire3946/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21447__C _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16437__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27697__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17634__B1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_34_1_core_clk clkbuf_opt_34_1_core_clk/X clkbuf_opt_34_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_277_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27854_ _25810_/B _27854_/B _32550_/D _27854_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_150_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2064_A wire2065/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20189_ wire877/X _24953_/B _20189_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__26957__D _26961_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input147_A la_input[77] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_49_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16988__A2 _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_2896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21981__A2 _17172_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26805_ _26805_/Y _26870_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__24904__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14999__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2520 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28219__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27785_ VGND VPWR _27792_/S _25023_/B _32509_/Q _32509_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_131_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24997_ _25681_/B1 _24996_/X _25017_/A2 _31142_/Q _31142_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21718__C1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18529__S _18532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25711__A4 _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27449__A1 _32281_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29524_ _29524_/Q _31577_/CLK _29524_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_180_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14750_ _16415_/A2 _15607_/A1 _29557_/Q _14750_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_92_3125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26736_ _26736_/Y _31783_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__21463__B _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21194__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23722__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23948_ _20126_/A _23947_/X _28715_/Q _24192_/A2 _23948_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_141_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_3324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17937__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_57_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_800 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21733__A2 _21645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_811 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_23_0_core_clk clkbuf_5_23_1_core_clk/A clkbuf_5_23_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__22930__B2 _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22278__C _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29455_ _29455_/Q _32113_/CLK _29455_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_822 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14681_ _16798_/A2 _15607_/A1 _30774_/Q _14681_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26667_ _26637_/B _31790_/D _26665_/X _26218_/A _31895_/Q _26666_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__17401__A3 _30878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_833 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3971 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23879_ _23879_/A _23879_/B _23879_/C _23879_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_278_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14358__A _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_844 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19139__B1 _19143_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20988__A_N _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15412__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_855 wire4107/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24132__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16420_ _16817_/A2 _16817_/A1 _29472_/Q _16420_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28406_ VGND VPWR _28406_/D _32379_/CLK _28406_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26672__A2 _26668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_866 wire4124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25618_ VGND VPWR _25619_/C _25571_/C _25578_/X wire3532/X _31375_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_122_4247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_877 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29386_ _29386_/Q _32075_/CLK _29386_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20794__S _20796_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26598_ _26597_/X _26694_/C wire3454/X _31878_/Q hold207/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14620__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_888 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29614__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25880__B1 _24582_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_899 wire4152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16351_ _16387_/A _16387_/C _29020_/Q _16351_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_35_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_3603 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28337_ _28337_/Q _30404_/CLK _28337_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_59_core_clk _32548_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_55_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22694__B1 _29731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25549_ _31335_/Q _25548_/Y _31352_/D _31352_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__18264__S _18317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23891__C1 _23890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2698_A hold137/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17165__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18362__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15302_ _16798_/A2 _15607_/A1 _29184_/Q _15302_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_fanout3538_A _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27621__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19070_ VGND VPWR _19070_/X _19306_/B _19047_/S _28357_/Q _19069_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__15176__A1 _15598_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16282_ _16282_/X _16272_/Y wire912/A _16268_/Y _16276_/Y _16281_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_272_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28268_ _28268_/Q _30027_/CLK _28268_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15176__B2 _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24435__A1 _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31717__CLK _31722_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17570__C1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_3057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21249__A1 _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18021_ VGND VPWR _18047_/S wire3916/X _27953_/Q _27953_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2266 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_2946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15233_ _15233_/X _28758_/Q wire1189/X wire1506/X _15233_/B1 _15232_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_155_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27219_ VGND VPWR _25773_/C _32102_/Q _27280_/C _27219_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__14923__A1 _28782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_3923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28199_ _28199_/Q _30431_/CLK _28199_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14093__A _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2865_A _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_4389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_core.RAM128_Di0[31] hold113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29764__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18114__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_3081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_155_4067 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22997__A1 _22996_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30230_ _30230_/Q _30230_/CLK _30230_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15164_ _15605_/A2 _15164_/X _15163_/X _15638_/B1 _29534_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_191_4982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_1808 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_1977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19862__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput509 wire4042/X la_output[120] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17322__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20823__A _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23837__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_88_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24199__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14115_ _21632_/A _29883_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_120_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17873__B1 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30161_ _30161_/Q _30217_/CLK _30161_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30741__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19972_ _19971_/X _28634_/Q _28634_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15095_ _15095_/X _29469_/Q _15094_/X _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_155_3399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31867__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16512__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_307_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4079_A wire4080/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22749__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3232 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23946__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22749__B2 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25825__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18923_ _18916_/X wire1896/A wire1905/X _18918_/X _18923_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_14046_ _29974_/Q _14245_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_168_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30092_ _30092_/Q _30382_/CLK _30092_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_output533_A _31118_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26510__A _26510_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17554__D _17576_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16428__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15128__S _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27688__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18854_ _18854_/X _19346_/D1 _28248_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__23961__A3 _23960_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14439__B1 _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20969__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_1741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_898 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21972__A2 _17172_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18947__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30891__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17805_ _17805_/X _17873_/B1 _31724_/Q _31728_/Q _17874_/A2 VGND VPWR _17804_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_3_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25126__A _25136_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26360__A1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output700_A wire3518/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18785_ VGND VPWR _28148_/Q _28116_/Q _19271_/S _18785_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_248_4496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29144__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15997_ _16447_/A2 _16447_/A1 _30892_/Q _15997_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18439__S _18452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19378__B1 wire1930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_3724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24371__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15651__A2 _15650_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19917__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18666__C _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17736_ _17874_/A2 _31718_/Q _17735_/X _17736_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21185__A0 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24910__A2 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23713__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14948_ _16417_/A2 wire3298/X _29249_/Q _14948_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_224_902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30994_ _30994_/Q _31375_/CLK _30994_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_3637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17928__A1 _29850_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25560__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15939__B1 wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30121__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2712 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20932__A0 _29500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17667_ _17873_/B1 _31716_/Q _17666_/X _17667_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__31247__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14879_ _14878_/X _15630_/A1 _15621_/A2 _29013_/Q _14879_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_92_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15403__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24684__B _31469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2909 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19406_ VGND VPWR _19406_/S _27154_/A1 _28422_/Q _28422_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26663__A2 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16618_ _16878_/A2 _16878_/A1 _28859_/Q _16618_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_147_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29294__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19778__B _19778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17598_ VGND VPWR _17598_/X _17873_/B1 _17783_/B2 _31710_/Q _17597_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_144_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25871__B1 _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15798__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21488__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19145__A3 _19144_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31615_ _31615_/Q _31726_/CLK _31615_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19337_ _19334_/X _19273_/S _19336_/X _19337_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_287_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_53_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16549_ _16781_/A2 _16549_/X _16841_/A2 wire1450/A _14104_/Y _28424_/Q VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_88_3706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18353__A1 wire3851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1798_A _17389_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17156__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27073__C1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27612__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13900__A _28597_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30271__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15167__A1 _15507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27487__S _27503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_4882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31397__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31546_ _31546_/Q _31547_/CLK _31546_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19268_ VGND VPWR _19268_/S wire1813/X _19266_/X _19268_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20209__S _20209_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24426__B2 wire2296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16903__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_346_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_3490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26820__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18219_ _18163_/B wire3712/A _18218_/X _18269_/B _18219_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_255_4467 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14914__A1 _28090_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_2650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24977__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19199_ _19191_/X _19198_/X wire1905/X _19193_/X _19199_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire1965_A _18982_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31477_ _31477_/Q _31577_/CLK _31477_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18105__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19302__B1 wire1939/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire951_A wire951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27886__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21230_ _23365_/S _29692_/Q _29692_/D _23231_/C _20846_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__26404__B _31690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30428_ VGND VPWR _30428_/D _30428_/CLK _30428_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_47_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold201 hold201/A hold201/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_195_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20999__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17459__A3 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19853__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold212 hold212/A hold212/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_138_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_1465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_3176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23747__C _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold223 hold223/A hold223/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_12_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_3187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold234 hold234/A hold234/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_5529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26123__C _26123_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21161_ VGND VPWR _21167_/S _29604_/Q _27254_/A0 _29604_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17864__B1 _17879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold245 hold245/A hold245/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_173_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3081_A _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30359_ _30359_/Q _30359_/CLK _30359_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21548__B _21548_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold256 hold256/A hold256/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_214_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3179_A _17905_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16131__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold267 hold267/A hold267/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_2104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_2727 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold278 hold278/A hold278/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20112_ VGND VPWR wire2721/X _26866_/A1 _20124_/A _20112_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__23937__B1 _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold289 hold289/A hold289/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_21092_ VGND VPWR _21092_/S _27624_/A1 _29543_/Q _29543_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_168_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_3073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_3531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23401__A2 _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2508 VPWR VGND _20747_/S _20752_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25962__C _26837_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_5253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21948__C1 _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_2470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27679__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24920_ _25703_/A _24919_/Y _24950_/A2 _31104_/Q _31104_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15890__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32029_ _32029_/Q _32275_/CLK _32029_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20043_ _25567_/B _20042_/Y wire847/X _24124_/A1 _28668_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_41_2323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_2_3_0_core_clk_A clkbuf_2_3_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19081__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1807 VPWR VGND wire1807/X wire1808/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout758 _24819_/Y _24820_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20879__S _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1818 VPWR VGND wire1818/X _18798_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_80_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26887__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21963__A2 _21940_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32022__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23255__S _23255_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_234_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21564__A _21564_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24851_ _24464_/C _31070_/D _25109_/B _24850_/Y wire863/X wire2253/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA_max_length1498_A wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_5562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18349__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19369__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24362__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15642__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23802_ _23802_/X wire1609/X _31845_/Q _19710_/B _31877_/Q _23808_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_227_4569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19908__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27570_ VGND VPWR _27594_/B _27569_/X _27568_/X _27570_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21176__A0 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24901__A2 _19543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23704__A3 _19787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24782_ _26164_/A _24782_/Y _25934_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__14850__A0 _29076_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21994_ wire3922/X hold268/A _21994_/X _21999_/S1 _21659_/A _17172_/X hold255/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__17919__A1 wire3917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28511__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21715__A2 _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22912__A1 _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_107 _19046_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_2842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22912__B2 _22878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26521_ _31745_/Q _31746_/Q _31747_/Q _26523_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27300__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26103__A1 _14305_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_118 _21929_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26793__C _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23733_ _31570_/Q _26017_/A _23733_/X _31522_/Q _24188_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20923__A0 _29491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_129 _22586_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20945_ VGND VPWR _20947_/S _29410_/Q _29513_/Q _29410_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20668__A2_N _19776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20104__C_N _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1473_A wire1477/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32172__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24114__B1 wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_385_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24594__B _31549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27851__A1 _32549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29240_ _29240_/Q _32421_/CLK _29240_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26654__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_Di0[4] wire2336/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25311__C1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26452_ _26453_/C _26441_/A _26442_/Y _26441_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_243_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2788 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23664_ VGND VPWR _23669_/S _27702_/A1 _30794_/Q _30794_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold142_A hold142/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19688__B _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20876_ VGND VPWR _20876_/S _30236_/Q _29398_/Q _20876_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24665__A1 _24666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23012__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22125__C1 _22124_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30614__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14602__B1 _29585_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22395__A _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_1111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25403_ _31282_/Q _31284_/Q _31283_/Q _25402_/D _25404_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_208_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22615_ _22615_/X wire3700/X _22618_/A1 _22578_/S _30365_/Q VGND VPWR _22614_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_238_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29171_ _29171_/Q _32401_/CLK _29171_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22676__B1 _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3882_A wire3883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26383_ _26382_/X _31679_/Q _31679_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_178_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28661__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18084__S _18085_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1640_A wire1643/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23595_ VGND VPWR _23595_/S _23671_/A1 _30515_/Q _30515_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_30_4152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18344__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17147__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22140__A2 wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27603__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13810__A _31136_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28122_ _28122_/Q _30758_/CLK _28122_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_30_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15158__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25334_ _31269_/Q _31270_/Q _25350_/D _25334_/D _31268_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA__27397__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22546_ VGND VPWR _22550_/S _29835_/Q hold260/A _30046_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_69_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20151__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16355__B1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_122_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18895__A2 wire1403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25614__B1 _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_3328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28053_ _28053_/Q _28216_/CLK _28053_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14905__A1 _29527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3046_A _18152_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25265_ _25265_/X _25578_/C _31042_/Q _25430_/A _25416_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_69_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24968__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30764__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22477_ wire3112/A _22476_/X _22513_/A2 _17095_/X _29999_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14905__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25090__A1 wire1301/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29017__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27004_ _31985_/Q _27003_/Y _31985_/D _27000_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_152_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24216_ VGND VPWR _24234_/S _30892_/Q _24216_/A0 _30892_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_5_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21428_ _21664_/C _21464_/B _21428_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__16107__B1 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21100__B1 _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19844__A1 _28574_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25196_ _24490_/Y _25196_/Y _25261_/B1 _25263_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21bai_2 XFILLER_237_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3604 _19551_/A _19573_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_215_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_1869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26033__C _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3615 _30762_/Q wire3616/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_286_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_273_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24147_ _24147_/X _20128_/B wire4111/X _28734_/Q _24188_/A2 VGND VPWR _24139_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_210_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21359_ _21360_/C _21360_/B _21360_/A _21379_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_117_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14669__A0 _28743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_177_core_clk _32431_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_4_4017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20362__B _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_1841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23928__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3710 VPWR VGND wire3710/X _30335_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2914 _20453_/X _20471_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3721 _18328_/A _18316_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_115_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_5_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27119__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24078_ _24078_/X _20673_/D _30653_/Q _30717_/Q wire1633/A VGND VPWR wire1257/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28955_ _28955_/Q _30503_/CLK _28955_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25393__A2 _25402_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24196__A3 _19993_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24050__C1 wire1259/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3732 VPWR VGND wire3732/X _30321_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xclkbuf_leaf_106_core_clk _32421_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28041__CLK _28363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2936 VPWR VGND _20315_/S _20295_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_2840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29167__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3743 VPWR VGND _23170_/B _23115_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14360__B _14360_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31593__D _31593_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_3604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17607__B1 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2958 VPWR VGND _18654_/S _18626_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24769__B _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_5605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15920_ VGND VPWR wire969/X _32045_/Q _29104_/Q _15920_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15881__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23029_ VGND VPWR _23028_/X _23027_/X _31395_/Q _23029_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_27906_ _27906_/Q _30385_/CLK _27906_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_150_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22600__B1 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19072__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26687__D _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28886_ _28886_/Q _32134_/CLK _28886_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3787 VPWR VGND _20979_/S _20964_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_277_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15618__C1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3798 _21389_/D _21588_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_248_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17083__A1 _29886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17083__B2 _21616_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15851_ VGND VPWR _15850_/X wire1032/X _15851_/X _16040_/A2 _15848_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA__26342__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27837_ VGND VPWR _25804_/A _32542_/Q _27844_/C _27837_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_20_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30144__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15094__B1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16989__A2_N wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23156__A1 _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_4208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24353__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16830__A1 wire1048/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14802_ _15575_/C _15235_/A1 _29245_/Q _15223_/A _14802_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26984__B _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_3973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26893__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32515__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18570_ VGND VPWR hold360/A _18570_/X _18569_/X _18554_/B _30450_/Q _23238_/B VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XANTENNA__21167__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28191__CLK _30410_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_3361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15782_ _28395_/Q _23372_/S _14544_/D _15782_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_128_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27768_ VGND VPWR _27774_/S wire2248/A _32494_/Q _32494_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26476__S _26476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17521_ _26539_/A _17521_/X _24817_/A _26509_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_4 X_29507_ VGND VPWR _29507_/D _30250_/CLK hold353/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_283_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14733_ VGND VPWR _14935_/S _32046_/Q _29105_/Q _14733_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26719_ _26718_/Y _27003_/B1 _31812_/Q hold431/A _31812_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_229_1033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30937__D _30937_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14088__A _29698_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27699_ VGND VPWR _27701_/S _27699_/A1 _32433_/Q _32433_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18783__A _30255_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_630 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17386__A2 _31922_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24105__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_641 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27842__A1 _32544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26645__A2 _26662_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_2081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17452_ _17452_/A _24820_/A _31050_/Q _17452_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA_652 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29438_ _29438_/Q _30390_/CLK _29438_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30294__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14664_ _14817_/A2 _14664_/X _14663_/X _14823_/A1 _32415_/Q wire1508/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_663 wire2440/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20390__A1 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16594__B1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19598__B _20100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23003__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_674 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_685 _30319_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16403_ VGND VPWR _16403_/X _16400_/X _16402_/X _16930_/A1 _16727_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_126_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_696 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17383_ _27006_/A _17383_/B _17383_/C hold10/X hold11/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 X_29369_ _29369_/Q _30470_/CLK _29369_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14595_ _14596_/B _14823_/C1 _14592_/X _14594_/X wire1081/X _14590_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_204_2942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18335__A1 wire3916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22131__A2 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19532__B1 _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31400_ _31400_/Q _32412_/CLK _31400_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19122_ _19202_/B _28359_/Q _19121_/X _19122_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_16334_ _16333_/X _16736_/S wire992/X _32427_/Q _16334_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_100_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32380_ _32380_/Q _32417_/CLK _32380_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20142__A1 wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16346__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18886__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17543__C1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26948__A3 _26946_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26802__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22419__A0 _22014_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19053_ _19179_/A2 _27873_/Q wire1942/A _19053_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31331_ _31331_/Q _32564_/CLK _31331_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24959__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16265_ VGND VPWR _16842_/S _29220_/Q _29284_/Q _16265_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30672__D _30672_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_5540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4196_A wire4196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18099__A0 _28028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18004_ VGND VPWR _18015_/S _18644_/A1 _27938_/Q _27938_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_3122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15216_ _15211_/X _15207_/X wire1085/A _15215_/X _15216_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__24423__A4 _24420_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21649__A _21649_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31262_ _31262_/Q _31923_/CLK _31262_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23092__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16196_ _16725_/A _16952_/A1 _29595_/Q _16196_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19835__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output650_A wire2381/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[14] wire2382/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22244__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_3032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput306 _13959_/Y la_iena[53] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_100_2984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16649__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2148 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput317 _13949_/Y la_iena[63] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30213_ _30213_/Q _30483_/CLK _30213_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21642__A1 _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17846__B1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15147_ VGND VPWR _15627_/S _28419_/Q _29084_/Q _15147_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25908__A1 _31471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput328 _14003_/Y la_iena[73] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire1281_A _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21642__B2 _29877_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31193_ VGND VPWR _31193_/D _31547_/CLK _31193_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xoutput339 _13993_/Y la_iena[83] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_6_4849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17565__C _17565_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16113__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17310__A2 _31910_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26030__B1 wire2412/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23919__B1 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32045__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_2979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30144_ _30144_/Q _30403_/CLK _30144_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23864__A _23864_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19955_ VGND VPWR wire1317/X wire2302/A _19955_/A2 _19955_/X _25867_/A _19973_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 X_15078_ _15078_/X _15640_/C1 _15071_/X _15073_/X _15319_/B _15077_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__26581__A1 _31842_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26240__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22198__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4848 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_2621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_3696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15872__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18906_ VGND VPWR _18906_/S _18905_/X _18904_/X _18906_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14029_ _28468_/Q _14029_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_0_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_1947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_2962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30075_ hold126/A _32293_/CLK _30075_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23934__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1040 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19886_ VGND VPWR wire2203/X _26694_/D _24046_/B1 _19886_/X _26139_/A wire1386/X + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_133_2760 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20699__S _20719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_4812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_1051 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28534__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21945__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17074__A1 _29690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26869__C1 _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1062 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27770__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_2383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_4550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18271__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27530__A0 _27528_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18837_ _19374_/B wire4160/X _18836_/X _18837_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_267_4894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold16_A hold16/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18810__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32195__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24344__B1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15624__A2 _15435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16821__A1 _16821_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21158__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18768_ wire1398/X _23523_/S _18757_/X _19382_/A1 _18768_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 XFILLER_75_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14245__C_N _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24895__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23698__A2 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30637__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24695__A _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18023__A0 _27955_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_1734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17719_ VGND VPWR _17832_/S _17718_/X _17695_/X _17719_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20905__A0 _29381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19789__A _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30847__D _30847_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18699_ _18699_/X _19069_/D1 _28241_/Q _19069_/B1 _19368_/A2 _18770_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_205_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28684__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30977_ _30977_/Q _32282_/CLK _30977_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_149_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_3134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17377__A2 _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22370__A2 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27833__A1 _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26636__A2 _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25439__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_3276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20730_ VGND VPWR _20752_/S wire2002/X _29245_/Q _29245_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_247_1166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15388__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_4136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire999_A wire999/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20381__A1 _25031_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25303__B _25341_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22419__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_4166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_5_3_1_core_clk clkbuf_5_3_1_core_clk/X clkbuf_5_3_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_144_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20661_ _20661_/X wire1875/X _19646_/B _25752_/C _31407_/Q _19857_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__21550__C _30351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30787__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25022__C _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18326__A1 _18249_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19523__B1 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22400_ VGND VPWR _22405_/S hold193/A _21811_/X _29957_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23380_ VGND VPWR _23380_/S _30358_/Q _29676_/Q _30358_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20133__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20592_ VGND VPWR _20605_/S _27685_/A1 _29107_/Q _29107_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27597__B1 _32340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32578_ _32578_/Q _32578_/CLK _32578_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length3718 _18278_/A _20453_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__18877__A2 wire1993/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14445__B _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27061__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22331_ _29915_/D wire3160/A _30454_/Q _29915_/Q _22338_/B VGND VPWR _22330_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__20684__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31529_ VGND VPWR _31529_/D _31547_/CLK _31529_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_121_2163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18632__S _18658_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25072__A1 _31179_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30017__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1054_A wire1060/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14899__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16352__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_4_core_clk _31970_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_25050_ _25076_/C1 _25049_/X _25082_/A2 _31168_/Q _31168_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_86_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22262_ VGND VPWR _29837_/D _22092_/B _23415_/C _29837_/Q _22261_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23083__B1 _23082_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15560__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19826__A1 _28565_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24280__C1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21228__A4 _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28064__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24001_ wire4123/X _20128_/B _23992_/X _28720_/Q _24001_/X _24188_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_255_2851 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21213_ VPWR VGND _29652_/D _23354_/C _21213_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_138_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22193_ VGND VPWR _22207_/D _29828_/Q _22135_/A _22193_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire3463_A _31667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14461__A _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_270_core_clk _31921_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__16104__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26021__B1 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17301__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19841__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3017 VPWR VGND _18433_/S _18432_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_119_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15312__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21144_ VGND VPWR _21169_/S _29587_/Q _27489_/A1 _29587_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23774__A _31792_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26572__A1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25375__A2 _25388_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24032__C1 _24024_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_4178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30167__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22189__A2 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23386__A1 _30364_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2305 _26687_/D wire2305/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_25_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1509 wire1521/X _15638_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_227_5001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24589__B _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24583__B1 _24582_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2316 VPWR VGND wire2316/X _14274_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15863__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3630_A _30750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31412__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28740_ _28740_/Q _31798_/CLK _28740_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_25_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32538__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21075_ VGND VPWR _21094_/S _27242_/A0 _29526_/Q _29526_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25952_ _31524_/Q _31490_/Q _31555_/Q _25934_/C _25952_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire2327 VPWR VGND wire2327/X wire2327/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23925__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_73 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19054__A2 _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21397__B1 _21389_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3728_A wire3729/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2338 wire2339/X wire2338/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19690__C _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2349 VPWR VGND wire2349/X wire2350/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_147_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1604 VPWR VGND _24118_/C _19993_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17065__A1 hold394/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18587__B _22553_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24903_ _24903_/Y _24955_/A _19546_/B _19617_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__27680__S _27696_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20026_ VGND VPWR _14170_/Y _19792_/A wire851/X _20026_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__21294__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_3225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18262__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27521__A0 _32197_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26324__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1626 _19787_/X _19858_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28671_ _28671_/Q _31462_/CLK _28671_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_132_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20402__S _20414_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1637 VPWR VGND _19760_/B _19776_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18801__A2 _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25883_ _26242_/A _25882_/Y _25881_/X _31459_/Q _31459_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_284_2502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18079__S _18079_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1590_A _20651_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout946_A wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27901__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15615__A2 _15615_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24335__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13805__A _31141_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27622_ VGND VPWR _27626_/S _27702_/A1 _32364_/Q _32364_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_3056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26875__A2 _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21149__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5212 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24834_ _24442_/C _31061_/D _26544_/C1 _24833_/Y wire868/A _24454_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_273_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_5392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23689__A2 _24273_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24886__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22346__C1 _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18014__A0 _27948_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31562__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15091__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27553_ _25641_/B _32160_/Q _27553_/X _25641_/A _32152_/Q _32168_/Q _32144_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_261_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24765_ _24771_/B _31462_/Q _31461_/Q _24770_/A _24762_/X _24763_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_249_1965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30757__D _30758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21977_ wire3922/X hold266/A _21978_/A _21999_/S1 _21672_/A _21501_/A hold428/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_180_3234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_4533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_20 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4664 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22361__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26627__A2 _31779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26504_ VGND VPWR _31740_/Q _31741_/Q _31742_/Q _26504_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_279_5466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22992__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26309__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_31 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23716_ _23717_/A _23715_/X wire1875/X _31469_/Q _24273_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_226_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_42 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20928_ VGND VPWR _20928_/S _29393_/Q wire3978/X _29393_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27484_ VGND VPWR _27484_/S _32300_/Q _27483_/X _32300_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24099__C1 wire1255/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15379__B2 _15759_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2027_A _17369_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24696_ _31472_/Q _31471_/Q _31470_/Q _24680_/A _31473_/Q _24697_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_230_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_3952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_1971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21233__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16040__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29223_ _29223_/Q _32125_/CLK _29223_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_201_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_145_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_75 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26435_ _26476_/S _26435_/A _26435_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__26028__C _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24102__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_86 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23647_ VGND VPWR _23666_/S _23647_/A1 _30777_/Q _30777_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_3029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20859_ VGND VPWR _22551_/S _20858_/X _29358_/Q _29358_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_5021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29154_ hold485/A _32359_/CLK _29154_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27588__A0 _32268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14380_ _31014_/Q _14388_/B _31015_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_26366_ VGND VPWR _26949_/B _24273_/D wire2194/X _26366_/X _27091_/C1 _26376_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__16328__B1 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23578_ VGND VPWR _23588_/S _27247_/A0 _30498_/Q _30498_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18868__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire901 wire901/X wire904/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_196_2006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22853__A _22871_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire912 VPWR VGND wire912/X wire912/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_67_3609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28105_ _28105_/Q _30911_/CLK _28105_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire923 VPWR VGND wire923/X wire923/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_256_3327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28407__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25317_ _31266_/D _25315_/X _26242_/A _25316_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25599__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22529_ VGND VPWR _23523_/S _29818_/Q _30029_/Q _30029_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29085_ _29085_/Q _32357_/CLK _29085_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26297_ VGND VPWR wire2679/X _19503_/A _26301_/B _26297_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_6_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_358_core_clk _31959_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_87_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3236_A _14103_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16050_ wire985/A _16050_/X _16049_/X _16068_/S _29591_/Q _16832_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28036_ _28036_/Q _29550_/CLK _28036_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32068__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25248_ _26242_/A _25247_/X _25264_/A2 hold74/A _31248_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input75_A la_input[127] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19817__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire989 wire989/A wire989/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_216_5494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24271__C1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20373__A wire836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23613__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24810__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15001_ _15001_/X _15760_/B1 _15521_/S _29112_/Q _15748_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_273_3685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_5396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_3366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26979__B _31974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22821__B1 _30469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25179_ _31218_/Q _31220_/Q _31219_/Q _25180_/D _25181_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_30_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19293__A2 _19285_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22999__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3403_A wire3427/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3423 VPWR VGND _26764_/A wire3429/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_4302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28557__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21619__D _21619_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24169__A3 _24168_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16500__B1 _16500_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15303__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29802__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29987_ _29987_/Q _30406_/CLK _29987_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26563__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23377__A1 _30355_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3478 VPWR VGND wire3479/A _25693_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__31092__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_2034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24499__B _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19740_ _19760_/B wire1376/A _25043_/B _19740_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA_wire2730_A wire2731/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16952_ _16725_/A _16952_/A1 _28868_/Q _16952_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28938_ _28938_/Q _32442_/CLK _28938_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32212__D _32212_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3562 VPWR VGND wire3562/X wire3562/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21388__B1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3573 VPWR VGND wire3573/X _30871_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2777 VPWR VGND _27706_/S wire2781/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23834__D _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17056__A1 _17052_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3584 VPWR VGND wire3584/X _30861_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18253__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2788 _27598_/X _27626_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_267_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27590__S _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15903_ VGND VPWR _15904_/B wire933/X wire1043/X _15900_/X _15902_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_max_length3964_A _22427_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3595 VPWR VGND wire3595/X _30855_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_265_621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_1967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19671_ wire3331/A _19670_/Y _19695_/A2 _28496_/Q _28496_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2861 VPWR VGND wire2861/X _21173_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20312__S _20321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31905__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16883_ VGND VPWR _16918_/S _28433_/Q _29098_/Q _16883_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28869_ _28869_/Q _32398_/CLK _28869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_169_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2872 _21077_/S _21094_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__15067__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3772_A _30085_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26706__A_N _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16803__A1 wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24326__B1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18622_ VGND VPWR _18622_/S _18239_/B _28336_/Q _28336_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_111_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30900_ _30900_/Q _30900_/CLK _30900_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26866__A2 wire2678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15834_ _15834_/X _29240_/Q _16150_/A2 _16150_/A3 wire933/X _15833_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__29952__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_3118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31880_ _31880_/Q _32017_/CLK _31880_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24877__A1 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22337__C1 _22336_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14814__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18553_ _23393_/B _18553_/C _18553_/A _18553_/B _18553_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_30831_ _30831_/Q _32427_/CLK _30831_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25404__A _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_74_core_clk _31796_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_15765_ VGND VPWR _15765_/X _15765_/B _15765_/A _18661_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__30667__D hold254/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_1799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17359__A2 _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22747__B _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26618__A2 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17504_ _26509_/C _31056_/Q _17504_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XFILLER_124_3416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14716_ wire1533/X _14816_/A1 _29620_/Q _14716_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire4111_A wire4111/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21651__B _21651_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30762_ _30762_/Q _32282_/CLK _30762_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18484_ VGND VPWR _18497_/S wire3860/X _28257_/Q _28257_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16567__B1 _32130_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15696_ VGND VPWR _15696_/X _15693_/X _15744_/B1 _15752_/B1 _15695_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_221_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_460 wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24629__B2 _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output698_A _17915_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21143__S _21151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_471 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32501_ _32501_/Q _32527_/CLK _32501_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17435_ _30956_/Q _30990_/Q _30884_/Q _30850_/Q _17248_/X _17435_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XANTENNA_482 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14647_ VGND VPWR _14647_/X _14644_/X _15631_/A1 _15235_/A1 _14646_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_260_392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_493 wire707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30693_ _30693_/Q _31462_/CLK _30694_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14546__A _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23301__A1 _23301_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24962__B _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32432_ _32432_/Q _32432_/CLK _32432_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_18 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20115__A1 _28703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22185__D _22185_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23859__A _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17366_ VGND VPWR _26974_/B _17365_/X _29857_/D _17245_/X _32277_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA__16319__B1 wire902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14593__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_29 _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15790__A1 _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14578_ wire1533/X _14816_/A1 _28805_/Q _14578_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18859__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28087__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14265__B _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2450 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19105_ _23529_/S _19104_/X _19094_/X wire1883/X _19105_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_67_5589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16317_ wire995/X _16317_/X _16316_/X _16949_/A1 _29019_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_217_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_4852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_2813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32363_ _32363_/Q _32569_/CLK _32363_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29332__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17297_ _30967_/Q _17297_/Y _30933_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__25054__A1 _31170_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18452__S _18452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1496_A _14547_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17531__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19036_ _19202_/B _28032_/Q _19035_/X _19036_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31314_ _31314_/Q _31317_/CLK _31314_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27765__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16248_ VGND VPWR _16826_/S _28849_/Q _28881_/Q _16248_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14345__A2 _21550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19808__A1 _28556_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17576__B _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32294_ _32294_/Q _32294_/CLK _32294_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23604__A2 _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_3747 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31245_ hold136/A _32287_/CLK _31245_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__31435__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1663_A _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_2049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16179_ VGND VPWR _16180_/B _16722_/C1 wire1038/X _16178_/X _16177_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19284__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26003__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19823__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29482__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire747_A wire747/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17295__B2 _17295_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2897_A _20613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26554__A1 _31760_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25357__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31176_ _31176_/Q _32543_/CLK _31176_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_113_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23368__A1 _30346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19283__S _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15845__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30127_ _30127_/Q _30482_/CLK _30127_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19938_ _25676_/B1 _19937_/X _19988_/A2 _28617_/Q _28617_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_135_2888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19036__A2 _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_3759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17047__A1 _17043_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31585__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26306__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30058_ hold167/A _32568_/CLK _30058_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22040__B2 wire2848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_1788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20222__S _20227_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19869_ _19868_/X _28584_/Q _28584_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__15058__B1 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17598__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16255__C1 _15775_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21900_ _21900_/A _21900_/X _21900_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_206_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_4263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26857__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_4_4_0_core_clk clkbuf_5_9_0_core_clk/A clkbuf_4_5_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_146_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22880_ VGND VPWR _30109_/Q _22878_/Y _22879_/X _30109_/D _22938_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA_wire3044_A _18151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19935__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24868__A1 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_2243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14805__B1 wire1074/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22938__A _30116_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23533__S _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16270__A2 _14104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21831_ _21820_/B _21449_/A _21436_/X _21831_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24856__C _24856_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1196_A _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18627__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18547__A1 _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22343__A2 _14365_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23540__A1 hold421/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26609__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3211_A _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24550_ _31041_/Q _31042_/Q _31043_/Q _24551_/B _24550_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_77_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21762_ _14405_/X _29779_/D _21761_/X hold160/A _21760_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__25033__B _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16558__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20354__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_2962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21053__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23501_ VGND VPWR _23515_/S _14539_/A hold364/A _23501_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16022__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20713_ VGND VPWR _20720_/S _29229_/Q _23663_/A1 _29229_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_3844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24481_ VGND VPWR _24481_/X _24481_/B _26837_/A _25962_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_124_3961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4763 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21693_ wire2469/X _21744_/S _21693_/X _21666_/X _22028_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_200_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25293__A1 _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24096__A2 wire736/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15230__B1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_4949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20177__B _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17770__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24872__B _32555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26220_ VPWR VGND _31598_/D _26220_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_fanout1269_A wire1273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23432_ _29820_/Q _23432_/X _23432_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XPHY_1228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20644_ VGND VPWR _20650_/S _27624_/A1 _29190_/Q _29190_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_1272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14584__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15781__A1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20892__S _20902_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32210__CLK _32210_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26145__A _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1530_A _15500_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3306 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VGND _27154_/S _27157_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18362__S _18364_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3678_A _30426_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16325__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1436_A _18273_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25102_ _24311_/C _20651_/X wire2626/X _14398_/B _26542_/C _25103_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 X_22314_ VGND VPWR _23559_/S _29900_/Q hold379/X _29900_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27675__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26082_ VGND VPWR _26077_/X _31541_/Q _14399_/B _26082_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__17486__B _26488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25596__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23294_ VGND VPWR _23298_/S wire3832/X _30276_/Q _30276_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_273_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold105_A hold105/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29825__CLK _30051_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29910_ VGND VPWR _29910_/D _30412_/CLK _29910_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25033_ _25041_/A _24051_/B1 _25033_/X _25033_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__14887__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3224 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22245_ _22245_/X _22244_/X _30111_/Q _18664_/X wire2286/X VGND VPWR _22092_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_wire3845_A _29861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19275__A2 _19275_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32360__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1603_A _19993_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18483__A0 _28256_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_1956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17286__A1 _32297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29841_ _29841_/Q _32294_/CLK _29841_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout2007 VPWR VGND _21070_/A1 _18186_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_25_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27742__A0 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26545__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30802__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25348__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22176_ _22175_/X _23417_/A wire828/X _29825_/Q _29825_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_27_2947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2018 _17602_/S _17832_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__31928__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20290__A0 _28832_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15297__B1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23359__A1 _30337_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19803__D_N _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput670 wire2332/X mprj_dat_o[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_278_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15836__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput681 _32598_/X mprj_stb_o VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2102 wire2103/X wire2102/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21127_ VGND VPWR _21131_/S _27253_/A0 _29571_/Q _29571_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17706__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput692 wire3379/X serial_resetn_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2113 wire2114/X wire2113/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19027__A2 _19026_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29772_ hold346/A _31921_/CLK _29772_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26984_ VGND VPWR _26985_/C _31976_/Q _31977_/Q _26986_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire2124 wire2124/X wire2125/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24020__A2 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_3391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21909__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2135 VPWR VGND _26900_/B _20124_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17038__A1 _17034_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2732 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_3477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2146 VPWR VGND _19776_/A _25079_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18235__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28723_ _28723_/Q _31510_/CLK _28723_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_232_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2157 VPWR VGND _19770_/A _25073_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25935_ _31555_/Q _31048_/Q _31049_/Q _31524_/Q _25935_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 X_21058_ VGND VPWR _30051_/Q _21058_/X _30419_/Q _30333_/Q VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XFILLER_112_3375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2168 VPWR VGND _26880_/B wire2168/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15049__B1 wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1972_A _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2179 VPWR VGND _24931_/B _19758_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_clkbuf_opt_7_6_core_clk_A clkbuf_opt_7_6_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_2776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1445 VPWR VGND wire1445/X _17910_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19983__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18786__B2 wire1949/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26848__A2 wire2645/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20009_ _27117_/C1 _20008_/Y wire850/X _28651_/Q _28651_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_3629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30952__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28654_ _28654_/Q _31892_/CLK _28654_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_246_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25866_ _31452_/Q _31453_/Q _25867_/D _25869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_13880_ _13880_/Y _28617_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA_wire2144_A _19704_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20593__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24859__A1 wire863/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29205__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22848__A _29896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1489 VPWR VGND wire1489/X wire1489/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_max_length3280_A wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16261__A2 wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27605_ VGND VPWR _27605_/S wire2002/X _32347_/Q _32347_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24817_ VGND VPWR _24817_/X _24817_/B _24817_/A _24817_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_93_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28585_ _28585_/Q _31801_/CLK _28585_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_95_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25797_ _25797_/X _32529_/Q _32530_/Q _25795_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_223_4049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19196__D1 _19196_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23531__A1 _30452_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14811__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15550_ _15550_/X _28967_/Q _15549_/X _15721_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_27536_ VGND VPWR _27530_/X _31382_/Q _25682_/B _27536_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__21471__B _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24748_ VGND VPWR _31460_/Q _31468_/Q _24654_/B _24749_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20345__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16549__B1 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21542__B1 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20368__A _31402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_3758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18943__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17210__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14501_ _14081_/Y _29715_/Q _14495_/Y _14499_/Y _14500_/X _14502_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 XANTENNA__16013__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3545_A _14303_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17210__B2 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27467_ VGND VPWR _27475_/S _32290_/Q _32291_/Q _27467_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15481_ _15480_/X _15692_/S _15721_/A2 _28861_/Q _15481_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_89_3108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24679_ VGND VPWR _24684_/D _31468_/Q _31469_/Q _24680_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__14366__A _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24087__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15221__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3353_A _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17761__A2 _17585_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22774__A1_N _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29206_ _29206_/Q _32295_/CLK _29206_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17220_ VGND VPWR _17220_/X _22046_/B _17220_/A _17220_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_15_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14432_ _21661_/B _14431_/Y _14429_/B _30454_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 X_26418_ _26423_/D _26418_/Y _31692_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_123_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14575__A2 wire1171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27398_ VGND VPWR _27403_/S wire2801/X _32247_/Q _32247_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_1402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_4822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17151_ _17220_/C _21638_/A _17151_/Y _14092_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_29137_ _29137_/Q _32419_/CLK _29137_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30332__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14363_ VPWR VGND _14363_/X _29692_/Q _14459_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA_wire2680_A _14171_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire720 VPWR VGND wire720/X wire720/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_253_4713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26349_ _26224_/A _26348_/X _26335_/X _31662_/Q _31662_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__31458__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21845__B2 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput16 hold60/A hold59/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__25036__A1 _31161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_192_core_clk _32566_/CLK clkbuf_opt_35_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_wire2778_A _27709_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput27 hold31/A hold30/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 Xwire742 VPWR VGND wire742/X wire742/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17513__A2 _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26233__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16102_ VGND VPWR _16102_/X _16825_/S wire1048/X _16101_/X _16100_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xinput38 VPWR VGND hold81/A hold80/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_193_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire753 VPWR VGND wire753/X wire753/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_6_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput49 VGND VPWR input49/X la_input[103] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_10_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17082_ _29886_/Q _21679_/A _21447_/B _21711_/A _16993_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_2 X_29068_ _29068_/Q _31977_/CLK _29068_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25587__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26784__A1 _31842_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14294_ _31282_/Q hold187/A _14293_/X wire3232/X _14294_/X _14245_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 Xclkbuf_leaf_121_core_clk _32324_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20307__S _20327_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_3411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire797 VPWR VGND wire797/X wire798/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_6_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27947__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16033_ wire1005/X wire1477/X _32307_/Q _16033_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28019_ _28019_/Q _30258_/CLK _28019_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14878__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2945_A _20282_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25992__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18474__A0 _28247_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30482__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14532__C _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17277__A1 _30922_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31030_ _31030_/Q _31548_/CLK _31030_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3231 VPWR VGND _14146_/B wire3235/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22270__A1 _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_5256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19671__C1 wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22522__S _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_5617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3253 wire3258/A _14545_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20281__A0 _28823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4060 VPWR VGND wire4060/X wire4061/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_5233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16485__C1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4071 VPWR VGND wire4071/X _28659_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15827__A2 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3275 VGND VPWR wire3278/A _14079_/Y VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_269_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4082 VPWR VGND wire4082/X wire4082/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire4061_A _28663_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19018__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21646__B _21646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4093 VPWR VGND wire4093/X wire4093/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_17984_ _30414_/Q _23415_/A _30484_/Q _30413_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__24011__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2563 VPWR VGND _20209_/S _20195_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21138__S _21139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22022__A1 hold267/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19723_ _25718_/A _19721_/X _19772_/A _28518_/Q _28518_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire3381 VPWR VGND wire3381/X wire3382/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16935_ VGND VPWR _16948_/S _29238_/Q _29302_/Q _16935_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_78_3524 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3392 wire3393/X wire3392/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1851 _21846_/A _14438_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xfanout2596 _17842_/S _17462_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xfanout1862 _14404_/X _22965_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1873 VPWR VGND _26267_/B _26329_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_4_2253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_1387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_5549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24957__B _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26839__A2 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2680 VPWR VGND _19584_/B _14171_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17434__D1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19654_ _26773_/C _20128_/A _19654_/A _19654_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_31932_ _31932_/Q _31933_/CLK hold393/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire2691 wire2692/X _19594_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1244_A wire1244/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23861__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16866_ VGND VPWR _16866_/X _16863_/X _16940_/B1 _16601_/S _16865_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20584__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20977__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21781__B1 wire830/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18605_ VGND VPWR _18624_/S wire3873/X _28319_/Q _28319_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16252__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15817_ _15817_/X wire1052/X _15810_/X _15812_/X _15816_/X _16041_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_73_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14799__C1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24314__A3 _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31863_ _31863_/Q _32553_/CLK _31863_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19585_ VGND VPWR wire2682/X _26866_/A1 _19632_/A _19585_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_121_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16797_ VGND VPWR _16797_/X _16796_/X _16795_/X _16838_/A1 _16834_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14263__A1 _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18447__S _18464_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18529__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15460__B1 wire1085/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14263__B2 _14263_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19726__B1 _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_1130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14802__A3 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18536_ _23145_/A _23115_/B wire3739/X _22553_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XANTENNA_wire1411_A _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30814_ _30814_/Q _32352_/CLK _30814_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21381__B _21381_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20336__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15748_ _15761_/A2 _15748_/X _15747_/X _15521_/S _28868_/Q _15748_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__27116__D_N _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31794_ VGND VPWR _31794_/D _32573_/CLK _31794_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__21533__B1 _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21812__D _21812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32233__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17201__A1 _29901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17201__B2 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30745_ _30745_/Q _32499_/CLK hold448/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_222_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18467_ _29490_/Q _18467_/X _30415_/Q _23415_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_72_2455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15679_ _15679_/X _15749_/C1 _15672_/X _15674_/X _15735_/B _15678_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__24078__A2 wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25275__A1 _31357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15212__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_290 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25275__B2 _31258_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22089__A1 _29812_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17418_ VGND VPWR _17423_/C _17424_/B _32271_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_222_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14566__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold83_A hk_dat_i[13] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15763__A1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28722__CLK _31510_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30676_ hold388/A _31470_/CLK _30676_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18398_ VGND VPWR _18398_/S wire3813/X _28175_/Q _28175_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19786__B _19786_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_209_core_clk _32564_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24483__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2812_A wire2813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27016__A2 _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32415_ _32415_/Q _32547_/CLK _32415_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21836__A1 _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_3566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19278__S _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22924__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17349_ wire3562/X _31916_/Q _17349_/X _17446_/B2 _17349_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_239_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_3178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_2843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32383__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1878_A _20654_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_5066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18701__A1 _22095_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23038__A0 _23034_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_2865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16922__C _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27495__S _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14318__A2 _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32346_ _32346_/Q _32430_/CLK _32346_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20360_ VGND VPWR _20360_/S _27710_/A1 _28900_/Q _28900_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15515__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30825__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16712__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20217__S _20218_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1409 _23513_/S _23525_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_236_4988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25626__A_N _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23589__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19019_ _19012_/X wire1896/X _22090_/B1 _19014_/X _19019_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__14723__C1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28872__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20291_ VGND VPWR _20291_/S wire1783/A _28833_/Q _28833_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30860__D wire723/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29998__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32277_ _32277_/Q _32277_/CLK _32277_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19257__A2 _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26412__B _31690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18465__A0 _28239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22030_ VGND VPWR _22029_/Y _22063_/A _22022_/X _22030_/X _22027_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__23528__S _23530_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21064__A2 _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31228_ hold119/A _32299_/CLK _31228_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22261__A1 _22259_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26527__A1 _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_1877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_5143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20272__A0 _28814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15279__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_48_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30975__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19009__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31159_ _31159_/Q _32528_/CLK _31159_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_3017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16430__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24002__A2 _24000_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28102__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29228__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1017_A wire1021/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21048__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23210__A0 _30132_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_3797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23981_ _30864_/D _23979_/X _24199_/B1 _23976_/X _23980_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_170_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_5053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_2844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18768__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20024__B1 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19965__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25720_ VGND VPWR _25727_/B _31401_/Q _25719_/X _25723_/C VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_77_3034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22932_ VGND VPWR _22929_/B _22929_/A _22928_/A _22937_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_265_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_3113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23771__B _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20575__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30205__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18232__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20887__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21772__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23263__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_5633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25651_ _27404_/B _31383_/Q _27395_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_16_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25502__A2 _31330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28252__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22863_ _22933_/S _22860_/X _22935_/A _22864_/B _30473_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_0_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14885__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14254__A1 _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29378__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18357__S _18357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15451__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14254__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23513__A1 _28395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24602_ VPWR VGND _24602_/X _31544_/Q _24602_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_0_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21814_ _21814_/X _21811_/X _21705_/X _21766_/B _21813_/X VGND VPWR _21846_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_142_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_5346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21291__B _21613_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28370_ _28370_/Q _30481_/CLK _28370_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20327__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25582_ _25629_/A _25582_/X _31223_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 XFILLER_146_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22794_ _22794_/B _22794_/Y _22794_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_198_5250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_3657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_4189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27321_ VGND VPWR _27321_/S _32180_/Q _27280_/X _32180_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_90_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26058__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_2721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24533_ _24533_/B _24533_/Y _24533_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__30355__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21745_ _21745_/X _21744_/X _21766_/B wire832/A wire2469/X _21705_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XPHY_426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14186__A _14186_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25266__A1 _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24069__A2 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1553_A _14538_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout909_A wire915/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18940__A1 _28028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26463__B1 _17605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31600__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23277__A0 _30259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27252_ VGND VPWR _27265_/S _32127_/Q _27697_/A1 _32127_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24464_ VGND VPWR _31028_/D _25447_/A _24480_/A _24464_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_hold222_A hold222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16951__A0 _28836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21676_ VGND VPWR _21676_/C _17027_/B _21905_/S _21676_/D _21676_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__19696__B _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24474__C1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1523 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_1692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22607__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length4046 VPWR VGND _24124_/A1 _28668_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XPHY_1047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26203_ _31590_/Q _26227_/A2 _26204_/B _32280_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_270_5013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23415_ _23415_/C _30414_/D _23415_/A _23415_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_16_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21827__A1 _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20627_ VGND VPWR _20638_/S _27687_/A1 _29173_/Q _29173_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27183_ VGND VPWR _27185_/A hold106/A _27276_/C _27183_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire3962_A _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21827__B2 _17067_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18092__S _18113_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24395_ _24395_/Y _31002_/Q _24401_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_250_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1720_A _23380_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2995 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_2710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26215__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2600 VPWR VGND _19512_/B _24612_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_179_3291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27558__A3 _32241_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32605__A _32605_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23029__A0 _23027_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26134_ _26694_/C _26133_/Y _26159_/B hold435/A _31556_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_88_2451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23346_ VGND VPWR _23221_/S _30482_/Q _23347_/C _30332_/Q _30410_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA__25918__S _31506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25569__A2 _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20558_ VGND VPWR _20562_/S _27684_/A1 _29074_/Q _29074_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15506__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16703__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_11_2_core_clk clkbuf_leaf_19_core_clk/A clkbuf_opt_11_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_238_2131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_4192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22622__A_N _23395_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26065_ wire2597/X _26064_/X _31536_/Q _17877_/X _31536_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_136_2405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23277_ VGND VPWR _23301_/S wire3889/X _30259_/Q _30259_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_285_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2094_A wire2094/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20489_ VGND VPWR _20504_/S _27236_/A0 _29007_/Q _29007_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18820__S _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input177_A mprj_dat_i[12] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17259__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25016_ _25081_/A _24951_/B _25016_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_4_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14190__B1 _31233_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17259__B2 _17295_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22252__A1 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22228_ _29832_/Q _22227_/Y _29833_/Q _22213_/X _22228_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_234_2039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22252__B2 _30112_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19653__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20651__A _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_2793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_287_4842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_2965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15809__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24529__B1 _31290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26783__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32106__CLK _32540_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29824_ _29824_/Q _30395_/CLK _29824_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_22159_ VGND VPWR _22273_/S _30298_/Q _30388_/Q _22159_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27191__A1 _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1103 VPWR VGND fanout1103/X _14552_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_118_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3101_A _16981_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2359_A wire2360/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1114 wire1118/A _15692_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20370__B wire836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3071 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1125 wire1134/A _15517_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_188_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22004__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18208__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1136 _14549_/Y _15623_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_268_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16482__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29755_ _29755_/Q _30233_/CLK hold232/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1147 wire1151/A _15702_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_114_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14981_ _15515_/A2 _14981_/X _14980_/X _15515_/C1 _29529_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__25741__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26967_ _26968_/D _31994_/Q _31996_/Q hold500/A _31993_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_21_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1158 wire1171/X _15629_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14493__A1 hold398/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18759__A1 _27891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1169 _14548_/Y wire1172/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_282_719 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_4269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16720_ wire996/X _16720_/X _16719_/X _16720_/C1 _30510_/Q _16722_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28706_ _28706_/Q _31892_/CLK _28706_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25918_ VGND VPWR wire3440/X wire4186/X _31506_/Q _25918_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_13932_ _28565_/Q _13932_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_47_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20566__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1253 VPWR VGND wire1253/X _24119_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29686_ _29686_/Q _30453_/CLK _29686_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20797__S _20797_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19420__A2 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26898_ _26898_/Y _26898_/B wire752/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_38_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1264 VPWR VGND wire1264/X _23983_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__31130__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32256__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1275 VPWR VGND wire1275/X _23772_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_129_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15037__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16234__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17431__A1 wire3561/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16651_ VGND VPWR _16842_/S _29028_/Q _28996_/Q _16651_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28637_ VGND VPWR _28637_/D _31119_/CLK _28637_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_95_2444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17431__B2 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13863_ _28634_/Q _13863_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_125_4223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25849_ _25853_/C _25849_/B _31446_/D _25878_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__19971__A3 wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15442__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_988 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15602_ _15602_/X _15640_/C1 _15595_/X _15597_/X wire1089/A _15601_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_246_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_4139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19370_ _19283_/S _20868_/S _19369_/X _19367_/X _19370_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20318__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16582_ _16956_/A2 wire3283/X _28890_/Q _16582_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28568_ VGND VPWR _28568_/D _32582_/CLK _28568_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15993__A1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14796__A2 _15223_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13794_ _31152_/Q _13794_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__28745__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21515__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20098__A wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24793__A _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19184__A1 _28071_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18321_ VGND VPWR _18321_/S _28109_/Q wire1783/X _28109_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26049__A3 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15533_ VGND VPWR _15716_/S _30912_/Q _29190_/Q _15533_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27519_ _25643_/C _32221_/Q _27519_/X _25643_/B _32213_/Q _32229_/Q _32205_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_164_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2895_A _20606_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17195__B1 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14096__A _29359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28499_ _28499_/Q _32115_/CLK _28499_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25257__A1 _29869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31280__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_373_core_clk _32078_/CLK clkbuf_5_3_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_275_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3735_A _30284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18931__A1 _27963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25257__B2 hold136/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3714 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18252_ _18252_/Y _18251_/Y _18216_/X _22370_/A2 _18316_/A _18250_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 X_30530_ hold302/A _32567_/CLK input60/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_142_3880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15464_ VGND VPWR _15644_/S _29231_/Q _29295_/Q _15464_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14548__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15745__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25401__B _31283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30848__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_302_core_clk _30139_/CLK clkbuf_5_21_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XPHY_971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17203_ _30013_/Q _17202_/X _17204_/A _22510_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19849__D_N wire1629/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14415_ _21339_/C _14412_/A _21355_/B _21550_/B _23360_/A1 _29714_/Q _29727_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__21818__A1 _21381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30461_ hold421/A _31916_/CLK _30461_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18183_ _18183_/X _18201_/A _18244_/A wire3904/X _18163_/B wire3712/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14953__C1 _29047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25009__A1 _31148_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15395_ _15394_/X _15705_/A1 wire1170/X _30507_/Q _15395_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_2529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27549__A3 _32208_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32200_ _32200_/Q _32259_/CLK _32200_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_253_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17134_ _29432_/Q _17234_/B2 _17133_/X _17134_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_201_2775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14346_ _14355_/A _21355_/A _14341_/Y _14344_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21bai_4 XANTENNA__18695__B1 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22491__A1 _17152_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26757__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30392_ _30392_/Q _30392_/CLK _30392_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output563_A _28731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3820 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3348 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_opt_10_0_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32131_ _32131_/Q _32293_/CLK _32131_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17065_ VGND VPWR _23348_/C hold394/X _30384_/Q _17065_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30998__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16170__A1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14277_ _14277_/Y _29650_/Q _29948_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19239__A2 wire1993/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_4216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28125__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_1951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_2696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16016_ _16016_/X _29245_/Q _16448_/A2 _16448_/A3 _16120_/S _16015_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_256_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21046__A2 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32062_ _32062_/Q _32433_/CLK _32062_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25129__A _31202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25980__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20254__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27047__C _27050_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18998__A1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31013_ _31013_/Q _31748_/CLK _31013_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_27_3990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3061 VPWR VGND _18048_/S _18020_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19127__A _28229_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27182__A1 _27185_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16250__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3072 _17986_/X _18012_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_247_5037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30228__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3083 _17983_/S _17951_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_43_3280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25563__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_4055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26390__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17967_ VGND VPWR _17972_/S _18516_/A1 _27904_/Q _27904_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14484__A1 _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20006__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29520__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19706_ _19706_/B _19789_/A _19706_/Y _20120_/B _26949_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 Xfanout1670 VPWR VGND wire1672/A _19510_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16918_ VGND VPWR _16918_/S _32072_/Q _29131_/Q _16918_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_130_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1681 VPWR VGND wire1682/A _18227_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire1626_A _19787_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20557__A1 _27140_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17898_ _24389_/B _17898_/X _32598_/A _24388_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__21754__B1 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1692 VPWR VGND wire1693/A wire1705/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_2072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15028__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16225__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17422__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21392__A _21392_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31915_ _31915_/Q _32433_/CLK hold217/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19637_ _19637_/B _19558_/A _19782_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XFILLER_269_1979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30378__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16849_ VGND VPWR wire979/X _30915_/Q _29193_/Q _16849_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20500__S _20512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_1247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24299__A2 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15433__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17081__S _17089_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16776__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_7_0_core_clk_A clkbuf_5_7_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31623__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16630__C1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20309__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_3955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25799__A _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31846_ hold206/A _31846_/CLK _31846_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_5092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14787__A2 _14776_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19568_ VGND VPWR wire2664/X wire3616/X _19638_/A _19568_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_267_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22000__B _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29670__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_4954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18519_ VGND VPWR _18522_/S wire3848/X _28291_/Q _28291_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_72_2230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19797__A _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30855__D _30855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31777_ _31777_/Q _31884_/CLK _31777_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19499_ VGND VPWR _25510_/C _31332_/Q _31333_/Q _19499_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_34_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_2533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18905__S _19088_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26445__B1 _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18922__A1 _28059_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17725__A2 _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire981_A wire981/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_1589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21530_ _21530_/Y _21538_/A _21538_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_222_885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30728_ hold318/A _32168_/CLK input78/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_50_3251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3098 VGND VPWR VGND VPWR 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NF_sky130_ef_sc_hd__decap_12 X_20412_ VGND VPWR _20412_/S _27704_/A1 _28934_/Q _28934_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17489__A1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17889__A_N _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22482__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24180_ _28482_/Q _26949_/A _24180_/X _28610_/Q _25980_/A2 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__18686__B1 _18682_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21392_ _21392_/Y _21549_/B _21392_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_191_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4505 VPWR VGND VGND VPWR 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VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16161__A1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18640__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3376_A _14133_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25420__A1 _31359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2736 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_5052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29050__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14172__B1 hold103/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1603 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23258__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23062_ VGND VPWR _23062_/X _20914_/C _23061_/X _22553_/A _18540_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_83_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25039__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20274_ VGND VPWR _20294_/S _27245_/A0 _28816_/Q _28816_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14711__A2 _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17764__B _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_1674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_74 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20245__A0 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_2602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19682__D _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28618__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2771 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22013_ _21579_/A _21942_/S _21310_/A _22010_/Y _22013_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__22785__A2 _22807_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23982__A1 wire4136/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21442__C1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18579__C _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_1658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27870_ _27870_/Q _30378_/CLK _27870_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21286__B _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16160__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_24_1_core_clk clkbuf_opt_24_1_core_clk/X clkbuf_opt_24_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_98_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20796__A1 _29309_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27173__B2 wire2770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21993__B1 _21990_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31153__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput206 VPWR VGND wire4202/A por_l_in VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_265_4414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_4583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_39_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32279__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26821_ _26821_/Y _26886_/B _26835_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__16464__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26920__A1 _31944_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26920__B2 wire2348/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_96_4166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_3375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout859_A wire860/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15672__B1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23734__A1 _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24597__B _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3710_A _30335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29540_ _29540_/Q _32294_/CLK _29540_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_96_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26752_ _26752_/Y _31791_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_243_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_73 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23964_ _23964_/X wire1587/X _30675_/Q _30739_/Q wire1633/X VGND VPWR wire1266/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_268_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21745__B1 wire832/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28768__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16216__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17413__A1 _30952_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25703_ VGND VPWR _31398_/D _25703_/B _25703_/A _27739_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_77_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22915_ _30113_/Q wire1866/X _30113_/D _22913_/Y _22914_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29471_ _29471_/Q _32429_/CLK _29471_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_4745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20410__S _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_13_0_core_clk clkbuf_5_13_1_core_clk/A clkbuf_4_6_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_26683_ _26683_/X _26696_/D _26678_/B _23776_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__19953__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23895_ _23894_/X wire1621/X _24081_/A3 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XFILLER_281_1601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22846_ _22846_/A _30106_/Q _22846_/X _22846_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__14778__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold437_A hold437/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19166__A1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_3124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3638 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28353_ _28353_/Q _30451_/CLK _28353_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25565_ wire756/A _25565_/A hold170/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XPHY_212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22777_ VGND VPWR _22777_/X _22820_/B _29889_/Q _22820_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_104_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25239__A1 hold11/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26436__B1 _31699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25239__B2 hold97/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18913__A1 _20866_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16519__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17716__A2 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_1055 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27304_ VGND VPWR _27311_/S _27266_/X _32165_/Q _32165_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_70_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26317__B _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24516_ VGND VPWR _24516_/X _24516_/B _24516_/A _31220_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_21728_ _29776_/Q wire1855/A _29776_/D _21727_/X _21726_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_103_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28284_ _28284_/Q _30282_/CLK _28284_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5288 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26987__A1 _31978_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2107_A wire2107/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16924__B1 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25496_ _19496_/X _25454_/A _25496_/Y _31328_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_279_2220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2584 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24118__A _24118_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_3820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21241__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27235_ VGND VPWR _27238_/S _32110_/Q _27680_/A1 _32110_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_2253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24447_ _25197_/C _24447_/Y _24447_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_103_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21659_ _21659_/B _21659_/Y _21659_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__16335__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3051_A _18087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24462__A2 _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14200_ _14200_/Y _14199_/X _14167_/S hold167/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA_fanout3149_A wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_1949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21276__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22473__A1 _17079_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15180_ VGND VPWR _15716_/S _28853_/Q _28885_/Q _15180_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_5597 VGND VPWR VGND VPWR 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_31550_/D _26020_/Y _24586_/B _31550_/Q _17876_/Y VGND VPWR _26116_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_289_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_1596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_78_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2452 VPWR VGND _24242_/S _24234_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23329_ VGND VPWR _23334_/S _30307_/Q _17176_/X _30307_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_63_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16152__A1 wire920/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23676__B _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27097_ VGND VPWR _32026_/D _27117_/A2 _27096_/X _26815_/B _27028_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2476_A _21167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3100 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25411__A1 _31285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2474 VPWR VGND _21169_/S _21148_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout3316_A wire3320/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18429__A0 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1751 VPWR VGND _23236_/B fanout1749/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_172_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14062_ _31530_/Q _26047_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_137_3982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26048_ VGND VPWR _31531_/Q _26032_/X _31530_/Q _26048_/X _31532_/Q _31529_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_155_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15360__C1 wire1228/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19626__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24765__A3 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20236__A0 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_4925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29543__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23973__B2 _30545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18870_ _18869_/X _20868_/S _18867_/X _19283_/S _18870_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__16070__S wire981/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2643_A _19547_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27164__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17101__B1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20787__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21984__B1 _21981_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25065__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16455__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29807_ _29807_/Q _32074_/CLK _29807_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17652__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17821_ VGND VPWR _17821_/X _17776_/X _17863_/B _17777_/B _17685_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_153_2593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15112__C1 _15740_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_1862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27999_ _27999_/Q _30430_/CLK _27999_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_5513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_4334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23186__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15663__B1 _15737_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23725__A1 _31472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30520__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold5 hk_dat_i[25] hold5/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_wire2810_A _27149_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31646__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_911 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_1493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17752_ _17832_/S _17751_/X _17750_/X _17842_/S _17752_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29738_ VGND VPWR _29738_/D _30483_/CLK hold420/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__21736__A0 _14353_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20539__A1 _29056_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14964_ _14964_/X _32052_/Q _14963_/X _15515_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_282_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25190__A3 _25187_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29693__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16207__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17404__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18601__A0 _28315_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16703_ VGND VPWR _16703_/X _16928_/B1 _16949_/C1 _16702_/X _16701_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_247_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1072 VPWR VGND wire1072/X wire1074/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_13915_ _28582_/Q _13915_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_149_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20320__S _20322_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29669_ _29669_/Q _32575_/CLK _29669_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1083 VPWR VGND wire1083/X wire1085/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_17683_ VGND VPWR _17832_/S _17682_/X _17659_/X _17683_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14895_ _14895_/X _32349_/Q _15628_/A2 _15628_/A3 _15630_/A1 _14894_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_147_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_5541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_4867 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26675__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16612__C1 wire963/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15414__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31700_ _31700_/Q _31748_/CLK _31700_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_220_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19422_ _19422_/X hold285/A wire3536/X _28437_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_251_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23489__A0 _30431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16634_ _16950_/A1 _16624_/Y wire903/X _16634_/Y _16633_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 XFILLER_1_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13846_ _29820_/Q _22141_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4024_A _28676_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14769__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15966__A1 wire951/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15641__C _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30670__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_5596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14538__B _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26508__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31796__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27219__A2 _25773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_164_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19353_ _19352_/X _19380_/B1 _19380_/A2 _28338_/Q _19353_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_182_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31631_ _31631_/Q _32567_/CLK _31631_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24150__B2 _32565_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_31_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16565_ VGND VPWR _16565_/X wire944/X wire1060/X _16564_/X _16563_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26690__A3 _25884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13777_ _13777_/Y _31169_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_108_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22161__B1 _22160_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_2853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22700__A2 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18304_ VGND VPWR _18329_/S _28105_/Q _27258_/A0 _28105_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15516_ VGND VPWR _15516_/S _30510_/Q _30796_/Q _15516_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19284_ _19380_/A2 _27884_/Q _22088_/B1 _19284_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31562_ _31562_/Q _31563_/CLK _31562_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20172__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26978__A1 _31974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16496_ wire918/X _16495_/X _16491_/X _16834_/B1 _16496_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_output680_A wire3119/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16915__B1 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_34_2567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21151__S _21151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_336_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18235_ _18254_/S wire3872/X _18295_/B _18234_/X _18235_/Y _29340_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 X_30513_ _30513_/Q _32049_/CLK _30513_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31026__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15447_ _15447_/X _15760_/B1 _15718_/B1 _29124_/Q _15561_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_201_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15194__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31493_ _31493_/Q _31563_/CLK _31493_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_160_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25650__A1 _25648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24453__A2 _24454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_3577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29073__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22464__A1 _16970_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25558__S _25564_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30444_ VGND VPWR _30444_/D _31959_/CLK _30444_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18166_ _18166_/Y _18278_/A _18166_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XANTENNA__23867__A _23867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20990__S _21018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15378_ _16956_/A2 _15747_/A1 _32362_/Q _15378_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_103_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14941__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20475__A0 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14273__B _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17117_ _16971_/A _30390_/Q _17117_/X wire3791/A _29430_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_42_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14329_ _14313_/X _14331_/A _14316_/Y _14321_/Y _14326_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 Xhold405 hold405/A hold405/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16143__A1 _29312_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30375_ _30375_/Q _32269_/CLK _30375_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18097_ VGND VPWR _18110_/S wire3882/X _28026_/Q _28026_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_67_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18460__S _18460_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold416 hold416/A hold416/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27058__B _27058_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24205__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19880__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold427 hold427/A hold427/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__30050__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31176__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold438 hold438/A hold438/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32114_ _32114_/Q _32114_/CLK _32114_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27773__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17048_ VGND VPWR _23348_/C _30192_/Q _30381_/Q _17048_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16694__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold449 hold449/A hold449/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_67_2387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold46_A hold46/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32421__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20227__A0 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23964__A1 _30675_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32045_ _32045_/Q _32417_/CLK _32045_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23964__B2 _30739_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19093__B1 _19092_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27155__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20778__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout929 wire933/A _16249_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21975__B1 _22075_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24698__A _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_5419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25166__B1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16446__A2 _16563_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28910__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_224_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18999_ _23513_/S _18998_/X _18988_/X _18999_/A1 _18999_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23716__A1 _31469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22519__A2 _22520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24913__B1 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_5192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_5143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21727__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19396__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23752__D _26595_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23192__A2 _23192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22649__C _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20230__S _20236_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27802__A _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20961_ VGND VPWR _20980_/S _30167_/Q _29426_/Q _29426_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_110_2964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_3717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_295_core_clk _29847_/CLK clkbuf_opt_20_3_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_260_5078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_5029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15406__B1 _15738_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16749__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15324__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22700_ _22747_/C _22733_/A _21464_/A _22700_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_263_2021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_4475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_375_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23680_ _23680_/X wire1876/X _19680_/B _23679_/Y _31506_/Q wire1656/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA_wire3124_A wire3124/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26130__A2 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20892_ VGND VPWR _20902_/S _30244_/Q _29406_/Q _20892_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_126_2404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_224_core_clk _31282_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19148__A1 wire3237/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14448__B _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23541__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22631_ VGND VPWR _29875_/Q _22629_/X _22630_/Y _22631_/X _22627_/C VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__24141__B2 _30705_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31829_ _31829_/Q _31894_/CLK _31829_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_5553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22152__A0 _30387_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_4762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18635__S _18654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19699__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_2661 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_2732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24692__A2 _31470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22665__B _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26137__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25350_ _25350_/A _25350_/C _25363_/D _25350_/D _25350_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_52_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22562_ VGND VPWR _22619_/S hold150/A wire3700/X _30059_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25041__B _25041_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_2191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29416__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_112_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24301_ VGND VPWR _30951_/D _24308_/B _31603_/Q _24308_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_30_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21513_ _21516_/B _21549_/B _30470_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_11_3021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25281_ _25281_/X _25380_/C _31259_/Q _25266_/Y _31358_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__15185__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3493_A _25341_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22493_ _22509_/C1 _22492_/X _22511_/A2 _17160_/X _30007_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_273_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17478__C _17605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24444__A2 _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length906 VPWR VGND _16041_/A1 _16522_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_236_5261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23101__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27020_ _27027_/D _31989_/Q _31991_/Q _31990_/Q _27020_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_222_1061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1349_A wire1351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24232_ VGND VPWR _24232_/S _30908_/Q _27700_/A1 _30908_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22455__A1 wire2292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21444_ _21444_/C _21679_/B _21447_/D _21444_/D _21444_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__23652__A0 _30782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21889__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31519__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20466__A0 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26153__A _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28440__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29566__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3660_A hold411/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24163_ _24163_/X _24161_/X _28544_/Q _24163_/B2 _19718_/B VGND VPWR wire803/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 Xmax_length1014 VPWR VGND _16515_/B1 _16828_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16134__A1 _16449_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21375_ _21775_/C _21378_/D _21378_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_28_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27394__A1 _32244_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18370__S _18399_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26197__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32305__D _32305_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_263_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3758_A _17036_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19871__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1516_A wire1519/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1036 VPWR VGND _16500_/B1 wire1035/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_137_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22470__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23114_ _30170_/D _23057_/S _23113_/X _30170_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xmax_length1047 VPWR VGND _16151_/A1 wire1048/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14145__B1 _14146_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27683__S _27683_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20326_ VGND VPWR _20327_/S _27709_/A1 _28867_/Q _28867_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16685__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15342__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23404__B1 wire3331/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24094_ wire736/A _24957_/B _31175_/Q _31143_/Q _25022_/B VGND VPWR _24093_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28971_ _28971_/Q _31966_/CLK _28971_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_46_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20405__S _20408_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20218__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3903 wire3903/X wire3904/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_fanout976_A wire979/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15893__B1 _16041_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3914 VPWR VGND wire3914/X wire3915/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22758__A2 _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23955__A1 _28492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30543__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23045_ _23049_/A _23045_/X _23043_/X _29776_/Q _23044_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 X_27922_ _27922_/Q _30468_/CLK _27922_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__13808__A _31138_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3925 _21427_/C _29734_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__31669__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19084__B1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23955__B2 _28684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27146__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20257_ VGND VPWR _20257_/S _28800_/Q _27706_/A1 _28800_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3925_A _29734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3936 VPWR VGND _23130_/C _29723_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20769__A1 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19623__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold387_A hold387/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28590__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16437__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17634__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25157__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3969 _23209_/S _23199_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_265_4211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_1488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27853_ _32549_/Q _32550_/Q _32548_/Q _25807_/X _27854_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_288_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20188_ _26148_/A _20187_/X _20192_/A2 _28738_/Q _28738_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_24_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23168__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15645__B1 wire1209/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20183__C_N _19774_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4031 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24904__B1 _24903_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26804_ _27059_/C1 _26803_/Y _26833_/A _31852_/Q _31852_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_2848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27784_ _27792_/S _31398_/Q _27784_/C _27793_/C _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_145_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2057_A wire2057/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24996_ _25065_/A _24931_/B _24996_/X _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_167_3942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30693__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_5374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21236__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29523_ _29523_/Q _32311_/CLK _29523_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_245_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26735_ _26734_/Y _26950_/C _31820_/Q _26754_/B _31820_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_282_4580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23947_ _19858_/X _28587_/Q _23947_/X _26838_/A1 _28459_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_248_1816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21463__C _21463_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22391__A0 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17398__B1 input188/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_5577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_151_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15234__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_801 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21733__A3 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4684 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_278_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_812 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29454_ _29454_/Q _31962_/CLK _29454_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14680_ _14679_/X wire1089/X _14675_/X _15307_/C1 _14680_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15948__A1 _29009_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2224_A _19660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26666_ _26666_/X _31863_/Q _26637_/B _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA_823 _18229_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23878_ wire4140/X _26838_/A1 _23878_/X _28581_/Q _25738_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15948__B2 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17401__A4 _30844_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_834 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14358__B _14360_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_845 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28405_ _28405_/Q _32110_/CLK _28405_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24132__B2 _28701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25617_ _25619_/B _25615_/X _31376_/Q _25616_/X wire3532/X VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_856 wire4107/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31049__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22829_ _22831_/D _22829_/Y _22829_/A _22831_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_867 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29385_ _29385_/Q _30412_/CLK _29385_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_221_4851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26597_ wire817/X hold206/X _26596_/Y _26597_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_878 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14620__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_889 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_cap3105 VPWR VGND _26102_/C _24805_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_57_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16350_ VGND VPWR _16350_/X _16491_/S _16834_/B1 _16349_/X _16348_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__29096__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28336_ _28336_/Q _30483_/CLK _28336_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22694__A1 _29881_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25548_ VGND VPWR _31352_/Q _31335_/Q hold178/A _25548_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20154__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23891__B1 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_3_6_2_core_clk clkbuf_3_6_2_core_clk/X clkbuf_3_6_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_90_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15301_ _15301_/X _28760_/Q _15628_/A2 _15628_/A3 _15628_/B1 _15300_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_224_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_4032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16281_ _16546_/C1 wire923/A _16280_/Y _16278_/Y _16281_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28267_ _28267_/Q _32570_/CLK _28267_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16373__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15176__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2593_A _18284_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25479_ _19488_/X _25454_/A _31319_/D _25478_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_202_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25093__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17570__B1 wire2420/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29909__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_3593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30073__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18020_ VGND VPWR _30414_/Q _23269_/C _30413_/Q _18020_/X _30484_/Q VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 XANTENNA__31199__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27218_ _25773_/C _27218_/B _32101_/D _27276_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_15232_ _15575_/A _15575_/C _29320_/Q _15232_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22446__A1 _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_99_core_clk _32112_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14923__A2 wire1172/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28198_ _28198_/Q _31971_/CLK _28198_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_core.RAM128_Di0[30] hold115/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32444__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20457__A0 _21070_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15163_ _16721_/A2 wire3298/A _29568_/Q _15163_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17685__A _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2760_A _14137_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27149_ VGND VPWR _27149_/S _27692_/A1 _32055_/Q _32055_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16125__A1 _16807_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_28_core_clk _32538_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_fanout3600_A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2260 VPWR VGND _24958_/B wire2259/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19862__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26998__A _31983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23837__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24199__A1 wire760/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14114_ _21428_/A _14114_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__25396__B1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30160_ _30160_/Q _30406_/CLK _30160_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16676__A2 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19971_ VGND VPWR wire1321/X _25022_/C _24935_/B _19971_/X _25867_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 Xmax_length2293 VPWR VGND _27006_/A _14401_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_15094_ _15094_/X _15727_/A2 _15740_/B1 _32123_/Q wire1515/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_81_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17873__B2 _31735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20315__S _20315_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20209__A0 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14687__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output359_A _13944_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15884__B1 _15883_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23946__A1 wire4089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22749__A2 _29886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18922_ _19185_/S _28059_/Q _18921_/X _18922_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14045_ _29976_/Q _14045_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23946__B2 _31161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27137__A1 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30091_ _30091_/Q _30410_/CLK _30091_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_253_1544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_155_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_27_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21957__B1 _21628_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27395__A_N _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_5105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16428__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18822__A0 _18820_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_190_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_133_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18853_ _18853_/X _19335_/B _28184_/Q _19375_/B1 _18852_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_190_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22530__S _22551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14439__A1 _29385_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output526_A _31111_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24311__A _31193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25699__A1 _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15636__B1 wire1209/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17624__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17804_ _31731_/Q _17870_/A2 _17804_/X _31730_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_114_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4141_A _28440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18784_ _18784_/X _27956_/Q wire1931/X _19298_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_94_3914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25126__B _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26360__A2 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15996_ _16563_/A2 _15996_/X _15995_/X _16120_/S _29308_/Q _16448_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_244_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_4377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19378__A1 _27984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23174__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21146__S _21151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24371__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2293_A _14401_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17735_ _31725_/Q _17870_/A2 _17735_/X _31724_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14947_ _14947_/X _15640_/C1 _14940_/X _14942_/X _15226_/B _14946_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_209_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_3173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30993_ _30993_/Q _31918_/CLK _30993_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_149_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_5349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_3649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18050__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15939__A1 _29620_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17666_ _17874_/A2 _31712_/Q _17665_/X _17666_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_92_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28313__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29439__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14878_ _14546_/A wire1733/A _14878_/X _15628_/A2 _28981_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_57_3780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_4307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14268__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26238__A _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2460_A _23590_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23361__S _23366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19405_ VGND VPWR _19415_/S _27696_/A1 _28421_/Q _28421_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_144_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24123__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24684__C _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16617_ _16911_/A2 _16617_/X _16616_/X _16884_/S _28795_/Q _16928_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_143_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13829_ _13829_/A _13829_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_250_243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17597_ _31713_/Q _17539_/B _17597_/X _31712_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18455__S _18456_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14611__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22134__B1 _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25871__A1 _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2768 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31614_ _31614_/Q _31737_/CLK _31614_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_222_3969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19336_ _19335_/X _19336_/B1 _19375_/A2 _28174_/Q _19336_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27768__S _27774_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16548_ _16548_/X _29121_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16547_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__30416__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22685__B2 _22671_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23882__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20696__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_105_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28463__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31545_ _31545_/Q _31547_/CLK _31545_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19267_ VGND VPWR _19267_/S _28203_/Q _28235_/Q _19267_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29589__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15167__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1693_A wire1693/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16479_ wire992/X _16479_/X _16478_/X _16736_/S _32431_/Q _16960_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14284__A _23415_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25084__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20160__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16364__B2 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17298__C _17298_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_4894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_3997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18218_ _18295_/B _18218_/X _18254_/S _18217_/X _29340_/Q wire3884/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_195_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire777_A wire777/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14914__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23634__B1 _32555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19198_ _19156_/S wire1896/X _19197_/X _19195_/X _19198_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31476_ _31476_/Q _31575_/CLK _31476_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_4700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20448__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30566__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18149_ VGND VPWR _18152_/S _18239_/B _28077_/Q _28077_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30427_ VGND VPWR _30427_/D _30428_/CLK _30427_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__16116__A1 _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26179__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_253_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold202 hold202/A hold202/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_218_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19853__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31811__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold213 hold213/A hold213/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_134_3407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold224 hold224/A hold224/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_wire944_A wire944/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16667__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17864__A1 _31654_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25387__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27738__A_N _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21160_ VGND VPWR _21168_/S _29603_/Q _27253_/A0 _29603_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_214_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold235 hold235/A hold235/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21660__A2 _14431_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30358_ VGND VPWR _30358_/D _32439_/CLK _30358_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_63_2004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17864__B2 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26123__D _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20225__S _20225_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold246 hold246/A hold246/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_112_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21548__C _21549_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14678__A1 _29587_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold257 hold257/A hold257/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_155_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15875__B1 _16522_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23937__A1 wire4128/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20111_ _27071_/C1 _20110_/Y _20122_/A _28701_/Q _28701_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold268 hold268/A hold268/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_232_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold279 hold279/A hold279/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_119_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23937__B2 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19066__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_2329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21091_ VGND VPWR _21097_/S _27703_/A1 _29542_/Q _29542_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_115_2116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3074_A _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30289_ _30289_/Q _30378_/CLK _30289_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_2389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21948__B1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2509 VPWR VGND _20752_/S _20739_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_80_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25962__D _25962_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23536__S _23536_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20042_ _20042_/Y _20042_/B wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_266_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32028_ _32028_/Q _32282_/CLK _32028_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_232_1628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18813__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2482 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31961__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout748 VPWR VGND wire749/A wire753/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_171_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1808 _19792_/C wire1808/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_41_2335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17092__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24850_ wire863/X _31070_/Q _24850_/Y _24464_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_252_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24578__D _31417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25154__A3 _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26351__A2 wire781/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_405_core_clk _28326_/CLK clkbuf_opt_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24898__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21056__S _21057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23801_ _30828_/D _23813_/C _23801_/A _23822_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_184_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24362__B2 _31996_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15642__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19908__A3 _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24781_ _25971_/C _24781_/Y _31049_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_58_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21283__C hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_1385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21993_ _21993_/X _21992_/Y _21955_/B _21990_/Y _21673_/X wire3146/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_273_368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14459__A _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14850__A1 _28411_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22373__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15054__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32317__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26520_ _31746_/Q _26519_/X _31746_/D _31745_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__18041__A1 wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_108 _19100_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23732_ _30818_/D _23822_/B _23732_/A _23732_/B _23813_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_279_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26103__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20944_ VGND VPWR _20947_/S _29409_/Q hold187/X _29409_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_78_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_119 _22099_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20895__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16052__B1 _15782_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26148__A _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24114__A1 _28731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1560_A _22444_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23271__S _23300_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24114__B2 _31145_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[3] wire2331/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26451_ _26245_/C _31615_/Q _17563_/A _26453_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_108_4092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1658_A _24204_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23663_ VGND VPWR _23671_/S _23663_/A1 _30793_/Q _30793_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20875_ VGND VPWR _22550_/S _20874_/X _29366_/Q _29366_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18365__S _18365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22125__B1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28806__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14602__A1 _14648_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19688__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1466_A _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22395__B _29954_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_5594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30096__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25402_ _31283_/Q _31284_/Q _25408_/C _25402_/D _31282_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_17_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22614_ _22618_/A1 _22614_/B _22614_/X _30349_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_221_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29170_ _29170_/Q _31479_/CLK _29170_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22676__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26382_ VGND VPWR wire1651/A _24308_/C _26819_/B _26382_/X _27051_/A _26382_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_224_1123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23594_ VGND VPWR _23595_/S _27708_/A1 _30514_/Q _30514_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21333__D1 _21651_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold135_A hold135/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31341__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32467__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19541__A1 _28456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28121_ _28121_/Q _30276_/CLK _28121_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20687__B1 wire1292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_4164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25333_ _31269_/D _25331_/X _26238_/A _25332_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_221_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22545_ VGND VPWR _22550_/S _29834_/Q _30045_/Q _30045_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_5378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16355__A1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15158__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_30_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30909__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20151__A2 _14183_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24417__A2 _31008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_4216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28052_ _28052_/Q _30454_/CLK _28052_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22428__A1 _14367_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4557 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25264_ _26242_/A _25263_/X _25264_/A2 hold94/A _31256_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_100_2418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23625__B1 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22476_ VGND VPWR _22448_/C _22512_/A4 _22484_/A2 _22476_/X _29999_/Q _22512_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__28956__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14905__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_5545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20439__A0 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25090__A2 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27003_ VGND VPWR _27000_/X _31985_/Q _27003_/B1 _27003_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_24215_ VGND VPWR _24238_/S _30891_/Q _27140_/A1 _30891_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_212_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21427_ _21664_/B _21427_/C _21462_/B _21427_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XANTENNA__16107__A1 wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3039_A _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31491__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25195_ _24490_/Y _25197_/D _25195_/X _25261_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__21100__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17304__B1 wire2126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2510 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19844__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_156_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3605 VPWR VGND _19535_/A wire3609/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17855__A1 _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24146_ _28670_/Q wire1289/X _24145_/X _31180_/Q _24146_/X wire1600/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_191_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21358_ _21360_/B _21360_/A _21358_/Y _21360_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__26033__D _31528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_3201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23389__C1 _22284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3700 VPWR VGND wire3700/X _30341_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23928__A1 _23920_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20362__C _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27980__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20309_ VGND VPWR _20324_/S _27247_/A0 _28850_/Q _28850_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19057__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28954_ _28954_/Q _29565_/CLK _28954_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24077_ _30589_/Q _24204_/A2 _24077_/X _30525_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_254_1853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24050__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15330__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21289_ _21462_/B _21506_/A _21427_/B _21289_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_4 XANTENNA_wire2174_A _19601_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26590__A2 wire3452/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3733 VPWR VGND wire3733/X wire3734/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21939__B1 _21564_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3014_A _18401_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_5463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3744 VPWR VGND _23115_/B _14534_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_133_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17607__A1 _17606_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23028_ _25691_/B _32491_/Q _23028_/X _25693_/B _32483_/Q _32499_/Q _32475_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_27905_ _27905_/Q _29550_/CLK _27905_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22600__A1 _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17607__B2 _31715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18804__B1 wire1932/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_2863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3766 VPWR VGND wire3766/X wire3766/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_3616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22600__B2 wire3708/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28885_ _28885_/Q _32357_/CLK _28885_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_5617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_2616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17083__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15850_ _16039_/A2 _15850_/X _15849_/X _16039_/C1 _30888_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_27836_ _27834_/C _32541_/Q _27835_/Y _32541_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_162_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26342__A2 _19539_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_4795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28336__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_146_core_clk _31977_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24889__C1 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16291__B1 wire923/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23156__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24353__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14801_ _15228_/A2 _14800_/X _29011_/Q _15228_/A3 _14801_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_265_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15781_ VGND VPWR _15781_/X _15778_/X _15780_/X _15957_/S _16151_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27767_ VGND VPWR _27774_/S _25023_/B _32493_/Q _32493_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_3816 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24979_ _25076_/C1 _24978_/X _25021_/A2 _31133_/Q _31133_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22364__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_1504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17520_ _26510_/A _24817_/A _32577_/D _26510_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_223_4924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29506_ VGND VPWR _29506_/D _30477_/CLK _29506_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__18032__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14732_ _14731_/X _14823_/A1 _14882_/A2 _28777_/Q _14732_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26718_ _26718_/Y _31774_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_226_3346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30439__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27698_ VGND VPWR _27698_/S _27698_/A1 _32432_/Q _32432_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_278_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_620 _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16043__B1 _16042_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24105__A1 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_1548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18783__B _18790_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_631 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25302__B1 _31264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24105__B2 _28730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17451_ _17475_/C _17452_/A _31050_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA_642 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29437_ _29437_/Q _30204_/CLK _29437_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_161_4072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_4075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27842__A2 _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28486__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14663_ wire1533/X _14816_/A1 _32343_/Q _14663_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26649_ VGND VPWR _26648_/Y _26684_/A2 _26637_/B _26649_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_18_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_653 wire2371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15397__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22116__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_664 wire2440/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17791__B1 _31731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_675 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29731__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16402_ _16402_/X _29117_/Q _16964_/A2 _16920_/A3 _16925_/B1 _16401_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_204_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_686 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_3997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22667__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17382_ VGND VPWR _17381_/X wire2026/X hold10/A hold9/X _17447_/B2 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA_697 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29368_ _29368_/Q _30477_/CLK _29368_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_2487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14594_ _14593_/X _14823_/A1 _14817_/A2 _32413_/Q _14594_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_1857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19532__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19121_ _19203_/A2 _27940_/Q _19151_/S _19121_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28319_ _28319_/Q _30294_/CLK _28319_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16333_ wire3243/X wire1741/X _16333_/X _16966_/A2 _32355_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_256_4722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_4332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21875__C1 _22966_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30589__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15149__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2975_A _18624_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29299_ _29299_/Q _29644_/CLK _29299_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_opt_25_4_core_clk clkbuf_opt_25_4_core_clk/X clkbuf_opt_25_4_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20142__A2 _19732_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25066__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17543__B1 _19849_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31834__CLK _31971_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19052_ VGND VPWR _19156_/S _19051_/X _19047_/X _19052_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14357__B1 _14333_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31330_ _31330_/Q _31553_/CLK _31330_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22419__A1 _29974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16264_ _16246_/X _29665_/D _16254_/X wire898/A _16263_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 Xclkbuf_5_6_0_core_clk clkbuf_5_6_1_core_clk/A clkbuf_5_7_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__16897__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_4777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23616__B1 wire1292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22525__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24813__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29881__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_5022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18003_ VGND VPWR _18008_/S _23286_/A1 _27937_/Q _27937_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_117_5552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_2717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15215_ VGND VPWR _15215_/X _15214_/X _15213_/X wire1134/A _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_139_3852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18099__A1 wire3875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31261_ VGND VPWR _31261_/D _31923_/CLK _31261_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__23092__A1 hold465/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19296__B1 _19296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16195_ VGND VPWR _16961_/S _29466_/Q _32120_/Q _16195_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire4091_A _28651_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21649__B _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2739 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM128_Di0[13] wire2379/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23092__B2 _30096_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19835__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4189_A wire4189/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30212_ _30212_/Q _30474_/CLK _30212_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput307 _13958_/Y la_iena[54] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25369__B1 _25381_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16649__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17846__A1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15146_ _15145_/X _15610_/B1 _15610_/A2 _28788_/Q _15146_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_133_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput318 _14012_/Y la_iena[64] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_1797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26566__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25908__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31192_ _31192_/Q _31760_/CLK _31192_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_61_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput329 _14002_/Y la_iena[74] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output643_A _19512_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31984__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3399 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26030__A1 _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15857__B1 _15847_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26030__B2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23919__A1 wire4137/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29111__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20850__B1 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30143_ _30143_/Q _30483_/CLK _30143_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_1098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19954_ _19953_/X _28625_/Q _28625_/D _19988_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15077_ VGND VPWR _15077_/X _15076_/X _15075_/X _15561_/C1 _15762_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_133_3440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15321__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24041__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23864__B _24888_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26581__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19599__A1 _28472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18905_ VGND VPWR _28186_/Q _28218_/Q _19088_/S _18905_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_14028_ _28469_/Q _14028_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_267_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21665__A _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25137__A _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30074_ hold128/A _31679_/CLK _30074_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_23_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1030 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19885_ _19884_/X _28592_/Q _28592_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_250_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_1041 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15609__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31214__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1052 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4824 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17074__A2 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1063 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18271__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1441_A _17912_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18836_ _19380_/A2 _28279_/Q _19380_/B1 _18836_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_0_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1539_A wire1539/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29261__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24976__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3159 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23147__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24344__B2 _31987_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25541__B1 _25547_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18767_ _18767_/X wire1675/X _18765_/X wire1914/X _18763_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_222_5113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15979_ VGND VPWR _16566_/S _28086_/Q _29042_/Q _15979_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_184_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22355__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24895__A2 _19530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18023__A1 _23272_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_2879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_3897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17718_ VGND VPWR _17730_/S _17717_/X _17704_/X _17718_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19220__B1 _20870_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1706_A wire1707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18698_ _18698_/X _30089_/Q _23343_/C _22123_/B1 _18696_/X VGND VPWR _18692_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__19789__B _19789_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30976_ _30976_/Q _31966_/CLK _30976_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27294__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26097__A1 _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31364__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16034__B1 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17377__A3 _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27833__A2 _32538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26636__A3 _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17649_ VGND VPWR _17764_/B _17624_/X _17648_/X _17649_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15388__A2 _23466_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22107__B1 _22123_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16585__B2 wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17782__B1 _17501_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25303__C _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_4148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13911__A _28586_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19714__C_N _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire894_A wire894/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27498__S _27503_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20660_ VGND VPWR _29197_/D _25087_/B _20660_/A _26542_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_105_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_1432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28979__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_4178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_2819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19523__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18326__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_1919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19319_ _19357_/B _27918_/Q _19319_/X _19318_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XFILLER_14_3469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16337__A1 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30863__D wire722/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20591_ VGND VPWR _20598_/S _27684_/A1 _29106_/Q _29106_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_5409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32577_ _32577_/Q _32577_/CLK _32577_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21330__A1 _21550_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20133__A2 _19534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27597__B2 _27597_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_2521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22330_ _22330_/X wire3213/A _18190_/X _22338_/A _22370_/A2 _29743_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_273_3108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16888__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31528_ VGND VPWR _31528_/D _32564_/CLK _31528_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_179_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_4090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_4888 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_5524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25072__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28209__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23120__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22261_ _22261_/X _22259_/X wire828/X _22260_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_195_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31459_ _31459_/Q _32300_/CLK _31459_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_wire3191_A wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15560__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24280__B1 _20364_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19826__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24000_ wire4076/X _25022_/B _23999_/X _31166_/Q _24000_/X _19995_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_131_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21212_ _21213_/A _22552_/B _21104_/B _23342_/B _23053_/D _21285_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__23608__A2_N wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_4271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17837__A1 _31727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_2803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22192_ _22213_/D _29826_/Q _29828_/Q _29827_/Q _22192_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_47_2533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15848__A0 _28742_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14461__B _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26021__B2 _24599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1406_A _19317_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20841__B1 _29351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_1870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21143_ VGND VPWR _21151_/S _29586_/Q _27236_/A0 _29586_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19039__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15312__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24032__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23774__B _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3456_A hold491/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26572__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28359__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29164__D _29164_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24583__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23266__S _23267_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29604__CLK _32433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25047__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2317 VPWR VGND wire2317/X wire2318/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21074_ VGND VPWR _21095_/S _27143_/A1 _29525_/Q _29525_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25951_ _25950_/X _27131_/B _31497_/Q _25935_/X _31489_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_227_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2328 _14210_/Y wire2328/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21397__A1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22594__A0 wire3699/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2339 VPWR VGND wire2339/X wire2340/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_247_814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1605 VPWR VGND wire1605/X _19861_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_24902_ _25703_/A _24901_/Y _24950_/A2 _31095_/Q _31095_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20025_ _26224_/A _20024_/Y wire851/X _28659_/Q _28659_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_246_302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_5095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_1458 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18587__C _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28670_ _28670_/Q _32160_/CLK _28670_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_134_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3623_A wire3624/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26324__A2 _31650_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25882_ VGND VPWR wire2626/X _19503_/A _25881_/X _25882_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_3_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_3248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_4837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4383 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16273__B1 _28094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24335__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27621_ VGND VPWR _27621_/S _27701_/A1 _32363_/Q _32363_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31707__CLK _31722_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24833_ wire868/A _31061_/Q _24833_/Y _24442_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_99_2987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22879__A2_N _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14189__A _14189_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14823__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2667 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1583_A wire1587/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23689__A3 _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24886__A2 _14209_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout939_A fanout941/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29754__CLK _29803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18014__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_1201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_880 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_3081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_2689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27552_ _27552_/A _27552_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_58_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22897__A1 _30111_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24764_ _31462_/Q _24770_/A _31461_/Q _24771_/A _24763_/Y _24762_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 XFILLER_262_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold252_A hold252/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_73_3839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21976_ VGND VPWR hold266/A _21974_/Y _21975_/Y _29797_/D _22074_/B1 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_208_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27285__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26088__A1 _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16025__B1 _28779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_10 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17368__A3 wire3572/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26503_ VGND VPWR _26539_/B _31741_/D _26502_/Y _31741_/Q _31740_/Q _26508_/B VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_227_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_21 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23715_ _23715_/X wire1609/X _31516_/Q _25982_/B _31564_/Q _20671_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_32_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26627__A3 _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22992__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20927_ VGND VPWR _20931_/S _29392_/Q wire3980/X _29392_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_32 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3992_A _29384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27483_ VGND VPWR _27483_/S _32298_/Q _32299_/Q _27483_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15379__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24099__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16576__A1 _16956_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18095__S _18119_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24695_ _24701_/D _24707_/B _31473_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_279_5478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_43 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17773__B1 _14305_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25835__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30731__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_54 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31857__CLK _32582_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29222_ _29222_/Q _31959_/CLK _29222_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_260_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13821__A _31125_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26434_ _31698_/D _26432_/X _26182_/A _26433_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_193_5009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19732__D_N _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_76 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20109__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23646_ VGND VPWR _23666_/S _24216_/A0 _30776_/Q _30776_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20858_ VGND VPWR _20858_/S _30227_/Q _29389_/Q _20858_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_2840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_87 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_98 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27037__B1 _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29153_ _29153_/Q _32439_/CLK _29153_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25510__A _31334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_3003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26365_ _26364_/X _31670_/Q _31670_/D wire781/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__16328__A1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23577_ VGND VPWR _23593_/S wire1826/X _30497_/Q _30497_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25048__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2952 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20789_ _20989_/A _24210_/B _20789_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XFILLER_197_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire902 VPWR VGND wire902/X wire904/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_221_2564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_123_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28104_ _28104_/Q _32324_/CLK _28104_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14355__C _16987_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14339__B1 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29339__D _29698_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25316_ _25316_/X _25380_/C _31266_/Q _25414_/B1 _31258_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_104_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16879__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22528_ VGND VPWR _23523_/S _29817_/Q _30028_/Q _30028_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29084_ _29084_/Q _32428_/CLK _29084_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_156_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26796__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26296_ _26295_/Y _26184_/A _31636_/Q _26301_/B _31636_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30881__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15000__A1 _28415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20654__A _20654_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28035_ _28035_/Q _30156_/CLK _28035_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29134__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19278__A0 _19276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25247_ _25247_/X _25263_/B1 _29864_/D hold102/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_156_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22459_ wire3112/A _22458_/X _22513_/A2 _17019_/X _29990_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire979 VPWR VGND wire979/X wire979/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16343__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24271__B1 _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3131_A wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19817__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2389_A wire2390/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20373__B _25722_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15000_ VGND VPWR _15716_/S _28415_/Q _29080_/Q _15000_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_65_3345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17828__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3979 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_1937 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22821__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17828__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26979__C _26979_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26548__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3435 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25178_ _25178_/B _31219_/D _25178_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_272_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input68_A la_input[120] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_4051 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_3378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3413 _27075_/C1 _26999_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14371__B _31003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_398_core_clk _30432_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15839__B1 _28774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30111__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_15_0_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31237__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24129_ _25980_/A2 _28605_/Q _24129_/X _24139_/A2 _28477_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_269_427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24023__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16500__A1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15303__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2556_A _20249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27760__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29986_ _29986_/Q _30406_/CLK _29986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3457 hold431/X _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25220__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_327_core_clk _30482_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_24_3031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29284__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3541 wire3541/A _14127_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16951_ VGND VPWR wire981/X _28804_/Q _28836_/Q _16951_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28937_ _28937_/Q _32329_/CLK _28937_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_133_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3552 VPWR VGND _17424_/B _30996_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2756 _14137_/Y _24284_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14798__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_5113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22585__A0 _22584_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_1946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3574 VPWR VGND wire3574/X _30870_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3598_A _19584_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15902_ _15902_/X _29619_/Q _16515_/B1 _16150_/A3 _15957_/S _15901_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_43_2975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2840 VPWR VGND wire2840/X wire2840/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17056__A2 _21653_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3585 VPWR VGND wire3585/X wire3586/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_277_471 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19670_ _25982_/A _19680_/B wire2666/A _19563_/A _19680_/A _19670_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__19450__B1 _28445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3596 VPWR VGND _17267_/D _30765_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16882_ VGND VPWR _16918_/S _32071_/Q _29130_/Q _16882_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27512__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28868_ _28868_/Q _32355_/CLK _28868_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_206_5108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30261__CLK _31158_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31387__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2873 VPWR VGND _21094_/S _21095_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_108_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23129__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16264__B1 _16254_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_4104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2884 VPWR VGND _20788_/S _20783_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_18621_ VGND VPWR _18625_/S wire3825/X _28335_/Q _28335_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24326__B2 _31978_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27819_ VGND VPWR _25799_/D _32533_/Q _32534_/Q _27821_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_15833_ _16149_/A2 _16149_/A1 _28942_/Q _15833_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire2895 VPWR VGND _20614_/S _20606_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_280_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output224_A wire3504/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28799_ _28799_/Q _32437_/CLK _28799_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22337__B1 wire3160/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_2144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3765_A wire3770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18005__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18552_ _30430_/Q _30431_/Q _18552_/Y _30427_/Q _18552_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 X_30830_ _30830_/Q _32015_/CLK _30830_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15764_ _15735_/X _29164_/D wire1064/X _15745_/X _15763_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_2 XFILLER_124_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22888__A1 _30476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27876__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16016__B1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14290__A2 _30319_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20899__A0 _29378_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27322__D _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17359__A3 _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17503_ _17503_/A _27231_/D _17503_/X _17503_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_128_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22352__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14715_ _14882_/A2 _14715_/X _14714_/X wire1104/X _29459_/Q wire1508/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_57_2150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22747__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30761_ VGND VPWR _30761_/D _32412_/CLK _30761_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18483_ VGND VPWR _18489_/S _23285_/A1 _28256_/Q _28256_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16567__A1 _16956_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21651__C _21651_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15695_ _15694_/X _15740_/B1 _15752_/A2 _29485_/Q _15695_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20376__B_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2003 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21560__A1 _21484_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_450 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21283__A_N _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25826__B2 _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_461 wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32500_ _32500_/Q _32551_/CLK _32500_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_472 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17434_ VGND VPWR _17430_/X _17434_/X _26974_/B _32273_/Q _17245_/X hold32/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_204_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14646_ _14645_/X _14675_/S _15629_/A2 _28943_/Q _14646_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire4104_A _28632_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_483 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30692_ hold387/A _31436_/CLK input98/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_256_5220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_494 wire707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14546__B _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_3141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_3764 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_4227 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32431_ _32431_/Q _32431_/CLK _32431_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2256_A wire2255/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17365_ VGND VPWR _17365_/X wire2102/X _17363_/X _17302_/A hold41/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16319__A1 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_19 _29201_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27579__A1 _32227_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_43_core_clk _32541_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_14577_ _14572_/Y _15612_/B _14937_/A1 _14576_/X _14577_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20115__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14593__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15790__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3748 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19104_ _19096_/X _19103_/X _22090_/B1 _19098_/X _19104_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_220_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14265__C _29963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16316_ _16938_/A2 wire3285/X _28987_/Q _16316_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_217_4503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_5587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32362_ _32362_/Q _32434_/CLK _32362_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21863__A2 _21842_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17296_ _17296_/X _17296_/B1 wire3558/A wire3555/X wire2048/X VGND VPWR _17295_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__32012__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25054__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31313_ _31313_/Q _31313_/CLK _31313_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19035_ _19203_/A2 _28000_/Q _19151_/S _19035_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_135_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16247_ VGND VPWR _16826_/S _28785_/Q _28817_/Q _16247_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_234_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_4105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1391_A _26017_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_5315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32293_ _32293_/Q _32293_/CLK _32293_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_66_2408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24262__B1 _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19808__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17576__C _17576_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1489_A wire1489/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21076__A0 _29527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23604__A3 wire1877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28501__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31244_ hold99/A _32297_/CLK _31244_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23875__A _31459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22812__A1 _30468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29627__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16178_ VGND VPWR _16566_/S _32052_/Q _29111_/Q _16178_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_48_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26003__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26251__A _31614_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27200__B1 _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20667__A2_N wire1282/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_2413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15129_ wire3251/X _14539_/B _15129_/X _15609_/B1 _32124_/Q _14544_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_135_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18492__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17295__A2 _31908_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32162__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24014__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31175_ _31175_/Q _32470_/CLK _31175_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1656_A wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27751__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26554__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25357__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_5061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2792_A _27505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30604__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27781__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30126_ _30126_/Q _30385_/CLK _30126_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_4968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19937_ _25079_/A wire1317/X _19937_/X _19937_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_116_2255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20503__S _20512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22576__A0 _30349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28651__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_2228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_4269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17047__A2 _21640_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_3478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_116_2299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30057_ _30057_/Q _30057_/CLK _30057_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22040__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27503__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19868_ VGND VPWR _19539_/X _26838_/A4 _25738_/B _19868_/X _26159_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_20_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20051__A1 wire4035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19992__A1 _28644_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18819_ _18819_/X _18818_/X _18813_/X wire1900/X _18811_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_90_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_603 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19799_ wire881/X _19786_/B _19811_/A _19799_/X _26779_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__14805__A1 _14937_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24868__A2 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30754__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22938__B _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21830_ _21830_/A _21830_/X _21830_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_206_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21842__B _21842_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29007__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22879__B2 _22878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3037_A _18364_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27267__A0 _27266_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21000__A0 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16007__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17717__A2_N _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_3374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_4843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18547__A2 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_3265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_3555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23115__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21761_ _14408_/B wire1855/A _18535_/C _17015_/X _21761_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_276_5618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_1576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30959_ _30959_/Q _31282_/CLK _30959_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17755__B1 _17662_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23500_ VGND VPWR _23522_/S _23499_/X _31954_/Q _30436_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_181_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_2974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20712_ VGND VPWR _20716_/S _29228_/Q _27507_/A1 _29228_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3204_A _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24480_ VGND VPWR _31037_/D _26238_/A _24480_/A _24480_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_198_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21692_ _21628_/X _21696_/C _21905_/S _21691_/X _21956_/B _21677_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_72_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15230__A1 wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27019__B1 _31991_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14456__B _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25293__A2 _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28031__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26490__B2 _31704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23431_ _23431_/Y _23432_/B _29820_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__21839__C1 _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_1994 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25330__A _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29157__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20643_ VGND VPWR _20650_/S _27703_/A1 _29189_/Q _29189_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18643__S _18646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23769__B _31789_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15781__A2 _15778_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1164_A _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26145__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3516 VPWR VGND wire3515/A _31090_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_14_2554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26150_ _26148_/A _26149_/Y _26159_/B _31564_/Q _31564_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__29159__D _29159_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23362_ VGND VPWR _23366_/S _30340_/Q _29658_/Q _30340_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_1937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18180__A0 wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20574_ VGND VPWR _20584_/S _27700_/A1 _29090_/Q _29090_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26778__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3549 VPWR VGND _17295_/B2 _17433_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_10_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25101_ _24311_/C _31193_/Q _26542_/C _25962_/D _25103_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_27_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30134__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22313_ VGND VPWR _23385_/S _29899_/Q _29158_/Q _29899_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_200_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length2826 VPWR VGND _23672_/S _23661_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_153_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26081_ _26090_/C _31541_/Q _31539_/Q _31540_/Q _26081_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_23293_ VGND VPWR _23298_/S wire3836/X _30275_/Q _30275_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21289__B _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3573_A _30871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2837 VPWR VGND _23299_/S _23301_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16730__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14472__A _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32505__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21067__A0 _29518_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28181__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1429_A _18293_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25032_ _25776_/C _25031_/X _25082_/A2 _31159_/Q _31159_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_66_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22244_ VGND VPWR _22280_/S _30310_/Q _30400_/Q _22244_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14741__B1 wire1202/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3837 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22803__A1 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22803__B2 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20814__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18483__A1 _23285_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17286__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29840_ _29840_/Q _30455_/CLK _29840_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_99_4120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22175_ VGND VPWR _22175_/X _22172_/Y _22174_/X wire2275/X wire826/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_255_2693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26545__A2 wire2630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25348__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3838_A wire3839/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25202__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2081 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2019 _17501_/X _17873_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__30284__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput660 wire2711/X mprj_dat_o[23] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_27_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20290__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1892_A _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput671 wire2337/X mprj_dat_o[4] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27691__S _27698_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21126_ VGND VPWR _21139_/S _27154_/A1 _29570_/Q _29570_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_25_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15836__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput682 _31459_/Q mprj_wb_iena VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2103 wire2104/X wire2103/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_29771_ hold373/A _31921_/CLK _29771_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_151_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26983_ _31976_/Q _31977_/Q _26985_/B _26986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__20413__S _20417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2114 wire2115/X wire2114/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xoutput693 _14123_/A spi_csb VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22567__A0 _22566_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1318 _26687_/C wire1319/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_5_3456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2125 VPWR VGND wire2125/X wire2125/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24020__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1329 VPWR VGND wire1330/A wire1334/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_131_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2136 VPWR VGND _20124_/B _19782_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28722_ VGND VPWR _28722_/D _31510_/CLK _28722_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17038__A2 _21651_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18235__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13816__A _31130_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1402 VPWR VGND wire1402/X wire1403/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25934_ VGND VPWR _25941_/A _31524_/Q _31555_/Q _25934_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_21057_ VGND VPWR _21057_/S _30050_/Q _29515_/Q _29515_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire2147 VPWR VGND _24947_/B _19774_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22031__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18235__B2 wire3872/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1413 VPWR VGND _23497_/S _23485_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_251_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2158 _24941_/B _19768_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__27899__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold467_A hold467/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19983__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20008_ wire850/X _20008_/Y _14197_/Y _19792_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 X_28653_ VGND VPWR _28653_/D _32553_/CLK _28653_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25865_ VGND VPWR _25874_/D _31453_/Q _31452_/Q _25869_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16797__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30768__D _30768_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14257__C1 _14256_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21790__A1 _21640_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24859__A2 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22848__B _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27604_ VGND VPWR _27616_/S _27684_/A1 _32346_/Q _32346_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_164_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24816_ _31701_/Q _31702_/Q _24817_/C _31700_/Q _31699_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__19503__A _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input122_A la_input[54] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28584_ _28584_/Q _30865_/CLK _28584_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25796_ VGND VPWR _32527_/Q _32528_/Q _32526_/Q _25796_/X _32529_/Q _32525_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_wire2137_A _19780_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25520__A3 _19428_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27258__A0 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3273_A _14518_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27535_ _31382_/Q _27534_/Y _27532_/Y _27594_/B _27535_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_19_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24747_ _24747_/B _24784_/A _31451_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__19222__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16549__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21959_ VGND VPWR _21958_/X _22063_/A _21950_/X _21960_/B _21955_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_15_3008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17746__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14500_ _22078_/C _14500_/X _30440_/Q _29714_/Q _14049_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_177_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16013__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17857__A1_N _17709_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15480_ _15751_/A1 _16910_/A2 _15480_/X _15727_/A2 _28893_/Q _16891_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__15757__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27466_ VGND VPWR _27476_/S _32291_/Q _27465_/X _32291_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_3158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_4563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24678_ _24680_/A _24678_/C _31469_/Q _24678_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XFILLER_204_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32035__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_4405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15221__A1 _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14366__B _29447_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29205_ _29205_/Q _31436_/CLK _29205_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_50_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14431_ hold249/A _14428_/Y _14430_/Y _21462_/B _14431_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_4 XFILLER_145_2495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26417_ _26417_/X _31690_/Q _31692_/Q _31691_/Q _26420_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_52_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23629_ VGND VPWR _31077_/Q _31080_/Q _31081_/Q _23630_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__23295__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27397_ VGND VPWR _27403_/S _27268_/X _32246_/Q _32246_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15772__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_3494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3346_A _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26055__B _31534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17150_ _22512_/A2 _30006_/Q _17149_/X _17150_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29136_ _29136_/Q _30412_/CLK _29136_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28524__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14362_ _14362_/B _14362_/Y _14362_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 Xwire710 VPWR VGND wire710/X wire710/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_26348_ _24284_/D _27120_/B _26350_/C _26785_/B _26348_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__14980__B1 _29563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_4269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21845__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire721 wire721/X wire721/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_67_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18171__B1 _18170_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25036__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput17 VPWR VGND hold9/A hold8/X VGND VPWR NF_sky130_fd_sc_hd__buf_2 Xwire732 VPWR VGND wire732/X wire732/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_158_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16101_ VGND VPWR _16823_/S _28845_/Q _28877_/Q _16101_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire743 VPWR VGND wire743/X wire743/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27068__D_N _27053_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput28 hold44/X hold45/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_10_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17169__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire754 VPWR VGND wire754/X wire755/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xinput39 VPWR VGND irq[0] input39/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 X_17081_ VGND VPWR _17089_/S _17080_/X _17079_/X _30385_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29067_ _29067_/Q _31927_/CLK _29067_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32185__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14293_ _14245_/B _14293_/B _14293_/X _29975_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_193_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2673_A _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26279_ VGND VPWR _14200_/Y _19503_/A _26267_/B _26279_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_6_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16721__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26784__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16032_ VGND VPWR _16032_/X _16031_/X wire1032/X _16039_/C1 _16030_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28018_ _28018_/Q _30415_/CLK _28018_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24795__A1 _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30627__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire798 wire798/X wire798/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__14732__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23695__A _23695_/A VGND VPWR VPWR VGND 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XANTENNA__28674__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2891 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3221 _14319_/Y _21465_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2840_A wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18474__A1 wire3891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26502__C _26502_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17277__A2 wire3589/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22270__A2 _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27733__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_2012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_161_core_clk _31803_/CLK clkbuf_opt_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_216_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4050 wire4051/X wire4050/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_237_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24303__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20281__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15288__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4061 VPWR VGND wire4061/X _28663_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3265 _14094_/Y _21778_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_251_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15827__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4072 VPWR VGND wire4072/X wire4073/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2531 VPWR VGND _20506_/S _20486_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_215_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_2045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_5245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17983_ VGND VPWR _17983_/S _18532_/A1 _27920_/Q _27920_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_113_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20323__S _20323_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22558__A0 wire3705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29969_ _29969_/Q _32277_/CLK _29969_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_130_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22104__A _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output439_A _13858_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30777__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3360 VPWR VGND _25448_/A wire3362/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_max_length2004_A _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19722_ _25881_/B wire863/A _26335_/B _20654_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 Xfanout1830 _18232_/Y _27689_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16934_ _16934_/X _29583_/Q _16934_/A2 _16960_/B2 _16458_/S _16933_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__25578__A_N _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22022__A2 _21646_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19423__B1 wire3429/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3382 VPWR VGND wire3382/X wire3383/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_188_4999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1841 VPWR VGND _27234_/A0 _18166_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire4054_A wire4055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3393 VPWR VGND wire3393/X wire3394/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1852 _14438_/X _21946_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_187_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20033__A1 _28663_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1863 VPWR VGND _22807_/S wire1866/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19974__A1 _28635_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18777__A2 _19306_/B VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__buf_8 X_16865_ _16865_/X _16934_/A2 _16864_/X _29645_/Q _16944_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xwire2692 VPWR VGND wire2692/X wire2693/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_output606_A _28706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23861__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21781__B2 _21708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_5640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18604_ VGND VPWR _18616_/S wire3878/X _28318_/Q _28318_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_1553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 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VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19726__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21154__S _21168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_3405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28054__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30813_ _30813_/Q _32015_/CLK _30813_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18535_ wire3746/A _23040_/S _18535_/C _18535_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_4 XFILLER_245_3585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15747_ _16956_/A2 _15747_/A1 _28900_/Q _15747_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19132__B _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16248__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31793_ _31793_/Q _32582_/CLK _31793_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_3383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21533__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14557__A _28390_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_3274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_1164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2279_A wire2281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17201__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30744_ hold237/A _32532_/CLK _30744_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_4049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18466_ VGND VPWR _18466_/S _23301_/A1 _28240_/Q _28240_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15748__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20993__S _21018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15678_ VGND VPWR _15678_/X _15677_/X _15676_/X _15543_/S _15744_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_280 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26472__A1 _31701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25275__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_291 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18971__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30157__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17417_ _17417_/B _14401_/A1 hold7/X _17417_/X _17417_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_128_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14629_ wire1533/X _14816_/A1 _28742_/Q _14629_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_261_1451 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23286__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22089__A2 wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30675_ _30675_/Q _31467_/CLK hold388/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18397_ VGND VPWR _18397_/S wire3818/X _28174_/Q _28174_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18463__S _18464_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16960__A1 _32444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31402__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32528__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2446_A _24210_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16960__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32414_ _32414_/Q _32432_/CLK _32414_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27776__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17348_ hold56/X _17433_/A1 _17348_/X input179/X _17432_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_31_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_3225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27421__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18701__A2 _22095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2805_A _27153_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_5078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24235__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32345_ _32345_/Q _32345_/CLK _32345_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_3209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17279_ VGND VPWR _17278_/X _26974_/B _29844_/D _17245_/X _32296_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_193_4683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1773_A _18805_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14318__A3 _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15515__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_249_core_clk _32569_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_89_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19018_ _19306_/B _28354_/Q _19017_/X _19018_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_137_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22246__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20290_ VGND VPWR _20290_/S _27261_/A0 _28832_/Q _28832_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32276_ VGND VPWR _32276_/D _32296_/CLK _32276_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_252_4279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_5111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31227_ hold104/A _31552_/CLK _31227_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18465__A1 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27724__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26527__A2 _26533_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_opt_14_1_core_clk clkbuf_opt_14_1_core_clk/X clkbuf_opt_14_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_6_3721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20272__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16476__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_2154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_3398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25735__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_29_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_5166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31158_ _31158_/Q _31158_/CLK _31158_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_135_2664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20233__S _20236_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22549__A0 _30049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24002__A3 _24001_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1591 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30109_ _30109_/Q _30404_/CLK _30109_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_246_4017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23210__A1 _30202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23980_ _28558_/Q _20128_/B _23972_/X _28718_/Q _23980_/X _24188_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_135_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31089_ _31089_/Q _31536_/CLK _31089_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_229_633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20024__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19965__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18768__A2 _18757_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23544__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21853__A _21853_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21918__A2_N wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22931_ _30115_/Q _22938_/B _30115_/D _22929_/X _22930_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_96_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25325__A _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17976__A0 _27913_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30588__D _30588_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16779__A1 wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_0_core_clk_A core_clk VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18638__S _18658_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27583__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21772__A1 _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4473 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25650_ _25648_/B _31383_/Q _25648_/A _30761_/Q _25652_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_243_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21572__B _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22862_ _22861_/X _22935_/A _22933_/S _29897_/Q _22871_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_168_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32058__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15451__A1 _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14254__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_4075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24601_ _24602_/A _24601_/Y _31544_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_246_1914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_3344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21813_ _21632_/X _21812_/X _21631_/X _21713_/A _21813_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_129_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25581_ _25584_/B _25629_/A hold98/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 X_22793_ _22793_/A _22793_/X _22793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_0_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17728__B1 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15062__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27320_ VGND VPWR _27321_/S _32179_/Q _27278_/X _32179_/D VGND VPWR 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XFILLER_202_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26463__A1 _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25266__A2 _25187_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_2061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18940__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27251_ VGND VPWR _27264_/S _32126_/Q _27251_/A0 _32126_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24463_ _24480_/A _31027_/D _26539_/B _24462_/Y _24458_/C wire2253/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__31082__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23277__A1 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2657 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21675_ _21674_/C _21674_/A _21506_/A _21674_/D _21675_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18373__S _18397_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15754__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19696__C _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1546_A wire1557/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26202_ VPWR VGND _31589_/D _26202_/B _26224_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_274_5172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23414_ _30484_/Q _30414_/Q _23415_/B _30413_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_55_1997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27686__S _27698_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20626_ VGND VPWR _20646_/S _27686_/A1 _29172_/Q _29172_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27182_ _32084_/D _27185_/A _27280_/C _27181_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XANTENNA__22485__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14962__B1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21827__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18689__D1 wire2270/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24394_ _24392_/Y _24437_/B _31001_/D _24401_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__20408__S _20408_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27412__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_3407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26215__B2 _32286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26133_ VGND VPWR _19531_/B _19563_/A _26159_/B _26133_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_218_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28697__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24226__A0 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23345_ _23349_/C _30334_/Q hold467/A _30333_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19993__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20557_ VGND VPWR _20562_/S _27140_/A1 _29073_/Q _29073_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16164__C1 _29047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15506__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_68_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26766__A2 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1713_A _23376_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29942__CLK _31914_/CLK VGND VPWR VPWR VGND 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NF_sky130_fd_sc_hd__decap_8 XANTENNA__18456__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17259__A2 wire2091/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22227_ VGND VPWR _22241_/D _29833_/Q _22135_/A _22227_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xmax_length1966 VPWR VGND _18795_/S _18982_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_7_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27715__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26518__A2 _26515_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2499 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2087_A wire2088/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_5408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20651__B _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_5528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20263__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16467__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24529__A1 _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21239__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18593__A_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29823_ VGND VPWR _29823_/D _30395_/CLK _29823_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__25726__B1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22158_ _21051_/B _22158_/Y _21035_/Y _22177_/D _22156_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_2 XFILLER_62_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27191__A2 _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput490 _28652_/Q la_output[103] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout1115 VPWR VGND _15740_/B1 wire1118/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20370__C _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18208__A1 _29856_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1126 _15561_/C1 wire1128/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_21109_ VGND VPWR _21116_/S _27680_/A1 _29553_/Q _29553_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23201__A1 _30193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18208__B2 _29864_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22004__A2 _21659_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29754_ _29754_/Q _29803_/CLK _29790_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1137 _14549_/Y _14935_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_14980_ _16840_/A2 _15266_/A1 _29563_/Q _14980_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_22089_ _22513_/C1 _22088_/X wire828/A _29812_/Q _29812_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_188_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26966_ _27006_/D _26966_/C _27042_/B _26966_/B _26966_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_183_5542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1148 wire1151/A _15756_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25741__A3 _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1210 VPWR VGND wire1210/X wire1210/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27479__A0 _32297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20015__A1 _28654_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1159 _15610_/A2 _15597_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_99_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14493__A2 _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19956__A1 _28626_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18759__A2 _19200_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1221 VPWR VGND wire1221/X wire1221/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28705_ _28705_/Q _32014_/CLK _28705_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_229_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28077__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1232 wire1232/X wire1232/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_13931_ _28566_/Q _13931_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_60_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25917_ _31476_/Q _25917_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_18_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29685_ _29685_/Q _32571_/CLK _29685_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_5586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25870__A_N _25877_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26897_ _27087_/C1 _26896_/Y _26900_/A _31898_/Q _31898_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire1254 VPWR VGND wire1254/X _24111_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_112_2472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29322__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1265 VPWR VGND wire1265/X _23973_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3296_A _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28636_ _28636_/Q _32551_/CLK _28636_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16650_ _16650_/X _29262_/Q _16818_/A2 _16841_/B2 _16843_/A2 _16649_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire2421_A _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16234__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17431__A2 _31930_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_5561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13862_ _13862_/Y _28635_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 Xwire1287 VPWR VGND _26333_/B wire1288/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25848_ VGND VPWR _31444_/Q _31445_/Q _31443_/Q _25849_/B _31446_/Q _31442_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_129_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1298 VPWR VGND wire1298/X wire1299/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19971__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15442__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_4497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_4235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15601_ VGND VPWR _15601_/X _15638_/B1 _15611_/A1 _15600_/X _15599_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_207_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16581_ wire996/X _16581_/X _16580_/X wire958/X _28794_/Q wire1470/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_259_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28567_ VGND VPWR _28567_/D _31884_/CLK _28567_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_262_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13793_ _31153_/Q _13793_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_38_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25779_ _31417_/Q hold487/A _31418_/Q _25781_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__16068__S _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21515__A1 _30355_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25889__B _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31425__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21515__B2 _30470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20098__B _20165_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24793__B _24793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19184__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18320_ _18320_/Y _30328_/Q _22378_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XFILLER_223_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15532_ _15531_/X _15521_/S _15723_/A2 _29328_/Q _15532_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27518_ _25641_/B _32253_/Q _27518_/X _25641_/A _32245_/Q _32261_/Q _32237_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_63_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_4746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28498_ _28498_/Q _31869_/CLK _28498_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__29472__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17195__B2 _29440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27651__A0 _32390_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25257__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18931__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18251_ _29753_/Q _18163_/B wire3712/X _18251_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_275_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_326_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2790_A _27626_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15463_ _15463_/X _29576_/Q _15646_/B1 _15546_/A3 wire1118/X _15462_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23268__A1 _29516_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27449_ VGND VPWR _27475_/S _32281_/Q hold214/A _27449_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27914__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15745__A2 _15739_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2888_A _20646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25401__C _31282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_3786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15700__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17202_ _17234_/A1 _30401_/Q _17202_/X _17234_/B2 _29441_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_29_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14414_ _21462_/B _21643_/B _14413_/X _23360_/A1 _29727_/Q _14324_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XPHY_983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_2118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18182_ wire3872/X _18158_/X _18182_/X _29860_/Q _18254_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_30460_ _30460_/Q _30460_/CLK _30460_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21818__A2 _21381_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14953__B1 wire1189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18144__A0 _28072_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15394_ _15751_/A1 _16874_/A2 _15394_/X _15738_/A2 _30793_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__20318__S _20322_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25009__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_123_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17133_ _30004_/Q _22512_/A2 _17133_/X _30392_/Q _17234_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29119_ _29119_/Q _32039_/CLK _29119_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24217__A0 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14345_ _14436_/B _21339_/C _21550_/B _14089_/Y _14347_/C _14347_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18695__A1 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30391_ _30391_/Q _30391_/CLK _30391_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22491__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19892__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17352__D1 _17351_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_342_core_clk _30404_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_136_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_2806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32130_ _32130_/Q _32423_/CLK _32130_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14705__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23629__S _31081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17064_ VGND VPWR wire886/A _17058_/X _17063_/X _30383_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_84_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14276_ _29949_/Q _14275_/Y _14300_/A _14300_/B _29980_/Q _17912_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_231_5554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22533__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output556_A _28725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16015_ _16387_/A _16447_/A1 _28947_/Q _16015_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23976__C1 _23975_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14181__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18447__A1 wire3871/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32061_ _32061_/Q _32320_/CLK _32061_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22003__A2_N _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire4171_A input5/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_1963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27706__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25129__B _25135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18312__A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25980__A3 _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31012_ _31012_/Q _31746_/CLK _31012_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_171_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21149__S _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3051 _18087_/X _18119_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_256_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23991__A2 _23989_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_3871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18852__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19127__B _19200_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14469__C1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_214_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3084 VPWR VGND _17950_/S _17941_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_230_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15147__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15130__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_2449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17670__A2 _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17966_ VGND VPWR _17972_/S wire3864/A _27903_/Q _27903_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_212_3584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20006__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21203__A0 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14484__A2 _27485_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2490_A _20948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23364__S _23366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19705_ _26861_/C1 _19704_/X _19711_/A2 _28513_/Q _28513_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15681__B2 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32200__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16917_ VGND VPWR _16922_/A _16916_/X _16915_/X _16884_/S _16949_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25145__A _31207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3929 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17897_ VPWR VGND _24600_/B _24388_/A _17897_/B VGND VPWR NF_sky130_fd_sc_hd__and2_2 Xclkbuf_opt_27_0_core_clk clkbuf_opt_27_1_core_clk/A clkbuf_5_23_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18458__S _18458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21754__A1 _21661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_4050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19636_ _26950_/C _19635_/Y _19638_/A _28483_/Q _28483_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17422__A2 hold19/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31914_ _31914_/Q _31914_/CLK hold274/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_225_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21392__B _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_2815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_2361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16848_ _16848_/X wire1044/X _16845_/X _16847_/X _16941_/C wire745/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_clkbuf_leaf_365_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15433__A1 _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24984__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_2961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24299__A3 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24153__C1 wire804/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29815__CLK _30198_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19567_ _19567_/X _19581_/A _19567_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_31845_ _31845_/Q _31879_/CLK _31845_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_5082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_182_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16779_ _16781_/A2 wire3283/A _28767_/Q _16779_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14287__A _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15984__A2 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2563_A _20195_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22703__B1 _21463_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_3637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23900__C1 _23899_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32350__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18518_ VGND VPWR _18532_/S _18644_/A1 _28290_/Q _28290_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18383__A0 _28160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17186__A1 _30210_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19797__B wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19498_ VGND VPWR _19499_/C _31330_/Q _19498_/A _31331_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_31776_ _31776_/Q _32017_/CLK _31776_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_72_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26445__A1 _31614_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25248__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2922_A _20410_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2080 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31918__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18922__A2 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_102_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_2384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15197__B1 wire1065/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30727_ _30727_/Q _32498_/CLK hold318/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18449_ VGND VPWR _18449_/S wire3864/X _28223_/Q _28223_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18193__S _18222_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16933__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_4122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29965__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2828_A _23269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22467__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21460_ _21460_/X _21455_/X _21459_/Y _21458_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_15_2660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30658_ hold287/A _31522_/CLK _30658_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_43 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18206__B _22334_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24471__A3 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20411_ VGND VPWR _20412_/S _27703_/A1 _28933_/Q _28933_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18686__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17489__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30871__D _30871_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21391_ _21403_/B _21391_/A _21391_/B _21649_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 XFILLER_176_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22482__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30589_ _30589_/Q _32424_/CLK hold148/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30942__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_253_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20493__A1 wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_3077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24759__A1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23130_ _23180_/B _18535_/B _23180_/A _23130_/X _23130_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_176_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20342_ VGND VPWR _20359_/S _27247_/A0 _28882_/Q _28882_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23539__S _23539_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32328_ _32328_/Q _32440_/CLK _32328_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length1218 VPWR VGND _15307_/C1 _15286_/C1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_157_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23766__C _31785_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_2207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14172__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23061_ VGND VPWR _23061_/C _23115_/B _23061_/X _23061_/D _23061_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_235_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18438__A1 hold475/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17580__A2_N _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32259_ _32259_/Q _32259_/CLK _32259_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20273_ VGND VPWR _20284_/S _27244_/A0 _28815_/Q _28815_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25039__B _25039_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1127_A wire1133/X VGND VPWR VPWR VGND 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XFILLER_2_3404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3536_A wire3536/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20898__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23195__A0 _30117_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26920__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23274__S _23283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18876__B _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23734__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25055__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26751_ _26750_/Y _26893_/C1 _31828_/Q _26760_/B _31828_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_282_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23963_ _30611_/Q wire1656/A _23963_/X _30547_/Q _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_113_2770 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_96_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22942__A0 _30119_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21745__A1 wire2469/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18368__S _18394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30322__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31448__CLK _32390_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21745__B2 _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25702_ _27739_/A _31398_/Q _27793_/B _27784_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 XANTENNA__16216__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26133__B1 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_141_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22914_ wire3212/X _22914_/X _22913_/B _22846_/A _22913_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__18610__A1 wire3860/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29470_ _29470_/Q _32316_/CLK _29470_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3703_A _30338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26682_ _26678_/B _31794_/D _26680_/X _27117_/C1 _31899_/Q _26681_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_0_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23894_ _23894_/X _24081_/A3 _19928_/B _28614_/Q _31092_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_17_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19953__A4 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29495__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16621__B1 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28421_ _28421_/Q _31945_/CLK _28421_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27270__A _31423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25633_ _31370_/Q _25632_/B _31378_/D _25632_/X _24576_/A _25571_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_143_5581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22845_ _22845_/B _22845_/X _22869_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_38_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27937__CLK 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NF_sky130_fd_sc_hd__diode_2 XANTENNA__18374__A0 _28151_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22776_ _22820_/B _22820_/C _22776_/X _29719_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_87_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31598__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22170__A1 _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_1777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26436__A1 _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25239__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_4454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_224 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27303_ _27311_/S _27395_/B _31386_/Q hold143/A _27303_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XANTENNA__17716__A3 _17627_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_292_core_clk_A clkbuf_opt_27_4_core_clk/X VGND VPWR VPWR VGND + NF_sky130_fd_sc_hd__diode_2 XFILLER_198_5092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24515_ _24516_/A _31220_/Q _24515_/Y _24516_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__15188__B1 _15319_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_5628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21727_ _21099_/C _21727_/X wire3206/A _22954_/S _23145_/A _16987_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XPHY_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28283_ _28283_/Q _30272_/CLK _28283_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1830_A _18232_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25495_ _19496_/X _25454_/A _31327_/D _25494_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__16924__A1 wire3243/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15727__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_4211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_2164 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_142_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1928_A wire1934/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15520__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14935__A0 _28918_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24118__B _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27234_ VGND VPWR _27238_/S _32109_/Q _27234_/A0 _32109_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2002_A wire2002/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24446_ _25197_/C _24446_/A _24446_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_8_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_5543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21658_ VPWR VGND _21658_/X _21659_/B _21659_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_130_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length3110 VPWR VGND _19504_/D _14294_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_240_2088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19469__A3 _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_1928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_3876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18677__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20609_ VGND VPWR _20615_/S _27702_/A1 _29124_/Q _29124_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27165_ VGND VPWR _27165_/S _27708_/A1 _32071_/Q _32071_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24377_ _24376_/X _24888_/D _24889_/A1 wire2017/X _30991_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22473__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19874__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23670__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21589_ _21590_/B _21595_/A _21668_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_272_3729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2431 VPWR VGND wire2430/A _14132_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26333__B _26333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14130_ VGND VPWR _14130_/X _24446_/A _24446_/B _29954_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16688__B1 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26116_ _31550_/Q _26115_/Y _26116_/Y _26121_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_4_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23328_ VGND VPWR _23334_/S _30306_/Q _17168_/X _30306_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_2173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25947__B1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27096_ _27096_/X _27116_/B _32026_/Q _27098_/A _27098_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__21040__B1_N _21039_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23676__C _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26047_ _26047_/C _26047_/A _26047_/X _26047_/B _26055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 X_14061_ _31529_/Q _26047_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_270_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23422__A1 _23563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2371_A _14183_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22225__A2 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23259_ VGND VPWR _23267_/S hold353/X _30242_/Q _30242_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_2116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1763 VPWR VGND _23805_/C _23808_/A3 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_172_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_5585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20236__A1 _28779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27106__D_N _26890_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3309_A _24820_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3156 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input50_A la_input[104] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23973__A2 wire1656/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32223__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_180_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21984__A1 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21984__B2 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17820_ VGND VPWR _17832_/S _17819_/X _17797_/X _17820_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29806_ hold395/A _30468_/CLK _29806_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17652__A2 _17565_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26372__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2636_A wire2636/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27998_ _27998_/Q _30449_/CLK _27998_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_4947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23186__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28712__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16860__B1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24922__A1 _31105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23725__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21493__A _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29838__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17751_ _17751_/X _24593_/A _31643_/Q _17474_/X _14067_/A VGND VPWR _17730_/S VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_27_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29737_ _29737_/Q _30453_/CLK _29737_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_40_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold6 hold6/A hold6/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_14963_ _14963_/X _15350_/B1 _15356_/A2 _29111_/Q _15355_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_287_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20601__S _20613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26949_ VGND VPWR _26949_/X _26949_/B _26949_/A _27053_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_21_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21736__A1 _29776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22933__A0 _29905_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_2258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_5055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16702_ VGND VPWR _16918_/S _32325_/Q _28933_/Q _16702_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_286_2269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32373__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_1934 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16207__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17404__A2 hold16/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26124__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1062 VPWR VGND wire1062/X _15766_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_13914_ _28583_/Q _13914_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_40_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18601__A1 wire3889/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17682_ VGND VPWR _17842_/S _17670_/Y _17681_/Y _17682_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_166_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3607 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27174__A_N hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29668_ hold168/A _32428_/CLK _29668_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_4671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14894_ _15614_/A2 _15577_/A2 _32421_/Q _14894_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire1084 VPWR VGND wire1084/X wire1085/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_127_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15415__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30815__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19421_ _19421_/Y _28437_/Q hold285/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_147_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16633_ _16633_/Y _16628_/X _16950_/A1 _16632_/X _16630_/X _16949_/C1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_4 X_28619_ _28619_/Q _32531_/CLK _28619_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_263_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23489__A1 _28383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13845_ _22141_/A _29821_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__23033__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29599_ _29599_/Q _32316_/CLK _29599_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_251_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28862__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25883__C1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29988__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14538__C _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26508__B _26508_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24150__A2 _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19352_ _28271_/Q _19352_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_56_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31630_ _31630_/Q _31685_/CLK _31630_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_125_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22697__C1 wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16564_ VGND VPWR _16961_/S _29539_/Q _29573_/Q _16564_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17168__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13776_ _31170_/Q _13776_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__25412__B _31285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18365__A0 _28143_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22528__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22161__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18303_ _18303_/B _18303_/Y _18328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 X_15515_ _15515_/A2 _15515_/X _15514_/X _15515_/C1 _28106_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_207_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31561_ _31561_/Q _31801_/CLK _31561_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19283_ VGND VPWR _19283_/S _19282_/X _19278_/X _19283_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length2169_A _19605_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16495_ VGND VPWR _16495_/X _16492_/X _16816_/B1 _16491_/S _16494_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__15718__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26978__A2 _26979_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30965__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30512_ _30512_/Q _32379_/CLK _30512_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18234_ _30326_/Q _30327_/Q _18234_/X _18234_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__24989__A1 _31138_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29218__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2579 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15446_ VGND VPWR _15716_/S _28427_/Q _29092_/Q _15446_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18117__A0 _28046_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_4628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_1552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31492_ _31492_/Q _31578_/CLK _31492_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_125_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output673_A wire2346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16391__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_2939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24453__A3 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5004 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18165_ _18164_/X wire3174/A _29739_/Q _18166_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 X_30443_ VGND VPWR _30443_/D _31959_/CLK _30443_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_12_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30691__D hold387/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15377_ VGND VPWR _15377_/X _15521_/S _15762_/A1 _15374_/X _15376_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_32_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22464__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23661__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23867__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_5026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17116_ _29890_/Q _21447_/B _21554_/A _23115_/C _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_272_4975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23359__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14328_ _14338_/A _14328_/Y _14338_/B _14338_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XFILLER_275_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21668__A _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25938__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30374_ _30374_/Q _32269_/CLK _30374_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18096_ VGND VPWR _18118_/S wire3886/X _28025_/Q _28025_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_193_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold406 hold406/A hold406/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_42_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_47_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold417 hold417/A hold417/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__27058__C _27058_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28242__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2503_A _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19880__A3 _19563_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold428 hold428/A hold428/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_32113_ _32113_/Q _32113_/CLK _32113_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29368__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold439 hold439/A hold439/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_17047_ _17046_/X _21640_/A _17094_/A _17043_/X _17047_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XANTENNA__15351__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23413__A1 _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14259_ VGND VPWR _14259_/X _14268_/B _14303_/A _29961_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_253_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2311_A wire2316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20227__A1 _28772_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32044_ _32044_/Q _32403_/CLK _32044_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23964__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19093__A1 wire1814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold39_A hk_dat_i[16] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19093__B2 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21975__A1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout919 VGND VPWR wire921/A wire926/A VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__30345__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25166__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17881__A _24588_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15103__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17643__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18998_ _18990_/X _18997_/X wire1905/X _18992_/X _18998_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__28392__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23177__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire722_A wire722/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23716__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22519__A3 _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16851__B1 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24913__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20511__S _20518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17949_ VGND VPWR _17949_/S wire3813/X _27887_/Q _27887_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27538__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21727__A1 _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_3005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26115__B1 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20960_ VGND VPWR _20964_/S hold209/X _29425_/Q _29425_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22356__C_N hold218/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27802__B _32525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30495__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_3477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14209__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26666__A1 _31863_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19619_ VGND VPWR wire2721/X _26866_/A1 _19638_/A _19619_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__31740__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23024__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30866__D _30866_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20891_ VGND VPWR _22550_/S _20890_/X _29374_/Q _29374_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_3791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14614__C1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19148__A2 _23515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17820__S _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_4730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22630_ _22663_/B _22630_/Y _29712_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__24141__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_2689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31828_ _31828_/Q _32552_/CLK _31828_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18356__A0 _28134_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3117_A _14284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19553__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22665__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22561_ VGND VPWR _22619_/S hold167/A wire3701/X _30058_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_37_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31759_ _31759_/Q _31762_/CLK _31759_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15709__A2 _15707_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26773__D_N _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18217__A _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_264_core_clk _32436_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__27091__A1 _26809_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24300_ hold339/A _26378_/A4 hold338/X _24284_/X _31679_/Q _26382_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__31890__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14917__A0 _28982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21512_ _21522_/B _21965_/B _21512_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_13_2619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25280_ VGND VPWR _25280_/X _25289_/A _25413_/A _25280_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_52_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22492_ VGND VPWR _22512_/A3 _22510_/A4 _22510_/A2 _22492_/X _30007_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_221_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16382__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23101__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17478__D _26488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24444__A3 _14143_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length907 VPWR VGND _16522_/B1 _16449_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_13_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24231_ VGND VPWR _24232_/S _30907_/Q _27699_/A1 _30907_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_121_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21443_ VGND VPWR _21655_/A _21441_/Y _21444_/A _21443_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_222_1073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22455__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23652__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18651__S _18655_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21889__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3486_A _31364_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_5137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26153__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19320__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_2258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24162_ _28512_/Q _27053_/A wire803/A _28704_/Q _20061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__31120__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25929__B1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32246__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21374_ _21342_/X _21775_/B _21345_/Y _21353_/A _21346_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_2 XFILLER_119_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22173__S _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1015 VPWR VGND _16828_/A2 _16835_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_172_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_4436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23113_ VGND VPWR _23113_/X _23111_/X _23112_/X _23110_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_28_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5036 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20325_ VGND VPWR _20327_/S _27708_/A1 _28866_/Q _28866_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_85_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19069__D1 _19069_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23404__A1 hold328/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24093_ wire1810/X _24092_/X _28665_/Q _24892_/B _24093_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28970_ _28970_/Q _31918_/CLK _28970_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_3893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_5503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14696__A2 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1509_A wire1521/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15893__A1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3904 VPWR VGND wire3904/X hold475/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21415__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28735__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23044_ _30421_/Q _22553_/A _18540_/X _23044_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_63_2731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27921_ _27921_/Q _30481_/CLK _27921_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire3915 VPWR VGND wire3915/X wire3916/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_137_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23955__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20256_ VGND VPWR _20259_/S _28799_/Q _27512_/A1 _28799_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18816__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3926 VPWR VGND wire3926/X _29733_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_252_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout871_A _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3937 _29720_/Q _23115_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_150_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17095__B1 _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25157__A1 _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31270__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32396__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3820_A _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3809 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26354__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27852_ _32549_/Q _27851_/Y _25809_/C _32549_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__17634__A2 _17553_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20187_ wire881/A _19778_/B _20187_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_95_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23168__B1 _23167_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15645__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24401__B _31003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30838__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24904__A1 _31096_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26803_ VGND VPWR wire2682/X _26866_/A1 _26833_/A _26803_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_284_4868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_3245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20421__S _20429_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_4999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27783_ VGND VPWR _27783_/S _25037_/B _32508_/Q _32508_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_276_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27529__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24995_ _25681_/B1 _24994_/X _25017_/A2 _31141_/Q _31141_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18098__S _18113_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21718__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1780_A _18324_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28885__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_3380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29522_ _29522_/Q _32307_/CLK _29522_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_5206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13824__A _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26106__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26734_ _26734_/Y _31782_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_2_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_5217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_5386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23946_ wire741/A _25022_/B wire4089/X _31161_/Q _19995_/B VGND VPWR _23945_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_248_1806 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17398__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18595__A0 _28309_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17398__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26657__A1 _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_802 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29453_ _29453_/Q _31970_/CLK _29453_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25513__A _25513_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26665_ _26668_/A _26665_/X _26664_/Y _26696_/D _31795_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_96_2584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_813 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23877_ _26838_/A1 wire1628/X _23876_/X _23778_/X _19680_/A _23877_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XFILLER_278_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24668__B1 _31464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15948__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2707 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_824 wire3845/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30988__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_835 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19139__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17730__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28404_ _28404_/Q _32117_/CLK _28404_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_70_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24132__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_846 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25616_ wire3532/X hold93/A _25616_/X _25580_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__28115__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input202_A mprj_dat_i[6] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22828_ _30104_/Q _22938_/B _30104_/D _22826_/X _22827_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29384_ _29384_/Q _30411_/CLK _29384_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_857 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2217_A _19734_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26596_ VGND VPWR _26595_/X wire817/X wire3454/X _26596_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_868 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2084 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20657__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14620__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_879 wire4142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21252__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25880__A2 hold488/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28335_ _28335_/Q _30030_/CLK _28335_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25547_ VGND VPWR _31351_/D hold170/A _25547_/A _25547_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_13_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22759_ _29887_/Q _22766_/B _22756_/X _22758_/X _22779_/A1 _22745_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_16_2232 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_57_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22694__A2 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2852 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_3094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3161_A _18538_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25617__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23891__B2 wire3627/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27082__A1 _27058_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15300_ _15614_/A2 _15624_/A1 _29322_/Q _15300_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_fanout3259_A wire3261/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14908__B1 wire1104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16280_ VGND VPWR _16842_/S _28986_/Q _16279_/X _16280_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_28266_ _28266_/Q _30481_/CLK _28266_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_159_4150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_2437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25478_ _25478_/Y _31319_/Q _25478_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_input98_A la_input[32] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17570__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14374__B _31005_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17570__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15231_ _15230_/X _15228_/X wire1214/X _15231_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27217_ _32100_/Q _32101_/Q _32099_/Q _25772_/D _27218_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_219_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2860 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24429_ VGND VPWR _14379_/X _31014_/Q _24428_/Y _31014_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_254_5373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15581__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23643__A1 wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28197_ _28197_/Q _30378_/CLK _28197_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19847__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23687__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29510__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2586_A _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24840__B1 _31065_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3426_A _32108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_3657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27148_ VGND VPWR _27155_/S wire1826/X _32054_/Q _32054_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15162_ VGND VPWR _15639_/S _29223_/Q _29287_/Q _15162_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17322__A1 _32286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30368__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19862__A3 _26838_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14113_ _21439_/A _14113_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__17177__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26998__B _31982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4667 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24199__A2 _24193_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19970_ _19969_/X _28633_/Q _28633_/D _19988_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_155_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15093_ VGND VPWR _15756_/S _29598_/Q _29630_/Q _15093_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17873__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27079_ VGND VPWR _32017_/D wire772/A _27078_/X _26797_/B _26999_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16530__C1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14390__A _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31613__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2294 VPWR VGND _14401_/A1 _24407_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_4701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1560 VPWR VGND _22554_/C _22444_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_81_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15884__A1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14687__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18921_ _19203_/A2 _28283_/Q _19318_/B1 _18921_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_14044_ _28453_/Q _14044_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__23946__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30090_ _30090_/Q _30217_/CLK _30090_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__29660__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_68_core_clk _31510_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_248_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21957__A1 _21956_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_1958 VPWR VGND VGND VPWR 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VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_27_2383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15097__C1 _15096_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14439__A2 _29384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24311__B _25087_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25699__A2 _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1732 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21162__S _21166_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25871__A2 _25877_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31613_ _31613_/Q _31746_/CLK _31613_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_140_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19335_ _28142_/Q _19335_/X _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_232_970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16547_ _16965_/A2 _16952_/A1 _32062_/Q _16547_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20145__B1 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28608__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13759_ _13759_/Y _31188_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XFILLER_93_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14565__A _28391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24629__A2_N _19860_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23882__B2 _28677_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27073__A1 _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_5427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31544_ _31544_/Q _32299_/CLK _31544_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19266_ VGND VPWR _19333_/B _28334_/Q _28267_/Q _19266_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31143__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16478_ _16956_/A2 _16956_/A1 _32359_/Q _16478_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__32269__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15167__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17561__A1 _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25623__A2 wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18217_ _18244_/A _18201_/A _18217_/X _18217_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_15429_ _15605_/A2 _15429_/X _15428_/X _15515_/C1 _29478_/Q _15638_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_201_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29190__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15572__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31475_ _31475_/Q _31522_/CLK _31475_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23634__A1 _31038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19197_ VGND VPWR _19197_/X _19306_/B _19318_/B1 _28072_/Q _19196_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23597__B _23597_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18471__S _18495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1686_A wire1687/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23634__B2 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19302__A2 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28758__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30426_ _30426_/Q _32108_/CLK _30426_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_216_3708 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18148_ VGND VPWR _18150_/S wire3825/X _28076_/Q _28076_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22988__A3 _32470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18510__A0 _28282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16116__A2 _16111_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20506__S _20506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold203 hold203/A hold203/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19853__A3 _26898_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_A0[6] wire3122/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold214 hold214/A hold214/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_268_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31293__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_3419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold225 hold225/A hold225/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_254_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18079_ VGND VPWR _18079_/S wire3832/X _28009_/Q _28009_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26584__B1 wire3461/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30357_ VGND VPWR _30357_/D _30507_/CLK _30357_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__16667__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17864__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2786 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold236 hold236/A hold236/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_86_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold247 hold247/A hold247/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_119_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15875__A1 wire1053/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold258 hold258/A hold258/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_20110_ _20110_/Y _20110_/B _20122_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_271_1612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_2357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold269 hold269/A hold269/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23937__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21090_ VGND VPWR _21090_/S _27509_/A1 _29541_/Q _29541_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_168_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30288_ _30288_/Q _30667_/CLK _30288_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_77_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_3758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21948__A1 _23155_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24502__A _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2904 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_3307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_3826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20041_ _25687_/B1 _20040_/Y wire847/X _28667_/Q _28667_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_259_845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32027_ _32027_/Q _32282_/CLK _32027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26336__B1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1055 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_2190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_1798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3067_A _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20081__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26887__A1 _31893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20620__A1 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20241__S _20247_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_4186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24898__B1 _24897_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22358__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23800_ wire1807/X _23799_/X _31809_/Q wire1625/X _23801_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19369__A2 _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24362__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28138__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24780_ _24780_/Y _31049_/Q _25971_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_269_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18577__A0 _20982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21992_ VGND VPWR _21992_/Y _21991_/Y _21672_/B _21672_/A _21712_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__19908__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21283__D _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22373__A1 _30475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14459__B hold480/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22373__B2 hold409/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23552__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23731_ _23732_/A _23730_/X wire1875/X _31474_/Q _24273_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA_109 _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20943_ VGND VPWR _20947_/S hold295/A _29511_/Q _29408_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_39_2221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18646__S _18646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16052__A1 _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1194_A fanout1194/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24114__A2 wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM256_Di0[2] wire2328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26450_ _26464_/C _31619_/Q _26456_/A _26453_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire3401_A _32333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23662_ VGND VPWR _23672_/S _27507_/A1 _30792_/Q _30792_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_4137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18329__A0 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20874_ VGND VPWR _20906_/S _30235_/Q _29397_/Q _20874_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23322__A0 _17120_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22125__A1 _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_3201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14602__A2 _14648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21072__S _21077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25401_ _25412_/C _31282_/Q _31284_/Q _31283_/Q _25402_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__28288__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_126_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22613_ VGND VPWR _22613_/S hold130/A _22612_/X _30082_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_52_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26381_ _26380_/X hold477/A _31678_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_101_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22676__A2 wire3661/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23593_ VGND VPWR _23593_/S wire1783/X _30513_/Q _30513_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16166__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21333__C1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29533__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1361_A wire1362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17001__A0 wire2292/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27064__A1 _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28120_ _28120_/Q _30204_/CLK _28120_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19541__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25332_ _25332_/X _25380_/C _31269_/Q _25266_/Y _31261_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_17_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22544_ VGND VPWR _22550_/S _29833_/Q _30044_/Q _30044_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_2123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25055__C_N _24925_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15158__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15012__C1 wire1228/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5540 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25614__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_4198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28051_ _28051_/Q _28275_/CLK _28051_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_5562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25263_ _25263_/X _25263_/B1 _29872_/D hold74/A _25263_/A2 VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_wire3770_A wire3770/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23086__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15563__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22428__A2 _21611_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22475_ _30332_/D _22474_/X _22513_/A2 _17087_/X _29998_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_159_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30510__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19829__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18381__S _18388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31636__CLK _31722_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16760__C1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3868_A wire3869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27002_ _27003_/B1 _27001_/Y _26999_/C _31984_/Q _31984_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20439__A1 _28959_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_4367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24214_ VGND VPWR _30890_/Q _27237_/A0 _24220_/S _30890_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__21636__B1 _14353_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27694__S _27698_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_3685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21426_ _21549_/B _21426_/Y _21426_/A _21514_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_5_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25194_ _25194_/X _25430_/A _31042_/Q _31041_/Q _25416_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__18501__A0 _28273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29683__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20416__S _20417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21100__A2 _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17304__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_4856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_4233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21101__A _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24145_ wire1622/X _24144_/X _31148_/Q _24186_/A3 _24145_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__13819__A _31127_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3109 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21357_ _21357_/Y _21360_/C _21360_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_21_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26575__B1 _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23389__B1 _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_3532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20308_ VGND VPWR _20311_/S wire1826/X _28849_/Q _28849_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23928__A2 _23922_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19057__A1 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3701 VPWR VGND wire3701/X _30340_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30660__CLK _30866_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28953_ _28953_/Q _30783_/CLK _28953_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31786__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24076_ wire721/A wire738/X _24209_/B1 _24070_/X _24075_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xwire3712 wire3712/A wire3712/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_2949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21288_ _22934_/A _21486_/B _21288_/B _21288_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_4 XFILLER_8_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24050__B2 _30723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21939__A1 _21485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_1865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22061__A0 _21610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3734 VPWR VGND wire3734/X _30320_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_95_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23027_ _25691_/B _32523_/Q _23027_/X _25693_/B _32515_/Q _28907_/Q _32507_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_27904_ _27904_/Q _32078_/CLK _27904_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_115_3374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout2949 VPWR VGND _20291_/S _20262_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17607__A2 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20239_ VGND VPWR _20257_/S _28782_/Q _27688_/A1 _28782_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_5475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3756 VPWR VGND _22924_/B _22733_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28884_ _28884_/Q _32428_/CLK _28884_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22600__A2 _30360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2167_A _19605_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15618__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3007_A _18401_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_2875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_3628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20611__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21247__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16815__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3789 VPWR VGND wire3789/X _29947_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27835_ VGND VPWR _27834_/C _32541_/Q hold488/A _27835_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_189_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31016__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24889__B1 _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26342__A3 _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_1916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16291__A1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15094__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14800_ _28979_/Q _15233_/B1 _15223_/A _15575_/C _14800_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_245_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17026__A _29879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25550__A1 _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24353__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19214__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2334_A wire2335/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15780_ wire985/X _15780_/X _15779_/X _16249_/S _29518_/Q _16150_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_27766_ _27784_/C _31398_/Q _27766_/D _27774_/S _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XFILLER_98_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29063__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24978_ _25081_/A wire1283/A _24978_/X _25043_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_223_5637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14841__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19765__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29505_ VGND VPWR _29505_/D _30359_/CLK _29505_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_14731_ wire3249/A wire1750/X _14731_/X _15296_/B1 _28809_/Q wire1705/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_59_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26717_ _26716_/Y _26694_/C _31811_/Q _26720_/A _31811_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_265_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23929_ _28458_/Q _26838_/A1 _23929_/X _28586_/Q _24046_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_32_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27697_ VGND VPWR _27700_/S _27697_/A1 _32431_/Q _32431_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_268_1073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_610 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25838__C1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17240__A0 wire3789/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_186_core_clk _32271_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_621 _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2515 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25302__A1 _25341_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24105__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_632 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29436_ _29436_/Q _32108_/CLK hold174/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_17450_ _17474_/C _31050_/Q _17452_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_204_4346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_3940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30040__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14662_ _14662_/X wire1202/X _14659_/X _14661_/X wire1089/X _14657_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_226_1901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26648_ _26648_/Y _26643_/B _26647_/Y _23765_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XANTENNA_643 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31166__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23313__A0 _17047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22116__A1 _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_654 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16594__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_115_core_clk _32379_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15251__C1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_665 wire2440/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17791__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16401_ _16965_/A2 _16952_/A1 _32058_/Q _16401_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_278_4436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32411__CLK _32513_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_676 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17381_ wire3555/A _17381_/A2 _17381_/X _17432_/B2 input184/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_31_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29367_ _29367_/Q _30391_/CLK _29367_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_70_3255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_687 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14593_ wire3249/X wire1727/X _14593_/X _14705_/B1 _32341_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__22667__A2 _29878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16076__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26579_ _31768_/Q hold196/A _31766_/Q _23744_/D _26579_/Y _31769_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_1 XANTENNA__25897__B _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14385__A _31017_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_698 _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3543_A _14293_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19120_ _19178_/B _28068_/Q _19119_/X _19120_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19532__A2 wire2630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16332_ VGND VPWR _16332_/X _16964_/B1 _16967_/A1 _16329_/X _16331_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28318_ _28318_/Q _30431_/CLK _28318_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21875__B1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26593__B1_N wire3452/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29298_ _29298_/Q _32136_/CLK _29298_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_35_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16346__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17543__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28900__CLK _32332_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20142__A3 _20175_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17543__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18740__B1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25605__A2 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30190__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14357__A1 _21711_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19051_ _19050_/X _19176_/B1 _19051_/X _19049_/X _19048_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_224_1680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16263_ _16258_/X wire890/A _16839_/A1 _16262_/X _16263_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_215_5110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28249_ _28249_/Q _31927_/CLK _28249_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15554__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16897__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16751__C1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2968_A _18616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31130__D _31130_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32561__CLK _32580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18002_ VGND VPWR _18007_/S wire3863/X _27936_/Q _27936_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_3312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24306__B _24308_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15214_ VGND VPWR _15516_/S _30502_/Q _30788_/Q _15214_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23433__A_N _29366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_68_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_5034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31260_ _31260_/Q _31282_/CLK _31260_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19296__A1 _27885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16194_ _16194_/X _29563_/Q _16966_/A2 _16722_/B2 _16722_/C1 _16193_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_core.RAM128_Di0[12] wire2374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23092__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20326__S _20327_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19835__A3 _26880_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_4442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_139_3886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30211_ _30211_/Q _30474_/CLK _30211_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25369__A1 _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15145_ wire3261/A _16814_/A2 _15145_/X _15609_/B1 _28820_/Q wire1698/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 Xoutput308 _13957_/Y la_iena[55] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_83_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17846__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31191_ _31191_/Q _31282_/CLK _31191_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput319 _14011_/Y la_iena[65] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4084_A wire4085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_2775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15857__A1 wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26030__A2 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23919__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30142_ _30142_/Q _30474_/CLK _30142_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21946__A _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15076_ VGND VPWR _15716_/S _28417_/Q _29082_/Q _15076_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19953_ VGND VPWR wire1319/A _26687_/D _19574_/X _19953_/X _26153_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__24041__A1 _28468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22541__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24041__B2 _28596_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output636_A _17879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23864__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17059__B1 _29423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_4429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18904_ VGND VPWR _19088_/S _28317_/Q _28250_/Q _18904_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19599__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14027_ _28470_/Q _14027_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_185_5231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22052__B1 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26318__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30073_ _30073_/Q _32277_/CLK _30073_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_133_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1020 wire3789/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19884_ VGND VPWR wire2207/X _26838_/A4 _24046_/B1 _19884_/X _26139_/A _19680_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__25137__B _25430_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18320__A _30328_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1031 _22236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15609__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20063__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1042 _23932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20602__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29406__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21157__S _21168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1053 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3622 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18835_ _19375_/A2 _27927_/Q _18834_/X _18835_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_168_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_1064 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14817__C1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16282__A1 wire912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24976__B _25041_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_1573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24344__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18766_ _18759_/X wire1896/A _22090_/B1 _18761_/X _18766_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_188_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20996__S _20999_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15978_ _15978_/X _30776_/Q _16434_/A2 _16722_/B2 wire958/X _15977_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_244_3403 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22355__A1 hold483/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23552__A0 _30043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22777__A _29889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_1437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31509__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26249__A _31613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14832__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22355__B2 hold432/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18974__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23372__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17717_ _31641_/Q _17717_/X _14067_/A _17475_/X _24591_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_18_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19220__A1 _19219_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14929_ wire1539/X _15607_/A1 _28750_/Q _14929_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_94_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30975_ _30975_/Q _31927_/CLK _30975_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18697_ _18696_/X _18697_/Y _18692_/X _23343_/C _22123_/B1 _30089_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XANTENNA__28430__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18466__S _18466_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29556__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17231__A0 _30405_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16034__A1 _28915_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19789__C _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26097__A2 _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19771__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2735 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_4902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_2908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27779__S _27783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17648_ VGND VPWR _17730_/S _17647_/Y _17636_/Y _17648_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_4233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22107__A1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32091__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16585__A2 wire996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17782__A1 _31722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24992__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22107__B2 _30092_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25303__D _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17782__B2 _31726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20118__B1 _20124_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15793__B1 _29005_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17579_ _31712_/D _17569_/X _17578_/X _17576_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__30533__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31659__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19523__A2 wire2625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19318_ _19358_/A2 _27886_/Q _19318_/B1 _19318_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_207_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28580__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20590_ VGND VPWR _20605_/S wire1833/X _29105_/Q _29105_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32576_ _32576_/Q _32579_/CLK _32576_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17534__A1 _26441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_1488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21330__A2 _21550_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26254__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18731__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14348__A1 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23068__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31527_ VGND VPWR _31527_/D _31553_/CLK _31527_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19249_ _30277_/Q _19249_/X _19333_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20173__C_N _19764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16888__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2908_A wire2909/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_2391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16941__C _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2859 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22260_ VGND VPWR _30113_/Q _22236_/A _22257_/X _22260_/X wire2286/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_277_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30683__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23120__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19287__A1 _28044_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31458_ _31458_/Q _32401_/CLK _31458_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_157_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20236__S _20236_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24280__A1 _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26006__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21559__C _21559_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19684__D_N _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21211_ VGND VPWR _23342_/B _21211_/B _21211_/A _23049_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_86_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21094__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30409_ VGND VPWR _30409_/D _30411_/CLK hold467/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__22800__A_N _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17837__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26557__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22191_ _22190_/X _23417_/A wire829/X _29827_/Q _29827_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_251_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3184_A _17900_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31389_ _31389_/Q _32513_/CLK _31389_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15848__A1 _29304_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19039__A1 _28288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21142_ VGND VPWR _21169_/S _29585_/Q _27680_/A1 _29585_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23547__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21856__A _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20841__B2 _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3008 VPWR VGND _18410_/S _18426_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24032__A1 wire4121/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24032__B2 _28723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3019 VPWR VGND _18398_/S _18399_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_47_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15312__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26572__A3 wire1275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18247__C1 _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24583__A2 _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21073_ VGND VPWR _21077_/S _23647_/A1 _29524_/Q _29524_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25950_ _31524_/Q _31489_/Q _31555_/Q _25934_/C _25950_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_271_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25047__B _25047_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2318 wire2319/X wire2318/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_64_2892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29086__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_2734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18798__B1 wire1950/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22594__A1 _30358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1207_A wire1210/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_76_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21067__S _21077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24901_ VGND VPWR _19543_/B _19584_/A _24950_/A2 _24901_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_20024_ VGND VPWR wire2679/X _26866_/A1 wire851/X _20024_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_112_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_2026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input5_A gpio_in_pad VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25881_ _25881_/X _26542_/A _26542_/B _25881_/B _25881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_5_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1628 VPWR VGND wire1628/X _19786_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14808__C1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16273__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27620_ VGND VPWR _27620_/S _27700_/A1 _32362_/Q _32362_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24335__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24832_ _24442_/C _31060_/D _26544_/C1 _24831_/Y wire863/A _24454_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XFILLER_58_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30063__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3616_A wire3616/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_2695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_3395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_5372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_4357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22346__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_5334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26159__A _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23282__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19747__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27809__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23689__A4 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32434__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_3525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27551_ _25641_/B _32192_/Q _27552_/A _25641_/A _32184_/Q _32200_/Q _32176_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__25063__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19211__A1 _28395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24763_ _24763_/Y _31445_/Q _31463_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19211__B2 _19199_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21975_ VGND VPWR _17166_/X _22065_/B1 _22075_/A2 _21975_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__18376__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22897__A2 wire1866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16025__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17222__A0 _17221_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26088__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1576_A _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26502_ _26502_/C _26502_/Y _31741_/Q _31740_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_262_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_11 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17368__A4 _30838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23714_ _30812_/D _23807_/B _23714_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__27689__S _27700_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20926_ VGND VPWR _20928_/S _29391_/Q _29494_/Q _29391_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_22 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27482_ VGND VPWR _27484_/S _32299_/Q _27481_/X _32299_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24099__A1 _30649_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24694_ _24683_/Y _24687_/Y _24693_/X _31453_/Q _24694_/Y _24689_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_2 XFILLER_126_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold245_A hold245/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_33 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_2682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16576__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24099__B2 _30713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25296__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_44 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28923__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18970__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17773__B2 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25835__A2 _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29221_ _29221_/Q _31586_/CLK _29221_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_55 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_162_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26433_ _31050_/Q _17473_/X _31052_/Q _17465_/D _26433_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XPHY_66 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23645_ VGND VPWR _23668_/S _27140_/A1 _30775_/Q _30775_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_3564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15784__B1 _15782_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20857_ VGND VPWR _23497_/S _20856_/X _29357_/Q _29357_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_93_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3985_A _29447_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1743_A _15537_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_88 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27037__A1 _31998_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21857__A0 _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_99 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29152_ _29152_/Q _31961_/CLK _29152_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_2521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_4019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26364_ VGND VPWR _25982_/A _24273_/D wire2197/X _26364_/X _27075_/C1 _26364_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_193_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23576_ VGND VPWR _23590_/S _27690_/A1 _30496_/Q _30496_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16328__A2 _16325_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20788_ VGND VPWR _20788_/S _27265_/A0 _29302_/Q _29302_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_87_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18722__B1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire903 VPWR VGND wire903/X wire904/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_143_2390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28103_ _28103_/Q _30507_/CLK _28103_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14339__A1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25315_ _25315_/X _31266_/Q _25314_/X _25325_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_32_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25599__A1 _31373_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23059__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22527_ VGND VPWR _23523_/S _29816_/Q _30027_/Q _30027_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15536__B1 _15536_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29083_ _29083_/Q _30503_/CLK _29083_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_123_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26295_ _26331_/B _26295_/Y _14176_/Y _19792_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__16879__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16733__C1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2431 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20654__B _20654_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26260__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28034_ _28034_/Q _30385_/CLK _28034_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire958 wire958/X wire958/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_221_1875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25246_ _26244_/A _25245_/X _25264_/A2 hold82/A _31247_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_254_3020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22458_ VGND VPWR _22448_/C _23395_/B _22449_/A _22458_/X _29990_/Q _22448_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 Xwire969 wire970/X wire969/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_210_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23074__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24271__A1 _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20666__C_N _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19817__A3 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20373__C _25722_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21085__A1 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17289__B1 _17289_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_2087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21409_ _21679_/C _21599_/A _21679_/B _21679_/D _21410_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_276_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_4604 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25177_ _31218_/Q _25148_/A _31219_/Q _25180_/D _25178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_wire2284_A wire2284/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22389_ VGND VPWR _22598_/S _29948_/Q wire2039/X _29948_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22821__A2 _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_4383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3403 wire3427/X _25867_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_65_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15839__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26012__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3414 wire3430/X _27075_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28303__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14371__C _31000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29429__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24128_ wire703/A _24122_/X _24209_/B1 _24127_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_85_2082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21766__A wire769/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29985_ _29985_/Q _30330_/CLK _29985_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_130_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_4_1_0_core_clk_A clkbuf_4_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3458 _26754_/B _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__22034__A0 _21665_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3469 _31460_/Q _24770_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_4_3104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_4738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24059_ _24059_/X _24081_/A3 _19928_/B _28630_/Q _31108_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_28936_ _28936_/Q _32429_/CLK _28936_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16950_ _16945_/X wire902/X _16950_/A1 _16949_/X _16950_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_5_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_5103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21388__A2 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22585__A1 hold146/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20045__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30406__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18789__B1 _18788_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3564 VPWR VGND wire3564/X wire3564/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_280_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23782__B1 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2830 VPWR VGND _23286_/S _23292_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_15901_ wire999/X _16091_/C _29587_/Q _15901_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xwire3575 VPWR VGND wire3575/X _30869_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17056__A3 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3586 VPWR VGND wire3586/X _30860_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19450__A1 _28444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16881_ VGND VPWR _16881_/X _16928_/B1 _16949_/C1 _16880_/X _16879_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28867_ _28867_/Q _32569_/CLK _28867_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_169_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2987 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3597 VPWR VGND _17260_/D _30764_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_277_483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28453__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2863 _21129_/S _21136_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xclkbuf_leaf_367_core_clk _31971_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_98_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15067__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16264__A1 wire898/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29579__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_4883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18620_ VGND VPWR _18625_/S wire3828/X _28334_/Q _28334_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16264__B2 _16263_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23129__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24326__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25523__A1 wire2952/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15832_ VGND VPWR _15832_/X _16249_/S _16151_/A1 _15829_/X _15831_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27818_ _25799_/D _32533_/Q _27817_/Y _32533_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_111_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_2161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_4116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2896 VPWR VGND _20604_/S _20606_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_248_2123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28798_ _28798_/Q _32557_/CLK _28798_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22337__A1 _21320_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14814__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20348__A0 _28888_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18551_ _30427_/Q _18551_/X _18552_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_267_2779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15763_ _15749_/X _15762_/X _15735_/B _15753_/X _15763_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27749_ VGND VPWR _27756_/S _25023_/B _32477_/Q _32477_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_146_2408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22888__A2 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30556__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output217_A wire3500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17502_ _17502_/B _26441_/B _31616_/Q _27231_/D _26456_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_223_4744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14714_ _16081_/A2 _14883_/A1 _32113_/Q _14714_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19753__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31801__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27599__S _27605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18482_ VGND VPWR _18490_/S wire3864/A _28255_/Q _28255_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30760_ _30760_/Q _31746_/CLK _30760_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_18_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15694_ _15751_/A1 _16910_/A2 _15694_/X _15727_/A2 _32139_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__16567__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_440 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25287__B1 _31261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21560__A2 _21484_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18961__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_451 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25826__A2 _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_462 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17433_ VGND VPWR hold32/A hold31/X wire2021/X _17433_/A1 _17432_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__14578__A1 _14816_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29419_ _29419_/Q _30406_/CLK _29419_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_145_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25701__A _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14645_ _14546_/A wire1732/X _14645_/X _15628_/A2 _29241_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_473 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15775__B1 _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30691_ _30691_/Q _32416_/CLK hold387/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_67_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_484 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_3180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_495 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_141_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_5232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_2903 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32430_ _32430_/Q _32430_/CLK _32430_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21848__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17364_ _17432_/B2 hold40/X _17362_/X _17433_/A1 hold41/A input181/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_278_3543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_4239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14576_ VGND VPWR _14576_/X _14675_/S _15631_/A1 _14573_/X _14575_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_31_2302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17516__A1 _31760_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22536__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27579__A2 _32219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18713__B1 _18712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23859__C _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17516__B2 _31759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24317__A _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19103_ _18903_/S wire1896/X _19102_/X _19100_/X _19103_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_89_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31951__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16315_ VGND VPWR _16948_/S _28955_/Q _29253_/Q _16315_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20520__A0 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32361_ _32361_/Q _32433_/CLK _32361_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15527__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26752__A_N _31791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17295_ wire3562/A _31908_/Q _17295_/X _17295_/B2 wire4180/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA__16534__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19034_ _19180_/B _27904_/Q _19033_/X _19034_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31312_ _31312_/Q _31313_/CLK _31312_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16246_ _16246_/X _16232_/X _16245_/X _16244_/X _16236_/X wire918/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_157_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_1139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32292_ _32292_/Q _32568_/CLK _32292_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_83_core_clk _31869_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_234_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21076__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22273__A0 _30404_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2416_A _20126_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14750__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31243_ hold109/A _31754_/CLK _31243_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16177_ _16177_/X _29079_/Q _16818_/A2 _16722_/B2 _16720_/C1 _16176_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_6_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32307__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23875__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22812__A2 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_12_core_clk _32320_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19674__D1 _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26003__A2 _19566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26251__B _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_1437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_715 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18969__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23367__S _23373_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15128_ VGND VPWR _15277_/S _15127_/X _15126_/X _15128_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25148__A _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31174_ _31174_/Q _32543_/CLK _31174_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24014__A1 _28466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_19_core_clk_A clkbuf_leaf_19_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14989__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25211__B1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22025__B1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30125_ hold402/A _30285_/CLK _30125_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25762__A1 _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_2748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19936_ _25652_/A _19935_/X _19968_/A2 _28616_/Q _28616_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o211a_2 X_15059_ VGND VPWR _15059_/X _15056_/X _15509_/A1 _15640_/A1 _15058_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_113_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30086__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_5372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22576__A1 wire3700/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_5225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold21_A hk_dat_i[24] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31331__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32457__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30056_ hold210/A _32291_/CLK _30056_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_113_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17047__A3 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19867_ _19866_/X _28583_/Q _28583_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_94_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15058__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16255__A1 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16255__B2 wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20051__A2 wire850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25514__A1 hold285/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18818_ wire1916/X _20858_/S _18817_/X _18815_/X _18818_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__19992__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26711__B1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1816_A _19088_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2835 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19798_ _27077_/C1 _19797_/X _19852_/A2 _28551_/Q _28551_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14266__B1 _29500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23525__A0 hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28609__D _28609_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2070 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28946__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20339__A0 _28879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_5545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_4699 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1511 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18749_ _18748_/X _19151_/S _19201_/A2 wire4156/X _18749_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_228_3965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16007__A1 _29277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31481__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2858_A wire2861/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21000__A1 _29465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31035__D _31035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13922__A _28575_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21760_ _21756_/X wire3206/A _21830_/B _21759_/X _21760_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_94_2863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23115__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3277 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30958_ _30958_/Q _32296_/CLK _30958_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_181_2822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16558__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17755__A1 _17754_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15215__C1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17755__B2 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20711_ VGND VPWR _20717_/S _29227_/Q _27254_/A0 _29227_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_102_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4063 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30874__D _30874_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21691_ _21690_/Y _21621_/Y _21659_/Y _21658_/X _21691_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27970__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30889_ _30889_/Q _32547_/CLK _30889_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_205_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15230__A2 wire1493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23430_ _29836_/Q _23430_/X _29378_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__21839__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20642_ VGND VPWR _20646_/S _27509_/A1 _29188_/Q _29188_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_3256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25330__B _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18704__A0 _30379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22500__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3278 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_3042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_1165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5043 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_5617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23361_ VGND VPWR _23366_/S hold249/A _29657_/Q _30339_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20573_ VGND VPWR _20584_/S _27699_/A1 _29089_/Q _29089_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32559_ _32559_/Q _32579_/CLK hold367/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_258_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18180__A1 _28083_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_58_core_clk_A clkbuf_5_9_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25100_ _31192_/D _24841_/A _27116_/B _23674_/Y _25099_/X _26182_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_fanout1157_A _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2805 _27153_/S _27142_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_239_4795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28326__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22312_ VGND VPWR _23559_/S _29898_/Q _29157_/Q _29898_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_69_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24789__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26080_ _31540_/D _26020_/Y _24380_/C _31540_/Q _26120_/A2 VGND VPWR _26079_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_213_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23292_ VGND VPWR _23292_/S wire3838/X _30274_/Q _30274_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21289__C _21289_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16730__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14472__B _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_3644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20193__C _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21067__A1 _27234_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25031_ _25041_/A _24051_/B1 _25031_/X _25031_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_274_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22243_ VGND VPWR _22243_/X _22243_/B _22243_/A _22243_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__22264__B1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14741__A1 wire1135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_3253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22803__A2 _29891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3566_A _30877_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1324_A wire1328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_3182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30429__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23277__S _23301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21586__A _21586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24005__A1 _31103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22174_ _18664_/X _22173_/X _22174_/X _30101_/Q wire2286/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_9_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24005__B2 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_5371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout784_A _26139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28476__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput650 wire2381/X mprj_dat_o[14] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_274_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15297__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput661 wire2715/X mprj_dat_o[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_87_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22016__B1 _22014_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21125_ VGND VPWR _21129_/S _27696_/A1 _29569_/Q _29569_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25753__A1 _31415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput672 output672/A mprj_dat_o[5] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_246_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29770_ _29770_/Q _32572_/CLK hold395/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3733_A wire3734/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29721__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput683 _25881_/B mprj_we_o VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26982_ _31976_/D _31976_/Q _26981_/Y _26986_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 Xwire2104 VPWR VGND wire2104/X wire2104/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_95_4007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput694 wire3515/X spi_enabled VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_246_5423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2115 VPWR VGND wire2115/X wire2115/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20027__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2126 wire2126/X wire2126/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_28721_ _28721_/Q _31119_/CLK _28721_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24961__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25933_ _25932_/X _26687_/B _31482_/Q _24716_/A _31483_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2137 VPWR VGND _24953_/B _19780_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21056_ VGND VPWR _21057_/S _30049_/Q _29514_/Q _29514_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17038__A3 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18235__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1403 VPWR VGND wire1403/X wire1403/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2148 VPWR VGND _26892_/B _26323_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_load_slew2639_A _14204_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_5347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2159 VPWR VGND _26886_/B _20110_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30579__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16246__A1 _16236_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20007_ _25512_/A _20006_/Y _20028_/A _28650_/Q _28650_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_264_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17443__B1 _17441_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3900_A wire3901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19983__A2 _24947_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28652_ _28652_/Q _32552_/CLK _28652_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_284_2301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31824__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25864_ _31452_/Q _25863_/Y _31452_/D _25869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_5_2789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14257__B1 _29497_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23516__A0 _31962_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1458 VPWR VGND wire1458/X wire1459/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22319__A1 _29905_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_1980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17994__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1469 wire1469/X wire1470/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_264_2908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_2796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_5131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27603_ VGND VPWR _27618_/S wire1833/X _32345_/Q _32345_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_125_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29871__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17824__A2_N _17823_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24815_ _31706_/Q _31705_/Q _24817_/B _31703_/Q _31704_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__22848__C _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28583_ _28583_/Q _31837_/CLK _28583_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19503__B _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25795_ _25795_/X _32527_/Q _32525_/Q _32526_/Q _32528_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_245_2318 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19196__B1 _19196_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1958_A wire1963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_1021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19735__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13832__A _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27534_ _27534_/Y _27594_/B _27534_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_24746_ VGND VPWR _24770_/A _31469_/Q _24682_/B _24747_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2032_A _14401_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input115_A la_input[48] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21958_ _21958_/X _21956_/Y _21900_/B wire3145/X _21957_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_160_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27720__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16549__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17746__A1 _31726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15206__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21471__D _21471_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18943__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17746__B2 _31725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_97_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_1065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31974__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20909_ _20912_/D _20982_/B _20914_/A _20909_/B _30432_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_201_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27465_ VGND VPWR _27475_/S _32289_/Q _32290_/Q _27465_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29101__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24677_ _24677_/X _24673_/Y _24670_/X _24667_/X _24676_/Y _24675_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_223_2627 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16954__C1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_316_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21889_ _22061_/S _29790_/Q _21889_/X _22071_/C _21903_/B _21879_/A hold253/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_123_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_4575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_1953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29204_ _29204_/Q _32117_/CLK wire833/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14430_ wire4004/A _21451_/B _14430_/Y _29728_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_26416_ _26559_/A _24805_/B _26102_/C _31691_/D _26423_/D _26414_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 XFILLER_204_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_3675 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23628_ _23628_/X wire1330/X _31081_/Q _31078_/Q wire1371/X VGND VPWR _23627_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_240_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27396_ VGND VPWR _27403_/S _27266_/X _32245_/Q _32245_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20665__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_3697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21260__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29135_ hold456/A _30262_/CLK _29135_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14361_ _14362_/A _14361_/B _17078_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__15509__B1 wire1093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26055__C _26055_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26347_ _26346_/X _31661_/Q _31661_/D _26347_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__14980__A1 _15266_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26769__B1 wire3454/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31204__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23559_ VGND VPWR _23559_/S _30480_/Q _30050_/Q _30480_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_168_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire711 VPWR VGND wire711/X wire712/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_257_4873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3241_A _14103_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_2100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire722 VPWR VGND wire722/X wire722/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2499_A _20817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16100_ _16100_/X _28813_/Q _16515_/B1 _16832_/A3 _16068_/S _16099_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 Xinput18 VPWR VGND hold68/A hold67/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire733 VPWR VGND wire733/X wire733/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__27430__A1 _32273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26233__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input80_A la_input[16] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput29 VPWR VGND hold62/A hold61/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire744 wire744/X wire744/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_17080_ VGND VPWR _23348_/C _30196_/Q _30385_/Q _17080_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29251__CLK _30783_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29066_ _29066_/Q _31918_/CLK _29066_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14292_ VGND VPWR _30406_/D wire3733/X _14288_/X _29988_/Q _14291_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_256_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26278_ _26277_/Y _26188_/A _31627_/Q _26267_/B _31627_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire755 VPWR VGND wire755/X wire755/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_84_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16721__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire766 VPWR VGND wire766/X wire766/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_216_5271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14382__B _24424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire777 VPWR VGND wire777/X wire777/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_6_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16031_ VGND VPWR wire970/X _28410_/Q _29075_/Q _16031_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28017_ _28017_/Q _30484_/CLK _28017_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_3582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14732__A1 _28777_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25229_ _25229_/X _25263_/B1 _29855_/D hold133/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__28819__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24795__A2 _24805_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23695__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2666_A wire2666/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3200 _21463_/B _14429_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_184_41 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20805__A1 _29318_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31354__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_4434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19671__A1 _28496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17277__A3 wire3100/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20604__S _20604_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3233 VPWR VGND wire3235/A _14127_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_136_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_215_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_2415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4040 VPWR VGND wire4040/X wire4041/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15288__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_204_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2510 wire2513/X _20749_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17185__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4051 VPWR VGND wire4051/X wire4052/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22007__B1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_5269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16485__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24303__C _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4062 VPWR VGND wire4062/X wire4063/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2833_A _23295_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26941__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17982_ VGND VPWR _17983_/S wire3813/X _27919_/Q _27919_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire4073 VPWR VGND wire4073/X _28658_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29968_ _29968_/Q _32299_/CLK _29968_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2459 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4084 VPWR VGND wire4084/X wire4085/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_257_409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4095 VPWR VGND wire4095/X wire4096/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2554 VPWR VGND _20245_/S _20229_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28969__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3299 VPWR VGND _15747_/A1 _15560_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_19721_ _19760_/B wire1376/A _19721_/A _19721_/X _19748_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xfanout1820 _27614_/A1 _18257_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__24952__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16933_ wire1010/X wire1482/X _29549_/Q _16933_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17029__A3 _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18226__A2 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28919_ _28919_/Q _32015_/CLK _28919_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_169_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3372 VPWR VGND _23155_/A _13832_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1831 VPWR VGND _27244_/A0 _18232_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22022__A3 hold265/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29899_ _29899_/Q _32575_/CLK _29899_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3383 VPWR VGND wire3383/X _32606_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2587 VPWR VGND _18321_/S wire2594/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24600__A _31552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16237__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1853 _21817_/S _22074_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3394 VPWR VGND wire3394/X _32604_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_opt_17_0_core_clk clkbuf_opt_17_1_core_clk/A clkbuf_5_18_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__27497__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20033__A2 wire847/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21230__A1 _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2660 VPWR VGND wire2660/X _14188_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19974__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31930_ _31930_/Q _32439_/CLK hold317/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_3833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21230__B2 _23231_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19652_ _26773_/C _20128_/A _19652_/A _19652_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__18020__D _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2671 VPWR VGND wire2671/X wire2672/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_2521 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16864_ wire1552/X _16864_/X wire995/X wire1450/X _14104_/Y _29613_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_111_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2682 VPWR VGND wire2682/X _14170_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1886 _18707_/X _19382_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__23507__A0 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2532 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4047_A wire4048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3840 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_355_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_130_core_clk _32351_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xwire2693 VPWR VGND wire2693/X wire2694/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_185_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23861__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21781__A2 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18603_ VGND VPWR _18617_/S wire3880/X _28317_/Q _28317_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_182_3810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15815_ _16039_/A2 _15815_/X _15814_/X _16039_/C1 _30887_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_225_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14799__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31861_ _31861_/Q _31896_/CLK _31861_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19583_ _25512_/A _19582_/Y _19632_/A _28467_/Q _28467_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_output501_A _28662_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2199_A _25051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1981 VPWR VGND wire1981/X _18679_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_111_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16795_ _16795_/X _29064_/Q _16814_/B1 _16805_/A3 _16491_/S _16794_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_280_3422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19187__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_1230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24180__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13742__A _24648_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19726__A2 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18534_ _18534_/Y _29652_/Q hold240/A _29446_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 X_30812_ _30812_/Q _32436_/CLK _30812_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_0_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15746_ VGND VPWR _15750_/S _28804_/Q _28836_/Q _15746_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_121_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31792_ _31792_/Q _32573_/CLK _31792_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_91_3759 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17737__A1 _31722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24746__S _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22730__A1 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18934__B1 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14557__B _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23650__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_1859 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30743_ _30743_/Q _32531_/CLK hold237/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18465_ VGND VPWR _18465_/S wire3813/X _28239_/Q _28239_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30694__D input97/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15677_ VGND VPWR _15702_/S _28433_/Q _29098_/Q _15677_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_5349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_4383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_2847 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_270 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_4108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15212__A2 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_281 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25275__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28349__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26472__A2 _26456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17416_ VGND VPWR hold7/A hold6/X wire2022/X _17433_/A1 _17415_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_292 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14628_ VGND VPWR _15629_/A2 _32414_/Q _14627_/X _14628_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_222_2137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30674_ hold348/A _31119_/CLK _30674_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18396_ VGND VPWR _18398_/S wire3820/X _28173_/Q _28173_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24483__A1 _24480_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22266__S _22273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_5341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_2722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16960__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21170__S _21172_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32413_ _32413_/Q _32547_/CLK _32413_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_179_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17347_ _17347_/A _17347_/B _27006_/A _17347_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XFILLER_35_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14971__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14559_ _14557_/X _14559_/Y _15771_/A _30438_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_176_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27421__A1 _32268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_243_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32344_ _32344_/Q _32403_/CLK _32344_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_4837 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16173__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17278_ _17278_/B _17272_/Y _17278_/A _17278_/X _17278_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_196_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold69_A hk_ack_i VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25432__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16712__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_3611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28499__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19017_ _19358_/A2 _27935_/Q _19047_/S _19017_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_48_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16229_ _16817_/A2 _16817_/A1 _29530_/Q _16229_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14723__A1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25983__A1 _26017_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32275_ VGND VPWR _32275_/D _32275_/CLK _32275_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_239_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29744__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_4056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_5412 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4220 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19111__B1 _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2606_A _14266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22797__A1 wire2035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire752_A wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23994__B1 wire1263/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22797__B2 _22809_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27792__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31226_ hold111/A _31754_/CLK _31226_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_269_4700 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20514__S _20515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_5134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_289_core_clk _32133_/CLK clkbuf_opt_32_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_26_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_394_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15279__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17673__A0 _17625_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2695 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13917__A _28580_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30721__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2867 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1933_A wire1934/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31157_ VGND VPWR _31157_/D _32543_/CLK _31157_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__31847__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26932__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22549__A1 _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20009__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_218_core_clk _32032_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_187_4444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30108_ _30108_/Q _30456_/CLK _30108_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19919_ _19918_/X _28609_/Q _28609_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_2 XANTENNA__29894__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19414__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31088_ VGND VPWR _31088_/D _31536_/CLK _31088_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_116_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30869__D _30869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24510__A _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16228__A1 wire891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5164 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27488__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20024__A2 wire2679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_5006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17425__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19965__A2 _24929_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22930_ _22929_/B _22930_/X _22929_/A _22846_/B _22846_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 X_30039_ VGND VPWR _30039_/D _30474_/CLK _30039_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__21853__B _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_131_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14239__B1 _29513_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25325__B _31267_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3147_A _19428_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25499__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17976__A1 _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16779__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_2586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27583__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21772__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_4021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30871__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31997__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26160__A1 _19581_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22861_ _22924_/C _22924_/B _30473_/Q _22861_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_263_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_3751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20980__A0 _29445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15987__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29124__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16439__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24600_ VGND VPWR _24600_/B _24600_/Y _31552_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__24171__B1 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21812_ VGND VPWR _21812_/C _21632_/C _21812_/X _21812_/D _21812_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_202_5326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19790__A_N _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25580_ _25580_/X _25629_/A _31223_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_22792_ _22831_/A _22809_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_263_2941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17728__A1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_3979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23560__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24531_ _24531_/C _24531_/Y _31218_/Q _24531_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__25341__A _25341_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21743_ wire832/A _21853_/B _21742_/Y _21360_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__30101__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16936__C1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18654__S _18654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27660__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26463__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27250_ VGND VPWR _27259_/S _32125_/Q wire1792/X _32125_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_3361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_33_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24462_ _24458_/C _31027_/Q _24462_/Y _24480_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__29274__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21674_ _21674_/C _21674_/B _21674_/Y _21674_/D _21674_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__24474__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_74 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21080__S _21092_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26201_ _31589_/Q _26227_/A2 _26202_/B _32279_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19696__D _20110_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23413_ _30413_/D _30484_/Q _23412_/Y _30413_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_1038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20625_ VGND VPWR _20625_/S wire2001/X _29171_/Q _29171_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27181_ _27181_/Y _27181_/B _32084_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14962__A1 _28414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2671 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16174__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24393_ VGND VPWR _24401_/D _31000_/Q _31001_/Q _24434_/B _14388_/C _24434_/D VGND + VPWR NF_sky130_fd_sc_hd__a311o_2 XANTENNA_wire3683_A _30419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_5594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26215__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_1979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26132_ _26694_/C _26131_/Y _26159_/B _31555_/Q _31555_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_279_1746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_3457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30251__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2602 VPWR VGND wire2601/A hold194/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_274_4472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23344_ VGND VPWR _23491_/A0 _18580_/A _22554_/B _23349_/A _30417_/Q _20914_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_118_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31377__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20556_ VGND VPWR _20556_/S _27682_/A1 _29072_/Q _29072_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16164__B1 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24226__A1 _30902_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25423__A0 _31293_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19993__B _20126_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_2160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_hold208_A hold208/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16703__A2 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26766__A3 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length1901 VPWR VGND wire1900/A _19310_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14714__A1 _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3850_A wire3852/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26063_ _31535_/Q _31536_/Q _31534_/Q _26062_/D _26063_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_23275_ VGND VPWR _23296_/S wire3897/X _30257_/Q _30257_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20487_ VGND VPWR _20504_/S wire1840/A _29005_/Q _29005_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22388__A1_N _23347_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2399 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_3422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22788__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27866__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25014_ _25081_/A wire1283/X _25014_/X _25079_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_4_849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1945 VPWR VGND _19336_/B1 _19375_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23985__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_1492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22226_ _22225_/X _22509_/C1 wire828/X _29832_/Q _29832_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_175_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20799__A0 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14190__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19653__A1 _28487_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20424__S _20429_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1967 VPWR VGND _19046_/S _18982_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_279_523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_1345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_2721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_170_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26900__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20651__C _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17664__B1 _31720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29822_ VGND VPWR _29822_/D _30402_/CLK _29822_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__25726__A1 _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24529__A2 _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13827__A _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22157_ VGND VPWR _22177_/D _29822_/Q _29823_/Q _22157_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_43_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_2705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26923__B1 wire1232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25540__B_N _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput480 _13885_/Y la_oenb[95] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_62_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23737__B1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput491 _28653_/Q la_output[104] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_79_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21108_ VGND VPWR _21136_/S _27234_/A0 _29552_/Q _29552_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1116 VPWR VGND wire1118/A _14552_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24934__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29753_ _29753_/Q _30233_/CLK hold223/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18208__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19405__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1127 wire1133/X wire1128/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_148_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22088_ wire1547/X wire3151/X _22088_/X _22088_/B1 _14083_/Y wire2273/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_26965_ _26966_/D _26965_/C _31997_/Q _31993_/Q _26968_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__22004__A3 _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1138 _15275_/S _15627_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_62_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16219__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1149 VPWR VGND wire1151/A wire1152/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25741__A4 _19531_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27479__A1 _32296_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20015__A2 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21212__A1 _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17416__B1 wire2022/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28704_ _28704_/Q _32017_/CLK _28704_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_5_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19956__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21212__B2 _21104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13930_ _28567_/Q _13930_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_248_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25916_ _26771_/A _25915_/Y _25903_/S _31475_/Q _31475_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_21039_ _21039_/Y _21051_/B _30036_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__19514__A _20060_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_5286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29684_ _29684_/Q _32569_/CLK _29684_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26896_ _26896_/Y _26896_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_73_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1244 wire1244/A _24284_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17967__A1 _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1255 VPWR VGND wire1255/X _24098_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_166_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22960__A1 _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32002__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_4405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1266 VPWR VGND wire1266/X _23963_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28635_ VGND VPWR _28635_/D _31462_/CLK _28635_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_13861_ _28636_/Q _13861_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 X_25847_ VGND VPWR _25853_/C _31446_/Q _31445_/Q _25847_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_21_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20971__A0 _29436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15978__B1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16349__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1288 VPWR VGND wire1288/X wire1289/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_1138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19169__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1299 VPWR VGND _26694_/A wire1299/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_129_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15600_ VGND VPWR _15639_/S _32069_/Q _29128_/Q _15600_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24162__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15442__A2 wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_4247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16580_ _16956_/A2 wire3283/X _28826_/Q _16580_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_wire2414_A _20126_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_3775 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28566_ VGND VPWR _28566_/D _32431_/CLK _28566_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_207_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13792_ _13792_/A _13792_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25778_ _25777_/Y _31417_/Q hold487/X _31417_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_125_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14650__B1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29617__CLK _32350_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21515__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23470__S _23530_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15531_ _15760_/A1 wire1741/X _15531_/X _15760_/B1 _28766_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_201_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27517_ VGND VPWR _27517_/S _27710_/A1 _32332_/Q _32332_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_4902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_1436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24729_ _24729_/D _24729_/C _24729_/Y _24729_/A _24729_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_129_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28497_ _28497_/Q _31873_/CLK _28497_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18392__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17195__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32152__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27651__A1 _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26066__B _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18250_ _18254_/S _29855_/Q _18295_/B _18249_/X _18250_/Y _29340_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_164_2894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_2902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15462_ _15709_/A3 _15567_/C _29542_/Q _15462_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_32_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27448_ VGND VPWR _27476_/S hold214/A _27447_/X _32282_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_145_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_940 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24465__A1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_27_0_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25662__B1 _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25401__D _25402_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17201_ _22026_/B1 _23170_/C _21665_/A _21953_/A2 _29901_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_223_2479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_1783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14413_ _14413_/X _21339_/C _21451_/B _29714_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XPHY_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18181_ VGND VPWR _18181_/X _30326_/Q _30327_/Q _18234_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14953__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_984 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_5344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28641__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16084__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15393_ _15393_/X _15385_/X _15392_/X _15730_/C1 _15387_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27379_ VGND VPWR _27384_/S _32231_/Q _27270_/X _32231_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_2168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29767__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18144__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19513__A_N wire2768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19341__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27403__A1 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1212 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17132_ _29892_/Q _22026_/A2 _21915_/A _29722_/Q _21630_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29118_ _29118_/Q _32440_/CLK _29118_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14344_ _14344_/Y _14347_/C _14347_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__21684__D1 _21641_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16155__B1 _29217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24217__A1 _30893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30390_ _30390_/Q _30390_/CLK _30390_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18695__A2 _18683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19892__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17352__C1 _17349_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25414__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19395__S _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14705__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17063_ _17063_/X _17078_/C _17062_/X _17060_/X _29883_/Q _21459_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_29049_ _29049_/Q _32302_/CLK _29049_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_218_4687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30744__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25965__A1 _27058_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15902__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14275_ _29650_/Q _14275_/Y _29948_/Q _29651_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XFILLER_6_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22779__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16014_ _16014_/X wire1035/X wire920/X _16013_/X _16011_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__22779__B2 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_3817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32060_ 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XANTENNA__23645__S _23668_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30894__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26390__A1 _31682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17965_ VGND VPWR _17972_/S wire3868/X _27902_/Q _27902_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_932 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28021__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29147__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3180 wire3181/X _30323_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_282_4229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22400__A0 _21811_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20006__A2 wire2645/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17407__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15681__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19704_ _27058_/C _19789_/A _19704_/A _19704_/X _27122_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 Xwire3191 VPWR VGND wire3191/X wire3192/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_1_1_2_core_clk clkbuf_1_1_3_core_clk/A clkbuf_1_1_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1650 _24888_/B wire1651/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_78_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16916_ VGND VPWR _16929_/S _28803_/Q _28835_/Q _16916_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_58_3908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_4079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24940__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17896_ _17896_/X _24389_/B _24389_/A _32598_/A _24389_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_91_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17958__A1 wire3894/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1683 VPWR VGND _27242_/A0 _27687_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_225_4614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22951__A1 _22951_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21165__S _21172_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_1374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1694 wire1698/A _14544_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_206_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26142__A1 _19547_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19635_ _19635_/Y _26898_/B _19638_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_31913_ _31913_/Q _31931_/CLK hold446/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_245_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16847_ _16847_/X _29097_/Q wire1029/X wire1469/X wire963/X _16846_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__16259__S _16806_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24153__B1 _24151_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24984__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15433__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_5061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_3643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16630__B2 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28171__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31844_ _31844_/Q _32010_/CLK _31844_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19566_ _25043_/B _19566_/A _19566_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XFILLER_108_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29297__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_2357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16778_ VGND VPWR _16778_/X _16777_/X _16776_/X _16930_/A1 _16949_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_203_4912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22703__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23380__S _23380_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23900__B1 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18517_ VGND VPWR _18522_/S _23286_/A1 _28289_/Q _28289_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_72_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20714__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2748_A hold113/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15729_ VGND VPWR _15756_/S _29238_/Q _29302_/Q _15729_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17879__A _17879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31775_ _31775_/Q _32016_/CLK _31775_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19497_ _19498_/A _31329_/Q _19496_/X _31328_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_223_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18474__S _18491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18383__A1 _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19797__C _27058_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27642__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26445__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_4412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25102__C1 _20651_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30274__CLK _30274_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15197__A1 wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30726_ hold324/A _32513_/CLK input79/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27787__S _27792_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18448_ VGND VPWR _18458_/S _18607_/A1 _28222_/Q _28222_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_2959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20190__A1 _28739_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16394__B1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24456__A1 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20509__S _20518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17591__C1 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25653__B1 _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16933__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2915_A _20484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5313 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14944__A1 _29465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_3343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_4088 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18379_ VGND VPWR _18398_/S wire3873/X _28156_/Q _28156_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_89_3452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30657_ _30657_/Q _31801_/CLK hold287/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14944__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18135__A1 wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19332__B1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_1998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_2631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20410_ VGND VPWR _20410_/S _27509_/A1 _28932_/Q _28932_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27889__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26704__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16146__B1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21390_ _21879_/A _21403_/A _21390_/B _21390_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XANTENNA__24208__A1 _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27088__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18686__A2 _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30588_ hold464/A _32438_/CLK _30588_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17343__C1 _17342_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25405__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22482__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24505__A _30759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26602__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16697__A1 _29093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22219__B1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20341_ VGND VPWR _20348_/S wire1826/X _28881_/Q _28881_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32327_ _32327_/Q _32327_/CLK _32327_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_157_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length1047_A wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25956__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3097_A _17298_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23967__B1 _28621_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23060_ _30159_/D _23057_/S _23059_/X hold386/A wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_83_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14172__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20272_ VGND VPWR _20290_/S wire1682/X _28814_/Q _28814_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32258_ _32258_/Q _32523_/CLK _32258_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_66_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20244__S _20244_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26720__A _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16449__A1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22011_ VGND VPWR _22011_/Y _21579_/Y _22010_/B _22010_/A _22010_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_6_4253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17646__B1 _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31209_ _31209_/Q _32554_/CLK _31209_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_80_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18843__C1 _18842_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26905__B1 _26902_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32189_ _32189_/Q _32525_/CLK _32189_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_255_1075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3264_A _14096_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_98 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1022_A wire1030/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17110__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21993__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29453__D _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_5549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32025__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23555__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24916__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15121__A1 _15266_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput208 VPWR VGND wire4198/A resetn_in VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_113_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25336__A _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_3416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19399__A0 _28415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18649__S _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17553__S _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15672__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19938__A2 _19988_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26750_ _26750_/Y _31790_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__23734__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23962_ _28461_/Q _26838_/A1 _23962_/X _28589_/Q _25738_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__25055__B _25069_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28069__D _28069_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17949__A1 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28514__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15409__C1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14880__B1 _14937_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22942__A1 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21745__A2 _21705_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21075__S _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25701_ VGND VPWR _25701_/X _27793_/B _31398_/Q _27793_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_57_3418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26133__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22913_ _22913_/Y _22913_/B _22913_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__27330__A0 _32188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_97 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27058__D_N _27053_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26681_ _26681_/X _23772_/X _26678_/B _31794_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__17413__A3 _30880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23893_ _28518_/Q _23891_/X _23892_/X _24163_/B2 _23893_/X _19718_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__14478__A _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_4293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32175__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16082__C1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24144__B1 _28638_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15424__A2 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16621__A1 wire3242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28420_ _28420_/Q _32357_/CLK _28420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26684__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23047__A_N _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25632_ _25571_/C _25632_/B _25632_/X _31378_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 X_22844_ _22935_/A _22855_/B _22845_/B _22834_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27270__B hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30617__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold158_A hold158/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23290__S _23292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25071__A _25081_/A VGND VPWR VPWR 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VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18374__A1 wire3892/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22170__A2 _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27302_ _31383_/Q _27303_/D _31384_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_87_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19571__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27633__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26436__A2 _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24514_ _24516_/B _24522_/B _31292_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15188__A1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27697__S _27700_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21726_ _21726_/X _21846_/A _23061_/D _21725_/X _14408_/B VGND VPWR _21724_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_206_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28282_ _28282_/Q _30758_/CLK _28282_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_2482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25494_ VGND VPWR _25492_/A _31326_/Q _31327_/Q _25494_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_103_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19500__C _31334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25644__B1 _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16924__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15727__A3 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26841__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27233_ _27233_/Y _27233_/A _27233_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_16_2469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24118__C _24118_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24445_ _24449_/B _14300_/B _24445_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_201_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21657_ VPWR VGND _21657_/X _21657_/B _21657_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_107_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18126__A1 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16137__A0 _28878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20608_ VGND VPWR _20615_/S _27701_/A1 _29123_/Q _29123_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27164_ VGND VPWR _27165_/S _27707_/A1 _32070_/Q _32070_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24376_ _32035_/Q _26772_/A _24376_/X _32003_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__18677__A2 _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19874__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17334__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22634__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21588_ VPWR VGND _21590_/B _21668_/B _21588_/A VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_68_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_2250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_1399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26115_ VGND VPWR _26121_/D _31550_/Q _14399_/B _26115_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_88_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23327_ VGND VPWR _23334_/S _30305_/Q _17160_/X _30305_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25947__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20539_ VGND VPWR _20548_/S _29056_/Q _27253_/A0 _29056_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_190_3419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19509__A _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27095_ VGND VPWR _32025_/D _27117_/A2 _27094_/X _26813_/B _27028_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21681__B2 _21673_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input182_A mprj_dat_i[17] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2197_A _19581_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2465 VPWR VGND _23255_/S _23250_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_235_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_150_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14060_ _31745_/Q _14060_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__23624__A1_N _31075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26046_ VPWR VGND _26055_/D _31532_/Q _31531_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_257_2597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1742 _15010_/A2 wire1741/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_190_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15360__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4139 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2487 VPWR VGND _21020_/S _21013_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19626__A1 _28480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23258_ VGND VPWR _23267_/S _29506_/Q _30241_/Q _30241_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24080__C1 wire809/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23422__A2 _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2498 VPWR VGND _20811_/S _20813_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28044__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1764 VPWR VGND _23865_/C _19527_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_257_1885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31893__D _31893_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_4562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22209_ VGND VPWR _22280_/S _30305_/Q _30395_/Q _22209_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2364_A wire2365/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23189_ _30185_/D _23185_/B _23188_/X _30185_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_253_1749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17101__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29805_ hold476/A _30470_/CLK _29805_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_239_217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input43_A irq[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25175__A2 _25180_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26372__A1 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_2587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15112__B2 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_4685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30147__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27997_ _27997_/Q _30432_/CLK _27997_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_118_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23186__A1 _29734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15663__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17750_ _31644_/Q _14067_/A _17750_/X _24602_/A _17474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_2_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32518__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29736_ _29736_/Q _30262_/CLK _29736_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21197__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21493__B _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24922__A2 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28194__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14962_ _14961_/X _15517_/A1 _15515_/A2 _28414_/Q _14962_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23725__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26948_ wire3331/X wire1230/X _31971_/Q _26946_/Y _31971_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_229_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold7 hold7/A hold7/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_188_1902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2629_A wire2630/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1030 VPWR VGND wire1030/X wire1030/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14871__B1 wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21736__A2 _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22933__A1 hold501/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16701_ _16701_/X _32365_/Q _16947_/A2 _16928_/A3 _16884_/S _16700_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 Xwire1052 VPWR VGND wire1052/X wire1053/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_38_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27321__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13913_ _28584_/Q _13913_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__26124__A1 _24600_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17681_ VGND VPWR _26470_/B _31638_/Q _17680_/X _17681_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_79_3698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26124__B2 _31552_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29667_ hold472/A _30503_/CLK _29667_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14893_ VGND VPWR _14893_/X _15628_/B1 _15631_/A1 _14890_/X _14892_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26879_ _26218_/A _26878_/Y wire752/X _31889_/Q _31889_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire1074 wire1074/X wire1074/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_40_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_188_1957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1085 VPWR VGND wire1085/X wire1085/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_1558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19420_ wire3536/X _27075_/C1 _28436_/D hold285/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__26675__A2 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1096 VPWR VGND wire1096/X wire1097/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16612__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16632_ _16911_/A2 _16632_/X _16631_/X _16928_/B1 _32323_/Q _16928_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_28618_ _28618_/Q _32528_/CLK _28618_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_95_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30297__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13844_ _29823_/Q _13844_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_246_3681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29598_ _29598_/Q _32127_/CLK _29598_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23033__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26077__A _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31542__CLK _31694_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19351_ _19350_/X _19367_/B1 _19380_/A2 _28207_/Q _19351_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_95_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_3958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16563_ _16563_/A2 _16563_/X _16562_/X _16720_/C1 _29228_/Q _16722_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_28549_ _28549_/Q _31892_/CLK _28549_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_73_2530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13775_ _31171_/Q _13775_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_245_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18294__S _18329_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2998_A _18458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17168__A2 _21966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18365__A1 _29871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27085__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27624__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18302_ VGND VPWR _22372_/A2 _29763_/Q _18301_/X _18303_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_260_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15514_ _16721_/A2 wire3298/X _29062_/Q _15514_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31560_ _31560_/Q _31801_/CLK _31560_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19282_ _19279_/X _19280_/X _19282_/X _19380_/B1 _19281_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__15179__B2 _15178_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20172__A1 _28730_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16494_ _16494_/X _16814_/B1 _16493_/X _29635_/Q _16805_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_207_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20329__S _20335_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16915__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18770__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26805__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26832__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output499_A _28660_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18233_ VGND VPWR _18309_/S _28091_/Q _27244_/A0 _28091_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_3018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30511_ _30511_/Q _30911_/CLK _30511_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27400__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15445_ _15444_/X _15718_/B1 _15723_/A2 _28860_/Q _15445_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_201_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20193__A_N _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15014__A1_N wire1065/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24989__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31491_ _31491_/Q _32115_/CLK _31491_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_51_2850 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_2528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18117__A1 wire3818/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31692__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19314__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_6_1_core_clk clkbuf_opt_6_2_core_clk/A clkbuf_opt_6_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XPHY_792 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16391__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25650__A3 _30761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27388__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30442_ _30442_/Q _31910_/CLK _30442_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18164_ _18164_/X _18244_/A wire3915/X _18201_/A _22370_/A2 _18161_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_2 XFILLER_255_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16128__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15376_ _15761_/A2 _15376_/X _15375_/X _15368_/S _30908_/Q _15748_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_236_3305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22544__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22464__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output666_A wire2734/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_4916 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17115_ _21447_/B _23115_/C _29890_/Q _21630_/B1 _17115_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_177_3786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17638__S _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14327_ VGND VPWR _14436_/A _14338_/B _14338_/A _14338_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_253_4353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25938__A1 _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2329_A _14210_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18095_ VGND VPWR _18119_/S _18342_/A1 _28024_/Q _28024_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30373_ _30373_/Q _30428_/CLK _30373_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_4987 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21668__B _21668_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_1075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold407 hold407/A hold407/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17340__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold418 hold418/A hold418/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23949__B1 wire741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32112_ _32112_/Q _32112_/CLK _32112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_278_1097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17046_ VGND VPWR _17046_/X _21459_/D _29881_/Q _17078_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__32048__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19880__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold429 hold429/A hold429/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_14258_ _20682_/C _24459_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XFILLER_214_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23413__A2 _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_23_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_5296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32043_ _32043_/Q _32403_/CLK _32043_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_4573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14189_ _14189_/Y _14189_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XFILLER_45_3388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20999__S _20999_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout909 wire915/A _16839_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28537__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26899__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23375__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15103__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25166__A2 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16300__B1 wire923/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17881__B _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18997_ _18996_/X wire1896/X _18994_/X _19156_/S _18997_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_230_2236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18469__S _18498_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31072__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23177__A1 hold265/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32198__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24374__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15654__A2 _15737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23177__B2 _30113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21188__A0 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24913__A2 _14186_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23716__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17948_ VGND VPWR _17948_/S wire3816/X _27886_/Q _27886_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27538__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21727__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire715_A wire716/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1480 VPWR VGND _16725_/C wire1485/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26115__A1 _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_56_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20935__A0 _29503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17879_ _17879_/B _24389_/B _17879_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__28687__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_3_1_0_core_clk clkbuf_3_1_1_core_clk/A clkbuf_3_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__14504__A_N _14515_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_2452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_4444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15406__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24126__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16603__A1 _16943_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_4163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_17_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26666__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19618_ _19618_/X _19628_/A _19618_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__17800__B1 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29932__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_3601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20890_ VGND VPWR _20906_/S _30243_/Q _29405_/Q _20890_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23024__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2608 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_4049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_5522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19002__C1 _19001_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31827_ _31827_/Q _32567_/CLK _31827_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19549_ _27077_/C1 _19548_/Y _19598_/A _28458_/Q _28458_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19601__B _19601_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18356__A1 wire3842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_4207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27615__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_2720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13930__A _28567_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_1475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_1978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3012_A _18431_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22560_ VGND VPWR _22619_/S _30057_/Q wire3702/X _30057_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_1317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_1989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24429__A1 _31014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31758_ _31758_/Q _31762_/CLK _31758_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20239__S _20257_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15709__A3 _15709_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18217__B _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21511_ _21508_/X _21506_/Y _21628_/A _21965_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27310__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27091__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14917__A1 _29014_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30709_ VGND VPWR hold282/X _32168_/CLK _30709_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_241_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30882__D wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22491_ _22513_/C1 _22490_/X _22513_/A2 _17152_/X _30006_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18108__A1 wire3843/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31689_ _31689_/Q _31689_/CLK _31689_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23101__A1 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16382__A3 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24230_ VGND VPWR _24238_/S _30906_/Q _27698_/A1 _30906_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16119__A0 _29561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27379__A0 _27270_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length908 VPWR VGND _16449_/B1 _16821_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_258_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21442_ _14113_/Y _21463_/B _21444_/D _21419_/D _21679_/B _21442_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XANTENNA__21112__A0 _29556_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15590__A1 _15590_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19856__A1 _28580_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28067__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length1331_A wire1330/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24161_ _24273_/C _30637_/Q _24160_/X _24161_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25929__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29312__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21373_ _17035_/X _21326_/A _21326_/D _17044_/X _21373_/Y _21335_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32oi_2 XANTENNA_wire3381_A wire3382/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_119_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3479_A wire3479/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_233_core_clk _31369_/CLK clkbuf_5_29_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_119_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23112_ _29790_/Q wire3171/X _23112_/X _30100_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_172_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_4156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20324_ VGND VPWR _20324_/S wire1783/A _28865_/Q _28865_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19069__C1 _27938_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15342__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14145__A2 _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_97 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24092_ _24092_/X _24186_/A3 _19927_/X _28633_/Q _31111_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__19048__B _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_2759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21415__A1 _30348_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17619__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14696__A3 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27920_ _27920_/Q _30294_/CLK _27920_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23043_ VGND VPWR _29705_/Q _14534_/B _23043_/X _23053_/D _23043_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 Xwire3905 VPWR VGND wire3905/X wire3906/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2568 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31415__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21415__B2 _21413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22612__B1 wire3701/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20255_ VGND VPWR _20261_/S _28798_/Q _27704_/A1 _28798_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire3916 VPWR VGND wire3916/X wire3918/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_6_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3927 VPWR VGND _21463_/C _29732_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout1404_A _18662_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_4746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23285__S _23286_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29462__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3949 VPWR VGND _22617_/B _21616_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_115_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17095__B2 _21853_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27851_ _27851_/Y _32549_/Q _27854_/C _25809_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XFILLER_213_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25157__A2 _25159_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26354__A1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20186_ _26771_/A _20185_/Y _20192_/A2 _28737_/Q _28737_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20702__S _20710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18831__A2 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18379__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_4_6_0_core_clk_A clkbuf_4_7_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout864_A _19715_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_3764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27904__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24365__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26802_ _27059_/C1 _26801_/X _26833_/A _31851_/Q _31851_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_245_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24401__C _31002_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_170_2194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21179__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24904__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3813_A wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27782_ VGND VPWR _27783_/S _25035_/B _32507_/Q _32507_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_19_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24994_ _25065_/A wire1283/X _24994_/X _25059_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_243_5223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold275_A hold275/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27529__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21718__A2 _14353_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14853__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18044__A0 _27976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22915__A1 _30113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31565__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29521_ _29521_/Q _32419_/CLK _29521_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26106__A1 _24610_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26733_ _26732_/Y _26218_/A _31819_/Q _26760_/B _31819_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_76_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20926__A0 _29494_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23945_ wire1621/X _23944_/X _31129_/Q _24081_/A3 _23945_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26106__B2 _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_3392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17398__A2 _17398_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18595__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24117__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26657__A2 _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29452_ _29452_/Q _31970_/CLK _29452_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_4506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26664_ _26664_/Y _31788_/Q _31789_/Q _26656_/A _31790_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_245_776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_803 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23876_ VGND VPWR _23876_/X _23876_/B _23879_/A _23876_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14001__A _28496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24668__A1 _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14605__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_814 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_825 wire3897/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28403_ _28403_/Q _30279_/CLK _28403_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_92_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_836 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25615_ _25615_/X _25582_/X wire3497/X hold100/A _24493_/X VGND VPWR _25614_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_122_4217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22827_ _22826_/B _22827_/X _22831_/D _22846_/A _22846_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 X_29383_ hold436/A _30219_/CLK _29383_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_847 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1940_A wire1948/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26595_ VPWR VGND _26595_/X _26595_/B _31773_/Q VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_70_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_2850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_858 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18347__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_869 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23340__A1 _29690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27067__C1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19544__B1 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27606__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20657__B _23876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13840__A _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14620__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28334_ _28334_/Q _30479_/CLK _28334_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2112_A wire2112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25546_ hold169/X _25546_/D _31351_/Q _31350_/Q hold170/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 XANTENNA__20154__A1 _28721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16358__B1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22758_ _22820_/C _22820_/B _21413_/A _22758_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_240_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21351__B1 _17017_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23891__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26814__C1 _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27082__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14908__A1 _32118_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21709_ _21709_/Y _29911_/Q _21711_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 X_28265_ _28265_/Q _30282_/CLK _28265_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_4353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_5098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_2889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25477_ _25478_/A _25454_/A _31318_/D _25476_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25093__A1 wire2253/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22689_ _30091_/Q _22679_/S _30091_/D _22687_/X _22688_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_13_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26290__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3154_A _21034_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17570__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15230_ wire1500/X wire1493/A _15230_/X _15235_/A1 _15229_/X _32318_/Q VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_68_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27216_ _25771_/X _27216_/B _32100_/D _27276_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_65_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_3888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24428_ _31014_/Q _24437_/B _24428_/Y _14379_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__21769__A _21769_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15581__A1 _32136_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28196_ _28196_/Q _30449_/CLK _28196_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19847__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_4291 VGND VPWR VGND VPWR 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VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13827_ _31043_/Q _25416_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_183_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24123__A3 _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17595_ VGND VPWR _17720_/S _17594_/X _17553_/X _17595_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25142__C _31205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18338__A1 hold475/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22134__A2 _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13750__A _31267_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31612_ _31612_/Q _32271_/CLK _31612_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19334_ _19333_/X _19278_/S _19375_/A2 _27982_/Q _19334_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_3045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4128 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16546_ VGND VPWR _16546_/X _16543_/X _16545_/X _16841_/C1 _16546_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20145__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_3004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13758_ _31189_/Q _13758_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XFILLER_225_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18889__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21342__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25608__B1 _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23882__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14565__B _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27130__S _27130_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27073__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_2915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31543_ _31543_/Q _31689_/CLK _31543_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19265_ _19265_/X _19264_/X _19259_/X wire1900/X _19257_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__29335__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15021__A0 _29628_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16477_ _16477_/X _16470_/X _16941_/C _16949_/C1 _16472_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_177_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25084__A1 _31185_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout2254_A _19522_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26281__B1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18216_ _18210_/X _18295_/B _29342_/Q _29340_/Q _18216_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__26820__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15428_ _16840_/A2 _15560_/A1 _32132_/Q _15428_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21679__A _21679_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_5130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19196_ _19196_/X _19196_/D1 _28296_/Q _19196_/B1 _19218_/A2 wire3770/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 X_31474_ VGND VPWR _31474_/D _31522_/CLK _31474_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19838__A1 _28571_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23634__A2 _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24831__A1 wire863/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30312__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30425_ VGND VPWR _30425_/D _30425_/CLK _30425_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18147_ VGND VPWR _18150_/S wire3827/X _28075_/Q _28075_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31438__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15359_ VGND VPWR _15750_/S _30506_/Q _30792_/Q _15359_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22842__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_4893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18053__A _30415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18510__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2519_A _20690_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_A0[5] wire2769/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold204 hold204/A hold204/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_7_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19853__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold51_A input8/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29485__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold215 hold215/A hold215/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_119_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18078_ VGND VPWR _18078_/S wire3836/X _28008_/Q _28008_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30356_ _30356_/Q _32359_/CLK _30356_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_158_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_4318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold226 hold226/A hold226/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16521__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26584__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold237 hold237/A hold237/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_133_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23398__A1 _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold248 hold248/A hold248/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_271_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_2137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23398__B2 _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24595__B1 _31549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17029_ _17029_/X _17028_/X _17094_/A _17025_/X _21657_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_119_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17892__A _24384_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold259 hold259/A hold259/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_82_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19066__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30287_ _30287_/Q _30378_/CLK _30287_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18274__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21948__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30462__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire832_A wire832/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24502__B _24543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20040_ _20040_/Y _24937_/B wire847/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_23_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32026_ _32026_/Q _32583_/CLK _32026_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31588__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22070__A1 _21611_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26336__A1 wire1354/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20522__S _20528_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18813__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15088__B1 wire1074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18500__B _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24347__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31038__D _31038_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26887__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13925__A _28572_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24898__A1 _31093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_3229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27305__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30877__D _30877_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21991_ _21672_/A _21956_/A _21991_/Y _21672_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_205_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18577__A1 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23570__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22373__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17831__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23730_ _23730_/X _20671_/A _31521_/Q _25566_/B _31569_/Q _20671_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__19612__A _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20942_ VGND VPWR _20948_/S _29407_/Q _29510_/Q _29407_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20384__A1 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16588__B1 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_20_2_core_clk clkbuf_opt_20_3_core_clk/A clkbuf_opt_20_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_121_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27784__A_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16052__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_Di0[1] wire2321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24114__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23661_ VGND VPWR _23661_/S _27699_/A1 _30791_/Q _30791_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_75_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20873_ VGND VPWR _23527_/S _20872_/X _29365_/Q _29365_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15260__A0 _29087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22125__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25400_ _31283_/D _25398_/X _26242_/A _25399_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_fanout1187_A wire1199/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22612_ _22612_/X wire3701/X _22594_/S _22578_/S _30364_/Q VGND VPWR _22611_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_228_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_3595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3213 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26380_ VGND VPWR wire1651/A _24308_/C _26882_/B _26380_/X _27051_/A _26382_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_241_267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20136__A1 _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23592_ VGND VPWR _23593_/S _27261_/A0 _30512_/Q _30512_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_52_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32213__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24994__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27064__A2 _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25331_ VGND VPWR _25331_/X _25331_/B _25413_/A _25331_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__21884__A1 _21648_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22543_ VGND VPWR _22550_/S _29832_/Q _30043_/Q _30043_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_206_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_3208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3596_A _30765_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16971__A _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26272__B1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26164__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_5612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28050_ _28050_/Q _30395_/CLK _28050_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_273_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25262_ _26238_/A _25261_/X _25264_/A2 hold95/A _31255_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21589__A _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23086__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22474_ VGND VPWR _22448_/C _22512_/A4 _22449_/A _22474_/X _29998_/Q _22512_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_159_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19829__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_2050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28702__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24283__C1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24822__A1 _17504_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22428__A3 _21611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29828__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24822__B2 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27001_ _27001_/Y _27001_/B _27001_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_24213_ VGND VPWR _24220_/S _30889_/Q wire2012/X _30889_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21636__A1 _30336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22833__A0 _29894_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21425_ _21425_/B _21480_/A _21425_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_178_1923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25193_ _25192_/X _25109_/B _25191_/Y _31224_/D _25188_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XANTENNA__14491__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32363__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18501__A1 wire3914/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17304__A2 _31909_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21100__A3 wire3213/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24144_ _24144_/X _24186_/A3 _19927_/X _28638_/Q _31116_/Q _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__15315__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21101__B _23343_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27276__A _31426_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21356_ VGND VPWR _21643_/B _21643_/A _21444_/A _21360_/C VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__26575__A1 hold196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30805__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24035__C1 wire1260/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_5380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3607 VPWR VGND _19563_/A wire3609/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_load_slew2669_A _19573_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_3560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23389__A1 _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20307_ VGND VPWR _20327_/S _27245_/A0 _28848_/Q _28848_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3930_A _29728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28852__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28952_ _28952_/Q _32423_/CLK _28952_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24075_ _24075_/X _20128_/B wire4117/X _28727_/Q _24178_/A2 VGND VPWR _24074_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 Xwire3702 VPWR VGND wire3702/X hold249/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_232_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29978__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21287_ VGND VPWR _23532_/S _30440_/Q _21286_/X _29773_/D _29773_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_210_5255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24050__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2928 VPWR VGND _20348_/S _20328_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_189_3410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23026_ VGND VPWR _31395_/Q _23024_/X _23025_/X _23026_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27903_ _27903_/Q _30667_/CLK _27903_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_219_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22061__A1 hold395/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5288 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18265__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20238_ VGND VPWR _20249_/S _28781_/Q _27242_/A0 _28781_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3746 VPWR VGND _23180_/B wire3746/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27524__B1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20432__S _20444_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17607__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18804__A2 wire1994/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28883_ _28883_/Q _32067_/CLK _28883_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19506__B _24388_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1890_A _18706_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15079__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22213__A _29831_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_3550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20072__B1 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17585__D_N _17484_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16276__C1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1988_A _18678_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24338__B1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3779 VPWR VGND wire3779/X _14408_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_189_2720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30955__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13835__A _29837_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27834_ _27844_/C _27834_/C _27833_/X _32540_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XANTENNA_wire2062_A wire2062/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20169_ wire881/A _20128_/B _20169_/X _20169_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_276_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input145_A la_input[75] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24889__A1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22349__C1 _22348_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29208__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26342__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23010__A0 _23008_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16291__A2 _16284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15094__A3 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_2609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27765_ VGND VPWR _27765_/S _19734_/A _32492_/Q _32492_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_276_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17026__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25550__A2 _31352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24977_ _25776_/C _24976_/X _25017_/A2 _31132_/Q _31132_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_22_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_2281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22364__A2 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27827__A1 _32537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_5026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29504_ _29504_/Q _31931_/CLK _29504_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22995__S0 wire3479/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14730_ _14730_/X _28873_/Q _15296_/B1 wire1508/X wire1104/X _14729_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19522__A _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26716_ _26716_/Y _31773_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_243_5086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23928_ _30859_/D _23922_/X _24199_/B1 _23920_/X _23927_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_248_1626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2327_A wire2327/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27696_ VGND VPWR _27696_/S _27696_/A1 _32430_/Q _32430_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_600 wire1578/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25838__B1 _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_611 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21263__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16043__A2 wire890/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_622 _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29435_ _29435_/Q _30387_/CLK _29435_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_14661_ _14660_/X _14823_/A1 _14882_/A2 _28406_/Q _14661_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25302__A2 _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28232__CLK _30219_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26647_ _26647_/Y _31783_/Q _31785_/Q _23763_/B _31786_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_92_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_633 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23859_ VGND VPWR _23859_/X _31896_/Q _23859_/A _24281_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__29358__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_644 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22116__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_655 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16400_ VGND VPWR _16842_/S _28420_/Q _29085_/Q _16400_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16594__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_779 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_666 _20505_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_5395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17380_ wire3561/X _31921_/Q _17380_/X _17272_/A wire2095/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_29366_ _29366_/Q _30481_/CLK _29366_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_677 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14592_ _14591_/X _14822_/B1 _14817_/A2 _32301_/Q _14592_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_5414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26578_ wire3454/X _31768_/D _26576_/X wire3331/A _31873_/Q _26577_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_688 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_699 wire3246/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27055__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16331_ _16331_/X _29179_/Q _16966_/A2 _16966_/A3 _16736_/S _16330_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28317_ _28317_/Q _31953_/CLK _28317_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21875__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30335__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25529_ _31343_/Q _19456_/A _31344_/Q _25530_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_196_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21875__B2 _17102_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29297_ _29297_/Q _30900_/CLK _29297_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25066__A1 _31176_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2696_A wire2697/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15003__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17543__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_155_core_clk _32015_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_259_3157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19050_ VGND VPWR _19087_/S _28161_/Q wire4158/X _19050_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26802__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28382__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16262_ VGND VPWR _16262_/X _16259_/X wire1035/A _16491_/S _16261_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21499__A _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23077__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28248_ _28248_/Q _29389_/CLK _28248_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14357__A2 _14356_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15554__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_1692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20607__S _20617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24813__A1 _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18001_ VGND VPWR _18015_/S wire3866/X _27935_/Q _27935_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15213_ _15213_/X _28098_/Q _15212_/X wire1172/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21627__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2863_A _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16193_ _16725_/A _16725_/C _29529_/Q _16193_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_255_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_core.RAM128_Di0[11] wire2369/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28179_ VGND VPWR _28179_/D _30246_/CLK _28179_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19296__A2 _19298_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_1181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_3699 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30210_ _30210_/Q _30404_/CLK _30210_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30485__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19835__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15144_ _15144_/X _28852_/Q _15143_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__16503__A0 _29056_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15306__A1 _32320_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26566__A1 _31870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31190_ _31190_/Q _31693_/CLK _31190_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_215_4454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24026__C1 wire1261/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput309 _13956_/Y la_iena[56] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_81_4064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31730__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26090__A _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24603__A _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_2033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22602__A_N _22618_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30141_ hold478/A _30470_/CLK _30141_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19952_ _19951_/X _28624_/Q _28624_/D _19968_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__20850__A2 _20914_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15075_ _15723_/A2 _15075_/X _15074_/X _15718_/B1 _32055_/Q _15561_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_253_1310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24041__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4077_A wire4078/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23864__D _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17059__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18903_ VGND VPWR _18903_/S wire1771/X _18898_/X _18903_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14026_ _28471_/Q _14026_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__22052__A1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17059__B2 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26318__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30072_ hold124/A _32293_/CLK _30072_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20342__S _20359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1010 _19567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output531_A _31116_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19883_ _19882_/X _28591_/Q _28591_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_231_2331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5243 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1021 wire3975/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output629_A _24590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18320__B _22378_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16267__C1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15609__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24329__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1032 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_5549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26869__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1043 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18834_ _28346_/Q _19335_/B _19278_/S _18834_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_23_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1054 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31880__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_3864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_1065 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23653__S _23666_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18262__A2_N _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18765_ _18765_/X _18764_/X _28342_/Q _19090_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XANTENNA__25541__A2 _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15977_ _16206_/A2 wire1485/X _30490_/Q _15977_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_7_1585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22355__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23552__A1 _30473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27818__A1 _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22777__B _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26249__B _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17716_ _17716_/X _17777_/B _17863_/B _17662_/A _17627_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_266_1715 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_2392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19432__A _19432_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_2850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14928_ _14928_/X _14928_/A1 _14921_/X _14923_/X wire1097/X _14927_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_261_5186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19220__A2 wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18696_ hold231/A _21030_/S _18696_/X _18693_/X _18695_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_30974_ _30974_/Q _32039_/CLK _30974_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17767__C1 _17485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31110__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32236__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22760__C1 _22745_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16034__A2 wire1021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26097__A3 _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17647_ VGND VPWR _26470_/B _31635_/Q _17646_/X _17647_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__23455__A1_N _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14859_ VGND VPWR _14859_/X _15277_/S _15611_/A1 _14856_/X _14858_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_92_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27833__A4 _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17782__A2 _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24992__B _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20118__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22081__A1_N _21285_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16990__A0 _30376_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15793__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17578_ VGND VPWR _17578_/X _17873_/B1 _17783_/B2 _31708_/Q _17577_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__28725__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5350 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_4813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18482__S _18490_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_33_1_core_clk clkbuf_opt_33_1_core_clk/X clkbuf_opt_33_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__31260__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_4379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32386__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17534__A2 _17462_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18731__A1 _28341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_1369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_48_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27795__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31526_ VGND VPWR _31526_/D _31693_/CLK _31526_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19248_ _19248_/X _19245_/X wire1904/X _19247_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__30828__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24265__C1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20517__S _20517_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_cap2750_A _14148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17098__S _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28875__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1963_A wire1963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31457_ _31457_/Q _32416_/CLK _31457_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19179_ _19178_/X _19159_/S _19179_/A2 _27911_/Q _19179_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_273_2409 VGND VPWR VGND VPWR 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_29877_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26557__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22190_ _22243_/C _22189_/X _22243_/A _22187_/X _22190_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xclkbuf_5_22_0_core_clk clkbuf_5_22_1_core_clk/A clkbuf_5_23_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_31388_ _31388_/Q _32544_/CLK _31388_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_max_length880_A wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_1899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length978_A wire979/X VGND VPWR VPWR VGND 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VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24900_ _25652_/A _24899_/Y _24941_/A _31094_/Q _31094_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20023_ _26913_/A _20022_/Y wire851/X _28658_/Q _28658_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32009_ _32009_/Q _32010_/CLK _32009_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_266_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_4964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25880_ hold488/A _25879_/X _24582_/Y _31458_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_99_2934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30208__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1102_A wire1104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1618 VPWR VGND _24467_/A _19789_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_80_2194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1629 VPWR VGND _19786_/B wire1629/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_2040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3291 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16273__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21872__A _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24831_ wire863/A _31060_/Q _24831_/Y _24442_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25344__A _31271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28255__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18657__S _18657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15481__B1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23543__A1 _30464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_7_4_core_clk clkbuf_opt_7_5_core_clk/A clkbuf_opt_7_4_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_227_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29500__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22977__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26159__B _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27550_ VGND VPWR _31381_/Q _27549_/X _27548_/X _27550_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3511_A _31101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24762_ _31463_/Q _24762_/X _31445_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__25063__B _25063_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19211__A2 wire1402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21974_ _22063_/A _21973_/X _21974_/Y _21971_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_227_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_1372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21083__S _21090_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16025__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26501_ VGND VPWR _26502_/C _31740_/Q _26500_/Y _31740_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_39_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23713_ _23714_/A _23712_/X wire1875/X _31468_/Q _24273_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XANTENNA__26088__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_87_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20925_ VGND VPWR _20928_/S _29390_/Q wire3981/X _29390_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_12 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27481_ VGND VPWR _27483_/S _32297_/Q _32298_/Q _27481_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30358__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24693_ VPWR VGND _24693_/X _24693_/B _24701_/D VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_54_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_23 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_4266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24099__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1471_A wire1477/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15233__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout827_A wire829/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_34 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15081__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26493__B1 _26492_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17773__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_306_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29220_ _29220_/Q _32122_/CLK _29220_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31603__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1569_A wire1573/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_45 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26432_ _26432_/X _26403_/B _31698_/Q _31697_/Q _26407_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_247_1670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_56 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23644_ VGND VPWR _23668_/S _27489_/A1 _30774_/Q _30774_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15784__A1 _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20856_ VGND VPWR _20872_/S _30226_/Q _29388_/Q _20856_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_243_2257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_67 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_1971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16981__B1 _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_78 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_3576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22503__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29650__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_5581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_89 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27037__A2 _27036_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29151_ _29151_/Q _32557_/CLK _29151_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21857__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3880_A wire3882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26363_ _26362_/X _31669_/Q _31669_/D _26383_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_123_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14992__C1 wire1113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23575_ VGND VPWR _23582_/S _27689_/A1 _30495_/Q _30495_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18392__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25048__A1 _31167_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20787_ VGND VPWR _20788_/S _27709_/A1 _29301_/Q _29301_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3978_A wire3978/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18183__C1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27588__A3 _32244_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28102_ _28102_/Q _32332_/CLK _28102_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25314_ _25314_/X _25322_/C _25413_/A _25322_/B _25305_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_22526_ VGND VPWR _23523_/S _29815_/Q _30026_/Q _30026_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire904 VPWR VGND wire904/X wire904/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14339__A2 _14328_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29082_ _29082_/Q _32426_/CLK _29082_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25599__A2 _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire915 VPWR VGND wire915/X wire915/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_26294_ _26293_/Y _23599_/B _31635_/Q _26331_/B _31635_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_139_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20427__S _20444_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire926 VPWR VGND wire926/X wire926/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_238_4465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31753__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28033_ _28033_/Q _30430_/CLK _28033_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20654__C _20654_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14744__C1 _28913_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25245_ _25245_/X _25263_/B1 _29863_/D hold103/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_30_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22457_ _30332_/D _22456_/X _22513_/A2 _20987_/C _29989_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23074__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24271__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17289__A1 wire3564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19817__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21408_ _21679_/C _21679_/B _21410_/B _21679_/D _21599_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__22282__A1 _22243_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17289__B2 wire3555/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27745__A0 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26548__A1 _31757_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25176_ _31218_/Q _31219_/Q _25178_/A _25180_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__24613__A2_N _24260_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22388_ VGND VPWR _29946_/Q _23347_/B wire3412/A _29946_/D _22387_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__19683__C1 wire3362/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3475 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_1365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_4665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4200 VPWR VGND wire4200/X wire4200/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3404 VPWR VGND wire3406/A wire3427/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_5418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15839__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3415 wire3428/X _27007_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_24127_ _28572_/Q wire1807/X _24127_/X wire735/X _24126_/X wire1625/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_65_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3426 VPWR VGND wire3430/A _32108_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21339_ _21451_/B _21339_/C wire3661/X _21339_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XANTENNA__21766__B _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16640__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29984_ _29984_/Q _30432_/CLK _29984_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24023__A2 _24021_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25220__A1 hold116/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_3751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18238__A0 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3510 VPWR VGND _13792_/A _31154_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__29030__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_4728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3459 hold431/A _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21258__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22034__A1 hold262/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28935_ _28935_/Q _32442_/CLK _28935_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24058_ _24058_/X _24056_/X _28534_/Q _23879_/X _24184_/A2 VGND VPWR _24057_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_99_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3532 VPWR VGND wire3532/X _25577_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18789__A1 _28375_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21388__A3 _21289_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23782__A1 _31838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15256__S _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15900_ VGND VPWR wire970/X _29458_/Q _32112_/Q _15900_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_23009_ _25693_/C _32489_/Q _23009_/X _25693_/B _32481_/Q _32497_/Q _32473_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_186_5574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3565 VPWR VGND wire3565/X wire3566/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17037__A _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2831 VPWR VGND _23292_/S _23298_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3576 VPWR VGND wire3576/X _30868_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14160__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16880_ VGND VPWR _16918_/S _28866_/Q _28898_/Q _16880_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28866_ _28866_/Q _32071_/CLK _28866_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20596__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2842 VPWR VGND wire2842/X _23049_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3587 VPWR VGND wire3587/X wire3588/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_249_4572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31133__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_3118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_167_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32259__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23473__S _23497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_345_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21782__A _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15831_ _15831_/X _30772_/Q _16150_/A2 _16150_/A3 _15957_/S _15830_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27817_ VGND VPWR _25799_/D _32533_/Q _27844_/C _27817_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_237_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2958 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25523__A2 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_4895 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28797_ _28797_/Q _31917_/CLK _28797_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29180__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22337__A2 _22338_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23534__A1 _30455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18550_ _30445_/Q _22620_/D _30444_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA_wire2611_A _14257_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15762_ _15762_/X _15762_/A1 _15759_/X _15761_/X wire1083/X _15757_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_27748_ _27756_/S _31398_/Q _27766_/D _27784_/C _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XANTENNA__20348__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2709_A wire2709/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21545__B1 _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28748__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17749__C1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16016__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17501_ _17501_/X _17501_/D _26464_/C _31615_/Q _31616_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XANTENNA__18410__A0 _29849_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17213__A1 wire3217/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3435 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14713_ _14882_/A2 _14713_/Y wire1508/X wire1135/X _29211_/Q _14712_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_57_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18481_ VGND VPWR _18488_/S _18607_/A1 _28254_/Q _28254_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15693_ VGND VPWR _15756_/S _29614_/Q _29646_/Q _15693_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_128_3577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27679_ VGND VPWR _27683_/S _27679_/A1 _32413_/Q _32413_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_5509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14396__A _26123_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_430 wire740/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31283__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15224__B1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_441 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_336_core_clk _30403_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_248_1489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_2335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_452 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17432_ _17441_/B2 _17432_/A2 _17432_/X _17432_/B2 input194/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA__25826__A3 _30154_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29418_ _29418_/Q _32269_/CLK _29418_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14644_ VGND VPWR _15275_/S _29007_/Q _28975_/Q _14644_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_204_3432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14578__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15775__A1 _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_463 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5192 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_54_3774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25701__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30690_ hold326/A _31436_/CLK input99/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_1732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_5610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_474 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16972__B1 _29773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26085__A _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_485 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_496 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21848__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19398__S _19419_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_3307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17363_ wire3564/A _31918_/Q _17363_/X _17446_/B2 _17363_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA_wire2980_A _18512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29349_ _29349_/Q _30757_/CLK _29349_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14983__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14575_ wire1171/X _14575_/X _14574_/X _14642_/S _29005_/Q _15628_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__28898__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_119_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18713__A1 _18690_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19102_ _19178_/B _28067_/Q _19101_/X _19102_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_31_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19910__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16314_ VGND VPWR _16314_/X _16458_/S _16949_/C1 _16313_/X _16312_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_13_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17500__A _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32360_ _32360_/Q _32432_/CLK _32360_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15527__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_233_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17294_ _29846_/D _17245_/X _32298_/Q _14399_/A _17293_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XANTENNA__16724__B1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20337__S _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_2231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_3820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22118__A _29818_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26813__A _27120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output579_A _28682_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19033_ _19179_/A2 _27872_/Q wire1942/X _19033_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_31311_ _31311_/Q _31313_/CLK _31311_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16245_ _16245_/X _16238_/X _16821_/A1 _16816_/B1 _16240_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_234_5553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32291_ _32291_/Q _32291_/CLK _32291_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_252_4429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4194_A wire4195/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28128__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18477__A0 _28250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23648__S _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31242_ VGND VPWR _31242_/D _32299_/CLK hold89/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__23470__A0 hold406/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27736__A0 _32467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_5339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16176_ _16817_/A2 _16817_/A1 _28414_/Q _16176_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_48_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14750__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19674__C1 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23875__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_4104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15127_ VGND VPWR _15627_/S _29533_/Q _29567_/Q _15127_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_43_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_384_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2409_A _14141_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31173_ _31173_/Q _32543_/CLK _31173_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21676__B _21676_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24014__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25211__A1 _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2104 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21168__S _21168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30124_ _30124_/Q _30319_/CLK _30124_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_211_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19935_ _25065_/A wire1316/X _19935_/X _25029_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_15058_ _15057_/X _15515_/C1 _15605_/A2 _29468_/Q _15058_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_133_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_5302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3960 VPWR VGND _22616_/S _22427_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25762__A2 _32089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28278__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3971 VPWR VGND _23224_/S wire3973/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_leaf_52_core_clk _31462_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_187_4637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15166__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19977__B1 wire3427/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14009_ _28488_/Q _14009_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__29523__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_34_0_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24970__B1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30055_ hold248/A _31536_/CLK _30055_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_168_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19866_ VGND VPWR _19535_/X wire2305/A _24046_/B1 _19866_/X _26159_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__20587__A1 wire1837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21784__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5368 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_121_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25045__C_N _19570_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23383__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16255__A2 wire4148/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18817_ _18817_/X _19377_/B _28054_/Q _19375_/B1 _18816_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_233_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26711__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20800__S _20801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19797_ wire881/X _24441_/C _20654_/D _19797_/X _27058_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__14266__A1 _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18477__S _18488_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14266__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15463__B1 wire1118/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23525__A1 wire4144/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30500__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4509 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31626__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19162__A _28134_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18748_ _28211_/Q _18748_/X _19200_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20339__A1 _27244_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23394__A1_N _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21536__B1 _17143_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17605__C_N _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18937__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16007__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29673__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_5579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18679_ _19218_/A1 _19069_/B1 _19218_/A2 _19069_/D1 _18679_/Y VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211ai_4 XFILLER_205_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30957_ _30957_/Q _32300_/CLK _30957_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_272_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23115__C _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16558__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17755__A2 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_5563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23289__A0 _30271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20710_ VGND VPWR _20710_/S _29226_/Q _27253_/A0 _29226_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_90_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14569__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21690_ _21690_/Y _21689_/X _22038_/S _21647_/X _21669_/X _22048_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_1 XFILLER_72_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16963__B1 _29334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30888_ _30888_/Q _32403_/CLK _30888_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_4_core_clk_A clkbuf_5_4_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30650__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_5604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31776__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_2599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21839__A1 _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20641_ VGND VPWR _20650_/S _27701_/A1 _29187_/Q _29187_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_11_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1077_A _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21839__B2 _17075_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14974__C1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25330__C _25334_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26227__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_4007 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_4176 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19362__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_5366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22500__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15518__A1 wire1083/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23360_ VGND VPWR _23365_/S _23360_/A1 _29656_/Q _30338_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20572_ VGND VPWR _20572_/S _27698_/A1 _29088_/Q _29088_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32558_ hold367/A _32579_/CLK input41/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_194_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20511__A1 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15518__B2 _15509_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20247__S _20247_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_65 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22311_ VGND VPWR _23372_/S _29897_/Q _29156_/Q _29897_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_200_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31006__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2806 VPWR VGND _27153_/S _27155_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_179_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31509_ _31509_/Q _31806_/CLK _31509_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22661__C_N _14403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_5030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23291_ VGND VPWR _23292_/S _23291_/A1 _30273_/Q _30273_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_175_3339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30890__D _30890_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25986__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length2817 VPWR VGND _25547_/C _25511_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16191__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_140_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32489_ _32489_/Q _32498_/CLK _32489_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_69_2034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22970__B _31402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25030_ _13788_/A _31158_/D _25676_/B1 _25086_/A2 _25029_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_4 XFILLER_88_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29053__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23558__S _23560_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22242_ hold260/A _21032_/B _22243_/B _22248_/B _22240_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20193__D _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22264__A1 _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19665__C1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23461__B1 _29356_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_1918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16479__C1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22173_ VGND VPWR _22180_/S _30300_/Q _30390_/Q _22173_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3461_A _23776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17140__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24005__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25202__A1 hold111/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput640 wire2430/A mprj_adr_o[6] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30030__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31156__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput651 wire2387/X mprj_dat_o[15] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21078__S _21092_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21124_ VGND VPWR _21131_/S wire1792/X _29568_/Q _29568_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16494__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17691__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput662 wire2389/X mprj_dat_o[25] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1972 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22016__B2 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17691__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26981_ _31976_/Q _27007_/A _26981_/Y _26986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__25753__A2 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput673 wire2346/X mprj_dat_o[6] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32401__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput684 _32599_/X por_l_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_2510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2105 wire2106/X wire2105/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xfanout1309 VPWR VGND _20128_/B _20126_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_44_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput695 wire3433/X spi_sck VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15076__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2116 wire2117/X wire2116/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_112_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28720_ VGND VPWR _28720_/D _31570_/CLK _28720_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_246_5435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2127 wire2127/X wire2127/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_25932_ _31483_/Q _25932_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_21055_ VGND VPWR _21057_/S _30048_/Q _29513_/Q _29513_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_186_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2138 VPWR VGND _26898_/B _20122_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20578__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2149 VPWR VGND _26323_/A _19702_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_247_624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23293__S _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15049__A3 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16246__A2 wire918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20006_ VGND VPWR wire2645/X _26866_/A1 _20028_/A _20006_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_268_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17443__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28651_ VGND VPWR _28651_/D _32573_/CLK _28651_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25863_ VGND VPWR _25869_/D _31452_/Q _25878_/A _25863_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19983__A3 wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20710__S _20710_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14257__A1 _25361_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18387__S _18388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30180__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_668 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14257__B2 wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1459 VPWR VGND wire1459/X wire1459/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27602_ VGND VPWR _27605_/S _27682_/A1 _32344_/Q _32344_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_244_5170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_4155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_1992 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24814_ _24828_/C _31054_/D _27051_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_58_3140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21609__C_N _30220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32551__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25910__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28582_ _28582_/Q _31570_/CLK _28582_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_266_3481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_5143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25794_ _27806_/C _32525_/Q _32527_/Q _32526_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XANTENNA__21527__B1 _21619_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_5154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19196__A1 wire3770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27533_ _25643_/C _32158_/Q _27534_/A _25643_/B _32150_/Q _32166_/Q _32142_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_24745_ VGND VPWR _24778_/C _31452_/Q _24745_/B VGND VPWR NF_sky130_fd_sc_hd__xnor2_2 XFILLER_110_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21957_ _21956_/A _21628_/X _21956_/B _21713_/B _21957_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_fanout1853_A _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27720__C _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18943__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17746__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16403__C1 _16727_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_164_3799 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20908_ VGND VPWR _23342_/A hold480/X hold436/A _29383_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_262_2655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27464_ VGND VPWR _27476_/S _32290_/Q _27463_/X _32290_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15757__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24676_ _24676_/C _24676_/Y _31447_/Q _24678_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA_wire2025_A _17386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input108_A la_input[41] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24477__C1 _25109_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20750__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21888_ _29790_/Q _22074_/B1 _29790_/D _21887_/X _21886_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_153_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29203_ _29203_/Q _32417_/CLK _29203_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_19_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3490 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_3831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26415_ VGND VPWR _26423_/D _26408_/Y _31689_/Q _26427_/B _26420_/C VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__15221__A3 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23627_ _23627_/X wire1877/X _24246_/B _32561_/Q _31035_/Q _24260_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_279_4587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_4197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_1965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20839_ _20839_/Y _23395_/B _30433_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_27395_ _27403_/S _31384_/Q _27395_/C _27395_/B _31383_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_32_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20665__B _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29134_ _29134_/Q _32320_/CLK _29134_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14360_ _17094_/A _14361_/B _14360_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__15509__A1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26346_ VGND VPWR wire1651/A _24308_/C wire2226/X _26346_/X _27051_/A _26382_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_201_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26769__A1 _19715_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20502__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26055__D _26055_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23558_ VGND VPWR _23560_/S _30479_/Q _30049_/Q _30479_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16706__B1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14980__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_4367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire712 VPWR VGND wire712/X wire712/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__18171__A2 wire3174/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire723 VPWR VGND wire723/X wire723/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_197_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire734 VPWR VGND wire734/X wire734/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xinput19 VPWR VGND hold64/A hold63/X VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__14717__C1 wire1135/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22509_ _22509_/C1 _22508_/X _22513_/A2 _17221_/X _30015_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29065_ _29065_/Q _29580_/CLK _29065_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_100_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14291_ VGND VPWR _14291_/X _17024_/B _14289_/X _29991_/Q _14290_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xwire745 VPWR VGND wire745/X wire745/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__16182__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26277_ VGND VPWR _14203_/Y _19503_/A _26267_/B _26277_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_158_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14155__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2394_A wire2395/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23489_ VGND VPWR _23525_/S _28383_/Q _30431_/Q _23489_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire756 VPWR VGND wire756/X wire756/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25441__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire767 VPWR VGND wire767/X wire767/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16030_ _16029_/X _16040_/A2 wire989/X _32048_/Q _16030_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_28016_ _28016_/Q _30473_/CLK _28016_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_7_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23468__S _23518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire778 VPWR VGND wire778/X wire778/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14193__B1 hold123/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21777__A _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input73_A la_input[125] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_5524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25228_ _26244_/A _25227_/X _25264_/A2 hold100/A _31238_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_10_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14732__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23452__B1 _29379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25992__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24795__A3 _24639_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20681__A _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20266__A0 _28808_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23695__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19120__A1 _28068_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28420__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4132 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_2713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_2500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25159_ _31212_/Q _31214_/Q _31213_/Q _25159_/X _25159_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__16370__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17131__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3223 _21459_/D _21447_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_276_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19671__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4030 wire4031/X wire4030/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_212_4446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_5609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4041 VPWR VGND wire4041/X _28670_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_117_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16485__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4052 VPWR VGND wire4052/X _28666_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__32081__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22007__B2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3256 VPWR VGND wire3258/A wire3261/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_215_2145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_2_1_core_clk clkbuf_5_2_1_core_clk/X clkbuf_5_2_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_232_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17981_ VGND VPWR _17981_/S wire3816/X _27918_/Q _27918_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_26_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29967_ _29967_/Q _30507_/CLK _29967_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire4063 VPWR VGND wire4063/X wire4063/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26941__B2 _26941_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4074 VPWR VGND wire4074/X wire4075/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20018__B1 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14496__B2 _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4085 VPWR VGND wire4085/X _28653_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19959__B1 _25692_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30523__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3193 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19720_ _19719_/X _28517_/Q _28517_/D _19718_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__31649__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4096 VPWR VGND wire4096/X _28649_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_43_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16932_ _16922_/X _29683_/D wire902/X _16931_/X _16913_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 X_28918_ _28918_/Q _32117_/CLK _28918_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout1821 VPWR VGND _27693_/A1 _18252_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3362 wire3362/A wire3362/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_77_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20569__A1 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1832 VPWR VGND wire1833/A _18192_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14268__A_N _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29898_ _29898_/Q _31916_/CLK _29898_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_8_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3384 wire3385/X wire3384/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28570__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1843 _17536_/Y _17833_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_4_2223 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24600__B _24600_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29696__CLK _29697_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16237__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17434__A1 _32273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2650 VPWR VGND _19554_/B _14195_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_111_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3395 wire3396/X wire3395/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_277_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1854 _14406_/Y wire1855/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_19651_ _26179_/B1 _19650_/X _19695_/A2 _28486_/Q _28486_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21230__A2 _29692_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_2245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1865 VPWR VGND _22679_/S _14403_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_280_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16863_ VGND VPWR _16942_/S _29484_/Q _32138_/Q _16863_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20620__S _20625_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28849_ _28849_/Q _32320_/CLK _28849_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_286_3879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2672 VPWR VGND wire2672/X hold185/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22401__A _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_3845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2683 wire2684/X _19587_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15445__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20163__C_N _19754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1887 VPWR VGND _20876_/S _20868_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_34_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2694 wire2694/X _14166_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_18602_ VGND VPWR _18602_/S _29849_/Q _28316_/Q _28316_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1898 wire1905/A _22090_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16642__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15814_ wire1533/X wire3276/X _29165_/Q _15814_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_128_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31860_ _31860_/Q _31860_/CLK _31860_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19582_ VGND VPWR wire2678/X _26866_/A1 _19632_/A _19582_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__15996__A1 _29308_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16794_ _16387_/A _16387_/C _28108_/Q _16794_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_1_3889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15996__B2 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_2577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30673__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19187__A1 _19186_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26801__D_N wire1272/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31799__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1993 VPWR VGND wire1993/X wire1995/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_94_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24180__A1 _28482_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27403__S _27403_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18533_ hold240/A _18533_/X _29652_/Q _29446_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 X_30811_ _30811_/Q _32010_/CLK _30811_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24180__B2 _28610_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19726__A3 _19539_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15745_ _15739_/X wire1072/X _15745_/A1 _15744_/Y _15745_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_19_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30975__D _30975_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31791_ _31791_/Q _31896_/CLK _31791_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_223_5287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_4591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_3828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22191__B1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17737__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_170_core_clk _32553_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22730__A2 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19710__A _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30742_ hold362/A _32540_/CLK _30742_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18464_ VGND VPWR _18464_/S wire3816/X _28238_/Q _28238_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_206_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15676_ _15721_/A2 _15676_/X _15675_/X _15692_/S _32071_/Q wire1515/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_102_4204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20741__A1 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4207_A wire4207/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_2263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16945__B1 wire1044/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15748__B2 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_260 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22547__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output696_A wire3437/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_271 _31428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_282 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15212__A3 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17415_ _17441_/B2 _17415_/A2 _17415_/X _17447_/A1 input191/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_106_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31029__CLK _31693_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14627_ _16798_/A2 _14627_/X _32342_/Q _14627_/C1 _14627_/A1 _14935_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_195_4917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_293 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30673_ _30673_/Q _31119_/CLK hold348/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18395_ VGND VPWR _18399_/S _23297_/A1 _28172_/Q _28172_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_50_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26209__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24483__A2 wire798/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19344__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32412_ _32412_/Q _32412_/CLK _32412_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17346_ _17424_/B _17345_/X _32290_/Q _17424_/C _17347_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18698__B1 _30089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22494__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3547 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14558_ _14558_/X _30438_/Q _14557_/X _15771_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__14971__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_2933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26543__A _26543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2526_A _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32343_ _32343_/Q _32388_/CLK _32343_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16173__A1 _28879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17277_ _17278_/C _30922_/Q wire3589/X wire3100/X _30999_/Q _19792_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_14489_ _22078_/A _14489_/X hold398/A _30443_/Q _14087_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_48_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27358__B _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17370__B1 input182/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25432__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2294 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30053__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16712__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31179__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19016_ _19016_/X _19015_/X _28063_/Q _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XANTENNA__23378__S _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22246__A1 _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16228_ _29664_/D _16218_/X _16209_/X wire891/X _16227_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_217_3623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32274_ _32274_/Q _32287_/CLK _32274_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25983__A2 _25567_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32424__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20257__A0 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5424 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23994__A1 _30733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22797__A2 wire3212/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_1956 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_4513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31225_ hold105/A _31754_/CLK _31225_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16159_ _16159_/X _32119_/Q _16434_/A2 _16642_/B2 wire944/X _16158_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire1661_A _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_135_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24998__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_4457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire745_A wire745/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15279__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17673__A1 _17672_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16476__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31156_ _31156_/Q _32541_/CLK _31156_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28913__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18870__B1 _20868_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26932__A1 _31956_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26932__B2 wire2692/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3271 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20009__B1 _20008_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14487__B2 _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15684__B1 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30107_ _30107_/Q _30456_/CLK _30107_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24943__B1 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19918_ VGND VPWR wire2143/X _26694_/D _25980_/A2 _19918_/X _27075_/C1 _20061_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_0_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3790 _29945_/Q wire3791/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32574__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31087_ _31087_/Q _32295_/CLK _31087_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_275_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire912_A wire912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24510__B _31288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18622__A0 _28336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30038_ _30038_/Q _30466_/CLK _30038_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_0_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19849_ _19849_/B wire1629/A _19849_/A _19849_/X _26829_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__19965__A3 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20530__S _20545_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_4491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19604__B _19604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14239__A1 _31283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout2870_A _21066_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_1033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25499__A1 _19498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25325__C _31266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15436__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14239__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_258_core_clk _32581_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__13933__A _28564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_2937 VGND VPWR VGND VPWR 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NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3843_A wire3844/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1601_A _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20799__A1 _29312_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_2301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19653__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21996__B1 _21995_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28593__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27587__A1_N _27585_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26900__B _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17664__A1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16467__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29821_ _29821_/Q _30030_/CLK _29821_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27284__A hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22156_ _29822_/Q _29823_/Q _22156_/Y _22163_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__17664__B2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26923__A1 _31947_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26923__B2 wire2362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_load_slew2749_A _23737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24701__A _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput470 _13894_/Y la_oenb[86] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_96_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput481 _13948_/Y la_oenb[96] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_212_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_57_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21107_ VGND VPWR _21107_/C _21173_/B _21107_/X _29451_/D _27598_/C VGND VPWR NF_sky130_fd_sc_hd__and4b_1 Xfanout1106 _15638_/B1 _15515_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17907__A_N _17891_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput492 _28654_/Q la_output[105] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_62_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_82_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29752_ _29752_/Q _29752_/CLK _29788_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_5112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22087_ _22513_/C1 _22086_/X wire828/A _29811_/Q _29811_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26964_ VGND VPWR _26968_/C _31988_/Q _31992_/Q _26964_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_43_2059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_3194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14004__A _28493_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21748__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1139 _14794_/S _15275_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30696__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_21_3047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16219__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17416__A1 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28703_ _28703_/Q _32016_/CLK _28703_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21212__A2 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25915_ VGND VPWR _14171_/A _19551_/A _25903_/S _25915_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_21038_ _22135_/A _29500_/Q _21037_/X _29500_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20440__S _20440_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29683_ hold351/A _32569_/CLK _29683_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31941__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19514__B _24441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26895_ _23599_/B _26894_/Y _26900_/A _31897_/Q _31897_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_fanout1970_A _18856_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_1831 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_5129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1245 VPWR VGND wire1245/X _24204_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_5189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1256 VPWR VGND wire1256/X _24088_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_275_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28634_ _28634_/Q _32160_/CLK _28634_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_5_1853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_207_4526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_2075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1267 VPWR VGND wire1267/X _23952_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_13860_ _28637_/Q _13860_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire2142_A _19778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25846_ _25844_/X _25846_/B _31445_/D _25878_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_129_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1278 VPWR VGND wire1278/X _21215_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_199_5006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1289 wire1289/A wire1289/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_1_1717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15442__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24162__B2 _28704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28565_ _28565_/Q _31894_/CLK _28565_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_281_3765 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25777_ VGND VPWR _31417_/Q hold487/A _27280_/C _25777_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_13791_ _13791_/Y _31155_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_22989_ VGND VPWR _22988_/X _22987_/X _31395_/Q _22989_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_73_2701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14650__A1 _29039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26439__B1 _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22875__B _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15530_ VGND VPWR _15530_/X _15530_/A2 _15757_/C1 _15529_/X _15528_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27516_ VGND VPWR _27516_/S _27709_/A1 _32331_/Q _32331_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19530__A _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29099__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24728_ _24722_/B _24727_/X _31504_/Q _24724_/Y _24729_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_259_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20184__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2407_A _20654_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28496_ _28496_/Q _32114_/CLK _28496_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_19_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20676__A _32336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_1448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21920__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21271__S _23533_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_34_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26066__C _31537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15461_ VGND VPWR _29156_/D _15441_/Y _15450_/Y _15612_/B _15460_/Y VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_242_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27447_ VGND VPWR _27475_/S _32280_/Q _32281_/Q _27447_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24659_ _24661_/D _31443_/Q _31462_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_201_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3351_A _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25662__A1 _25661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3143 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24465__A2 wire1326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_4062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17200_ VGND VPWR _17223_/S _30212_/Q _30401_/Q _17200_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_29_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_3484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_2188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3449_A wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30076__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14412_ _14429_/B _21643_/A _14412_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_142_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22476__A1 _22512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_2196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18180_ VGND VPWR _18222_/S _28083_/Q wire2013/X _28083_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27378_ VGND VPWR _27384_/S _32230_/Q _27268_/X _32230_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15392_ _15392_/X _15389_/X _15735_/B _15744_/B1 _15391_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__23673__B1 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14953__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_3683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31321__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32447__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20487__A0 _29005_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17131_ _22026_/A2 _29722_/Q _29892_/Q _21630_/B1 _21619_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 X_29117_ _29117_/Q _32575_/CLK _29117_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_88_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14343_ _14347_/D _29712_/Q _21339_/C _21451_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XANTENNA_max_length3808_A _18532_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26329_ _26329_/Y _26329_/B _26898_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_253_5258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17985__A _30415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16155__A1 wire1485/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2776_A _27698_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17352__B1 _17348_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27178__B _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25414__A1 _31278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_4_3_0_core_clk clkbuf_5_7_0_core_clk/A clkbuf_4_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_231_5501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19892__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_136_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14166__A0 hold146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23198__S _23199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22228__A1 _29833_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17062_ _17062_/X _17027_/B _17094_/A _17077_/A _21632_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_197_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29048_ _29048_/Q _32322_/CLK _29048_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14274_ _25163_/C _14245_/B _14274_/X _24447_/A _29980_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 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VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__22779__A2 _29889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23976__A1 _28526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23976__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31471__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27167__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14613__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31010_ _31010_/Q _32579_/CLK _31010_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_212_4243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17655__A1 _31711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27194__A _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18852__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25707__A _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3053 _18054_/X _18085_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26914__B2 wire2319/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14469__A1 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17964_ VGND VPWR _17974_/S wire3870/X _27901_/Q _27901_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_113_2216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15130__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26390__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4157_A _28143_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_5077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_944 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19703_ _27003_/B1 _19702_/Y _19711_/A2 _28512_/Q _28512_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_188_4798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1640 VPWR VGND _27120_/B wire1643/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3181 VPWR VGND wire3181/X wire3182/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_110_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16915_ _16915_/X _28899_/Q _16947_/A2 _16928_/A3 _16928_/B1 _16914_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_36_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3192 VPWR VGND wire3192/X wire3192/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20350__S _20352_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output611_A _28647_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17895_ VGND VPWR _17895_/C _24586_/B _24389_/C _17895_/D _17895_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 Xfanout1662 _19516_/X _26837_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__25145__C _31205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15418__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_351_core_clk _29788_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_229_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1684 VPWR VGND _27687_/A1 _18221_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__13753__A hold82/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18080__A1 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19634_ _19634_/B _19573_/A _19780_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 X_31912_ _31912_/Q _31912_/CLK hold459/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire2491 VPWR VGND _20948_/S _20933_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1695 wire1698/X _15770_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_225_4626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16846_ _16878_/A2 _16878_/A1 _28432_/Q _16846_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26142__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28316__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24153__A1 _28543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23661__S _23661_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15433__A3 _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16630__A2 wire992/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24153__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31843_ _31843_/Q _32010_/CLK _31843_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19565_ _26861_/C1 _19564_/Y _19632_/A _28462_/Q _28462_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_56_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4951 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16777_ VGND VPWR _16918_/S _32439_/Q _32367_/Q _16777_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_56_3655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22164__B1 _29824_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13989_ _28508_/Q _13989_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_39_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22703__A2 _21464_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25799__D _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26257__B _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18516_ VGND VPWR _18522_/S _18516_/A1 _28288_/Q _28288_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23900__B2 wire3628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15728_ _15728_/X _29549_/Q _15727_/X _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__30419__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_2834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31774_ _31774_/Q _31815_/CLK _31774_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19496_ _31325_/Q _31327_/Q _19496_/X _31326_/Q _19493_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_54_4091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17879__B _17879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21911__B1 _21559_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_1548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21181__S _21201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25102__B1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30725_ VGND VPWR hold324/X _32498_/CLK _30725_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18447_ VGND VPWR _18464_/S wire3871/X _28221_/Q _28221_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28466__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15659_ VGND VPWR _15736_/S _29613_/Q _29645_/Q _15659_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_15_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16275__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2451_A _24210_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17591__B1 wire2768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20190__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25653__A1 _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24456__A2 _24442_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1862 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23113__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29711__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26850__B1 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2549_A _20245_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3994 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22467__A1 _17056_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold81_A hold81/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30656_ hold359/A _31351_/CLK _30656_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18378_ VGND VPWR _18388_/S wire3877/X _28155_/Q _28155_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14944__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3160 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20478__A0 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19332__A1 _19329_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_141_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30569__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17329_ hold58/X _17447_/B2 _17329_/X input176/X _17447_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_15_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18490__S _18490_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30587_ _30587_/Q _30903_/CLK hold464/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1876_A _19785_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27088__B _27100_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17343__B1 wire2028/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25405__A1 _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19883__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31814__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22482__A4 wire1748/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24505__B _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14157__B1 _31250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22219__A1 _29831_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20340_ VGND VPWR _20360_/S _27245_/A0 _28880_/Q _28880_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32326_ _32326_/Q _32575_/CLK _32326_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16697__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_3478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23416__B1 _30415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25956__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20525__S _20545_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29861__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_1731 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23967__A1 wire3512/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15619__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_4078 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13928__A _28569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23967__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20271_ VGND VPWR _20282_/S _27242_/A0 _28813_/Q _28813_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27158__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32257_ _32257_/Q _32513_/CLK _32257_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_170_3011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_1021 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_3829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22010_ _22010_/Y _22010_/A _22010_/C _22010_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_189_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_2471 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17646__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25169__B1 _31216_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31208_ _31208_/Q _32554_/CLK _31208_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27308__S _27311_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21442__A2 _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17646__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18843__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26905__A1 _26904_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32188_ _32188_/Q _32537_/CLK _32188_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31964__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17208__A2_N _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23719__A1 _31470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24916__B1 _24915_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31139_ VGND VPWR _31139_/D _32531_/CLK _31139_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19615__A _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15121__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25336__B _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput209 VPWR VGND rstb_l_in _32602_/A VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__26381__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19399__A1 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24392__A1 _31000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27832__A _27832_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21825__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20260__S _20261_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23961_ _30862_/D _24199_/B1 _23960_/X _23959_/X _23956_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XFILLER_211_2340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_208_4802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15409__B1 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14880__A1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26669__B1 _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16606__C1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25700_ VGND VPWR _25722_/C _25722_/D wire836/X _25703_/B _31398_/Q _27793_/B VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_42_2092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18071__A1 wire3857/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22912_ _22934_/A _22913_/A _22911_/X _22910_/X _22878_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22ai_4 XFILLER_284_571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26680_ _26696_/D _31867_/Q _26680_/X _31795_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA_wire3424_A wire3425/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27330__A1 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26133__A2 _19531_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23892_ _24207_/B1 _28678_/Q _23892_/X _19646_/B _28486_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__29241__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24144__A1 _31116_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14478__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23571__S _23582_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24144__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15424__A3 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25631_ _25578_/X _31377_/D _26544_/C1 _25630_/Y _25629_/X _25628_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__16621__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22843_ _22843_/B _22869_/B _22843_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_77_2155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27270__C _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14632__A1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28809__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22155__B1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25892__A1 _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1384_A _19518_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30099__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28350_ _28350_/Q _30378_/CLK _28350_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19350__A _28239_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25562_ VGND VPWR _25564_/S _31361_/Q _31362_/Q _31361_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25071__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20166__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22774_ VGND VPWR _22793_/A _14404_/B _22846_/B _22774_/X _22773_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_263_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31344__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21091__S _21097_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19571__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27301_ VGND VPWR _27301_/S _32164_/Q _27280_/X _32164_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_3266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24513_ _31292_/Q _24516_/A _24522_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__22170__A3 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21725_ _21746_/S hold455/A _21725_/X _21999_/S1 _21365_/B _14318_/X hold449/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_33_4175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28281_ _28281_/Q _30279_/CLK _28281_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25493_ _19495_/X _25454_/A _31326_/D _25492_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__29391__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25644__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16924__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27232_ VGND VPWR _27424_/S _32107_/Q _27231_/X _32107_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22458__A1 _22448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24444_ _14367_/B _24543_/A _24445_/B _24443_/X _26763_/A _14143_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_240_2057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21104__B _21104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21656_ _21657_/B _21767_/S _21657_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__28959__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20469__A0 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20607_ VGND VPWR _20617_/S _27700_/A1 _29122_/Q _29122_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23600__A _31087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27163_ VGND VPWR _27163_/S _27706_/A1 _32069_/Q _32069_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_5567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16137__A1 _28846_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24375_ _24374_/X _24888_/D _24889_/A1 wire2017/X _30990_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27397__A1 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31494__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32335__D _32335_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21130__A1 _23663_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21587_ _30364_/Q _21549_/B _21288_/Y _30479_/Q _21668_/B _21514_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_68_2803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_3829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19874__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_10_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_2980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26114_ _31549_/D _26020_/Y _24594_/A _31549_/Q _26120_/A2 VGND VPWR _26113_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_200_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23326_ VGND VPWR _23334_/S _30304_/Q _17152_/X _30304_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16688__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20538_ VGND VPWR _20551_/S _29055_/Q _27697_/A1 _29055_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_85_3851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27094_ _27094_/X _24841_/B _32025_/Q _27098_/A _27098_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_159_3698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25947__A2 _31495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20435__S _20446_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19509__B _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14699__A1 _30890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26911__A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_101_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15896__B1 _29521_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23958__A1 _31130_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_9_0_core_clk clkbuf_opt_9_1_core_clk/A clkbuf_5_3_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xmax_length2466 VPWR VGND _23248_/S _23251_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15529__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27983__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26045_ _31531_/D _26020_/Y _24609_/B _31531_/Q _26120_/A2 VGND VPWR _26044_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_257_2587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27149__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2477 VPWR VGND _21167_/S _21166_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23257_ VGND VPWR _23267_/S _29505_/Q _30240_/Q _30240_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_289_4929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2092_A wire2093/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20469_ VGND VPWR _20482_/S _28988_/Q _27694_/A1 _28988_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_235_3564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input175_A mprj_dat_i[10] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19626__A2 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4096 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21969__B1 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_5538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22208_ _22206_/X _21045_/X _22135_/A _22221_/C _22208_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_270_3477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22091__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21433__A2 _21427_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_5598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18834__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23188_ VGND VPWR _23188_/X _23186_/X _23187_/X _23185_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_118_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_3237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_3401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16845__C1 _16856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24907__B1 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29804_ VGND VPWR _29804_/D _30470_/CLK hold486/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_279_376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22139_ VGND VPWR _22139_/X _22136_/X _22138_/X wire2273/X _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_234_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19525__A _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15112__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26372__A2 _26874_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28339__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2357_A wire2358/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27996_ _27996_/Q _30282_/CLK _27996_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_109_core_clk _32358_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23186__A2 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21266__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29735_ _29735_/Q _30387_/CLK _29735_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16860__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14961_ _15350_/A1 _16646_/A2 _14961_/X _15350_/B1 _29079_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_26947_ _31970_/D _26946_/Y _26947_/B2 wire1230/A _31970_/Q wire1570/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__19244__B _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22394__A0 wire769/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold8 hk_dat_i[19] hold8/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__14871__A1 _15307_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16700_ wire1010/A wire1482/A _32437_/Q _16700_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__21736__A3 hold273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_3002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18062__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13912_ _28585_/Q _13912_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__17045__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17680_ _17680_/X _23611_/D _17474_/C _17473_/X _17457_/B VGND VPWR _17875_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_2_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27321__A1 _32180_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1053 VPWR VGND wire1053/X wire1053/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29666_ _29666_/Q _30900_/CLK _29666_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2524_A _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26124__A2 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14892_ _14892_/X _30895_/Q _14891_/X _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_26878_ _26878_/Y _26878_/B wire752/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_38_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1064 VPWR VGND wire1064/X wire1065/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_1661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_3368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16073__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23481__S _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17270__C1 _17269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25332__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28617_ _28617_/Q _32470_/CLK _28617_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16612__A2 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16631_ _16959_/A2 wire3287/X _28931_/Q _16631_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_220_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_1969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1097 VPWR VGND wire1097/X wire1097/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13843_ _22185_/C _29825_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 X_25829_ _31438_/Q _31429_/Q _31439_/Q _25831_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_21_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29597_ _29597_/Q _32316_/CLK _29597_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27180__C _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22146__B1 _18667_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_5566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25883__A1 _31459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29734__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19350_ _28239_/Q _19350_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__19011__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16562_ _16840_/A2 wire3281/X _29292_/Q _16562_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28548_ _28548_/Q _31522_/CLK _28548_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13774_ _31172_/Q _13774_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_108_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_1272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_4135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_4523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18301_ _18300_/Y _18269_/X wire3174/X _18301_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_243_490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_1245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15513_ VGND VPWR _15513_/X _15510_/X _15762_/A1 wire1128/A _15512_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_220_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19281_ VGND VPWR _19374_/B _28172_/Q _28140_/Q _19281_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16376__A1 wire3281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15179__A2 wire1093/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16493_ _16791_/A2 _16493_/X _16815_/A2 _15774_/X _14104_/Y _29603_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28479_ _28479_/Q _32552_/CLK _28479_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30711__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31837__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16915__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30510_ _30510_/Q _32438_/CLK _30510_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18232_ _18232_/Y _18231_/Y _18216_/X _22370_/A2 _18316_/A _18230_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__26805__B _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17478__B_N _26488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15444_ wire3258/X wire1741/A _15444_/X _15760_/B1 _28892_/Q wire1702/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__14456__A_N _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15584__C1 _15598_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_760 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14926__A2 _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31490_ _31490_/Q _31575_/CLK _31490_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_125_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_177_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29884__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2873 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18163_ _18163_/Y _18163_/B _22338_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_30441_ VGND VPWR _30441_/D _31959_/CLK _30441_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_142_2990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17919__S _17946_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16128__A1 _30780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15375_ _16956_/A2 _15747_/A1 _29186_/Q _15375_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_125_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21121__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16823__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19865__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22464__A4 _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23867__D _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17114_ VGND VPWR _23348_/C _30201_/Q _30390_/Q _17114_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_7_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14326_ _14326_/Y _14338_/B _14338_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__17876__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_4010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30372_ _30372_/Q _30453_/CLK _30372_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18094_ VGND VPWR _18117_/S wire3894/X _28023_/Q _28023_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_193_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_1918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20345__S _20352_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25938__A2 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30861__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output561_A _28729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31987__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26821__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output659_A wire2707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold408 hold408/A hold408/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__23949__A1 wire4126/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29114__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32111_ _32111_/Q _32350_/CLK _32111_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17045_ _17077_/A _21778_/B _29881_/Q _21640_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 Xhold419 hold419/A hold419/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__13748__A _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19078__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14257_ _14127_/A _14257_/Y _14256_/X _25361_/A wire3235/X _29497_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_256_2064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15351__A2 wire1172/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21441__A2_N _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17628__A1 _17662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2387 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_4371 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32042_ _32042_/Q _32112_/CLK _32042_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23656__S _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14188_ VGND VPWR _14168_/S hold152/X _14187_/X _14188_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22560__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_136_2750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31217__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_4141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15103__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27560__A1 _27559_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26363__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18996_ _19202_/B _28353_/Q _18995_/X _18996_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17881__C _17881_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29264__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21176__S _21201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23177__A2 _23192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16851__A2 wire1029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17947_ VGND VPWR _17947_/S wire3822/X _27885_/Q _27885_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_1425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21188__A1 _29630_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_1984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22385__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26673__A1_N _31865_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_1998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26115__A2 _26121_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1624_A wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1481 _16878_/A1 wire1482/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__19250__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17878_ _26245_/C _17875_/Y _17877_/X _32578_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 Xfanout1492 VPWR VGND _15615_/A2 _14547_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30241__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31367__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24126__A1 _28476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17800__A1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16603__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24126__B2 _28604_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19617_ _19618_/B _25073_/B _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA_wire708_A wire708/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25172__A _25172_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16829_ VGND VPWR _16829_/X _16826_/X _16828_/X _16068_/S wire1032/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_225_4456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18485__S _18496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22137__B1 _22273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14614__A1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_3613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_4077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15811__B1 _28909_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19002__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27798__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22688__A1 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19548_ VGND VPWR wire2645/X _19522_/A _19598_/A _19548_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_31826_ _31826_/Q _32290_/CLK _31826_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20148__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_5201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_5370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20699__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19553__A1 _28459_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30391__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31757_ _31757_/Q _31762_/CLK _31757_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_wire1993_A wire1995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19479_ _19481_/A _25462_/B _31312_/Q _25462_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XFILLER_91_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4680 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21510_ VGND VPWR _21512_/A _21507_/Y _17159_/B _21534_/A _21628_/C _21628_/D VGND + VPWR NF_sky130_fd_sc_hd__a311o_2 XFILLER_30_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25530__B_N _19467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30708_ hold309/A _32168_/CLK input89/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_52_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22490_ VGND VPWR _22512_/A3 _22510_/A4 _22512_/A2 _22490_/X _30006_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_34_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31688_ _31688_/Q _31762_/CLK _31688_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24834__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19305__A1 wire1912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23101__A2 _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21441_ _21441_/Y _30346_/Q _21465_/B _14113_/Y _21463_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XFILLER_52_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16119__A1 _29527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30639_ _30639_/Q _31578_/CLK hold322/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27379__A1 _32231_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21112__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15590__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19856__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_5177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17867__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24160_ _24205_/B1 _30701_/Q wire1248/X _24160_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15327__C1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21372_ _29880_/Q _21372_/B _21378_/D _21459_/D _21372_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_156_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20255__S _20261_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23111_ _23191_/C1 _21211_/B _23190_/B _30435_/Q _23111_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_258_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15349__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20323_ VGND VPWR _20323_/S _27261_/A0 _28864_/Q _28864_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32309_ _32309_/Q _32309_/CLK _32309_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19069__B1 _19069_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24091_ _24091_/X _24089_/X _28537_/Q _24163_/B2 _19718_/B VGND VPWR _24090_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 Xmax_length1039 VPWR VGND _16727_/B1 wire1038/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_219_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24062__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_7_core_clk _32420_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_288_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1132_A _14551_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23404__A3 wire3444/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17619__A1 _31715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23042_ _30155_/D _23057_/S _23041_/X _30155_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__23566__S _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22073__C1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21415__A2 _21551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29607__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22612__A1 _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20254_ VGND VPWR _20259_/S _28797_/Q _27703_/A1 _28797_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18816__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3906 VPWR VGND wire3906/X wire3908/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_214_4883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22612__B2 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3917 VPWR VGND wire3917/X wire3918/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_150_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20623__A0 _29169_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3928 VPWR VGND _23170_/C _29731_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_41_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_273_core_clk _32437_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_6_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32142__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27850_ _32548_/Q _27849_/Y _32548_/D _25807_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_wire3541_A wire3541/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20185_ VGND VPWR _19628_/B _19566_/A _20192_/A2 _20185_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__26354__A2 _19563_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_2728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25011__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_1870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_61_3180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21086__S _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_202_core_clk _32579_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24365__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25562__A0 _31362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26801_ _26801_/B wire1272/X _27120_/B _26801_/X _27058_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_41_3776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27562__A _27562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27781_ VGND VPWR _27783_/S _25033_/B _32506_/Q _32506_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_148_4023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24993_ _25681_/B1 _24992_/X _25017_/A2 _31140_/Q _31140_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_252_1794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_180_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout857_A _19928_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28631__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29520_ _29520_/Q _32347_/CLK _29520_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_243_5235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29757__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22915__A2 wire1866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1599_A _19994_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18044__A1 wire3837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26732_ _26732_/Y _31781_/Q _26760_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_2_3269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25585__B1_N _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23944_ _23944_/X _24081_/A3 _19928_/B _28619_/Q _31097_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__26106__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold170_A hold170/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_1801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16055__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24117__A1 wire761/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1860_A _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32292__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25314__B1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29451_ _29451_/Q _31970_/CLK _29451_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26657__A3 _23772_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26663_ _26662_/X _26893_/C1 _26678_/B _31894_/Q _31789_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_144_3208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23875_ _30854_/D _26542_/B _31459_/Q _26542_/A _25881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__18395__S _18399_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22128__B1 _30030_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_804 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24668__A2 _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30734__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1766_A _19509_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_815 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15802__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28402_ VGND VPWR _28402_/D _28402_/CLK _28402_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19080__A _30269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_826 wire3901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25614_ _13754_/Y _25629_/A _25614_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_281_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22679__A1 _30090_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22826_ _22831_/D _22826_/X _22826_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_204_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29382_ _29382_/Q _30474_/CLK _29382_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_837 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_278_4608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26594_ wire3454/X _31772_/D _26592_/X _27071_/C1 _31877_/Q _26593_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_0_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_848 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28781__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_859 wire4114/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19544__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23340__A2 _30406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_74_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28333_ _28333_/Q _30027_/CLK _28333_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27501__S _27513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20657__C _20657_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_5033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25810__A _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21887__C1 _22966_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25545_ _31350_/Q _31351_/Q hold502/A _25546_/D _25547_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_246_1576 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22757_ VGND VPWR _22757_/X _22820_/B _29887_/Q _22820_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__20154__A2 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25078__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21708_ _21708_/A _21708_/B _21708_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XANTENNA__20376__D _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28264_ _28264_/Q _30330_/CLK _28264_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27082__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23628__B1 wire1330/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15566__C1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14908__A2 wire1189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25476_ VGND VPWR _19484_/X _31317_/Q _31318_/Q _25476_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire2105_A wire2106/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22688_ _22661_/B _22688_/X _22706_/C _14404_/B _22686_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_65_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30884__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_5331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25093__A2 wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26290__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28011__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27215_ _32099_/Q _32100_/Q _32098_/Q _25769_/X _27216_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__29137__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24427_ _24437_/B _31013_/D _24427_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_21639_ _21640_/D _21640_/A _21791_/S _21640_/B _21640_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 XFILLER_279_2064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22300__A0 _29145_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28195_ _28195_/Q _32320_/CLK _28195_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_4229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21769__B hold162/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17307__B1 _30999_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15581__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19847__A2 _19853_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20673__B _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24840__A2 wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23687__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15160_ _15160_/X _15611_/A1 _15157_/X _15159_/X _15632_/A1 _15155_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_254_5397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15318__C1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27146_ VGND VPWR _27149_/S _27689_/A1 _32052_/Q _32052_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26578__C1 wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24358_ _32026_/Q _24370_/A2 _24358_/X _31994_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__22851__A1 _29896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17590__B1_N _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_4382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26042__A1 _24597_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26042__B2 _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30114__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14111_ _21392_/A _14111_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__17322__A3 _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23309_ VGND VPWR _23317_/S _30287_/Q _20987_/C _30287_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_133_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15091_ _15751_/A1 _16910_/A2 _15091_/X _15751_/B1 _29566_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_27077_ _27077_/C1 _27076_/X wire772/A _32016_/Q _32016_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14163__S _14167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24289_ _30939_/D _24273_/D _31591_/Q _24284_/X _31668_/Q _26376_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_4_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27790__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2274 VPWR VGND wire2273/A _23343_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26593__A2 wire817/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3314_A _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16530__B2 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25250__C1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3361 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28161__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_4950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2285 VPWR VGND wire2284/A _22123_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29287__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1551 VPWR VGND _16938_/A2 wire1552/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23476__S _23496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14042_ _28455_/Q _14042_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26028_ VGND VPWR _26028_/X _31526_/Q _31525_/Q _31527_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_5_989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22603__A1 _22618_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22603__B2 wire3705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_2844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_68_1998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21957__A3 _21713_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17086__A2 _23095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2641_A wire2642/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18850_ _18850_/X _18844_/X _18849_/X wire1885/X _22135_/A wire1563/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_2 XFILLER_192_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26345__A2 wire781/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2739_A hold115/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30264__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15097__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20090__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24794__B1_N _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23159__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17801_ _17707_/X _17800_/X _17852_/A _17685_/A _17801_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_268_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_346 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18781_ VGND VPWR _28180_/Q _28212_/Q _19333_/B _18781_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_15993_ _15992_/X _15975_/S wire1035/X _15993_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27979_ _27979_/Q _31933_/CLK _27979_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14399__A _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22367__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22906__A2 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18035__A1 _29855_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29718_ VGND VPWR _29718_/D _30392_/CLK _29718_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_17732_ VGND VPWR _17833_/S _17777_/A _17683_/X _17732_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19232__B1 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14944_ _15332_/A2 _14944_/X _14943_/X _15356_/A2 _29465_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_268_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27879__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_3023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30990_ _30990_/Q _32297_/CLK _30990_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_5319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24108__A1 _28507_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18586__A2 _21103_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19783__A1 _28548_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27845__A2 _32545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_3679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_4191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17663_ _17576_/C _17662_/A _17662_/Y _17663_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_29649_ _29649_/Q _30330_/CLK _29649_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14875_ VGND VPWR _14875_/X _15628_/B1 _14928_/A1 _14872_/X _14874_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16597__A1 wire911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19702__B _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25856__A1 _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20848__B _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19402_ VGND VPWR _19406_/S _27693_/A1 _28418_/Q _28418_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16614_ _16614_/X _29261_/Q _16934_/A2 _16944_/B2 _16601_/S _16613_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_211_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17503__A _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13826_ _31048_/Q _25971_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4022_A wire4023/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_5617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17594_ VGND VPWR _17602_/S _17593_/X _17572_/X _17594_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_109_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1038_A wire1038/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_92_3685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_77_core_clk _31801_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_223_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22134__A3 _22133_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31611_ _31611_/Q _32036_/CLK _31611_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27411__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19333_ _30281_/Q _19333_/X _19333_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_147_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16545_ _16544_/X _16843_/A2 _16841_/A2 _28857_/Q _16545_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_51_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13757_ hold109/A _13757_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20145__A2 _19559_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21342__A1 _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_23_1_core_clk clkbuf_opt_23_1_core_clk/X clkbuf_opt_23_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_160_3065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_290_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_2675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31542_ _31542_/Q _31694_/CLK _31542_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19264_ wire1916/X _20858_/S _19263_/X _19261_/X _19264_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_73_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_38_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16476_ VGND VPWR _16476_/X _16458_/S _16940_/B1 _16473_/X _16475_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21893__A2 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32015__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25084__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26281__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2209 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length2341_A wire2342/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18215_ _29340_/Q _29342_/Q _18269_/B _18215_/D _18295_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_201_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17649__S _17764_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15427_ VGND VPWR _15639_/S _29607_/Q _29639_/Q _15427_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19299__B1 _19298_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_5404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31473_ _31473_/Q _31510_/CLK _31473_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19195_ VGND VPWR _19195_/X _19306_/B _19047_/S _28363_/Q _19194_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21679__B _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24292__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19838__A2 _19856_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18334__A _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23634__A3 _19784_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24831__A2 _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_5142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17558__B1_N _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17849__A1 _31728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30424_ _30424_/Q _30424_/CLK _30424_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28504__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18146_ VGND VPWR _18150_/S wire3831/X _28074_/Q _28074_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_2711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15358_ _15358_/X _28102_/Q _15357_/X _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__22842__A1 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_3005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_5175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_5_12_0_core_clk clkbuf_5_12_1_core_clk/A clkbuf_4_6_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_core.RAM128_A0[4] wire2430/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18053__B _23415_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14309_ VPWR VGND _30333_/Q _14309_/X _18682_/A VGND VPWR NF_sky130_fd_sc_hd__and2_2 XFILLER_271_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold205 hold205/A hold205/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_4463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32165__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18077_ VGND VPWR _18077_/S wire3838/X _28007_/Q _28007_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30355_ VGND VPWR _30355_/D _32064_/CLK _30355_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_236_3169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24044__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold216 hold216/A hold216/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_15289_ VGND VPWR _15623_/S _29024_/Q _28992_/Q _15289_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_7_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27781__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25241__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold227 hold227/A hold227/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_67_2165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold238 hold238/A hold238/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_3702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_3822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23386__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25792__A0 _31428_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24595__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30607__CLK _31806_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17028_ VGND VPWR _17028_/X _21459_/D _29879_/Q _17078_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xhold249 hold249/A hold249/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_288_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21695__A _22067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold44_A hk_dat_i[29] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22290__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30286_ _30286_/Q _30451_/CLK _30286_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20803__S _20821_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2198 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_5213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28654__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32025_ _32025_/Q _32039_/CLK _32025_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18274__A1 _28099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24502__C _24546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1741_A wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22070__A2 _21611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26336__A2 _24454_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_2305 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24347__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_1200 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_3462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25544__B1 wire2813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18979_ _18979_/X wire1883/X _18973_/X _18978_/X _23355_/C _19085_/C1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20104__A wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22358__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24898__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30757__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18026__A1 wire3897/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_4930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19223__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_187 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_2772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_3405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20908__A1 hold480/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21990_ _21990_/Y _21989_/Y _17183_/B _21966_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__16037__A0 _28747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14102__A _28388_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27297__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21030__A0 _29495_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27836__A2 _27834_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23415__A _23415_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20941_ VGND VPWR _20947_/S _29406_/Q hold221/X _29406_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_1299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16588__A1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19612__B _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_77_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_3801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_Di0[0] wire2320/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13941__A _28556_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_121_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14599__B1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23660_ VGND VPWR _23668_/S _27698_/A1 _30790_/Q _30790_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_165_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3122_A wire3124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20872_ VGND VPWR _30234_/Q _29396_/Q _20872_/S _20872_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_260_4177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2879 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_101_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28034__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22611_ _22594_/S _22617_/B _22611_/X _22611_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__27321__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1274_A _26696_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31809_ _31809_/Q _32016_/CLK _31809_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23591_ VGND VPWR _23595_/S _27512_/A1 _30511_/Q _30511_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20136__A2 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22530__A0 _30030_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1082_A wire1087/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25330_ _25331_/C _31269_/Q _25334_/D _31268_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_30_3400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_2554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22542_ VGND VPWR _22550_/S _29831_/Q _30042_/Q _30042_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27064__A3 _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15548__C1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21884__A2 _21649_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_2737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_5075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15012__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24807__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26272__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24246__A _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16971__B _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30137__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23150__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25261_ _25261_/X _25261_/B1 _29871_/D hold82/A _25197_/D VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_17_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23086__A1 _30430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22473_ _22513_/C1 _22472_/X _22513_/A2 _17079_/X _29997_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire3491_A wire3491/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_5624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23638__A1_N _31085_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24283__B1 _20364_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15563__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16760__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19829__A2 wire1334/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18244__A _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3589_A wire3590/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32508__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1347_A wire1355/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27000_ _27000_/X _27001_/A _31981_/Q _31980_/Q _27000_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__28184__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24212_ VGND VPWR _24220_/S _30888_/Q wire1837/X _30888_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_276_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_3488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_4912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21424_ _21424_/B _21424_/A _21425_/B _21424_/D _21424_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_30_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21636__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_1913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22833__A1 _30470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25192_ _31224_/Q _31223_/Q _25192_/X _24546_/B _24543_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_254_3225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_3848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14491__B hold410/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27221__B1 _32103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20844__B1 _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24143_ _24143_/X _24141_/X _28542_/Q _23879_/X _19718_/B VGND VPWR wire806/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_30_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21355_ _21360_/B _21355_/B _21355_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_176_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24035__B1 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15315__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27276__B hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21101__C _23347_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3756_A _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2983 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27772__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25232__C1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1514_A _15265_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30287__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3608 VPWR VGND wire3609/A wire3617/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_216_4989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_3681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23296__S _23296_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20306_ VGND VPWR _20327_/S _27244_/A0 _28847_/Q _28847_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25077__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28951_ _28951_/Q _32134_/CLK _28951_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24074_ _28471_/Q _24139_/A2 _24074_/X _28599_/Q _19858_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_81_2118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31532__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21286_ _21286_/C _22078_/A _21286_/X _23226_/S _21285_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_154_3370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20713__S _20720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3703 _30338_/Q wire3703/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_fanout974_A wire981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2711 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22597__B1 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3714 _22338_/A _27678_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_210_5267 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_4522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2918 _20386_/X _20410_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_235_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23025_ wire3479/A _32459_/Q _23025_/X _23036_/S1 _32451_/Q _32467_/Q _32411_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_27902_ _27902_/Q _30406_/CLK _27902_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3725 VPWR VGND wire3725/X _30325_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21939__A3 _21559_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18265__A1 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19075__A _28226_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20237_ VGND VPWR _20249_/S _28780_/Q _27143_/A1 _28780_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19462__B1 _28448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27524__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28882_ _28882_/Q _29565_/CLK _28882_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_8_3489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15079__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3758 _17036_/B _21778_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_111_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20072__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22213__B hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_4634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27833_ _32537_/Q _32538_/Q _32539_/Q _25801_/D _32540_/Q _27833_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__16815__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_3900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_249_357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25805__A _32544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_335_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20168_ _25703_/A _20167_/X _20168_/A2 wire4012/X _28728_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_189_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_115_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22349__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24889__A2 _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18017__A1 wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31682__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19214__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19803__A _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27764_ VGND VPWR _27765_/S _25035_/B _32491_/Q _32491_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_98_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24976_ _25041_/A wire1283/X _24976_/X _25041_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA_wire2055_A wire2056/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20099_ _26694_/C _20098_/X _20122_/A _28695_/Q _28695_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_input138_A la_input[69] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27288__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21021__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16028__B1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_5054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_1020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29503_ VGND VPWR _29503_/D _30470_/CLK _29503_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_245_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26715_ _26714_/Y _27071_/C1 _31810_/Q hold431/A _31810_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27827__A2 _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22995__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23927_ VGND VPWR _23879_/A _20666_/A _23924_/X _23927_/X _23926_/X _20673_/C VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_max_length3289_A _14079_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19522__B _19522_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27695_ VGND VPWR _27701_/S wire1792/X _32429_/Q _32429_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16638__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_3174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25838__A1 _25836_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_601 _24118_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15542__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13851__A _29814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_612 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29434_ _29434_/Q _32108_/CLK _29434_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_93_3972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14660_ wire3249/X wire1727/X _14660_/X _14887_/A2 _29071_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_wire2222_A wire2222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26646_ _26645_/X _27087_/C1 _26678_/B _31890_/Q _31785_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_243_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_623 _26884_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23858_ _30847_/D _24310_/B _23858_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__25302__A3 _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_634 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32038__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15251__A1 _30503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_645 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15251__B2 _15265_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_656 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22809_ _22809_/Y _22809_/C _22809_/D _22803_/X _22809_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4b_1 X_29365_ _29365_/Q _30272_/CLK _29365_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_183_2386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_667 wire2611/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14591_ wire3249/X wire1727/X _14591_/X _14705_/B1 _28909_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_26577_ _26577_/X _31841_/Q wire3454/X wire817/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_224_3073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_2621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_678 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23789_ _30824_/D _23813_/C _23789_/A _23807_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_246_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_689 wire3187/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16330_ _16725_/A _16725_/C _30901_/Q _16330_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28316_ _28316_/Q _30425_/CLK _28316_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_1849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_2080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25528_ _31343_/Q _25527_/Y _31343_/D _19456_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__28527__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28273__D _28273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21875__A2 _14365_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29296_ _29296_/Q _32438_/CLK _29296_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15003__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_223_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25066__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18740__A2 _18739_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16261_ _16260_/X _16838_/A1 wire985/A _30899_/Q _16261_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_28247_ VGND VPWR _28247_/D _30156_/CLK _28247_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__23077__A1 hold307/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31062__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25459_ _31309_/Q _25458_/Y _31309_/D _19476_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_259_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21499__B _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23077__B2 _30093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24274__B1 wire801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15554__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16751__A1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18154__A _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2689_A wire2689/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18000_ VGND VPWR _18008_/S wire3868/X _27934_/Q _27934_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_35_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15212_ _15212_/X _15350_/B1 _15521_/S _29054_/Q _15748_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_87_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2911 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14762__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16192_ _16192_/X _29282_/Q _16966_/A2 _16966_/A3 _16720_/C1 _16191_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28178_ _28178_/Q _30395_/CLK _28178_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_core.RAM128_Di0[10] wire2365/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_195_core_clk _31726_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28677__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15143_ _15143_/X _15609_/B1 _15277_/S _28884_/Q _15608_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27129_ VGND VPWR _31486_/Q _27128_/X _27125_/X _27129_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_100_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24026__B1 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15306__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_374_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2856_A _21201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27763__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26566__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25223__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17700__B1 _31723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29922__CLK _32365_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_3601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26090__B _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_124_core_clk _32357_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24603__B _24604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_4076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30140_ _30140_/Q _30404_/CLK _30140_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19951_ VGND VPWR wire1316/X _25022_/C _19570_/X _19951_/X _25692_/A _25022_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_15074_ _16781_/A2 _15560_/A1 _29114_/Q _15074_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_231_3011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20623__S _20638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22588__A0 wire3702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18902_ _18899_/X _18900_/X _18902_/X _19176_/B1 _18901_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14025_ _28472_/Q _14025_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18256__A1 _22356_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_2319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30071_ VGND VPWR _30071_/D _32127_/CLK hold146/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_1000 wire2207/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27515__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19882_ VGND VPWR wire2208/X _26838_/A4 _24046_/B1 _19882_/X _26159_/A _19680_/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_1011 _19618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2663 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_2232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21260__A0 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20063__A1 _28677_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1022 wire4062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24329__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_111_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1033 wire3621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17464__C1 _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15609__A3 _16814_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27406__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18833_ _19333_/B _28023_/Q _18832_/X _18833_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_42_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1044 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26723__C1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1055 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14817__A1 _29309_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_2163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_1066 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14817__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18008__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17932__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19713__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18764_ wire1994/X _27923_/Q wire1932/X _18764_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_168_2816 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15976_ wire918/X _15972_/X _15975_/X _16816_/B1 _15976_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16019__A0 _29043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27279__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21012__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_4188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15490__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_124_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17715_ _17539_/C _17714_/X _31724_/D _17783_/B2 _17711_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_18_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27818__A2 _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22777__C _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28057__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14927_ VGND VPWR _14927_/X _15233_/B1 _15631_/A1 _14924_/X _14926_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_59_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19432__B _28440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18695_ _29813_/Q _21030_/S _18695_/Y _18683_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_209_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30973_ _30973_/Q _31977_/CLK _30973_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17767__B1 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25829__A1 _31429_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29302__CLK _32038_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_5198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_262_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13761__A _31185_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16034__A3 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17646_ _17646_/X _20682_/C _17474_/C _17473_/X _17457_/B VGND VPWR _17875_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_109_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_2775 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14858_ _14857_/X _15610_/B1 _15597_/A2 _30894_/Q _14858_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_282_1028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_2404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15242__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27141__S _27153_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13809_ _31137_/Q _13809_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_105_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17577_ _31711_/Q _17539_/B _17577_/X _31710_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20118__A2 wire2733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_4208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14789_ _14789_/X _15609_/B1 _15233_/B1 _29558_/Q _15608_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA__15793__A2 _16091_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26265__B _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19316_ _19316_/X _19382_/A1 _19310_/X _19315_/X wire3151/X wire1564/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_196_5362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_920 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16528_ VGND VPWR _16528_/X _16525_/X _16527_/X _16930_/A1 wire1058/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_277_3214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32574_ hold171/A _32574_/CLK _32574_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_225_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17887__B _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29452__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26254__A1 wire3464/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27451__A0 _32283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2723_A wire2724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18731__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31525_ VGND VPWR _31525_/D _31552_/CLK _31525_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19247_ _19246_/X _19380_/B1 _19298_/A2 _28333_/Q _19247_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire1691_A _17286_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16459_ _16941_/C _16455_/X _16458_/X _16940_/B1 _16459_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_179_3668 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_121_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24265__B1 _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16742__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2531_A _20486_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_5261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_2216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22276__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31456_ VGND VPWR _31456_/D _32416_/CLK _31456_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19178_ _19178_/A _19178_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__31555__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27203__B1 _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27808__C _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2590 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_3223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_258_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_2484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30407_ hold245/A _31961_/CLK _30407_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_5_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18129_ VGND VPWR _18132_/S wire3885/X _28057_/Q _28057_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_47_3237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18495__A1 wire3825/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_150_core_clk_A clkbuf_5_24_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24017__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31387_ _31387_/Q _32513_/CLK _31387_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__27754__A1 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26557__A2 _14194_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_4391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21140_ _21140_/Y _27233_/B _24210_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_30338_ _30338_/Q _32347_/CLK _30338_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_151_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20533__S _20535_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_134_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_3865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15627__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18247__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21071_ VGND VPWR _21094_/S _27140_/A1 _29522_/Q _29522_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23240__A1 _18496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22043__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30269_ _30269_/Q _30269_/CLK _30269_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27506__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21451__A_N wire3657/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18003__S _18008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1575 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21251__A0 _18552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_1996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18798__A2 wire1994/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_3_5_2_core_clk clkbuf_3_5_2_core_clk/X clkbuf_3_5_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_32008_ _32008_/Q _32434_/CLK _32008_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20022_ VGND VPWR _14176_/Y _19792_/A wire851/X _20022_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_112_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25517__B1 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27316__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23791__A2 wire1807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25625__A _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14808__A1 _28779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1608 VPWR VGND _20671_/A wire1609/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_112_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1619 wire1619/A _19789_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__14808__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17842__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24830_ _24837_/C _31059_/D _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_97_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21872__B _21872_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25344__B _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25532__A3 _31345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21003__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15481__A1 _28861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19747__A1 _13967_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_58_4078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22346__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27809__A2 _25795_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23145__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22977__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24761_ _24770_/A _24768_/A _31462_/Q _31461_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_110_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_5227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_75_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21973_ wire3779/X wire3802/X _21973_/X _21972_/X _21946_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_269_1362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16458__S _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18239__A _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2913 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15362__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1297_A wire1303/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26500_ _26508_/B _26500_/Y _26539_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_269_1384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23712_ _23712_/X _20671_/A _31515_/Q _25566_/B _31563_/Q _20671_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_36_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20924_ VGND VPWR _20948_/S _29389_/Q _29492_/Q _29389_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3504_A _31190_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27480_ VGND VPWR _27484_/S _32298_/Q _27479_/X _32298_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24692_ _24693_/B _31470_/Q _31471_/Q _24680_/A _31472_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XFILLER_265_1237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_13 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_24 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26456__A _26456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_35 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18970__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26493__B2 _27230_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26431_ VGND VPWR _31697_/D _31697_/Q _26544_/C1 _26407_/Y _26403_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_36_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_2236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23643_ VGND VPWR _23668_/S wire2013/X _30773_/Q _30773_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_46 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31085__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20855_ VGND VPWR _22550_/S _20854_/X _29356_/Q _29356_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_39_2086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20109__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16981__A1 _16979_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15784__A2 _15771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_68 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1464_A wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_79 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_123_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32330__CLK _32442_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29150_ hold236/A _32134_/CLK _29150_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26362_ VGND VPWR _26335_/A _24284_/D wire2200/X _26362_/X _27091_/C1 _26376_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_93_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23574_ VGND VPWR _23582_/S _27688_/A1 _30494_/Q _30494_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_5593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold133_A hold133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22195__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20786_ VGND VPWR _20786_/S _21203_/A0 _29300_/Q _29300_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_91_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20708__S _20708_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18183__B1 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25048__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_5036 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25510__D _25510_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28101_ _28101_/Q _32433_/CLK _28101_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25313_ _31265_/D _25311_/X _26498_/A _25312_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_22525_ VGND VPWR _23523_/S _29814_/Q _30025_/Q _30025_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23059__A1 _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29081_ _29081_/Q _32136_/CLK _29081_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26293_ VGND VPWR hold185/A wire3616/A _26331_/B _26293_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire3873_A wire3873/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16733__A1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21287__A2_N _21286_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1631_A wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26796__A2 wire777/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25453__C1 _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29945__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_5432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28032_ _28032_/Q _30452_/CLK _28032_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_2023 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_2376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26903__B _26903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_69_3451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25244_ _26236_/A _25243_/X _25264_/A2 hold75/A _31246_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14744__B1 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20654__D _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22456_ VGND VPWR _22448_/C _21285_/A _22449_/A _22456_/X _29989_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_238_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_1311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32480__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20817__A0 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24704__A _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_5318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21407_ _21679_/C _21506_/D _21679_/B _21679_/D _21411_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__17289__A2 _31907_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18486__A1 wire3848/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24008__B1 _24007_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25175_ _31218_/Q _25174_/Y _31218_/D _25180_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22282__A2 _22279_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22387_ wire3412/A _23403_/B wire3442/X _22387_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_215_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26548__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30922__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25205__C1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14007__A _28490_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20293__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2332 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4201 VPWR VGND _32599_/A wire4202/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_216_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24126_ _24126_/X _19858_/X _28476_/Q _28604_/Q _24139_/A2 VGND VPWR _24118_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21490__B1 _21674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25756__B1 _32084_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21338_ _21322_/Y _21319_/X _21640_/A _21378_/C _21323_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_2 Xfanout3416 VPWR VGND _27091_/C1 wire3428/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29983_ _29983_/Q _30272_/CLK _29983_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20443__S _20452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19517__B _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_152_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25220__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24023__A3 _24022_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3500 VPWR VGND wire3500/X _31193_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_9_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3449 wire3452/X _26637_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3511 wire3511/X _31101_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_191_2677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13846__A _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28934_ _28934_/Q _32575_/CLK _28934_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22034__A2 _21668_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24057_ _28502_/Q _19680_/B _24057_/X _28694_/Q _24079_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_215_2349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_3364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19435__B1 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2172_A _20171_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21269_ VGND VPWR _23532_/S _29731_/Q _22620_/B _29731_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_44 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_4128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20045__A1 _28669_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21242__A0 wire3682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_5154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19986__A1 _28641_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18789__A2 wire1402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2810 _27167_/S _27149_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_147_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23008_ VGND VPWR _23008_/X _25691_/B _32513_/Q _32505_/Q _25693_/B _32521_/Q _28905_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_172_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3555 VPWR VGND wire3555/X wire3555/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25508__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23782__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3566 VPWR VGND wire3566/X _30877_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17037__B _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28865_ _28865_/Q _32321_/CLK _28865_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17997__A0 _27931_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2832 VPWR VGND _23283_/S _23298_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3577 VPWR VGND wire3577/X _30867_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22990__A0 _22989_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3588 VPWR VGND wire3588/X _30859_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_98_3157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_4453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29325__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2854 VPWR VGND _21195_/S _21184_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22878__B _22878_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15830_ _16091_/A _16091_/C _30486_/Q _15830_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27816_ _25799_/D _27816_/B _32532_/D _27844_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 Xwire2865 VPWR VGND _21131_/S _21136_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26181__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_5441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2876 VPWR VGND _21098_/S _21092_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_245_4437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28796_ _28796_/Q _30583_/CLK _28796_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2887 VPWR VGND _20647_/S _20639_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20679__A _32339_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_4115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24731__A1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15761_ _15760_/X _15521_/S _15761_/A2 _29334_/Q _15761_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27747_ VGND VPWR _27747_/S _32476_/Q _25037_/B _32476_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24959_ _25676_/B1 _24958_/X _25021_/A2 _31123_/Q _31123_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16368__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30302__CLK _30391_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21545__A1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17749__B1 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31428__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22742__B1 _22741_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_2173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17500_ _31613_/Q _26441_/B _17500_/Y _31616_/Q _31615_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_128_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17053__A _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14712_ _16081_/A2 _14816_/A1 _29275_/Q _14712_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_280_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16016__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17213__A2 _21646_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18480_ VGND VPWR _18490_/S wire3870/X _28253_/Q _28253_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15692_ VGND VPWR _15692_/S _15691_/X _15690_/X _15692_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27678_ _27678_/X _27678_/C _27678_/A _30219_/Q _27678_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_245_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_420 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29475__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27681__A0 _32415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26484__A1 _31703_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14396__B _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_431 wire725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25287__A2 _31259_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3740_A _23043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16421__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18961__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17431_ wire3561/X _31930_/Q _17431_/X _17272_/A wire2072/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_442 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29417_ _29417_/Q _30667_/CLK _29417_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_123_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14643_ _14639_/X wire1097/X _14642_/X _15631_/A1 _14643_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26629_ _26629_/X _31854_/Q _26637_/B _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__23298__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_453 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27917__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_2467 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_464 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16972__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15775__A2 _14442_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3723 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25701__C _27793_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_2309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_475 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_5622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_486 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17362_ wire3573/X _30820_/Q _30837_/Q _17361_/X wire3192/X _17362_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 X_29348_ _29348_/Q _32075_/CLK _29348_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_497 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_3639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_1072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21848__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14574_ wire1539/X _15607_/A1 _28973_/Q _14574_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30452__CLK _30452_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15004__C _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31578__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27433__A0 _32274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19101_ _19179_/A2 _28291_/Q _19176_/B1 _19101_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_193_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18713__A2 _19310_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19910__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16313_ VGND VPWR _16948_/S _28095_/Q _29051_/Q _16313_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_3789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_376_core_clk _32074_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17199__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21303__A _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24317__C _24317_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17500__B _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29279_ _29279_/Q _31953_/CLK _29279_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17293_ _17293_/B _17287_/Y _17293_/A _17293_/X _17293_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__17921__A0 _27859_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15527__A2 wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14616__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_4211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22118__B _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31310_ _31310_/Q _31310_/CLK _31310_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19032_ _19029_/X _19177_/B1 _19031_/X _19032_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XFILLER_273_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26813__B _26813_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_305_core_clk _30466_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_16244_ VGND VPWR _16244_/X _16491_/S wire1055/A _16243_/X _16242_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_256_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_4296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25995__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32290_ _32290_/Q _32290_/CLK _32290_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_4419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22833__S _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20808__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17927__S _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31241_ hold98/A _32296_/CLK _31241_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18477__A1 wire3882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16175_ VGND VPWR _16180_/A _16174_/X _16173_/X _16720_/C1 wire1055/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19708__A _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23470__A1 _23469_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19674__B1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27736__A1 wire2222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4187_A wire4188/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20284__A1 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23875__D _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16488__B1 wire891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15126_ VGND VPWR _15639_/S _29222_/Q _29286_/Q _15126_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_237_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31172_ _31172_/Q _32541_/CLK _31172_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_3702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20353__S _20354_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output641_A wire2768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25211__A2 hold79/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2304_A _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30123_ hold442/A _30217_/CLK _30123_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_174_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_4364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13756__A hold99/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15160__B1 _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19934_ _25652_/A _19933_/X _19968_/A2 _28615_/Q _28615_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_29_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15057_ _14545_/B _15765_/B _15057_/X _15638_/A2 _32122_/Q wire1702/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__17228__A _17228_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19426__B1 wire3429/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1704 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1272_A _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3961 _29685_/Q _22427_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21233__A0 hold398/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_5604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19977__A1 wire1376/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17437__C1 _17435_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14008_ _28489_/Q _14008_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__23664__S _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27136__S _27142_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24970__A1 _31129_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32203__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30054_ hold153/A _31375_/CLK _30054_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_4250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19865_ _19864_/X _28582_/Q _28582_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_133_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17988__A0 _27922_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24984__C_N _19955_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_3640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21784__A1 _23061_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_4504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18816_ _18816_/X _19346_/D1 _28278_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_255_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2195 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28178__D _28178_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19796_ _26861_/C1 _19795_/X _19852_/A2 _28550_/Q _28550_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_111_3571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_3511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_92_core_clk _32306_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14266__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19729__A1 _28521_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21184__S _21184_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16660__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29818__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18747_ _28373_/Q wire1405/A _28373_/D _18735_/X _18746_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19162__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15959_ VGND VPWR _16823_/S _29307_/Q _28745_/Q _15959_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_94_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_127_3000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21536__A1 _21534_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_21_core_clk _32398_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_181_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_5402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2579_A _18666_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32353__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16007__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_4261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27121__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18678_ _19368_/D1 _19218_/B1 _19368_/A2 _19218_/A1 _18678_/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__o211a_2 X_30956_ _30956_/Q _32295_/CLK _30956_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15215__A1 wire1134/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_2692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_1918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27672__A0 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26475__A1 _17481_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16412__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25180__A _31220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2938_A _20322_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17629_ _17629_/X _17852_/A _17586_/A _31717_/Q _17596_/D _17807_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_11_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17898__A _32598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23289__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_5575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18493__S _18497_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15766__A2 _16417_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16963__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30887_ _30887_/Q _32416_/CLK _30887_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_209_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28842__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29968__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_1221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_1390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27019__A3 _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20640_ VGND VPWR _20650_/S _27507_/A1 _29186_/Q _29186_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22497__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21839__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27386__D_N _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20528__S _20528_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18165__B1 _18164_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26227__B2 _32292_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_3386 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_3607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22500__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24238__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20571_ VGND VPWR _20576_/S _27154_/A1 _29087_/Q _29087_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32557_ _32557_/Q _32557_/CLK hold292/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_179_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26778__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30945__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14726__A0 _28977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22310_ VGND VPWR _23559_/S _29896_/Q _29155_/Q _29896_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_4666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24789__A1 _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31508_ _31508_/Q _31836_/CLK _31508_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_31_3594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23290_ VGND VPWR _23292_/S wire3844/X _30272_/Q _30272_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2807 VPWR VGND _27163_/S _27155_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_105_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28992__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32488_ _32488_/Q _32543_/CLK _32488_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16191__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_3632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23997__C1 wire812/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22241_ _29833_/Q _29834_/Q _22248_/B _22241_/D _29835_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__18468__A1 wire3915/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31439_ _31439_/Q _32401_/CLK _31439_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19618__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23461__A1 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27727__A1 wire2222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20275__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24243__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_1528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22172_ _21051_/B _22172_/Y _21039_/Y _22192_/D _22170_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_2 XFILLER_238_1648 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20263__S _20269_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_2450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17140__A1 _29893_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_1539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17140__B2 _23130_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24005__A3 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput630 _24594_/A mprj_adr_o[26] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25202__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_4112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28222__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29348__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput641 wire2768/X mprj_adr_o[7] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21123_ VGND VPWR _21131_/S _27694_/A1 _29567_/Q _29567_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xoutput652 _14168_/X mprj_dat_o[16] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15151__B1 _15151_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22016__A2 wire3146/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23213__A1 _30205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16494__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3454_A wire3454/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput663 wire2722/X mprj_dat_o[26] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26980_ _26986_/D _31975_/D _27007_/A _26980_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_43_2219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput674 wire2349/X mprj_dat_o[7] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20027__A1 _28660_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput685 _32600_/X porb_h_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19968__A1 _28632_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2106 wire2107/X wire2106/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_2961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23574__S _23582_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17428__C1 _17427_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3947 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24961__A1 _31124_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_2872 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput696 wire3437/X spi_sdo VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2117 wire2118/X wire2117/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_25931_ _25930_/X _26179_/B1 hold412/A _24716_/A _31482_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_21054_ VGND VPWR _21057_/S hold492/A hold187/A _29512_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_281_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2128 VPWR VGND wire2128/X wire2128/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_112_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_5447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2139 VPWR VGND _20122_/B _19780_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16977__A _29737_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30325__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1405 VPWR VGND wire1405/X wire1405/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_25_1930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20005_ _26861_/C1 _20004_/Y _20028_/A _28649_/Q _28649_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17572__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_3709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28650_ _28650_/Q _32017_/CLK _28650_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_wire3621_A _30760_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18640__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17443__A2 wire2063/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25862_ _25869_/D _25862_/B _31451_/D _25878_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_249_3157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_64 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1438 wire1439/X wire1438/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xclkbuf_5_5_0_core_clk clkbuf_5_5_1_core_clk/A clkbuf_5_5_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__28372__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19983__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29498__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14257__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1449 wire1449/X _15775_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_235_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21094__S _21094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24174__C1 _24173_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27601_ VGND VPWR _27605_/S wire2012/X _32343_/Q _32343_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_207_4719 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24813_ _26509_/D _24812_/X _24809_/C _31053_/Q _31053_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_38_3704 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28581_ _28581_/Q _31570_/CLK _28581_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_167_2123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25793_ VGND VPWR _25793_/S _31428_/Q _30761_/Q _31428_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1581_A _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_3152 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14662__C1 _14657_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22724__B1 _29734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout937_A _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18928__C1 _18927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19196__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27532_ _27532_/A _27532_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_24744_ _24745_/B _24770_/A _24743_/Y _24687_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_262_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_3182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold250_A hold250/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21107__B _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21956_ _21956_/B _21956_/Y _21956_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__25802__B _27832_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30475__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_2905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15206__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26186__A _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_1781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_1045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2011 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18943__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31720__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23603__A _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20907_ VGND VPWR _22550_/S _20906_/X _29382_/Q _29382_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27463_ VGND VPWR _27475_/S _32288_/Q _32289_/Q _27463_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_3731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24675_ _24675_/X _24678_/B _31447_/Q _24676_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_54_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_3341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16954__A1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21887_ _21099_/C _21887_/X _21960_/A _22966_/S _23180_/A _17110_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16916__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29202_ _29202_/Q _32440_/CLK wire834/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_208_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_32_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26414_ VGND VPWR _26420_/D _31690_/Q _31691_/Q _26414_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_257_5532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23626_ _26837_/A _24310_/B _24481_/B _24475_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__14965__B1 _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20838_ _29692_/Q _29350_/D _22679_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_240_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27394_ VGND VPWR _27394_/S _32244_/Q _27280_/X _32244_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_3843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20438__S _20444_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27415__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20453__D_N _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29133_ _29133_/Q _32117_/CLK _29133_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20665__C _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24229__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26345_ _26344_/X _31660_/Q _31660_/D wire781/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_279_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_5418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_1999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_3087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23557_ VGND VPWR _23559_/S _30478_/Q _30048_/Q _30478_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_3554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20769_ VGND VPWR _20780_/S _21153_/A0 _29283_/Q _29283_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26769__A2 _26687_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire702 VPWR VGND wire702/X wire702/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_238_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31870__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire713 VPWR VGND wire713/X wire714/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_14_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire724 VPWR VGND wire724/X wire724/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_10_4379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22508_ VGND VPWR _22512_/A3 _22510_/A4 _22512_/A2 _22508_/X _30015_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_221_1641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29064_ _29064_/Q _32136_/CLK _29064_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14290_ _29987_/Q _30319_/Q _14290_/X _29990_/Q _17013_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_26276_ _26275_/Y _26509_/D _31626_/Q _26267_/B _31626_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire735 VPWR VGND wire735/X wire735/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_197_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23488_ VGND VPWR _23516_/S _23487_/X _31948_/Q _30430_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16182__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire746 wire747/X wire746/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_175_3830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19105__C1 _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25441__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28015_ _28015_/Q _30030_/CLK _28015_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire768 VPWR VGND wire768/X wire768/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_69_3281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14193__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18459__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25227_ _25227_/X _25263_/B1 _17347_/X wire3497/X _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_136_3803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22439_ _29983_/Q _22439_/Y _29985_/Q _29984_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_87_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire779 VPWR VGND wire779/X wire779/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_191_3120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19528__A _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23452__A1 _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27718__A1 wire2222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21777__B _21777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16651__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2387_A wire2388/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_10_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20681__B _23611_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20266__A1 _21070_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23695__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19120__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_5197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21269__S _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31100__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25964__S wire755/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3202 _21486_/B _21549_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_input66_A la_input[119] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25158_ _25160_/C _31211_/Q _31213_/Q _31212_/Q _24565_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__32226__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18864__D1 wire2270/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17131__A1 _29892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17131__B2 _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4020 VPWR VGND wire4020/X _28708_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3224 _14314_/Y _21447_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_117_2512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4031 VPWR VGND wire4031/X _28673_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_4504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24109_ _24109_/X _24892_/C wire1321/X _28635_/Q _31113_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_254_2173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15142__B1 wire1066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4042 wire4043/X wire4042/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_229_5601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17980_ VGND VPWR _17980_/S wire3822/X _27917_/Q _27917_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_25089_ _31187_/D _25088_/Y wire2253/X _25087_/X _25160_/A wire1326/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 X_29966_ _29966_/Q _32277_/CLK _29966_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire4053 wire4054/X wire4053/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_8_3061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26941__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2523 wire2530/A _20548_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_130_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3268 wire3270/A _21444_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20018__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22889__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_2720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14496__A2 _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4075 VPWR VGND wire4075/X _28657_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19959__A1 _25022_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21215__B1 wire3962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3279 wire3283/A wire3281/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__28715__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23484__S _23518_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4086 VPWR VGND wire4086/X wire4087/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_2780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21793__A _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2545 wire2548/X _20447_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16931_ _16926_/X wire894/X wire912/X _16930_/X _16931_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28917_ _28917_/Q _32349_/CLK _28917_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25265__A _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3788_A _20958_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4097 VPWR VGND wire4097/X wire4098/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20901__S _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3363 VPWR VGND wire3363/X wire3364/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29897_ VGND VPWR _29897_/D _31904_/CLK _29897_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xfanout1822 VPWR VGND _27248_/A0 _18252_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_43_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout2567 _19387_/X _19407_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_24_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2578 _18666_/X _19218_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31417__D _31417_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31250__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3385 wire3386/X wire3385/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_3235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1844 VPWR VGND _17720_/S _17536_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_245_4201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32376__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2721_A hold132/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19650_ _26773_/C _20128_/A _26775_/B _19650_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_232_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18631__A1 wire3898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17434__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3396 VPWR VGND wire3396/X _32602_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30321__D _30321_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16862_ VGND VPWR _16862_/X _16601_/S wire1062/X _16861_/X _16860_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_189_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28848_ _28848_/Q _32427_/CLK _28848_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_289_1546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_3257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3820 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_2756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2673 VPWR VGND _19577_/B _14177_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14248__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22401__B _29958_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30818__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2684 VPWR VGND wire2684/X wire2685/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_18601_ VGND VPWR _18601_/S wire3889/X _28315_/Q _28315_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_1_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15813_ VGND VPWR wire969/X _29303_/Q _28741_/Q _15813_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length3955_A _29709_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2695 VPWR VGND _19597_/B wire2696/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire1950 VPWR VGND wire1950/X wire1951/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_281_915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1899 VPWR VGND _19310_/B1 wire1904/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25901__B1 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19581_ _19581_/X _19581_/A _19581_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_34_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_111_2166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16793_ VGND VPWR _16793_/X _16790_/X _16816_/B1 _16491_/S _16792_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28779_ _28779_/Q _32547_/CLK _28779_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_128_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15996__A2 _16563_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3763_A wire3770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22715__B1 _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_4278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28865__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19187__A2 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_3717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18532_ VGND VPWR _18532_/S _18532_/A1 _28304_/Q _28304_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30810_ _30810_/Q _32015_/CLK _30810_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1994 VPWR VGND wire1994/X wire1995/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24180__A2 _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15744_ VGND VPWR _15743_/Y _15741_/Y _15744_/B1 _15744_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_283_1112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27103__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31790_ _31790_/Q _31887_/CLK _31790_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17198__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19726__A4 _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_3927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22191__A1 _29827_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17198__B2 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26457__A1 _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26096__A _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24609__A _31531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19592__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30741_ _30741_/Q _32499_/CLK hold362/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18463_ VGND VPWR _18464_/S wire3820/X _28237_/Q _28237_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19710__B _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15675_ _16959_/A2 wire3302/X _29130_/Q _15675_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__15748__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_250 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16826__S _16826_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30968__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_261 _31986_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_272 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17414_ wire3561/X _31927_/Q _17414_/X _17272_/A wire2077/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_201_4830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17511__A _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14626_ VGND VPWR _15629_/A2 _32302_/Q _14625_/X _14626_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_89_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22479__C1 _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4102_A wire4103/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_283 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30672_ hold228/A _31470_/CLK _30672_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18394_ VGND VPWR _18394_/S _18229_/B _28171_/Q _28171_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20348__S _20348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_294 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_4852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1118_A wire1118/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output591_A wire3513/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27406__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26209__A1 _31593_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26209__B2 _32283_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output689_A _32603_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32411_ _32411_/Q _32513_/CLK _32411_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_50_3458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_4874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17345_ wire3576/X _30817_/Q _30834_/Q _17344_/X wire3191/X _17345_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XANTENNA__18698__A1 _23343_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14557_ _28390_/Q _14544_/D _14557_/X _23228_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__30991__D _30991_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22494__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18698__B2 _22123_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27639__B _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2240 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26543__B _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25968__A0 _31500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32342_ _32342_/Q _32342_/CLK _32342_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23659__S _23672_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17276_ _29201_/Q _30807_/Q _17276_/X _30824_/Q _17275_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA_clkbuf_3_0_0_core_clk_A clkbuf_3_1_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14488_ _14081_/Y _14487_/X _14488_/Y _29698_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_157_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22563__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16173__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_2915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17370__B2 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25432__A2 _31356_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28245__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19015_ _19179_/A2 _28287_/Q wire1942/X _19015_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23979__C1 _23978_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14184__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16227_ _16227_/X wire1055/X _16224_/X _16226_/X wire911/A _16222_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_259_2073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3955 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15381__B1 _15757_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32273_ _32273_/Q _32275_/CLK _32273_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22246__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4249 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27709__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25159__B _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19111__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21179__S _21184_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_2961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31224_ _31224_/Q _32562_/CLK _31224_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_234_4672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23994__A2 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16158_ _16817_/A2 wire1485/X _29465_/Q _16158_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_6_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25012__C_N _24947_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17122__A1 _30202_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30348__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24998__B _25063_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15109_ _15751_/A1 _16910_/A2 _15109_/X _15751_/B1 _28883_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__25196__A1 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15133__B1 _15151_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31155_ VGND VPWR _31155_/D _32513_/CLK _31155_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_83_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26393__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18870__A1 _18867_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16089_ VGND VPWR _16089_/X _30779_/Q _16091_/A _16091_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_wire1654_A _24888_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26932__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20009__A1 _28651_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15684__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21206__B1 _21101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30106_ _30106_/Q _30456_/CLK _30106_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16881__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24943__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19917_ _19916_/X _28608_/Q _28608_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xfanout3780 VPWR VGND _23061_/D _30052_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_31086_ _31086_/Q _31536_/CLK _31086_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_22_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20811__S _20811_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27568__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18488__S _18488_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_4468 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24255__D_N _26543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15905__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19173__A _30274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18622__A1 _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30037_ VGND VPWR _30037_/D _30466_/CLK hold493/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_168_3122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19848_ _19847_/X _28576_/Q _28576_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_0_3301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_4432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19965__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30498__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15436__A1 wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14239__A2 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_3319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24156__C1 _24155_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25325__D _25325_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16633__B1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31743__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_168_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21509__A1 _21534_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19779_ _26148_/A _19778_/Y _19782_/A _28546_/Q _28546_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_113_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15987__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_2791 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29790__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21810_ _21460_/X _21853_/B _21798_/X _21473_/A _21810_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_202_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26718__B _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24171__A2 _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_2689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3775 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22790_ _22786_/X _22787_/X _22745_/X _22796_/B _21549_/A _22933_/S VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 XFILLER_198_5210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17189__A1 _16971_/A VGND VPWR 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VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_5251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23131__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24474__A3 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23411_ _30412_/D _31971_/Q wire3363/X _30412_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_137_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20623_ 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NF_sky130_fd_sc_hd__decap_6 XFILLER_239_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14483__C _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20496__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26130_ _31554_/D _26020_/Y _17879_/A _31554_/Q _17876_/Y VGND VPWR _26129_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_200_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23342_ _30330_/D _23342_/C _23342_/A _23342_/B _23354_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__23569__S _23573_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25959__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20554_ VGND VPWR _20556_/S wire1837/X _29070_/Q _29070_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31123__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32249__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16164__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24254__A _31760_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27268__C _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26620__A1 _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2615 VPWR VGND _24590_/B _19504_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_274_4496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14175__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26620__B2 _23761_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29170__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_4283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26061_ VGND VPWR _17877_/X _24459_/C _26060_/X _31535_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xmax_length2637 VPWR VGND wire2636/A wire2638/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_192_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23273_ VGND VPWR _23296_/S wire3904/X _30255_/Q _30255_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_31_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_4349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20485_ VGND VPWR _20485_/S _29004_/Q _27265_/A0 _29004_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25069__B _25069_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1903 VPWR VGND _18878_/B1 wire1904/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24631__B1 _24586_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length2659 VPWR VGND _19563_/B wire2660/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_213_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1427_A _18298_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20248__A1 _28791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4267 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19102__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25012_ _25081_/A _24947_/B _25012_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_153_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1925 VPWR VGND _18824_/B1 wire1924/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21089__S _21097_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21445__B1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22224_ _22281_/B2 _22223_/X _22224_/X _30108_/Q wire2284/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23985__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27176__A2 _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18310__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21996__A1 _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31273__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29820_ VGND VPWR _29820_/D _30030_/CLK _29820_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__32399__CLK _32550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22155_ _22154_/X _22513_/C1 wire828/A _29822_/Q _29822_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_255_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26384__B1 _31680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18861__A1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3836_A wire3837/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26923__A2 wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3763 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput460 _13903_/Y la_oenb[77] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold298_A hold298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15675__A1 wire3302/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput471 _13893_/Y la_oenb[87] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_2357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24701__B _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21106_ _22433_/B hold219/A _29551_/D _23236_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_112_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16872__B1 _29268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24934__A1 _31111_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21817__S _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23737__A2 _23737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput482 _13947_/Y la_oenb[97] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25085__A wire883/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29751_ _29751_/Q _31904_/CLK hold298/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout1107 wire1113/A _15515_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_271_1060 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22086_ wire1547/X wire3151/X _22086_/X _22086_/B1 _14083_/Y wire2273/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 Xoutput493 _28655_/Q la_output[106] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26963_ VGND VPWR _26964_/C _31990_/Q _31991_/Q _31989_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_57_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20721__S _20722_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27559__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18398__S _18398_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21748__A1 _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1129 wire1133/X _15543_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28888__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28702_ _28702_/Q _31892_/CLK _28702_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire1202 VPWR VGND wire1202/X wire1202/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18613__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25914_ _26771_/A _25913_/Y _25903_/S _31474_/Q _31474_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_96_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17416__A2 hold6/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21037_ _30419_/Q _30035_/Q _21037_/X _30333_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_281_4401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21212__A3 _22552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_5507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29682_ _29682_/Q _30425_/CLK _29682_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_21_3059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26894_ VGND VPWR _14153_/Y _19792_/A _26900_/A _26894_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_hold465_A hold465/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19514__C _20654_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1235 VPWR VGND wire1235/X _26764_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20262__B_N _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24147__C1 _24139_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1246 VPWR VGND wire1246/X _24194_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28633_ _28633_/Q _32160_/CLK _28633_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17821__C1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27504__S _27507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25845_ _31443_/Q _31445_/Q _31442_/Q _31444_/Q _25846_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire1257 VPWR VGND wire1257/X _24077_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_1107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1268 VPWR VGND wire1268/X _23930_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15978__A2 _16434_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_4538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1279 VPWR VGND _24957_/B _20669_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19169__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_3853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_5018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24162__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28118__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input120_A la_input[52] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28564_ _28564_/Q _31887_/CLK _28564_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13790_ _31156_/Q _13790_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_160_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2135_A _20124_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25776_ _31416_/D _25776_/C _27276_/C _27227_/B _32106_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__14020__A _28477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22988_ _25691_/B _32486_/Q _22988_/X _25693_/B _32478_/Q _32494_/Q _32470_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_182_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_4402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_5597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14650__A2 _14648_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26439__B2 _26435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18916__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27515_ VGND VPWR _27515_/S _27708_/A1 _32330_/Q _32330_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24727_ VGND VPWR _24726_/Y _24727_/X _24720_/X _31505_/Q _24723_/B _24719_/Y VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_281_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19530__B _19530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21939_ _21559_/B _21564_/A _21485_/X _21559_/C _21941_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28495_ _28495_/Q _31578_/CLK _28495_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16927__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_33_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21920__A1 _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20676__B _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3177_A _18162_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25111__A1 _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17331__A _30938_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2302_A wire2302/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15460_ _15640_/C1 _15460_/Y _15455_/Y wire1085/A _15459_/X _15457_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_2 XFILLER_240_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14938__B1 _14937_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27446_ VGND VPWR _27476_/S _32281_/Q _27445_/X _32281_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_4363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24658_ _24772_/B _31461_/Q _31442_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_15_2107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23122__B1 wire2842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24465__A3 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28268__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14411_ _21339_/C _21451_/B _21463_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_8 XFILLER_199_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23609_ _30766_/D _23605_/X _24458_/C _23608_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_51_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15391_ _15737_/A2 _15391_/X _15390_/X wire1134/X _29606_/Q _15738_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_27377_ VGND VPWR _27384_/S _32229_/Q _27266_/X _32229_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22476__A2 _22484_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23673__A1 _24618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14166__S _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24589_ _26837_/A _24636_/D _31538_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XPHY_975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29513__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14953__A3 _16814_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24870__B1 _31081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22330__D1 wire3213/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3344_A wire3362/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31700__D _31700_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14393__C _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17130_ VGND VPWR _18664_/B _30203_/Q _30392_/Q _17130_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_158_3313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29116_ _29116_/Q _32324_/CLK _29116_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19341__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23479__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14342_ _14347_/A _21462_/B _30336_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26328_ _26327_/Y _26188_/A _31652_/Q _26327_/B _31652_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_116_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25035__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16155__A2 _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17352__A1 _17272_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_175_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26611__A1 _26607_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25414__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19892__A3 wire2195/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5551 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14166__A1 hold109/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_5413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17061_ _21777_/B _21812_/D _21632_/A VGND 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NF_sky130_fd_sc_hd__diode_2 XANTENNA__14705__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24622__B1 _24590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18162__A _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15902__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2769_A hold189/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20239__A1 _28782_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_2607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16012_ _16447_/A2 _16447_/A1 _29590_/Q _16012_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_7_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_4861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23976__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21300__B _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17104__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29663__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18301__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_2864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15115__B1 _15735_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17655__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18852__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27194__B _32089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3043 VPWR VGND _18152_/S _18120_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25707__B _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26914__A2 _26936_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4722 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14469__A2 _14086_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24611__B _24612_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23728__A2 wire1633/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30640__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3076 _17986_/X _18018_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_3_3908 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31766__CLK 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Xwire3171 VPWR VGND wire3171/X wire3171/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26127__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16914_ wire1010/X wire1482/X _28867_/Q _16914_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18604__A1 wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3182 VPWR VGND wire3182/X _17901_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire4052_A _28666_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_3655 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19262__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1641 VPWR VGND wire1643/A _26793_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_225_5317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18101__S _18109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3193 VPWR VGND wire3193/X _17244_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_17894_ VGND VPWR _24594_/A _24610_/B _17895_/D _24600_/B _24590_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 Xfanout1652 _19643_/X _24888_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout2397 VPWR VGND _19811_/A _14148_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire1068_A wire1069/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_5339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20411__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26819__A _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16615__B1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31911_ _31911_/Q _31931_/CLK hold438/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27414__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17812__C1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19633_ _25512_/A _19632_/Y _19632_/A _28482_/Q _28482_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2481 VPWR VGND _21008_/S _21017_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_265_252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16845_ wire995/X _16845_/X _16844_/X _16856_/A2 _32070_/Q wire1469/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__23036__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1696 VPWR VGND wire1698/A wire1707/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_output604_A _28704_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25886__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30790__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17940__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_4649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24153__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19721__A _19721_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31842_ _31842_/Q _32440_/CLK _31842_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19564_ VGND VPWR wire2660/X _26866_/A1 _19632_/A _19564_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_108_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29043__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1235_A _26764_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16776_ _16776_/X _28935_/Q _16947_/A2 _16928_/A3 _16928_/B1 _16775_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_146_2004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28456__D _28456_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22558__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13988_ _28509_/Q _13988_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_0_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22164__A1 _29823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19565__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_391_core_clk _30269_/CLK clkbuf_opt_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_18515_ VGND VPWR _18522_/S wire3864/X _28287_/Q _28287_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23900__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15727_ _15727_/X _15727_/A2 _15740_/B1 _29583_/Q wire1515/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA__16379__C1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31773_ VGND VPWR hold207/X _31879_/CLK _31773_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_34_3910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19495_ VGND VPWR _31326_/Q _19495_/X _31324_/Q _31323_/Q _19491_/X _31325_/Q VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XANTENNA__16556__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21911__A1 _21484_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2624 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_3249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17040__B1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25102__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_320_core_clk _30282_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_195_5427 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_3200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1402_A wire1403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14929__B1 _28750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30020__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30724_ hold264/A _32544_/CLK input80/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18446_ VGND VPWR _18465_/S wire3873/A _28220_/Q _28220_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31146__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15658_ _15737_/A2 _15658_/X _15657_/X _15737_/B1 _29484_/Q _15738_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_221_333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16394__A2 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17591__A1 _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23113__B1 _23112_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17591__B2 _17473_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25653__A2 _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26850__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14609_ _14609_/X _29006_/Q _14608_/X _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_241_1825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2960 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29193__CLK _30359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18377_ VGND VPWR _18390_/S wire3881/X _28154_/Q _28154_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30655_ _30655_/Q _31351_/CLK hold359/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_226_1382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22467__A2 _22513_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23664__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19868__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15589_ _15629_/A2 _15589_/X _15588_/X _15630_/A1 _30512_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_278_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24861__B1 _31076_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19332__A2 _19331_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17328_ VGND VPWR _26974_/B _17327_/X _29851_/D _17245_/X _32287_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XANTENNA__21675__B1 _21674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_3367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22293__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17895__B _17895_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16146__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17343__A1 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30586_ hold333/A _32427_/CLK _30586_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20806__S _20811_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18540__B1 wire3171/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27088__C _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24208__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26602__A1 _31879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25405__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2803_A _27157_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30170__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14157__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32325_ _32325_/Q _32437_/CLK _32325_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24505__C _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19168__A _28231_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22219__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23416__A1 _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17259_ _17259_/X wire4203/X _17302_/A _17295_/B2 wire2091/X VGND VPWR _17258_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_8_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16697__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24613__B1 _19505_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25956__A3 _25934_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_5181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32541__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_2357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23967__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20270_ VGND VPWR _20282_/S _27143_/A1 _28812_/Q _28812_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27385__A _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32256_ _32256_/Q _32547_/CLK _32256_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24802__A _31688_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27816__C _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25169__A1 _25172_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31207_ _31207_/Q _31737_/CLK _31207_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_80_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15106__B1 wire1072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17646__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26366__B1 _27091_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_4014 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32187_ _32187_/Q _32525_/CLK _32187_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14105__A _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15657__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2092 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20650__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16854__B1 wire963/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23719__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5400 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31138_ _31138_/Q _32528_/CLK _31138_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_150_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20541__S _20551_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_22_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19615__B _26886_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22927__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_1927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19107__S _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26118__B1 _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13944__A _28553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24392__A2 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23960_ wire4125/X _20128_/B _23951_/X wire4015/X _23960_/X _24178_/A2 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_230_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31069_ _31069_/Q _31763_/CLK _31069_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18011__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21825__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20402__A1 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1008_A _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_3564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26669__B2 _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27324__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22911_ VGND VPWR _22876_/B _22911_/D _22911_/X _22911_/C _22882_/B VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_272_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23027__S0 _25691_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23891_ _23891_/X wire1587/X _30689_/Q wire3627/X wire1633/X VGND VPWR _23890_/X + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_61_1982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14617__C1 _28870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_1944 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_3092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16082__B2 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24144__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25630_ wire3532/X _31377_/Q _25578_/X _25630_/Y _31364_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_143_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22842_ VGND VPWR _22842_/X _30471_/Q _22935_/A wire3133/X _22838_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_263_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16621__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18359__A0 _28137_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22155__A1 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15290__C1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24249__A _31761_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27270__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23352__B1 _23355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25892__A2 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19020__A1 _19094_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25561_ VGND VPWR _25564_/S _31360_/Q _31361_/Q _31360_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_70_3609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_3155 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19350__B _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22773_ _22773_/B _22773_/Y _22793_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_263_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_4462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28410__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16466__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29536__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16909__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27094__A1 _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27300_ VGND VPWR _27301_/S _32163_/Q _27278_/X _32163_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_fanout1377_A wire1385/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24512_ _31292_/Q _31290_/Q _24525_/A _31291_/Q _24533_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_276_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19571__A2 wire2668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21724_ _21724_/B _21724_/Y _21846_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_107_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_4113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_216 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28280_ _28280_/Q _30484_/CLK _28280_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_262_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25492_ _25492_/Y _31326_/Q _25492_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_107_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17582__A1 _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32071__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3491 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25644__A2 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26841__A1 _31870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27231_ VGND VPWR _17874_/A2 _27231_/D _27231_/X _32579_/Q _17503_/B VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_202_3745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24443_ _24443_/X _14245_/B _14300_/B _22598_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_254_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21655_ _21655_/B _17115_/Y _21655_/A _21655_/X _21655_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__22458__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23655__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30513__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4225 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31639__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24852__B1 _31071_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1544_A _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19323__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20606_ VGND VPWR _20606_/S _27699_/A1 _29121_/Q _29121_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23299__S _23299_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_4981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21666__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27162_ VGND VPWR _27167_/S _27705_/A1 _32068_/Q _32068_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_107_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28560__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_2268 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_3857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23600__B _26386_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24374_ _32034_/Q _26772_/A _24374_/X _32002_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_68_3527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29686__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17334__A1 _32288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21586_ _21586_/B _22035_/A _21586_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__18531__A0 _28303_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20716__S _20716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3135 VPWR VGND _23522_/S _23530_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_159_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length1903_A wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26113_ VGND VPWR _26123_/C _26121_/D _26113_/X _26113_/D _26123_/D VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XANTENNA__23175__D_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23325_ VGND VPWR _23334_/S _30303_/Q _17144_/X _30303_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23407__A1 _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20537_ VGND VPWR _20545_/S _29054_/Q _27251_/A0 _29054_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_5210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3953_A wire3954/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27093_ _26224_/A _27092_/X _27117_/A2 _32024_/Q _32024_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21279__C_N _30417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16688__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1711_A _23376_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4042 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_2845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19509__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15896__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17293__D_N _17287_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21418__B1 _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2456 VPWR VGND _23588_/S _23593_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_26044_ _26043_/X _31531_/Q _26044_/X _26055_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__23958__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30663__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23256_ VGND VPWR _23267_/S _29504_/Q _30239_/Q _30239_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31789__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25808__A _32547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20468_ VGND VPWR _20484_/S _28987_/Q _27248_/A0 _28987_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_2255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24080__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19664__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21969__A1 _21966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_4261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22207_ _29829_/Q hold444/A _22221_/C _22207_/D _29828_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_238_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18834__A1 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23187_ hold476/A _23192_/A2 _23187_/X _30115_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_248_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2085_A wire2085/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20399_ VGND VPWR _20410_/S wire1826/X _28921_/Q _28921_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_3489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14015__A _28482_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input168_A la_input[96] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15648__A1 _15648_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20641__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24907__A1 _19617_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29803_ VGND VPWR _29803_/D _29803_/CLK hold265/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_22138_ _22138_/X _18667_/X _30096_/Q _30385_/Q wire2284/A VGND VPWR _22137_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_267_517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20451__S _20452_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19525__B _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27995_ _27995_/Q _28363_/CLK _27995_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput290 _13973_/Y la_iena[39] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26372__A3 _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31019__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15545__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26109__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29734_ _29734_/Q _30483_/CLK _29734_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_0_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26946_ _26946_/Y _26946_/A hold491/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 X_14960_ _14959_/X _15356_/A2 _15515_/A2 _28847_/Q _14960_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_22069_ wire3146/X _22068_/X _21946_/A _22069_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23047__B _23061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16860__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29066__CLK _31918_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1010 VPWR VGND wire1010/X wire1010/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_283_3817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_3082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1021 wire1021/X wire1021/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_21_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold9 hold9/A hold9/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xwire1032 wire1032/A wire1032/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_13911_ _28586_/Q _13911_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_112_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27234__S _27238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_2205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1043 VPWR VGND wire1043/X wire1043/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17045__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29665_ hold192/A _30783_/CLK _29665_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14891_ _16798_/A2 _14891_/X _29173_/Q wire1488/X _14102_/Y _15623_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_26877_ _26893_/C1 _26876_/Y _26900_/A _31888_/Q _31888_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14608__C1 _14627_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1065 VPWR VGND wire1065/X wire1066/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_2_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3294_A wire3306/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14388__C _14388_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24135__A2 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_149_core_clk _32073_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25332__A1 _31261_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16630_ wire992/A _16630_/X _16629_/X _16930_/A1 _32435_/Q _16928_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28616_ VGND VPWR _28616_/D _32086_/CLK _28616_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_95_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_1673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_262_222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13842_ _29826_/Q _22185_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25828_ _31429_/Q _25827_/Y _31438_/D _31438_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xwire1087 VPWR VGND wire1087/X _14559_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_129_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25332__B2 _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30043__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31169__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29596_ _29596_/Q _32125_/CLK _29596_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22146__A1 _30097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27609__A0 _32351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_5624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22146__B2 _30386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14623__A2 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15820__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21282__S _22968_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32414__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28090__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_5578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_1825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16561_ _16533_/X _29673_/D wire894/X _16542_/X _16560_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 X_28547_ _28547_/Q _31796_/CLK _28547_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20157__B1 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13773_ _31173_/Q _13773_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_183_3995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25759_ _32086_/Q _32087_/Q _25757_/X _27194_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__23894__A1 _31092_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17022__A0 _30379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18157__A _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23894__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18300_ _18300_/Y wire3834/X _29341_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_227_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3559_A _30994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15512_ _15512_/X _28966_/Q _15511_/X _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_242_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_opt_13_1_core_clk clkbuf_leaf_40_core_clk/A clkbuf_opt_13_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_259_5457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19280_ _19280_/X _27980_/Q _19367_/B1 _19380_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_16492_ VGND VPWR _16806_/S _29474_/Q _32128_/Q _16492_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_1257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28478_ VGND VPWR _28478_/D _31860_/CLK _28478_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_200_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16376__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25096__B1 _25096_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_28_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28903__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_3992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18770__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18231_ _29749_/Q _18163_/B wire3712/A _18231_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_12_4249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30193__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15443_ _15442_/X _15561_/C1 _15723_/A2 _28796_/Q _15443_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_90_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27429_ VGND VPWR _27483_/S _32271_/Q _32272_/Q _27429_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_3684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23646__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24843__B1 _31066_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32564__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19314__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24606__B _24606_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30440_ VGND VPWR _30440_/D _31961_/CLK _30440_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18162_ _18162_/X _18163_/B _22338_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XFILLER_158_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15374_ VGND VPWR _15750_/S _29324_/Q _28762_/Q _15374_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16128__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20626__S _20646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output387_A _13918_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_1998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23002__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17113_ VGND VPWR wire886/X _17106_/X _17112_/X _30389_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_190_4612 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_4161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14325_ _14338_/C _21339_/C _21451_/B _29724_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XANTENNA__17554__A_N _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25399__A1 _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30371_ _30371_/Q _32269_/CLK _30371_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18093_ VGND VPWR _18118_/S wire3896/X _28022_/Q _28022_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26596__B1 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17876__A2 _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25938__A3 _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26060__A2 _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32110_ _32110_/Q _32110_/CLK _32110_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21409__B1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26821__B _26886_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17044_ VPWR VGND _17044_/X _21447_/B _29881_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 Xhold409 hold409/A hold409/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23949__A2 _19994_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2054 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27409__S _27412_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14256_ _14268_/B _14256_/X _14303_/A _29960_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_158_2464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25718__A _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_4055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_5265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output554_A _28723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24071__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17089__A0 _17087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_2366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17935__S _17948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32041_ _32041_/Q _32310_/CLK _32041_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_49_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18825__A1 _28150_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19716__A _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14187_ _24446_/A _24446_/B hold116/X _14187_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_193_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_4383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_45_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20093__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26899__A1 _31899_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20632__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16836__B1 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29409__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3116 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23238__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15103__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18995_ _19203_/A2 _27934_/Q _19151_/S _18995_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17455__A1_N _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17881__D _17881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_848 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_23_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24374__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2426 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17946_ VGND VPWR _17946_/S wire3825/X _27884_/Q _27884_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_282_4017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16851__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22385__A1 hold501/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18589__B1 _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23672__S _23672_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_1996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1460 _16642_/B2 _16841_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27144__S _27153_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20396__A0 _28918_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1471 wire1477/A _16091_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_132_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23009__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17877_ _31051_/Q _31052_/Q _17877_/X _17475_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XFILLER_110_2935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28433__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29559__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_67_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_2101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24126__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19616_ _26950_/C _19615_/Y _19638_/A _28477_/Q _28477_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_207_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19451__A _28442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16828_ _16828_/X _32137_/Q _16828_/A2 _16832_/A3 _16825_/S _16827_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_165_2402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17800__A2 _17753_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25172__B _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_2172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22288__S _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22137__A1 _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23334__A0 _17213_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32094__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15272__C1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15811__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21192__S _21195_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3404 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2753_A _14147_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19547_ _19547_/X _19555_/A _19547_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 X_31825_ _31825_/Q _32039_/CLK _31825_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19170__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16759_ _16759_/X _29265_/Q _16947_/A2 _16928_/A3 _16928_/B1 _16758_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23885__A1 wire4102/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22688__A2 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30536__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3155 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19553__A2 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21896__B1 _21946_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19478_ _31309_/Q _31311_/Q _31310_/Q _19476_/X _25464_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_31756_ _31756_/Q _31762_/CLK _31756_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28583__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4200 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16367__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2920_A _20408_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17564__B2 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_2394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2181 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30707_ _30707_/Q _31119_/CLK hold309/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18429_ VGND VPWR _18432_/S _28204_/Q _23297_/A1 _28204_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_86_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23098__C1 _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31687_ _31687_/Q _31762_/CLK _31687_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20911__A1_N _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_3063 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19305__A2 _19301_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21648__B1 _21649_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21440_ _21444_/D _21465_/B _30346_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_102_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30686__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30638_ hold335/A _31570_/CLK _30638_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20536__S _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_5145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26036__C1 _26123_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_198_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31931__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21221__A _21221_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20320__A0 _28861_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13939__A _28558_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21371_ _21741_/B _21741_/A _21775_/A _21379_/A _21379_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_232_5129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26587__B1 _31771_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30569_ _30569_/Q _32280_/CLK hold321/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_271_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18006__S _18007_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15878__A1 wire1476/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23110_ _23180_/B _18535_/B _23145_/A _23110_/X _29719_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20871__A1 _20870_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29745__D hold162/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20322_ VGND VPWR _20322_/S _27512_/A1 _28863_/Q _28863_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32308_ _32308_/Q _32425_/CLK _32308_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19069__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27319__S _27321_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24090_ _20061_/B _28697_/Q _24090_/X _27053_/A _28505_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_63_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24062__A1 _28470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20664__D_N _31391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14145__A4 _14143_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23041_ _23041_/X _21101_/A hold455/A _23040_/X wire3171/X VGND VPWR _23056_/S VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_67_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_4862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14550__A1 _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20253_ VGND VPWR _20258_/S _28796_/Q _27702_/A1 _28796_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17619__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18816__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32239_ _32239_/Q _32498_/CLK _32239_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_4130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22612__A2 _30364_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3367_A _13861_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2960 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1125_A wire1134/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3918 VPWR VGND wire3918/X _29841_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_214_4895 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20623__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3929 VPWR VGND _23160_/C _29729_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_150_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_3615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20271__S _20282_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18292__A2 _18162_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20184_ _26687_/B _20183_/X _20192_/A2 _28736_/Q _28736_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_22_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_54 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_269_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_325_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26354__A3 _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_1751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26800_ _25512_/A _26799_/Y _26833_/A _31850_/Q _31850_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_189_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_2008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_1882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24365__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25562__A1 _31361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27780_ VGND VPWR _27783_/S _25031_/B _32505_/Q _32505_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3534_A wire3536/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30066__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24992_ _25065_/A _24927_/B _24992_/X _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_98_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_3788 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14853__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19777__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23582__S _23582_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26731_ _26730_/Y _27087_/C1 _31818_/Q _26754_/B _31818_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20387__A0 _28909_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25363__A _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_4611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23943_ _23943_/X _23941_/X _28523_/Q _24163_/B2 _19718_/B VGND VPWR _23942_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_54_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_208_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24117__A2 _24110_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_242_core_clk _32294_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_29450_ _29450_/Q _31962_/CLK hold244/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3701_A _30340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26662_ _26662_/A2 _31862_/Q _26661_/Y _26662_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_23874_ wire814/A _24888_/C _31090_/Q _26542_/A _24888_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_165_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_2513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_805 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28926__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14605__A2 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19529__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22128__B2 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24668__A3 _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28401_ _28401_/Q _29389_/CLK _28401_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_2245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_816 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25613_ VGND VPWR _31374_/D _25613_/B _26238_/A _25613_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_74_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1560 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22825_ _22825_/B _22826_/B _22825_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_260_726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20139__B1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19080__B _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_827 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29381_ _29381_/Q _30359_/CLK _29381_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_26593_ _26593_/X _31845_/Q wire3452/A wire817/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_74_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_838 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_2109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_849 wire4074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31461__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27067__A1 _26785_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17004__B1 _29773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_91 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19544__A2 wire2642/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28332_ _28332_/Q _30402_/CLK _28332_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_4008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21887__B1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25544_ _25546_/D _31350_/D _25543_/Y wire2813/X _31350_/Q hold502/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__23340__A3 _30285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20657__D _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22756_ _22820_/B _22820_/C _22756_/X _22756_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_224_3277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25810__B _25810_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16358__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold428_A hold428/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26194__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18752__B1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1588 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24707__A _31474_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25617__A2 wire3532/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_1949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_213_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21707_ VPWR VGND _21707_/X _21708_/B _21708_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__23611__A _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28263_ _28263_/Q _30431_/CLK _28263_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_143_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15566__B1 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23628__A1 _31081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25475_ _25507_/D _25448_/A _25474_/X _19485_/X _31317_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27950__CLK _30225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_5089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22687_ _22687_/A _22686_/X _22687_/X _22687_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_224_1842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14908__A3 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24825__B1 _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23628__B2 _31078_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1926_A wire1931/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25093__A3 _25087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27214_ _32099_/Q _27213_/Y _32099_/D _25772_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_65_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21639__B1 _21640_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24426_ _31013_/Q _24427_/A _24424_/X wire2296/A _14379_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_254_5343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_4044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21638_ _21638_/B _21943_/B _21638_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 X_28194_ _28194_/Q _30428_/CLK _28194_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17307__A1 _30926_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20446__S _20446_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22300__A1 _29886_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15581__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_1905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19847__A3 _26323_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19701__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_26_0_core_clk clkbuf_opt_26_1_core_clk/A clkbuf_5_23_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20673__C _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24840__A3 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3234_A wire3235/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27145_ VGND VPWR _27153_/S _27688_/A1 _32051_/Q _32051_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_219_4762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13849__A _29817_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24357_ _24356_/X _24357_/B1 wire1668/X _23611_/A _30981_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17858__A2 _17857_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16515__C1 _28928_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21569_ _22010_/A _21569_/A _21569_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_276_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22851__A2 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_4954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_364_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26042__A2 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28306__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14110_ _30352_/Q _14110_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_4_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29655__D _29655_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15869__B2 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23308_ VGND VPWR _23317_/S _30286_/Q wire2292/X _30286_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15090_ 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NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2629 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1530 VPWR VGND _15707_/C _15500_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14041_ _28456_/Q _14041_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26027_ _31526_/Q _31525_/Q _31527_/Q _26029_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22064__B1 _21960_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14541__A1 hold364/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18807__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23239_ _23043_/B _23365_/S _30224_/D _23238_/Y _20982_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xmax_length2297 VPWR VGND wire2296/A _24412_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_46_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22603__A2 _30361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2467_A _23253_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1574 VPWR VGND _26936_/A2 wire1573/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_7_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30409__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3307_A _14069_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20075__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20614__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16818__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_101_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_153_2372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16294__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15275__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_5169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17800_ _17799_/X _17852_/A _17753_/X _17833_/S _17800_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20090__A2 wire2678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17491__B1 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23159__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24356__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29701__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2634_A _14209_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18780_ VGND VPWR _18790_/S _28311_/Q _28244_/Q _18780_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_111_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15992_ VGND VPWR _16443_/S _28409_/Q _29074_/Q _15992_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27978_ _27978_/Q _30477_/CLK _27978_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_5472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22367__A1 _30472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2299 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14399__B _14399_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23564__B1 _24210_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23492__S _23530_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17731_ VGND VPWR _17832_/S _17730_/X _17705_/X _17777_/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29717_ _29717_/Q _30382_/CLK _29717_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14943_ _16417_/A2 _15266_/A1 _32119_/Q _14943_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_229_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26929_ _31953_/Q wire1573/X _31953_/D wire2385/X wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_276_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30559__CLK _31803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17243__A0 _29946_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_4782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16046__B2 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24108__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2801_A _27270_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19783__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_252_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31804__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17662_ _17662_/B _17662_/Y _17662_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_2_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29648_ _29648_/Q _30667_/CLK _29648_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_2312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27845__A3 _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14874_ _14874_/X _30493_/Q _14873_/X _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_79_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23316__A0 _17071_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_3019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19702__C _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17794__A1 _31727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18991__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19401_ VGND VPWR _19418_/S _27247_/A0 _28417_/Q _28417_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_16613_ _16878_/A2 _16878_/A1 _28963_/Q _16613_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__29851__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20848__C _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21306__A _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13825_ _31049_/Q _24644_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_92_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17593_ VGND VPWR _17842_/S _17580_/X _17592_/Y _17593_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17503__B _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29579_ _29579_/Q _32309_/CLK _29579_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_263_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_203_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_2739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31610_ _31610_/Q _32275_/CLK _31610_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19332_ _19332_/X _19329_/X wire1900/A _19331_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_16544_ wire3243/A _16646_/A2 _16544_/X _16818_/A2 _28889_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_109_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_2790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13756_ hold99/A _13756_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_144_3776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17546__A1 _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15006__C1 _15356_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21342__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26266__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25608__A2 _31223_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19940__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31954__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_5118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31541_ _31541_/Q _31547_/CLK _31541_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19263_ VGND VPWR _19263_/X _19335_/B _19336_/B1 _28075_/Q _19262_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20550__A0 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15557__B1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16475_ _16911_/A2 _16475_/X _16474_/X _16949_/A1 _28422_/Q _16960_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_203_2627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_1980 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18214_ VGND VPWR _18321_/S _28088_/Q _27143_/A1 _28088_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26281__A2 _26555_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15426_ VGND VPWR _15426_/X _15638_/B1 _15640_/C1 _15425_/X _15424_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_86_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19299__A1 _28045_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19194_ _19194_/X _19368_/D1 _27944_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_220_2941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31472_ _31472_/Q _31522_/CLK _31472_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20356__S _20357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output671_A wire2337/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_220_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5416 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15572__A3 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21725__S0 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_46_core_clk _32544_/CLK clkbuf_5_10_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18334__B _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30423_ _30423_/Q _32425_/CLK _30423_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18145_ VGND VPWR _18145_/S _18217_/B _28073_/Q _28073_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__13759__A _31188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15357_ _15357_/X _15759_/A2 _15530_/A2 _29058_/Q _15748_/B2 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XANTENNA__17849__A2 _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2772 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_140_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22842__A2 _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_A0[3] wire2424/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20853__A1 hold480/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14308_ _27678_/A _14308_/Y _23053_/D _23342_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XANTENNA__23667__S _23671_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29231__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27139__S _27142_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18076_ VGND VPWR _18078_/S wire3841/X _28006_/Q _28006_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30354_ _30354_/Q _32425_/CLK _30354_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25448__A _25448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold206 hold206/A hold206/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_15288_ _15621_/A2 _15288_/X _15287_/X _15628_/B1 _28960_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__22571__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25241__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold217 hold217/A hold217/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16521__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2501_A _20797_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold228 hold228/A hold228/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_4486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17027_ _17077_/A _17027_/B _29879_/Q _21657_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 Xhold239 hold239/A hold239/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_236_1713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14239_ _29513_/Q _31283_/Q wire3232/X _14245_/B _14239_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__19446__A _28443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24595__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30285_ _30285_/Q _30285_/CLK _30285_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30089__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4131 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20605__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16809__B1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21187__S _21194_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32024_ _32024_/Q _32024_/CLK _32024_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31334__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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_20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24347__A2 wire1668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18500__D _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_3411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26741__B1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18978_ _18978_/X _18975_/X _19094_/S _18977_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_212_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14296__B1 _14295_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20104__B _20104_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15493__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire720_A wire720/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14835__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28949__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19759__C1 _25567_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_5534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17929_ VGND VPWR _17948_/S wire3878/X _27867_/Q _27867_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_1522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18496__S _18496_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2890 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16037__A1 _29309_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27297__A1 _32160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21030__A1 _30030_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31335__D _31335_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17234__B1 _29445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20940_ VGND VPWR _20947_/S _29405_/Q _29508_/Q _29405_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15245__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_2554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21912__B1_N _21561_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_3813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27602__S _27605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20871_ VGND VPWR _23523_/S _20870_/X _29364_/Q _29364_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_74_2126 VGND VPWR VGND VPWR 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NF_sky130_fd_sc_hd__diode_2 XANTENNA__22530__A1 _29819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18734__B1 _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23431__A _29820_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22541_ VGND VPWR _22550_/S hold444/X _30041_/Q _30041_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20541__A0 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31739_ _31739_/Q _31748_/CLK _31739_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_4653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16744__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21884__A3 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4615 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1075_A wire1081/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24246__B _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28329__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3434 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25260_ _26242_/A _25259_/X _25264_/A2 hold93/A _31254_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23150__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22472_ VGND VPWR _22448_/C _22512_/A4 _22484_/A2 _22472_/X _29997_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_69_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23086__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20266__S _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24283__A1 _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14220__B1 _29504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25480__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19829__A3 _26874_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18244__B _18244_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_4337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24211_ VGND VPWR _24220_/S _30887_/Q _27679_/A1 _30887_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_11_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22294__A0 _29139_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21097__A1 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21423_ _21854_/A _21424_/D _21424_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_50_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_3827 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length729 VPWR VGND _27638_/S _27636_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25191_ _25188_/X _31224_/Q _25191_/Y _31223_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_156_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_4359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_28_4020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1242_A wire1244/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27221__A1 _32101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20844__A1 _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23577__S _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24142_ _28510_/Q _19710_/B wire806/A _28702_/Q _20061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_21354_ _21379_/D _21345_/Y _21353_/B _21353_/A _21346_/X _21342_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_195_2962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24035__A1 _30661_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_2924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24035__B2 _30725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21101__D _22553_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27276__C _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28479__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_191_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_137_2323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20305_ VGND VPWR _20323_/S _27688_/A1 _28846_/Q _28846_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24073_ wire738/A _24957_/B _31173_/Q _31141_/Q _25022_/B VGND VPWR _24072_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__23389__A3 _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28950_ _28950_/Q _32440_/CLK _28950_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_249_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3651_A _30464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15720__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29724__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21285_ _21285_/Y _21285_/B _21285_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_60_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_134_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25077__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24440__D1 _25197_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3322 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_2979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22597__A1 _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20057__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2908 wire2909/X _20584_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_284_5314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21097__S _21097_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22597__B2 wire3709/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23024_ VGND VPWR _23024_/X _25693_/C _32387_/Q wire3399/X _23036_/S1 _32395_/Q _32403_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__25792__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27901_ _27901_/Q _30272_/CLK _27901_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3715 VPWR VGND _22356_/A _30330_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20236_ VGND VPWR _20236_/S _28779_/Q wire2001/X _28779_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_5445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24991__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3726 VPWR VGND _17024_/B _30323_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18265__A2 wire3855/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19075__B _19311_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28881_ _28881_/Q _32320_/CLK _28881_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_1245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3737 VPWR VGND _18845_/A _30258_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout967_A _16806_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16276__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15079__A2 wire1748/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20328__A_N _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3759 VPWR VGND _17027_/B _30218_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_115_2643 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20072__A2 _19547_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22213__C _29829_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25535__A1 _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24338__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27832_ _27832_/A _27844_/C _32539_/D _27832_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__30701__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20167_ wire877/X _24931_/B _20167_/X _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__31827__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold280_A hold280/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3916_A wire3918/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25805__B _32545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22349__A1 _21413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19214__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29874__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27763_ VGND VPWR _27765_/S _25033_/B _32490_/Q _32490_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_248_2307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24975_ _25652_/A _24974_/X _25017_/A2 _31131_/Q _31131_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19803__B _19849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20098_ wire881/X _20061_/B _20098_/X _20165_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_276_188 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_2250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_3003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25524__C _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_265_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17225__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29502_ _29502_/Q _32570_/CLK _29502_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_41_2895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26714_ _26714_/Y _31772_/Q hold431/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__19765__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23926_ _23926_/X _24207_/B1 _28521_/Q _28681_/Q _19715_/C VGND VPWR _23925_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_268_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27694_ VGND VPWR _27698_/S _27694_/A1 _32428_/Q _32428_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_1621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2048_A wire2049/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16579__A2 wire923/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17776__A1 _17832_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18973__B1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_183_2310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25838__A2 _25836_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30851__CLK _32271_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1688 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_602 _24118_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29433_ _29433_/Q _30392_/CLK _29433_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31977__CLK _31977_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27512__S _27516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26645_ _26662_/A2 _31858_/Q _26644_/Y _26645_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_613 _26988_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_5342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23857_ _19792_/C _23856_/X _31828_/Q _19858_/B _23858_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__29104__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20030__A wire851/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_624 _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_635 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15251__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_646 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input200_A mprj_dat_i[4] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22808_ _22809_/D _22829_/A _22803_/X _22796_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_92_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_657 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29364_ _29364_/Q _30445_/CLK _29364_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14590_ VGND VPWR _14590_/X _14822_/B1 wire1202/X _14587_/X _14589_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_26576_ _26576_/X wire1275/X wire3461/X wire3462/X _26575_/X _23744_/Y VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA_668 _24591_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23788_ _23789_/A _24178_/A2 _31840_/Q _31805_/Q _27053_/A VGND VPWR _23787_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA_679 _25524_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26248__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24437__A _24439_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18725__B1 _18724_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28315_ _28315_/Q _28402_/CLK _28315_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23341__A _27678_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20532__A0 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_4062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25527_ VGND VPWR _19456_/A _31343_/Q _25511_/X _25527_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_22739_ _22740_/B _22736_/Y _22735_/Y _22737_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__31207__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26799__B1 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29295_ _29295_/Q _30359_/CLK _29295_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_13_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_1298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16200__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27460__A1 _32288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2636 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16260_ _16445_/A1 _16814_/A2 _16260_/X _16814_/B1 _29177_/Q wire1698/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_28246_ _28246_/Q _30460_/CLK _28246_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25967__S wire755/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29254__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25458_ VGND VPWR _19476_/X _31309_/Q _25510_/D _25458_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_input96_A la_input[30] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2076 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23077__A2 wire3171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24274__A1 _31660_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14211__B1 hold111/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24274__B2 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25471__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15554__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26652__A _31787_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18154__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15211_ VGND VPWR _15211_/X _15208_/X _15509_/A1 _15517_/A1 _15210_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21088__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24409_ VGND VPWR wire2296/A _24424_/C _31007_/Q _24409_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22285__B1 _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16191_ _16725_/A _16725_/C _29218_/Q _16191_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28177_ _28177_/Q _31920_/CLK _28177_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25389_ _31279_/Q _31280_/Q _25389_/Y _25389_/D _31281_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_30_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_3271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_2360 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27212__A1 _32098_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20835__A1 _20837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30231__CLK _30492_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23487__S _23529_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15142_ _15142_/Y _15151_/B1 _15137_/Y _15141_/Y wire1066/X _15133_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_1 X_27128_ _25940_/Y _27128_/X _27126_/X _31494_/Q _27127_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_5_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31357__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25268__A _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3138 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_3_5_0_core_clk_A clkbuf_3_5_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22391__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20904__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24026__B2 _30727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25223__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17700__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_3490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19950_ _19949_/X _28623_/Q _28623_/D _19992_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_15073_ _15332_/A2 _15073_/X _15072_/X _15638_/B1 _28850_/Q _15561_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_155_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2751_A _24441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27059_ _27059_/C1 _27058_/X wire772/X _32007_/Q _32007_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_275_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15711__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30324__D _30324_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_4156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22386__A1_N _22078_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_3635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1360 VPWR VGND _27098_/A _27058_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_159_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22588__A1 _30355_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23785__B1 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18901_ VGND VPWR _19087_/S _28349_/Q _27930_/Q _18901_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_opt_2_2_core_clk clkbuf_opt_2_3_core_clk/A clkbuf_opt_2_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_14024_ _14024_/Y _28473_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_268_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30070_ hold138/A _30503_/CLK _30070_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_253_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_5545 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18256__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19453__A1 _19451_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19881_ _19880_/X _28590_/Q _28590_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_46_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1001 _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30381__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1012 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20063__A2 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21260__A1 _29722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16267__B2 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25526__A1 _28445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24329__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_164_core_clk _30580_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_1023 wire4071/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_4221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18832_ _19375_/A2 _27991_/Q _19278_/S _18832_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_0_4409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1034 wire4066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_1389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25715__B _25727_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1045 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23537__A0 _30028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1056 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_283_4134 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14817__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21735__S _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1067 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18763_ _18763_/X _18762_/X _28051_/Q _19090_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_79_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15975_ VGND VPWR _15975_/S _15974_/X _15973_/X _15975_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19713__B _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3960_A _22427_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22420__A _22427_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output517_A _31103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16019__A1 _28087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31155__D _31155_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17216__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15490__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17714_ _17873_/B1 _31720_/Q _17713_/X _17714_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_97_2159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14926_ _14925_/Y _29078_/Q _14926_/X _15275_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_209_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire4132_A _28549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18694_ _30331_/Q _29811_/Q _29812_/Q _29813_/Q _22095_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_4 X_30972_ _30972_/Q _32319_/CLK _30972_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_3590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17767__A1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22760__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17767__B2 _17766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26827__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3439 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4290 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15778__A0 _29271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17645_ _17539_/C _17644_/X _31718_/D _17783_/B2 _17641_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_14857_ VGND VPWR _14857_/X _16791_/A2 _15608_/B2 _23393_/C _29172_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_224_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22324__A1_N _23491_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15242__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_2175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13808_ _31138_/Q _13808_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_251_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17576_ VGND VPWR _17576_/X _17596_/C _17576_/A _17576_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_105_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17519__A1 _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14788_ VGND VPWR _15275_/S _29213_/Q _29277_/Q _14788_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_264_2197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22566__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22512__A1 _22512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18716__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_2891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19315_ _19315_/X _19312_/X wire1912/A _19314_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_109_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20523__A0 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16527_ _16527_/X _29572_/Q _16964_/A2 _16966_/A3 _16925_/B1 _16526_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_31_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13739_ _31756_/Q _13739_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_32573_ hold300/A _32573_/CLK input70/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16564__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32132__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17887__C _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_3226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26254__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27451__A1 hold214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31524_ VGND VPWR _31524_/D _31575_/CLK _31524_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_51_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19246_ _28266_/Q _19246_/X _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_277_2503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_31_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16458_ VGND VPWR _16458_/S _16457_/X _16456_/X _16458_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24265__A1 _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14202__B1 hold96/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16742__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21079__A1 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2716_A wire2717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15409_ _15721_/A2 _15409_/X wire1515/X _15543_/S _28426_/Q _15408_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14753__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_cap2750 VPWR VGND _23737_/A2 _14148_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_31455_ VGND VPWR _31455_/D _32548_/CLK _31455_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__28621__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19177_ _19177_/X _19174_/X _19177_/B1 _19176_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__15950__B1 _15944_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29747__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16389_ _16388_/X _16386_/X _16807_/B1 _16389_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_2236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19141__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27203__A1 _27204_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26006__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30406_ _30406_/Q _30406_/CLK _30406_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18128_ VGND VPWR _18145_/S wire3888/X _28056_/Q _28056_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24017__A1 _28498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31386_ VGND VPWR _31386_/D _32525_/CLK _31386_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__32282__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20814__S _20819_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25214__B1 _25261_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24017__B2 _28690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22028__A0 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_5_14_0_core_clk_A clkbuf_4_7_0_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30724__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18059_ VGND VPWR _18078_/S wire3900/X _27989_/Q _27989_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30337_ _30337_/Q _32379_/CLK _30337_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_233_3833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_4128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1949_A wire1951/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20039__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4608 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28771__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21070_ VGND VPWR _21077_/S _21070_/A1 _29521_/Q _29521_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_214_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29897__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30268_ _30268_/Q _30268_/CLK _30268_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_99_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_3566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16258__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20021_ _23599_/B _20020_/Y wire850/X _28657_/Q _28657_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_151_3577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21251__A1 _29713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1015_A _16835_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17455__B1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32007_ _32007_/Q _32431_/CLK _32007_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_232_1418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25517__A1 _31338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23791__A3 wire1625/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3065_A _18044_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14113__A _21439_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30199_ _30199_/Q _30402_/CLK _30199_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14269__B1 hold190/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17127__C _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1609 VPWR VGND wire1609/X wire1609/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14808__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30874__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23426__A _29840_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28001__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29127__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25344__C _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_4349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31065__D _31065_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17729__A2_N _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_1896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15481__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19747__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13952__A _28545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17424__A _32272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24760_ _31446_/Q _24758_/Y _24670_/B _24770_/A _24760_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_249_1915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3232_A _14146_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23145__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21972_ _22061_/S hold235/A _21972_/X _21999_/S1 _17172_/X _17159_/B hold268/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_266_3686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17758__A1 _31720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18955__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18239__B _18239_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23711_ _30811_/D _23807_/B _23711_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__27332__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25641__A _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20923_ VGND VPWR _20931_/S _29388_/Q _29491_/Q _29388_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15769__B1 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30104__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17143__B _17143_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24691_ _24701_/D _24691_/A _24691_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_269_1396 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5116 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_14 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1192_A fanout1194/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_843 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15233__A2 wire1189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_25 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27690__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26456__B _31701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26493__A2 _26486_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26430_ _26403_/Y _26427_/Y _26428_/X _31696_/Q _31696_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_282_1530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23642_ VGND VPWR _23668_/S _27680_/A1 _30772_/Q _30772_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_2969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28151__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_1541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29277__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25360__B _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20854_ VGND VPWR _20858_/S _30225_/Q _29387_/Q _20854_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_56_3091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_47 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_3214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_4415 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22503__A1 _17198_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18707__B1 _18705_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_58 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16981__A2 _16979_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21937__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23700__B1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1551_A wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_69 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_2540 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_3023 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26361_ _26360_/X _31668_/Q _31668_/D wire781/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_34_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1649_A _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23573_ VGND VPWR _23573_/S _27242_/A0 _30493_/Q _30493_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16718__C1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20785_ VGND VPWR _20785_/S wire1783/X _29299_/Q _29299_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14992__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18183__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_273_5026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25137__D_N _25139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3699_A _30342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28100_ _28100_/Q _29580_/CLK _28100_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout1457_A _15770_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19380__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27442__A1 _32279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25312_ _25312_/X _25380_/C _31265_/Q _25414_/B1 _31257_/Q _25380_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_69_4131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30254__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25787__S _25793_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22524_ VGND VPWR _23523_/S _29813_/Q hold231/A _30024_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_178_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18722__A3 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29080_ _29080_/Q _32355_/CLK _29080_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16194__B1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26292_ _26291_/Y _27117_/C1 _31634_/Q _26331_/B _31634_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_273_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17930__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25453__B1 _25448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire917 VPWR VGND wire917/X wire918/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28031_ _28031_/Q _30431_/CLK _28031_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_3838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_5313 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25243_ _25243_/X _25263_/B1 hold4/A hold100/A _25263_/A2 VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22267__B1 wire2286/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14744__A1 _14744_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22455_ _30332_/D _22454_/X _22513_/A2 wire2292/X _29988_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_216_5444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3866_A _29855_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27869__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_101_3999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21406_ _21679_/D _21679_/C _21411_/C _21506_/D _21679_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_117_4129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24008__A1 wire3632/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4792 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25174_ VGND VPWR _25180_/D _31218_/Q _25181_/B _25174_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_256_1908 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19683__A1 _28502_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22386_ VGND VPWR _23226_/S _22078_/B _21286_/X _29945_/D wire3791/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__20724__S _20743_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25205__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22282__A3 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26402__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24125_ _31178_/Q _24957_/B _24124_/X _31146_/Q wire735/A _25022_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__17694__B1 _17881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25756__A1 hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4202 VPWR VGND wire4202/X wire4202/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21337_ _21323_/X _21640_/A _21319_/X _21322_/Y _21337_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_232_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29982_ _29982_/Q _30432_/CLK _29982_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3417 _27028_/A wire3428/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_254_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19517__C _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3501 VPWR VGND _17915_/A _31192_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_150_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28933_ _28933_/Q _32327_/CLK _28933_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24056_ _24056_/X _24205_/B1 _30657_/Q wire3635/X _24273_/C VGND VPWR _24055_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__27507__S _27507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_5419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19435__A1 _28440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3512 VPWR VGND wire3512/X _31099_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_46_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21268_ VGND VPWR _23533_/S _29730_/Q _22620_/A _29730_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_137_2175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_1080 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22034__A3 hold486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24720__A _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3534 VPWR VGND _25540_/C wire3536/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_232_3376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17224__A1_N _29904_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23007_ VGND VPWR _25733_/C _30150_/Q _23006_/X _30150_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20045__A2 wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25508__A1 _31333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20219_ VGND VPWR _20219_/S _28764_/Q _27509_/A1 _28764_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19986__A2 _19992_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input150_A la_input[7] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2811 VPWR VGND wire2811/X _27135_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26705__B1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28864_ _28864_/Q _30339_/CLK _28864_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_4541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2822 VPWR VGND _23668_/S _23669_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3567 VPWR VGND wire3567/X wire3568/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2165_A _20106_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21199_ VGND VPWR _21199_/S _29641_/Q _27624_/A1 _29641_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17037__C _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17997__A1 _18478_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3578 VPWR VGND wire3578/X _30866_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2833 _23295_/S _23298_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_111_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15457__C1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2844 VPWR VGND _21956_/A _21713_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3589 VPWR VGND wire3589/X wire3590/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32005__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27815_ VGND VPWR _27816_/B _32530_/Q _32531_/Q _25796_/X hold450/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_24_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26181__B2 _32107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28795_ _28795_/Q _31927_/CLK _28795_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_0_core_clk clkbuf_0_core_clk/X core_clk VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xwire2877 VPWR VGND wire2877/X _21066_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_265_648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20679__B _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2888 VPWR VGND _20639_/S _20646_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_185_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15472__A2 _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13862__A _28635_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15760_ _15760_/A1 wire1741/X _15760_/X _15760_/B1 _28772_/Q _16924_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_163_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27746_ VGND VPWR _27747_/S _32475_/Q _25035_/B _32475_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2332_A wire2333/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24958_ _25079_/A wire1283/X _24958_/X _24958_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_245_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17749__A1 _17576_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14680__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21545__A2 _21676_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27242__S _27262_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14711_ VGND VPWR _14820_/S _29556_/Q _14710_/X _14711_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_57_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25551__A _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23909_ wire4138/X _26838_/A1 _23909_/X _28584_/Q _25738_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_287_1485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17053__B _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20753__A0 _29268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15691_ VGND VPWR _15702_/S _29548_/Q _29582_/Q _15691_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_54_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27677_ VGND VPWR _27677_/S _32412_/Q _19734_/A _32412_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_287_1496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_410 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16957__C1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24889_ _24246_/B _26542_/D _26837_/A _24889_/A1 _24889_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_128_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32155__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3374_A _14133_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_421 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15224__A2 wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26484__A2 _26492_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27681__A1 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_432 wire725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17430_ _30955_/Q _30989_/Q _30883_/Q _30849_/Q _17248_/X _17430_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 X_29416_ _29416_/Q _30367_/CLK _29416_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_163_2725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_4769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14642_ VGND VPWR _14642_/S _14641_/X _14640_/X _14642_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26628_ _26628_/X _23772_/X _23776_/A _31794_/Q _26627_/X _26631_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA_443 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_106_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_454 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14432__B1 _14431_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15775__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_465 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_476 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20505__A0 _29023_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29347_ _29347_/Q _30446_/CLK _29347_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15789__A _28396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17361_ _30943_/Q _17361_/X _30977_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA_487 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14573_ VGND VPWR _14935_/S _28941_/Q _29239_/Q _14573_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28644__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_5634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26559_ _26559_/D _26904_/A _31763_/D _26559_/A _31763_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_70_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_498 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30319__D _30319_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14983__B2 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19100_ _19100_/X _19099_/X _27939_/Q wire1984/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_2 XFILLER_67_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27433__A1 _32273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16312_ _16311_/X _16884_/S _16911_/A2 _30499_/Q _16312_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_224_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_2928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19910__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_5558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17292_ _17293_/C _30924_/Q wire3585/X wire3098/X _30999_/Q _19792_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_29278_ _29278_/Q _31962_/CLK _29278_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17500__C _31613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15527__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25444__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17921__A1 _23272_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16724__A2 _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19031_ _19030_/X _19176_/B1 _19179_/A2 _28160_/Q _19031_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_174_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22258__B1 _30312_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16243_ VGND VPWR _16842_/S _28093_/Q _29049_/Q _16243_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28229_ _28229_/Q _32078_/CLK _28229_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14735__A1 _28408_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22118__C _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26813__C _27098_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25995__A1 _19573_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24798__A2 _24796_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30747__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15932__B1 wire890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27197__B _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19123__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19748__D_N _19973_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20808__A1 _29321_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31240_ hold102/A _32296_/CLK _31240_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_273_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28794__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16174_ VGND VPWR _16566_/S _28783_/Q _28815_/Q _16174_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_83_3427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19674__A1 _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20634__S _20646_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_3438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19708__B _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23010__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15125_ _15097_/X _29147_/D wire1064/X _15106_/X _15124_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_65_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_345_core_clk _30460_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_100_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31171_ _31171_/Q _32499_/CLK _31171_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_83_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26944__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4082_A wire4082/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18104__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14499__B1 _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21676__D _21676_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25211__A3 _25416_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_3845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30122_ _30122_/Q _30272_/CLK _30122_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_130_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29843__D _29843_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30897__CLK _32429_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19933_ _25041_/A wire1316/X _19933_/X _25027_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_15056_ VGND VPWR _15639_/S _29597_/Q _29629_/Q _15056_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15160__A1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27417__S _27421_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3940 _17228_/A _17220_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_117_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_1743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17228__B _17228_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28024__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3951 VPWR VGND _14092_/A _29716_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_5342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30989__D _30989_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output634_A wire2404/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25762__A4 _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21233__A1 _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17437__B1 hold45/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14007_ _28490_/Q _14007_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__17943__S _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3487 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19977__A2 _24941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30053_ hold172/A _32287_/CLK _30053_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19724__A _19724_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19864_ VGND VPWR _19531_/X _26687_/D _25738_/B _19864_/X _26159_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__24970__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1265_A _23973_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17988__A1 wire3911/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22981__A1 _22980_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21784__A2 _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18815_ _18815_/X _18856_/B _28345_/Q _19268_/S _18814_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_168_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20992__A0 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30127__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19795_ _19849_/B _19786_/B _20654_/D _19795_/X _27122_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__22150__A _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4696 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15463__A2 _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24183__B1 _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19729__A2 _19718_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_111_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28174__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18746_ _18746_/X _19382_/A1 _18740_/X _18745_/X _22135_/A wire1563/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_59_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15958_ wire1032/X _15957_/X _15958_/Y wire917/X _15954_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XFILLER_209_3323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_4961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput190 input190/X mprj_dat_i[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__18937__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23930__B1 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_27_3_core_clk clkbuf_opt_27_4_core_clk/A clkbuf_opt_27_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_185_3684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27152__S _27154_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14909_ VGND VPWR _14909_/X _14906_/X _14908_/X _15235_/A1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_57_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18677_ _18677_/X _18673_/X _23342_/C _18676_/X _29774_/Q VGND VPWR _22167_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_222_4213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30955_ _30955_/Q _32297_/CLK _30955_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_94_3589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15889_ wire1533/X wire3276/X _29167_/Q _15889_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_20_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_4273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31613__D _31613_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_3550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_2202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_200_5212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17628_ _17807_/B _17627_/X _17626_/X _17662_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_124_3911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30277__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_4085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25180__B _31219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17898__B _24389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22296__S _23366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30886_ _30886_/Q _31722_/CLK wire706/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20809__S _20809_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16963__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_61_core_clk _32402_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__31522__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21919__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_1845 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14974__A1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17559_ _31627_/Q _17559_/X _17875_/B _17475_/X _24260_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_257_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_251_397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_4039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19362__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27424__A1 _32270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26227__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19901__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21213__B _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20570_ VGND VPWR _20580_/S _27696_/A1 _29086_/Q _29086_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16176__B1 _28414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32556_ hold292/A _32581_/CLK _32556_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22500__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3509 VPWR VGND wire3508/A _31156_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_203_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24805__A _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19229_ _28137_/Q _19229_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__14726__A1 _29009_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31507_ _31507_/Q _31507_/CLK _31507_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22249__B1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_88_2626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15923__B1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32444__D _32444_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32487_ _32487_/Q _32523_/CLK _32487_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_195_2011 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14108__A _29729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31672__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_88_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22240_ _22240_/X _29835_/Q _22135_/A _22255_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_31438_ _31438_/Q _32401_/CLK _31438_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_1643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19665__A1 _28493_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20544__S _20550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19618__B _19618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23461__A2 _14097_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_3387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24243__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25199__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17676__B1 _31721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16479__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1518 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22171_ _22185_/D _22192_/D _22185_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA_wire3182_A _17901_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_4034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26935__B1 _26935_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31369_ _31369_/Q _31369_/CLK _31369_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_2090 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18014__S _18018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput620 _24585_/A mprj_adr_o[16] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17140__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput631 _24586_/B mprj_adr_o[27] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_3202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21122_ VGND VPWR _21139_/S _27693_/A1 _29566_/Q _29566_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32028__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24946__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15151__A1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput642 wire3124/X mprj_adr_o[8] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27327__S _27330_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19417__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput653 wire2686/X mprj_dat_o[17] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24410__A1 _24434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput664 wire2727/X mprj_dat_o[27] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_99_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_3809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_285_5453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput675 wire2355/X mprj_dat_o[8] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21224__A1 _22448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20027__A2 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17428__B1 _17426_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput686 _32601_/X resetn_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2107 VPWR VGND wire2107/X wire2107/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_236_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19968__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25930_ _31482_/Q _25930_/X _26164_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_21053_ VGND VPWR _21057_/S hold260/A _29511_/Q _29511_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_1115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput697 _14123_/Y spi_sdoenb VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2118 VPWR VGND wire2118/X wire2118/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24961__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_2640 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2129 VPWR VGND wire2129/X wire2129/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_143_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17979__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1205_A _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28517__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20004_ VGND VPWR wire2641/X _19522_/A _20028_/A _20004_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_274_401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input3_A debug_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27360__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25861_ _31450_/Q _31451_/Q _31449_/Q _25860_/D _25862_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__16100__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_2759 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_5485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_648 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_4124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1439 VPWR VGND wire1439/X _17913_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__32178__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15454__A2 _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27600_ VGND VPWR _27605_/S _27680_/A1 _32342_/Q _32342_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24174__B1 _24172_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24812_ _24812_/X _17452_/A _24809_/C _24811_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_284_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25910__A1 _31472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28580_ _28580_/Q _32552_/CLK _28580_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_77_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25792_ VGND VPWR _25793_/S hold226/A _31428_/Q _31427_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_1997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_3303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_opt_5_0_core_clk_A clkbuf_5_2_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14662__B1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18928__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22724__A1 wire3133/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14497__B _14515_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2472 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_145_3101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2709 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23590__S _23590_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27531_ _25643_/C _32190_/Q _27532_/A _25643_/B _32182_/Q _32198_/Q _32174_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_205_4411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24743_ _24743_/Y _24770_/A _31470_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__20735__A0 _29250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21955_ _21955_/Y _21955_/B _21955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__28667__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_5058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16939__C1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16403__A1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27663__A1 wire2234/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17600__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29912__CLK _32075_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20906_ VGND VPWR _20906_/S _30251_/Q _29413_/Q _20906_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27462_ VGND VPWR _27476_/S _32289_/Q _27461_/X _32289_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_145_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24674_ VPWR VGND _24676_/C _31466_/Q _24674_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__23603__B _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24477__A1 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21886_ VGND VPWR _21885_/Y _21878_/Y _21960_/A _21886_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20719__S _20719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29201_ VGND VPWR _29201_/D _32345_/CLK _29201_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_54_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26871__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26413_ _24805_/B _24805_/A _26412_/Y _26411_/X _31690_/D _26559_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_2 XFILLER_243_2056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21404__A _21404_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23625_ _30768_/D _23621_/X _24470_/C _23624_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_222_4780 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14965__A1 _15509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20837_ VGND VPWR _20837_/S _20836_/X _29349_/Q _29349_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27393_ VGND VPWR _27394_/S _32243_/Q _27278_/X _32243_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3983_A _29491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23685__C1 _23684_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24445__A_N _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_1918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_4207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27415__A1 _32262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19353__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_2089 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_3855 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29132_ _29132_/Q _32355_/CLK _29132_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_221_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26344_ VGND VPWR _25982_/A _24273_/D wire2231/X _26344_/X _27075_/C1 _26364_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_hold410_A hold410/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21160__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16167__B1 _29015_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23556_ VGND VPWR _23560_/S _30477_/Q hold492/X _30477_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20768_ VGND VPWR _20783_/S _27690_/A1 _29282_/Q _29282_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_13_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17364__C1 _17362_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25426__B1 _31295_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16706__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_1388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_32_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26769__A3 _26687_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27729__C _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire703 VPWR VGND wire703/X wire703/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_279_3899 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14717__A1 _29588_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire714 VPWR VGND wire714/X wire714/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_22507_ _22513_/C1 _22506_/X _22511_/A2 _17213_/X _30014_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29063_ _29063_/Q _30911_/CLK _29063_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_88_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire725 VPWR VGND wire725/X wire725/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14717__B2 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15914__B1 _28808_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26275_ VGND VPWR _14206_/Y _14398_/B _26267_/B _26275_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_278_1429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23487_ VGND VPWR _23529_/S _28382_/Q _30430_/Q _23487_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire736 VPWR VGND wire736/X wire736/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_221_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20699_ VGND VPWR _20719_/S _29215_/Q _27242_/A0 _29215_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14018__A _28479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19105__B1 _19104_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input198_A mprj_dat_i[31] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire747 VPWR VGND wire747/X wire747/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_234_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25584__C_N _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24434__B _24434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28014_ _28014_/Q _30481_/CLK _28014_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25441__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25226_ _26244_/A _25225_/X _25264_/A2 _31237_/Q _31237_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_175_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22438_ _26946_/A hold328/A _22438_/B _22445_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 Xwire769 VPWR VGND wire769/X wire769/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14193__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15390__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20454__S _20458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19528__B _23599_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23452__A2 wire3264/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20681__C _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13857__A _28640_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25157_ VGND VPWR _31212_/D _25159_/C _25148_/A _31212_/Q _25156_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26926__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22369_ _29934_/D _22385_/B1 _30473_/Q hold366/A _22356_/B VGND VPWR _22368_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 Xfanout3203 _14410_/X _21464_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17131__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4010 VPWR VGND _17291_/C _29203_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_134_4262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_2152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15678__C1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4021 VPWR VGND wire4021/X _28707_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_152_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3225 _21471_/D _22026_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29663__D _29663_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24108_ wire761/A _25980_/A2 _28507_/Q _28603_/Q _19710_/B VGND VPWR _24107_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 Xwire4032 wire4033/X wire4032/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15142__A1 _15151_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27237__S _27238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3236 VPWR VGND wire3237/A _14103_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19408__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4043 VPWR VGND wire4043/X _28669_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2502 _20789_/Y _20805_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_25088_ wire1326/X _31187_/Q _25088_/Y _25087_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_29965_ _29965_/Q _31282_/CLK _29965_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_input59_A la_input[112] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23436__A2_N _14098_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4054 VPWR VGND wire4054/X wire4055/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_117_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3320 VPWR VGND wire3320/X _25660_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3269 VPWR VGND wire3270/A _14093_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_8_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21215__A1 _22075_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20018__A2 wire2668/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22412__A0 wire725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17419__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17763__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3331 VPWR VGND wire3331/X wire3331/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire4076 wire4077/X wire4076/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19959__A2 _19959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16930_ VGND VPWR _16930_/X _16929_/X _16928_/X _16930_/A1 wire1058/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_24039_ wire1621/X _24038_/X _31138_/Q _24081_/A3 _24039_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_28916_ _28916_/Q _32049_/CLK _28916_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_4673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24952__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4087 VPWR VGND wire4087/X wire4088/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28197__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25265__B _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2547_A _20447_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4098 VPWR VGND wire4098/X _28648_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29896_ VGND VPWR _29896_/D _30425_/CLK _29896_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__28279__D _28279_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3364 VPWR VGND wire3364/X wire3365/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_117_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1823 VPWR VGND _27247_/A0 _18247_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22963__A1 _30475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29442__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2630 VPWR VGND wire2630/X _14212_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1834 VPWR VGND _27140_/A1 _18192_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout2579 _18666_/X _19368_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_264_5559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27351__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26154__A1 wire2207/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3386 wire3387/X wire3386/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire2641 VPWR VGND wire2641/X wire2642/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_277_272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1845 _27483_/S _27475_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_28847_ _28847_/Q _32434_/CLK _28847_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16861_ VGND VPWR _16942_/S _29547_/Q _29581_/Q _16861_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20974__A0 _29439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2652 VPWR VGND _19555_/B wire2653/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3397 VPWR VGND _24826_/B _32575_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_2236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_4262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_4213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2663 wire2664/X _19566_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_38_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2674 wire2675/X _14177_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15445__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18600_ VGND VPWR _18601_/S wire3892/A _28314_/Q _28314_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15812_ _16039_/A2 _15812_/X _15811_/X _16040_/A2 _32301_/Q _16039_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 Xwire2685 VPWR VGND wire2685/X _14168_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16642__B2 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25901__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_4869 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19580_ _19581_/B _25051_/B _19617_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_229_4989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1951 VPWR VGND wire1951/X wire1951/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2696 wire2697/X wire2696/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_237_158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16792_ _16792_/X _16814_/B1 _16791_/X _29643_/Q _16805_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_28778_ _28778_/Q _32430_/CLK _28778_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_147_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14653__B1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22715__A1 _22779_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18919__B1 wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15850__C1 _16039_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31545__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23912__B1 _24207_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1984 VPWR VGND wire1984/X wire1984/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_2792 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18531_ VGND VPWR _18531_/S _29871_/Q _28303_/Q _28303_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length3948_A _23095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15743_ _28112_/Q _15742_/X _15743_/Y _15756_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_54_4230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27729_ _27784_/C _31398_/Q _27729_/D _27737_/S _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 Xwire1995 VPWR VGND wire1995/X wire1995/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_284_2860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_3729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18594__S _18598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17198__A2 _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18395__A1 _23297_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29592__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2279 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22191__A2 wire829/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27654__A1 wire2234/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26457__A2 _26441_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24609__B _24609_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30740_ hold319/A _32467_/CLK _30740_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18462_ VGND VPWR _18466_/S _23297_/A1 _28236_/Q _28236_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_3821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15674_ _15673_/X _15692_/S _15721_/A2 _28866_/Q _15674_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24468__A1 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14405__B1 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_240 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20629__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19710__C _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16945__A2 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_251 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23005__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_2888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_262 _31988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17413_ _30952_/Q _30986_/Q _30880_/Q _30846_/Q wire3192/X _17417_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_2 XFILLER_180_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27700__S _27700_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21314__A _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1411 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14625_ _14625_/X _15628_/A2 _14675_/S _28910_/Q _15628_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__14956__A1 _15236_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_273 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30671_ _30671_/Q _32390_/CLK hold228/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18393_ VGND VPWR _18397_/S wire3831/X _28170_/Q _28170_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_284 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18147__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3923_A _21289_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_5311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31695__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_295 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19344__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27406__A1 _32254_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26209__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_261_2189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32410_ _32410_/Q _32513_/CLK _32410_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_201_4864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_3568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17344_ _30974_/Q _17344_/X _30940_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_37_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21151__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16158__B1 _29465_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14556_ VGND VPWR _14556_/X _14553_/X _14555_/X _14642_/S _14928_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25417__A0 _31287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18698__A2 _18696_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19895__A1 _28597_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_3139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22494__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26614__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32341_ _32341_/Q _32398_/CLK _32341_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14708__A1 wire1089/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15905__A0 _29242_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17938__S _17941_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2247_A wire2248/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27001__A _27001_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25968__A1 _26783_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17275_ _30964_/Q _17275_/Y _30930_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_15_2889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14487_ VGND VPWR _14088_/Y _14515_/B _14086_/Y _14487_/X _30444_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__16842__S _16842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16173__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17370__A2 _17370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_4386 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19014_ _19185_/S _28031_/Q _19013_/X _19014_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_157_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23979__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16226_ _16841_/A2 _16226_/X _16225_/X _16722_/C1 _32312_/Q _16722_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_239_2637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14184__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32272_ _32272_/Q _32300_/CLK _32272_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_237_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_4640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22100__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25159__C _25159_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_5_29_1_core_clk clkbuf_5_29_1_core_clk/X clkbuf_5_29_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_196_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21454__A1 _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31223_ VGND VPWR _31223_/D _31369_/CLK _31223_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17658__B1 _24604_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13767__A _31179_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16157_ VGND VPWR _16157_/X wire944/X wire1060/X _16154_/X _16156_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26917__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_6_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15669__C1 wire1209/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20662__C1 _20661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15108_ _15761_/A2 _15108_/X _15107_/X _15752_/B1 _28787_/Q _15759_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__24928__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15133__A1 wire1214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27147__S _27149_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31154_ _31154_/Q _32546_/CLK _31154_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_61_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26393__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25196__A2 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_4384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16088_ VGND VPWR _16088_/X wire918/A _16088_/A _16088_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_152_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21206__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22403__A0 _21834_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20009__A2 wire850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17673__S _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30105_ _30105_/Q _30460_/CLK _30105_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15684__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15039_ VGND VPWR _15627_/S _28416_/Q _29081_/Q _15039_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_19916_ VGND VPWR _26323_/A _20061_/C _25980_/A2 _19916_/X _26999_/A _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_4_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24943__A2 _19618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31085_ _31085_/Q _32295_/CLK _31085_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32320__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17054__C_N _29882_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1647_A _27053_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3792 VPWR VGND _17234_/B2 _29945_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27568__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22954__A1 _21549_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18083__A0 _28013_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21195__S _21195_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2783_A _27621_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27342__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30036_ _30036_/Q _30051_/CLK _30036_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24510__D _31290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19173__B _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19847_ VGND VPWR _26323_/A _20061_/C _19853_/A2 _19847_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__16289__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2591_A wire2594/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14507__A_N _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24156__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15436__A2 wire1493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16633__A1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_4005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17830__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29935__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_2297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_2012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1814_A wire1815/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_1270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14644__A0 _28975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1893 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19778_ _19778_/Y _19778_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_0_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_111_3391 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_3623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2950_A _20292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15987__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_4087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32470__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20717__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18729_ VGND VPWR _18729_/X _19335_/B _19278_/S _28018_/Q _18728_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_74_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31987_ _31987_/Q _32431_/CLK _31987_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_243_139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18386__A1 wire3851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22182__A2 _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_3629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27645__A1 _27664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30912__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25105__C1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24519__B _31294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21740_ VGND VPWR _21741_/B _21358_/Y _21741_/A _21742_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_240_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16397__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30938_ _30938_/Q _32039_/CLK _30938_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_146_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20539__S _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25656__B1 _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3943 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26853__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_1399 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27610__S _27626_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14947__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3012 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21671_ VGND VPWR _21671_/X _21447_/B _21441_/Y _29885_/Q _21655_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18138__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30869_ _30869_/Q _32347_/CLK _30869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18009__S _18015_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1653 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23131__A1 _30439_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_4117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1008 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23410_ _30411_/D _30411_/Q _22387_/Y _23409_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_181_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26734__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20622_ VGND VPWR _20625_/S _27237_/A0 _29168_/Q _29168_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_2641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21142__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24390_ _26904_/A _25197_/A _26509_/D _24437_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XANTENNA__19886__A1 wire1386/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18689__A2 wire2582/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23682__A2 _24273_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23341_ VGND VPWR _30329_/D _30219_/Q _27678_/A _23341_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_159_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21693__A1 wire2469/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_267_core_clk _32426_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__25959__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20553_ VGND VPWR _20556_/S wire1840/X _29069_/Q _29069_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29315__CLK _30783_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32539_ _32539_/Q _32540_/CLK _32539_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22890__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21878__B _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_2363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_3662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16752__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3397_A _32575_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18533__A _29652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16164__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1155_A wire1171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24254__B _31759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27268__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26620__A2 wire3462/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26060_ _14399_/B _26059_/Y _31535_/Q _26066_/D _26060_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_23272_ VGND VPWR _23300_/S _23272_/A1 _30254_/Q _30254_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15372__A1 _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14175__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20274__S _20294_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20484_ VGND VPWR _20484_/S _29003_/Q _23671_/A1 _29003_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_217_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2649 VPWR VGND _26555_/A2 _14197_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_192_4186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25011_ _25810_/C _25010_/X _25021_/A2 _31149_/Q _31149_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_27_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1915 VPWR VGND _19273_/S wire1916/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15368__S _15368_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22223_ VGND VPWR _22280_/S _30307_/Q _30397_/Q _22223_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_5458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14580__C1 _28869_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31418__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26908__B1 _24383_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3564_A wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1322_A _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18310__A1 _18229_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_251_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_287_4803 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23585__S _23590_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29465__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15124__A1 wire1083/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22154_ VGND VPWR _22154_/X _22152_/X _22153_/X _22281_/B2 _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26384__A1 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25366__A _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16321__B1 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1479 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17664__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18861__A2 _18853_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput450 _13912_/Y la_oenb[68] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27907__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput461 _13902_/Y la_oenb[78] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21105_ _22433_/A _22433_/B _21104_/Y _29550_/D _21104_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_47_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16872__A1 _16943_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15675__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24701__C _31473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput472 _13892_/Y la_oenb[88] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29750_ _29750_/Q _31938_/CLK hold465/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire3731_A wire3732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24934__A2 _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22085_ wire3151/X _14083_/Y wire1547/X wire2273/A wire826/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23737__A3 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26962_ VGND VPWR _26965_/C hold500/A _31996_/Q _31994_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__25085__B _25085_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput483 _13946_/Y la_oenb[98] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_183_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput494 _28656_/Q la_output[107] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_wire3829_A wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1119 wire1135/X _14823_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__27358__C_N hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27559__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22945__A1 hold494/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21748__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30442__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28701_ _28701_/Q _31879_/CLK _28701_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_259_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_570 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31568__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2809 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_2000 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25913_ VGND VPWR _14174_/A _19566_/A _25903_/S _25913_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_2_4857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27333__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26136__A1 _19535_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21036_ _29499_/D wire3976/A _21035_/Y _22104_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__24420__D _24420_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20956__A0 _29421_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29681_ _29681_/Q _32324_/CLK _29681_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19810__A1 _28557_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26893_ _26893_/C1 _26892_/Y _26900_/A _31896_/Q _31896_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire1214 VPWR VGND wire1214/X wire1214/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_99_2541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_186_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_144_5519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16624__A1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24147__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1789_A _18267_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1236 _24442_/A _25567_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28632_ _28632_/Q _32541_/CLK _28632_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17821__B1 _17863_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25844_ _25844_/X _31444_/Q _31442_/Q _31443_/Q _31445_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 Xwire1247 VPWR VGND wire1247/X _24171_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_hold360_A hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_3701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_99_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1258 VPWR VGND wire1258/X _24066_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xload_slew2759 VPWR VGND _24260_/C _24276_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_247_478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14635__B1 wire1067/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15978__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_1866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_2498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20420__D_N _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_3231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20708__A0 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28563_ VGND VPWR _28563_/D _31877_/CLK _28563_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_25775_ VGND VPWR _25775_/X _32106_/Q _27276_/C _27227_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19811__B wire881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22987_ _25691_/B _32518_/Q _22987_/X _25693_/B _32510_/Q _28902_/Q _32502_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__18377__A1 wire3881/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30592__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23370__A1 _30348_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27097__C1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_3505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27636__A1 _19546_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14650__A3 _14648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27514_ VGND VPWR _27516_/S _27707_/A1 _32329_/Q _32329_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24726_ _24726_/Y _31565_/Q _31566_/Q _24722_/B _24721_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XANTENNA_input113_A la_input[46] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20184__A1 _28736_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16388__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21938_ _21558_/X _21938_/Y _21484_/B _21484_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 X_28494_ _28494_/Q _31806_/CLK _28494_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20449__S _20449_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2128_A wire2128/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16927__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_18_core_clk_A clkbuf_opt_2_7_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21920__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_2173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20676__C _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27520__S _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14938__A1 wire1074/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25111__A2 _25149_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27445_ VGND VPWR _27475_/S _32279_/Q _32280_/Q _27445_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_90_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_2826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24657_ VGND VPWR _24657_/B _24657_/Y _31448_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_19_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21869_ VGND VPWR _21392_/Y _21393_/Y _21677_/B _21869_/X wire3145/X _21641_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18129__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23122__A1 hold253/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19326__B1 _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_932 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_2119 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_2165 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23122__B2 _30102_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14410_ VPWR VGND _14410_/X _21451_/B _21339_/C VGND VPWR NF_sky130_fd_sc_hd__and2_1 XPHY_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23608_ _23608_/Y _31065_/Q wire1353/X _24837_/C wire1292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XFILLER_275_4228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15390_ wire1552/X wire3303/X _29638_/Q _15390_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27376_ _27303_/D _31386_/Q _27413_/C hold143/A _27384_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 XFILLER_106_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_197_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24588_ _31542_/Q _24588_/X _24588_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_32_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22476__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24870__A1 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23673__A2 wire2611/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22330__C1 _18190_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_2482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24974__C_N wire1283/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29115_ _29115_/Q _32038_/CLK _29115_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_2444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14341_ _30336_/Q _14341_/Y _21339_/C _21451_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_1 XANTENNA__21684__A1 _21662_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14393__D _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26327_ _26327_/Y _26327_/B _26896_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__22881__A0 wire3806/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23539_ VGND VPWR _23539_/S _30460_/Q _30030_/Q _30460_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19539__A _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_2796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21052__B1_N _21051_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2497_A _20809_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4061 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17352__A2 wire2108/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3337_A _27059_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3840 VPWR VGND _23291_/A1 wire3841/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15899__C1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25414__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2826 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17060_ _22449_/A _29995_/Q _17059_/X _17060_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_253_4537 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_158_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29046_ _29046_/Q _32311_/CLK _29046_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19892__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14272_ _24543_/A _31042_/Q _25416_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__19629__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26258_ _26182_/A _26257_/X _26263_/A _31656_/Q _31617_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_270_5563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length3862 VPWR VGND _18516_/A1 wire3863/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_7_5425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29808__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24622__A1 _31554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26660__A _31789_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15902__A3 _16150_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18162__B _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31098__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16011_ _16011_/X _32115_/Q _16448_/A2 _16805_/A3 _16120_/S _16010_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_49_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15278__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_3956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_5596 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25209_ _25209_/X _25261_/B1 _29846_/D _31361_/Q _25197_/D VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_171_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_3393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2619 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2664_A _14185_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_5469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26189_ _31583_/Q _26227_/A2 _26190_/B _32273_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__32343__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17077__C_N _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17104__A2 _21641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18301__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3295 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_4895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_4272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_3547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23495__S _23525_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15115__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26375__A1 _31675_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16312__B1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18852__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27194__C _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23189__A1 _30185_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28832__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2831_A _23298_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29958__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23728__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17962_ VGND VPWR _17981_/S wire3878/X _27899_/Q _27899_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30332__D _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29948_ _29948_/Q _32441_/CLK _29948_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_40_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2929_A _20338_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3088 VPWR VGND _17941_/S _17918_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21739__A2 _22075_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19701_ _27077_/C1 _19700_/Y _19711_/A2 _28511_/Q _28511_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xfanout1620 VGND VPWR wire1622/A _19787_/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_264_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26127__A1 _17879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16913_ _16913_/X _16903_/X _16907_/X _16912_/X _16941_/C _16899_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_238_412 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32493__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1631 _19926_/B wire1633/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20947__A0 _29515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26127__B2 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17893_ _17893_/X _24384_/A _24384_/C _32598_/A _24384_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 Xwire3183 VPWR VGND _30324_/D wire3184/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29879_ _29879_/Q _31961_/CLK _29879_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_130_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_2022 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3194 VPWR VGND _31905_/D _17243_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_260_5209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16615__A1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15418__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24138__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_57_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30935__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31910_ VGND VPWR hold325/X _31910_/CLK _31910_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19632_ _19632_/Y _20120_/B _19632_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xwire2471 VPWR VGND _21158_/S _21151_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26819__B _26819_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16844_ wire1556/X _16943_/A1 _29129_/Q _16844_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_238_467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_702 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4045_A _28668_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23036__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_5020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28982__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21743__S _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1770 VPWR VGND wire1770/X _19089_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_225_3905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_3504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31841_ _31841_/Q _31873_/CLK _31841_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19563_ _19563_/X _19563_/A _19563_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XFILLER_182_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19721__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16775_ wire1010/A wire1482/A _32327_/Q _16775_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_78_2669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16837__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1792 VPWR VGND wire1792/X wire1792/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13987_ _28510_/Q _13987_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18368__A1 wire3916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3763 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23361__A1 hold249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22164__A2 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27627__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_1664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18514_ VGND VPWR _18523_/S wire3868/X _28286_/Q _28286_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_1398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15726_ _15697_/X _29163_/D wire1068/X _15706_/X _15725_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_147_3785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31772_ _31772_/Q _31877_/CLK _31772_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19494_ _25488_/A _31322_/Q _25492_/A _31325_/Q _31324_/Q _31323_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_91_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_31_0_core_clk clkbuf_5_31_1_core_clk/A clkbuf_5_31_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_228_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1228_A wire1228/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20359__S _20359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_4363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25638__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26835__A _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21911__A2 _21484_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_4161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_1085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27430__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17040__B2 _30381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30723_ VGND VPWR hold264/X _32551_/CLK _30723_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18445_ VGND VPWR _18456_/S _18478_/A1 _28219_/Q _28219_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14929__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25102__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28212__CLK _30479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15657_ wire1552/X wire3303/X _32138_/Q _15657_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__29338__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_4_15_0_core_clk_A clkbuf_3_7_2_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_1842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_4874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17591__A2 _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26850__A2 wire2648/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14608_ wire1533/A _14608_/X _28974_/Q _14627_/C1 _14627_/A1 _14935_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_141_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18376_ VGND VPWR _18398_/S wire3885/X _28153_/Q _28153_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30654_ hold283/A _31836_/CLK _30654_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19868__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_3376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15588_ _16798_/A2 _15607_/A1 _30798_/Q _15588_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17328__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22574__S _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24861__A1 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_5163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17327_ VGND VPWR _17323_/X _17327_/X _17326_/X _17272_/A wire2119/X _17324_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XANTENNA__21675__A1 _21506_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_360_core_clk _31961_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__30315__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14539_ VGND VPWR _14539_/X _14539_/B _14539_/A _14544_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_176_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16572__S wire981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30585_ _30585_/Q _32444_/CLK hold333/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_54_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17895__C _17895_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26063__B1 _31536_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18540__A1 _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17343__A2 _17343_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24208__A4 _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28362__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26602__A2 wire3452/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25405__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_2082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32324_ _32324_/Q _32324_/CLK _32324_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_3168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29488__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15354__A1 wire3298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14157__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17258_ wire3562/X wire3448/X _17258_/X _17446_/B2 wire2129/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XANTENNA__24505__D _24505_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19168__B _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2776 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16551__B1 _16784_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold67_A hk_dat_i[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23416__A2 _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24613__B2 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16209_ VGND VPWR _16209_/X _16199_/X _16208_/X wire923/X wire901/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_28_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32255_ _32255_/Q _32550_/CLK _32255_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_85_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18828__C1 _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23967__A3 _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19096__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17189_ _30399_/Q _16971_/A _17188_/X _17190_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_6_4201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27385__B hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_24 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2604_A _14266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24802__B _31687_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30465__CLK _30473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31206_ _31206_/Q _32554_/CLK _31206_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_4492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15106__A1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_96_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26366__A1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25169__A2 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32186_ _32186_/Q _32204_/CLK _32186_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_80_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18843__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31710__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18499__S _18499_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_83_2364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_63_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_315_core_clk_A clkbuf_5_17_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24377__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15657__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15916__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_2044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31137_ _31137_/Q _32470_/CLK _31137_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1931_A wire1931/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19384__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24916__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23719__A3 wire1875/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14820__S _14820_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1933 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_4790 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14865__B1 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22927__A1 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27315__A0 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26118__A1 _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27605__S _27605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_4266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20938__A0 _29506_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31068_ _31068_/Q _31363_/CLK _31068_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_3688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_1939 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3486 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2973_A _18593_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24129__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16606__A1 wire1062/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15409__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22910_ _22910_/A _22910_/X _22910_/B _22901_/A _22895_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XANTENNA__17803__B1 _31732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30019_ _30019_/Q _32127_/CLK _30019_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_0_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31860__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_3576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3145_A _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23890_ _20671_/A _30561_/Q _23890_/X _19857_/B _30625_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_268_1417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23027__S1 _25693_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14617__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_61_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16082__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_2124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_1956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22841_ _30471_/Q _22838_/X _22935_/A _22843_/B wire3133/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XANTENNA__24144__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19631__B _19631_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18359__A1 wire3832/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23352__A1 _30334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27079__C1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22155__A2 wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19556__B1 _19598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27618__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24249__B _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13960__A _28537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25560_ VGND VPWR _25564_/S _31359_/Q _31360_/Q _31359_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20166__A1 _28727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19020__A2 _19016_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22772_ _22794_/A _22793_/A _22772_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__20269__S _20269_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_4291 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2471 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16909__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_4250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32216__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26826__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24511_ _24533_/A _24522_/B _31290_/Q _31291_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_1 XANTENNA__27094__A2 _24841_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21723_ _14356_/X _21724_/B _21766_/B _21708_/B _21722_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_241_4485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_203_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25491_ _25492_/A _25454_/A _31325_/D _25490_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_241_4496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15042__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_2184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17582__A2 _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26464__B _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27230_ _27230_/B _27230_/A _27230_/Y _31739_/Q _27230_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA__25644__A3 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26841__A2 wire753/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24442_ VGND VPWR _31020_/D _26244_/A _24442_/A _24442_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_21654_ _21549_/Y _17115_/Y _21677_/B _21551_/Y _21654_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_142_2447 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16790__A0 _32136_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15593__A1 wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28705__CLK _32014_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22458__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24852__A1 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20605_ VGND VPWR _20605_/S _27698_/A1 _29120_/Q _29120_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21666__A1 _29901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27161_ VGND VPWR _27167_/S _27704_/A1 _32067_/Q _32067_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length1729_A _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_16_0_core_clk clkbuf_opt_16_1_core_clk/A _29752_/CLK VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_24373_ _24372_/X _24888_/D wire1668/A _23611_/A _30989_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21666__B2 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22863__B1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31240__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21585_ VPWR VGND _21585_/X _21646_/A _21586_/B VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__32366__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23600__C _25881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3125 VPWR VGND wire3124/A hold191/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_258_4993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18263__A _18332_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3779_A _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17334__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18531__A1 _29871_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1537_A wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26112_ _26121_/D _31549_/Q _31547_/Q _31548_/Q _26112_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 X_23324_ VGND VPWR _23334_/S _30302_/Q _17136_/X _30302_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_leaf_354_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19874__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20536_ VGND VPWR _20548_/S _29053_/Q wire1792/X _29053_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27092_ _27120_/B _26876_/B _27098_/A _27092_/X _27098_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_194_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30808__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16542__B1 wire904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23407__A2 _14309_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_3910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2435 VPWR VGND _27238_/S _27262_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout997_A wire1005/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21418__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15896__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26043_ VGND VPWR _31531_/Q _26032_/X _31530_/Q _26043_/X wire2597/X _31529_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_270_3413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_3252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21099__D_N _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22615__B1 wire3700/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28855__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23255_ VGND VPWR _23255_/S _29503_/Q _30238_/Q _30238_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23958__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20467_ VGND VPWR _20482_/S _28986_/Q _27247_/A0 _28986_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length1723 _23373_/S _23380_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_85_3886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25808__B _32548_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1704_A wire1706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24080__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_3271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_175_2267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21969__A2 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22206_ _29828_/Q hold444/A _29829_/Q _22207_/D _22206_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_231_3408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22091__A1 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31390__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23186_ _23191_/C1 _23191_/B1 _22553_/A _29734_/Q _23186_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_153_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_4273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27554__B1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20732__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20398_ VGND VPWR _20414_/S _27690_/A1 _28920_/Q _28920_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_157_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18710__B _19046_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_4126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_5329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24368__B1 wire1351/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15648__A2 wire1556/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29802_ hold262/A _30468_/CLK _29802_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_27_2546 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22137_ _22137_/X _20980_/S _18668_/C _18666_/C _22273_/S _30295_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__30958__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16845__B2 wire1469/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24907__A2 _19554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_2674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_3021 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_2275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27994_ _27994_/Q _31971_/CLK _27994_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_3032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput280 _13789_/Y la_iena[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_248_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_4621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2078_A wire2078/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19525__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput291 _13788_/Y la_iena[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_79_4347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26372__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_4918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23040__A0 wire3682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29733_ VGND VPWR _29733_/D _30428_/CLK _29733_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_187_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27515__S _27515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20929__A0 _29497_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26945_ hold469/A wire1571/X _31969_/D wire2745/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22068_ _21613_/B _22067_/Y _21610_/B _21812_/B _22068_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_188_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26109__B2 _24590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_5616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_2890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18598__A1 wire3901/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23591__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13910_ _28587_/Q _13910_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_21019_ VGND VPWR _21021_/S _29484_/Q _27708_/A1 _29484_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_247_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4915 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29664_ hold496/A _32063_/CLK _29664_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14890_ VGND VPWR _15627_/S _29311_/Q _28749_/Q _14890_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2245_A _19531_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_242_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26876_ _26876_/Y _26876_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14031__A _28466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1044 VPWR VGND wire1044/X wire1044/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_235_404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25868__B1 _31454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1055 VPWR VGND wire1055/X wire1055/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_275_584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire1066 VPWR VGND wire1066/X wire1067/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16073__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17270__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28615_ _28615_/Q _32529_/CLK _28615_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_4336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13841_ _29827_/Q _22185_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_2_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25827_ VGND VPWR _31438_/Q _31429_/Q _27854_/C _25827_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__24135__A3 _20669_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14388__D _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28235__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25332__A2 _25380_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29595_ _29595_/Q _32063_/CLK _29595_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_1685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15281__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22146__A2 wire2284/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27609__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13870__A _28627_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14623__A3 wire1508/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15820__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_1241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16560_ _16560_/X _16559_/X _16551_/X _16546_/X wire912/A _16555_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_122_5636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2412_A _19859_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28546_ _28546_/Q _31570_/CLK _28546_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20157__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13772_ _31174_/Q _13772_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_73_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25758_ _27185_/A _32086_/Q hold107/A hold106/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__19011__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23894__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_4060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25002__C_N _24937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18755__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18157__B _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15511_ _15511_/X _15759_/A2 _15521_/S _29264_/Q _15748_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__27250__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27085__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24709_ _24704_/B _31456_/Q _24708_/X _24709_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_clkbuf_leaf_393_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_189_core_clk _32573_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17061__B _21777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30338__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16491_ VGND VPWR _16491_/S _16490_/X _16489_/X _16491_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28477_ VGND VPWR _28477_/D _32553_/CLK _28477_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_34_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25689_ _31393_/D _25693_/C _25688_/Y _25693_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25096__A1 _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18770__A1 _18770_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26293__B1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18230_ _18254_/S wire3879/X _18295_/B _18229_/X _18230_/Y _29340_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_231_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28385__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26832__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15442_ wire3258/X wire1741/A _15442_/X _15760_/B1 _28828_/Q wire1702/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 Xclkbuf_leaf_118_core_clk _30339_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_205_3381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27428_ VGND VPWR _27484_/S _32272_/Q _27427_/X _32272_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_202_4970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26666__B1_N _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15584__A1 _15598_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22394__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15584__B2 _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24843__A1 wire868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20907__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_16_3696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29630__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_159_5581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_3538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18161_ _18244_/A _18160_/X _18201_/A _18217_/B _18161_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_123_3092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_784 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19269__A _30278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27359_ VGND VPWR _27366_/S _32213_/Q _27266_/X _32213_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15373_ _15226_/B _15372_/X _15368_/X _15762_/A1 _15373_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_230_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18522__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2879_A _20772_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16128__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 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NF_sky130_ef_sc_hd__decap_12 XANTENNA__31733__CLK _31738_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_3008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_4307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21409__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22605__A_N _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17043_ _17043_/X _29873_/Q hold230/A _17040_/X _17042_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XFILLER_84_4086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29029_ _29029_/Q _30359_/CLK _29029_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14255_ _14255_/Y _14254_/Y _14167_/S _14048_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__22606__B1 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23949__A3 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19078__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29780__CLK _29782_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24071__A2 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_4067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 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VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29160__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25172__C _31216_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22137__A2 _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23334__A1 _30312_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_4128 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13780__A _31166_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15811__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19546_ _19546_/Y _19628_/A _19546_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_203_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31824_ _31824_/Q _32573_/CLK _31824_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20148__A1 _28718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19002__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16758_ wire1010/A wire1482/A _28967_/Q _16758_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_143_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28728__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23885__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26808__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27160__S _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21896__A1 _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15709_ _15707_/C _15543_/S _28899_/Q _15709_/A3 _15709_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_282_1959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_2712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19477_ _31308_/Q _31309_/Q _25462_/B _25454_/B _31310_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 X_31755_ _31755_/Q _31760_/CLK _31755_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_3577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18782__S _19268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31263__CLK _31923_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16689_ _16689_/X _16686_/X _16950_/A1 _16949_/C1 _16688_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_206_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32389__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18761__A1 _28019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16367__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17564__A2 _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26284__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_108_2854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_3763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30706_ hold490/A _32551_/CLK input90/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_4846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18428_ VGND VPWR _18428_/S _28203_/Q _29867_/Q _28203_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire798_A wire798/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31686_ _31686_/Q _31726_/CLK _31686_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_222_687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20817__S _20817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24834__A1 _24454_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_5632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_cap2766_A _19513_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21648__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24516__C _31220_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30637_ _30637_/Q _31570_/CLK hold335/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18359_ VGND VPWR _18359_/S wire3832/X _28137_/Q _28137_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28878__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1979_A _19090_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26036__B1 _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18513__A1 wire3870/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2819_A _25416_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15500__A _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15327__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21370_ VGND VPWR _21741_/A _21741_/B _21379_/A _21752_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_134_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20320__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16524__B1 _16839_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30568_ hold315/A _31730_/CLK _30568_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_195_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20321_ VGND VPWR _20321_/S _27704_/A1 _28862_/Q _28862_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15878__A2 wire1004/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1045_A wire1043/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32307_ _32307_/Q _32307_/CLK _32307_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14535__C1 _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3891 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_4137 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length4127_A _28555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3230 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19069__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14116__A _21464_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30499_ _30499_/Q _32038_/CLK _30499_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24062__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28108__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3651 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_214_5586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23040_ VGND VPWR _23040_/S _29704_/Q wire3682/X _23040_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22073__A1 _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26339__A1 hold481/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32238_ _32238_/Q _32544_/CLK _32238_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20252_ VGND VPWR _20259_/S _28795_/Q _27701_/A1 _28795_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_3777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23429__A _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14550__A2 _14544_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27536__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18816__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3908 VPWR VGND wire3908/X wire3909/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20084__B1 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1212_A wire1210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16827__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20183_ wire877/X _19774_/B _20183_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_235_1449 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32169_ _32169_/Q _32225_/CLK _32169_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_230_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18022__S _18048_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_3627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26354__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27335__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28258__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3651 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24991_ _25681_/B1 _24990_/X _25017_/A2 _31139_/Q _31139_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_269_4396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_1894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23573__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27839__A1 _25804_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29503__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26730_ _26730_/Y _31780_/Q _26754_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_6_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19642__A _23876_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23942_ _24079_/B1 _28683_/Q _23942_/X _19646_/B _28491_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__20387__A1 wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25363__B _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19241__A2 _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17788__C1 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_724 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25025__C_N _24051_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16055__A2 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26661_ VGND VPWR _26660_/Y _26684_/A2 _26637_/B _26661_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_265_2825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23873_ _30852_/D _24310_/B _23873_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_246_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_5562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_3971 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15263__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_3813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_5524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28400_ _28400_/Q _30392_/CLK _28400_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_165_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31606__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15802__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_806 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25612_ VGND VPWR _25613_/C _25571_/C _25578_/X _25632_/B _31374_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_22824_ _22831_/D _22822_/X _22824_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_92_2419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_817 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20139__A1 _28714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29380_ _29380_/Q _30474_/CLK _29380_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_246_2257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26592_ _26595_/B _26592_/X _26591_/Y _26616_/B2 wire3461/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA_828 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_5_21_0_core_clk_A clkbuf_5_21_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_839 wire4016/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_183_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29653__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17004__A1 hold461/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27067__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28331_ _28331_/Q _30446_/CLK _28331_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__21887__A1 _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_282_core_clk _30479_/CLK clkbuf_opt_23_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_109_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25543_ hold502/A _31350_/Q _25543_/Y _25546_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_165_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22755_ _30097_/Q wire1866/A _30097_/D _22753_/Y _22754_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21887__B2 _17110_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3896_A wire3897/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25810__C _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16358__A3 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26275__B1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17555__A2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_440 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26814__A2 _26835_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21706_ _29352_/Q _29351_/Q _21706_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 Xclkbuf_leaf_211_core_clk _31547_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_28262_ _28262_/Q _30758_/CLK _28262_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_3931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25474_ _25474_/X _31315_/Q _31317_/Q _31316_/Q _25470_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__23611__B _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22686_ VPWR VGND _22686_/X _22686_/B _22686_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__23628__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20727__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31756__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27213_ VGND VPWR _25772_/D _32099_/Q _27276_/C _27213_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_224_1854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_2599 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24425_ _24423_/Y _24437_/B _31012_/D _24424_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_177_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_5623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21637_ _21687_/B _21637_/B _21637_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_28193_ _28193_/Q _32318_/CLK _28193_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_240_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_33_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_1_0_2_core_clk clkbuf_1_0_3_core_clk/A clkbuf_1_0_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA_fanout1821_A _18252_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26027__B1 _31527_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18504__A1 wire3903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17307__A2 wire3581/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_4007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19847__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15318__A1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27144_ VGND VPWR _27153_/S _27687_/A1 _32050_/Q _32050_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_120_2542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20673__D _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24356_ _32025_/Q _26772_/A _24356_/X _31993_/Q wire1351/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20311__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16515__B1 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21568_ _21567_/X _21559_/A _21564_/A _21569_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_121_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22942__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17858__A3 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20028__A _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_2965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23307_ _23307_/Y _29807_/Q _23307_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__15869__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26789__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20519_ _29453_/D _27233_/A _29452_/D _20519_/X _29454_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_27075_ VGND VPWR _32015_/D wire772/A _27074_/X _26793_/B _27075_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__23767__C_N _26652_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input180_A mprj_dat_i[15] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30780__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24287_ _24284_/D _30937_/D _26376_/A1 _24284_/X _31589_/Q wire3464/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 XFILLER_159_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2195_A _19584_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24053__A2 _24050_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14026__A _28471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21499_ _21499_/C _21674_/B _21501_/C _21499_/D _21599_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_218_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_2375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1520 VPWR VGND wire1519/A wire1521/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25581__A_N _25629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29033__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18268__A0 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24442__B _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16978__D_N _29982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14040_ _28457_/Q _14040_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26026_ _14396_/Y _26025_/X _31526_/Q _17877_/X _31526_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_8_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_3105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23238_ _23238_/B _23238_/Y _30440_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_172_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14541__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20462__S _20473_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_1953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23800__A2 wire1807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22243__A _22243_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16279__C1 wire1450/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15556__S _15702_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13865__A _13865_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21811__A1 _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_5416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_2340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23169_ _30181_/D _23185_/B _23168_/X _30181_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_133_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1597 VPWR VGND _23849_/B _23873_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_42_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3202_A _21486_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30010__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31136__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29671__D _29671_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input41_A irq[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16294__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17491__A1 _17576_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27245__S _27264_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_4884 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17491__B2 _31707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15991_ wire985/X _15991_/X _15990_/X _16249_/S _32047_/Q _16150_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_27977_ _27977_/Q _29788_/CLK _27977_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_235_1994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29183__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3713 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_3432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23564__A1 _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22367__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31706__D _31706_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17730_ VGND VPWR _17730_/S _17729_/X _17717_/X _17730_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29716_ _29716_/Q _30428_/CLK _29716_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_213_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14942_ _15515_/A2 _14942_/X _14941_/X _15356_/A2 _29528_/Q _15355_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_251_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26928_ hold257/A wire1573/A _31952_/D wire2384/X wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_92_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_4147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20378__A1 _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19232__A2 _19226_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2627_A _14213_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22389__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17779__C1 _17485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16046__A2 wire985/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17661_ VGND VPWR _17777_/B _17614_/X _17660_/X _17662_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29647_ _29647_/Q _32291_/CLK _29647_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_2081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14873_ _16798_/A2 _14873_/X _30779_/Q wire1488/X _14102_/Y _15623_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_26859_ _26859_/C1 _26858_/Y wire749/X _31879_/Q _31879_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30160__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_757 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31286__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15254__B1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19400_ VGND VPWR _19403_/S wire1826/X _28416_/Q _28416_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19702__D _19702_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17794__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16612_ wire995/X _16612_/X _16611_/X wire963/X _29027_/Q _16944_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_5_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32531__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13824_ _31053_/Q _17452_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_127_2707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17592_ VGND VPWR _26470_/B _31630_/Q _17591_/X _17592_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_29578_ _29578_/Q _32365_/CLK _29578_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_2477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18728__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_2942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19331_ _19330_/X _19375_/B1 _19375_/A2 _28337_/Q _19331_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_166_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16543_ VGND VPWR _16929_/S _28793_/Q _28825_/Q _16543_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28529_ _28529_/Q _31470_/CLK _28529_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_38_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13755_ hold136/A _13755_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_53_3649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_2341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17521__A_N _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32537__D _32537_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_1093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_2975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17546__A2 _26441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21342__A3 _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_4191 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_1910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31540_ _31540_/Q _31689_/CLK _31540_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19262_ _19262_/X _19346_/D1 _28299_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_277_3408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16474_ _16938_/A2 wire3285/X _29087_/Q _16474_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_12_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16754__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20637__S _20639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_4221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_4175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24542__C_N _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output497_A wire3511/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23013__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18213_ _18213_/Y _18278_/A _18215_/D _22338_/A _18212_/Y _18163_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_259_3831 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15425_ VGND VPWR _15639_/S _29541_/Q _29575_/Q _15425_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22827__B1 _22846_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19193_ VGND VPWR _19193_/X _19306_/B _19047_/S _28040_/Q _19192_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_220_2931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31471_ VGND VPWR _31471_/D _31522_/CLK _31471_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_12_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19299__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18107__S _18110_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24292__A2 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21725__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18144_ VGND VPWR _18144_/S wire3836/X _28072_/Q _28072_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30422_ VGND VPWR _30422_/D _31959_/CLK _30422_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15309__A1 wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29846__D _29846_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18334__C _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15356_ VGND VPWR _15356_/X _15356_/A2 _15509_/A1 _15353_/X _15355_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20302__A1 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14780__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_5439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output664_A wire2727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2431 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_A0[2] wire2411/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14307_ _29984_/Q _22444_/B _29985_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_4 XFILLER_68_3870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17946__S _17946_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30353_ _30353_/Q _32557_/CLK _30353_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18075_ VGND VPWR _18077_/S wire3843/X _28005_/Q _28005_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15287_ _16798_/A2 _15620_/A1 _29258_/Q _15287_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_7_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25448__B _25507_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25241__A1 _17389_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold207 hold207/A hold207/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_236_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25241__B2 _31237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold218 hold218/A hold218/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_236_2437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_86_core_clk _31563_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_271_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17026_ VPWR VGND _21345_/C _21459_/D _29879_/Q VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_173_2727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold229 hold229/A hold229/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_3742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22055__A1 hold486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14238_ _14238_/X _14237_/X _29977_/Q _24446_/B _24446_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_171_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30284_ _30284_/Q _30445_/CLK _30284_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19446__B _28444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24595__A3 _29974_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_3609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20066__B1 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_15_core_clk _29644_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_49_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28400__CLK _30392_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32023_ _32023_/Q _32039_/CLK _32023_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29526__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14169_ _14300_/B _14300_/A hold102/X _14169_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_110_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27533__A3 _32142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26336__A4 _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16285__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32061__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27155__S _27155_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26741__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24201__C1 _24200_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18977_ _18976_/X _19318_/B1 _19201_/A2 _28157_/Q _18977_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_80_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14296__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18259__D_N _18254_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22358__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23555__A1 _30476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31629__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17928_ VGND VPWR _17947_/S _29850_/Q _27866_/Q _27866_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30520__D input65/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19223__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1727_A _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22299__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28550__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29676__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18431__A0 wire3816/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17234__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire713_A wire714/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1280 VPWR VGND wire1282/A _25020_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_239_595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_2857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17234__B2 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_97_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17859_ _31736_/Q _17870_/A2 _17859_/X _31735_/Q _17503_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__23165__D_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23415__C _23415_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_5210 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_705 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_5221 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_4709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20870_ VGND VPWR _30233_/Q _29395_/Q _20870_/S _20870_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XANTENNA__14599__A2 wire1171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15796__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30653__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20120__B _20120_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20618__B_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31779__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21869__A1 _21641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19654__D_N _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31807_ hold332/A _31874_/CLK _31807_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19529_ _26861_/C1 _19523_/Y _19632_/A _28453_/Q _28453_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_277_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27825__A_N _25801_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18734__A1 _18733_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2936_A _20295_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_5022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_4018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19401__S _19418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24527__B _31221_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22540_ VGND VPWR _22551_/S _29829_/Q _30040_/Q _30040_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3010_A _18418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15548__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31738_ _31738_/Q _31738_/CLK _31738_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23431__B _23432_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_2662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16745__B1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20547__S _20548_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24807__A1 _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3108_A _17913_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22328__A _22328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_4665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25686__D_N _25635_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31009__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24246__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22471_ _22513_/C1 _22470_/X _22513_/A2 _17071_/X _29996_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_277_3942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_30_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23150__C _23150_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31669_ _31669_/Q _32291_/CLK _31669_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14220__A1 _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26009__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18017__S _18017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24283__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14220__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1464 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_3634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24210_ _24210_/Y _24210_/A _24210_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XANTENNA__29056__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26742__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18498__A0 _28271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19829__A4 _19789_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5063 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21422_ _21424_/D _21422_/A _21623_/A _21422_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XFILLER_195_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23491__A0 _23491_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22294__A1 _29880_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25190_ _31223_/D _25186_/X _25189_/Y _31223_/Q _25187_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_241_1486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14771__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19695__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24543__A _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_2048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_4032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24141_ _24141_/X _20673_/D _30641_/Q _30705_/Q _19926_/B VGND VPWR wire1251/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__20844__A2 _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21353_ _21752_/A _21353_/B _21353_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_254_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24035__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25232__A1 hold102/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18541__A _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30033__CLK _30403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31159__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27276__D _27280_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20304_ VGND VPWR _20315_/S _27242_/A0 _28845_/Q _28845_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_2537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_2999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24072_ wire1810/X _24071_/X _28663_/Q _24165_/A3 _24072_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_63_3233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14523__A2 _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15720__A1 _15760_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21284_ VPWR VGND _21285_/B _22620_/B _22620_/A _22076_/D _22620_/D VGND VPWR NF_sky130_fd_sc_hd__and4b_2 XFILLER_137_2335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20282__S _20282_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25783__A2 _25780_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32404__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24440__C1 _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22063__A _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28080__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_2840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22597__A2 _30359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23023_ VGND VPWR _25733_/C _30152_/Q _23022_/X _30152_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27900_ _27900_/Q _30385_/CLK _27900_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19998__B1 _20028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3705 VPWR VGND wire3705/X wire3706/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_20235_ VGND VPWR _20257_/S _28778_/Q _27684_/A1 _28778_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_1393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_1273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_4136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_2600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3644_A _30667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28880_ _28880_/Q _32427_/CLK _28880_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_284_5326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3727 wire3728/X _17013_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_63_3288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3003 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19462__A2 _19467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_5457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_4158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_4546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_70 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23593__S _23593_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15079__A3 wire1702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27831_ _27832_/B _32538_/Q _32539_/Q _32537_/Q _25801_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__25374__A _31278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25535__A2 _31346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20166_ _26148_/A _20165_/X _20128_/X _28727_/Q _28727_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_115_2655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30183__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25805__C _25806_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22349__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23546__A1 _30467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_5050 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_5001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_208_5121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19372__A _28240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_5_1_core_clk clkbuf_opt_5_2_core_clk/A clkbuf_opt_5_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_252_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27762_ VGND VPWR _27765_/S _19937_/B _32489_/Q _32489_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__32554__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24974_ _25065_/A wire1283/X _24974_/X _25039_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__19214__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2639 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20097_ _26859_/C1 _20096_/Y _20122_/A _28694_/Q _28694_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_hold273_A hold273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19803__C _19803_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16028__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_3068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18422__A0 wire3845/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17225__A1 _29904_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29501_ VGND VPWR _29501_/D _30139_/CLK hold374/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_273_830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26713_ _26712_/Y _27003_/B1 _31809_/Q hold431/A _31809_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_57_3015 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17225__B2 _21427_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23925_ _31127_/Q _23925_/X wire1633/X _24192_/A2 _28713_/Q wire1283/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_2 XFILLER_150_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27693_ VGND VPWR _27710_/S _27693_/A1 _32427_/Q _32427_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15236__B1 wire1066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_243_5078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_265_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_4180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_1633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29432_ _29432_/Q _30386_/CLK _29432_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25838__A3 _25836_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26644_ VGND VPWR _26643_/Y _26684_/A2 _26678_/B _26644_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_96_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_603 _24118_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23856_ _23856_/X _23859_/A _31863_/Q _26772_/A _31895_/Q _19527_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__20780__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_614 wire2072/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20030__B _20096_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_625 _26809_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_636 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22807_ VGND VPWR _22807_/S _30102_/Q _22806_/X _30102_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_647 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29363_ _29363_/Q _30279_/CLK _29363_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_74_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_2437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_148_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26575_ _26575_/X _31766_/Q _31768_/Q hold196/A _23744_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_658 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23787_ VGND VPWR _23787_/X _31872_/Q _23805_/A _23805_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16935__S _16948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25540__C _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2612 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_669 wire2696/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20999_ VGND VPWR _20999_/S _29464_/Q _27688_/A1 _29464_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_204_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18725__A1 _28372_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19922__B1 _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24437__B _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28314_ _28314_/Q _30462_/CLK _28314_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2110_A wire2110/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25526_ _31342_/D _31342_/Q _25525_/Y _28445_/Q _19447_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_22738_ _22740_/A _22735_/Y _22737_/A _22747_/C _22736_/Y _22924_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XANTENNA__23341__B _30219_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29294_ _29294_/Q _32316_/CLK _29294_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_3097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26799__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20457__S _20458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2208_A _19567_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_3963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16200__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_1930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_2626 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28245_ _28245_/Q _30911_/CLK _28245_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25457_ _31308_/Q _25456_/Y _31308_/D _25454_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_161_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22669_ _22671_/A _22669_/A _22669_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__14211__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27748__B _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_104_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15210_ _15209_/X _15356_/A2 _15515_/A2 _28958_/Q _15210_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26652__B _26652_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_4197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24408_ VGND VPWR _31006_/D _24404_/X _24418_/D _31006_/Q _24437_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22285__A1 _29343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23482__A0 hold225/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16190_ _16180_/X _29663_/D _16653_/B1 _16189_/X _16171_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 X_28176_ _28176_/Q _30279_/CLK _28176_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22285__B2 _30285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input89_A la_input[24] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22672__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25388_ _25402_/D _31279_/Q _31281_/Q _31280_/Q _25388_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_100_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_1548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3778 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_5486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15141_ _15140_/X _15139_/X wire1214/A _15141_/Y _15277_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 Xclkbuf_3_0_0_core_clk clkbuf_3_0_1_core_clk/A clkbuf_3_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_159_3283 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27127_ _31492_/Q _31484_/Q _27127_/X _31491_/Q _25941_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_279_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29549__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24339_ _24338_/X _24357_/B1 wire1672/X _24353_/A1 _30972_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19547__A _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17161__A0 _17160_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2773 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24026__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25268__B _31257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25223__A1 _29852_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_2908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25223__B2 hold119/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3417_A wire3428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22037__A1 _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32084__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15072_ _16721_/A2 _15560_/A1 _28882_/Q _15072_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27058_ _27058_/C _27122_/B _27058_/X _27058_/B _27053_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA__19438__C1 _31340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_155_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18900_ _18900_/X _28058_/Q _19109_/S wire1984/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19989__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30526__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14023_ _28474_/Q _14023_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_133_4168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26009_ VGND VPWR _14177_/A _19551_/A _26014_/A2 _26009_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_85_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_250_3647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18401__D_N _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19880_ VGND VPWR _19563_/X _26838_/A4 _24046_/B1 _19880_/X _26139_/A _19680_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_wire2744_A wire2744/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20599__A1 _27692_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19453__A2 _31342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_4812 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_1002 _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28573__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29699__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1013 wire2869/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16267__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17464__A1 _31619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18831_ _19377_/B _27895_/Q _18830_/X _18831_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17464__B2 _31683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1024 wire4161/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25526__A2 _31342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_1035 wire4110/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18597__S _18598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output245_A _14027_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1046 _23932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3732 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3786_A hold403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_1057 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_3180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18762_ wire1994/X _28275_/Q wire1950/X _18762_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_7_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_40_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15974_ VGND VPWR _16443_/S _29589_/Q _29621_/Q _15974_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_249_882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_5123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_2790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19713__C _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_2187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30676__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22420__B _29975_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_1666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18413__A0 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17216__A1 _29903_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17713_ _17874_/A2 _31716_/Q _17712_/X _17713_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17216__B2 wire3926/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27703__S _27707_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14925_ VGND VPWR wire1172/X _28413_/Q _15235_/A1 _14925_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_146_3806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19610__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17514__B _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31921__CLK _31921_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output412_A _13883_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18693_ _29812_/Q _29813_/Q _30331_/Q _29811_/Q _18693_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_30971_ _30971_/Q _32063_/CLK _30971_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15227__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20220__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold90 hk_dat_i[3] hold90/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_4223 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27848__A_N _25807_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17767__A2 _17673_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26487__B1 _26486_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22760__A2 _21413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21563__A3 _21561_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26827__B _26892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_133_core_clk _32063_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_127_3227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17644_ _17873_/B1 _31714_/Q _17643_/X _17644_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_144_4242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_92_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15778__A1 _29207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14856_ VGND VPWR _15627_/S _29310_/Q _28748_/Q _14856_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1043_A wire1043/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_3721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25731__B _25731_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4125_A _28556_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20771__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_5574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_4226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_2285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13807_ _31139_/Q _13807_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_166_2575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length2277_A _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17575_ _17576_/C _17574_/X _17573_/X _17777_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_229_1562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_5320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14787_ _14776_/X _29138_/D wire1074/A _14786_/X _14767_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_18_2821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14450__A1 _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26239__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18716__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14450__B2 _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22512__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19314_ _19313_/X _22088_/B1 _19358_/A2 _28173_/Q _19314_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__29079__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17530__A _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1210_A wire1210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16526_ wire1010/A wire1482/A _29538_/Q _16526_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_2441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13738_ _31757_/Q _17514_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_32572_ _32572_/Q _32572_/CLK hold252/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16727__B1 _16727_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21720__B1 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31523_ _31523_/Q _32010_/CLK _31523_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_48_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19245_ _19244_/X _19278_/S _19298_/A2 _28202_/Q _19245_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_16_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16457_ VGND VPWR _16948_/S _29473_/Q _32127_/Q _16457_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25998__C1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14202__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_84_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24265__A2 wire1668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2252_A wire2255/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30056__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2819 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15408_ _16959_/A2 wire3302/X _29091_/Q _15408_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22276__A1 _29839_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31454_ _31454_/Q _32416_/CLK _31454_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19176_ _19175_/X _19176_/B1 _19179_/A2 _28167_/Q _19176_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23237__A1_N _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14753__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19677__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16388_ VGND VPWR _16388_/X _16837_/S _16838_/A1 _28097_/Q _16387_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22582__S _22586_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32427__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_5285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_44_5529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26102__A_N _26112_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18127_ VGND VPWR _18144_/S wire3891/X _28055_/Q _28055_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30405_ _30405_/Q _30455_/CLK _30405_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_15339_ VGND VPWR _15639_/S _30907_/Q _29185_/Q _15339_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_5269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_4693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31385_ VGND VPWR _31385_/D _32225_/CLK hold143/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__25214__A1 _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24017__A2 _24069_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26411__B1 _31690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21198__S _21205_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22028__A1 _21710_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18058_ VGND VPWR _18079_/S wire3903/X _27988_/Q _27988_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30336_ VGND VPWR _30336_/D _32379_/CLK _30336_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__23225__B1 _23236_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28916__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_4568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24568__A3 _31212_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2666 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17009_ _21459_/D _29877_/Q _21360_/A _14334_/B _29722_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_211_4822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31451__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30267_ _30267_/Q _30758_/CLK _30267_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21787__A0 _17035_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32577__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18247__A3 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire830_A wire830/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20020_ VGND VPWR hold185/A _19792_/A wire850/X _20020_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_32006_ _32006_/Q _32431_/CLK _32006_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_116_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_1457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25194__A _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23707__A _23707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25517__A2 _19429_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14269__A1 wire3493/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30198_ _30198_/Q _30198_/CLK _30198_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_23_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15466__B1 _15646_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27940__CLK _30431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_988 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_3903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3302 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_2508 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18404__A0 wire3909/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27613__S _27620_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_3665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27124__D1 _25836_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17424__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21971_ VGND VPWR _21955_/B _21968_/Y _21970_/X _21971_/X _21967_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__23145__C _29726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20211__A0 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15218__B1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27840__C _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_863 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17758__A2 _17503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23710_ _31502_/Q _25884_/B _23709_/X _31467_/Q _23711_/A _19715_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_110_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20922_ hold420/A _18086_/S _29387_/D _29387_/Q _20948_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_222_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15769__A1 _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24690_ _31471_/Q _24691_/B _31472_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_23_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25641__B _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20762__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24489__C1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16966__B1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_4697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25150__B1 _25148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15233__A3 wire1506/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_26 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23442__A hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23641_ VGND VPWR _23668_/S _27234_/A0 _30771_/Q _30771_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_149_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20853_ VGND VPWR _23228_/S hold480/A _20852_/X _29355_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_37 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18168__C1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_48 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18707__A1 wire2275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18536__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4749 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31081__D _31081_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23161__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1185_A wire1189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_59 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22503__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19904__B1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21937__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26360_ VGND VPWR _26949_/B _24284_/D wire2203/X _26360_/X _27007_/A _26376_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 X_23572_ VGND VPWR _23573_/S _27143_/A1 _30492_/Q _30492_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_36_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20514__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20784_ VGND VPWR _20784_/S _27261_/A0 _29298_/Q _29298_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_238_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20277__S _20294_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14992__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_3035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18183__A2 _18244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25311_ _25413_/A _25308_/X _25305_/C _25322_/C _25311_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_22523_ VGND VPWR _23525_/S _29812_/Q hold474/A _30023_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28446__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26291_ VGND VPWR _14182_/Y _19792_/A _26331_/B _26291_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__16194__A1 _29563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3594_A wire3595/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24256__A2 _24255_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17391__B1 _17391_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1352_A wire1355/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_14_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28030_ _28030_/Q _30451_/CLK _28030_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire918 VPWR VGND wire918/X wire918/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_273_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23588__S _23588_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25242_ _26236_/A _25241_/X _25264_/A2 hold136/A _31245_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__22267__A1 _18664_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22454_ VGND VPWR _22448_/C _18661_/A _22484_/A2 _22454_/X _29988_/Q _16970_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__14744__A2 wire1750/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22267__B2 _30114_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_5325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24273__A _24273_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold119_A hold119/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3918 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_5456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_3306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21405_ _21679_/D _30347_/Q _21462_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__30549__CLK _32017_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25173_ _25180_/D _25173_/B _31217_/D _25173_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_69_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16490__S _16806_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22385_ _29942_/D _22385_/B1 hold501/X hold470/A _22356_/B VGND VPWR _22384_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24008__A2 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25205__A1 _29844_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19683__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2924 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3859_A _29857_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25205__B2 _31359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28596__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22019__A1 _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24124_ wire1810/X _24123_/X _24124_/A1 _24892_/B _24124_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_85_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21336_ _21378_/B _21651_/C _21336_/C _21336_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 XANTENNA__18891__B1 _18890_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4203 VPWR VGND wire4203/X hold68/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17694__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25756__A2 _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29981_ _29981_/Q _30453_/CLK _29981_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3407 _25745_/A _26153_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_43_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2064 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29841__CLK _32294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3418 _27051_/A _26544_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_232_3322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20189__C_N _24953_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21227__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19517__D _23618_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_91 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24964__B1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28932_ _28932_/Q _32428_/CLK _28932_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24055_ _30593_/Q _24204_/A2 _24055_/X wire3647/X _23805_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XFILLER_271_3393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3502 VPWR VGND wire3502/X _31191_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_28_3183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21267_ VGND VPWR _23532_/S _29729_/Q _30445_/Q _29729_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_3180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_1644 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_1070 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19435__A2 _19432_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3513 VPWR VGND wire3513/X _31098_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_133_2007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5243 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold488_A hold488/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30699__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_2681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23006_ VGND VPWR _31396_/Q _23005_/X _23002_/X _23006_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17446__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20218_ VGND VPWR _20218_/S _28763_/Q _27701_/A1 _28763_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_173_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2801 VPWR VGND wire2801/X _27270_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_24_3058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_150_2310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17446__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26705__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28863_ _28863_/Q _32437_/CLK _28863_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_134_3798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21873__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20740__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31944__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21198_ VGND VPWR _21205_/S _29640_/Q _27703_/A1 _29640_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24212__S _24220_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5167 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2823 VPWR VGND _23666_/S _23669_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_191_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3568 VPWR VGND wire3568/X _30876_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20450__A0 _21203_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1986_A wire1997/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3579 VPWR VGND wire3579/X _30865_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_60_3984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27814_ _32531_/Q _27813_/Y _32530_/Q _25796_/X _32531_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xwire2845 _22067_/B _21709_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_210_4398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2060_A wire2060/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20149_ VGND VPWR _19567_/B _19584_/A _20162_/A2 _20149_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_227_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29991__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input143_A la_input[73] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2856 VPWR VGND _21194_/S _21201_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26181__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28794_ _28794_/Q _32359_/CLK _28794_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_245_4417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2158_A _19768_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19199__A1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_286_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24192__A1 _31121_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2889 VPWR VGND _20646_/S _20638_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20679__C _20680_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24192__B2 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15472__A3 _15546_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27745_ VGND VPWR _27747_/S _32474_/Q _25033_/B _32474_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24957_ VGND VPWR _24957_/X _24957_/B _25022_/A _25022_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__20202__A0 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15209__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14680__A1 _15307_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18946__A1 _19310_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17749__A2 _17596_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1415 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14710_ _14710_/X _29522_/Q wire1104/X _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_23908_ wire724/A _23905_/X _24199_/B1 _23902_/X _23907_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_283_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27676_ VGND VPWR _27677_/S _32411_/Q wire2222/A _32411_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2325_A wire2326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15690_ VGND VPWR _15702_/S _29237_/Q _29301_/Q _15690_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20753__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21950__A0 _17148_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_400 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24888_ _24888_/C _24888_/B _24888_/Y _24888_/D _26542_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__29221__CLK _31586_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_2197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_411 wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29415_ _29415_/Q _30156_/CLK _29415_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_76_2767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_422 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15224__A3 wire1493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16421__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14641_ VGND VPWR _15275_/S _29586_/Q _29618_/Q _14641_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_204_3402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26627_ _26627_/X _31779_/Q _31781_/Q _31780_/Q _26619_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_433 wire725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14968__C1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23839_ wire1812/A _23838_/X _31822_/Q wire1624/X _23840_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_2_1485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_444 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14432__A1 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_455 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_144_2136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_466 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30079__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_5203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17360_ _17360_/A _27006_/A _17360_/X _17360_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29346_ _29346_/Q _30446_/CLK _29346_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_477 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14572_ _14570_/Y _14571_/Y _14572_/Y _14569_/Y _15631_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XANTENNA__20505__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26558_ _26182_/A _26557_/Y _26543_/B _31762_/Q _31762_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15789__B _22307_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_488 wire711/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14983__A2 _15761_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31324__CLK _32560_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21702__B1 _21700_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_499 wire706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19371__A1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16311_ wire3243/X _16910_/A2 _16311_/X _16947_/A2 _30785_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_25509_ _25508_/X _31334_/Q _31334_/D _25510_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_193_4803 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_2355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16185__A1 wire1485/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17291_ _17290_/Y _30826_/Q _17291_/C _30809_/Q _17291_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 X_29277_ _29277_/Q _32430_/CLK _29277_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19910__A3 _20110_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2694_A _14166_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26489_ _26509_/C _26488_/A _26539_/A _26489_/X _26489_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__17382__B1 wire2026/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20910__D1 _20848_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25444__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17500__D _26441_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19030_ _28128_/Q _19030_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__14196__B1 hold133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22258__A1 _29343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23498__S _23522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16242_ _16815_/A2 _16242_/X _16241_/X _16838_/A1 _30497_/Q _16805_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_13_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28228_ _28228_/Q _30432_/CLK _28228_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_3258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14735__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22118__D _22119_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19659__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28939__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25995__A2 _19551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20269__A0 _28811_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15932__B2 _15931_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_2256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_3233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21600__A _21603_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_19_1_core_clk clkbuf_5_19_1_core_clk/X clkbuf_5_19_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_16173_ _16173_/X _28879_/Q _16818_/A2 _16722_/B2 _16722_/C1 _16172_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_28159_ _28159_/Q _30276_/CLK _28159_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2861_A _21173_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31474__CLK _31522_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18181__A _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19674__A2 _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19708__C _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17453__C_N _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15124_ _15119_/X _15115_/X wire1083/X _15123_/X _15124_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_139_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31170_ _31170_/Q _32529_/CLK _31170_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_68_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_4877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18882__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26944__B2 wire2740/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14499__B2 _22078_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15696__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2123 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3715 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27963__CLK _30449_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30121_ _30121_/Q _30382_/CLK _30121_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_5310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16893__C1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19932_ _25776_/C _19931_/X _19968_/A2 _28614_/Q _28614_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_15055_ VGND VPWR _15055_/X _15054_/X _15053_/X _15561_/C1 _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_174_2877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3857 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4075_A _28657_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3941 VPWR VGND _22586_/S _22580_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_6_3929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1180 VPWR VGND _15709_/A3 _15707_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_61_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_1755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_250_2721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14006_ _28491_/Q _14006_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__18634__A0 _28347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17437__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21746__S _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30052_ _30052_/Q _30285_/CLK _30052_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22430__A1 _29690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17437__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_385_core_clk _30667_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_211_3439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19863_ _19862_/X _28581_/Q _28581_/D _19901_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__19977__A3 wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20650__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19724__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output627_A _14305_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20441__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_4376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_5349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18814_ _18814_/X wire2270/X _27926_/Q wire2281/X wire2582/X wire3766/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_0_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_314_core_clk _28402_/CLK clkbuf_5_20_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_283_402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_1330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2964 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15999__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26172__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28319__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2000_A _18206_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19794_ _25512_/A _19793_/X _19852_/A2 _28549_/Q _28549_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_7_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_111_3562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22150__B _22150_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24183__A1 _28514_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27433__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24183__B2 _28706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16660__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15463__A3 _15546_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18745_ _18745_/X _18742_/X wire1916/X _18744_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_280_5565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15957_ VGND VPWR _15957_/S _15956_/X _15955_/X _15957_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_7_1385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_1_1_5_core_clk clkbuf_1_1_6_core_clk/A clkbuf_1_1_5_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__14671__A1 wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput180 VPWR VGND input180/X mprj_dat_i[15] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__22194__B1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18937__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_3666 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23391__C1 _22284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput191 mprj_dat_i[25] input191/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_168_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19740__A _25043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14908_ _14908_/X _32118_/Q wire1189/X wire1506/X wire1104/A _14907_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__23930__B2 _30553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16948__A0 _30802_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27121__A1 _32038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30954_ _30954_/Q _31679_/CLK _30954_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18676_ _18675_/X _18674_/Y _21030_/S _18676_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_75_2211 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20744__A1 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15888_ VGND VPWR _15888_/X _16040_/A2 wire1052/X _15887_/X _15886_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_266_1537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22577__S _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_2965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2561_A _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16412__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17627_ _17777_/B _17662_/A _17627_/X _17627_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__14959__C1 _28879_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28469__CLK _31860_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2659_A wire2660/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14839_ _15621_/A2 _14839_/X _14838_/X _15628_/B1 _28088_/Q _15628_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_222_4247 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14423__A1 _30452_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30885_ _30885_/Q _31536_/CLK wire707/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_162_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17898__C _24388_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23143__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21919__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_11_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17558_ _17558_/X _31711_/Q _17783_/B2 _17586_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__27669__A _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_1103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold97_A hold97/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_2823 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3355 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18165__A2 wire3174/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19362__A1 wire3766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_5172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_3298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2826_A _23661_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16509_ VGND VPWR _16509_/X _16825_/S wire1048/X _16508_/X _16507_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16176__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32555_ VGND VPWR hold419/X _32578_/CLK _32555_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_239_4733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_14_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18790__S _18790_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17489_ _17488_/A _17596_/D _17488_/B _17576_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_2 XANTENNA__17373__B1 _17248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25435__A1 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18570__C1 _23238_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31817__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26632__B1 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24805__B _24805_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14187__B1 hold116/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22249__A1 _29836_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19228_ _19227_/X _19047_/S _19358_/A2 _27977_/Q _19228_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31506_ VGND VPWR _31506_/D _32351_/CLK _31506_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_203_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_101_2507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32486_ _32486_/Q _32543_/CLK _32486_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20825__S _20837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25986__A2 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24643__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29864__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2809 VPWR VGND _27165_/S _27167_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_192_4346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_30_core_clk _32536_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__23201__S _23201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23997__A1 _28528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21457__C1 wire3800/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31437_ _31437_/Q _32394_/CLK _31437_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23997__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19159_ VGND VPWR _19158_/X _19157_/X _19159_/S _19159_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_277_1633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17125__B1 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_3011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19665__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_3656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17676__A1 _17596_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16479__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_118_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22170_ _22163_/D _29822_/Q _29823_/Q _29825_/Q _29824_/Q _22170_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a41oi_2 XANTENNA__27608__S _27616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18873__B1 _18872_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17676__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26396__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24243__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31368_ _31368_/Q _31369_/CLK _31368_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30841__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31967__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26935__B2 wire2705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20126__A _20126_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput610 _28646_/Q la_output[97] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_272_3680 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_66_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15687__B1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput621 _24380_/C mprj_adr_o[17] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21121_ VGND VPWR _21134_/S _27247_/A0 _29565_/Q _29565_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_151_4054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput632 _17897_/B mprj_adr_o[28] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30319_ _30319_/Q _30319_/CLK _30319_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_173_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput643 _19512_/B mprj_adr_o[9] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_173_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31299_ _31299_/Q _31754_/CLK _31299_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_170_3954 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput654 _14166_/X mprj_dat_o[18] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_1341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24410__A2 _14388_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24540__B _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput665 wire2393/X mprj_dat_o[28] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17428__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput676 wire2359/X mprj_dat_o[9] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_99_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21052_ _29510_/D _29510_/Q _21051_/Y _22135_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__21224__A2 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22421__A1 _14367_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput687 wire3395/X rstb_l_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20560__S _20572_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2108 wire2109/X wire2108/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_3258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19634__B _19634_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput698 _17915_/X uart_enabled VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_285_5476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2119 wire2120/X wire2119/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20432__A0 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15439__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26699__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2652 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31076__D _31076_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20003_ _27077_/C1 _20002_/Y _20028_/A _20003_/A1 _28648_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_281_5329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13963__A _28534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_143_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16977__C _23199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_785 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_4141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30991__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25860_ _25869_/D _31451_/Q _31449_/Q _31450_/Q _25860_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__18030__S _18037_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27360__A1 _32214_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_796 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1100_A fanout1103/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_413 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29244__CLK _31479_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24174__A1 _28545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24811_ VGND VPWR _24811_/X _31051_/Q _31052_/Q _31050_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__27343__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1494_A wire1493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24174__B2 _23879_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25371__B1 _25266_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25652__A _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25791_ VGND VPWR _25793_/S _31426_/Q hold226/X hold227/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25910__A2 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14662__A1 wire1202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_60_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23921__A1 wire3514/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22724__A2 _21428_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19050__A0 wire4158/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27530_ VGND VPWR _31381_/Q _27529_/X _27528_/X _27530_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_5203 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_3894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19650__A _26775_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23921__B2 wire1317/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24742_ VPWR VGND _24786_/C _24742_/B _31453_/Q VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_145_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21954_ _21955_/A _21942_/S _21951_/Y _21953_/X _21952_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_223_93 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30221__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20735__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31347__CLK _32421_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21932__B1 _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16993__B _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21107__D _29451_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17600__A1 _31631_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_855 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20905_ VGND VPWR _23477_/S hold376/X _29381_/Q _29381_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27461_ VGND VPWR _27475_/S _32287_/Q _32288_/Q _27461_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17600__B2 wire3124/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1759_A _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24673_ VGND VPWR _24673_/B _24673_/Y _31446_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_205_4467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29394__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21885_ _21885_/Y _21946_/A _21884_/X wire3146/X _21955_/B _21882_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a221oi_1 XFILLER_222_5482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14414__A1 _23360_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23603__C _24881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24477__A2 wire798/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14414__B2 _29727_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15611__B1 _15611_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29200_ VGND VPWR wire835/X _32349_/CLK _29200_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_225_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26412_ _26412_/Y _31690_/Q _26420_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_262_1924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_2789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23624_ _23624_/Y _31075_/Q wire1353/X _24856_/C wire1292/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_1 XFILLER_19_2459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22488__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20836_ _20836_/B _20836_/X _20836_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__21404__B _21486_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27392_ VGND VPWR _27394_/S _32242_/Q _27276_/X _32242_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_3766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23685__B1 wire1288/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold236_A hold236/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19353__A1 _28338_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29131_ _29131_/Q _32569_/CLK _29131_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26343_ wire779/X _31659_/Q _31659_/D wire781/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_218_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_4219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30371__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16167__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23555_ VGND VPWR _23560_/S _30476_/Q hold260/X _30476_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20767_ VGND VPWR _20780_/S _27689_/A1 _29281_/Q _29281_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31497__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3976_A wire3976/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2907 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17364__B1 hold40/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1734_A _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18561__C1 _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26623__B1 _31780_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16706__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire704 VPWR VGND wire704/X wire704/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14178__B1 _31237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22506_ VGND VPWR _22512_/A3 _22512_/A4 _22510_/A2 _22506_/X _30014_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 X_29062_ _29062_/Q _32429_/CLK _29062_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26274_ _26273_/Y _26182_/A _31625_/Q _26267_/B _31625_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire715 VPWR VGND wire715/X wire716/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14717__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15914__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23437__B1 wire3997/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold403_A hold403/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23486_ VGND VPWR _23514_/S _23485_/X _31947_/Q _30429_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_5510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20735__S _20747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25977__A2 _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire726 VPWR VGND wire726/X wire726/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20698_ VGND VPWR _20714_/S _29214_/Q _27686_/A1 _29214_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19105__A1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_192_5570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire737 VPWR VGND wire737/X wire737/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_69_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28013_ _28013_/Q _30030_/CLK _28013_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23988__A1 _31133_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3042_A _18145_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21420__A _21853_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25225_ _25225_/X _25263_/B1 _29853_/D hold96/A _25263_/A2 VGND VPWR _25263_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_221_1665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15829__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22437_ VGND VPWR _22437_/X _22438_/B hold328/A _22445_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xwire759 VPWR VGND wire759/X wire759/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_234_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27179__A1 hold242/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17116__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14733__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15390__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21999__A0 _21672_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19528__C _26763_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_3759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29944__D _29944_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17667__A1 _31716_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25156_ _24567_/D _24567_/C _31213_/Q _31214_/Q _25156_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_134_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18864__B1 wire2281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26926__A1 _31950_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22368_ _22368_/X wire3213/X _18296_/X wire3712/X _22372_/A2 _29762_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_156_2530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22950__S _22966_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20036__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26926__B2 wire2376/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_2874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4011 _24118_/A _28732_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_238_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3215 _14358_/Y _17078_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_24107_ _24441_/C _24107_/X _19786_/A _26949_/A _28475_/Q _28571_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_4 Xwire4022 wire4023/X wire4022/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21319_ VGND VPWR _21319_/X _21548_/B _21548_/A _21320_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 Xfanout3226 _21953_/A2 _21471_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_251_3753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25087_ _26542_/B _25087_/B _25881_/B _25087_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 X_29964_ _29964_/Q _31927_/CLK _29964_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire4033 VPWR VGND wire4033/X wire4034/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_269_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14034__A _28463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22299_ VGND VPWR _23372_/S _29885_/Q hold220/X _29885_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire4044 VPWR VGND wire4044/X wire4045/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3248 VPWR VGND wire3249/A _14744_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_5_4641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3115_A _22513_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4055 VPWR VGND wire4055/X _28665_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_212_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2514 VPWR VGND _20719_/S _20690_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3259 wire3261/X _15751_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18616__A0 _28330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4066 VPWR VGND wire4066/X _28661_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14350__B1 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24038_ _24038_/X _24186_/A3 _19928_/B _28628_/Q _31106_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__21215__A2 _21214_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28915_ VGND VPWR _28915_/D _32309_/CLK _28915_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xwire4077 VPWR VGND wire4077/X wire4078/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19959__A3 wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2536 wire2539/X _20512_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__20470__S _20482_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold390 hold390/A hold390/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_4505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_752 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29895_ _29895_/Q _32444_/CLK _29895_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire4088 VPWR VGND wire4088/X _28652_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_268_4951 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25265__C _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout2558 VPWR VGND _20205_/S _20195_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_opt_32_1_core_clk clkbuf_opt_32_1_core_clk/X clkbuf_opt_32_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_266_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2620 VPWR VGND _24591_/B _14223_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3365 VPWR VGND wire3365/X _14052_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1824 _27692_/A1 _18247_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__13873__A _28624_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18092__A1 wire3900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32122__CLK _32122_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3376 _14303_/A _14133_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1835 wire1837/A _27680_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16860_ _16860_/X _29300_/Q _16934_/A2 _16944_/B2 wire962/X _16859_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28846_ _28846_/Q _32306_/CLK _28846_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_47_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27351__A1 _32206_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26154__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2642 VPWR VGND wire2642/X _14203_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3387 VPWR VGND wire3387/X wire3388/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1846 VPWR VGND _27423_/S _17503_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_134_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2653 VPWR VGND wire2653/X _14194_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1857 _22954_/S _23342_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire3398 VPWR VGND wire3398/X _32572_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24165__A1 wire4032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout870 VPWR VGND _19598_/A _19609_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2664 _14185_/Y wire2664/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_15811_ wire1533/X wire3276/X _28909_/Q _15811_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27253__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1930 VPWR VGND wire1930/X wire1931/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_237_137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16642__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2675 VPWR VGND wire2675/X _14176_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25362__B1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3676_A _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_2818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2686 VPWR VGND wire2686/X _14167_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16791_ _16791_/A2 _16791_/X wire985/A _15774_/X _14104_/Y _29611_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28777_ _28777_/Q _32419_/CLK _28777_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25901__A2 _19559_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2697 VPWR VGND wire2697/X _14165_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25989_ VGND VPWR _19539_/B _19566_/A _26014_/A2 _25989_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22176__B1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14653__A1 _14937_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18919__A1 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1963 VPWR VGND _19200_/B wire1963/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__28611__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3484_A _31379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22715__A2 wire3657/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29737__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18530_ VGND VPWR _18531_/S wire3818/X _28302_/Q _28302_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23912__B2 _28680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19041__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15742_ _15758_/A1 _15543_/S _29068_/Q _15707_/A _15742_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27728_ VGND VPWR _27728_/S _19734_/A _32460_/Q _32460_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2707_A _14162_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20726__A1 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1996 VPWR VGND wire1996/X wire1997/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_249_2981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_4242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_5_21_0_core_clk clkbuf_5_21_1_core_clk/A clkbuf_5_21_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_76_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_76_3287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19592__A1 _28470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_5511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18461_ VGND VPWR _18461_/S _29867_/Q _28235_/Q _28235_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15673_ _15751_/A1 _16910_/A2 _15673_/X _15727_/A2 _28898_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_15_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27659_ VGND VPWR _27667_/S wire2259/A _32397_/Q _32397_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_2233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_230 wire2047/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14405__A1 _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24468__A2 _24467_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30714__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_241 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14405__B2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15602__B1 wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19710__D _20124_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3749_A _22924_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_252 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17412_ VGND VPWR _17417_/C _30996_/Q _32270_/Q _17424_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_280_2758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14624_ _14624_/X wire1202/X wire1089/X _14623_/X _14621_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_226_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22479__A1 _17104_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_263 _32576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30670_ hold306/A _32549_/CLK _30670_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18392_ VGND VPWR _18398_/S wire3832/X _28169_/Q _28169_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_265_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_274 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28761__CLK _30903_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_5301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_285 wire1326/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29887__CLK _31910_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19344__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_296 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25598__B1_N _25632_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23810__A _23810_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17343_ VGND VPWR _17347_/A _17343_/A2 wire2028/X _17441_/B2 _17342_/X VGND VPWR + NF_sky130_fd_sc_hd__a211o_1 X_29329_ _29329_/Q _32426_/CLK _29329_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16158__A1 wire1485/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14555_ _14554_/X _14675_/S _15629_/A2 _29518_/Q _14555_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_32_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_3344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_5629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17355__B1 input180/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25417__A1 _31356_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19895__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22494__A4 _22510_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_4898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27639__D _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2125 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_4791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32340_ _32340_/Q _32523_/CLK _32340_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_243_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17274_ wire3564/A _31905_/Q _17278_/B _17446_/B2 wire2127/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_2 XFILLER_139_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14486_ _14447_/X _14486_/X _14464_/Y _23231_/C _14485_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_67_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30864__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20645__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_122_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output577_A _28680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2616 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_2665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19013_ _19201_/A2 _27999_/Q _19151_/S _19013_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23021__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23979__A1 wire4081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29117__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16225_ _16840_/A2 wire3281/X _28920_/Q _16225_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23979__B2 _31164_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_6_4_core_clk clkbuf_opt_6_5_core_clk/A clkbuf_opt_6_4_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_13_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32271_ _32271_/Q _32271_/CLK _32271_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17107__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3440 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4192_A wire4193/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15381__A2 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18115__S _18117_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22100__B1 _22099_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29854__D _29854_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31222_ _31222_/Q _32562_/CLK _31222_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_154_3927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_4322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_1937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16156_ _16156_/X _29281_/Q _16434_/A2 _16722_/B2 wire958/X _16155_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_274_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21454__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27428__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20111__C1 _27071_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17658__B2 _17475_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18855__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26917__A1 _31941_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_86_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26917__B2 wire2335/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length880 VPWR VGND _19849_/B wire881/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24641__A _31680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20662__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15107_ _16956_/A2 _15747_/A1 _28819_/Q _15107_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_61_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17954__S _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31153_ VGND VPWR _31153_/D _31436_/CLK _31153_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_clkbuf_leaf_305_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16330__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16087_ VGND VPWR _16088_/A _16084_/X wire1032/A _16068_/S _16086_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_29_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26393__A2 _14206_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25050__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18870__A3 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29267__CLK _29580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30104_ _30104_/Q _30204_/CLK _30104_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_267_5140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15038_ _15038_/X _32054_/Q _15628_/B1 _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_19915_ _19914_/X _28607_/Q _28607_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xfanout3760 VPWR VGND _21778_/A _30217_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16881__A2 _16928_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15684__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20380__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31084_ _31084_/Q _31737_/CLK _31084_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_244_48 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19804__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3771 _30085_/Q _22449_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_61_2833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_4173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13783__A _31163_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18083__A1 wire3822/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25127__D_N _25135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30035_ _30035_/Q _30395_/CLK _30035_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_43_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_4120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19846_ _19845_/X _28575_/Q _28575_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__19280__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27342__A1 _32198_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27229__A2_N _24255_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30244__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17425__A4 _30848_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_4150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_3242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27163__S _27163_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold12_A hk_dat_i[27] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25353__B1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_1160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_3711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17830__B2 _17897_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26550__C1 _26182_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28291__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26509__B_N _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19777_ _26687_/B _19776_/X _19782_/A _28545_/Q _28545_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__18785__S _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16989_ VGND VPWR _30375_/Q _16988_/Y wire886/A _30375_/D _16982_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__22167__B1 wire2284/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15841__A0 _28870_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23903__A1 _31093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23903__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19032__B1 _19177_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18728_ _18728_/X _19346_/D1 _27986_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_181_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_4099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_59_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20178__C1 _26687_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27859__CLK _29803_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_2057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire1807_A wire1808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31986_ _31986_/Q _32431_/CLK _31986_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_3_1057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_90_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19583__A1 _28467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2943_A _20323_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25105__B1 _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21505__A _21505_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18659_ _18659_/X _18682_/A _30333_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2b_1 X_30937_ _30937_/Q _32063_/CLK _30937_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_283_2371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_4607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30394__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14818__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_1945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25656__A1 hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23116__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout2849_A _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_4689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_3783 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3614 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire995_A wire996/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21670_ _21444_/C _17077_/X _21679_/B _21444_/D _21670_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_241_3955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30868_ _30868_/Q _31522_/CLK _30868_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_0_1989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_5_26_0_core_clk_A clkbuf_5_27_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_1985 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24816__A _31700_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23131__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20621_ VGND VPWR _20625_/S wire2012/X _29167_/Q _29167_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23720__A _23720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17541__B1_N _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16149__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_3220 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32455__D _32455_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21142__A1 _29585_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17346__B1 _17345_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30799_ _30799_/Q _32049_/CLK _30799_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19886__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18543__C1 _20847_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23682__A3 _23879_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_3417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23340_ _30317_/D _30285_/Q _22431_/Y _30317_/Q _29690_/Q _30406_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_203_2052 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20552_ VGND VPWR _27485_/D _27598_/C _20453_/C _20552_/X _27135_/C VGND VPWR NF_sky130_fd_sc_hd__and4bb_2 X_32538_ _32538_/Q _32538_/CLK _32538_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_270_5019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21693__A2 _21744_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22890__A1 wire3133/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_344_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20555__S _20556_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_159_3849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_3720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24254__C _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19099__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26620__A3 wire1275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23271_ VGND VPWR _23300_/S wire3911/X _30253_/Q _30253_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14553__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20483_ VGND VPWR _20485_/S _29002_/Q _21203_/A0 _29002_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32469_ _32469_/Q _32545_/CLK _32469_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18025__S _18034_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24631__A2 _17895_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25010_ _25081_/A _24945_/B _25010_/X _25018_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_252_4741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1148_A wire1151/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26750__B _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_4138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22222_ VGND VPWR _21051_/B _22241_/D _22220_/Y _22222_/X _30043_/Q VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__14580__B1 _14705_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27338__S _27339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21445__A2 _21655_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_5505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18846__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18310__A2 _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_4736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_505 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_287_5538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20653__B1 wire1330/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24919__B1 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32145__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22153_ _30098_/Q wire2284/X _22153_/X wire2275/X _22151_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_290_2353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_236_core_clk _31313_/CLK clkbuf_opt_34_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__19645__A _19645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_3098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_4758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_2834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_47_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26384__A2 _26386_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput440 wire3368/X la_oenb[59] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_154_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1315_A wire1321/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18861__A3 _18855_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput451 _13911_/Y la_oenb[69] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21104_ _21104_/B _21104_/Y hold219/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__14332__B1 wire3987/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput462 _13901_/Y la_oenb[79] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_1603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16872__A2 wire1552/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22084_ wire829/A _22236_/A _21030_/S _30332_/Q _22554_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XANTENNA__20290__S _20290_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26961_ _26966_/C _26961_/C _31987_/Q _26988_/C _27001_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 Xoutput473 _13891_/Y la_oenb[89] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22071__A _22072_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput484 _13945_/Y la_oenb[99] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_4825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1109 wire1113/A _15718_/B1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_fanout775_A wire777/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14883__A1 _14883_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput495 _28657_/Q la_output[108] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28634__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_5514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_211_4482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28700_ _28700_/Q _31871_/CLK _28700_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18074__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25912_ _25904_/A _25911_/Y _25903_/S _31473_/Q _31473_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_96_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21035_ _21035_/Y _30034_/Q _21051_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_4 XFILLER_99_3254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29680_ hold135/A _30339_/CLK _29680_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_214_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26136__A2 _26019_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26892_ _26892_/Y _26892_/B wire752/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_0_5261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_4869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19810__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_1057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_232_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16085__B1 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24147__A1 wire4111/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_2557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32295__CLK _32295_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28631_ _28631_/Q _32541_/CLK _28631_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17821__A1 _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1237 VPWR VGND _24480_/A _24442_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25843_ _25847_/C _25843_/C _31444_/D _25867_/A _25971_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_186_3257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_4275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1248 VPWR VGND wire1248/X wire1249/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_116_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xload_slew2749 VPWR VGND _19716_/C _23737_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22158__B1 _21035_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1259 VPWR VGND wire1259/X _24049_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout1684_A _18221_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30737__CLK _32551_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15832__B1 _16151_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14635__B2 _14634_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_4578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_281_4469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28562_ _28562_/Q _32552_/CLK _28562_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19738__D_N _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25774_ VGND VPWR _27227_/B _32105_/Q _32104_/Q _25774_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__21905__A0 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold353_A hold353/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22986_ VGND VPWR _31395_/Q _22984_/X _22985_/X _22986_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_147_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19811__C _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28784__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18708__B _19046_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27513_ VGND VPWR _27513_/S _27706_/A1 _32328_/Q _32328_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_38_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27801__S _27801_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24725_ _24722_/B _31504_/Q _24729_/C _24724_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_223_3107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21937_ _22061_/S hold250/A _21946_/B _21999_/S1 _17159_/B _17143_/B hold235/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_28493_ _28493_/Q _31801_/CLK _28493_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_clkbuf_leaf_383_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1851_A _14438_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20184__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25647__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2963 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_280_1309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26844__B1 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_2122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27444_ VGND VPWR _27476_/S _32280_/Q _27443_/X _32280_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2023_A _17402_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24656_ _24657_/B _24656_/B _24684_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_262_1721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21868_ _21866_/A _21956_/A _21868_/Y _21641_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_120_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_911 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30887__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22945__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15060__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_2838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19326__A1 wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2488 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3747 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23122__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_1180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23607_ VGND VPWR _24837_/C _32580_/Q _23607_/B VGND VPWR NF_sky130_fd_sc_hd__xnor2_2 XANTENNA__23630__A _32561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21669__C1 _21668_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_944 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3257_A wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27102__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20819_ VGND VPWR _20819_/S _29332_/Q _27708_/A1 _29332_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27375_ VGND VPWR _27375_/S _32228_/Q _27280_/X _32228_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21133__A1 _27704_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_955 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_1153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_120_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24587_ _24587_/Y _24588_/B _31542_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_223_1727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21799_ _21471_/C _21798_/X _17053_/X _21471_/A _21799_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__14029__A _28468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22330__B1 _22338_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19877__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_3449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22476__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24870__A2 _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23673__A3 _23873_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29114_ _29114_/Q _29565_/CLK _29114_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_32_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14340_ _14347_/C _21339_/C _21451_/B _23140_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XANTENNA_clkbuf_leaf_120_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26326_ _26325_/Y _26893_/C1 _31651_/Q _26327_/B _31651_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23538_ VGND VPWR _23559_/S _30459_/Q _23538_/A0 _30459_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_10_3411 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22881__A1 _30475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20465__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19539__B _19539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_4344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_3610 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30117__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_88_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29045_ _29045_/Q _32309_/CLK _29045_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14271_ _14270_/X _14268_/B hold193/X _14303_/A hold194/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 X_26257_ _31617_/Q _26257_/X _26301_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__24083__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23469_ VGND VPWR _23527_/S wire4153/X _30421_/Q _23469_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16560__A1 wire912/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19629__A2 _14153_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24622__A2 _19505_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28164__CLK _30274_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16010_ _16447_/A2 _16447_/A1 _29461_/Q _16010_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xmax_length3874 VPWR VGND wire3873/A wire3875/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_10_3488 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29674__D _29674_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25208_ _26498_/A _25207_/X _25254_/A2 hold96/A _31229_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_49_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14571__B1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27248__S _27263_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26188_ VPWR VGND _31582_/D _26188_/B _26188_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_273_3274 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_1973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23830__B1 _19789_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26563__A1_N hold222/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17104__A3 _17102_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_271_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17774__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16848__C1 wire745/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19555__A _19555_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25139_ _25139_/B _25139_/Y _31205_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_251_4284 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3023 VPWR VGND wire3027/A _18367_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26375__A2 _26383_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25032__C1 _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2657_A _14189_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30267__CLK _30758_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3034 VPWR VGND _18364_/S _18334_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_3_853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_117_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_40_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23189__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_3_core_clk_A clkbuf_5_0_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout2311 VPWR VGND _20061_/C wire2316/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_114_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25583__B1 _25582_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17961_ VGND VPWR _17972_/S wire3882/X _27898_/Q _27898_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31512__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29947_ _29947_/Q _30330_/CLK _29947_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_171_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26780__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_4134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3140 VPWR VGND _23524_/S _23518_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_43_3275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_21_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15294__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19700_ _19700_/C _19710_/B _19700_/Y _20114_/B _20061_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 Xwire3151 VPWR VGND wire3151/X _18661_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18065__A1 wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1610 VPWR VGND _24269_/A _23859_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16912_ _16912_/X _16909_/X _16950_/A1 _16940_/B1 _16911_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_5_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19262__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27324__A1 _27268_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_3635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26127__A2 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17892_ _26559_/D _24384_/C _24384_/A _24384_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_4 X_29878_ VGND VPWR _29878_/D _31945_/CLK _29878_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xfanout1632 _24273_/C wire1633/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_266_733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3184 VPWR VGND wire3184/X _17900_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_212_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3195 VPWR VGND _31902_/D wire3196/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25081__C_N _24951_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19631_ _19631_/B _19566_/A _19778_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XANTENNA__17812__A1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25335__B1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15418__A3 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2461 wire2461/A _23590_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1665 _19516_/X _24310_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_16843_ wire745/A _16843_/A2 _16842_/X wire1055/A _16841_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 XANTENNA__23805__A _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28829_ _28829_/Q _31917_/CLK _28829_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_3911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14626__A1 _32302_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22149__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2483 VPWR VGND _21017_/S _20997_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25886__A1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2494 _20921_/Y _20931_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__21289__A_N _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15823__B1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31662__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_2074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19562_ _25041_/B _19617_/A _19562_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 X_31840_ _31840_/Q _31879_/CLK _31840_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_5032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_56_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1771 VPWR VGND wire1771/X _18902_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16774_ VGND VPWR _16774_/X _16925_/B1 _16967_/A1 _16771_/X _16773_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_247_991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23897__B1 _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13986_ _28511_/Q _13986_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__19721__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4932 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_3917 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_91_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_449 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_21_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_1377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19565__A1 _28462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_235 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18513_ VGND VPWR _18523_/S wire3870/X _28285_/Q _28285_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_182_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15725_ _15725_/X _15715_/X _15719_/X _15724_/X _15735_/B _15711_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_108_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17522__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31771_ _31771_/Q _32010_/CLK _31771_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19493_ _31323_/Q _31324_/Q _19493_/Y _19491_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_267_1676 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16379__B2 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25638__A1 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_3797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_3229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26835__B _26900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17040__A2 hold384/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29849__D _29849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18444_ VGND VPWR _18449_/S wire3880/X _28218_/Q _28218_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30722_ hold363/A _32544_/CLK input81/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_2394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15656_ _15737_/A2 _15656_/X _15655_/X _15705_/A1 _29236_/Q _15738_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_34_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14929__A2 wire1539/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_2304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32018__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output694_A wire3515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19317__A1 _28400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_3330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14607_ VGND VPWR _14935_/S _28942_/Q _29240_/Q _14607_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_241_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17949__S _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27012__A _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30653_ _30653_/Q _31351_/CLK hold283/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_3472 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18375_ VGND VPWR _18399_/S wire3889/X _28152_/Q _28152_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21124__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15587_ VGND VPWR _15587_/X _15277_/S _15631_/A1 _15586_/X _15585_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_226_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19868__A2 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24861__A2 _24470_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_2361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17326_ wire3579/X _30814_/Q _30831_/Q _17325_/X _17332_/B1 _17326_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XFILLER_102_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28507__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14538_ _20848_/A _14538_/Y _20848_/B _14544_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 X_30584_ hold458/A _32438_/CLK _30584_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_3748 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26063__A1 _31534_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27260__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16000__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20883__A0 _29370_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18540__A2 _29774_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_3710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_28_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32323_ _32323_/Q _32435_/CLK _32323_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__13778__A _31168_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31042__CLK _32580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17257_ VGND VPWR _17256_/X _32293_/Q _17424_/B _17424_/C _29841_/D wire2296/A VGND + VPWR NF_sky130_fd_sc_hd__a311o_4 XANTENNA__32168__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2424 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14469_ _23342_/C hold436/A _14086_/Y hold364/A _14469_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24074__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16551__A1 wire1038/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15354__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23416__A3 _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16208_ _16208_/X _16816_/B1 _16205_/X _16207_/X _16449_/B1 _16203_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14562__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27158__S _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32254_ _32254_/Q _32523_/CLK _32254_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18828__B1 _18819_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22590__S _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17188_ _30011_/Q _22510_/A2 _17188_/X _29439_/Q wire3791/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_278_1783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_4010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_1002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_85_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_36 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17684__S _17720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31205_ _31205_/Q _32579_/CLK _31205_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28657__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4100 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24802__C _31685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16139_ VGND VPWR _16443_/S _28413_/Q _29078_/Q _16139_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_230_5069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16303__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32185_ _32185_/Q _32225_/CLK _32185_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27563__A1 _32161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25186__B _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26366__A2 wire2194/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29902__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_3099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_1901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire743_A wire743/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31192__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24377__A1 wire2017/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2893_A _20605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31136_ _31136_/Q _32551_/CLK _31136_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_83_2376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16854__A2 wire1029/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_2800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_2056 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22388__B1 _29946_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14865__A1 wire3249/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_230_3656 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_1382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22927__A2 _30480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18056__A1 wire3913/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_1918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire1924_A wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26118__A2 _26121_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19253__B1 wire1914/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31067_ _31067_/Q _31369_/CLK _31067_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_247_4821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16067__A0 _29076_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_2332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24129__A1 _28477_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30018_ VGND VPWR _30018_/D _30411_/CLK hold403/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_22_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19829_ VGND VPWR _26874_/B _19789_/C wire1334/A _19829_/X _26999_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__17803__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length841_A _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14617__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_928 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_479 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout2966_A _18593_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15814__B1 _29165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19404__S _19415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19005__B1 wire1905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22840_ _22839_/X _22935_/A _22933_/S _22838_/A _22843_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_224_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23434__B _29366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23888__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_1968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15290__A1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19556__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3124 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_129_2226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_3293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_3747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28037__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27621__S _27621_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_3465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24249__C _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22771_ _29718_/Q _22769_/X _22745_/X _22772_/B _22733_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_263_2731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_5020 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31969_ hold469/A _32075_/CLK _31969_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17567__B1 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22560__A0 wire3702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1098_A wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24510_ _31289_/Q _31290_/Q _24531_/B _31287_/Q _31288_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_2 XFILLER_276_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2483 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21722_ _21637_/A _21722_/X _21709_/Y _21712_/X _21687_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__29759__D hold281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27094__A3 _27098_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3305_A wire3306/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25490_ VGND VPWR _19492_/X _31324_/Q _31325_/Q _25490_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_94_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_5_1_1_core_clk clkbuf_5_1_1_core_clk/X clkbuf_5_1_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__24546__A _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23104__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_4126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24441_ _24441_/A _26335_/A _24441_/C _24442_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XANTENNA__26464__C _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21653_ _21653_/X _21653_/C _21653_/A _21653_/B _21653_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_244_2196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25644__A4 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21115__A1 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17319__B1 _17319_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18544__A _22078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22458__A4 _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24852__A2 _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20604_ VGND VPWR _20604_/S _27154_/A1 _29119_/Q _29119_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27160_ VGND VPWR _27165_/S _27703_/A1 _32066_/Q _32066_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_2461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24372_ _32033_/Q _26772_/A _24372_/X _32001_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_179_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21666__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22863__A1 _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29432__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20285__S _20285_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21584_ VPWR VGND _21586_/B _21646_/B _21588_/A VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XANTENNA__27251__A0 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23600__D _24881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18263__B _22354_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26111_ _31548_/Q _31549_/Q _31547_/Q _26112_/D _26113_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_102_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3137 VPWR VGND _23496_/S _23530_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23323_ VGND VPWR _23334_/S _30301_/Q _17128_/X _30301_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_28_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_1547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20535_ VGND VPWR _20535_/S _29052_/Q _27694_/A1 _29052_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2403 VPWR VGND _24599_/A wire2404/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_27091_ VGND VPWR _32023_/D _27117_/A2 _27090_/X _26809_/B _27091_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_239_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24065__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16542__A1 wire912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3674_A _30434_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21401__C _21641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25262__C1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_1801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14553__A0 _29271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26480__B _27230_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26042_ _31530_/D _26020_/Y _24597_/A _31530_/Q _17876_/Y VGND VPWR _26041_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__23596__S _23596_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22615__A1 _22618_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23254_ VGND VPWR _23267_/S _29502_/Q _30237_/Q _30237_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_hold101_A hold101/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_2118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20466_ VGND VPWR _20482_/S _28985_/Q _21153_/A0 _28985_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31535__CLK _31694_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23812__B1 _19789_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22615__B2 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_4066 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_3425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24281__A _24281_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3264 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length1724 _22300_/S _23373_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_46_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_1102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27003__B1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25808__C _25808_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31529__D _31529_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22205_ _22204_/X _22509_/C1 wire829/X _29829_/Q _29829_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xmax_length1746 VPWR VGND _22510_/A4 wire1748/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_213_5278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_3309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3841_A wire3842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_1293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29582__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22091__A2 wire828/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23185_ _23395_/A _23185_/X _23185_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_252_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27554__A1 _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26357__A2 wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20397_ VGND VPWR _20414_/S _27244_/A0 _28919_/Q _28919_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24368__A1 _32031_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2292 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29801_ hold267/A _30460_/CLK _29801_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_44_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22136_ VGND VPWR _30031_/Q _22133_/X _22135_/Y _22136_/X _21051_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__16845__A2 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27993_ _27993_/Q _28402_/CLK _27993_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput270 _13771_/Y la_iena[20] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22379__B1 wire3160/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput281 _13761_/Y la_iena[30] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_216_2287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19525__D _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1899_A wire1904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18047__A1 wire3828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3005_A _18460_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput292 _13972_/Y la_iena[40] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_29732_ VGND VPWR _29732_/D _30294_/CLK _29732_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__31685__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27306__A1 wire2801/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26944_ _31968_/Q wire1570/X _31968_/D wire2740/X wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22067_ _22067_/B _22067_/Y _22067_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__25360__A_N _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_4359 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_1929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14312__A _21778_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_3343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16058__B1 _16068_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23047__D _23053_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25317__B1 _26242_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21018_ VGND VPWR _21018_/S _29483_/Q wire1783/X _29483_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_181_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_3658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29663_ _29663_/Q _32429_/CLK _29663_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26875_ _26218_/A _26874_/Y _26900_/A _31887_/Q _31887_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24220__S _24220_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15805__A0 _29101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14608__A1 _14627_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_3628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14608__B2 _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31264__D _31264_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28614_ _28614_/Q _32535_/CLK _28614_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_2229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25826_ _31437_/D _30154_/Q _13745_/Y _27854_/C _31437_/Q _25825_/S VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 Xwire1067 VPWR VGND wire1067/X wire1067/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2140_A _19778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17270__A2 input196/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13840_ _29829_/Q _13840_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_275_596 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29594_ _29594_/Q _32114_/CLK _29594_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25332__A3 _25380_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2238_A _19538_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_3825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1089 VPWR VGND wire1089/X wire1089/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15281__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_5_1697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_3051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_3461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28545_ _28545_/Q _31836_/CLK _28545_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13771_ _31175_/Q _13771_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_57_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25757_ _25757_/X _32084_/Q hold106/A _27181_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_164_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1816 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_1362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20157__A2 _14174_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4662 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22969_ VGND VPWR _22969_/S hold445/X _30146_/Q _30146_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22551__A0 _30051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23894__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15510_ VGND VPWR _15750_/S _29030_/Q _28998_/Q _15510_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_129_2760 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_16_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24708_ _24708_/B _24708_/X _31455_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_19_2031 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_4072 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16490_ VGND VPWR _16806_/S _29537_/Q _29571_/Q _16490_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28476_ VGND VPWR _28476_/D _31892_/CLK _28476_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_wire2405_A _14141_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25688_ _25693_/C _25867_/A _25688_/Y _25693_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_164_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3680 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15033__A1 _15624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26147__S _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27490__A0 _32305_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26293__A1 wire3616/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25096__A2 wire838/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16230__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3240 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_2684 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18770__A2 _19218_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15441_ _15430_/X _15441_/Y _15612_/B _15440_/X _15426_/X wire1093/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 X_27427_ VGND VPWR _27475_/S _32270_/Q _32271_/Q _27427_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_125_2646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31065__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24639_ _24639_/Y _24639_/B _24805_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15584__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16781__A1 wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_3393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_752 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24843__A2 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32310__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18160_ _18160_/X _18254_/S wire3884/X wire3859/X _18158_/X VGND VPWR _18157_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_164_1994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15372_ VGND VPWR _15372_/X _15369_/X _15371_/X _15368_/S _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_240_2561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14792__B1 _14933_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27358_ _27358_/A _31386_/Q hold143/A _27366_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XPHY_785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19269__B _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_3325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26045__A1 _24609_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27242__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_796 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20865__A0 _29361_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26045__B2 _31531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17111_ _17094_/A _21649_/A _17111_/Y _21616_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_177_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15289__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14323_ _14338_/B _29711_/Q _21339_/C _21451_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 X_26309_ _26309_/Y _26327_/B _26878_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_12_2849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18091_ VGND VPWR _18119_/S wire3903/X _28020_/Q _28020_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_103_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_158_core_clk _32010_/CLK clkbuf_5_26_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__15336__A2 _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16533__A1 _16967_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24056__B1 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27289_ VGND VPWR _27292_/S _32153_/Q _27274_/X _32153_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26596__A2 _26595_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25399__A3 _25187_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25253__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3614_A wire3616/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29925__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17042_ wire3725/X _17041_/X _29993_/Q _30370_/Q _17042_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_119_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29028_ _29028_/Q _32324_/CLK _29028_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_45_4027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length3671 VPWR VGND _22078_/D _14515_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_49_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22606__A1 _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14254_ _31279_/Q _14245_/B hold221/A wire3232/X _14254_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_2 XFILLER_214_4319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_5245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22606__B2 wire3703/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20923__S _20931_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32460__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_3645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_4611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24071__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_2018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_4622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_4188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18286__A1 _18269_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21814__C1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_171_4079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length2981 VPWR VGND _18532_/S _18512_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_14185_ _14185_/Y _14184_/X _14168_/S hold163/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__27545__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30902__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25005__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19716__C _19716_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_1366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20093__A1 _28692_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16297__B1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22423__B _29977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24359__A1 _23611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21290__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16836__A2 wire985/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_1894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18993_ _19201_/A2 _28286_/Q _19318_/B1 _18993_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_output442_A _13856_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_27_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_3965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18038__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24764__D1 _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17944_ VGND VPWR _17949_/S wire3830/X _27882_/Q _27882_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_110_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21039__B _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4155_A _28247_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14222__A _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21042__A0 _29503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25935__D_N _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18589__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25308__B1 _31265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27007__A _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19732__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17797__A0 _17796_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17875_ _17875_/Y _17875_/B _31612_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xfanout1462 wire1470/A _16642_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1473 wire1477/A _16387_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29305__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_4453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_169_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1484 VPWR VGND wire1486/A _15769_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19614_ _19614_/B _19768_/B _19551_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_2 XFILLER_241_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16826_ VGND VPWR _16826_/S _29612_/Q _29644_/Q _16826_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_5441 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_3850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_3741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26520__A2 _31745_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15272__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25172__D _31217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_4235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22137__A3 _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_3497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_1005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27441__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2474_A _21148_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25750__A _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19545_ _25512_/A _19544_/Y _19632_/A _28457_/Q _28457_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31823_ _31823_/Q _32293_/CLK _31823_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_182_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16757_ VGND VPWR _16918_/S _29031_/Q _28999_/Q _16757_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_56_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20148__A2 _20168_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13969_ _28528_/Q _13969_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__22542__A0 _30042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31408__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18746__C1 wire1563/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23885__A3 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31902__D _31902_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18210__A1 _30327_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15708_ _28803_/Q _15708_/Y _15707_/X _15718_/B1 wire1496/X wire1501/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__a311oi_1 X_31754_ _31754_/Q _31754_/CLK _31754_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_108_2822 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_143_3447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19476_ _19476_/X hold305/A _31306_/Q _31305_/Q _31308_/Q _31307_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_263_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21896__A2 _22074_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22585__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16688_ _16688_/X _29061_/Q _16934_/A2 _16944_/B2 _16856_/A2 _16687_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_104_3409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29455__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26284__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27481__A0 _32298_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_4825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18761__A2 _19180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_2281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30705_ _30705_/Q _31460_/CLK hold490/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_103_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18427_ VGND VPWR _18432_/S _28202_/Q wire3830/X _28202_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_280_2385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_54_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15639_ VGND VPWR _15639_/S _28801_/Q _28833_/Q _15639_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_206_2467 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16772__A1 wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30518__D input66/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31685_ _31685_/Q _31685_/CLK _31685_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24295__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14232__C1 _14231_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_4858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_3501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24834__A2 wire868/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_1966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18358_ VGND VPWR _18358_/S wire3836/X _28136_/Q _28136_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30636_ hold380/A _32309_/CLK _30636_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30432__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31558__CLK _31869_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26036__A1 _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2906_A _20572_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17309_ VGND VPWR _17308_/X _14399_/A _29848_/D _17245_/X _32300_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_176_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24047__B1 wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30567_ _30567_/Q _31726_/CLK hold315/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18289_ VGND VPWR _18333_/S _28102_/Q _27507_/A1 _28102_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_4593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16524__B2 _16523_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17721__B1 _17863_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25244__C1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32306_ _32306_/Q _32306_/CLK _32306_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20320_ VGND VPWR _20322_/S _27703_/A1 _28861_/Q _28861_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire958_A wire958/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25197__A _25197_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30498_ _30498_/Q _32122_/CLK _30498_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_214_4820 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_3865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_154_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30582__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21805__C1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20251_ VGND VPWR _20261_/S _28794_/Q _27700_/A1 _28794_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32237_ _32237_/Q _32513_/CLK _32237_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23270__A1 wire3916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27536__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26339__A2 wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_3275 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23429__B _29378_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14550__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_3789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_289_644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16288__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20084__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_2894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3909 VPWR VGND wire3909/X hold165/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_269_5065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16827__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27616__S _27616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20182_ _25567_/B _20181_/X _20192_/A2 _28735_/Q _28735_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32168_ _32168_/Q _32168_/CLK _32168_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_252_3199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25011__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14838__A1 _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18029__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31119_ _31119_/Q _31119_/CLK _31119_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19226__B1 wire1900/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24990_ _25065_/A _24925_/B _24990_/X _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_32099_ _32099_/Q _32528_/CLK _32099_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_110_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14132__A _14132_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1013_A _15768_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19777__A1 _28545_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23445__A _29838_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23941_ wire1633/X _30679_/Q _23940_/X _23941_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_187_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_167_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19642__B _20126_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_2685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25363__C _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17788__B1 _17787_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_4050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15662__S _15736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_4_2_0_core_clk clkbuf_5_5_0_core_clk/A clkbuf_4_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__13971__A _28526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2583 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_4234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16055__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26660_ VGND VPWR _26660_/B _26660_/Y _31789_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_285_2241 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15799__C1 wire1053/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23872_ _19792_/C _23871_/X _31833_/Q wire1624/X _23873_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26511__A2 _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17559__A2_N _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16996__D1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15263__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_5060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16460__B1 _29257_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_4559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25611_ _25613_/B _25609_/X _31375_/Q _25610_/X _25632_/B VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_70_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27351__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1574_A wire1573/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25660__A _25660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22823_ VGND VPWR _22819_/X _22824_/B _22820_/X _22933_/S _30469_/Q _22745_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XANTENNA__15802__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_807 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_5536 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_7_7_core_clk _32210_/CLK clkbuf_opt_7_7_core_clk/A VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_26591_ VGND VPWR _23748_/B _31771_/Q _31772_/Q _26591_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__31088__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20139__A2 _20162_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_818 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22533__A0 _30033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_829 _23170_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1382_A wire1387/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32333__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_1983 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28330_ _28330_/Q _30272_/CLK _28330_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_243_3869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25542_ hold502/A _25541_/Y _31349_/D _25546_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_22754_ _22754_/X _22765_/C _22740_/A _22741_/Y _22661_/B _14404_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__21887__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_2280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15015__A1 wire3298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25078__A2 _25086_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3055 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24276__A _31584_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold149_A hold149/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26275__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18752__A2 _18751_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23180__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21705_ VPWR VGND _21705_/X _29352_/Q _29351_/Q VGND VPWR NF_sky130_fd_sc_hd__and2b_2 XFILLER_161_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4256 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28261_ _28261_/Q _31955_/CLK _28261_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23089__A1 _30165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1839_A wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3791_A wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25473_ _19484_/X _25454_/A _31316_/D _25472_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_74_2898 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22685_ _22671_/A _22671_/B _22677_/B _22669_/A _22686_/B _14108_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_4 XFILLER_276_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24286__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15566__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16763__A1 wire3287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout905_A wire915/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23611__C _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28822__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_3943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3889_A wire3890/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24825__A2 _17504_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29948__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27212_ _32098_/Q _27211_/Y _32098_/D _25769_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_65_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_202_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24424_ _24424_/C _31007_/Q _24424_/X _24424_/B _24407_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 X_21636_ VGND VPWR _21637_/B _21462_/B _14353_/B _30336_/Q _14344_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_100_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28192_ _28192_/Q _29550_/CLK _28192_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_3859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15971__C1 _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_3634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26027__A1 _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5635 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32483__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_68_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17307__A3 wire3096/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_33_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27143_ VGND VPWR _27155_/S _27143_/A1 _32049_/Q _32049_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_155_4019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24355_ _24354_/X _24357_/B1 wire1668/X _23611_/A _30980_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_251_core_clk _30057_/CLK clkbuf_opt_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24038__B1 _28628_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16515__A1 _15770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21567_ VGND VPWR _21502_/X _21512_/A _21565_/X _21567_/X _21566_/X _21492_/X VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_279_2089 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26578__A2 wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30925__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25235__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17712__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_1872 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20028__B _26015_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17473__A_N _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23306_ _23305_/X _30332_/D _22284_/Y _20987_/C _30285_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20518_ VGND VPWR _20518_/S _27265_/A0 _29036_/Q _29036_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2233 VPWR VGND _25031_/B _19937_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_27074_ _27074_/X _27122_/B _32015_/Q _27070_/C _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_68_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24286_ _31588_/Q _30936_/D _26376_/A1 _26378_/A4 _31665_/Q _24284_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_2 XANTENNA__28972__CLK _32291_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20743__S _20743_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2244 VPWR VGND _19724_/A _19652_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_133_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21498_ _21499_/C _21599_/A _21674_/B _21499_/D _21501_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_114_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24215__S _24238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24053__A3 _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25250__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2266 VPWR VGND _19069_/D1 _19368_/D1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_159_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26025_ _26025_/X _26024_/Y wire2408/X _26120_/A2 _14399_/B _26023_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_109_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_2387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24442__C _24442_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2277 VPWR VGND _19069_/B1 _19218_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23237_ VGND VPWR _23228_/S _22078_/D _23236_/Y _30223_/D _14534_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_232_4942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2090_A wire2090/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20449_ VGND VPWR _20449_/S _28969_/Q wire1783/X _28969_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_5429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19465__B1 _25540_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27527__A1 _32333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2688 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input173_A mprj_ack_i VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2188_A _19754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21272__A0 _23395_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22243__B _22243_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20075__A1 _28683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16279__B1 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_1965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23800__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3627 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_81_3559 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17476__C1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16818__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23168_ VGND VPWR _23168_/X _23166_/X _23167_/X _23165_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21811__A2 _21812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_170_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20044__A wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1598 VPWR VGND _23873_/B _24888_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__14829__A1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28202__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_133_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29328__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22119_ _22143_/D _29816_/Q _29818_/Q _29817_/Q _22119_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__23013__A1 _23012_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19217__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17491__A2 _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15990_ wire1539/X wire3276/A _29106_/Q _15990_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_40_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23099_ _30167_/D _23190_/B _23098_/X _30167_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27976_ _27976_/Q _30118_/CLK _27976_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14042__A _28455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2355_A wire2356/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_2396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_4497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_4448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29715_ VGND VPWR _29715_/D _32079_/CLK _29715_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__23355__A _23355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26927_ _31951_/Q wire1573/A _31951_/D wire2380/X wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_14941_ _16417_/A2 wire3298/X _29562_/Q _14941_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_248_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_79_3444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5436 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17779__B1 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30305__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3414 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_4312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13881__A _28616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_2401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18440__A1 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17660_ VGND VPWR _17832_/S _17659_/X _17637_/X _17660_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_2_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29646_ _29646_/Q _32557_/CLK _29646_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14872_ VGND VPWR _15623_/S _28089_/Q _29045_/Q _14872_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26858_ VGND VPWR wire2664/X _19522_/A wire749/X _26858_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__28352__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29478__CLK _32436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15254__A1 _15749_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3731 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16451__B1 wire894/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16611_ wire1552/X _16943_/A1 _28995_/Q _16611_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27261__S _27262_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18991__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13823_ _31123_/Q _13823_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_183_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25809_ _32550_/Q _25810_/B _32549_/Q _25809_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_1_1325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29577_ _29577_/Q _32438_/CLK _29577_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17591_ _17591_/X wire2768/X _17474_/C _17473_/X _17457_/B VGND VPWR _14067_/A VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_144_3712 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22524__A0 hold231/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26789_ _27070_/B _26694_/B _26791_/A _26789_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_224_5193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_3854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19330_ _19377_/B _19330_/X _28270_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 X_28528_ _28528_/Q _31460_/CLK _28528_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16542_ _16537_/X wire904/X wire912/X _16541_/X _16542_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_1_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_38_3185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13754_ hold75/A _13754_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_18_3759 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30455__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15006__A1 _29314_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26266__A1 wire3466/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21327__A_N _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3035 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16203__B1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15006__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19940__A1 _28618_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17546__A3 _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23090__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31700__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4184 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19261_ VGND VPWR _19261_/X _19335_/B _19278_/S _28366_/Q _19260_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire2891_A _20618_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16473_ VGND VPWR _16948_/S _32060_/Q _29119_/Q _16473_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_2033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28459_ VGND VPWR _28459_/D _31815_/CLK _28459_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xclkbuf_leaf_339_core_clk _30398_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_34_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2949 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_2443 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24277__B1 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15557__A2 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2989_A _18490_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18212_ _29746_/Q _18163_/B _22338_/A _18212_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_199_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15424_ _15424_/X _29294_/Q _15638_/A2 _15638_/A3 _15640_/A1 _15423_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XPHY_560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_4187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31470_ VGND VPWR _31470_/D _31470_/CLK _31470_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_203_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19192_ _19192_/X _19196_/D1 _28008_/Q _19196_/B1 _19218_/A2 wire3770/X VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_121_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3843 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_4206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22827__B2 _22846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3396 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_3358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24292__A3 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30421_ _30421_/Q _30432_/CLK _30421_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18143_ VGND VPWR _18143_/S wire3838/X _28071_/Q _28071_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15355_ _15515_/A2 _15355_/X _15354_/X _15368_/S _29605_/Q _15355_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__24029__B1 _28627_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16506__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32553__D hold484/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26569__A2 wire817/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25226__C1 _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_255_3729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14217__A _31743_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14780__A3 _15228_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM128_A0[1] wire2405/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31850__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4591 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14306_ _29949_/Q _29948_/Q _14300_/B _29980_/Q _14300_/A _17913_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_173_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25777__B1 _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18074_ VGND VPWR _18074_/S wire3846/X _28004_/Q _28004_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30352_ VGND VPWR _30352_/D _32444_/CLK _30352_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_15286_ _15285_/X _15286_/C1 _15284_/X _15286_/Y _15630_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 XFILLER_177_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22434__A _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2465 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output657_A wire2698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25241__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold208 hold208/A hold208/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_194_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_271_2307 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17025_ VGND VPWR _17025_/X _22449_/A _17024_/X _29991_/Q _17023_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_231_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold219 hold219/A hold219/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_14237_ _31284_/Q _14245_/B _14237_/X wire3232/X _29514_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_253_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17528__A _26441_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22055__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23252__A1 _29500_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27518__A1 _32253_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30283_ _30283_/Q _30471_/CLK _30283_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_45_3134 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_2739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18123__S _18123_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1288_A wire1289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_136_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21263__A0 _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20066__A1 _19573_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_5097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_154_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29862__D hold4/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32022_ _32022_/Q _32290_/CLK _32022_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16809__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3497 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27436__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32206__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21802__A2 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25745__A _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14168_ _14168_/S hold98/X VPWR VGND hold151/X _14168_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_8 XFILLER_4_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17962__S _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19208__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_2594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24201__B1 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18976_ _28125_/Q _18976_/X _19202_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14099_ _29375_/Q _14099_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__26741__A2 _31823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25544__A3 _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_3511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21015__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14296__A2 _14293_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15493__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_55_core_clk _32412_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_93_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17927_ VGND VPWR _17949_/S wire3885/X _27865_/Q _27865_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_23_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21566__A1 _21501_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_3683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31230__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13791__A _31155_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32356__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18431__A1 _28206_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17234__A2 _30405_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17858_ _17858_/X _17596_/D _31737_/Q _17490_/B _17852_/X _17857_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_1_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_2869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15245__A1 wire1134/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16442__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_281_341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire706_A wire706/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16809_ _16809_/X _29096_/Q _16818_/A2 _16841_/B2 _16841_/C1 _16808_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_247_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_4879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2955 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_8_0_core_clk clkbuf_opt_8_1_core_clk/A clkbuf_5_3_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_108_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15796__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17789_ _17697_/X _17788_/X _17852_/A _17685_/A _17789_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_225_3533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_4109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28845__CLK _32342_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18719__C1 _18718_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19717__A_N wire1666/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_2810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31806_ hold498/A _31806_/CLK _31806_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19528_ _19791_/B _26763_/B _23598_/C _23599_/C _20682_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__27049__A3 _27050_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21869__A2 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_4251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18195__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31380__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18734__A2 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23204__S _23224_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21513__A _30470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2171 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19459_ VGND VPWR _28447_/D _26139_/A _25540_/C _19458_/Y _19457_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 X_31737_ _31737_/Q _31737_/CLK _31737_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_30_4126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24268__B1 _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14826__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30948__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3572 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_1189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_290_5512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14756__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22470_ VGND VPWR _22448_/C _22512_/A4 _22484_/A2 _22470_/X _29996_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA_wire3003_A _18438_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24246__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22818__B2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31668_ _31668_/Q _31884_/CLK _31668_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28995__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26009__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14220__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_178_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21421_ VGND VPWR _21421_/X _21422_/B _21422_/A _21623_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__18498__A1 wire3814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30619_ _30619_/Q _32379_/CLK hold357/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_191_4219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3654 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_78 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25217__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14127__A _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31599_ _31599_/Q _32568_/CLK _31599_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_4341 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24543__B _24543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24140_ _30577_/Q _24140_/A2 _24140_/X wire3398/X wire1614/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_258_3397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21352_ _21661_/A _21352_/C _21350_/X _21353_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XFILLER_156_3638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27221__A3 _25771_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_4150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_82_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20563__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3922 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17170__A1 _30208_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19637__B _19637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28225__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25232__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18541__B _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20303_ VGND VPWR _20315_/S _27143_/A1 _28844_/Q _28844_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_2073 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13966__A _28531_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24071_ _24071_/X _24186_/A3 _19928_/B _28631_/Q _31109_/Q _24165_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__15181__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23243__A1 _29491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21283_ VGND VPWR _30450_/Q _23238_/B _22076_/D hold377/A hold360/A VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA__27509__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18033__S _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24440__B1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1130_A wire1134/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15720__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21254__A0 _23096_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_2279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20057__A1 _28675_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_3245 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_119_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23022_ VGND VPWR _31396_/Q _23021_/X _23018_/X _23022_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19998__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20234_ VGND VPWR _20249_/S _28777_/Q _27140_/A1 _28777_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_189_4126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27346__S _27348_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24991__A1 _31139_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23794__A2 wire1807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3706 VPWR VGND wire3706/X _30337_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25655__A _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_3403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_2612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30328__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3728 VPWR VGND wire3728/X wire3729/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_284_5338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3739 VPWR VGND wire3739/X _23061_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_284_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27830_ _32538_/D _27830_/B _27830_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_210_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18670__A1 _30376_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26193__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20165_ wire881/A _20128_/B _20165_/X _20165_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_270_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30711__D _30711_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25374__B _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18670__B2 _21211_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28375__CLK _31962_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_1960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21006__A0 _24227_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15484__A1 wire3303/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2667 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_4318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_184_5450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23175__A _23180_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29620__CLK _32307_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27761_ VGND VPWR _27765_/S _25029_/B _32488_/Q _32488_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_63_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19372__B _19377_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24973_ _31130_/D _25037_/B _24972_/X _25041_/A _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_98_2629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20096_ _20096_/Y _20096_/B _20122_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_189_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18269__A _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22754__B1 _22661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29500_ VGND VPWR _29500_/D _30466_/CLK _29500_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_26712_ _26712_/Y _31771_/Q hold431/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_6_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18422__A1 _28197_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17225__A2 _22026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23924_ _23924_/X wire1587/X _30683_/Q _30747_/Q wire1633/X VGND VPWR _23923_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_41_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_4935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27692_ VGND VPWR _27709_/S _27692_/A1 _32426_/Q _32426_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30478__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15236__A1 _15236_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26496__A1 _31706_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29431_ _29431_/Q _30392_/CLK _29431_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31723__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26643_ VGND VPWR _26643_/B _26643_/Y _31785_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_265_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23855_ _30846_/D _24310_/B _23855_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_2_1645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_604 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16984__A1 _16971_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_588 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_615 wire2077/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16984__B2 _29773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_626 _20165_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5355 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22806_ _22831_/B _22806_/X _22806_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_263_3081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17901__A _31068_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29362_ _29362_/Q _30492_/CLK _29362_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_637 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14995__B1 _14986_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26574_ wire3454/X _31767_/D _26572_/X _26694_/C _31872_/Q _26573_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_2_1689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_648 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23786_ _30823_/D _23813_/C _23786_/A _23807_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__20738__S _20754_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20998_ VGND VPWR _21018_/S _29463_/Q _27242_/A0 _29463_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26248__A1 _31672_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27445__A0 _32280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_659 _20657_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19922__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18725__A2 wire1403/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28313_ _28313_/Q _30460_/CLK _28313_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_2331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25525_ _19451_/X _25512_/Y _25525_/Y _31342_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_22737_ VGND VPWR _22737_/X _22747_/B _22737_/A _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_243_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29293_ _29293_/Q _30507_/CLK _29293_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23341__C _23341_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26799__A2 wire2675/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17394__D1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_3106 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_4121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_3792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31873__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28244_ _28244_/Q _31916_/CLK _28244_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29000__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2103_A wire2104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_5571 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2900 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25456_ VGND VPWR _25454_/B _31308_/Q _25510_/D _25456_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_52_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15944__C1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22668_ VGND VPWR _22669_/B _22779_/A1 _22665_/X _30454_/Q _22664_/Y VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22953__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14211__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_174_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24734__A _31456_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_3626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24407_ _24418_/D _24407_/C _24407_/A _24407_/B _24407_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_254_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18489__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21619_ _21619_/C _21619_/B _21621_/A _21619_/D _21677_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 X_28175_ _28175_/Q _30282_/CLK _28175_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22285__A2 _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25387_ _25385_/X _27051_/A _31280_/D _25386_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_161_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16951__S wire981/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25208__C1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22599_ _22594_/S _22614_/B _22599_/X _22599_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__14037__A _28460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20296__A1 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15140_ VGND VPWR _15627_/S _28096_/Q _29052_/Q _15140_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27126_ _27126_/X _31493_/Q _31485_/Q _31484_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_46_4122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_3847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31103__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24338_ _32016_/Q _19710_/B _24338_/X _31984_/Q _26364_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_172_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32229__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20473__S _20473_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19547__B _19547_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25223__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1027 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_2395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_81_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13876__A _28621_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29150__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15071_ _15070_/X _15640_/A1 _15332_/A2 _28786_/Q _15071_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23234__A1 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27057_ _26950_/C _27056_/X wire772/X _32006_/Q _32006_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_172_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22037__A2 _21586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24269_ VGND VPWR _24269_/X _31684_/Q _24269_/A _24269_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_4_233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3312_A _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1340 VPWR VGND wire1339/A _19717_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21245__A0 _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19989__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14022_ _28475_/Q _14022_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__28718__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26008_ _26687_/B _26007_/Y _26014_/A2 _31519_/Q _31519_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17449__C1 _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_190_2338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27256__S _27263_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23785__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25565__A _25565_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1373 VPWR VGND _19706_/B wire1374/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_27_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_133_2701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21796__A1 hold158/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31253__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_1003 _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2892 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18830_ _19375_/A2 _27863_/Q _19375_/B1 _18830_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__32379__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19563__A _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17464__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_113 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1014 _20786_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2737_A wire2737/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1025 hold104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25526__A3 _19447_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26723__A2 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_1036 hold29/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_4114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_1047 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24195__C1 wire1246/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_150_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23085__A _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_1058 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18761_ _19180_/B _28019_/Q _18761_/X _18760_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21o_4 XANTENNA__25931__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_3560 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15973_ VGND VPWR _16443_/S _29460_/Q _32114_/Q _15973_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27959_ _27959_/Q _30198_/CLK _27959_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_248_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_4557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18179__A _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22745__B1 _29735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28868__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output238_A _14033_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_5135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17712_ _31723_/Q _17539_/B _17712_/X _31722_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_76_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18413__A1 _28188_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17216__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14924_ VGND VPWR _15275_/S _32051_/Q _29110_/Q _14924_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19071__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30970_ _30970_/Q _32332_/CLK _30970_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18692_ _23304_/C _18692_/X _23348_/B _18691_/X _30378_/Q _23348_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_222_29 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15227__A1 _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold80 hk_dat_i[9] hold80/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_146_3818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26487__A1 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold91 hold91/A hold91/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_185_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18964__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_127_3217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_566 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29629_ _29629_/Q _32316_/CLK _29629_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17643_ _17874_/A2 _31710_/Q _17642_/X _17643_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_283_2745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14855_ _15610_/A2 _14855_/X _14854_/X _15277_/S _32308_/Q _15608_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_204_5542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_2253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_92_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_1009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14634__A1_N _14633_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13806_ _31140_/Q _13806_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4020_A _28708_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14986__B1 _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_3181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17574_ VGND VPWR _17574_/X _17530_/B _17532_/Y _17563_/B _17720_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_140_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27892__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14786_ _14781_/X wire1066/X _15236_/A1 _14785_/X _14786_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__20648__S _20650_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4118_A _28566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_1443 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26239__B2 _32298_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19913__A1 _28606_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18716__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19313_ _28141_/Q _19313_/X _19357_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_242_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22512__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16525_ VGND VPWR _16929_/S _29227_/Q _29291_/Q _16525_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_5053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_73_2150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13737_ _31759_/Q _13737_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xclkbuf_leaf_173_core_clk _31896_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17530__B _17530_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32571_ hold252/A _32571_/CLK input69/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_18_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16188__C1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27531__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21720__A1 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18118__S _18118_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_2453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_105_3559 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_5086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17022__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14738__A0 _29169_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29857__D _29857_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31522_ _31522_/Q _31522_/CLK _31522_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19244_ _28234_/Q _19244_/X _19335_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_53_2768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_102_core_clk _32113_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_239_4937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16456_ VGND VPWR _16918_/S _29602_/Q _29634_/Q _16456_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2448 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_5633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_2858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14202__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27658__C _31400_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28248__CLK _29389_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_4014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15407_ VGND VPWR _15702_/S _32064_/Q _29123_/Q _15407_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_160_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17957__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27020__A _31991_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2437_A _27265_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31453_ _31453_/Q _31467_/CLK _31453_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19175_ _28135_/Q _19175_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_220_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23473__A1 _28375_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22276__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19738__A _19738_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16387_ VGND VPWR _16387_/X _29053_/Q _16387_/A _16387_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16861__S _16942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15950__A2 wire917/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_196_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20287__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19141__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30404_ _30404_/Q _30404_/CLK _30404_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18126_ VGND VPWR _18150_/S wire3895/X _28054_/Q _28054_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_138_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_5248 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15338_ _15338_/X _15757_/C1 _15330_/X _15332_/X _15337_/Y _15319_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__20383__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31384_ VGND VPWR _31384_/D _32531_/CLK _31384_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__17152__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25214__A2 _29848_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__13786__A _31160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18057_ VGND VPWR _18077_/S wire3905/X _27987_/Q _27987_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30335_ VGND VPWR _30335_/D _32349_/CLK _30335_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__23225__A1 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15269_ _15761_/A2 _15269_/X _15268_/X _15521_/S _29321_/Q _15759_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__23225__B2 _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16360__C1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3660 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24568__A4 _25159_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28398__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20039__A1 _28666_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21236__A0 _29698_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2536 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_2257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17008_ _14334_/B _29877_/Q _29722_/Q _21459_/D _17010_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_151_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24973__A1 _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27166__S _27167_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold42_A hk_dat_i[12] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14910__B1 _15151_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29643__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30266_ _30266_/Q _30367_/CLK _30266_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_285_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_603 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_2110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21787__A1 hold162/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32005_ _32005_/Q _32431_/CLK _32005_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_214_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26175__B1 _26179_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18652__A1 wire3831/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25194__B _31041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1837_A wire1837/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30197_ _30197_/Q _30384_/CLK _30197_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23707__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14269__A2 _14127_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15466__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22611__B _22617_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16663__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30620__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31746__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18959_ _19203_/A2 _27869_/Q wire1942/A _18959_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_132_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_3341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_3915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_4154 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_273_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22736__B1 _21439_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23933__C1 _23932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2561 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_288_1933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_2633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29793__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18404__A1 _28179_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_3265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2644 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_167_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27124__C1 _25836_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16101__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21970_ _21624_/B _21969_/X _21501_/A _21712_/X _21970_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_227_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14410__A _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25922__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17424__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27675__A0 _25033_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21942__S _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18955__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20921_ _20920_/Y _18079_/S hold420/A _20921_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__23723__A wire768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_254_352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_4335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_149_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15769__A2 _14544_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26779__D_N _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25641__C _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_2353 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_2537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31896__CLK _31896_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25150__A1 _31209_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19412__S _19417_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_16 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23640_ VGND VPWR _29451_/D _23640_/D _23640_/X _27598_/C _20453_/C VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA_wire3120_A _17912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20852_ _30428_/Q _30431_/Q _30430_/Q _18551_/X _20851_/X _20852_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__22768__A_N _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29023__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23442__B _29372_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20558__S _20562_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18168__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_38 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_2015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27427__A0 _32271_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23161__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19904__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18536__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_19_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23700__A2 _19716_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23571_ VGND VPWR _23582_/S _23647_/A1 _30491_/Q _30491_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_143_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16718__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20783_ VGND VPWR _20783_/S _27705_/A1 _29297_/Q _29297_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18028__S _18051_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3716 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1549 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25310_ VGND VPWR _25325_/D _31264_/Q _31265_/Q _25310_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__18183__A3 wire3904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19380__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22522_ VGND VPWR _23529_/S _29811_/Q _30022_/Q _30022_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30000__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31126__CLK _32529_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25989__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26290_ _26289_/Y _27117_/C1 _31633_/Q _26301_/B _31633_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_225_1961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16194__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17391__A1 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24554__A _31199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17391__B2 _17441_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_277_4485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_1251 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25241_ _25241_/X _25263_/B1 _17389_/X _31237_/Q _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__29173__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22453_ _22452_/X wire3112/A _22448_/X _29987_/Q _29987_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_14_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19648__A _19648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32193__D _32193_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16771__S _16929_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3587_A wire3588/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14744__A3 wire1705/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18552__A _30427_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_3161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20278__A1 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24273__B _24284_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21404_ _21679_/C _21404_/A _21486_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_178_2458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25172_ _25180_/D _31216_/Q _25172_/A _31215_/Q _31217_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XANTENNA__20293__S _20294_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22384_ _22384_/B _22384_/Y _22384_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_85_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_156_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_2750 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26402__A1 _31688_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25205__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30150__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24123_ _24123_/X _20669_/B _19928_/B _28636_/Q _31114_/Q _24165_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_5_5513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31276__CLK _31998_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21335_ _21335_/Y _21336_/C _21336_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_195_2772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_30_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23216__A1 _30208_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29980_ VGND VPWR _29980_/D _32294_/CLK _29980_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_116_5580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24413__B1 _31008_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27584__B _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4204 VPWR VGND _30568_/D wire4204/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3408 wire3412/X _26159_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32521__CLK _32523_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3419 wire3425/X _26544_/C1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27322__A_N _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_134_3733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24964__A1 _31126_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28931_ _28931_/Q _32064_/CLK _28931_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24054_ _30871_/D _24199_/B1 _24053_/X _24048_/X _24046_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XFILLER_5_4823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2087 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_5045 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21266_ VGND VPWR _23226_/S _29728_/Q _30444_/Q _29728_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_156_2778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_3345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_2166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_2669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout972_A wire981/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27589__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3514 VPWR VGND wire3514/X _31095_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_82_2953 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_28_3195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23005_ VGND VPWR _31395_/Q _23004_/X _23003_/X _23005_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_60_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20217_ VGND VPWR _20218_/S _28762_/Q _27507_/A1 _28762_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_opt_22_1_core_clk clkbuf_opt_22_1_core_clk/X clkbuf_opt_22_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__18643__A1 _23286_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3536 wire3536/A wire3536/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__17446__A2 _31933_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_1509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28862_ _28862_/Q _32444_/CLK _28862_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21197_ VGND VPWR _21199_/S _29639_/Q _27509_/A1 _29639_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_2480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25508__A3 _31334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21873__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_37_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2813 VPWR VGND wire2813/X _25512_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3558 VPWR VGND _17272_/A wire3558/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3569 VPWR VGND wire3569/X _30875_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_106_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24177__C1 _24176_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15457__B2 _15638_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27813_ VGND VPWR _25797_/X _32531_/Q _27844_/C _27813_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire2835 VPWR VGND _23300_/S _23301_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_20148_ _25904_/A _20147_/Y _20168_/A2 _28718_/Q _28718_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25913__B1 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4445 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28793_ _28793_/Q _32436_/CLK _28793_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_60_3996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2857 VPWR VGND _21201_/S _21202_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_237_319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_249_4587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2868 VPWR VGND _21139_/S _21134_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23924__C1 _23923_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_5280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2879 VPWR VGND _20784_/S _20772_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24192__A2 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27744_ VGND VPWR _27747_/S _32473_/Q _19937_/B _32473_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27115__C1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2053_A wire2053/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24956_ _25810_/C _24955_/Y _24955_/A _31122_/Q _31122_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20079_ _26179_/B1 _20078_/Y _20106_/A _28685_/Q _28685_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_246_842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14320__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input136_A la_input[67] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15209__A1 _15350_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22948__S _22954_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27666__A0 _32403_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26469__A1 _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20202__A1 _28747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4240 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_11_0_core_clk clkbuf_5_11_1_core_clk/A clkbuf_4_5_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_76_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23633__A _26837_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23907_ wire4130/X _20126_/X _23906_/X _28711_/Q _23907_/X _24178_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_22_2093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_4885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_3810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27675_ VGND VPWR _27677_/S _32410_/Q _25033_/B _32410_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_41_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16957__A1 _28435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24887_ _26184_/A _24886_/Y _24881_/X _31089_/Q _31089_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25551__C _31352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_401 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16957__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21950__A1 hold281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_0_core_clk _29697_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_max_cap3105_A _24805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_412 wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29414_ _29414_/Q _30430_/CLK _29414_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25141__A1 _31205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14640_ VGND VPWR _15275_/S _29457_/Q _32111_/Q _14640_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2220_A _19554_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26626_ _26678_/B _31780_/D _26624_/X _27087_/C1 _31885_/Q _26625_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_243_3441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_423 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16421__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23838_ _23838_/X _24317_/C _26949_/A _31889_/Q _31857_/Q wire1605/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_260_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_2156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_434 wire725/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20468__S _20484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2318_A wire2319/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27418__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_445 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15090__C1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23152__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14432__A2 _14429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19356__C1 _19355_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_456 wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_467 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29345_ _29345_/Q _30446_/CLK _29345_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14571_ VGND VPWR _15629_/A2 _30485_/Q _14642_/S _14571_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_26557_ VGND VPWR _14194_/Y _19503_/A _26543_/B _26557_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_478 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16709__A1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23769_ _31790_/Q _31789_/Q _26660_/B _26668_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or3b_2 XFILLER_243_2762 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29516__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_489 wire707/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22360__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16310_ wire923/X _16306_/X _16309_/X _16727_/B1 _16310_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_5237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_4271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25508_ VGND VPWR _31334_/Q _19499_/C _31332_/Q _25508_/X _25454_/A _31333_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_242_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17290_ _30966_/Q _17290_/Y _30932_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 X_29276_ _29276_/Q _32114_/CLK _29276_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26488_ _26488_/B _17481_/Y _26488_/A _26488_/X _26488_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__16185__A2 _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17382__A1 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32051__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19910__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24464__A _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25444__A2 _31362_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24101__C1 wire808/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16241_ _16791_/A2 wire3278/X _30783_/Q _16241_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14196__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28227_ _28227_/Q _32320_/CLK _28227_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25439_ _25430_/A _31300_/Q _24502_/X _24543_/D _25439_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_100_3423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19558__A _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22258__A2 _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16681__S wire979/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16590__C1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31619__CLK _31760_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2687_A wire2688/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_5251 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20269__A1 wire2001/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3527_A hold488/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21466__B1 _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16172_ _16725_/A _16725_/C _28847_/Q _16172_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__28540__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28158_ _28158_/Q _32078_/CLK _28158_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27775__A _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29666__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17134__A1 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18331__B1 _18260_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18181__B _30326_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_76_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27084__D_N wire2194/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23155__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15123_ VGND VPWR _15123_/X _15120_/X _15122_/X _15368_/S _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19708__D _20122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27109_ _26236_/A _27108_/X _27117_/A2 _32032_/Q _32032_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17078__A _29885_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15145__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28089_ _28089_/Q _32349_/CLK _28089_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2854_A _21184_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26944__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_2391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_4889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_3931 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_1701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14499__A2 _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15696__A1 _15752_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30120_ _30120_/Q _30453_/CLK _30120_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_156_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19931_ _25041_/A wire1316/X _19931_/X _25025_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_46_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15054_ VGND VPWR _15639_/S _29220_/Q _29284_/Q _15054_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30643__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3920 wire3922/X _22061_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31769__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3727 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20931__S _20931_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22966__A0 _30143_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22712__A _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_5333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_1865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14005_ _28492_/Q _14005_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__28690__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30051_ _30051_/Q _30051_/CLK _30051_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18634__A1 wire3888/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26157__B1 _26159_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17437__A2 input195/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_3148 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_2179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19862_ VGND VPWR _26838_/A3 _26687_/D _25738_/B _19862_/X _26159_/A _20128_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__22430__A2 _30406_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3839 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19831__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19977__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3986 VPWR VGND wire3987/A _29386_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19724__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4068_A wire4069/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22431__B _30285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24168__C1 _24167_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18813_ VGND VPWR _18813_/X _19374_/B _19278_/S _28022_/Q _18812_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_267_5399 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27714__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21328__A _21328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24550__D_N _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_2165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output522_A _31108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19793_ _19849_/B _24441_/C _20654_/D _19793_/X _27120_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_233_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15999__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30793__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_3620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24183__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18744_ _18743_/X _19380_/B1 _19298_/A2 _28146_/Q _18744_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_0_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16660__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15956_ VGND VPWR _16443_/S _28408_/Q _29073_/Q _15956_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29046__CLK _32311_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14230__A _17881_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput170 VGND VPWR _30560_/D la_input[98] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA__27657__A0 _32396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23391__B1 _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22194__B2 _30039_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput181 VPWR VGND mprj_dat_i[16] input181/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 XANTENNA__18937__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14907_ _15223_/A _15575_/C _29464_/Q _14907_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23930__A2 _19857_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput192 mprj_dat_i[26] input192/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_263_3839 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_94_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19740__B _19760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18675_ _30331_/Q _18675_/X _29811_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 Xclkbuf_leaf_354_core_clk _31904_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_30953_ _30953_/Q _31679_/CLK _30953_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_2839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_168_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_3347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15887_ VGND VPWR wire969/X _32303_/Q _28911_/Q _15887_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_261_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_2223 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_1948 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_2351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17626_ VGND VPWR _17720_/S _17625_/X _17583_/Y _17626_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_4013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30023__CLK _30285_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14959__B1 _15350_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16412__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14838_ wire1541/X _15620_/A1 _29044_/Q _14838_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__31149__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20378__S _20384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30884_ _30884_/Q _32296_/CLK wire709/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27409__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25180__D _25180_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23143__B1 _23142_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14423__A2 _14429_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15620__A1 _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25683__A2 _27597_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21063__A hold328/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2395 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28070__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17557_ _31710_/D _17555_/X _17556_/X _17554_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_124_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_1213 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_5473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22497__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14769_ _15597_/A2 _14769_/X _14768_/X _15233_/B1 _28842_/Q wire1506/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__19898__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27669__B _27739_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24891__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_1115 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_990 _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19362__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16508_ VGND VPWR _16826_/S _28856_/Q _28888_/Q _16508_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_31_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32554_ hold419/A _32554_/CLK input39/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_2392 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28491__D _28491_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17488_ _17852_/A _17488_/A _17488_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_4 XANTENNA__22593__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16176__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17373__A1 _30945_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_334_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18570__B1 hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25435__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26632__A1 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_122_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30173__CLK _30386_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14187__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19227_ _30276_/Q _19227_/X _19306_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31505_ _31505_/Q _31798_/CLK _31505_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_4472 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_3009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31299__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_4193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16439_ VGND VPWR _16443_/S _32059_/Q _29118_/Q _16439_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15384__B1 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22249__A2 _29835_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23446__A1 _29363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21045__A_N _30419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16591__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32485_ _32485_/Q _32545_/CLK _32485_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30526__D input62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16581__C1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15923__A2 _16026_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23446__B2 wire3993/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2335 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32544__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_140_2579 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31436_ _31436_/Q _31436_/CLK _31436_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23997__A2 _19718_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19158_ VGND VPWR _19202_/B _28198_/Q _28230_/Q _19158_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_2368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17125__A1 _30003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_2885 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18322__B1 wire3175/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21002__S _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18109_ VGND VPWR _18109_/S wire3841/X _28038_/Q _28038_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25199__A1 hold105/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18873__A1 _28379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31367_ _31367_/Q _31369_/CLK _31367_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19089_ VGND VPWR wire1816/X _19087_/X _19109_/S _19089_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_236_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26935__A2 _26936_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25917__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_4194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_5108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput600 _28701_/Q la_output[88] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21209__A0 _22614_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20126__B _20126_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15000__S _15716_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput611 _28647_/Q la_output[98] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21120_ VGND VPWR _21131_/S _21153_/A0 _29564_/Q _29564_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_70_core_clk _31470_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24946__A1 _31117_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput622 _24380_/B mprj_adr_o[18] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30318_ _30318_/Q _30339_/CLK _30318_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_251_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_153_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput633 _24600_/B mprj_adr_o[29] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_3324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_4620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31298_ _31298_/Q _32580_/CLK _31298_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_151_4066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput644 _17898_/X mprj_cyc_o VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_275_1380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1020_A wire1021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput655 _14165_/X mprj_dat_o[19] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24410__A3 _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2996_A _18434_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15935__S wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24540__C _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput666 wire2734/X mprj_dat_o[29] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21051_ _21051_/Y _30045_/Q _21051_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__19407__S _19407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17428__A2 hold13/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18625__A1 _18625_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18673__C_N _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3070_A _18052_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput677 wire3108/X mprj_sel_o[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30249_ _30249_/Q _31920_/CLK _30249_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21224__A3 _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22421__A2 _22025_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_3706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput688 wire3193/X ser_tx VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xwire2109 wire2110/X wire2109/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_186_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput699 wire3519/X user_irq_ena[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_25_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_3097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26699__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20002_ VGND VPWR wire2638/X _19522_/A _20028_/A _20002_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_249_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_222_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_151_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27624__S _27630_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_2664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1408 VPWR VGND _23529_/S _23525_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16100__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1419 VPWR VGND _23515_/S _18661_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_190_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_59_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24810_ _26509_/D _24809_/Y _24809_/C _31052_/Q _31052_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26748__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25371__A1 _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24174__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19931__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25371__B2 _31277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25790_ VGND VPWR _25793_/S _31425_/Q _31426_/Q _31425_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18389__A0 _28166_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_168_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_149_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19586__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18928__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_35_0_core_clk clkbuf_opt_35_1_core_clk/A clkbuf_5_30_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_184_3141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20196__A0 _27679_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19050__A1 _28161_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24741_ VGND VPWR _24770_/A _31471_/Q _24689_/B _24742_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23921__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1487_A wire1488/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21953_ _21953_/X _22026_/B1 _22838_/A wire3933/X _21953_/A2 VGND VPWR _22046_/A + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_77_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19650__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16939__A1 _29615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28413__CLK _32422_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21932__A1 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16939__B2 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_205_5169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_373_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_2724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3016 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25123__A1 _31199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4271 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20904_ VGND VPWR _20906_/S _30250_/Q hold375/X hold376/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_19_2405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_5461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27460_ VGND VPWR _27476_/S _32288_/Q _27459_/X _32288_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17600__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26320__B1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24672_ _24673_/B _24672_/B _24674_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_184_2462 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20288__S _20294_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21884_ _21649_/Y _21883_/Y _21648_/X _21956_/A _21884_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__32074__CLK _32074_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14414__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15611__A1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19338__C1 wire1563/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23603__D _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_5494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_123_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26411_ VGND VPWR _26411_/X _26408_/Y _31690_/Q _26427_/B _31689_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_240_3625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23623_ VGND VPWR _24856_/C _32559_/Q _23623_/B VGND VPWR NF_sky130_fd_sc_hd__xnor2_2 XFILLER_90_3967 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20986__A1_N _16979_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20835_ VGND VPWR _29348_/D _20834_/Y _20836_/B _20837_/S _20833_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_197_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27391_ VGND VPWR _27394_/S _32241_/Q _27274_/X _32241_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22488__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23685__A1 _31496_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_1482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18981__S _18982_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23685__B2 _31572_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20499__A1 _21153_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29130_ _29130_/Q _32064_/CLK _29130_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19353__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26342_ VGND VPWR _27053_/B _24273_/D _19539_/X wire779/A _26999_/A _26364_/A1 VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_257_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23554_ VGND VPWR _23560_/S _30475_/Q _30045_/Q _30475_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28563__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold131_A hold131/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20766_ VGND VPWR _20780_/S _27688_/A1 _29280_/Q _29280_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_leaf_110_core_clk_A clkbuf_5_7_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29689__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16167__A2 _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17364__A1 _17432_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold229_A hold229/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18561__B1 _20847_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17364__B2 _17433_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26623__A1 _31779_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25426__A2 _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14178__A1 _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27820__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22505_ _23417_/A _22504_/X _22511_/A2 _17205_/X _30013_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_66_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29061_ _29061_/Q _30911_/CLK _29061_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length1919_A _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15375__B1 _29186_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3871_A _29853_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26273_ VGND VPWR _14209_/Y _19503_/A _26301_/B _26273_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire705 VPWR VGND wire705/X wire705/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23437__A1 _29815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23485_ VGND VPWR _23485_/S _28381_/Q _30429_/Q _23485_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15914__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire716 VPWR VGND wire716/X wire716/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_251_5101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24634__B1 _17895_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23437__B2 _13848_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20697_ VGND VPWR _20708_/S _29213_/Q _23647_/A1 _29213_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire3969_A _23199_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire727 VPWR VGND wire727/X wire728/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_101_3754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19105__A2 _19094_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_5522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_1986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28012_ _28012_/Q _30279_/CLK _28012_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire738 VPWR VGND wire738/X wire738/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25224_ _26242_/A _25223_/X _25264_/A2 hold97/A _31236_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_88_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23988__A2 wire1622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22436_ _29984_/Q _29983_/Q _29985_/Q _22445_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 Xwire749 VPWR VGND wire749/X wire749/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__30666__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17116__A1 _29890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24434__D _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18313__A0 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27179__A2 _32081_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_1677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17116__B2 _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21999__A1 hold428/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31911__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19528__D _20682_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26712__A_N _31771_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_261_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25155_ VGND VPWR _31211_/D _24565_/B _25148_/A _31211_/Q _25154_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18864__A1 _19368_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26387__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17667__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22367_ _29933_/D _22385_/B1 _30472_/Q hold234/A _22356_/B VGND VPWR _22366_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_82_4163 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14315__A _17077_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4575 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_4242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_82_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_1117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15678__A1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20036__B _25063_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4001 VPWR VGND _21548_/B _29354_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_156_2542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_191_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3205 _14408_/Y wire3206/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_24106_ _30876_/D _24104_/X _24199_/B1 _24101_/X _24105_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__16875__B1 wire963/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4012 VPWR VGND wire4012/X _28728_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_251_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21318_ _21640_/B _29731_/Q _21462_/B _21427_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_2 XFILLER_43_3413 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_2444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire4023 VPWR VGND wire4023/X wire4024/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25086_ _25703_/A _25085_/X _25086_/A2 _31186_/Q _31186_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29963_ _29963_/Q _31927_/CLK _29963_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20751__S _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22298_ VGND VPWR _23373_/S _29884_/Q hold224/X _29884_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24223__S _24223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4034 VPWR VGND wire4034/X wire4035/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_191_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4045 VPWR VGND wire4045/X _28668_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_7_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31267__D _31267_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_156_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4056 wire4057/X wire4056/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14350__A1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28914_ _28914_/Q _32114_/CLK _28914_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5041 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24037_ _24037_/X _24035_/X _28532_/Q _24163_/B2 _24184_/A2 VGND VPWR _24036_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18616__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_3738 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4067 wire4068/X wire4067/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21249_ VGND VPWR _23226_/S _29711_/Q _30427_/Q _29711_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire2170_A _20171_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold380 hold380/A hold380/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_264_5506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23347__B _23347_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19813__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_210_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29894_ _29894_/Q _32442_/CLK _29894_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xwire4078 VPWR VGND wire4078/X _28656_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__29069__CLK _32388_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19959__A4 _25022_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold391 hold391/A hold391/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_232_2441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4089 VPWR VGND wire4089/X wire4090/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_4517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20423__A1 _28943_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25265__D _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2610 VPWR VGND _24459_/C wire2611/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_2_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_5539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21620__B1 _21619_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire3366 VPWR VGND wire3366/X _13867_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire2621 VPWR VGND _24588_/B _14220_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1825 VPWR VGND wire1826/A _18242_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25843__A _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28845_ _28845_/Q _32342_/CLK _28845_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire3377 VPWR VGND wire3377/X _13759_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2632 VPWR VGND _19534_/B _19535_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1836 VPWR VGND wire1837/A _18172_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_112_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2643 VPWR VGND _19546_/B _19547_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_38_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_1527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3388 VPWR VGND wire3388/X wire3389/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_284_4253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25898__C1 _25745_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2654 VPWR VGND _19559_/B wire2655/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_3462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3399 wire3399/X _32379_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xfanout1858 _14404_/X _22954_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_169_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15810_ _15810_/X _32341_/Q _16026_/A2 _16039_/B2 _16039_/C1 _15809_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_169_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24165__A2 wire1810/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout871 VPWR VGND _19638_/A _19609_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2665 VPWR VGND _19570_/B _14183_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_21_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1931 VPWR VGND wire1931/X wire1931/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_73_5534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2676 VPWR VGND _19581_/B _14174_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30046__CLK _30139_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16790_ VGND VPWR _16837_/S _29482_/Q _32136_/Q _16790_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28776_ _28776_/Q _32403_/CLK _28776_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14050__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_169_2936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1942 wire1942/X wire1942/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_125_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2687 wire2688/X _19590_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_25988_ _27131_/B _25987_/Y _26015_/A _31509_/Q _31509_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_237_149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_8_1695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24459__A _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2698 VPWR VGND wire2698/X hold137/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_2548 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32417__CLK _32417_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15850__B2 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27855__B1_N _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15741_ _30516_/Q _15740_/X _15741_/Y _15756_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__23912__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27727_ VGND VPWR _27728_/S wire2222/A _32459_/Q _32459_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19041__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28093__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27537__A1_N _27535_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1975 VPWR VGND _19333_/B wire1975/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_max_length3669_A _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24939_ _24939_/Y _24939_/B _24941_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_37_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27218__A_N _25773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32098__D _32098_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27103__A2 wire772/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_4390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_4513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_128_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21923__A1 hold354/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1997 VPWR VGND wire1997/X _18678_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_245_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15580__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_5269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19052__S _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19592__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18460_ VGND VPWR _18460_/S wire3830/X _28234_/Q _28234_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_76_3299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15672_ _15671_/X _15705_/A1 _15721_/A2 _28802_/Q _15672_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27658_ _27667_/S _31399_/Q _31400_/Q _27658_/B _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_145_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20198__S _20202_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_220 hold123/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_5523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14405__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_231 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28906__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15602__A1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26674__A _26674_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_19_3662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26862__A1 _26866_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17411_ _17411_/C hold23/X _29865_/D _17411_/B _14401_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA_242 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14623_ _14623_/X _14887_/A2 _14622_/X _29102_/Q wire1508/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__30196__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26609_ _26684_/A2 _31849_/Q _26608_/Y _26609_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_204_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_253 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18391_ VGND VPWR _18398_/S wire3836/X _28168_/Q _28168_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_275_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22479__A2 _22511_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_264 _30553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27589_ _25643_/C _32228_/Q _27589_/X _25643_/B _32220_/Q _32236_/Q _32212_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_15_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_275 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31441__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_286 wire1298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32567__CLK _32567_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19344__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17342_ _17432_/B2 input178/X _17342_/X _17433_/A1 hold84/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_29328_ _29328_/Q _32438_/CLK _29328_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_297 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_2983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_3507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14554_ _14546_/A wire1732/X _14554_/X _15628_/A2 _29552_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 Xclkbuf_4_15_0_core_clk clkbuf_5_31_0_core_clk/A clkbuf_3_7_2_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xclkbuf_3_4_2_core_clk clkbuf_4_9_0_core_clk/A clkbuf_3_4_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_163_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23810__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16158__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17355__A1 wire3555/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20926__S _20928_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17355__B2 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29200__D wire835/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14169__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27811__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21611__A _21611_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17273_ _17447_/A1 input199/X _17278_/A _17447_/B2 wire4183/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA_wire2971_A _18601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29259_ _29259_/Q _32433_/CLK _29259_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27930__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14485_ _14465_/X _14485_/Y _14484_/Y _14470_/Y _14468_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_2 XFILLER_239_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16563__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14924__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24625__B1 _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18192__A _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_2598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19012_ _19202_/B _27903_/Q _19011_/X _19012_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_87_3340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_2948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_5381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_67_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_204_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2159 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16224_ _16841_/A2 _16224_/X _16223_/X wire958/X _32424_/Q _16642_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_clkbuf_leaf_199_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23979__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32270_ VGND VPWR _32270_/D _32554_/CLK _32270_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_239_2628 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_2677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27709__S _27709_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17107__A1 _29889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18304__A0 _27258_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_2519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31591__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17107__B2 _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22100__A1 wire2273/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_2920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_157_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31221_ _31221_/Q _31553_/CLK _31221_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_174_3343 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_196_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_4088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16155_ _16206_/A2 wire1485/X _29217_/Q _16155_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_2098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26378__B1 _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18855__A1 _28315_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21454__A3 _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26917__A2 wire1573/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4185_A hold62/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14225__A _24446_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15669__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24641__B _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19941__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20662__A1 wire3401/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15106_ _15101_/X wire1072/X _15745_/A1 _15105_/X _15106_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__16866__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24928__A1 _31108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31152_ _31152_/Q _31460_/CLK _31152_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_155_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20662__B2 _31415_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16086_ _16085_/X _16825_/S wire989/X _29463_/Q _16086_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_256_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2784 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16330__A2 _16725_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_528 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_2558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14877__C1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30103_ _30103_/Q _30204_/CLK _30103_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_26_2921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15037_ _14544_/A wire1733/X _15037_/X _15628_/A2 _29113_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_19914_ VGND VPWR _26890_/B _19520_/B _25980_/A2 _19914_/X _27091_/C1 _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18607__A1 _18607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3750 VPWR VGND wire3751/A _30222_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire1270_A _26694_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31083_ _31083_/Q _31375_/CLK _31083_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18131__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3772 VPWR VGND _22484_/A2 _30085_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_268_230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20414__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29870__D _29870_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14892__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19875__B1_N _19874_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27444__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30034_ _30034_/Q _30484_/CLK _30034_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1548 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19845_ VGND VPWR _20114_/B _20061_/C _19853_/A2 _19845_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_4_3440 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_263 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_2984 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4916 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_130_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28436__CLK _32438_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_1004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_26_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17970__S _17974_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31905__D _31905_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24156__A2 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17830__A2 _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19776_ _19776_/B _19718_/A _19776_/A _19776_/X _19776_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_94_3311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16988_ _14353_/B _16987_/X _16988_/Y _17078_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22588__S _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22167__A1 _22167_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_1172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32097__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23903__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1914 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18727_ VGND VPWR _18727_/X _19374_/B _19380_/B1 _27890_/Q _18726_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_74_3918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_417 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15939_ _15939_/X _29620_/Q _16026_/A2 wire1458/X wire951/X _15938_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_283_277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_3013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_3636 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16586__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30539__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31985_ _31985_/Q _32319_/CLK _31985_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21914__A1 _21561_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_4059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25105__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19583__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1702_A _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26302__B1 _27117_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30936_ _30936_/Q _32014_/CLK _30936_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18658_ VGND VPWR _18658_/S _23301_/A1 _28371_/Q _28371_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21505__B _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28586__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18791__A0 _28213_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16397__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23116__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1368 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25656__A2 _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_222_3311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29831__CLK _30475_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17609_ _17609_/X _17873_/B1 _31707_/Q _31711_/Q _17874_/A2 VGND VPWR _17608_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_72_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23667__A1 _27512_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30867_ _30867_/Q _31801_/CLK _30867_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18589_ _22378_/B _22338_/A _21099_/C _23145_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_222_3333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_18_3172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_2788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_1021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire890_A wire890/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24816__B _31699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20620_ VGND VPWR _20625_/S wire1837/X _29166_/Q _29166_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21678__B1 _21679_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32606_ VPWR VGND _32606_/X _32606_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_162_2067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_57 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30689__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23720__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16149__A2 _16149_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30798_ _30798_/Q _32309_/CLK _30798_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18543__B1 _30424_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3175 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_4531 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_3232 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19886__A3 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23212__S _23212_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23682__A4 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20350__A0 _28890_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15357__B1 _15530_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20551_ VGND VPWR _20551_/S _29068_/Q _27710_/A1 _29068_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32537_ VGND VPWR _32537_/D _32537_/CLK _32537_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_66_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24616__B1 _19505_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3319 VPWR VGND _25687_/B1 _25660_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22890__A2 _30476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_5421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29981__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19099__A1 _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23270_ VGND VPWR _23296_/S wire3916/X _30252_/Q _30252_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27619__S _27621_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32468_ _32468_/Q _32550_/CLK _32468_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24092__A1 _31111_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20482_ VGND VPWR _20482_/S _29001_/Q wire1783/X _29001_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_157_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24092__B2 _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27846__C _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_2176 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_4851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22221_ _22221_/C _22241_/D _22221_/A _22221_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XANTENNA__15109__B1 _15751_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14580__A1 wire3249/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31419_ _31419_/Q _32225_/CLK _31419_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20585__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19926__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3285_A wire3287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32399_ _32399_/Q _32550_/CLK _32399_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14135__A _20673_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27030__A1 hold500/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20653__A1 _31190_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_2002 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_3197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24919__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29211__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22152_ VGND VPWR _22280_/S _30297_/Q _30387_/Q _22152_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20653__B2 wire3622/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3159 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_2707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20571__S _20576_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19645__B _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16321__A2 _16934_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput430 _13819_/Y la_oenb[4] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_2365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_25_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput441 _13818_/Y la_oenb[5] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21103_ _21103_/C _21103_/A _22433_/B _21103_/B _21102_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_82_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4215 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput452 _13817_/Y la_oenb[6] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_216_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_187_5640 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25592__A1 _31250_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput463 _13816_/Y la_oenb[7] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_22083_ hold230/A _23533_/S _29810_/D _22621_/B _22076_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_wire3452_A wire3452/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26960_ VGND VPWR _27001_/A _31983_/Q _31984_/Q _31982_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__19256__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18041__S _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_5602 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30069__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_1615 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput474 _13815_/Y la_oenb[8] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xoutput485 _13814_/Y la_oenb[9] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__20405__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14883__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput496 _28658_/Q la_output[109] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_251_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25911_ VGND VPWR _19577_/B _19628_/A _25911_/B1 _25911_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_21034_ VGND VPWR _21034_/S _30033_/Q _29498_/Q _29498_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21602__B1 _21603_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27354__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_5_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19271__A1 _28171_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_276_core_clk _31912_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_26891_ _26218_/A _26890_/Y _26900_/A _31895_/Q _31895_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_281_5127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_116_2581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1047 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16085__A1 _15770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29361__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26478__B _26488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28630_ _28630_/Q _32541_/CLK _28630_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_112_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24147__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19008__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_4205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_1069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25842_ VGND VPWR _25847_/C _31443_/Q _31442_/Q _31444_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_5_2569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_205_core_clk _32107_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__28396__D _28396_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22158__A1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_4557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1249 VPWR VGND wire1249/X _24159_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15293__C1 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28929__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_4118 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_3725 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28561_ _28561_/Q _32553_/CLK _28561_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_3_2260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25773_ VGND VPWR _25774_/C _32103_/Q _32102_/Q _25773_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_262_3113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22985_ wire3479/A _32454_/Q _22985_/X _23036_/S1 _32446_/Q _32462_/Q _32406_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_234_119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21905__A1 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout935_A _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_1582 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31464__CLK _31470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27097__A1 _26815_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27512_ VGND VPWR _27516_/S _27512_/A1 _32327_/Q _32327_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_77_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24724_ _24724_/Y _31563_/Q _31564_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_0_3893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21936_ VGND VPWR hold250/A _21934_/Y _21935_/X _29794_/D _22074_/B1 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_28492_ _28492_/Q _31570_/CLK _28492_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_227_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_77_2874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_3840 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16388__A2 _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27729__B_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23107__B1 wire2842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26844__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27443_ VGND VPWR _27475_/S _32278_/Q _32279_/Q _27443_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_4276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24655_ VGND VPWR _24674_/A _31466_/Q _31467_/Q _24656_/B VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_259_4907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23658__A1 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21867_ _21903_/A wire728/A _21866_/Y _21865_/X _21864_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_2 XANTENNA__27953__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_240_3433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_93_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5611 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_3805 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19326__A2 _19319_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23606_ VGND VPWR _31066_/Q _31062_/Q _31065_/Q _23607_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21669__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20818_ VGND VPWR _20819_/S _29331_/Q _27707_/A1 _29331_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27374_ VGND VPWR _27375_/S _32227_/Q _27278_/X _32227_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24586_ _24586_/Y _24586_/B _31550_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__xnor2_4 XFILLER_257_5354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27102__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_1886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20746__S _20755_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21798_ _21798_/X _21472_/C _21381_/B _21381_/A _21653_/A _21472_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_145_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24218__S _24223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19731__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29113_ _29113_/Q _32320_/CLK _29113_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length3152_A _23355_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26325_ VGND VPWR _14153_/Y _19792_/A _26327_/B _26325_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XPHY_978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_2191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15348__B1 wire1065/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23537_ VGND VPWR _23560_/S _30458_/Q _30028_/Q _30458_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_4653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20749_ VGND VPWR _20749_/S _27624_/A1 _29264_/Q _29264_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15899__A1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28309__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29044_ _29044_/Q _30492_/CLK _29044_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_193_3218 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1228 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14270_ wire3491/X _14127_/A _14270_/X wire3235/A _29494_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_26256_ _26509_/D _26255_/X _26263_/A wire3463/X _31616_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_197_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_4987 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24083__A1 _28664_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23468_ VGND VPWR _23518_/S _23467_/X _31938_/Q _30420_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_101_3573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22961__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3853 VPWR VGND _18644_/A1 _23287_/A1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25207_ _25207_/X _25261_/B1 _17286_/X _31360_/Q _25263_/A2 VGND VPWR _25261_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22094__B1 _29815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22419_ VGND VPWR _22598_/S _29974_/Q _22014_/X _29974_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18837__A1 wire4160/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26187_ _31582_/Q _24820_/B _26188_/B _32272_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_158_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_3677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23399_ _28305_/Q _20980_/S _30373_/D _23304_/B _30373_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_wire2385_A _14171_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3225_A _21471_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_251_4252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20644__A1 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16848__B1 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_4886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25138_ _25138_/X _31203_/Q _31205_/Q _31204_/Q _25142_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_171_3538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout3002 VPWR VGND _18466_/S _18434_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_input64_A la_input[117] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20481__S _20481_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19555__B _19555_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16312__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_2361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28459__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4703 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_212_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13884__A _28613_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2301 VPWR VGND wire2302/A wire2308/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19047__S _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23189__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25583__A1 hold105/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17960_ VGND VPWR _17981_/S wire3885/X _27897_/Q _27897_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_191_2274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25069_ _25081_/A _24939_/B _25069_/X _25069_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 Xfanout3057 VPWR VGND _18083_/S _18054_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__29704__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29946_ _29946_/Q _31955_/CLK _29946_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout2312 VPWR VGND _17913_/D _14274_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_40_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25583__B2 _31233_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_1993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3945 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3068 VPWR VGND _18052_/S _18020_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_254_1261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_4461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3079 _17951_/X _17981_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__27122__D_N _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14874__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3141 VPWR VGND _23518_/S _23526_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19798__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16911_ _16910_/X _16884_/S _16911_/A2 _29035_/Q _16911_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_266_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27264__S _27264_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19262__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4253 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_4310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17891_ _17891_/Y _17891_/A _17891_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 Xwire3163 _22243_/A _18666_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_29877_ VGND VPWR _29877_/D _30446_/CLK _29877_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_267_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3174 wire3174/A wire3174/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_130_2512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_21_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_5309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2440 VPWR VGND wire2440/X _27233_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3185 VPWR VGND wire3185/X _17267_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_267_3035 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17273__B1 wire4183/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24138__A2 _24136_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19630_ _27087_/C1 _19629_/Y _19638_/A _28481_/Q _28481_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__25335__A1 _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3196 VPWR VGND wire3196/X _17242_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_16842_ VGND VPWR _16842_/S _28865_/Q _28897_/Q _16842_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_21_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1655 wire1660/X wire1656/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_28828_ _28828_/Q _30583_/CLK _28828_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__31807__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26532__B1 _31751_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22149__A1 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2473 VPWR VGND _21168_/S _21169_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_265_244 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_2057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1677 _18586_/X wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_264_4657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_4327 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14626__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_3300 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_3923 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_5060 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25886__A2 _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_95_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1750 VPWR VGND wire1750/X _23236_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1699 _18661_/B _16544_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__29854__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19561_ _27059_/C1 _19560_/Y _19638_/A _28461_/Q _28461_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21606__A _21966_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19600__A_N _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16773_ wire992/A _16773_/X _16772_/X _16736_/S _28430_/Q _16966_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_28759_ _28759_/Q _32557_/CLK _28759_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_4911 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_3732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23897__A1 wire4131/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1772 VPWR VGND wire1772/X wire1773/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13985_ _28512_/Q _13985_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_56_3626 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23897__B2 wire4018/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1783 VPWR VGND wire1783/X wire1783/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_245_4089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18512_ VGND VPWR _18512_/S wire3873/X _28284_/Q _28284_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19565__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_4993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15724_ _15724_/X _15721_/X _15745_/A1 _15749_/C1 _15723_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_31770_ _31770_/Q _31879_/CLK hold330/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19492_ VGND VPWR _19492_/X _31322_/Q _25488_/A _31323_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_core.RAM256_WE0[3] wire1444/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16379__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25099__B1 _31192_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17522__C _24817_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4392 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4810 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_2692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18773__B1 wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26296__C1 _26295_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25638__A2 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_163_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4977 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_3951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_4024 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30831__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31957__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30721_ _30721_/Q _32168_/CLK hold363/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_5118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25632__A_N _25571_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18443_ VGND VPWR _18443_/S _29849_/Q _28217_/Q _28217_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21703__A_N _29352_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15587__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15655_ _16938_/A2 wire3303/X _29300_/Q _15655_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_19_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23649__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26758__A_N _31794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_4843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32556__D _32556_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_54_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_5353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19317__A2 _19317_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14606_ _14606_/X _15307_/C1 _14599_/X _14601_/X wire1089/X _14605_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA_wire4100_A wire4101/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30652_ hold462/A _31522_/CLK _30652_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18374_ VGND VPWR _18399_/S wire3892/A _28151_/Q _28151_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_206_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_195_4718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_4887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18525__A0 _28297_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15586_ VGND VPWR _15627_/S _28968_/Q _29266_/Q _15586_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27012__B _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17328__A1 _32287_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_1363 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_241_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22321__A1 _23043_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22437__A hold328/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1205 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19868__A3 _19539_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output687_A wire3395/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17325_ _30937_/Q _17325_/X _30971_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_201_4685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20332__A0 _28872_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14537_ VGND VPWR _14537_/X _20848_/B _20848_/A _14544_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_236_5438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14654__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30583_ _30583_/Q _30583_/CLK hold458/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_4704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_2373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22872__A2 _22830_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18126__S _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30981__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17030__S wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_5_4_0_core_clk clkbuf_5_4_1_core_clk/A clkbuf_5_5_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_239_3137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_4442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32322_ _32322_/Q _32322_/CLK _32322_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29865__D _29865_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18540__A3 _30086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29234__CLK _32136_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27439__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17256_ VGND VPWR _17246_/X _17256_/X _17255_/X _31902_/Q wire3564/X _17247_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_13_3091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25748__A _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14468_ _14088_/Y _30439_/Q _14468_/Y _14466_/Y _14467_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_1 XANTENNA__24074__A1 _28471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25271__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24074__B2 _28599_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1751 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16207_ _16207_/X _29250_/Q _16434_/A2 _16722_/B2 _16722_/C1 _16206_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17965__S _17972_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2517_A _20714_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32253_ _32253_/Q _32498_/CLK _32253_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_15_1998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_102_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18828__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17187_ _21630_/B1 _23160_/C _21659_/A _22026_/A2 wire3806/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__a22o_4 XFILLER_67_3766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30804__D _30804_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1485_A wire1486/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2469 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_5026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14399_ _14399_/A _14399_/B _14398_/Y _25197_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_158_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_100_2371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16839__B1 _16839_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20635__A1 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30211__CLK _30474_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31204_ _31204_/Q _32577_/CLK _31204_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_61_4022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16138_ VGND VPWR _16138_/X _16120_/S _16807_/B1 _16137_/X _16136_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__31337__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32184_ _32184_/Q _32513_/CLK _32184_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20391__S _20391_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16303__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25186__C _25186_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27563__A2 _32153_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26366__A3 _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17316__C_N _27006_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29384__CLK _30411_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4524 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26373__B1_N _26372_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31135_ VGND VPWR _31135_/D _32160_/CLK _31135_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_48_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24377__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15511__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16069_ wire918/A _16065_/X _16068_/X _16500_/B1 _16069_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_252_1913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16854__A3 _16944_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22388__B2 _22387_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14865__A2 _15770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire736_A wire736/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2886_A _20638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31066_ _31066_/Q _31693_/CLK _31066_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22900__A _22934_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2322 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16067__A1 _28411_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30361__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31487__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2795 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17264__B1 wire2296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24129__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30017_ _30017_/Q _30387_/CLK _30017_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_263_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19828_ _19827_/X _28566_/Q _28566_/D _19852_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 Xfanout2890 wire2891/X _20650_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_187_2811 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_22_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15814__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14617__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire903_A wire904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_3400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5231 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23207__S _23221_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19005__A1 _19002_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21516__A _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_282_4779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_256_277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19759_ _25567_/B _19758_/Y _19715_/X _28536_/Q _28536_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_59_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20420__A _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_5253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_129_2205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_4129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27079__A1 _26797_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17016__B1 _21459_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21899__A0 _21554_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19556__A2 wire2653/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_94_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23352__A3 _23355_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1132 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22770_ _22794_/A _22745_/X _22769_/X _22768_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_267_2890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24249__D _26542_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25930__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31968_ _31968_/Q _32074_/CLK _31968_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_39_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17567__A1 _31707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15027__C1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_37_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22560__A1 _30057_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_1105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_1728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18764__B1 wire1932/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26826__A1 _31863_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21994__S0 wire3922/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25422__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_601 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21721_ _21719_/Y _14118_/Y _21720_/Y wire1855/A _29775_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_181_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4135 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20571__A0 _29087_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30919_ _30919_/Q _31760_/CLK _30919_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_5054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_276_5229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_3791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31899_ _31899_/Q _32036_/CLK _31899_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_241_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15042__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24546__B _24546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_198_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3483 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23104__A3 wire1678/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24440_ VGND VPWR _26544_/C1 _31019_/D _25197_/A _24438_/X _24439_/X _26904_/A VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XFILLER_244_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21652_ _29882_/Q _21447_/B _21462_/Y _21466_/Y _21652_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_202_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18516__A0 _28288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17319__A1 wire3564/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20566__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14250__B1 _14249_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22312__A1 _29898_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17319__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_2891 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18544__B _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20603_ VGND VPWR _20613_/S _27696_/A1 _29118_/Q _29118_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_5073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13969__A _28528_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24371_ _24370_/X _24888_/D wire1668/A _23611_/A _30988_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_11_3710 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21583_ _30363_/Q _21549_/B _21655_/A wire3649/X _21646_/B _21514_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__18036__S _18037_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22863__A2 _30473_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1160_A wire1172/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32112__CLK _32112_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_14_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26110_ wire2597/X _26109_/X _31548_/Q _17877_/X _31548_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26054__A2 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3792 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23322_ VGND VPWR wire820/A _30300_/Q _17120_/X _30300_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_11_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20534_ VGND VPWR _20551_/S _29051_/Q _27248_/A0 _29051_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27090_ _27090_/X _27120_/B _32023_/Q _27098_/A _27098_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_194_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26041_ _26041_/X _26047_/A _26047_/B _26047_/C _26040_/X _14399_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__14553__A1 _29207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2437 VPWR VGND _27263_/S _27265_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23253_ VGND VPWR _23253_/S hold374/X _30236_/Q _30236_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18819__A1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28601__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19656__A _19656_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20465_ VGND VPWR _20481_/S _28984_/Q _27690_/A1 _28984_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21418__A3 _21419_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_4269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30714__D input86/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29727__CLK _30217_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_5284 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22615__A2 _30365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3866 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1425_A _18303_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2801 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24281__B _31688_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1725 VPWR VGND _22300_/S _23376_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20087__C1 _26148_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20626__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22204_ VGND VPWR _22204_/X wire2284/X wire826/X _30105_/Q _22203_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_274_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21823__B1 _21821_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_4534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23184_ _30184_/D _23185_/B _23183_/X _30184_/Q wire1678/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 Xmax_length1747 VPWR VGND _15537_/A2 wire1748/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_153_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32262__CLK _32470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20396_ VGND VPWR _20406_/S wire1682/X _28918_/Q _28918_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_27_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22082__A _30441_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout885_A _16971_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_1147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29800_ hold255/A _30468_/CLK _29800_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__24368__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22135_ _22135_/Y _22135_/B _22135_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__30704__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15502__B1 _15561_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3834_A _29865_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27992_ _27992_/Q _30402_/CLK _27992_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_251_1401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput260 _14013_/Y la_iena[127] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_4601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22379__A1 wire3649/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput271 _13770_/Y la_iena[21] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__26489__A _26539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput282 _13760_/Y la_iena[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__28751__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_1592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29731_ _29731_/Q _30382_/CLK _29731_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_187_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29877__CLK _30446_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4892 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26943_ _31967_/Q wire1570/X _31967_/D _26943_/B2 wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22066_ hold476/A _22074_/B1 _29805_/D _22065_/X _22064_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xoutput293 _13971_/Y la_iena[41] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_265_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_216_2299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_3041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21587__C1 _21288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14312__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17255__B1 _17248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21017_ VGND VPWR _21017_/S _29482_/Q _27706_/A1 _29482_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_281_4201 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_2344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29662_ _29662_/Q _32430_/CLK _29662_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_153_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26874_ _26874_/Y _26874_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_hold463_A la_input[1] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1035 VPWR VGND wire1035/X wire1035/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15805__A1 _32042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14608__A2 wire1533/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_263_715 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xload_slew1802 VPWR VGND _14544_/C _14442_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_28613_ _28613_/Q _32470_/CLK _28613_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_268_2654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_281_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21426__A _21426_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25825_ VGND VPWR _25825_/S _25824_/X _31436_/Q _31436_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_21_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1068 VPWR VGND wire1068/X wire1069/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29593_ _29593_/Q _31479_/CLK _29593_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_70_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29107__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1961_A wire1963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17007__B1 wire3791/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_4079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28544_ _28544_/Q _31351_/CLK _28544_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25756_ _32084_/Q hold242/A _27185_/A _32081_/Q _32083_/Q _32082_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a41o_2 X_13770_ _31176_/Q _13770_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_16_4311 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_3063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17558__A1 _31711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22968_ VGND VPWR _22968_/S _30480_/Q _30145_/Q _30145_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22956__S _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22551__A1 _29840_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18755__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24737__A _31455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20011__C1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1374 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_4390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24707_ _24707_/B _24708_/B _31474_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__15569__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21919_ _22061_/S hold253/A _21919_/X _22071_/C _17143_/B _21903_/B hold250/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 X_28475_ _28475_/Q _32552_/CLK _28475_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25687_ _25687_/X _31391_/Q _25687_/B1 _25686_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_103_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16983__A2_N wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22899_ _30477_/Q _22898_/X _22911_/D _22933_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_205_4084 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15033__A2 _15614_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20984__B _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25096__A3 _20651_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27490__A1 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26293__A2 hold185/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15440_ _15440_/X _15640_/C1 _15432_/X _15434_/X _15439_/Y wire1085/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_220_3815 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2300_A _17911_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28131__CLK _30270_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27426_ VGND VPWR _27476_/S _32271_/Q _27425_/X _32271_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_16_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24638_ _24638_/C _24639_/B _25881_/B _26904_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_2 XANTENNA__29257__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18507__A0 _28279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_2696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20476__S _20485_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_5430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_3837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21106__A2 _23236_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22303__A1 _29889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23500__A0 _31954_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16781__A2 _16781_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_73_1867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_2901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3072 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20314__A0 _28855_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__13879__A _28618_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15371_ _15371_/X _15759_/A2 _15370_/X _28890_/Q _15748_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__14792__A1 _15047_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27357_ VGND VPWR hold144/A _32212_/Q _27280_/X _32212_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24569_ _24553_/X _24568_/X _24508_/X _31041_/Q _31041_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_1330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22854__A2 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3342_A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26045__A2 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17110_ _22484_/A2 _30001_/Q _17109_/X _17110_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XPHY_797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14322_ _14338_/A _21462_/B _30335_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_26308_ _26307_/Y _27117_/C1 _31642_/Q _26331_/B _31642_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_18090_ VGND VPWR _18110_/S wire3905/X _28019_/Q _28019_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27259__S _27259_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24791__B1_N _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27288_ VGND VPWR _27292_/S _32152_/Q _27417_/A0 _32152_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_193_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25253__B1 _25261_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24056__B2 wire3635/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2412 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28281__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17041_ _29993_/Q _22449_/A _17041_/X _29421_/Q wire3791/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__17785__S _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29027_ _29027_/Q _32571_/CLK _29027_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_175_4183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14253_ _24459_/B _24618_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 X_26239_ _31608_/Q _24820_/B _26240_/B _32298_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19566__A _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1069 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30624__D _30624_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22606__A2 wire3690/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_253_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_3181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_5257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20617__A1 _27710_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21814__B1 _21811_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14184_ _24446_/A _24446_/B hold101/X _14184_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xclkbuf_leaf_198_core_clk _31738_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_7_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_65_2030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_175_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30384__CLK _30384_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2732 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_3357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19716__D _23876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20093__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21290__A1 _30366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17494__B1 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24359__A2 _24889_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25556__A1 _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 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VPWR NF_sky130_fd_sc_hd__decap_3 X_31822_ _31822_/Q _32583_/CLK _31822_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19544_ VGND VPWR wire2642/X _26866_/A1 _19632_/A _19544_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_108_4247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1591 VPWR VGND _23732_/B _23735_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_228_2137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16756_ wire3668/A _14545_/A _15782_/X _16751_/X _16755_/X _16756_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_2 XFILLER_165_2427 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17555__B1_N _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13968_ _28529_/Q _13968_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_282_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_2197 VPWR VGND VGND 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VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20305__A0 _28846_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13789__A _31157_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14783__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18357_ VGND VPWR _18357_/S wire3838/X _28135_/Q _28135_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30635_ _30635_/Q _32353_/CLK hold380/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_69_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_9_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28624__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15569_ _15567_/C _15543_/S _28935_/Q _15707_/A _15569_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15980__B1 wire1060/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_5577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_5126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_4501 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19171__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_2793 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2460 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_1095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17308_ _17302_/Y _17308_/B _17308_/C _17308_/A _17308_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_258_3557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold72_A hk_dat_i[5] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24047__A1 _28725_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30566_ hold418/A _32039_/CLK _30566_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18288_ _18288_/Y _30328_/Q _18288_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_4 XFILLER_89_3287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15500__C _15500_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32285__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24047__B2 _31139_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17721__A1 _17488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17721__B2 _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22058__A0 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32305_ _32305_/Q _32350_/CLK _32305_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_274_2113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17695__S _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14335__C_N _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17239_ _31906_/D _17243_/S hold467/X _29915_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_8_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30727__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15732__B1 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30534__D input58/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26992__B1 _31981_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25197__B _29841_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30497_ _30497_/Q _32302_/CLK _30497_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_236_4589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_3735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20069__C1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20608__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5623 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22614__B _22614_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4832 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28774__CLK _32398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20250_ VGND VPWR _20258_/S _28793_/Q _27699_/A1 _28793_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32236_ _32236_/Q _32467_/CLK _32236_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18277__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22106__S _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21010__S _21010_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20084__A2 wire2666/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21281__A1 wire2039/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_5520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20181_ wire877/X _19772_/B _20181_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_32167_ _32167_/Q _32464_/CLK _32167_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_288_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_2854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23558__A0 _30049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15496__C1 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14838__A2 wire1541/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3343 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30877__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31118_ _31118_/Q _32470_/CLK _31118_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_150_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25417__S _25424_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5211 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23726__A wire767/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_44_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28004__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32098_ _32098_/Q _32225_/CLK _32098_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_93_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22630__A _29712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_5233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31365__D _31365_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21033__A1 _29497_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19415__S _19415_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3664 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19777__A2 _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23940_ wire1587/X wire3631/X _23939_/X _23940_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_211_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31049_ VGND VPWR _31049_/D _31801_/CLK _31049_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_22_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_3304 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17788__A1 _17833_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1006_A _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18985__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25363__D _25363_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27632__S _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25941__A _25941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20792__A0 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23871_ _23871_/X _24281_/A _31868_/Q _24370_/A2 _31900_/Q _24281_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__30107__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3610 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_113_2595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4647 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16996__C1 _21676_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16460__A1 wire3285/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2505 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19529__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25610_ wire3532/X hold92/A _25610_/X _25580_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__26756__B _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22822_ _29893_/Q _22822_/X _22819_/X _22821_/X _22933_/S _22745_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__28154__CLK _28326_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26590_ wire3452/A _31771_/D _26588_/X _27077_/C1 _31876_/Q _26589_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_0_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_808 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_5083 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_819 _31923_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_2297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_1962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3504 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22533__A1 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18737__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24557__A _31207_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19934__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_2991 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23730__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25541_ VGND VPWR _25546_/D hold502/A _25547_/C _25541_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__20544__A0 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22753_ VGND VPWR _22741_/Y _22740_/A _22765_/C _22753_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_59_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15015__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1375_A wire1385/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19150__S _19202_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26275__A2 _14206_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24276__B _24276_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27472__A1 _32294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21704_ _21708_/A _21698_/B _21698_/A _21704_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_206_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28260_ _28260_/Q _30449_/CLK _28260_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_107_2322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_4869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30257__CLK _32071_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3960 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23180__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25472_ VGND VPWR _25470_/B _31315_/Q _31316_/Q _25472_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_107_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20296__S _20302_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23089__A2 _23190_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24286__A1 _31665_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22684_ _22687_/B _22706_/C _22687_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__14223__B1 _29503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_4268 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25483__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17960__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16763__A2 wire1556/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31502__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26772__A _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23611__D _23611_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_4006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27211_ VGND VPWR _25769_/X _32098_/Q _27276_/C _27211_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__22297__A0 _29142_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24423_ _31011_/Q _31010_/Q _31009_/Q _24420_/D _24423_/Y _31012_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41ai_1 X_21635_ _21637_/A _16987_/B _14347_/D _14347_/C _14347_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 X_28191_ _28191_/Q _30410_/CLK _28191_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_50_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_3400 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3784_A _30026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1124 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1542_A _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_279_1301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26027__A2 _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_120_2511 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27142_ VGND VPWR _27142_/S wire2002/X _32048_/Q _32048_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_4781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_4732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19701__A2 _19711_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24354_ _32024_/Q _26772_/A _24354_/X _31992_/Q wire1351/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_68_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_194_3324 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_hold211_A hold211/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21566_ VGND VPWR _21501_/B _21501_/C _21503_/B _21566_/X _21490_/Y _21501_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_279_1334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_3619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25071__C_N _24941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24038__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16515__A2 wire1733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17712__A1 _31723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25235__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold309_A hold309/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length1901_A _19310_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_2721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17712__B2 _31722_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14307__B _29984_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23305_ _23305_/X _18667_/X hold230/A _29873_/Q _23307_/B VGND VPWR _23304_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__22049__B1 _21708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20517_ VGND VPWR _20517_/S _23671_/A1 _29035_/Q _29035_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xmax_length2223 VPWR VGND wire2222/A _19732_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_27073_ VGND VPWR _32014_/D wire772/A _27072_/X _26791_/B _27075_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__15723__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_1884 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24285_ _31587_/Q _30935_/D _26376_/A1 _24273_/D _31664_/Q _24284_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_2 XANTENNA__26983__B1 _31977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31652__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21497_ _21499_/D _21499_/C _21500_/B _21588_/A _21674_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_272_2809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2256 VPWR VGND _26838_/A3 wire2255/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_200_2590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24053__A4 _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26024_ _26024_/Y _31526_/Q _31525_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_153_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2267 VPWR VGND _19368_/D1 _19196_/D1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23236_ _23236_/C _23236_/B _23236_/Y _23236_/D _23238_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_172_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20448_ VGND VPWR _20449_/S _28968_/Q _27261_/A0 _28968_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19465__A1 _28448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2278 VPWR VGND _19218_/B1 _19196_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xclkbuf_leaf_291_core_clk _31304_/CLK clkbuf_opt_26_3_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__27527__A2 _27597_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16279__A1 _14104_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_213_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_232_4965 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_5087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1555 VPWR VGND _23466_/B2 wire1556/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21272__A1 _29734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20075__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22243__C _22243_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25538__A1 _25539_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_3129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20385__D_N _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23167_ hold267/A _23192_/A2 _23167_/X _30111_/Q wire2842/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__16818__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26735__B1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_220_core_clk _32296_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_wire2083_A wire2083/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1529 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20379_ VGND VPWR _20384_/S _25027_/B _28903_/Q _28903_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_62_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input166_A la_input[94] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23549__A0 _30040_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20044__B _24941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15487__C1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_1097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_2063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32008__CLK _32434_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_1832 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22118_ _29817_/Q _29818_/Q _22141_/D _22119_/D _29816_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_131_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_2439 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27108__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27975_ _27975_/Q _30431_/CLK _27975_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23098_ VGND VPWR _23098_/X _23096_/X _23097_/X _23095_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_114_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24231__S _24232_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17491__A3 _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_3246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29714_ VGND VPWR _29714_/D _32079_/CLK _29714_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_213_2962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2250_A wire2251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14940_ _14939_/X _15517_/A1 _15515_/A2 _29217_/Q _14940_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26926_ _31950_/Q wire1571/A _31950_/D wire2376/X wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_188_2416 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22049_ _22049_/X _22048_/X _21668_/Y wire3145/X _21708_/Y _22047_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_265_4741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2348_A _14198_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17779__A1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_3456 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_5448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29645_ _29645_/Q _30057_/CLK _29645_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14871_ _14871_/X _15307_/C1 _14864_/X _14866_/X wire1089/A _14870_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_281_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26857_ _26694_/C _26856_/Y wire749/X _31878_/Q _31878_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_236_737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20060__A _20060_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_5197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_1327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_4173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_opt_11_0_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31032__CLK _31553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32158__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16610_ VGND VPWR _16610_/X _16601_/S wire1062/X _16609_/X _16608_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_242_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_4769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13822_ _31124_/Q _13822_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__16451__B2 _16450_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25808_ VGND VPWR _25809_/C _32548_/Q _32547_/Q _25808_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_229_2446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17590_ _17590_/X _31714_/Q _17783_/B2 _17586_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_57_3754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29576_ _29576_/Q _30250_/CLK _29576_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_109_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_707 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26788_ _27071_/C1 _26787_/X wire777/X _31844_/Q _31844_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_281_4097 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22524__A1 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18728__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24467__A _24467_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23721__B1 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2026 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_2359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_166_2769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_16_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16541_ VGND VPWR _16541_/X _16540_/X _16539_/X _16930_/A1 wire1058/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_264_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28527_ _28527_/Q _31436_/CLK _28527_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20535__A0 _27694_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_38_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13753_ hold82/A _13753_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_53_3629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25739_ VGND VPWR _25738_/C _26838_/A3 _25738_/B _25739_/X _26153_/A _25738_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_281_2651 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28647__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_943 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_3197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15006__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_4493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26266__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27463__A1 _32288_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3557_A _30994_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_4512 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_3899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19260_ _19260_/X _19346_/D1 _27947_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_281_2684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19940__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23090__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16472_ _16911_/A2 _16472_/X _16471_/X _16949_/A1 _28791_/Q _16960_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_28458_ VGND VPWR _28458_/D _31877_/CLK _28458_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_224_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31182__CLK _32168_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14214__B1 hold105/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16754__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22288__A0 _29133_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18211_ _18342_/A1 _18244_/A _18201_/A _18215_/D _18209_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_4 XANTENNA__26671__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15423_ wire1175/A _15575_/C _29230_/Q _15423_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27409_ VGND VPWR _27412_/S _32257_/Q _27274_/X _32257_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_125_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_5582 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19191_ VGND VPWR _19191_/X _19306_/B _22088_/B1 _27912_/Q _19190_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_16_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2884_A _20783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15962__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28389_ _28389_/Q _30276_/CLK _28389_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_199_3279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_3500 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21322__C _21419_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_572 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3724_A _30326_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_2310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19153__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1967 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27215__A1 _32098_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_4821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_138_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18142_ VGND VPWR _18143_/S wire3841/X _28070_/Q _28070_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30420_ _30420_/Q _31938_/CLK _30420_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15354_ _16840_/A2 wire3298/X _29637_/Q _15354_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24029__A1 _31105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_379_core_clk _30217_/CLK clkbuf_5_4_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__20934__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24029__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16506__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17703__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_138_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1171 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18900__B1 _19109_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17703__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM128_A0[0] wire2402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23310__S _23317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14305_ _14305_/Y _17895_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XFILLER_173_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_68_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25777__A1 hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18073_ VGND VPWR _18074_/S wire3849/X _28003_/Q _28003_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30351_ _30351_/Q _32575_/CLK _30351_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_272_4767 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_1691 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15285_ VGND VPWR _15623_/S _30504_/Q _30790_/Q _15285_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_258_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_308_core_clk _30198_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_67_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18404__S _18428_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_5_8_0_core_clk_A clkbuf_5_9_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4098_A _28648_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_5181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23788__B1 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17024_ VGND VPWR _17024_/X _17024_/B _29991_/Q _30370_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_218_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold209 hold209/A hold209/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_68_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14236_ _17879_/B _19505_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XANTENNA__24985__C1 _25810_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_2147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_2144 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27717__S _27719_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30282_ _30282_/Q _30282_/CLK _30282_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_171_3121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output552_A _28721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17528__B _17842_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_5165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28027__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_1705 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_1131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_2720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32021_ _32021_/Q _32583_/CLK _32021_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_190_3766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_29_3889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20066__A2 _19534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1776 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25529__A1 _19456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16809__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14167_ VGND VPWR hold89/X hold138/X _14167_/S _14167_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XFILLER_171_2420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14233__A _19505_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_1749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_2434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28759__D _28759_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_4156 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_1197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21765__S _21853_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_3198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_3763 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23004__A2 _32384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18975_ _18974_/X _19151_/S _19201_/A2 _27965_/Q _18975_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_230_2016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_5602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14098_ _29370_/Q _14098_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_286_637 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24201__B2 _28612_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17219__B1 _17218_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_2838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19759__A2 _19715_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3523 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22212__B1 _23417_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17926_ VGND VPWR _17947_/S wire3888/X _27864_/Q _27864_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28177__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_62_2792 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_350 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18967__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29422__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_110_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23960__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2584_A _22181_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27452__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25761__A _32088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1271 VPWR VGND _26772_/C _23779_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_212_2494 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17857_ _17709_/X _17857_/X _17766_/X _17863_/B _17856_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_2 XFILLER_264_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31913__D hold446/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_286_2584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16808_ _16817_/A2 _16817_/A1 _28431_/Q _16808_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xclkbuf_leaf_95_core_clk _30865_/CLK clkbuf_5_14_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_260_4126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_4257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_3802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17788_ _17692_/X _17787_/Y _17742_/X _17833_/S _17788_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_281_353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22515__A1 _23563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18719__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23712__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_1834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_24_core_clk _32464_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_31805_ _31805_/Q _31879_/CLK _31805_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19527_ wire2420/X wire2412/X _23598_/C _23599_/C _26763_/B _19527_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_34_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20526__A0 _23647_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_91_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16739_ _16965_/A2 _16952_/A1 _30912_/Q _16739_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_260_3436 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_2980 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_203_4533 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18195__A1 _29854_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19392__A0 _28408_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29572__CLK _32581_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18195__B2 wire3842/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27454__A1 _32285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_225_3589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_203_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1769 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19458_ _19458_/Y _19467_/C _28447_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_31736_ _31736_/Q _31737_/CLK _31736_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_4623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21513__B _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14205__B1 hold119/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_160_4293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17942__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16745__A2 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25465__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_4470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_206_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15402__C1 wire1084/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21005__S _21010_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18409_ VGND VPWR _18433_/S _28184_/Q wire3889/X _28184_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22279__B1 _21058_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_2517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1984_A wire1984/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19389_ VGND VPWR _19407_/S _27680_/A1 _28405_/Q _28405_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15953__B1 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31667_ _31667_/Q _32431_/CLK _31667_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__31675__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14408__A _14408_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26009__A2 _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire970_A wire970/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21420_ _21853_/A _21424_/C _21420_/B _21420_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XFILLER_50_2140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30618_ hold355/A _31837_/CLK _30618_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_15_2271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_3860 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_5519 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25217__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31598_ _31598_/Q _32127_/CLK _31598_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22625__A _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14127__B _14268_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1050_A _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_4965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23220__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4807 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24543__C _24546_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21351_ _17017_/X _21353_/A _21350_/X _21348_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_176_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_2146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_2195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15705__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30549_ _30549_/Q _32017_/CLK hold422/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_60_5503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17910__A_N wire1688/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16902__C1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20302_ VGND VPWR _20302_/S wire2001/X _28843_/Q _28843_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3942 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24070_ _24070_/X _24068_/X _28535_/Q _24163_/B2 _19718_/B VGND VPWR _24069_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__15181__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27627__S _27627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21282_ VGND VPWR _22968_/S wire1869/X hold346/A _29772_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_1340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_1914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24440__A1 _24438_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27854__C _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15720__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23021_ VGND VPWR _31395_/Q _23020_/X _23019_/X _23021_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21254__A1 _23095_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20057__A2 wire853/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20233_ VGND VPWR _20236_/S _28776_/Q _27682_/A1 _28776_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32219_ _32219_/Q _32531_/CLK _32219_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19998__A2 _19531_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22451__B1 wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26717__B1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_opt_12_1_core_clk clkbuf_leaf_20_core_clk/A clkbuf_opt_12_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__24991__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23794__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3707 VPWR VGND wire3707/X wire3708/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_fanout1123_A _14551_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2091 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3729 VPWR VGND wire3729/X _30322_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_clkbuf_leaf_27_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_39_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27390__A0 _27417_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2676 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20164_ _25567_/B _20163_/X _20192_/A2 _28726_/Q _28726_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__16130__B1 _28950_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26193__B2 _32275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18670__A2 _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25374__C _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_659 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15484__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13982__A _28515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_1972 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22203__B1 _22201_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17454__A _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27760_ VGND VPWR _27765_/S wire2242/X _32487_/Q _32487_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_4773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3532_A _25577_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23175__B _23180_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_132_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24972_ _24972_/X _31130_/Q _25776_/C _25017_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_20095_ _26148_/A _20094_/Y _20106_/A _28693_/Q _28693_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_184_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_2461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_5014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_4059 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18269__B _18269_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22754__B2 _14404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23951__B1 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27362__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26711_ _26710_/Y _27071_/C1 _31808_/Q _26720_/A _31808_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27142__A0 _32048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25671__A _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23923_ _20671_/A wire3645/X _23923_/X _19857_/B _30619_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XFILLER_287_1625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_2325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27691_ VGND VPWR _27698_/S wire1826/X _32425_/Q _32425_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_fanout750_A wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1492_A _14547_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout848_A wire851/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16433__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27693__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26496__A2 _26492_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29430_ _29430_/Q _32108_/CLK hold203/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_76_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17630__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29915__CLK _31904_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26642_ _26637_/B _31784_/D _26640_/X _26218_/A _31889_/Q _26641_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_221_5312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_5361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23854_ _19792_/C _23853_/X _31827_/Q wire1624/X _23855_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_57_2316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22506__A1 _22510_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_605 _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_616 wire2077/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32450__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24900__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22805_ _22831_/B _22803_/X _22809_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 X_29361_ VGND VPWR _29361_/D _30450_/CLK _29361_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_224_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_627 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14995__A1 _15226_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26573_ _26573_/X _31840_/Q wire3454/X wire817/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA_638 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_260_537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23785_ _23786_/A _24178_/A2 _31839_/Q _31804_/Q _27053_/A VGND VPWR _23784_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_20997_ VGND VPWR _20997_/S _29462_/Q _27143_/A1 _29462_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_649 _26773_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3999_A _29357_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4303 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_4199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_2933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26248__A2 _26263_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27445__A1 _32279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28312_ _28312_/Q _32327_/CLK _28312_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_1809 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19922__A2 wire1328/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25524_ VGND VPWR _31341_/D _25524_/B _25524_/A _25524_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_22736_ _21439_/A _22820_/C _22820_/B _22736_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XANTENNA__21190__A0 wire1792/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16197__B1 _16736_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29292_ _29292_/Q _32352_/CLK _29292_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_39_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24259__A1 _24467_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17394__C1 hold3/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25456__B1 _25510_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24259__B2 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17933__A1 wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28243_ _28243_/Q _30446_/CLK _28243_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25455_ _31307_/D _31306_/Q _25454_/Y _31307_/Q _19474_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_33_3061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22667_ _22779_/A1 _22666_/X _29878_/Q _22664_/Y _22669_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211ai_4 XFILLER_224_1642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_1653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19135__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27748__D _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24406_ _24437_/B _24405_/Y _24404_/X _31005_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XFILLER_68_3102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21618_ _21618_/C _21618_/B _21618_/Y _21618_/D _21618_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_202_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28174_ _28174_/Q _30466_/CLK _28174_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25386_ _25414_/B1 _31272_/Q _31280_/Q _25265_/X _25386_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__20754__S _20754_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22285__A3 _23348_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24226__S _24234_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22598_ VGND VPWR _22598_/S hold122/A _22597_/X _30077_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_68_3135 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_1998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17697__A0 _17649_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15848__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27125_ _31484_/Q _31488_/Q _27125_/X _31485_/Q _31489_/Q _31487_/Q _31490_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA_clkbuf_leaf_66_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_156_5597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25759__A1 _32086_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24337_ _24336_/X _24357_/B1 wire1672/X _24353_/A1 _30971_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_276_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21549_ _21549_/Y _21549_/B _21549_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xclkbuf_leaf_401_core_clk _30268_/CLK clkbuf_5_2_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_259_1749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2298_A _32598_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4328 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16338__A1_N wire902/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15070_ _14545_/B _16646_/A2 _15070_/X _15638_/A2 _28818_/Q wire1702/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_155_2404 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27056_ _27122_/A _27053_/C _27122_/B _27056_/X _27098_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_4_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19438__A1 _28440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24268_ _30929_/D _24267_/X _24308_/C _24266_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__23234__A2 _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24431__A1 _24434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_2185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length1341 VPWR VGND _19748_/C _19776_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_133_3403 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_232_4751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_3572 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26007_ VGND VPWR _19573_/B _19551_/A _26014_/A2 _26007_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_14021_ _28476_/Q _14021_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_270_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19989__A2 _24953_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23219_ VGND VPWR _23223_/S _30211_/Q hold478/X _30211_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_4_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25565__B hold170/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14053__A _23231_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24199_ wire708/A _24199_/B1 _24198_/X _24193_/X wire760/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XANTENNA__18110__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_289_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_267_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21796__A2 wire1855/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29445__CLK _30428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1396 VPWR VGND _24246_/B _26386_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_189_4650 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27381__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1004 _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19563__B _19563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1015 _18615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16679__S wire979/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1026 hold252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_4514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_3032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1037 _23932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24195__B1 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2358 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_131_3160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1048 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18760_ wire1984/X _27987_/Q _19143_/B1 _18760_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25931__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2632_A _19535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23085__B _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15972_ VGND VPWR _15972_/X _15969_/X _15971_/X _15975_/S _16807_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_1059 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27958_ _27958_/Q _30583_/CLK _27958_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_150_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3231 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_76_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22745__A1 _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30422__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18179__B _18179_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31548__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23942__B1 _24079_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17711_ _17711_/X _17708_/X _17586_/A _31724_/Q _17596_/D _17710_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_185_4569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14923_ _14922_/X _15235_/A1 wire1172/X _28782_/Q _14923_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26909_ _26909_/X _26762_/C _31934_/Q _26905_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__19071__C1 _28290_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27133__B1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19610__A1 _28475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18691_ _29344_/Q _30288_/Q _29343_/Q _23348_/B _18691_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_261_4402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_5147 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_3275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27889_ _27889_/Q _30415_/CLK _27889_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_209_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold70 input6/X hold70/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21953__C1 _22046_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29595__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold81 hold81/A hold81/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_261_5169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_5289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27684__A1 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26487__A2 _26435_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_1709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17642_ _31717_/Q _17539_/B _17642_/X _31716_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xhold92 hold92/A hold92/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_29628_ _29628_/Q _30903_/CLK _29628_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14854_ _16791_/A2 _23393_/C _28916_/Q _14854_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_268_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23813__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20929__S _20930_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_4408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29203__D _29203_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18907__B _19087_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13805_ _31141_/Q _13805_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20508__A0 _29026_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14986__A1 wire1228/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17573_ VGND VPWR _17602_/S _17572_/X _17552_/X _17573_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29559_ _29559_/Q _31962_/CLK _29559_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14785_ VGND VPWR _14785_/X _14782_/X _14784_/X _15610_/B1 _15611_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_92_3475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18177__A1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30572__CLK _31892_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_2129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31698__CLK _31698_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_3437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26239__A2 _24820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27436__A1 _32276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3939_A _17228_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19312_ _19311_/X _19047_/S _22086_/B1 _27981_/Q _19312_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_222_3729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_166_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16524_ _16505_/X _29672_/D VGND VPWR _16523_/Y _16839_/B1 _16496_/X VGND VPWR NF_sky130_fd_sc_hd__a2bb2oi_1 XANTENNA__19913__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18626__C _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_13736_ _17508_/B _31762_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__22512__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21181__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32570_ hold211/A _32570_/CLK _32570_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_34_2102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1029_A wire1030/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17924__A1 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_3751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24925__A _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27531__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21720__A2 _16974_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_784 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_324_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31521_ _31521_/Q _31563_/CLK _31521_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19243_ _19239_/X _19242_/X _19283_/S _19241_/X _19243_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_51_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15935__A0 _29556_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14738__A1 _30891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16455_ VGND VPWR _16455_/X _16458_/S _16949_/C1 _16454_/X _16453_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_259_4364 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14228__A _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19126__B1 _19125_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_4949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2116 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_122_3874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_100_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27658__D _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15406_ _15721_/A2 _15406_/Y _15738_/A3 _15705_/A1 _28795_/Q _15405_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_103_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21469__D1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_380 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31452_ _31452_/Q _31467_/CLK _31452_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19174_ _19173_/X _19159_/S _19179_/A2 _27975_/Q _19174_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_220_2741 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19677__A1 _28499_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16386_ VGND VPWR _16386_/X _16837_/S _16491_/S _30501_/Q _16385_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_255_4239 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_4026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19738__B _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_2482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_12_3178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_86_3235 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23040__S _23040_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_4097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30403_ _30403_/Q _30403_/CLK _30403_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18125_ VGND VPWR _18150_/S wire3902/X _28053_/Q _28053_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17688__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15337_ VGND VPWR _15336_/Y _15334_/Y _15757_/C1 _15337_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_220_2785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17539__A _31707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22681__B1 _21328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31383_ VGND VPWR _31383_/D _32525_/CLK _31383_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xclkbuf_leaf_142_core_clk _32291_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__26947__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18134__S _18144_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21050__B1_N _21049_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1398_A _18767_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17152__A2 _21638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25214__A3 _25416_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30334_ _30334_/Q _30424_/CLK _30334_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15163__A1 wire3298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27447__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18056_ VGND VPWR _18086_/S wire3913/X _27986_/Q _27986_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1 _29681_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15268_ _16956_/A2 _15747_/A1 _28759_/Q _15268_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23225__A2 _20914_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24660__A _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_49_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_190_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_4286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31078__CLK _31548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20039__A2 wire847/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21236__A1 _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17007_ _17010_/A wire3791/A _29989_/Q _29417_/Q _22449_/A VGND VPWR _17006_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_119_2034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_4971 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3675 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_3506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17973__S _17974_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14219_ VGND VPWR _14219_/X _14300_/B _14300_/A _29967_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_6_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2548 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14910__A1 wire1214/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19754__A _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30265_ _30265_/Q _30410_/CLK _30265_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24973__A2 _25037_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30812__D _30812_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32323__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15199_ _16415_/A2 _15590_/A1 _29288_/Q _15199_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__18101__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_3295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_4261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_263_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22984__A1 _32390_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2851 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_4895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32004_ _32004_/Q _32271_/CLK _32004_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_45_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_155_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27372__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold35_A hold35/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2799_A _27513_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_212_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20995__A0 _27684_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30196_ _30196_/Q _30482_/CLK _30196_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_285_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25194__C _25430_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23707__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15466__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28812__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22611__C _22611_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1732_A wire1733/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29938__CLK _31931_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18958_ _28383_/Q _19317_/A2 _28383_/D _18946_/X _18957_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__14674__A0 _29555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_2601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1023 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22736__A1 _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_2781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32473__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17909_ _17913_/C _17891_/A _17913_/D _17909_/X _17891_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XFILLER_266_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_2679 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27124__B1 _25836_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_25_0_core_clk clkbuf_opt_25_1_core_clk/A clkbuf_5_23_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_90_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18889_ _19379_/B _28057_/Q _18888_/X _18889_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14410__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_184_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15218__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16415__A1 _16415_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30915__CLK _32329_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20920_ hold420/A _20920_/Y _30483_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA_clkbuf_leaf_363_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_288_1978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_4606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23723__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24489__A1 _31335_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_5419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15769__A3 _14544_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16966__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28962__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26883__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1500 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_1620 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23215__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21524__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14977__A1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25150__A2 _24561_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20851_ _20851_/X _14445_/X _18580_/A _20982_/B _23231_/A VGND VPWR _20850_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_110_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_17 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_1988 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18168__A1 wire3883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2941_A _20295_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_28 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18309__S _18309_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_5121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_4729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23161__A1 _30445_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18168__B2 wire3855/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19365__B1 _19367_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_1946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27427__A1 _32270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_39 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_4407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_25_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18707__A3 _18703_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19904__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23570_ VGND VPWR _23582_/S _24216_/A0 _30490_/Q _30490_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21172__A0 _27265_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16179__B1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23700__A3 wire1628/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20782_ VGND VPWR _20783_/S _27624_/A1 _29296_/Q _29296_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_52_2202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_3397 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17376__C1 _17375_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25438__B1 _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_5165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_leaf_100_core_clk_A clkbuf_5_12_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24835__A _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22521_ VGND VPWR _30021_/D _22521_/B _22521_/A _23563_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__14729__A1 _14648_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25989__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31719_ _31719_/Q _31730_/CLK _31719_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_140_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29318__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_3728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23449__C1 _23433_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19929__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_5310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14138__A _20673_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19117__B1 _19143_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17951__B_N _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_89 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16194__A3 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17391__A2 wire2086/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24110__B1 wire1298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_140_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26650__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25240_ _26238_/A _25239_/X _25254_/A2 hold99/A _31244_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_22452_ VGND VPWR _22452_/X _17078_/C _16987_/X _14353_/B _22513_/A2 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_121_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_4497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4448 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20574__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_3947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19648__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3384 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_3725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18552__B _18552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21403_ _21403_/B _21403_/A _21425_/A _21864_/B _21864_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XANTENNA__22672__A0 _30089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24273__C _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13977__A _28520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25171_ _31215_/Q _31217_/Q _25172_/A _31216_/Q _25173_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_82_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22383_ _29941_/D _22385_/B1 _30480_/Q hold393/A _22356_/B VGND VPWR _22382_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__26938__B1 wire1230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18044__S _18044_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18340__A1 hold271/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26402__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24122_ _28540_/Q _24120_/X wire807/X _23879_/X _24122_/X _24184_/A2 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__29468__CLK _32316_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27357__S hold144/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21334_ _21328_/Y _21419_/D _21651_/B _21329_/Y _21336_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__25666__A _27413_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24413__A1 _24434_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2325 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_5525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18891__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_2784 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24570__A _25416_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_2006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire4205 VPWR VGND hold49/A hold48/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3409 VPWR VGND _26139_/A wire3412/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_214_5182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21227__A1 _17047_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28930_ _28930_/Q _32015_/CLK _28930_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24053_ VGND VPWR _23879_/A _23879_/B _24050_/X _24053_/X _24052_/X _20673_/C VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_249_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_65_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19664__A _27070_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21265_ VGND VPWR _23226_/S _29727_/Q _18546_/A _29727_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24964__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30722__D input81/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_3122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_4835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_15 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_1181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1505_A wire1508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3504 VPWR VGND wire3504/X _31190_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27589__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30445__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23004_ VGND VPWR _23004_/X _25693_/C _32384_/Q _32376_/Q _23036_/S1 _32392_/Q _32400_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_2_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_2905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_3076 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3515 VPWR VGND wire3515/X wire3515/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20216_ VGND VPWR _20219_/S _28761_/Q _27699_/A1 _28761_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_284_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27363__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2342 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_115_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28861_ _28861_/Q _32442_/CLK _28861_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19840__A1 _28572_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21196_ VGND VPWR _21205_/S _29638_/Q _27701_/A1 _29638_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17300__C1 _17299_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20986__B1 _13831_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout965_A wire981/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28492__CLK _31570_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2814 VPWR VGND wire2814/X _25513_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24177__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_277_445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16654__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15457__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22521__C _23563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27812_ _32530_/Q _27811_/Y _32530_/D _25796_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 Xwire2825 VPWR VGND _23671_/S _23672_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_3633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20147_ VGND VPWR _19562_/B _19581_/A _20168_/A2 _20147_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__25913__A1 _19566_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1089 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3914_A wire3915/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2836 VPWR VGND _23296_/S _23301_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_132_3480 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28792_ _28792_/Q _32353_/CLK _28792_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2847 VPWR VGND _21955_/B _21766_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_252_1381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23924__B1 wire1587/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2869 VPWR VGND wire2869/X _21107_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27743_ VGND VPWR _27747_/S _32472_/Q _25029_/B _32472_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_287_1411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24955_ _24955_/Y _24955_/B _24955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__24192__A3 _20673_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20078_ VGND VPWR wire2655/X _19551_/A _20106_/A _20078_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_223_5407 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_2673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_5587 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30595__CLK _31871_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14320__B _21548_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1874_A _19784_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16406__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15209__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_854 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27666__A1 _19732_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26469__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23906_ _28455_/Q _26838_/A1 _23906_/X _28583_/Q _19858_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_210_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_3117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31840__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27674_ VGND VPWR _27677_/S _32409_/Q _19937_/B _32409_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23633__B _25087_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_1466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_1421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2046_A wire2047/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24886_ VGND VPWR _14209_/Y _19503_/A _24881_/X _24886_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_223_4717 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20749__S _20749_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input129_A la_input[60] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16957__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21950__A2 _21501_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_402 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29413_ _29413_/Q _30474_/CLK _29413_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_141_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26625_ _26625_/X _31853_/Q _26637_/B _26684_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__14968__A1 _32423_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_413 wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25141__A2 _25139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23837_ _30840_/D _24310_/B _23837_/A _23849_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_184_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_1465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_424 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_74_3161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14968__B2 _15355_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_435 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2108 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19356__B1 _19278_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27418__A1 _32265_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_446 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_161_3131 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23152__B2 _30108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29344_ VGND VPWR hold323/X _30285_/CLK _29344_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_144_2127 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_457 wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2296 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14570_ _15228_/A2 _30771_/Q _14570_/Y _15228_/A3 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__21163__A0 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2213_A _19559_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26556_ _26182_/A _26555_/Y _26543_/B _31761_/Q _31761_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_468 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23768_ _26660_/B _23768_/Y _31790_/Q _31789_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_1 XANTENNA__22964__S _22968_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25429__B1 _24568_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_479 wire713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21702__A2 wire1866/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1797 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26626__C1 _27087_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2430 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_1065 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25507_ VGND VPWR _25109_/B _25507_/D _31333_/D _25507_/C _25510_/C VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XANTENNA__31990__CLK _32024_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23451__A1_N _22185_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22719_ VGND VPWR _22718_/X _22717_/Y _22954_/S _22719_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__15917__B1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29275_ _29275_/Q _32345_/CLK _29275_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26487_ _17490_/B _26486_/X _26487_/Y _26435_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_256_5249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_4963 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20910__B1 _20848_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23699_ _30808_/D _23822_/B _23699_/A _23732_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_242_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18743__A _28114_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17382__A2 hold9/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24464__B _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16240_ _16240_/X _28985_/Q _16818_/A2 _16841_/B2 _16841_/C1 _16239_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__26641__A2 _26662_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28226_ _28226_/Q _32428_/CLK _28226_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_196_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14196__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25438_ _25437_/X _26498_/A _31359_/Q _25430_/Y _31299_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__15393__A1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input94_A la_input[29] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19659__A1 _28490_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_189_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20484__S _20484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22258__A3 _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19558__B _19559_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19123__A3 _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__13887__A _28610_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28157_ _28157_/Q _30451_/CLK _28157_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16171_ _16157_/X _16170_/X wire918/X _16161_/X _16171_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_139_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18867__C1 _18866_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26929__B1 wire1232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31220__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25369_ VGND VPWR _25376_/C _31277_/Q _25381_/C _25369_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire2582_A wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32346__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27775__B _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3422_A wire3425/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18181__C _18234_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15122_ _15761_/A2 _15122_/X _15121_/X _15521_/S _32315_/Q _15759_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_27108_ _27116_/B _26892_/B _27116_/A _27108_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__23466__A1_N wire1405/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15145__A1 wire3261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27267__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17078__B _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28088_ _28088_/Q _31962_/CLK _28088_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16342__B1 _16834_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18882__A2 _19306_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24480__A _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_4_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22415__A0 _21981_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_3815 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16893__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19930_ _25676_/B1 _19929_/X _19984_/A2 _28613_/Q _28613_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_15053_ _15053_/X _15760_/B1 _15052_/X _29565_/Q _15561_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_250_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28835__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27039_ _31998_/Q _31999_/Q _27039_/Y _27036_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_152_3823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19574__A _19581_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3921 VPWR VGND _21769_/A _29736_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2847_A _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22966__A1 wire3649/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22712__B _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14004_ _28493_/Q _14004_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xfanout3943 VPWR VGND wire3946/A _29717_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_250_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_190_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30050_ VGND VPWR _30050_/D _30466_/CLK _30050_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27354__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26157__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31370__CLK _32299_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21609__A _21609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19861_ wire860/A _19861_/C _24276_/B _19861_/B _19861_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__32496__CLK _32545_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20977__A0 _29442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2289 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout3965 _29652_/Q _23342_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_253_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19831__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_2690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_hold5_A hk_dat_i[25] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24168__B1 _20126_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15448__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14546__C_N _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17094__A _17094_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18812_ _18812_/X _19346_/D1 _27990_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__30938__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21328__B _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16202__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19792_ _19792_/C _19792_/A _19792_/X _26904_/A _23599_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XANTENNA__14511__A _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3655 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_5078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14656__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_111_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_2177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28985__CLK _32321_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_4238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18743_ _28114_/Q _18743_/X _19374_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_168_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15955_ VGND VPWR _16823_/S _32046_/Q _29105_/Q _15955_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_133_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output515_A wire4025/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18398__A1 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26200__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput160 la_input[89] _30578_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA__23391__A1 _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27657__A1 _27737_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3364 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput171 VGND VPWR _30558_/D la_input[99] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_264_640 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24639__B _24639_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput182 VPWR VGND mprj_dat_i[17] input182/X VGND VPWR NF_sky130_fd_sc_hd__dlymetal6s2s_1 X_14906_ VGND VPWR _15275_/S _29593_/Q _29625_/Q _14906_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_228_3949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_4341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_1498 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_3094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4130_A _28551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18674_ _18674_/Y _29811_/Q _30331_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 Xinput193 mprj_dat_i[27] input193/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_30952_ _30952_/Q _32296_/CLK _30952_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_146_3627 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_57_4071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15886_ _15886_/X _32343_/Q _16026_/A2 _16039_/B2 _16039_/C1 _15885_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_237_887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19740__C _19748_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4817 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_224_515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26865__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22030__A1_N _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27730__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21344__A _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_3813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_2915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17625_ VGND VPWR _17832_/S _17624_/X _17601_/X _17625_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__25889__A_N _25911_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14959__A1 _15350_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_75_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14837_ VGND VPWR _14837_/X _15628_/B1 _15631_/A1 _14836_/X _14835_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__28215__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_76_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23679__C1 _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30883_ _30883_/Q _32275_/CLK wire711/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_75_2246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_94_2869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_4025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18129__S _18132_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_283_2587 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_3050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19347__B1 _19375_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_2549 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24340__B1 _26364_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15620__A2 _16081_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_879 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_105_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29868__D _29868_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25683__A3 _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5452 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_179_4104 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21154__A0 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17556_ _17556_/X _17815_/B1 hold261/X _31708_/Q _17539_/B VGND VPWR _17783_/B2 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_109_3482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17260__C _29199_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14768_ _16415_/A2 _15590_/A1 _28874_/Q _14768_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19898__A1 _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_394_core_clk _30274_/CLK clkbuf_5_1_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__22874__S _22933_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23694__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22351__C1 _22350_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_70_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_1897 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_980 _28520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16507_ _16507_/X _28824_/Q _16828_/A2 _16832_/A3 _16068_/S _16506_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17968__S _17974_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30318__CLK _30339_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_991 _24841_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32553_ _32553_/Q _32553_/CLK hold484/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20901__A0 _29379_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15908__B1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32294__D _32294_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_323_core_clk _30276_/CLK clkbuf_opt_16_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 X_17487_ _17863_/B _17488_/A _17488_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 XFILLER_70_3570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_35_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14699_ VGND VPWR _14820_/S _30890_/Q _29168_/Q _14699_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18570__A1 _18554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26093__B1 wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25435__A3 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_5038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19226_ _19226_/X _19223_/X wire1900/A _19225_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_31504_ _31504_/Q _31798_/CLK _31504_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28365__CLK _31920_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16438_ _16438_/X _29086_/Q _16448_/A2 _16448_/A3 _15975_/S _16437_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_239_4757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14187__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15384__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3272 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_2314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32484_ _32484_/Q _32544_/CLK _32484_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20394__S _20406_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4315 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24643__A1 _31680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23446__A2 _22141_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_3460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26870__A wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_4329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15923__A3 wire1458/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21457__A1 _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31435_ _31435_/Q _32548_/CLK _31435_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19157_ VGND VPWR _19178_/B _28329_/Q _28262_/Q _19157_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_16369_ VGND VPWR _16369_/X _16368_/X _16816_/B1 _16838_/A1 _16367_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_86_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_195_2036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17125__A2 _22512_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_3122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18322__A1 _18623_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2320 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_2601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30468__CLK _30468_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18108_ VGND VPWR _18110_/S wire3843/X _28037_/Q _28037_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_4042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire766_A wire766/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27593__A0 _32172_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26396__A1 _31685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25199__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19088_ _19088_/X _19088_/S _28227_/Q _28195_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__16333__B1 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31366_ _31366_/Q _31923_/CLK _31366_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18873__A2 _19317_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17676__A3 _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31713__CLK _31730_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24390__A _26904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_3611 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput601 _28702_/Q la_output[89] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22406__A0 wire727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3019 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20126__C _23879_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15687__A2 _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput612 _20003_/A1 la_output[99] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30317_ _30317_/Q _32269_/CLK _30317_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18039_ VGND VPWR _18039_/S wire3851/X _27971_/Q _27971_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_214_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24946__A2 _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput623 _24380_/A mprj_adr_o[19] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_31297_ _31297_/Q _31363_/CLK _31297_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_1201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput634 wire2404/X mprj_adr_o[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_278_209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14895__B1 _15630_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput645 wire2317/X mprj_dat_o[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22957__A1 _30469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22622__B hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18086__A0 _28016_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_2760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire933_A wire933/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_4078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput656 wire2323/X mprj_dat_o[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_214_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21050_ _29509_/D hold221/A _21049_/Y _22135_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__27345__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_5388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput667 wire2326/X mprj_dat_o[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24540__D _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30248_ _30248_/Q _31920_/CLK _30248_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19822__A1 _28563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput678 wire3120/X mprj_sel_o[1] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_186_4108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_1365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21224__A4 _21285_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22421__A3 _22026_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput689 _32603_/X serial_clock_out VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16636__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20001_ _25512_/A _20000_/Y _20028_/A _28647_/Q _28647_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24159__B1 _23859_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2646 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3063_A _18043_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31863__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30179_ _30179_/Q _32108_/CLK _30179_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_5455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_2616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14647__B1 _15631_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16100__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23906__B1 _19858_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2405 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_3420 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_5131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25371__A2 _25265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19931__B _25025_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25652__C _27404_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18389__A1 wire3841/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_132_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_3404 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23382__A1 _30360_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15951__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24624__A2_N _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14662__A3 _14661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24740_ VPWR VGND _24786_/B _24740_/B _31454_/Q VGND VPWR NF_sky130_fd_sc_hd__xor2_2 XFILLER_266_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21952_ _21512_/A _21952_/X _21965_/B _21940_/Y _21519_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XANTENNA__23921__A3 _24892_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_1726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20569__S _20580_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_261_109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19650__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1737 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16939__A2 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32219__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_107_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4594 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27640__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26617__B1_N wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20903_ VGND VPWR _22550_/S _20902_/X _29380_/Q _29380_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26320__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24671_ _24650_/D _24666_/B _25895_/A _24672_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17451__B _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_1196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2736 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_3028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21883_ _21956_/A _21648_/X _21883_/Y _21713_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_75_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_71_4046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29140__CLK _31961_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_5249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18039__S _18039_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1190_A wire1199/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_3882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19338__B1 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24331__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26410_ _31689_/Q _26403_/B _26559_/A _31689_/D _26408_/Y _26427_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 XFILLER_54_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23622_ VGND VPWR _31076_/Q _31072_/Q _31075_/Q _23623_/B VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26871__A2 wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4537 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21145__A0 wire1833/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20834_ _14405_/X _29348_/Q _20834_/Y _21846_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_27390_ VGND VPWR _27394_/S _32240_/Q _27417_/A0 _32240_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__28708__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22488__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23685__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24882__A1 _19503_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22342__C1 _22384_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24565__A _31211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_2349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_2130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26341_ _26340_/X _31658_/Q _31658_/D _26347_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_23553_ VGND VPWR _23560_/S _30474_/Q _30044_/Q _30474_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20765_ VGND VPWR _20785_/S _27242_/A0 _29279_/Q _29279_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31243__CLK _31754_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32369__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18563__A _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3697_A _30343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17364__A2 input181/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1455_A _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24284__B _24284_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27820__A1 _32533_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26623__A2 _26619_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25426__A3 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4103 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22504_ VGND VPWR _22512_/A3 _22510_/A4 _22510_/A2 _22504_/X _30013_/Q _22512_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 X_29060_ _29060_/Q _32436_/CLK _29060_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_257_4846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3820 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_2395 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15375__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26272_ _26271_/Y _26182_/A _31624_/Q _26301_/B _31624_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14178__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29290__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23484_ VGND VPWR _23518_/S _23483_/X hold457/X _30428_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24095__C1 _24087_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold124_A hold124/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_3782 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire706 VPWR VGND wire706/X wire706/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24634__A1 _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20696_ VGND VPWR _20708_/S _29212_/Q _27684_/A1 _29212_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire717 VPWR VGND wire717/X wire718/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_238_4256 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28011_ _28011_/Q _30030_/CLK _28011_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire728 VPWR VGND wire728/X wire728/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15398__S _15644_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25223_ _25223_/X _25263_/B1 _29852_/D hold119/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_10_3649 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire739 VPWR VGND wire739/X wire739/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_22435_ VGND VPWR _22443_/A _29984_/Q _29985_/Q _23355_/A _22434_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_101_3766 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28858__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_5534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_1998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23988__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3864_A wire3864/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_3_7_1_core_clk clkbuf_3_7_2_core_clk/A clkbuf_3_7_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_88_3886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_66_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17116__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21999__A2 _21629_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25154_ _25154_/X _31213_/Q _24564_/Y _31214_/Q _31212_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__31393__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26387__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22366_ _22366_/X wire3213/X _18291_/X wire3712/X _22372_/A2 _29761_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_65_3138 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_138_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18864__A2 wire2582/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14315__B _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24105_ _24105_/X _20128_/B wire4114/X _28730_/Q _24188_/A2 VGND VPWR _24097_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_5_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24398__B1 _31003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4587 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21317_ _22010_/C _21317_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_82_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3028_A wire3027/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4013 wire4013/X _28719_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_29962_ _29962_/Q _31375_/CLK _29962_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_25085_ wire883/A _24955_/B _25085_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_191_3179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22297_ VGND VPWR _22307_/S _29883_/Q _29142_/Q _29883_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_232_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire4024 VPWR VGND wire4024/X _28676_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_65_2448 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2565 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold493_A hold493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18502__S _18507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3531 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22948__A1 _21428_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4035 VPWR VGND wire4035/X _28672_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_130_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27882__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25546__D _25546_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27336__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28913_ _28913_/Q _32307_/CLK _28913_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_5031 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24036_ _24079_/B1 _28692_/Q _24036_/X _19680_/B _28500_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA__21429__A _30345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4057 VPWR VGND wire4057/X wire4058/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21248_ _20846_/X _29710_/Q _29710_/D _23393_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__14350__A2 _14328_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold370 hold370/A hold370/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19274__C1 _20901_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19813__A1 _19789_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29893_ VGND VPWR _29893_/D _29914_/CLK _29893_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_134_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4068 VPWR VGND wire4068/X wire4069/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout2527 VPWR VGND wire2530/A _20519_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold381 hold381/A hold381/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_249_5053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1991_A wire1995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4079 VPWR VGND wire4079/X wire4080/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold392 hold392/A hold392/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_5_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3345 VPWR VGND _26913_/A wire3345/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_2353 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2549 VPWR VGND _20257_/S _20245_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_232_2453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17824__B1 _31734_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2611 VPWR VGND wire2611/X _14257_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25347__C1 _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21620__A1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28844_ _28844_/Q _32137_/CLK _28844_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2622 VPWR VGND _19521_/B _14216_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3367 VPWR VGND wire3367/X _13861_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21179_ VGND VPWR _21184_/S _29621_/Q _27684_/A1 _29621_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_60_3772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2163_A _20042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25843__B _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14331__A _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2633 VPWR VGND _19535_/B wire2634/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xwire3378 VPWR VGND wire3378/X _13758_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22959__S _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2644 wire2645/X _19547_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xfanout1848 _14439_/Y _21830_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_115_2273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3389 VPWR VGND wire3389/X _32605_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_112_3862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18319__A1_N _29767_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout861 _19852_/A2 _19789_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xwire2655 VPWR VGND wire2655/X wire2656/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout1859 _14404_/X _22966_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_164_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout872 VPWR VGND _25065_/A _25041_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24165__A3 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2666 VPWR VGND _14183_/A wire2666/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27116__A _27116_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25362__A2 _25360_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28775_ _28775_/Q _32547_/CLK _28775_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32379__D _32379_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2677 wire2678/X _14174_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire1932 wire1932/X wire1933/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_25987_ VGND VPWR _19535_/B _19563_/A _26015_/A _25987_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_73_5546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire2688 VPWR VGND wire2688/X wire2689/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18738__A _28242_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23373__A1 _30351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22176__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20987__B _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2699 wire2700/X _19601_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24459__B _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15850__A2 _16039_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_3564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_128_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15740_ _30802_/Q _15740_/B1 _15707_/A _15758_/A1 _15740_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_56_3808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27726_ VGND VPWR _27728_/S _25033_/B _32458_/Q _32458_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire1965 VPWR VGND _19088_/S _18982_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24938_ _25687_/B1 _24937_/Y _24955_/A _31113_/Q _31113_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19041__A2 _19034_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2428_A wire2429/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20479__S _20480_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21384__B1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26955__A _31979_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4683 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_180_4230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_684 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26847__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21923__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27550__S _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_1285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27657_ VGND VPWR _27657_/S _27737_/A1 _32396_/Q _32396_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15671_ _15751_/A1 _16910_/A2 _15671_/X _15727_/A2 _28834_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_245_183 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_210 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24869_ _31080_/D _24868_/Y wire2253/X _24475_/C _25160_/A wire863/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_54_4266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15063__B1 _15640_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19329__B1 wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_221 _17330_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_232 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24322__B1 wire1346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17410_ VGND VPWR hold23/A hold22/X _17408_/X _17447_/B2 _17409_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26674__B _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_5535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_141_4236 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14622_ _14622_/X _32043_/Q _14822_/B1 _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_233_356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26608_ VGND VPWR _26607_/X _26684_/A2 wire3452/X _26608_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__26862__A2 wire2672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28388__CLK _30330_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_243 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18390_ VGND VPWR _18390_/S wire3838/X _28167_/Q _28167_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_254 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_3513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27588_ _25641_/B _32260_/Q _27588_/X _25641_/A _32252_/Q _32268_/Q _32244_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_141_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_265 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14810__B1 _14823_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24475__A _24480_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29633__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_3693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_275_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_276 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2910 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_4047 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17341_ wire3561/X _31915_/Q _17341_/X _17272_/A wire2111/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA_287 wire1264/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29327_ _29327_/Q _32327_/CLK _29327_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_145_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14553_ VGND VPWR _15275_/S _29207_/Q _29271_/Q _14553_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26539_ _26539_/B _31055_/Q _26539_/A _26539_/X _26539_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_260_197 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_298 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23810__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2797_A _27506_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_71_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2995 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_1409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17355__A2 _17355_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_2601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_104_4091 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_1589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26614__A2 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_3357 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_89_2905 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14169__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29258_ _29258_/Q _29644_/CLK _29258_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17272_ _17272_/Y _17272_/B _17272_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__21611__B _22067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14484_ _30435_/Q _27485_/B _14482_/X _14480_/Y _14475_/Y _14484_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_4 XFILLER_10_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_3609 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_4053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_1881 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25822__A0 _30152_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30610__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31736__CLK _31737_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_5601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18192__B _18192_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_104_3390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_4307 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19011_ _19203_/A2 _27871_/Q _19318_/B1 _19011_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_193_4646 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_193_3901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16223_ _16840_/A2 wire3281/X _32352_/Q _16223_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22608__A_N _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28209_ _28209_/Q _31914_/CLK _28209_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_174_3300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29189_ _29189_/Q _30911_/CLK _29189_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17107__A2 _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3804_A _29910_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14506__A _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_4621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_193_3945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31220_ _31220_/Q _32564_/CLK _31220_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16154_ VGND VPWR _16566_/S _29528_/Q _29562_/Q _16154_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_48_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_48_3347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_256_3677 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26378__A1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20111__A1 _28701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1928 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20942__S _20948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18855__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1188 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17512__C1 _17509_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_191_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_2741 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14225__B _14293_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_2515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15105_ VGND VPWR _15105_/X _15102_/X _15744_/B1 _15752_/B1 _15104_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16866__A1 _16601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_4346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31151_ _31151_/Q _32551_/CLK _31151_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_2353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20662__A2 _20680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length893 VPWR VGND wire890/A wire892/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25586__C1 _25579_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24928__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16085_ _15770_/C wire1733/A _16085_/X _16515_/B1 _32117_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__30760__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4080_A _28655_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_2364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_2080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_4698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31886__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25050__A1 _31168_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18412__S _18425_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1096_A wire1097/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22939__A1 _22965_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29013__CLK _32432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30102_ _30102_/Q _31938_/CLK _30102_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_113_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15036_ _15628_/B1 _15034_/X _15286_/C1 _15036_/Y _15035_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_2 X_19913_ _19912_/X _28606_/Q _28606_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_152_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_3604 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27725__S _27728_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31082_ _31082_/Q _32299_/CLK _31082_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19804__A1 _28554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output632_A _17897_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2933 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_267_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16618__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3773 _22512_/A2 _22510_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_152_3697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30033_ VGND VPWR _30033_/D _30403_/CLK _30033_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_269_765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17815__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19844_ _26893_/C1 _19843_/X _19856_/A2 _28574_/Q _28574_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_26_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_core.RAM256_Di0[19] wire2696/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3795 VPWR VGND _21355_/A wire3800/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_228_5137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21058__B _30051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1263_A _23993_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_3200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14241__A _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19280__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_5028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14629__B1 _28742_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31116__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3890 VPWR VGND wire3890/X _29848_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_0_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26550__A1 _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_1983 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19775_ _25904_/A _19774_/Y _19782_/A _28544_/Q _28544_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_16987_ VGND VPWR _16987_/X _16987_/B _16987_/A _17094_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__29163__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23364__A1 _30342_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19568__B1 _19638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3323 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_5315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18726_ _18726_/X _19346_/D1 _27858_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_4_2773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15938_ wire1004/X wire1476/X _29588_/Q _15938_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20178__A1 _28733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23903__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20389__S _20391_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31984_ _31984_/Q _32017_/CLK _31984_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_20_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18776__D1 _19196_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17043__A1 hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_146_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_835 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27460__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2340 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18240__B1 _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26302__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25105__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_2422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30935_ _30935_/Q _31937_/CLK _30935_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18657_ VGND VPWR _18657_/S wire3814/X _28370_/Q _28370_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_107_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30140__CLK _30404_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15869_ wire985/X _15869_/X _15868_/X _15975_/S _29007_/Q _16448_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__31266__CLK _31761_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_2775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2772 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23116__A1 _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16397__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24313__B1 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_2909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25656__A3 _31383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17608_ _31714_/Q _17539_/B _17608_/X _31713_/Q _17815_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_33_4339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32511__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_263_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5023 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_153 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27312__A_N hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18588_ _18585_/X wire3171/X _28305_/Q _22553_/A _28305_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_222_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30866_ _30866_/Q _30866_/CLK _30866_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_198_4535 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24385__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_181_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_105_3132 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21678__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_5282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32605_ VPWR VGND _32605_/X _32605_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_229_1191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17539_ VGND VPWR _17539_/X _17539_/B _31707_/Q _17539_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__24816__C _31702_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_1033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17501__A_N _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2964 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30537__D hold142/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3211 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23720__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30797_ _30797_/Q _30911_/CLK _30797_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1897_A _18706_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17346__A2 _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_274_5146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_2693 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26605__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22617__B _22617_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire883_A wire883/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19886__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30290__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_1979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32536_ _32536_/Q _32536_/CLK _32536_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_257_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20550_ VGND VPWR _20550_/S _29067_/Q _23671_/A1 _29067_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_198_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_3078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16554__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20350__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25813__A0 _31430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24616__A1 _31554_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17751__C1 _17730_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24616__B2 _31553_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2306 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21013__S _21013_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_3996 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_22_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19209_ _19209_/X _19206_/X _19156_/S _19208_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_235_4418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20481_ VGND VPWR _20481_/S _29000_/Q _27261_/A0 _29000_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32467_ _32467_/Q _32467_/CLK _32467_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_2661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25928__B _26164_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24092__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14416__A _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2619 VPWR VGND _24606_/B _17881_/C VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_196_3591 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22220_ VGND VPWR _22213_/X _29832_/Q _22104_/A _22220_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__15109__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31418_ _31418_/Q _32527_/CLK _31418_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_285_57 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26369__A1 _31672_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23729__A _23729_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16306__B1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14580__A2 wire1727/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4863 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27566__B1 _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18846__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19926__B _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32398_ _32398_/Q _32398_/CLK _32398_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_66_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_274_3788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_118_3537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16857__A1 _16950_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27030__A2 _27035_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19418__S _19418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22151_ _30033_/Q _21034_/S _22151_/X _22150_/Y _22149_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__21850__A1 hold298/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20653__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24919__A2 _19577_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3180_A wire3181/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31349_ hold502/A _31351_/CLK _31349_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14850__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput420 _13876_/Y la_oenb[40] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19645__C _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_173_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14868__B1 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16321__A3 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18059__A0 _27989_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput431 _13866_/Y la_oenb[50] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21102_ VGND VPWR _21102_/X _22553_/C _23354_/C _22553_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__23052__A0 _23051_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27318__A0 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput442 _13856_/Y la_oenb[60] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__27635__S _27636_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_3756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22082_ _30441_/Q _23302_/B _22621_/B _23302_/C _30440_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XANTENNA__19256__C1 _27883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput453 _13910_/Y la_oenb[70] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_2388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_47_2178 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_3024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25592__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput464 _13900_/Y la_oenb[80] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_173_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_5253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput475 _13890_/Y la_oenb[90] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_148_5614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22071__C _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput486 _31091_/Q la_output[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_21033_ _29497_/D _29497_/Q _21032_/Y _22104_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 X_25910_ _26771_/A _25909_/Y _25911_/B1 _31472_/Q _31472_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__29506__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput497 wire3511/X la_output[10] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_214_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_25_2443 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26890_ _26890_/Y _26890_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA_wire3445_A wire3446/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1203_A wire1210/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_2345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15817__C1 _16041_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input1_A clk_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_4350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16085__A2 wire1733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32041__CLK _32310_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_2593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19008__C1 _30266_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25841_ _31442_/Q _31444_/Q _25843_/C _31443_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_214_2194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1597_A _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24001__C1 _23992_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1228 VPWR VGND wire1228/X wire1228/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_275_757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16777__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_4217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_3600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13990__A _28507_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15832__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28560_ _28560_/Q _32553_/CLK _28560_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25772_ _25773_/C _32101_/Q _32099_/Q _32100_/Q _25772_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_77_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22984_ VGND VPWR _22984_/X _25693_/C _32382_/Q _32374_/Q _23036_/S1 _32390_/Q _32398_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XANTENNA__20299__S _20302_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28530__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26775__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29656__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2500 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27511_ VGND VPWR _27515_/S _27704_/A1 _32326_/Q _32326_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27370__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1764_A _19527_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27097__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24723_ _24723_/B _24729_/B _31505_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_93_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_73_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21935_ wire3802/X _14406_/Y wire3779/X _17143_/A _21935_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_284_1436 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28491_ VGND VPWR _28491_/D _32419_/CLK _28491_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_255_492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23145__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_245_core_clk _32568_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_205_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_clkbuf_opt_16_0_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15045__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23107__A1 hold223/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1572_A wire1575/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_3890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout928_A _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_4301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32191__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18782__A1 _18781_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16242__C1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23107__B2 _30099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_3852 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_665 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_180_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26844__A2 wire2636/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27442_ VGND VPWR _27476_/S _32279_/Q _27441_/X _32279_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24654_ VGND VPWR _24654_/B _24654_/Y _31449_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XANTENNA__15596__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21866_ _21866_/Y _21903_/A _21866_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_107_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16793__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_4288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30633__CLK _31837_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_259_4919 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31759__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_3727 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23605_ _23605_/X wire1330/X _31066_/Q _31063_/Q wire1371/X VGND VPWR _23604_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__21669__A1 _29903_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21712__A _21713_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19326__A3 _19321_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20817_ VGND VPWR _20817_/S _29330_/Q _27706_/A1 _29330_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27373_ VGND VPWR _27375_/S _32226_/Q _27276_/X _32226_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_1865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3981_A hold190/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21669__B2 wire3926/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_935 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24585_ VPWR VGND _24585_/X _31539_/Q _24585_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_201_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_21797_ _21746_/S hold158/A _21797_/X _21999_/S1 _21812_/D _17044_/X hold289/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__18293__A _18328_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27102__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26057__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19192__D1 _19196_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22330__A2 _22370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29112_ _29112_/Q _32332_/CLK _29112_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_257_5366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_1898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26324_ _26323_/Y _26218_/A _31650_/Q _26327_/B _31650_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23536_ VGND VPWR _23536_/S hold494/A _30027_/Q _30457_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_3287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_979 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16545__B1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20341__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15348__B2 _15347_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20748_ VGND VPWR _20755_/S _27258_/A0 _29263_/Q _29263_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24607__A1 _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_1420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_1199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3810 VPWR VGND _18532_/A1 wire3812/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29043_ _29043_/Q _32440_/CLK _29043_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26072__A3 _26070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_162_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14556__C1 _14928_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26255_ _31616_/Q _26255_/X _26267_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__22618__B1 wire3699/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23467_ VGND VPWR _23523_/S _28372_/Q _30420_/Q _23467_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_123_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30783__CLK _30783_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20679_ VGND VPWR wire833/A _20680_/B _32339_/Q _20680_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__24083__A2 _19995_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input196_A mprj_dat_i[2] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_2881 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3060 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3854 VPWR VGND _23287_/A1 wire3855/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_139_2004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29036__CLK _32280_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25206_ _25595_/A _25205_/X _25264_/A2 hold119/A _31228_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_175_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3865 VPWR VGND wire3864/A wire3866/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22094__A1 _29814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23291__A0 _30273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22418_ VGND VPWR _22003_/X _22616_/S _22417_/Y _29973_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_195_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_69_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3876 VPWR VGND _18478_/A1 wire3877/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__14571__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_26_3_core_clk clkbuf_opt_26_3_core_clk/X clkbuf_opt_26_3_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_26186_ VPWR VGND _31581_/D _26186_/B _26236_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__20762__S _20784_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18837__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length3887 VPWR VGND _18342_/A1 wire3888/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23398_ _29648_/Q _30372_/D _30372_/Q _13831_/Y _23348_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__24234__S _24234_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4705 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23830__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26015__A _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_4985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16848__A1 wire1044/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_2903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25137_ _25430_/B _25139_/B _26539_/B _31204_/D _25137_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_22349_ _29924_/D _22385_/B1 _21413_/A hold217/A _22356_/B VGND VPWR _22348_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_49_2966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25032__A1 _31159_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2378_A wire2379/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3014 VPWR VGND _18432_/S _18401_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_3_833 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14859__B1 _15611_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30013__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31139__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3218_A _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3902 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_212_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25068_ _25076_/C1 _25067_/X _25086_/A2 _31177_/Q _31177_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29945_ VGND VPWR _29945_/D _30667_/CLK _29945_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_input57_A la_input[110] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3047 _18087_/X _18113_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__25583__A2 _24493_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28060__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29186__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_3585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3120 VPWR VGND wire3120/X _17912_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_268_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1836 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23594__A1 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24019_ _24019_/X _24186_/A3 _19927_/X _28626_/Q _31104_/Q _24192_/A2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 X_16910_ wire3242/X _16910_/A2 _16910_/X _16947_/A2 _29003_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_5_4473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xfanout1601 _24192_/A2 _24892_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_3394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_2250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17890_ _24384_/D _24612_/A _24384_/C _24384_/A _26541_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4bb_4 X_29876_ VGND VPWR _29876_/D _31961_/CLK _29876_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14061__A _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19262__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_264_5337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1623 VPWR VGND wire1625/A _19787_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_1_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2430 wire2430/A wire2430/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire3175 VPWR VGND wire3175/X _18163_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1634 _19712_/X _24273_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_267_3025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_4040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17273__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3186 VPWR VGND wire3186/X _17260_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1645 _19700_/C _27053_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_21_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16841_ _16841_/A2 _16841_/X _16840_/X _16841_/C1 _28801_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__17273__B2 _17447_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28827_ _28827_/Q _31927_/CLK _28827_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26532__A1 _31750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25335__A2 _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30163__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2463 _23268_/S _23267_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_115_2092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_3009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1667 VPWR VGND wire1668/A wire1672/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_78_2606 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23805__C _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22149__A2 _22150_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_919 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15823__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17372__A hold54/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19560_ VGND VPWR wire2656/X _26866_/A1 _19598_/A _19560_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_264_4669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2712_A wire2713/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32534__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_267 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17268__C_N wire3185/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19014__A2 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16772_ _16781_/A2 wire3283/A _29095_/Q _16772_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28758_ _28758_/Q _32379_/CLK _28758_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1762 VPWR VGND _20671_/C _23805_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_13984_ _28513_/Q _13984_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_143_4309 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1773 VPWR VGND wire1773/X _18805_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__23897__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18222__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_4923 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18511_ VGND VPWR _18522_/S wire3877/X _28283_/Q _28283_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_2600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15723_ _15722_/X _15543_/S _15723_/A2 _32443_/Q _15723_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27709_ VGND VPWR _27709_/S _27709_/A1 _32443_/Q _32443_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_130_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2780 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19491_ _19491_/X _31321_/Q _31322_/Q _25482_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_93_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_WE0[2] wire1442/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25099__A1 _26542_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28689_ VGND VPWR _28689_/D _31837_/CLK _28689_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__15036__B1 _15286_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3754_A _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26296__B1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_182_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_205_5490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_4074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30720_ hold208/A _32473_/CLK input82/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18442_ VGND VPWR _18466_/S wire3889/X _28216_/Q _28216_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_3621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15654_ _15654_/X _29547_/Q _15653_/X _15737_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_180_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20580__A1 _27706_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20937__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_3370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23313__S _23317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14605_ VGND VPWR _14605_/X _14675_/S _15631_/A1 _14604_/X _14603_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_106_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30651_ _30651_/Q _32345_/CLK hold462/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_34_3958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18373_ VGND VPWR _18397_/S hold271/X _28150_/Q _28150_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27485__A_N _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15585_ _15585_/X _29032_/Q _15584_/X _15610_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__14935__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18525__A1 _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26048__B1 _31532_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17328__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18407__S _18407_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_4107 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_1938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_5417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19868__A4 _26838_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17324_ wire3562/A _31912_/Q _17324_/X _17446_/B2 _17324_/B1 VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XFILLER_102_3327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_106_3496 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14536_ _14529_/Y _14535_/Y _21103_/B _21103_/A _14536_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_198_2418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_67_4402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_50_2525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26599__A1 _31773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20332__A1 _27489_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16536__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30582_ hold297/A _31877_/CLK _30582_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_output582_A _28684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17733__C1 _17485_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24933__A _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16000__A2 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32321_ _32321_/Q _32321_/CLK _32321_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17255_ _29206_/Q _17254_/X _30763_/Q _17251_/X _17248_/X _17255_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__22609__B1 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14467_ hold364/A _14087_/Y _14086_/Y _30438_/Q _14467_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_271_4618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_3439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32572__D hold252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25748__B _25752_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14236__A _19505_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24074__A2 _24139_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4017 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_3802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24652__B _31468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18289__A0 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16206_ _16206_/A2 wire1485/X _28952_/Q _16206_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__22085__A1 wire1547/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32252_ _32252_/Q _32259_/CLK _32252_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_leaf_49_core_clk _32168_/CLK clkbuf_5_11_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_28_3707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14562__A2 _15296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_3873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17186_ VGND VPWR _17223_/S _30210_/Q _30399_/Q _17186_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_1714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_192_2006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18828__A2 _18827_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14398_ _31901_/Q _14397_/Y _14398_/B _14398_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_4 XFILLER_26_4110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_259_1151 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23821__A2 wire1808/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16839__A1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31188__D _31188_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31203_ _31203_/Q _32577_/CLK _31203_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__28403__CLK _30279_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21293__C1 _21288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29529__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16137_ VGND VPWR _16443_/S _28846_/Q _28878_/Q _16137_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_wire1380_A wire1380/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17547__A _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32183_ _32183_/Q _32467_/CLK _32183_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_1758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_52_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18142__S _18143_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_304 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_2394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_2161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26366__A4 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23034__A0 _23032_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_4124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31134_ _31134_/Q _32531_/CLK _31134_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32064__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_5483 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27455__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16068_ VGND VPWR _16068_/S _16067_/X _16066_/X _16068_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_26_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3625 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_170_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_2730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23585__A1 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30506__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17981__S _17981_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15019_ _16721_/A2 wire3298/A _32121_/Q _15019_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_212_4782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_152_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14865__A3 wire1693/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19762__A _20171_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31065_ _31065_/Q _31282_/CLK _31065_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_61_3377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30820__D _30820_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_2824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20399__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_4861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_3057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28553__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_201 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14402__C _23342_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17264__A1 _32294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29679__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30016_ _30016_/Q _30314_/CLK _30016_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19827_ VGND VPWR _26872_/B _19789_/C _19853_/A2 _19827_/X _27007_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_61_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_4233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_3109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_3158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_168_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32597__A _32597_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16472__C1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14617__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15814__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_1926 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1812_A wire1812/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_5161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19758_ _19758_/Y _19758_/B _19772_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_263_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21348__B1 _21444_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23888__A2 _23886_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20420__B _29454_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3716 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30656__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1092 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26595__A _31773_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17016__A1 _29723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_185_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27079__A2 wire772/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21008__S _21008_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17016__B2 _29878_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18213__B1 _18278_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21899__A1 hold232/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18709_ _18708_/X wire1949/X _19298_/A2 _28145_/Q _18709_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_39_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_37_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_17_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31967_ _31967_/Q _32074_/CLK _31967_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19689_ _26859_/C1 _19688_/X _19711_/A2 _28505_/Q _28505_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_225_643 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_94_3186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_1144 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17567__A2 _17873_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26287__B1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20020__B1 wire850/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16224__C1 wire958/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_3197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_5189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4114 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19961__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_2121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26826__A2 _26833_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21720_ _22448_/C wire1855/A _21720_/Y _16974_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_206_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21994__S1 _21999_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30918_ _30918_/Q _32073_/CLK _30918_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_0_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_4417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_1008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20571__A1 _27154_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_280_3781 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31898_ _31898_/Q _32583_/CLK _31898_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_198_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22628__A _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2897 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_124_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length1080_A wire1081/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23223__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15042__A3 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21532__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25004__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21651_ VGND VPWR _21651_/X _21651_/B _21651_/A _21651_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_142_2417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length1178_A _15435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30849_ _30849_/Q _31998_/CLK _30849_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_33_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_37_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18317__S _18317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_1453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18516__A1 _18516_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17319__A2 _31911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20552__A_N _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20602_ VGND VPWR _20604_/S _24227_/A0 _29117_/Q _29117_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_254_5517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18544__C _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24370_ _32032_/Q _24370_/A2 _24370_/X _32000_/Q _26382_/A1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20323__A1 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25939__A _31485_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16527__B1 _16925_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21582_ _21581_/Y _21575_/X _22010_/A _22035_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 XANTENNA__21520__B1 _21638_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_3771 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_3722 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_4351 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_50_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23321_ VGND VPWR wire820/A _30299_/Q _17112_/X _30299_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_28_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26054__A3 _17877_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_2103 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20533_ VGND VPWR _20535_/S _29050_/Q _27247_/A0 _29050_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32519_ _32519_/Q _32525_/CLK _32519_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19937__A _25079_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5230 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3395_A wire3396/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30036__CLK _30051_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2416 VPWR VGND _20669_/C _20126_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26040_ _31529_/Q _31530_/Q _31528_/Q _26028_/X _26040_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23273__A0 _30255_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2204 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27539__A0 _32231_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23252_ VGND VPWR _23268_/S _29500_/Q _30235_/Q _30235_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20464_ VGND VPWR _20481_/S _28983_/Q _27689_/A1 _28983_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20582__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2438 VPWR VGND _27265_/S _27264_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18819__A2 _18811_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19656__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32407__CLK _32473_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23812__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_4660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28083__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1715 _22307_/S _23366_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_max_length1512_A _15561_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22203_ _22281_/B2 _22202_/X _22203_/X wire2275/X _22201_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__24281__C _24281_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17457__A _17474_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1737 VPWR VGND _22512_/A4 _18661_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23183_ VGND VPWR _23183_/X _23181_/X _23182_/X _23180_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_153_3225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21823__B2 _21708_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20395_ VGND VPWR _20406_/S _27242_/A0 _28917_/Q _28917_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18052__S _18052_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_131_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26211__B1 _26235_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22082__B _30440_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1759 VPWR VGND _24317_/C _24281_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout1418_A _18661_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23025__A0 _32467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22134_ _29818_/Q _29820_/Q _29819_/Q _22133_/D _22135_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__27365__S _27366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27991_ _27991_/Q _30474_/CLK _27991_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout780_A _26335_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30186__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput250 _14022_/Y la_iena[118] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_153_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput261 _13779_/Y la_iena[12] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_268_4024 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22379__A2 _22338_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23576__A1 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21058__A_N _30419_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput272 _13769_/Y la_iena[22] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_248_4609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_3692 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_251_1413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26489__B _26509_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29730_ VGND VPWR _29730_/D _30445_/CLK _29730_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__19672__A _26797_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31431__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_3080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput283 _13980_/Y la_iena[32] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26942_ _31966_/Q wire1575/X _31966_/D wire2395/X wire1235/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22065_ _14069_/Y _22065_/X _22065_/B1 _22965_/S _23155_/A _17228_/C VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__32557__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold191_A hold191/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3827_A wire3828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput294 _13970_/Y la_iena[42] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_181_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21587__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_724 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold289_A hold289/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1881_A wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16058__A2 _16828_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18452__A0 _28226_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18536__C_N wire3739/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21016_ VGND VPWR _21020_/S _29481_/Q _27705_/A1 _29481_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_112_2210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21707__A _21708_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29661_ _29661_/Q _32117_/CLK _29661_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26873_ _26218_/A _26872_/Y _26900_/A _31886_/Q _31886_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_186_3023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17904__B _31038_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_5018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22302__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_4956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18288__A _30328_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27920__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_779 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16463__C1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28612_ _28612_/Q _31860_/CLK _28612_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_268_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25868__A3 _25869_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25824_ VGND VPWR _27854_/C _31437_/Q _30153_/Q _25824_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_147_3018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21426__B _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1058 VPWR VGND wire1058/X wire1058/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29592_ _29592_/Q _32342_/CLK _29592_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_281_4257 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1069 VPWR VGND wire1069/X _14567_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_77_3362 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_4678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31581__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_2929 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17007__B2 _29417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_28_1_core_clk clkbuf_5_28_1_core_clk/X clkbuf_5_28_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_28543_ _28543_/Q _31351_/CLK _28543_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_90_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25755_ _27181_/B _32082_/Q hold242/A _32081_/Q _32083_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_144_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22967_ VGND VPWR _22969_/S _30479_/Q _30144_/Q _30144_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_38_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15018__B1 _15638_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17558__A2 _17586_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26278__B1 _26188_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18755__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_147_2339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_4323 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_4107 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_2953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2833 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2399 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_3075 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_2740 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_5630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24706_ _31457_/Q _24706_/X _24706_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_73_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input111_A la_input[44] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21918_ VGND VPWR _21955_/B _21917_/X wire3145/X _21918_/X _21916_/Y VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_55_4394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28474_ _28474_/Q _32567_/CLK _28474_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19931__C_N wire1316/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20562__A1 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25686_ _31387_/Q _25635_/Y _31388_/Q _25686_/X _25686_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__16766__B1 wire903/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20757__S _20784_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input209_A rstb_l_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24229__S _24232_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22898_ VGND VPWR _22898_/X _22924_/B _29901_/Q _22924_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_199_3406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3262_A _15047_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16230__A2 _16818_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_38_2678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27425_ VGND VPWR _27475_/S _32107_/Q _32270_/Q _27425_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_710 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24637_ _24637_/C _24637_/B _24805_/C _24637_/D _24637_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XANTENNA__22839__B1 _30471_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21849_ _21099_/C _21849_/X wire3206/A _22954_/S _23155_/A _17085_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XPHY_721 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_3827 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18507__A1 wire3892/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_732 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_159_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_107_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3168_A _18534_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_4028 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_754 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15370_ _15370_/X _28858_/Q _15521_/S _15761_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_27356_ VGND VPWR hold144/A _32211_/Q _27278_/X _32211_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_106_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20314__A1 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24568_ _31214_/Q _31213_/Q _31212_/Q _25159_/C _25447_/A _24568_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_4 XPHY_765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14792__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_1879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20058__A wire847/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_158_3103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_787 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14321_ _30335_/Q _14321_/Y _21339_/C _21451_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_1 X_26307_ _26307_/Y _26327_/B _26876_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XPHY_798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28426__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_1004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23519_ VGND VPWR _23519_/S _28398_/Q hold247/A _23519_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_14_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27287_ VGND VPWR _27292_/S _32151_/Q wire2801/X _32151_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_197_3185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14056__A _31750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25253__A1 _29867_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24499_ _24543_/A _24499_/Y _25578_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__24056__A2 _24273_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_5341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3335_A _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26450__B1 _26456_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25253__B2 hold109/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17040_ _29689_/Q hold384/A _17040_/X _30381_/Q _16971_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_193_3038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29026_ _29026_/Q _32444_/CLK _29026_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_81_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_2520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14252_ _14127_/A _14252_/Y _14251_/X wire3489/X wire3235/X _29496_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XANTENNA__32087__CLK _32233_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26238_ VPWR VGND _31607_/D _26238_/B _26238_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_49_3442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2424 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20492__S _20504_/S VGND VPWR VPWR VGND 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XFILLER_238_3193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17367__A _32278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26169_ _26169_/X _31478_/Q _27131_/B _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_275_1947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14183_ _14183_/A _14183_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__inv_12 XANTENNA__21814__B2 _21766_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length2972 VPWR VGND _18602_/S _18601_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_231_4635 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_62_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28576__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16297__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17494__A1 _31616_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27275__S _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_3309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21290__A2 _21288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_156_2170 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26753__A1 _26760_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25556__A2 hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18991_ _19201_/A2 _27998_/Q _19151_/S _18991_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_273_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29821__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18897__S _19200_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23567__A1 wire2013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20169__C_N _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_2086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_1791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24764__B1 _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17942_ VGND VPWR _17948_/S wire3836/X _27880_/Q _27880_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_251_3393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_2668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29928_ hold218/A _29928_/CLK _29928_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_2_5_core_clk clkbuf_opt_2_6_core_clk/A clkbuf_opt_2_5_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_273_1693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19235__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2952 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23816__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30679__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16049__A2 _16798_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1420 _23064_/S _23056_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17246__A1 wire2122/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23308__S _23317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17246__B2 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1431 _27700_/A1 _18288_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__25308__A2 _25341_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 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_29546_/Q _29580_/Q _16824_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29971__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4043_A _28669_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_5481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_1964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_289_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1497 VGND VPWR wire1500/A _14546_/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_264_4477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_229_4597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1570 VPWR VGND wire1570/X wire1571/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_108_4226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_2788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19543_ _19566_/A _19543_/X _19543_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31821_ _31821_/Q _31896_/CLK _31821_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_56_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_237 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16755_ VGND VPWR _16755_/X _16925_/B1 _16967_/A1 _16752_/X _16754_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_264_3765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13967_ _13967_/A _13967_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1592 VPWR VGND _23735_/B _25087_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_281_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_4139 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_3514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 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XANTENNA__20553__A1 wire1840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16686_ _16686_/X _30795_/Q _16934_/A2 _16944_/B2 wire962/X _16685_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_56_2745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18210__A3 _18342_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24819__A1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4163 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_108_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13898_ _28599_/Q _13898_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__21750__B1 wire3206/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22448__A _22448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_3722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_2928 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30703_ _30703_/Q _32464_/CLK hold277/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18425_ VGND VPWR _18425_/S _28200_/Q wire3836/X _28200_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_199_5397 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_56_2778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15637_ wire1175/A _15575_/C _28865_/Q _15637_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_72_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14665__S _14818_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31683_ _31683_/Q _31762_/CLK _31683_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__18137__S _18139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24295__A2 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14232__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30059__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2268_A wire2270/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1161 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18356_ VGND VPWR _18359_/S wire3842/X _28134_/Q _28134_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30634_ hold391/A _31570_/CLK _30634_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_195_4538 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16509__B1 wire1048/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20305__A1 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15568_ wire1501/X wire1493/X _15568_/X _15692_/S _15567_/X _32439_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_15_3176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14783__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_4191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_1648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19171__A1 _28330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17307_ _17308_/C _30926_/Q wire3581/X wire3096/X _30999_/Q _19792_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__17976__S _17980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14519_ _14519_/Y _22078_/D _29452_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__29351__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30565_ _30565_/Q _31884_/CLK hold418/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16880__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18287_ _18288_/B _18286_/X _22370_/A2 _29760_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XANTENNA__24047__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15499_ _15489_/X _29157_/D wire1072/X _15498_/X _15479_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__18661__A _18661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_2212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_278_2261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17721__A2 _17488_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24382__B _26903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32304_ _32304_/Q _32432_/CLK _32304_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22058__A1 _21956_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_4437 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_176_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17238_ VGND VPWR _17238_/S _17231_/X _17237_/X _30405_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14535__A2 _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28919__CLK _32015_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15732__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold65_A hk_dat_i[0] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2068 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_2125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26992__A1 _31980_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30496_ _30496_/Q _32306_/CLK _30496_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_258_2868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25197__C _25197_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21805__A1 _21830_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22614__C _30349_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32235_ _32235_/Q _32523_/CLK _32235_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_3747 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31454__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1762_A _23805_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3586 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17169_ VGND VPWR _17238_/S _17162_/X _17168_/X _30396_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_3609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_67_3597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_2822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16288__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_1457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_5619 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3409 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_17_core_clk_A clkbuf_5_6_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20180_ _26687_/B _20179_/Y _20128_/X _28734_/Q _28734_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32166_ _32166_/Q _32204_/CLK _32166_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_1419 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_808 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23558__A1 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24755__B1 _31460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31117_ _31117_/Q _32470_/CLK _31117_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_247_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_3786 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_1121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32097_ _32097_/Q _32535_/CLK _32097_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_110_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23726__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18600__S _18601_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_80_3797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_69 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_2721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22630__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17237__A1 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_2451 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21033__A2 _22104_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23218__S _23223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31048_ VGND VPWR _31048_/D _32349_/CLK _31048_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_22_3158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_257_532 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_4290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22122__S _22180_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20241__A0 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17788__A2 _17742_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2563 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15799__A1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16120__S _16120_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23870_ _30851_/D _24310_/B _23870_/A _23873_/B _26837_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_268_1217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_4686 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16996__B1 _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_1520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16460__A2 _16959_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22821_ _22820_/C _22820_/B _30469_/Q _22821_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_max_length1295_A wire1296/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_20_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25660__C _27281_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_809 _18845_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_3876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_3827 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_165_3663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18737__A1 _28178_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23191__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2812 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23730__A1 _31569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25540_ VGND VPWR _26159_/A _25540_/D _31348_/D _25540_/C _25546_/D VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_35_3519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22752_ _22735_/Y _22736_/Y _22737_/X _22741_/A _22752_/Y _22741_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o32ai_4 XFILLER_202_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_74_3579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20577__S _20584_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2683 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_4897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21703_ _29351_/Q _29352_/Q _21708_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XFILLER_39_2987 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24276__C _24276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28449__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2206 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25471_ _19488_/C _25454_/A _31315_/D _25470_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_72_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22683_ _22779_/A1 _22680_/X _29730_/Q _22687_/B _21328_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XANTENNA__23180__C _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14223__A1 _31273_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18047__S _18047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_3972 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23089__A3 wire1678/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24286__A2 _26376_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14223__B2 wire3232/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15420__B1 wire1068/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27210_ _25769_/X _27210_/B _32097_/D _27276_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_258_5461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1368_A _19645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26772__B _26949_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_33_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2236 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_181_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24422_ _24437_/B _24420_/Y _31011_/D _24421_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_244_1261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23494__A0 _31951_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22297__A1 _29883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21634_ _21634_/X _22026_/B1 _29904_/Q _21427_/C _21953_/A2 VGND VPWR _21633_/B VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_28190_ _28190_/Q _32420_/CLK _28190_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_219_5434 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27112__D_N _26896_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14774__A2 _14933_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15971__B2 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27141_ VGND VPWR _27153_/S _27684_/A1 _32047_/Q _32047_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24353_ _24352_/X _24357_/B1 wire1668/X _24353_/A1 _30979_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 X_21565_ _21509_/X _17159_/B _21519_/Y _21565_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_clkbuf_leaf_56_core_clk_A clkbuf_5_11_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16790__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24038__A2 _24892_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25235__A1 _29858_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4744 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25388__B _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1535_A wire1539/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5601 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25235__B2 hold116/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16515__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17712__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2031 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length2202 VPWR VGND _19955_/A2 _19577_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_23304_ VGND VPWR _23304_/X _23304_/B _30285_/Q _23304_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__28599__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20516_ VGND VPWR _20518_/S _21203_/A0 _29034_/Q _29034_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_159_2733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27072_ _27072_/X _27122_/B _32014_/Q _27070_/C _27122_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_222_1581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_159_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22049__B2 _22047_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24284_ _24284_/X _24284_/C _24284_/A _24284_/B _24284_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_235_4045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold204_A hold204/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26983__A1 _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21496_ _21499_/C _21588_/A _21674_/B _21499_/D _21500_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__16920__B1 _16930_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29844__CLK _32441_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2638 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2064 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_1896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18290__B _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_2307 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21201__S _21201_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26023_ _31525_/Q _26023_/X _31526_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_23235_ _23393_/A _23234_/X _30422_/Q _23231_/C _30222_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 Xmax_length1512 VPWR VGND _15759_/A3 _15561_/B2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_253_2209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_2048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_3344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20447_ VGND VPWR _20447_/S _28967_/Q _27512_/A1 _28967_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_157_3180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16091__A _16091_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_238_1032 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_1081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_30_0_core_clk clkbuf_5_30_1_core_clk/A clkbuf_5_31_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_257_1666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_2974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16279__A2 _16840_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_153_2310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_3268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23166_ _23191_/C1 _21211_/B _23185_/B _22620_/A _23166_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17476__B2 _31685_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30821__CLK _32318_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26735__A1 _26754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20378_ VGND VPWR _20384_/S _25025_/B _28902_/Q _28902_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31947__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20480__A0 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14323__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1589 VPWR VGND _24284_/C _24276_/D VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_131_4043 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26748__A_N _31789_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22819__A_N _22820_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23549__A1 _30470_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4843 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_3039 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16684__C1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22117_ _29816_/Q _29818_/Q _29817_/Q _22119_/D _22117_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__17915__A _17915_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29994__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2075 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19217__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27974_ _27974_/Q _30449_/CLK _27974_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18510__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23097_ hold298/A wire3171/X _23097_/X _30097_/Q wire2840/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_118_2485 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2076_A wire2076/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_1844 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27108__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_3732 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_input159_A la_input[88] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18425__A0 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29713_ VGND VPWR _29713_/D _32075_/CLK _29713_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_79_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_5290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24390__C_N _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26925_ _31949_/Q wire1573/A _31949_/D wire2371/X wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22048_ VGND VPWR _22048_/S _22067_/B _21712_/X _22048_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_270_1877 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_40_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_260_core_clk _32435_/CLK clkbuf_5_19_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_2_4465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20232__A0 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23355__C _23355_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3386 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_80 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16436__C1 wire1055/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15435__A _15435_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_3749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30971__CLK _32063_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29644_ _29644_/Q _29644_/CLK _29644_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14870_ VGND VPWR _14870_/X _14867_/X wire1202/A _15630_/A1 _14869_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_99_2160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2243_A _19652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26856_ VGND VPWR _19563_/B _19563_/A wire749/X _26856_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27160__A1 _27703_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20783__A1 _27705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2685 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_268_2452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22967__S _22969_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29224__CLK _32114_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20060__B _24118_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22509__C1 _22509_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21980__B1 _21942_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_131_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13821_ _31125_/Q _13821_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__25171__B1 _31217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25807_ _32547_/Q _25807_/X _32546_/Q _25807_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_148_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14998__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29575_ _29575_/Q _32574_/CLK _29575_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_1702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26787_ _27068_/B wire1272/X _27122_/B _26787_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_242_4038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_4158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_3706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14462__A1 _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23999_ wire1621/X _23998_/X _31134_/Q _24081_/A3 _23999_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_40_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18728__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2458 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23721__A1 _31566_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24467__B _25881_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_164_3151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_148_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16540_ VGND VPWR _16929_/S _30505_/Q _30791_/Q _16540_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_28526_ _28526_/Q _32549_/CLK _28526_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_242_3326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13752_ _25322_/C _31265_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_129_3282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25738_ VGND VPWR _25738_/X _25738_/B _25738_/A _25738_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__30201__CLK _32108_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_3056 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20487__S _20504_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2508_A _20752_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_95_core_clk_A clkbuf_5_14_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31327__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26963__A _31991_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16203__A2 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16471_ _16938_/A2 wire3285/X _28823_/Q _16471_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_clkbuf_leaf_314_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28457_ _28457_/Q _32017_/CLK _28457_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_160_3048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25669_ VGND VPWR _25668_/X _25667_/Y _25661_/X _25669_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__23090__C _29715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29374__CLK _30471_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14214__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_196_4814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2647 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_3613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21603__C _21603_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15411__B1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18210_ _18210_/X _30326_/Q _18209_/X _30327_/Q _18342_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_220_4369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16754__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3463 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15422_ _29155_/D _15393_/X _15421_/Y wire1072/X _15402_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27408_ VGND VPWR _27412_/S _32256_/Q _27417_/A0 _32256_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22288__A1 _29874_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_1481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19190_ _19190_/X _19368_/D1 _27880_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_223_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14765__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19689__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_4118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28388_ VGND VPWR _28388_/D _30330_/CLK _28388_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_196_4858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19153__A1 _28070_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_5594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_max_length3811_A wire3812/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27215__A2 _32099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3679 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18141_ VGND VPWR _18143_/S wire3844/X _28069_/Q _28069_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_4702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_584 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15353_ VGND VPWR _15516_/S _29476_/Q _32130_/Q _15353_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27339_ VGND VPWR _27339_/S _32196_/Q _27280_/X _32196_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_2041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30351__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19577__A _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_4833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31477__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24029__A2 _24165_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25298__B _25413_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17164__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_3709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4101 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25226__A1 _31237_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2877_A _21066_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_2393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_1161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3717_A _30328_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14304_ _14245_/B _17895_/C _14303_/X _31278_/Q wire3232/X _29508_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_279_2581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_2366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18072_ VGND VPWR _18079_/S _18644_/A1 _28002_/Q _28002_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30350_ _30350_/Q _32324_/CLK _30350_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15175__C1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23237__B1 _23228_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15284_ _15284_/X _28100_/Q _15283_/X _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__25777__A2 _31417_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16911__B1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_3130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 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XANTENNA__14922__C1 _28814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3492 VPWR VGND wire3491/A _31264_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_30281_ _30281_/Q _30281_/CLK _30281_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_7_5055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15190__A2 _15332_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_193_2156 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_2489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_49_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_119_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32020_ hold238/A _32039_/CLK _32020_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_256_1143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_10_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_2732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22460__A1 _22448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_4282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14166_ _14166_/X _14168_/S hold146/X hold109/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XANTENNA__25529__A2 _31343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_4_961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20950__S _20958_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1619 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_275_1788 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_348_core_clk _30204_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_clkbuf_leaf_202_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output545_A _28715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20471__A0 _27251_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15478__B1 wire1210/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_2446 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3581 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_1029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4160_A _28055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19208__A2 _19358_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18974_ _30264_/Q _18974_/X _19185_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_14097_ _29364_/Q _14097_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_230_2006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_188_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18420__S _18420_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23004__A3 _32376_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24201__A2 _19710_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18416__A0 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23038__S _31396_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_4209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22212__A1 hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27733__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16690__A2 _16941_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17925_ VGND VPWR _17946_/S wire3894/X _27863_/Q _27863_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_6_1205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19613__C1 _25512_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_15_0_core_clk clkbuf_opt_15_1_core_clk/A _29752_/CLK VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_234_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20223__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18967__A1 _22090_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1496 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_110_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23960__A1 wire4125/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32102__CLK _32536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_2140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_266_3849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23960__B2 wire4015/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21066__B _27485_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27151__A1 _27614_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1343_A _19770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17856_ VGND VPWR _17856_/X _17810_/X _17855_/X _17777_/B _17685_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__25761__B _32089_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_353_core_clk_A clkbuf_5_18_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20774__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21971__B1 _21955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2090 VPWR VGND wire2090/X wire2090/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout1294 VPWR VGND wire1296/A wire1298/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_4274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3669 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25162__B1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16807_ VGND VPWR _16812_/A _16491_/S _16807_/B1 _16806_/X _16805_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16442__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5202 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_264_4285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3502 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2372 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17787_ _17787_/Y _17787_/A _17833_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XFILLER_260_4138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14999_ VGND VPWR _15004_/A _14996_/X _14998_/X _15368_/S _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_229_3682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23173__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15650__B1 _15745_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29717__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23712__A1 _31563_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19916__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_105_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19526_ _19860_/B _26763_/B _23598_/C _23599_/C _19849_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_207_4670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31804_ _31804_/Q _31871_/CLK _31804_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16738_ VGND VPWR _16961_/S _29328_/Q _28766_/Q _16738_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_225_3546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_17_3216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20526__A1 _29043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20397__S _20414_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1608_A wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_1861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_2992 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18195__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32252__CLK _32259_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31735_ _31735_/Q _31738_/CLK _31735_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19457_ _31343_/Q _28447_/Q _19456_/A _31344_/Q _19457_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_16669_ _16815_/A2 _16669_/X _16668_/X _16843_/A2 _32324_/Q _16841_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__14205__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_2526 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_5369 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_1278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_2466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_4635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_3893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_203_4589 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_241_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_1450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18408_ VGND VPWR _18433_/S _28183_/Q _29847_/Q _28183_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23476__A0 wire3444/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22279__A1 _22135_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_64_core_clk _32401_/CLK clkbuf_5_12_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_245_1581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3292 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14756__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15953__A1 _28873_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19388_ VGND VPWR _19407_/S _27234_/A0 _28404_/Q _28404_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31666_ _31666_/Q _32431_/CLK _31666_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28741__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_2529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_143_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_3311 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29867__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1434 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2911_A _20473_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14408__B _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23501__S _23515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18339_ VGND VPWR _18339_/S wire3899/X _28117_/Q _28117_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_3956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30617_ _30617_/Q _31837_/CLK hold355/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17155__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25217__A1 _29849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31597_ hold176/A _32583_/CLK _31597_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1977_A _18790_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19695__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_2903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25217__B2 hold105/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2283 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_241_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22625__B _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire963_A wire963/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21350_ _21350_/X _21550_/A _30454_/Q _21550_/B _21444_/A _14431_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_159_2029 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15705__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30548_ hold205/A _32431_/CLK input50/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24543__D _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4977 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_67_4073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30844__CLK _31937_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_4868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_176_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21716__A_N _29776_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_4207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_60_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21021__S _21021_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20301_ VGND VPWR _20311_/S _27684_/A1 _28842_/Q _28842_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_176_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28891__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21281_ VGND VPWR _22968_/S wire2039/X hold373/A _29771_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_82_3826 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15181__A2 wire1741/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30479_ VGND VPWR _30479_/D _30479_/CLK _30479_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_28_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14424__A _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_1390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_3417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23020_ VGND VPWR _23020_/X _25693_/C _32386_/Q _32378_/Q _23036_/S1 _32394_/Q _32402_/Q + VGND VPWR NF_sky130_fd_sc_hd__mux4_2 XFILLER_236_2941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17458__A1 _31619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20232_ VGND VPWR _20236_/S _28775_/Q wire2012/X _28775_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_190_4991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32218_ _32218_/Q _32532_/CLK _32218_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_254_1817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17458__B2 _31683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26717__A1 _26720_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_4720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27209__A _32095_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20860__S _20866_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_2963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_392_core_clk_A clkbuf_5_1_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_2641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3708 VPWR VGND wire3708/X _30336_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__25655__C _27349_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20462__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14143__B _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3719 _18278_/A _18199_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_max_length1308_A _20191_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32149_ _32149_/Q _32467_/CLK _32149_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_270_1129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20163_ wire877/X _19754_/B _20163_/X _20191_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__30994__CLK _31375_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16130__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27390__A1 _32240_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26193__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28121__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_4617 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29247__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1116_A _14552_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2699 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18407__A0 wire3895/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22203__A1 _22281_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27643__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23400__B1 hold245/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22203__B2 wire2275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24971_ _31129_/D _25035_/B _24970_/X _25041_/A _24996_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__17454__B _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20094_ _20094_/Y _26015_/B _20106_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__20161__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_80_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23175__C _29732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_1984 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20214__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_252_1585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18958__A1 _28383_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16418__C1 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_5064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_184_5474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26710_ _26710_/Y _31770_/Q _26720_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XANTENNA__23951__A1 _28460_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3484 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23922_ wire4095/X wire1296/X _23921_/X _31159_/Q _23922_/X _19995_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XFILLER_230_2573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27142__A1 wire2002/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_5600 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27690_ VGND VPWR _27710_/S _27690_/A1 _32424_/Q _32424_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_273_822 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20765__A1 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30224__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16969__B1 wire891/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_50 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_243_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25153__B1 _25181_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16433__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1872 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17630__A1 _31716_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26641_ _26641_/X _31857_/Q _26637_/B _26662_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_39_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2461 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_284_192 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23853_ _23853_/X _23859_/A _31862_/Q _26772_/A _31894_/Q _19527_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__17630__B2 _31715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28271__CLK _30027_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_2929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29397__CLK _30139_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_4186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18566__A _23236_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_3906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19368__D1 _19368_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22506__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_606 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17470__A _17863_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24900__B1 _24899_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22804_ VGND VPWR _22800_/X _22809_/D _22801_/X _22933_/S _30467_/Q _22745_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 X_29360_ _29360_/Q _30446_/CLK _29360_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_265_2669 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_617 _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26572_ _26572_/X wire1275/X wire3461/X wire3462/X _26571_/X _23743_/Y VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__22062__S0 _22061_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20517__A1 _23671_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_2740 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_628 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23784_ VGND VPWR _23784_/X hold269/A _23805_/A _23805_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA_hold154_A hold154/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20996_ VGND VPWR _20999_/S _29461_/Q wire2002/A _29461_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_3034 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_639 _26785_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26783__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18285__B _29341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28311_ _28311_/Q _32365_/CLK _28311_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_280_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_55_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25523_ _31340_/Q wire2952/X _31341_/Q _25524_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_165_2770 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22735_ _22734_/X _22733_/B _29711_/Q _22735_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_243_2945 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30374__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29291_ _29291_/Q _32433_/CLK _29291_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_fanout910_A wire915/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19922__A3 _20122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3894_A _29847_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24259__A2 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_161_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26653__B1 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_55_2074 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_161_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28242_ _28242_/Q _30030_/CLK _28242_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_25454_ _25454_/B _25454_/Y _25454_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__15944__A1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22666_ _22663_/B _22747_/B _30454_/Q _22666_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_263_1681 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_202_4088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_5111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_179_core_clk_A clkbuf_5_27_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24405_ _24405_/Y _31003_/Q _31004_/Q _24399_/B _31005_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XANTENNA__27989__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21617_ _21698_/C _22756_/C _21618_/D _29718_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__17146__A0 _30394_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28173_ _28173_/Q _30384_/CLK _28173_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_4009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3058_A _18083_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25385_ _31280_/Q _31279_/Q _25385_/X _25383_/Y _25408_/B _25389_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_120_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25208__A1 hold96/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22597_ _22597_/X _22578_/S _22594_/S wire3709/X _30359_/Q VGND VPWR _22596_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__18505__S _18507_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1917_A wire1935/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27124_ _25836_/A _25836_/C _31048_/Q _31049_/Q _25836_/B _27130_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111a_2 XFILLER_254_5177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_3827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_1143 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17697__A1 _17696_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_3428 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24336_ _32015_/Q _19710_/B _24336_/X _31983_/Q wire1346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_174_3718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_241_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18894__B1 _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21548_ VGND VPWR _21655_/B _21548_/B _21548_/A _21549_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__20150__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_271_5480 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_1187 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27055_ _32005_/D _32005_/Q _27054_/X wire772/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_219_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_172_4154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4777 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_237_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_276_2787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24267_ _24267_/X _24276_/C _31581_/Q _24276_/B _24276_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_194_3199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21479_ _21819_/B _21480_/B _21449_/C _21448_/Y _21475_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_2 XANTENNA__19438__A2 _19432_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2193_A _19752_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14334__A _23115_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_3141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_274_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_2468 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23234__A3 _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_4296 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1331 VPWR VGND _19853_/A2 wire1330/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_219_3895 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14020_ _28477_/Q _14020_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_26006_ _26687_/B _26005_/Y _26014_/A2 _31518_/Q _31518_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17449__A1 _32276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23218_ VGND VPWR _23223_/S _30210_/Q _30140_/Q _30210_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_172_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_1917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19989__A3 wire1319/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20770__S _20783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24242__S _24242_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24198_ VGND VPWR _23879_/A _23879_/B _24195_/X _24198_/X _24197_/X _20673_/C VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_81_3358 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_172_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1364 _24069_/A2 _19646_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_62_2001 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26023__A _31525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2916 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16657__C1 wire1058/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_5374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_24_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32125__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25916__C1 _26771_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2360_A wire2361/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23149_ _30177_/D _23190_/B _23148_/X hold173/A wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_133_3459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1912 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1005 _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3200_A _21463_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_2282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1016 wire3098/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_1761 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_1027 _23932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26958__A _27006_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24195__B2 wire3642/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25392__B1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1038 _24085_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15971_ _16815_/A2 _15971_/X _15970_/X _16120_/S _29523_/Q _16448_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_40_3044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27957_ _27957_/Q _32379_/CLK _27957_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_1049 _27165_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23085__C _29714_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20205__A0 wire1682/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_3172 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15880__A0 _29103_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17569__B1_N _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28614__CLK _32535_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22745__A2 _22733_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17710_ _17616_/B _17692_/X _17709_/X _17707_/X _17710_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__23942__A1 _28491_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14922_ _14546_/A wire1732/X _14922_/X _14933_/B1 _28814_/Q _15770_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_26908_ _26764_/B _24383_/B _26906_/X _26902_/X _31901_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__23942__B2 _28683_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19071__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27133__A1 _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2625_A _14215_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25581__B hold98/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18690_ VGND VPWR _18689_/X wire1949/X _18690_/X _19333_/B _28177_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_265_4561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28595__D _28595_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_682 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19610__A2 _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27888_ _27888_/Q _30402_/CLK _27888_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_248_3557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold60 hold60/A hold60/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21953__B1 _22026_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_2365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3761_A _21778_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold71 hold71/A hold71/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_163_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32275__CLK _32275_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15227__A3 _15575_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17621__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4425 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17641_ VGND VPWR _31718_/Q _17490_/X _17640_/X _17641_/X _17586_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 Xhold82 hold82/A hold82/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_29627_ _29627_/Q _32063_/CLK _29627_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14853_ _14852_/X _15610_/B1 _15610_/A2 _32420_/Q _14853_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17621__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26839_ _26838_/X _31869_/Q _31869_/D wire749/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_226_4556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold93 hold93/A hold93/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16695__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_4117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23813__C _23813_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1113 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30717__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25695__A1 _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_1169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_79_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_3270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13804_ _31142_/Q _13804_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_18_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_899 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_246_3281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17572_ VGND VPWR _17842_/S _17559_/X _17571_/Y _17572_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29558_ _29558_/Q _32430_/CLK _29558_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_5566 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_3642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20508__A1 _27700_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14784_ _15597_/A2 _14784_/X _14783_/X _15233_/B1 _29308_/Q _15608_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_144_3533 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3653 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28764__CLK _32428_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26693__A _27028_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19311_ _30280_/Q _19311_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_16523_ _16523_/Y _16522_/X wire918/A _16513_/X _16509_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 X_28509_ _28509_/Q _31871_/CLK _28509_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_38_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_148_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13735_ _23755_/D _31775_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__15612__B _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16188__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18626__D _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4876 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2994_A _18499_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29489_ _29489_/Q _30276_/CLK _29489_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_199_3011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17385__B1 wire3192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_2726 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14509__A _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26644__B1 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24925__B _24925_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14199__B1 wire3497/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31520_ _31520_/Q _31798_/CLK _31520_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19242_ _19242_/X _20868_/S _19237_/X wire1900/A _19235_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_73_2174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_3763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16454_ VGND VPWR _16918_/S _29536_/Q _29570_/Q _16454_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_5378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15935__A1 _29522_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_796 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25998__A2 _26015_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20945__S _20947_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30867__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_5389 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_51_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19126__A1 _28391_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output495_A _28657_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14228__B _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_1180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23321__S wire820/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3077 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15405_ _16959_/A2 wire3303/X _28827_/Q _15405_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_125_2286 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31451_ _31451_/Q _32548_/CLK _31451_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17137__A0 _17136_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_1765 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19173_ _30274_/Q _19173_/X _19178_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_16385_ VGND VPWR _16385_/X _30787_/Q _16387_/A _16387_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_199_2354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_100_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_135_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_12_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18660__A_N _18682_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18415__S _18418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19677__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19738__C _19776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22445__B _23354_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30402_ _30402_/Q _30402_/CLK _30402_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18124_ VGND VPWR _18144_/S wire3903/X _28052_/Q _28052_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_3517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17688__A1 _31721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_cap2754 VPWR VGND _20060_/A _14141_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_15336_ _32062_/Q _15335_/X _15336_/Y _15716_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__27728__S _27728_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22681__A1 _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17688__B2 _31720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31382_ VGND VPWR _31382_/D _32467_/CLK _31382_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__26947__A1 _31970_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17539__B _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output662_A wire2389/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26947__B2 _26947_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24941__A _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20692__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15699__B1 _15543_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2535 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30333_ VGND VPWR _30333_/D _30384_/CLK _30333_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_18055_ VGND VPWR _18086_/S wire3917/X _27985_/Q _27985_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15267_ _15761_/A2 _15267_/X _15266_/X _15521_/S _32319_/Q _15759_/A3 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__16360__A1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15163__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1293_A _20656_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_138_2625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_2 _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4598 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14244__A _24381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25080__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_53 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28144__CLK _30254_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24660__B _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2117 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17006_ wire3730/X _17005_/X _29989_/Q _30370_/Q _17006_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_177_1951 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_272_3875 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1552 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14218_ _26502_/C _14218_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_275_2297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_177_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30264_ _30264_/Q _30431_/CLK _30264_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22260__A1_N _22236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_3394 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19754__B _19754_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15198_ _15179_/X _29149_/D _15188_/X _15536_/B1 _15197_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 Xclkbuf_leaf_182_core_clk _32290_/CLK clkbuf_5_25_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_236_1525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24973__A3 _24996_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_97 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20444__A0 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17082__A2_N _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_2961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_1995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32003_ _32003_/Q _32271_/CLK _32003_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16648__C1 wire1055/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21787__A3 hold307/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_4273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_211_4847 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16112__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14149_ _14167_/S hold94/X VPWR VGND hold112/X hold113/A VGND VPWR NF_sky130_fd_sc_hd__mux2_8 XFILLER_64_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_2863 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26175__A2 _26164_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18150__S _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30195_ hold394/A _30431_/CLK _30195_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_266_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_111_core_clk _32430_/CLK clkbuf_5_7_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_23_3220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2994 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30247__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2595 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_2382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25194__D _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_5059 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23707__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2276 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27463__S _27475_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16663__A2 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17860__A1 _31729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25383__B1 _31280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15466__A3 _16891_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25772__A _32099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18957_ _18957_/X _19382_/A1 _18951_/X _18956_/X _22104_/A wire1564/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_209_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_4006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__28294__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_42_3887 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_3336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_4017 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14674__A1 _29521_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22197__B1 _22196_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_1013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15871__B1 _16150_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23933__A1 _13975_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22736__A2 _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31924__D hold234/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_2613 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_3460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19770__A _19770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23933__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17908_ _17908_/X _26763_/A _17913_/D _17912_/B _17891_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_288_1924 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_7_2793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27124__A1 _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_1878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_6_1046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20747__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18888_ _19380_/A2 _28281_/Q _19380_/B1 _18888_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_205_5308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_1889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_0_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24388__A _24388_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire711_A wire712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25061__C_N _24931_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16415__A2 _16415_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17612__A1 _31632_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_2544 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1091 VPWR VGND wire1093/A wire1096/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire809_A wire809/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2959_A _18649_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17839_ _17539_/C _17838_/X _31735_/D _17524_/B _17835_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_227_557 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_286_2371 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_78_2041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22400__S _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4033 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30397__CLK _30399_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_4326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_1367 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23723__C _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24489__A2 hold178/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23146__C1 _23191_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_3093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16966__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17290__A _30932_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31642__CLK _31685_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_78_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_36_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20850_ _20909_/B _18580_/A _20850_/Y _20914_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_264_3381 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21524__B _21548_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_5510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_18 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2044 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_71_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_5054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24894__C1 _25676_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18168__A2 _18158_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19365__A1 _28048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_29 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23161__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21016__S _21020_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19509_ VGND VPWR _19509_/X _23599_/C _23598_/C _26763_/B VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_277_5133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19904__A3 wire2168/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20781_ VGND VPWR _20786_/S _27258_/A0 _29295_/Q _29295_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_260_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_126_2039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17376__B1 _17374_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21172__A1 _29615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25438__A1 _25430_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length907_A _16449_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_2041 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24835__B _32580_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22520_ _30020_/Q _22520_/B _22521_/B _30021_/Q _23563_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_223_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31718_ _31718_/Q _32566_/CLK _31718_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23449__B1 _14097_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14729__A2 _14648_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_3098 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25989__A2 _19539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20855__S _22550_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19929__B _24958_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22636__A _29726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31792__CLK _32573_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24110__A1 _28667_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21540__A _21548_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24110__B2 _31177_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_2096 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24554__C _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25012__A _25081_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22451_ _22450_/X wire3112/A _22448_/X _29986_/Q _29986_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_156_4105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31649_ _31649_/Q _32567_/CLK _31649_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_3753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_5344 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18325__S _18329_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19648__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21402_ _21402_/Y _21864_/B _21864_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_221_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18552__C _30431_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17679__A1 _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25170_ _25172_/A _31216_/D _25169_/Y _25148_/A _31215_/Q _31216_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__27638__S _27638_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4198 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22672__A1 _22671_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24273__D _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17679__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20132__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26938__A1 _31962_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22382_ _22384_/B _22382_/Y _22382_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_277_3797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26938__B2 wire2717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24121_ _28508_/Q _19710_/B wire807/A _28700_/Q _20061_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__20683__B1 _26542_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24949__B1 _24950_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21333_ _21651_/B _21419_/D _14429_/B _14117_/Y _21329_/Y _21336_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__31022__CLK _31679_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_2304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32148__CLK _32204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_2083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_3339 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16351__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14154__A _19628_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24413__A2 _14388_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25610__A1 hold92/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3754 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_5_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18628__A0 _28341_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4206 VPWR VGND _30668_/D wire4207/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_5014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21227__A2 _21223_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22424__A1 _22598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24052_ _24052_/X _24207_/B1 wire4066/X _28693_/Q _19994_/X VGND VPWR wire810/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_254_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_46_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21264_ VGND VPWR _23365_/S _29726_/Q _22078_/D _29726_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_3225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20590__S _20605_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23621__B1 wire1335/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19664__B _26773_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_65_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20435__A0 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23003_ _25693_/C _32456_/Q _23003_/X _23036_/S1 _32448_/Q _32464_/Q _32408_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__28637__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3505 VPWR VGND wire3505/X _31187_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_67_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__13993__A _28504_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19156__S _19156_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20215_ VGND VPWR _20223_/S _28760_/Q _27253_/A0 _28760_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_239_1193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_4847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17465__A _31684_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16103__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28860_ _28860_/Q _32436_/CLK _28860_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26166__A2 _26163_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21195_ VGND VPWR _21195_/S _29637_/Q _27507_/A1 _29637_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18060__S _18086_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17300__B1 _17296_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19840__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20986__B2 _29448_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2804 VPWR VGND _27157_/S _27163_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__31172__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24177__A1 _31183_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_4583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27811_ VGND VPWR _25796_/X _32530_/Q _27844_/C _27811_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_232_2657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_2083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27373__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2815 _25513_/A _25512_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__24177__B2 _31151_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16654__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17851__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20146_ _25718_/A _20145_/Y _20168_/A2 _28717_/Q _28717_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_115_2455 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17851__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25913__A2 _14174_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28791_ _28791_/Q _30503_/CLK _28791_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_210_3645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_2466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_227_5533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_41_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire2848 wire2848/X _21707_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_230_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2859 VPWR VGND _21205_/S _21204_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__19680__A _19680_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23924__B2 _30747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27742_ VGND VPWR _27747_/S _32471_/Q wire2242/X _32471_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__19053__B1 wire1942/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2101 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24954_ _25076_/C1 _24953_/Y _24955_/A _31121_/Q _31121_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20077_ _26173_/B1 _20076_/Y _20106_/A _28684_/Q _28684_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_269_3281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold271_A hold271/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20738__A1 _27248_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2112 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_1889 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21396__D1 _21599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28787__CLK _32355_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21935__B1 _14406_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold369_A la_input[123] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_223_5419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3877 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29304__D _29304_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16406__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15209__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23905_ _23905_/X wire1289/X wire4100/X _31157_/Q _19994_/X VGND VPWR _23904_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_273_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18800__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27673_ VGND VPWR _27677_/S _32408_/Q _25029_/B _32408_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_4865 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_41_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17912__B _17912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22310__S _23559_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24885_ _26184_/A _24884_/Y _24881_/X _31088_/Q _31088_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__14417__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_3408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_93_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29412_ hold375/A _30250_/CLK _29412_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_167_2854 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26624_ _26624_/X _23772_/X _23776_/A _31794_/Q _26623_/X _23758_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_273_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_403 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23836_ wire1812/A _23835_/X _31821_/Q wire1624/X _23837_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_208_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_261_836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23688__B1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_414 wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14968__A2 _15515_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2039_A _14333_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_425 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24885__C1 _26184_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19356__A1 _27983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_436 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15090__B2 wire1515/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23152__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28017__CLK _30484_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_5632 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29343_ VGND VPWR hold341/X _30454_/CLK _29343_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA_447 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3878 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_4101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26555_ VGND VPWR _26555_/A2 _19503_/A _26543_/B _26555_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_458 wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_3146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4491 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23767_ _26652_/B _26660_/B _31788_/Q _31787_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XFILLER_278_4229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21163__A1 _29606_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_469 wire717/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20979_ VGND VPWR _20979_/S _30185_/Q _29444_/Q _29444_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22360__B1 wire3712/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25506_ VGND VPWR _31331_/Q _31332_/Q _31330_/Q _25507_/C _31333_/Q _19498_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_87_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22718_ _22716_/B _22718_/X _22708_/A _22704_/A _22727_/B _22709_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 X_29274_ _29274_/Q _32117_/CLK _29274_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_2152 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_193_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_15_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire2206_A wire2207/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26486_ _26486_/X _26492_/D _31703_/Q _31704_/Q _26509_/C _26539_/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__20765__S _20785_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20910__A1 _18554_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23698_ _23699_/A _26694_/A _31464_/Q _31575_/Q _25884_/B VGND VPWR _23697_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XANTENNA__24237__S _24241_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19108__A1 _28196_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26018__A _26139_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18743__B _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_4975 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_13_3444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21450__A _29733_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28225_ _28225_/Q _32420_/CLK _28225_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24101__B2 _24163_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24464__C _24464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_4986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25437_ _25430_/A _31299_/Q _24502_/X _24543_/D _25437_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_224_1462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22649_ _22649_/B _22663_/B _29877_/Q _22656_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3b_1 XANTENNA__14763__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19659__A2 _19695_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22112__B1 _30028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16590__B2 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28167__CLK _29550_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_3602 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_2450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3248_A _14744_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26960__B _31983_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16170_ _16170_/X wire1055/X _16163_/X _16165_/X _16169_/X _16449_/B1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 X_28156_ _28156_/Q _30254_/CLK _28156_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_2871 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3556 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20123__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18867__B1 _19296_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25857__A _31449_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26929__A1 _31953_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25368_ _25366_/X _26544_/C1 _31276_/D _25367_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_input87_A la_input[22] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23860__B1 _24467_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26929__B2 wire2385/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24761__A _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15121_ _16956_/A2 _15266_/A1 _28923_/Q _15121_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20674__B1 _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27107_ _26236_/A _27106_/X _27117_/A2 _32031_/Q _32031_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_24319_ _24318_/X _24357_/B1 wire1668/X _24353_/A1 _30962_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_159_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15145__A2 _16814_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28087_ _28087_/Q _32440_/CLK _28087_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14064__A _31538_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25299_ VGND VPWR _25299_/X _25380_/B _31362_/Q _25416_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_259_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25062__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17078__C _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_4295 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3415_A wire3428/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24480__B _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_272_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15052_ _15052_/X _29531_/Q _15718_/B1 _15723_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_27038_ _31998_/D _31998_/Q _27037_/Y _27036_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_191_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_opt_23_0_core_clk_A clkbuf_5_23_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31515__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23612__B1 _32564_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19574__B _19574_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_257_1260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1150 _15644_/S _15736_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_155_2246 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20426__A0 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14003_ _28494_/Q _14003_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_85_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18095__A1 _18342_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22712__C _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29562__CLK _31507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19860_ _19860_/B _19861_/D _19860_/A _19860_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_81_3177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1183 VPWR VGND _14705_/B1 _14887_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2742_A wire2742/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19292__B1 _20876_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26157__A2 _14177_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21609__B _21613_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3966 VPWR VGND _23201_/S _29649_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19831__A2 wire1330/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_2735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_4000 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_253_1157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24168__A1 wire4109/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18811_ _18811_/X _19335_/B _27894_/Q _19375_/B1 _18810_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a211o_2 Xfanout3988 VPWR VGND _21903_/A wire3990/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__25365__B1 _31276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24168__B2 _28736_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_267_3900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17094__B _21623_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19791_ VGND VPWR _19861_/B _19791_/B _19791_/A _19791_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_59_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_917 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28989_ _28989_/Q _32321_/CLK _28989_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22179__B1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14511__B _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15853__B1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23915__A1 _31126_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31744__D _31744_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4678 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_111_4288 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31665__CLK _31887_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18742_ _18741_/X _19367_/B1 _19380_/A2 _27954_/Q _18742_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_15954_ VGND VPWR _15954_/X _15951_/X _15953_/X wire951/X wire1048/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__20729__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput150 VGND VPWR _30742_/D la_input[7] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_166_3010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_133_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput161 VPWR VGND _30740_/D la_input[8] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_4_2966 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_267_3977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27711__A_N _27793_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23316__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput172 VGND VPWR _30738_/D la_input[9] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 X_14905_ _15597_/A2 _14905_/X _14904_/X _15233_/B1 _29527_/Q _15608_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_283_3245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_2910 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18673_ _18682_/A _30333_/Q _18673_/X _30022_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_30951_ _30951_/Q _32032_/CLK _30951_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_79_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_248_3376 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput183 mprj_dat_i[18] input183/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 X_15885_ wire1004/X wire1476/X _32415_/Q _15885_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA_fanout3951_A _29716_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput194 mprj_dat_i[28] input194/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_76_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4023 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23128__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_2331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_185_2954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_264_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17624_ VGND VPWR _17842_/S _17612_/Y _17623_/Y _17624_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_14836_ VGND VPWR _15623_/S _28948_/Q _29246_/Q _14836_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_224_527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_127_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_166_3087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4123_A _28560_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14959__A2 _16646_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23679__B1 _31048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30882_ _30882_/Q _31679_/CLK wire713/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_252_847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_3825 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_2648 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19347__A1 _28079_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_144_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23143__A2 _23141_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_1963 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_2375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_2269 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_3062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19690__D_N _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17555_ _17555_/X _31710_/Q _17783_/B2 _17586_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_70_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14767_ _14767_/X _14766_/X _14757_/X _14752_/X _15236_/A1 _14762_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_248_1985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32575__D hold171/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3527 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_200_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17358__B1 wire3191/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19898__A2 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17260__D _17260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22351__B1 wire3160/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_4272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_3494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23694__A3 wire1609/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24891__A2 _24841_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_970 _22806_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16506_ wire999/X _16091_/C _28792_/Q _16506_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_274_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_981 _32576_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_32552_ hold484/A _32552_/CLK input68/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_225_1237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1306_A _25738_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17486_ _17488_/B _26488_/B _17486_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and2_4 XANTENNA_992 wire1675/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_5339 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20901__A1 _20900_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14698_ VGND VPWR _14698_/X _14695_/X wire1202/X _14823_/A1 _14697_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_125_2050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26093__A1 _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27290__A0 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16030__B1 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18570__A2 _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17373__A3 wire3571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21360__A _21360_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31503_ _31503_/Q _31798_/CLK _31503_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19225_ _19224_/X wire1939/A _22086_/B1 _28332_/Q _19225_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_53_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31045__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16437_ _16387_/A _16387_/C _28421_/Q _16437_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_31_3555 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32483_ _32483_/Q _32531_/CLK _32483_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14673__S _14935_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16581__A1 _28794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15384__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_4_1_core_clk clkbuf_opt_4_1_core_clk/X clkbuf_opt_4_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_82_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18145__S _18145_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22103__B1 _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16581__B2 wire1470/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25840__A1 _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24643__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3071 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26870__B _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29092__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4048 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_4338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31434_ _31434_/Q _32394_/CLK _31434_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__14592__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19156_ VGND VPWR _19156_/S _19155_/X _19151_/X _19156_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_220_2561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21457__A2 _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27458__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16368_ VGND VPWR _16837_/S _30902_/Q _29180_/Q _16368_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_177_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_363_core_clk _30319_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_9_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18322__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18107_ VGND VPWR _18110_/S wire3846/X _28036_/Q _28036_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_4362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3066 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_3134 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_5058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31919__D hold218/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15319_ _15318_/Y _15319_/B _15319_/X _15319_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XFILLER_255_2613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15136__A2 _15610_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16333__A1 wire3243/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19087_ VGND VPWR _19087_/S _28326_/Q _28259_/Q _19087_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_31365_ _31365_/Q _32117_/CLK _31365_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1675_A wire1676/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16299_ _16298_/X _16297_/X wire1058/A _16299_/Y _16925_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_259_2793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26396__A2 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__29905__CLK _32435_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3320 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_86_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_252_4969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24390__B _25197_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput602 wire3512/X la_output[8] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_18038_ VGND VPWR _18049_/S _18644_/A1 _27970_/Q _27970_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30316_ _30316_/Q _32269_/CLK _30316_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20126__D _23879_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput613 _31100_/Q la_output[9] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31296_ _31296_/Q _31552_/CLK _31296_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_44_3927 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput624 _24593_/A mprj_adr_o[20] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__32440__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_2346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput635 _17879_/B mprj_adr_o[30] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_271_1213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput646 wire2364/X mprj_dat_o[10] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__22622__C _23395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18086__A1 _18532_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19283__A0 _19278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1842_A _17896_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput657 wire2698/X mprj_dat_o[20] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30247_ _30247_/Q _31933_/CLK _30247_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3348 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xoutput668 wire2739/X mprj_dat_o[30] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_151_2611 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19822__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput679 wire2300/X mprj_sel_o[2] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16097__B1 wire1032/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_2381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_250_3970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20000_ VGND VPWR wire2634/X _26866_/A1 _20028_/A _20000_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire926_A wire926/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16636__A2 _16817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30178_ _30178_/Q _30204_/CLK _30178_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19989_ VGND VPWR wire1319/A wire2308/X _24953_/B _19989_/X _26153_/A _19718_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_266_4133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14647__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14421__B _29726_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2092 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_3133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_5230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23906__A1 _28455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_1981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_2950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_112_2628 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15009__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_4609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_107 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19035__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_151_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27206__B _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_3151 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_5143 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3056_A _18085_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21917__B1 _22067_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_186_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19586__A1 _28468_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_1743 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25108__B1 _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23226__S _23226_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21951_ _21521_/A _21522_/B _21519_/Y _21951_/Y _21941_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_75_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_1765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_283_961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_93_3026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22590__A0 wire3701/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17597__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26856__B1 wire749/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2540 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20902_ VGND VPWR _20902_/S _30249_/Q hold495/X _20902_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_205_4426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22017__S0 wire3922/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_3296 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24670_ _24670_/B _24670_/X _31445_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_269_1186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21882_ _21881_/X _21880_/Y _21853_/B _21882_/Y _21879_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_4 XANTENNA__26320__A2 _31648_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15072__A1 _15560_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_2573 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19338__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23134__A2 _23185_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24331__A1 _24353_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2185 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23621_ _23621_/X wire1335/X _31076_/Q _31073_/Q wire1371/X VGND VPWR _23620_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_209_3894 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20833_ _20832_/C _20832_/A _20832_/B _20832_/D _20833_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_222_4751 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_123_3403 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21145__A1 _29588_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_1342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17349__B1 _17349_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_2158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_3053 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19889__A2 _19901_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22342__B1 _18231_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26608__B1 wire3452/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24882__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22488__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24565__B _24565_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18010__A1 wire3836/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_3649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26340_ VGND VPWR _24888_/B _24308_/C wire2239/X _26340_/X _27051_/A wire1351/X VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_221_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23552_ VGND VPWR _23560_/S _30473_/Q _30043_/Q _30473_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_20764_ VGND VPWR _20772_/S _27686_/A1 _29278_/Q _29278_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_71_1900 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29435__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_2762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24619__C1 _14263_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27281__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16021__B1 _15975_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18563__B hold360/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_2787 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_140_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22503_ _22513_/C1 _22502_/X _22511_/A2 _17198_/X _30012_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__24284__C _24284_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26271_ VGND VPWR wire2630/X _14398_/B _26301_/B _26271_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_23483_ VGND VPWR _23523_/S _28380_/Q _30428_/Q _23483_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_221_2347 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3592_A _30856_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15375__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24095__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4115 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20695_ VGND VPWR _20695_/S _29211_/Q wire1833/X _29211_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_257_4858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18055__S _18086_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3501 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire707 VPWR VGND wire707/X wire708/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24634__A2 _24389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_3054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28010_ _28010_/Q _30027_/CLK _28010_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_123_2779 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout1448_A _17484_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire718 VPWR VGND wire718/X wire718/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25222_ _26238_/A _25221_/X _25254_/A2 hold101/A _31235_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_66_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_118_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22434_ _22434_/B _22434_/Y _29985_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__27368__S _27375_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14583__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22645__A1 _29875_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_5234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18849__B1 wire1916/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20105__C1 _27003_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31538__CLK _31547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_195_3250 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15780__C1 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23842__B1 _24467_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_4279 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_hold117_A la_input[3] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24581__A _25750_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_101_3778 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_5546 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_5595 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_65_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_2208 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_216_4522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21999__A3 hold267/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25153_ _31210_/D _25151_/X _25181_/B _25152_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_121_2492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29585__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16324__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22365_ _29932_/D _22385_/B1 _30471_/Q _29932_/Q _22356_/B VGND VPWR _22364_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_255_4593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_4883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26387__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_1709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25044__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3857_A wire3857/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1615_A _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_117_3218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24104_ _31176_/Q _24957_/B _24103_/X _31144_/Q _24104_/X _25022_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 XANTENNA__24398__A1 _31002_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3431 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21316_ _21316_/B _22010_/C _21316_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__16875__A2 wire995/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25084_ _25703_/A _25083_/X _25086_/A2 _31185_/Q _31185_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_29961_ _29961_/Q _32357_/CLK _29961_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xfanout3207 VPWR VGND _22065_/B1 _14408_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_22296_ VGND VPWR _23366_/S _29882_/Q _29141_/Q _29882_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26792__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4014 VPWR VGND wire4014/X _28717_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__17907__B _17911_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22305__S _23372_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3218 _21465_/B _21462_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__14886__A1 _15577_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4025 VPWR VGND wire4025/X wire4026/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_219_2287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire4036 wire4037/X wire4036/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__18077__A1 wire3838/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30562__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3543 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28912_ _28912_/Q _32112_/CLK _28912_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_24035_ _24035_/X _20673_/D _30661_/Q _30725_/Q _19926_/B VGND VPWR wire1260/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_1_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3302 VPWR VGND wire3302/X wire3303/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21247_ VGND VPWR _23228_/S _23061_/C _20914_/C _29709_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31688__CLK _31762_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4047 wire4048/X wire4047/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xhold360 hold360/A hold360/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 Xfanout2506 VPWR VGND _20739_/S wire2513/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__19274__B1 _19265_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27336__A1 _32193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_2189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21429__B _21551_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4058 VPWR VGND wire4058/X _28664_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_29892_ VGND VPWR _29892_/D _32435_/CLK _29892_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_8_2321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20959__A1 _30165_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold371 hold371/A hold371/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17419__A4 _30847_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2421 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19813__A2 wire1334/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold486_A hold486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2883 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4069 VPWR VGND wire4069/X _28660_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xhold382 hold382/A hold382/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_5_3921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23347__D hold420/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2432 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2774 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_134_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_81 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xhold393 hold393/A hold393/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__17285__C1 _17284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25347__B1 _25346_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2601 VPWR VGND _24612_/A wire2601/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16627__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28843_ _28843_/Q _32394_/CLK _28843_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26544__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17824__B2 _17490_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2612 VPWR VGND _24610_/B _14255_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_21178_ VGND VPWR _21202_/S _29620_/Q wire1833/X _29620_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_8_2365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2465 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3368 VPWR VGND wire3368/X _13857_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_41_3150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14638__A1 _29520_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2623 _19522_/B _14216_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_77_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1827 VPWR VGND _21153_/A0 _18242_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_264_4807 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25898__A1 _19660_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26301__A _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_5388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3379 wire3380/X wire3379/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_265_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2634 VPWR VGND wire2634/X _14209_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout840 _20128_/X _20168_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_134_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1838 VGND VPWR wire1840/A _18166_/Y VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_73_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2645 _14200_/Y wire2645/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 Xwire1900 VPWR VGND wire1900/X wire1900/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_8_1653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20129_ VGND VPWR _19521_/B _19617_/A _20162_/A2 _20129_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19026__B1 _19176_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1911 VPWR VGND _18797_/S wire1912/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_186_3920 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2656 VPWR VGND wire2656/X hold157/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_input141_A la_input[71] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout862 _19856_/A2 _19789_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_28774_ _28774_/Q _32398_/CLK _28774_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_249_3641 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_2730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout873 _25000_/A _25041_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA_wire2156_A _19770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25986_ _26687_/B _25985_/Y _26014_/A2 _31508_/Q _31508_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27116__B _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_284_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1933 VPWR VGND wire1933/X wire1934/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2678 VPWR VGND wire2678/X wire2679/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_210_2752 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18738__B _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2689 VPWR VGND wire2689/X wire2689/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_59_2209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3292_A _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20987__C _20987_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27725_ VGND VPWR _27728_/S _19937_/B _32457_/Q _32457_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24459__C _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24937_ _24937_/Y _24937_/B _24955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_73_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21384__A1 _21679_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22581__A0 _22580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3246 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17588__B1 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19041__A3 _19036_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1977 _19271_/S _18790_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_76_3257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_4504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3198_A _16992_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26955__B _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_825 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17052__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_2602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_163_3227 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire2323_A wire2324/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15670_ _15665_/X _15661_/X _15745_/A1 _15669_/X _15670_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27656_ VGND VPWR _27657_/S _19732_/A _32395_/Q _32395_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_145_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_1241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_482 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2203 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_200 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24868_ wire863/X _31080_/Q _24868_/Y _24475_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_223_4537 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_211 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19329__A1 _28206_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_3571 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_141_4215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16260__B1 _16814_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_222 _17330_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_3530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_4226 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_4278 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14621_ _14620_/X _14823_/A1 _14882_/A2 _28405_/Q _14621_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_26607_ _26607_/B _26607_/X _26607_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_204_3202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24322__B2 _31976_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_233 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_5585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_4840 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23819_ _30834_/D _23861_/C _23819_/A _23822_/B _23849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__31068__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_244 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27587_ VGND VPWR _32339_/Q _27585_/X _27586_/Y _32339_/D _27597_/B2 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_148_2083 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21136__A1 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14059__A _31746_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22333__B1 _22385_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_255 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24799_ _26509_/D _24798_/Y _24795_/X _31050_/Q _31050_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_201_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_226_2269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_266 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32313__CLK _32425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24475__B _26498_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_3525 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18001__A1 wire3866/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29326_ _29326_/Q _32324_/CLK _29326_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_277 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17340_ VGND VPWR _26974_/B _17339_/X _29853_/D _17245_/X _32289_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 X_14552_ _14552_/Y wire1489/A wire1541/X wire3247/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_275_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_2111 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26538_ _17508_/X _32577_/D _26539_/C _26515_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA_288 wire1264/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22884__A1 _22935_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_2922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_240_4895 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20495__S _20495_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_299 wire882/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_145_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26075__A1 _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_70_2133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16012__B1 _29590_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23810__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_5058 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__13898__A _28599_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17271_ VGND VPWR _17270_/X wire2296/A _29843_/D _17245_/X _32295_/Q VGND VPWR NF_sky130_fd_sc_hd__a211o_4 X_29257_ _29257_/Q _31937_/CLK _29257_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14483_ VGND VPWR _30219_/Q _27485_/B hold244/A _27678_/A VGND VPWR NF_sky130_fd_sc_hd__and3b_2 XANTENNA_wire2692_A wire2693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26469_ _26473_/C _31616_/Q _31702_/Q _26464_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_256_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24086__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16563__A1 _29228_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21611__C _21611_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28802__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_4958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16563__B2 _16722_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25822__A1 _31436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24625__A2 _24381_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29928__CLK _29928_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19010_ _19007_/X _19005_/X _19094_/S _19009_/X _19010_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_10_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_4182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30092__CLK _30382_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16222_ VGND VPWR _16222_/X _16221_/X _16220_/X _16720_/C1 wire1038/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28208_ _28208_/Q _30484_/CLK _28208_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_171_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3913 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_174_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29188_ _29188_/Q _32324_/CLK _29188_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_234_4600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24491__A _25578_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32463__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19501__A1 _31334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31739__D _31739_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16153_ wire898/X _29662_/D _16152_/Y _16125_/X _16134_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_6_5109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28139_ _28139_/Q _32071_/CLK _28139_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_174_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_3908 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16315__A1 _28955_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27575__A1 _27594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26378__A2 _26880_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20111__A2 _20122_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23819__B _23822_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17512__B1 _31747_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_1809 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_2332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_135_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15104_ _15103_/X _15740_/B1 _15752_/A2 _28955_/Q _15104_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31150_ _31150_/Q _32168_/CLK _31150_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16084_ VGND VPWR _16826_/S _29592_/Q _29624_/Q _16084_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_252_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28952__CLK _32423_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_2764 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_4358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25050__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30101_ _30101_/Q _30204_/CLK _30101_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14877__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18068__A1 wire3868/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19912_ VGND VPWR wire2154/X _20061_/C _25980_/A2 _19912_/X _26999_/A _20061_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_155_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15035_ VGND VPWR _15623_/S _28849_/Q _28881_/Q _15035_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_212_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31081_ _31081_/Q _31369_/CLK _31081_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19265__B1 _19264_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27327__A1 _27274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3741 VPWR VGND _18535_/B _30224_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__21339__B _21451_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4073_A _28658_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_1664 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19804__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3616 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3752 VPWR VGND _22649_/B _22733_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_61_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1089_A wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3763 _19218_/A1 wire3770/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_250_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17815__A1 _31732_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25338__B1 _25414_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16618__A2 _16878_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30032_ _30032_/Q _30395_/CLK _30032_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xfanout3774 VPWR VGND _22512_/A2 _30085_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_267_5165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_46_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19843_ _19849_/B wire1629/A _19849_/A _19843_/X _26823_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA_core.RAM256_Di0[18] _19594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17815__B2 _31731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3785 hold403/X _20980_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15789__C_N wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14629__A1 _14816_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_output625_A _24602_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21058__C _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_5187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3941 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29308__CLK _32306_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15826__B1 _29585_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3212 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_4029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19017__B1 _19047_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3340 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3880 VPWR VGND wire3880/X wire3882/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__24010__B1 wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19774_ _19774_/Y _19774_/B _19782_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_263_4317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3891 VPWR VGND wire3891/X wire3892/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_2730 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1256_A _24088_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16986_ _30319_/Q _16985_/X _29987_/Q _30370_/Q _16987_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__26550__A2 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3422 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_1252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_256_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_1995 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19568__A1 wire3616/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_769 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23046__S _23056_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2392_A _14159_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27741__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21355__A _21355_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18725_ wire1403/X _28372_/Q _18724_/X _28372_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_52_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15937_ VGND VPWR wire970/X _29459_/Q _32113_/Q _15937_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_0_2605 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31983_ _31983_/Q _32014_/CLK _31983_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22572__A0 _30347_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20178__A2 _20192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26838__B1 _26159_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_24_1990 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_237_685 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18240__A1 _29340_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18367__C _30484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30934_ _30934_/Q _32014_/CLK _30934_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18656_ VGND VPWR _18656_/S wire3818/X _28369_/Q _28369_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_79_2180 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18240__B2 _29853_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15868_ _16415_/A2 wire3272/X _28975_/Q _15868_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__28332__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29458__CLK _32113_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3731 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_2604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23116__A2 _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17607_ _17607_/X _17852_/A _31715_/Q _17586_/A _17606_/Y _17596_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_72_4378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17979__S _17983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24313__B2 _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14819_ VGND VPWR _14819_/X _14818_/X _14817_/X _14823_/A1 wire1202/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_209_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27042__A _31019_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21959__A1_N _22063_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_357 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25656__A4 _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_204_5182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21127__A1 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30865_ _30865_/Q _30865_/CLK _30865_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18587_ VGND VPWR _18587_/X _22553_/B _22553_/A _21101_/A VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__16883__S _16918_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30818__D _30818_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15799_ VGND VPWR _15799_/X _15798_/X _15797_/X _15957_/S wire1053/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22324__B1 _23532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14801__A1 _29011_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18664__A _18668_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2478 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_5035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_3783 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24385__B _26541_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32604_ VPWR VGND _32604_/X _32604_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_198_4547 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17538_ _17538_/X _17852_/A _17586_/A _31708_/Q _17596_/D _17537_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__30435__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2178 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24816__D _31701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30796_ _30796_/Q _32134_/CLK _30796_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27263__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22186__A _29827_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2462 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16003__B1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23720__D _23807_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_1668 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17346__A3 _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22617__C _22617_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32535_ _32535_/Q _32535_/CLK _32535_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_274_5158 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28482__CLK _32553_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_5109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_2326 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_2375 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17469_ _17486_/A _17863_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XANTENNA__24077__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15357__A2 _15759_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_5510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_5289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17751__B1 _24593_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25813__A1 _25812_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24616__A2 _19505_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1089 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_222_1933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_278_3870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_239_3821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_2522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19208_ _19207_/X _19318_/B1 _19358_/A2 _28168_/Q _19208_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_220_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20480_ VGND VPWR _20480_/S _28999_/Q _27705_/A1 _28999_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32466_ _32466_/Q _32513_/CLK _32466_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4588 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_192_4135 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_2088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_2329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_3521 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_157_4266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24092__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_2954 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3423 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31417_ _31417_/Q _32177_/CLK _31417_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19139_ _19179_/A2 _28005_/Q _19143_/B1 _19139_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30585__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_277_1433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length4038_A _28671_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15109__A2 _16910_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_5478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27566__A1 _31382_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26369__A2 wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32397_ _32397_/Q _32548_/CLK _32397_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25026__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_4121 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1908 VPWR VGND _19177_/B1 _18903_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__18603__S _18617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23729__B _23732_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14580__A3 wire1693/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_69 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_2083 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_6_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_66_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_3166 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19926__C _20669_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31830__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length1919 VPWR VGND _19143_/B1 _19159_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_200_2998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_3128 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22150_ _22150_/Y _22150_/B _29822_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__27757__A_N _31398_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_3139 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31348_ _31348_/Q _32358_/CLK _31348_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_118_3549 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21850__A2 _21817_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26774__C1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput410 _13792_/Y la_oenb[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_277_1499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14868__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput421 _13875_/Y la_oenb[41] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21101_ _22552_/B _23347_/B _21101_/A _23343_/C _22553_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_192_2766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18059__A1 wire3900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput432 _13865_/Y la_oenb[51] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_96_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_3453 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_5620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_3120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_173_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3743 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22081_ VGND VPWR hold461/A _21285_/Y _22079_/X _29809_/D _23533_/S VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA__19256__B1 _19346_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput443 _13855_/Y la_oenb[61] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_2_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31279_ _31279_/Q _31761_/CLK _31279_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__25944__B _31485_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput454 _13909_/Y la_oenb[71] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_154_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput465 _13899_/Y la_oenb[81] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_60_3036 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_5205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput476 _13889_/Y la_oenb[91] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__17806__A1 _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25329__B1 _31269_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21032_ _21032_/Y _21032_/B _30032_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_25_3167 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput487 _28649_/Q la_output[100] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_285_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17806__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_5626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_2550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_268_3516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_1065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput498 _28659_/Q la_output[110] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__31980__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26121__A _31550_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20810__A0 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_1962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19008__B1 _19218_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25840_ _31443_/D _31442_/Q _25839_/Y _31443_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_183_4805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_60_2357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16085__A3 _15770_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24001__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_1973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_73 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3438_A wire3439/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_4827 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_151_2496 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_263_909 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15293__B2 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_769 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_2515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27651__S _27654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_290_706 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_99_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_224_5536 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25771_ VGND VPWR _25771_/X _32100_/Q _32099_/Q _25772_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_164_4237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_129_3612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_961 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22983_ VGND VPWR _25733_/C _30147_/Q _22982_/X _30147_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xclkbuf_5_18_1_core_clk clkbuf_5_18_1_core_clk/X clkbuf_5_18_1_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_99_2589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22563__A0 wire3699/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_228_674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31210__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32336__CLK _32464_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27510_ VGND VPWR _27515_/S _27703_/A1 _32325_/Q _32325_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26775__B _26775_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_4370 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_77_3577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17034__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24722_ _24722_/B _24723_/B _31565_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_129_3656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21934_ wire3779/X _21933_/X _21934_/Y wire3802/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 X_28490_ _28490_/Q _31563_/CLK _28490_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_99_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_5025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_1561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_58_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23107__A2 _23157_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_63_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_2545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27441_ VGND VPWR _27475_/S _32277_/Q _32278_/Q _27441_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_19_2215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24653_ _24654_/B _24678_/B _24652_/Y _24678_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA_clkbuf_4_2_0_core_clk_A clkbuf_4_3_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_3522 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_75_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2898 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21118__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22315__A0 _29160_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21865_ _21402_/Y _21481_/X _21842_/B _21425_/B _21865_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__30728__D input78/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout823_A _22449_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16793__A1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15596__A2 _16791_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18574__A _20912_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_231_828 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_903 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_227_1844 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_71_3154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23604_ _23604_/X wire1877/X _24246_/B _32580_/Q _31026_/Q _24260_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XPHY_914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_1281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20816_ VGND VPWR _20819_/S _29329_/Q _27705_/A1 _29329_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_27372_ VGND VPWR _27375_/S _32225_/Q _27274_/X _32225_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21669__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21712__B _21713_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_925 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24584_ _24585_/A _24584_/Y _31539_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_205_3577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21796_ hold158/A wire1855/A _29782_/D _21795_/X _21794_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__31360__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27254__A0 _27254_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_285_core_clk _30246_/CLK clkbuf_5_23_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XPHY_936 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_197_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26791__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32486__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20877__A0 _29367_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26057__B2 _24459_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19731__A1 _13975_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29111_ _29111_/Q _32015_/CLK _29111_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XPHY_947 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21204__S _21204_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26323_ _26323_/Y _26327_/B _26323_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_140_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23535_ VGND VPWR _23560_/S hold411/A _30026_/Q _30456_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_3880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20747_ VGND VPWR _20747_/S _27509_/A1 _29262_/Q _29262_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_2133 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_4923 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3974_A _29502_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_5610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_214_core_clk _31760_/CLK clkbuf_5_30_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__30928__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_4314 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24607__A2 _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20328__B _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4617 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29042_ _29042_/Q _32352_/CLK _29042_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xmax_length3811 VPWR VGND _18625_/A1 wire3812/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22618__A1 _22618_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26254_ _26182_/A _26253_/X _26263_/A wire3464/X _31615_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_221_1432 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1219 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23466_ VGND VPWR _30419_/Q wire1405/A _23465_/X _30419_/D _23466_/B2 VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_7_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22618__B2 _22578_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28975__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20678_ _20680_/B _29203_/D _32338_/Q _20680_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_158_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2207 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_max_length3040_A _18144_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_1_0_5_core_clk clkbuf_1_0_6_core_clk/A clkbuf_1_0_5_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 X_25205_ _25205_/X _25261_/B1 _29844_/D _31359_/Q _25197_/D VGND VPWR _25261_/C1 VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_22417_ _22417_/Y _29973_/Q _22616_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_101_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_3072 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_12_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22094__A2 _29813_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23291__A1 _23291_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26185_ _31581_/Q _24820_/B _26186_/B _32271_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_270_4833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27557__A1 _32336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_3654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25017__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23397_ _32269_/Q _30371_/D _30371_/Q _13831_/Y _23348_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__18513__S _18523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2630 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_3375 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input189_A mprj_dat_i[23] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_3217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_117_3004 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26015__B _26015_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25136_ _24559_/Y _25136_/B _25149_/B _31202_/Q _25139_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XFILLER_216_4363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25568__B1 wire2814/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22348_ _22348_/Y _18246_/Y _18216_/X _22370_/A2 _22384_/B _18245_/Y VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a311oi_4 XFILLER_188_5406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3075 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4090 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25032__A2 _25082_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28205__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_65_2235 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_2806 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17129__S wire886/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24240__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19247__B1 _19380_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27309__A1 _27276_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25067_ _25081_/A _24937_/B _25067_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29944_ _29944_/Q _30204_/CLK _29944_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2273_A wire2273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1804 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_2095 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22279_ _22277_/X _21058_/X _22135_/A _22278_/Y _22279_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_2_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25854__B _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14342__A _30336_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2303 VPWR VGND wire2305/A wire2308/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_153_3974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3113_A _14284_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26780__A2 wire777/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21054__A0 hold187/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout2314 VPWR VGND _25881_/B wire2316/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_186_5130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3121 hold191/X wire3121/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__19798__A1 _28551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3996 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24018_ _24018_/X _24016_/X _13967_/A _24163_/B2 _19718_/B VGND VPWR _24017_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_264_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_43_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold190 hold190/A hold190/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26517__C1 _17504_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1105 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_1848 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_2_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29875_ VGND VPWR _29875_/D _31970_/CLK _29875_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 Xfanout1602 _24165_/A3 _24192_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_130_3226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2825 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1613 _19792_/X _23859_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__30308__CLK _30398_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20801__A0 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15808__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2420 VPWR VGND wire2420/X _23876_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_264_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1635 _19776_/B _26791_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__18470__A1 wire3905/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2440_A _27233_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16840_ _16840_/A2 wire3281/A _28833_/Q _16840_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28826_ _28826_/Q _32332_/CLK _28826_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17273__A2 input199/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1149 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3187 wire3188/X wire3187/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_284_4052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26532__A2 _31749_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28355__CLK _30378_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2538_A _20512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2453 VPWR VGND _24241_/S _24234_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_115_2082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout1657 VPWR VGND _24204_/A2 wire1660/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_21_3554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_4304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2464 VPWR VGND _23268_/S _23250_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__26966__A _27042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_2937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire1730 VPWR VGND _23393_/A _14539_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__16481__B1 wire1058/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29600__CLK _32125_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire1741 VPWR VGND wire1741/X wire1741/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_43_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2486 _21021_/S _21020_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_267_2336 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16771_ VGND VPWR _16929_/S _32068_/Q _29127_/Q _16771_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_284_3351 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28757_ _28757_/Q _32575_/CLK _28757_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_185_2003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2746 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13983_ _28514_/Q _13983_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_21_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2497 VPWR VGND _20796_/S _20809_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_25969_ VGND VPWR wire754/X _19660_/A _31501_/Q _31501_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_1_2925 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_186_3772 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_182_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18510_ VGND VPWR _18522_/S wire3881/X _28282_/Q _28282_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire1774 VPWR VGND wire1774/X _18803_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_199_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17025__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15722_ _15760_/A1 wire1741/X _15722_/X _15760_/B1 _32371_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_186_3794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27708_ VGND VPWR _27709_/S _27708_/A1 _32442_/Q _32442_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_163_3013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_4361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19490_ _31320_/Q _19488_/X _31321_/Q _25488_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_227_4481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2705_A wire2706/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1796 VPWR VGND _29869_/D _17434_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__30458__CLK _30470_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_core.RAM256_WE0[1] wire1440/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3308 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2612 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2969 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28688_ _28688_/Q _31806_/CLK _28688_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_249_2792 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26296__A1 _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_37_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18773__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31703__CLK _32579_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18441_ VGND VPWR _18460_/S wire3892/A _28215_/Q _28215_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_226_2022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15653_ _15653_/X _15738_/A2 _15737_/B1 _29581_/Q _15738_/A3 VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 X_27639_ _27647_/S _31398_/Q _27649_/C _27784_/C _31397_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XANTENNA__21109__A1 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15587__A2 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_3633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3747_A _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29750__CLK _31938_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14604_ VGND VPWR _14935_/S _29456_/Q _32110_/Q _14604_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_279_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30650_ hold408/A _32416_/CLK _30650_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18372_ VGND VPWR _18372_/S wire3899/X _28149_/Q _28149_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14795__B1 _14795_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_1381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22857__A1 _22871_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20098__C_N _20061_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_2318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15584_ _16791_/A2 _15584_/X _29000_/Q _15598_/C1 _15598_/A1 _15627_/S VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_54_3385 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_106_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_5270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_50_3227 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26048__A1 _31529_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_3677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27245__A0 _27245_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20519__A _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_1857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_106_2730 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_201_4654 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21114__S _21129_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17323_ hold51/X _17447_/B2 _17323_/X input175/X _17447_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 X_29309_ _29309_/Q _32398_/CLK _29309_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22437__C _22445_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14535_ _14532_/X _14534_/X _23348_/B _14535_/Y _22444_/B _22434_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 X_30581_ _30581_/Q _31877_/CLK hold297/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27796__A1 _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17733__B1 _17692_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25256__C1 _26238_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14517__A _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26601__B1_N wire3452/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_2537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31853__CLK _32282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24933__B _24933_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32320_ _32320_/Q _32320_/CLK _32320_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14547__B1 _23393_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16000__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22609__A1 _22594_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17254_ _30767_/Q _17254_/X _30766_/Q wire3187/X _17252_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4bb_1 XANTENNA_wire1004_A wire1005/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_3694 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14466_ VGND VPWR hold410/A _14466_/Y _30435_/Q VGND VPWR NF_sky130_fd_sc_hd__xnor2_1 XFILLER_275_4777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_4728 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_234_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23806__B1 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22609__B2 wire3702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20953__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3710 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_154_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output575_A _28678_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_32_2971 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_87_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2758 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_273_5191 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26206__A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16205_ _16815_/A2 _16205_/X _16204_/X _16720_/C1 _29016_/Q _16722_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 X_32251_ _32251_/Q _32467_/CLK _32251_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_32_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_83_3003 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23282__A1 wire3871/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22085__A2 wire3151/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4190_A wire4190/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17185_ VGND VPWR _17238_/S _17178_/X _17184_/X _30398_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18423__S _18423_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14397_ _14397_/D _14397_/C _14397_/Y _31763_/Q _31754_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__14562__A3 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_3475 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_234_4441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_28_3719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_158_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23821__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25559__A0 _31359_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31202_ _31202_/Q _32577_/CLK _31202_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_61_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21293__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1163 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16136_ _16136_/X _28814_/Q _16448_/A2 _16448_/A3 _15975_/S _16135_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_256_3497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27736__S _27737_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3787 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32209__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32182_ _32182_/Q _32532_/CLK _32182_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_272_2020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17547__B _17777_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_4155 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_2335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_4046 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29130__CLK _32064_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17039__S wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31133_ _31133_/Q _32160_/CLK _31133_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_135_2414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_4174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24231__A0 _27699_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19238__B1 wire1930/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16067_ VGND VPWR _16823_/S _28411_/Q _29076_/Q _16067_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_215_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_89_core_clk _32115_/CLK clkbuf_5_15_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_113_4136 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15511__A2 _15759_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2649 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_288_349 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16993__A_N _17027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15018_ _15017_/X _15638_/B1 _15605_/A2 _29530_/Q _15018_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_170_2338 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_5405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3560 VPWR VGND wire3562/A _30993_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_113_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31064_ _31064_/Q _31693_/CLK _31064_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_26_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_18_core_clk _32086_/CLK clkbuf_opt_2_7_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_233_1325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19762__B _19776_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_61_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_2761 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_3847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31233__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30015_ _30015_/Q _30398_/CLK _30015_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32359__CLK _32359_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23990__C1 _23982_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_2493 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19826_ _19825_/X _28565_/Q _28565_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__17264__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2870 _21066_/X _21095_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_256_213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_284_533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout2892 wire2901/X _20598_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_282_4737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29280__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26876__A _26900_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_61_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_228_4245 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold10_A hold10/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length2774_A _27700_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27471__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_108_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25780__A hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3853 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19757_ _26173_/B1 _19756_/X _19715_/X _28535_/Q _28535_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_17_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_5113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_3290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16969_ _16941_/X _29684_/D wire891/X _16950_/X _16968_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_2 XFILLER_284_577 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_2330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28848__CLK _32427_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23888__A3 _23887_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20420__C _20453_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26595__B _26595_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18213__A1 _18215_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_780 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18708_ _28113_/Q _18708_/X _19046_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_4_2593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_146_3222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1805_A _23563_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_3285 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_185_3282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_2374 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19688_ _27070_/C _19680_/A _20102_/B _19688_/X _26791_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 X_31966_ _31966_/Q _31966_/CLK _31966_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15027__A1 _15640_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5168 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24396__A _31002_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26287__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31383__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20020__A1 _19792_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_3018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_72_4153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19961__A1 _19718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18764__A2 wire1994/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_655 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23504__S _23522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18639_ VGND VPWR _18649_/S wire3870/X _28352_/Q _28352_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30917_ _30917_/Q _32435_/CLK _30917_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17972__A0 _27909_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15578__A2 wire1500/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30548__D input50/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24298__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16775__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31897_ _31897_/Q _32573_/CLK _31897_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_227_1129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_258_5621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22628__B _22649_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_3170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_4159 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_1590 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21650_ _21651_/A _21651_/C _21780_/S _21651_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__14786__B1 wire1066/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_1880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21532__B _21548_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_1481 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27872__CLK _30757_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30848_ _30848_/Q _32275_/CLK _30848_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25004__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28998__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27236__A0 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3019_A _18399_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_72_2751 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21821__A1_N _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14250__A2 _14168_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21024__S _21030_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20601_ VGND VPWR _20613_/S _27614_/A1 _29116_/Q _29116_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_max_length1073_A wire1074/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_31_1_core_clk clkbuf_opt_31_1_core_clk/X clkbuf_opt_31_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_18_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5638 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21581_ _21581_/Y _21309_/A _21580_/Y _21579_/A _21310_/B _21310_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311ai_4 XANTENNA__27787__A1 _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16118__S _16806_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30779_ _30779_/Q _32342_/CLK _30779_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17724__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25247__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25939__B _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_46_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_1506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_5097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23320_ VGND VPWR wire820/X _30298_/Q _17104_/X _30298_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_31_3160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_53_2194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20532_ VGND VPWR _20548_/S _29049_/Q _21153_/A0 _29049_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32518_ _32518_/Q _32531_/CLK _32518_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_4363 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_1741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_102_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20863__S _23519_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_5633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19937__B _19937_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_2505 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_4959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_154_5641 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14146__B _14146_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25262__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28228__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1240_A _24308_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3941 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31379__D _31379_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15957__S _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25020__A wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23251_ VGND VPWR _23251_/S wire3976/X _30234_/Q _30234_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_179_2363 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20463_ VGND VPWR _20481_/S _28982_/Q _27688_/A1 _28982_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23273__A1 wire3904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32449_ _32449_/Q _32547_/CLK _32449_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_270_4129 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_239_3673 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_5625 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18333__S _18333_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3234 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_175_2216 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2439 VPWR VGND _27264_/S _27260_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_150_5516 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3388_A wire3389/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19656__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1146_A wire1152/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_4541 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20087__A1 _28689_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22202_ VGND VPWR _22280_/S _30304_/Q _30394_/Q _22202_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_1252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_153_3204 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_217_4672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_5_20_0_core_clk clkbuf_5_20_1_core_clk/A clkbuf_5_21_0_core_clk/A VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_48_4391 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27646__S _27647_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22481__C1 wire3112/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_4282 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23182_ hold486/A _23192_/A2 _23182_/X _30114_/Q wire2840/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__21823__A2 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5316 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17457__B _17457_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20394_ VGND VPWR _20406_/S _27686_/A1 _28916_/Q _28916_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_98_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_3559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_3229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3969 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_5338 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26211__B2 _32284_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22082__C _23302_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22133_ _22133_/X _29818_/Q _29820_/Q _29819_/Q _22133_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_6_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24222__A0 _27690_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15502__A2 _15500_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27990_ _27990_/Q _30481_/CLK _27990_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xoutput240 _14031_/Y la_iena[109] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_135_3660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1313_A _19927_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28378__CLK _30030_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput251 _14021_/Y la_iena[119] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_1441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_3272 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_213_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput262 _13778_/Y la_iena[13] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_2197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14710__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26941_ _31965_/Q wire1570/X _31965_/D _26941_/B2 wire1230/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 XANTENNA__29623__CLK _32049_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput273 _13768_/Y la_iena[23] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_265_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22064_ VGND VPWR _22063_/Y _22060_/X _21960_/A _22064_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19672__B _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_5013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_1425 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput284 _13979_/Y la_iena[33] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__16788__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_837 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21587__A1 _30364_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout773_A _27053_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput295 _13969_/Y la_iena[43] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__18569__A _30433_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21587__B2 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15692__S _15692_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21015_ VGND VPWR _21017_/S _29480_/Q _27624_/A1 _29480_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_181_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16058__A3 _16832_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18452__A1 wire3855/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_736 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29660_ _29660_/Q _32420_/CLK _29660_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_233_2593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26872_ _26872_/Y _26872_/B _26900_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_251_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1004 VPWR VGND wire1004/X wire1005/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21707__B _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_393 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15266__A1 _15266_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_1870 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_5358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18288__B _18288_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30600__CLK _31874_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28611_ _28611_/Q _32553_/CLK _28611_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27381__S _27384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3600 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_4968 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25823_ VGND VPWR _25825_/S _25822_/X _31435_/Q _31435_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__31726__CLK _31726_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_2187 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_2938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29591_ _29591_/Q _32049_/CLK _29591_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1048 VPWR VGND wire1048/X wire1048/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_fanout940_A fanout941/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_load_slew2628_A _19531_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_77_3341 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21426__C _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16089__A _16091_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_3682 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31842__D _31842_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_739 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_2288 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29773__CLK _32269_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17007__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18204__A1 _18157_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28542_ _28542_/Q _31796_/CLK _28542_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_224_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25754_ _27178_/C hold242/A _32082_/Q _32081_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 X_22966_ VGND VPWR _22966_/S wire3649/X _30143_/Q _30143_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_229_1917 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold449_A hold449/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26278__A1 _26267_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_3681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20011__A1 _28652_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5388 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_55_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_clkbuf_leaf_85_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19952__A1 _28624_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18755__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3355 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29312__D _29312_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_4370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24705_ _24705_/Y _24706_/B _31457_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_58_2050 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_4335 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_129_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21917_ _21621_/B _21917_/X _22067_/B _21712_/X _21621_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_245_1207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28473_ VGND VPWR _28473_/D _31937_/CLK _28473_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_281_2845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25685_ _31391_/D _31391_/Q _25684_/Y _25683_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_202_5642 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24289__B1 _24284_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15569__A2 _15567_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5429 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_304_core_clk_A clkbuf_5_20_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22897_ _30111_/D _30111_/Q _22896_/Y wire1866/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XANTENNA__18508__S _18531_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_3953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_3503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31876__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_2206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2045 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_2094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27424_ VGND VPWR _27424_/S _32270_/Q _27423_/X _32270_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16230__A3 _16841_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14777__B1 _15233_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24636_ _24637_/D _24636_/C _24636_/A _24636_/B _24636_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA_wire2021_A _17431_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22839__A1 _22924_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input104_A la_input[38] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29003__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21848_ _21848_/X _21946_/A wire3779/X _21847_/X _22074_/A2 VGND VPWR _21846_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14495__A_N _22078_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_711 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_103_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2119_A wire2120/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3986 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_722 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_142_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_177_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_199_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_145_2086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_744 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_max_length3255_A _14545_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_5153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27355_ hold145/A hold144/X _27276_/X wire3402/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_123_3063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16518__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_755 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24567_ _24567_/C _31214_/Q _24567_/D _25149_/B _31213_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XPHY_1310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27778__A1 _25027_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21779_ wire830/A _21778_/X _21776_/Y _21775_/X _21853_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_4 XANTENNA__25238__C1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_766 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14792__A3 _16814_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1321 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20058__B _24955_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18912__C1 wire1673/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_777 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14320_ _21548_/B _14320_/X _21548_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or2_2 XFILLER_275_3317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16153__A1_N wire898/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26306_ _26305_/Y _27117_/C1 _31641_/Q _26331_/B _31641_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_788 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_2526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_5318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23518_ VGND VPWR _23518_/S _23517_/X wire3442/X _30445_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31106__CLK _32541_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2936 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_23_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27286_ VGND VPWR _27292_/S _32150_/Q _27268_/X _32150_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_240_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20773__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24498_ _25578_/C _25416_/C _31042_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA__17191__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_1016 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17191__B2 _17220_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26450__A1 _31619_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25253__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29025_ _29025_/Q _32064_/CLK _29025_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_88_3470 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_139_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15867__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29153__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14251_ VGND VPWR _14251_/X _14268_/B _14303_/A _29959_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 X_26237_ _31607_/Q _24820_/B _26238_/B _32297_/Q _26243_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_270_5353 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_4458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4008 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3652 VPWR VGND _22951_/A1 _21413_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2390_A wire2391/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23264__A1 hold187/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23449_ _23449_/X _14097_/Y _22141_/A _29822_/Q _29363_/Q VGND VPWR _23433_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18243__S _18317_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3492 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length3663 VPWR VGND _23395_/A _30450_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15741__A2 _15756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2488_A _20989_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_235_4750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_1284 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24419__B1_N _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_2543 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20078__A1 _19551_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23803__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout3328_A wire3331/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2720 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2940 VPWR VGND _20311_/S _20315_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21275__B1 _22552_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14182_ _14182_/Y _14181_/X _14168_/S hold186/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_101_2682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26168_ _31572_/D _31572_/Q _26167_/X _26163_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__18140__A0 _28068_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17367__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25005__A2 _25021_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30130__CLK _30477_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31256__CLK _31536_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25119_ _31198_/Q _25114_/B _31199_/Q _25119_/X _31197_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_62_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24213__A0 wire2012/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2995 VPWR VGND _18498_/S _18499_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_10_1864 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_3813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_2493 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18691__A1 _29343_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_2666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16297__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17494__A2 _31615_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4084 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18990_ _19185_/S _27902_/Q _18989_/X _18990_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14072__A _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2655_A wire2656/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26099_ wire2597/X _26098_/X _31545_/Q _17877_/X _31545_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_152_2002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_3973 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32501__CLK _32527_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21027__A0 _29492_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14701__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17941_ VGND VPWR _17941_/S wire3839/X _19178_/A _27879_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_26_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29927_ hold432/A _32365_/CLK _29927_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_114_3744 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25961__B1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_308 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19606__C_N _26949_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_2660 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23816__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22775__B1 _30099_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_278_360 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18979__C1 _19085_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_2964 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3367 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_216_2791 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_3086 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1410 VPWR VGND _23485_/S _18661_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_286_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5255 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17383__A hold10/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout1421 _23056_/S _18587_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17246__A2 _17302_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18443__A1 _29849_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2822_A _23669_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17872_ _17539_/C _17871_/X _31738_/D _17524_/B _17869_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xfanout1432 VPWR VGND _27699_/A1 _18283_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29858_ _29858_/Q _31933_/CLK _29858_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27702__A1 _27702_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25308__A3 _31262_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_21_3340 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15257__A1 wire3305/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30280__CLK _30457_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_343_core_clk_A clkbuf_5_22_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26696__A _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2250 VPWR VGND _26775_/B wire2251/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_130_3078 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1454 wire1459/A _16832_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_40_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_2723 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19611_ _19611_/B _19551_/A _20042_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_4 XANTENNA__27291__S _27292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18994__A2 _19185_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21109__S _21116_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16823_ VGND VPWR _16823_/S _29235_/Q _29299_/Q _16823_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1465 _16928_/A3 _16944_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_28809_ _28809_/Q _32421_/CLK _28809_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_229_4565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4281 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_147_4232 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_3889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22527__A0 _30027_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29789_ hold223/A _29803_/CLK _29789_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_253_205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14431__A2_N _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3395 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_2718 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_1976 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19542_ _19656_/A _19581_/A _19543_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_8 X_31820_ _31820_/Q _32039_/CLK _31820_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_4830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1571 VPWR VGND wire1571/X wire1571/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_16754_ _16754_/X _29642_/Q _16947_/A2 _16928_/A3 _16930_/A1 _16753_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_95_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13966_ _28531_/Q _13966_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 Xwire1582 _20658_/B _20669_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_147_4287 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4036_A wire4037/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20948__S _20948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26269__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1593 _20364_/C _25881_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_235_953 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20002__A1 _19522_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_3728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23324__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4874 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15705_ VGND VPWR _15705_/X _15702_/X _15744_/B1 _15705_/A1 _15704_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__21633__A _21633_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3007 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19473_ hold305/A _19474_/B _31305_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31751_ _31751_/Q _32579_/CLK _31751_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_16685_ _16878_/A2 _16878_/A1 _30509_/Q _16685_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17954__A0 _27891_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_56_2735 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18418__S _18418_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_136_core_clk _32444_/CLK clkbuf_5_24_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_277_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13897_ _28600_/Q _13897_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__27561__S0 _25643_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21750__A1 _23145_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24819__A2 _27116_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21750__B2 _17010_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2708 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22448__B _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_5190 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30702_ hold361/A _32160_/CLK input92/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18424_ VGND VPWR _18425_/S _28199_/Q wire3839/X _28199_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_277_4806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_103_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_2194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_34_3734 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15636_ VGND VPWR _15641_/A wire1118/X wire1209/X _15633_/X _15635_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_221_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21352__B _21661_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4817 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4203_A hold68/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31682_ _31682_/Q _31762_/CLK _31682_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_223_4197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output692_A wire3379/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14232__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1020 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_199_3930 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_72_2058 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_1763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2126 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24295__A3 _24273_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18355_ VGND VPWR _18355_/S wire3844/X _28133_/Q _28133_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30633_ _30633_/Q _31837_/CLK hold391/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_91_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15567_ VGND VPWR _15567_/X _32367_/Q _15707_/A _15567_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__27769__A1 wire2242/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_1173 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25229__C1 _25263_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15980__A2 _16722_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3748 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_15_3188 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19171__A2 _19201_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_5237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_50_2334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17306_ _30828_/Q _17305_/Y _30811_/Q _17306_/X _17306_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_173_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_231_core_clk_A clkbuf_5_29_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14518_ _14518_/Y _29450_/Q _14518_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_222_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30564_ hold204/A _30580_/CLK _30564_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18286_ _18285_/Y _18269_/X wire3174/X _18286_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__25018__C_N _24953_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32031__CLK _32293_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15498_ _15493_/X wire1068/X _15745_/A1 _15497_/X _15498_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_158_4361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24047__A3 _24192_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25244__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18661__B _18661_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2522_A _20717_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_4203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31199__D _31199_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32303_ _32303_/Q _32547_/CLK _32303_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_102_2446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17237_ _21609_/A _17236_/Y _17220_/C _17235_/X _17237_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__15193__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_2273 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23255__A1 _29503_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14449_ _29453_/Q _18553_/A _18553_/D _29452_/Q _14449_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XANTENNA__19459__B1 _26139_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30495_ _30495_/Q _32311_/CLK _30495_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15732__A2 _16874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_1501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_266_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire1588_A _24284_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26992__A2 _27000_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21266__A0 _30444_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20069__A1 _28680_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_154_3502 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25197__D _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32234_ _32234_/Q _32538_/CLK _32234_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28520__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2268 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27466__S _27476_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22463__C1 _30332_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25775__A _27276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14940__B1 _15517_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17168_ _21966_/B _17167_/Y _17220_/C _17166_/X _17168_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__18131__A0 _28059_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29646__CLK _32557_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_1534 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_63_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire890 VPWR VGND wire890/X wire890/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_hold58_A input9/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_382_core_clk_A clkbuf_5_5_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23135__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_2290 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17992__S _18018_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31927__D hold409/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16119_ VGND VPWR _16443_/S _29527_/Q _29561_/Q _16119_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2252 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_45_3841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32165_ _32165_/Q _32525_/CLK _32165_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16288__A3 _16920_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32181__CLK _32538_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16142__C1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24204__B1 _24317_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_176_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17099_ _22026_/A2 _29718_/Q _29888_/Q _21630_/B1 _21641_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22oi_4 XFILLER_274_1469 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_4146 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23053__A_N _23115_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21018__A0 wire1783/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3412 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_132_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_4957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15496__B2 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31116_ _31116_/Q _32160_/CLK _31116_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__30623__CLK _31563_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4168 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31749__CLK _32577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3896 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1160 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32096_ _32096_/Q _32540_/CLK _32096_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_1280 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22403__S _22405_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4580 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23726__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_5333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_26_2550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_110_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_1133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28670__CLK _32160_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_113_3254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17237__A2 _21609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_5306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26102__C _26102_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29796__CLK _30456_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_2733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31047_ _31047_/Q _31698_/CLK _31047_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_6_3389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25196__B1_N _24490_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_4018 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_2583 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_269_393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15248__A1 _28959_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_544 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16445__B1 _16448_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2508 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18985__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21019__S _21021_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19809_ VGND VPWR wire2212/X _19789_/C wire1334/A _19809_/X _26999_/A _19789_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__25704__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26901__C1 _23599_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_3811 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_257_577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_269_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16996__A1 _21778_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_152_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22518__B1 _22518_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_1229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30773__CLK _32110_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31899__CLK _32036_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_4365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22820_ VGND VPWR _22820_/X _22820_/B _29893_/Q _22820_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_269_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29026__CLK _32444_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire3136_A _23530_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3071 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_4941 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20858__S _20858_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18198__B1 _18197_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_2518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_3866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27457__A0 _32286_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23191__B1 _23191_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18737__A2 _19380_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_441 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_285_1554 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_228_3385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_3888 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23730__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3959 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_5096 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_226_975 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24557__C _31205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22751_ _22751_/B _22765_/C _22766_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XANTENNA_clkbuf_leaf_270_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_1926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_4865 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_3014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_4985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31949_ _31949_/Q _32134_/CLK _31949_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16748__A1 wire1482/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17945__A0 _27883_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14856__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_202_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_3659 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_0_1553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21702_ _21700_/Y _14082_/Y _21701_/X wire1866/A _29774_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_206_3650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3047 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_124_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30003__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2819 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_2_core_clk_A clkbuf_leaf_2_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_2695 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25470_ _25470_/Y _25470_/B _31315_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_241_3541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31129__CLK _32528_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_104_3902 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24276__D _24276_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22682_ _22681_/X _29730_/Q _22779_/A1 _29880_/Q _22687_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_198_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_37_3391 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_2999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14223__A2 _13829_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15420__A1 wire1085/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19147__C1 _19146_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24854__A _25447_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24286__A3 _26378_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26680__A1 _31867_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_169_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24421_ _24421_/X _31009_/Q _31011_/Q _31010_/Q _24420_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA__28050__CLK _30395_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29176__CLK _32322_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26772__C _26772_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21633_ _22058_/S _21633_/B _21633_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_124_3372 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_52_3878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_240_477 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_72_2570 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_33_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_3604 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_104_3957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1273 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14774__A3 _14930_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15971__A2 _16815_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_488 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_2873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27140_ VGND VPWR _27142_/S _27140_/A1 _32046_/Q _32046_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_194_4038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_2261 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24352_ _32023_/Q _26772_/A _24352_/X _31991_/Q wire1351/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_21564_ _21564_/A _21564_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__20593__S _20598_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_3025 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18370__A0 _28147_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17173__A1 _17234_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25388__C _31279_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17173__B2 _17234_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24038__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25235__A2 _25197_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30153__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23303_ VGND VPWR _16971_/A _21285_/Y _23302_/X _30284_/D _23533_/S VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_124_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13996__A _28501_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19159__S _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20515_ VGND VPWR _20515_/S wire1783/X _29033_/Q _29033_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_274_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31279__CLK _31761_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15184__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27071_ _27071_/C1 _27070_/X wire772/A _32013_/Q _32013_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_172_4314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_89_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23246__A1 _29494_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22049__A2 wire3145/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3672_A _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24283_ _30934_/D _24282_/X _24353_/A1 _20364_/C wire1672/X _23813_/D VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_252_5050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_102_3692 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_4328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18063__S _18083_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1430_A _18288_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24443__B1 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15723__A2 _15723_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21495_ _21624_/B _21549_/B _30357_/Q _30472_/Q _21514_/B VGND VPWR _21288_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_2 XFILLER_279_1369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32524__CLK _32531_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21257__A0 _30435_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3031 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_4901 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_85_3654 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_26022_ wire2597/X _26021_/X _31525_/Q _17877_/X _31525_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_270_3203 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2076 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_194_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length2247 VPWR VGND _25025_/B wire2248/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_23234_ _23231_/A _23233_/Y _18580_/A _23393_/A _23234_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__23797__A2 wire1807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_2874 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20446_ VGND VPWR _20446_/S _28966_/Q _27624_/A1 _28966_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_218_2319 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xmax_length2258 VPWR VGND _25023_/B _24958_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_85_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_2098 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1524 VPWR VGND _14648_/C _15577_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_44_4030 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26083__A2_N _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_85_3698 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_235_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_239_2791 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_172_3657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1093 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_4800 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17476__A2 _17875_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_279_113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23165_ _23170_/B wire3739/X _23180_/A _23165_/X _29730_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__16133__C1 wire1043/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20377_ VGND VPWR _20384_/S _25023_/B _28901_/Q _28901_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_213_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19870__B1 _26153_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25538__A3 _31346_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_4191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_192_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21009__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_4366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_5409 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14323__C _29711_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15487__B2 _15546_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24746__A1 _31469_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22116_ _22115_/X _22509_/C1 wire828/X _29817_/Q _29817_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_0_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_opt_28_0_core_clk_A clkbuf_5_25_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_4055 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27973_ _27973_/Q _30272_/CLK _27973_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23096_ _23191_/C1 _21211_/B _23190_/B _23096_/A1 _23096_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__17915__B _23402_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22313__S _23385_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_5433 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27108__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_2650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_283_4309 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_150_3966 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_270_1856 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29712_ VGND VPWR _29712_/D _30411_/CLK _29712_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_0_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_79_3414 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26924_ _31948_/Q wire1573/X _31948_/D wire2367/X wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22047_ _22047_/Y _22046_/Y _22046_/A _22045_/Y _22044_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_4 XFILLER_44_2672 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_213_3698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21437__B _29884_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3999 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire2069_A wire2069/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26499__A1 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23355__D _30334_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_197_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2429 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_4477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29643_ _29643_/Q _32136_/CLK _29643_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_26855_ _27071_/C1 _26854_/Y wire753/X _31877_/Q _31877_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_44_1982 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_3149 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20060__C _20654_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_385 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_1_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_2464 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13820_ _31126_/Q _13820_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA__25171__A1 _25172_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25806_ _25808_/C _32546_/Q _32544_/Q _32545_/Q _25806_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_92_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29574_ _29574_/Q _30057_/CLK _29574_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_131_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26786_ _27071_/C1 _26785_/X wire777/X _31843_/Q _31843_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_281_4077 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20768__S _20783_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4487 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_148_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_96_3794 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23998_ _23998_/X _24081_/A3 _19928_/B _28624_/Q _31102_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_40_1868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26021__A2_N wire2597/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_3463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23182__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_1996 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19925__A1 _28612_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18728__A2 _19346_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_2058 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28525_ _28525_/Q _31460_/CLK _28525_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23721__A2 _26017_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24467__C _24467_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25737_ _31406_/D _22975_/B _25703_/A _22971_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_13751_ _31266_/Q _25322_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_144_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_264_1616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_22949_ VGND VPWR _22954_/S _21439_/A _30126_/Q _30126_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_207_2702 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16739__A1 _16952_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_1053 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27543__S0 _25641_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21732__A1 _21645_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18238__S _18309_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29519__CLK _32347_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_1064 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_3068 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26120__B1 _26020_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_4094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16470_ _16469_/X _16458_/S _16911_/A2 _28855_/Q _16470_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_107_4282 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28456_ _28456_/Q _32073_/CLK _28456_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_207_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_4337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25668_ VGND VPWR _25668_/X _25668_/B _25668_/A _31387_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__22983__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32054__CLK _32353_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_444 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14214__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15411__A1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1952 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24131__C1 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_4146 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_196_4826 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15421_ _15420_/X _15421_/Y _15411_/X _15410_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21bai_2 X_27407_ VGND VPWR _27412_/S _32255_/Q wire2801/X _32255_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_160_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_530 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24619_ _24446_/B _24446_/A _24619_/X _31537_/Q _14263_/X _29962_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA__23485__A1 _28381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19858__A _20060_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3475 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28387_ _28387_/Q _30449_/CLK _28387_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_5573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_1313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14067__A _14067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25599_ _25601_/B _25597_/X _31373_/Q _25598_/X _25632_/B VGND VPWR _25579_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_70_3989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15962__A2 wire933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_262_1373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_223_2069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_220_3658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20299__A1 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_5426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_499 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_563 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19153__A2 wire1984/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3669 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18140_ VGND VPWR _18143_/S wire3846/X _28068_/Q _28068_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_276_4861 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_574 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21496__B1 _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_177_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27338_ VGND VPWR _27339_/S _32195_/Q _27278_/X _32195_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15352_ VGND VPWR _15352_/X _15349_/X _15351_/X wire1134/A _15757_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_16_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28543__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21900__B _21900_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_177_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29669__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17164__A1 _29896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19577__B _19577_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4714 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22284__A hold230/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1151 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25298__C _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17164__B2 wire3932/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24029__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25226__A2 _25264_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_4222 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_1162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_51_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18900__A2 wire1984/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14303_ _14303_/A _14303_/B _29971_/Q _14303_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_64_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18071_ VGND VPWR _18077_/S wire3857/X _28001_/Q _28001_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17378__A _32280_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15283_ _15283_/X _15628_/A2 _14675_/S _29056_/Q _15628_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27269_ VGND VPWR _27281_/S _32142_/Q _27268_/X _32142_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_1184 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16372__C1 _16843_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23237__B2 _14534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4709 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_2593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_197_2260 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15714__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3800 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout3612_A wire3616/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1195 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_32_2097 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25631__C1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17276__D_N _17275_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17022_ VGND VPWR _23348_/C _30190_/Q _30379_/Q _17022_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29008_ _29008_/Q _32307_/CLK _29008_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_46_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14234_ _14245_/B _24446_/A _14234_/X _29978_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__27286__S _27292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24985__A1 _31136_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23788__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30646__CLK _31351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14922__B1 _14933_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25595__A _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30280_ _30280_/Q _30457_/CLK _30280_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_231_5145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_218_2820 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19647__D_N _23598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_158_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_116_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_62_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_7_5067 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3126 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_84_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_155_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27597__A1_N _27595_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_2168 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17467__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26187__B1 _26243_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14165_ _14168_/S hold99/X VPWR VGND hold124/X _14165_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_8 XANTENNA__16124__C1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2792 VPWR VGND _27488_/S _27505_/S VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22460__A2 _22449_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_4174 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_4294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15478__A1 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_973 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_3781 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_5_0_1_core_clk clkbuf_5_0_1_core_clk/X clkbuf_5_0_1_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_218_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_461 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23319__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_171_2444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18973_ _18973_/X _18970_/X wire1905/X _18972_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_14096_ _14096_/Y _29359_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XANTENNA_output440_A wire3368/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_2739 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22223__S _22280_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3665 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_171_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output538_A _31122_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22748__B1 _21404_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_27_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_136_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30796__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_97_4248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_209_5615 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17219__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17924_ VGND VPWR _17946_/S wire3895/X _27862_/Q _27862_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_269_2206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22212__A2 wire828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire4153_A _28373_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16221__S _16566_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19797__D_N _24441_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14530__A hold467/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29049__CLK _32302_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_388_core_clk _30285_/CLK clkbuf_5_5_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_230_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16427__B1 wire1038/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24939__A _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_3205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_4925 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23960__A2 _24178_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17855_ _17833_/S _17854_/X _17831_/X _17832_/S _17855_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_18_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32578__D _32578_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25761__C _27194_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_897 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_317_core_clk _30402_/CLK clkbuf_5_17_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 Xwire2080 wire2081/X wire2080/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_254_525 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_834 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_149_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_4051 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21971__B2 _21967_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24658__B _31442_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2091 wire2092/X wire2091/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25162__A1 _24543_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16806_ VGND VPWR _16806_/S _28864_/Q _28896_/Q _16806_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_242_5241 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_2974 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30026__CLK _30294_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16442__A3 _16448_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_242_5252 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17786_ VGND VPWR _17832_/S _17785_/X _17763_/X _17787_/A VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_105_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14998_ _15761_/A2 _14998_/X _14997_/X _15521_/S _28848_/Q _15748_/B2 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__27439__A0 _32277_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__15650__A1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_2597 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2384 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18719__A2 _19379_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19916__A1 _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_140_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2472_A _21169_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23712__A2 _20671_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19525_ _19791_/A _26763_/B _23598_/C _23599_/C _25881_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_31803_ _31803_/Q _31803_/CLK _31803_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28073__CLK _30204_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_2237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29199__CLK _32440_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16737_ _16784_/A3 _16733_/X _16736_/X _16967_/A1 _16737_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_13949_ _28548_/Q _13949_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_147_3383 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18148__S _18150_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2280_A _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_3228 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3558 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21723__B2 _21708_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_30_0_core_clk_A clkbuf_5_26_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1115 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22920__B1 _30114_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_3449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_121_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26111__B1 _31549_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_2554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_3179 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31734_ _31734_/Q _31737_/CLK _31734_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19456_ VGND VPWR _19467_/C _31343_/Q _19456_/A _31344_/Q VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_125_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16668_ _16791_/A2 _14518_/A _28932_/Q _16668_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_222_433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_2857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14205__A2 _24446_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15402__A1 _15730_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26662__A1 _31862_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_5037 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_2868 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24122__C1 wire807/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_3834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_4298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18407_ VGND VPWR _18407_/S _28182_/Q wire3895/X _28182_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__30176__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17987__S _18017_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15619_ VGND VPWR _15623_/S _29483_/Q _32137_/Q _15619_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19768__A _19782_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23020__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_31665_ VGND VPWR _31665_/D _31887_/CLK _31665_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_222_477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_2677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19387_ VPWR VGND _24210_/A _19387_/X _27135_/C VGND VPWR NF_sky130_fd_sc_hd__and2_2 XFILLER_280_1462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16599_ VGND VPWR _16942_/S _29229_/Q _29293_/Q _16599_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15953__A2 wire1021/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31421__CLK _32532_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2545_A wire2548/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32547__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4270 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19144__A2 _19178_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_4057 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_5023 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30616_ hold345/A _31837_/CLK _30616_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18338_ VGND VPWR _18365_/S hold475/A _28116_/Q _28116_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17155__A1 _22838_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31596_ _31596_/Q _32568_/CLK _31596_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_3968 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17155__B2 wire3933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26414__A1 _31690_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25217__A2 _25263_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2904_A _20576_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_2622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_219_3318 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_89_3086 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_64_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23228__A1 _17036_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27910__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18269_ _18295_/B _18269_/B _18259_/X _18269_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XFILLER_275_4393 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30547_ _30547_/Q _32319_/CLK hold205/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__16363__C1 _15775_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24425__B1 _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1910 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16902__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_25_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4082 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_67_4085 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20300_ VGND VPWR _20302_/S wire1833/X _28841_/Q _28841_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_271_3512 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_271_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_5343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14913__B1 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21280_ _29738_/D _30483_/Q _21279_/X hold420/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_67_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18104__A0 _28033_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4388 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_33_core_clk _32525_/CLK clkbuf_5_8_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__31571__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30478_ _30478_/Q _31916_/CLK _30478_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__15181__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length887_A wire886/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_2087 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25803__C_N _27832_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_3969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20231_ VGND VPWR _20236_/S _28774_/Q wire1837/X _28774_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32217_ _32217_/Q _32536_/CLK _32217_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_max_length1036_A wire1035/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18655__A1 wire3820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17458__A2 _26245_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30561__D hold183/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18611__S _18622_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3086_A _17949_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_1829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_2514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_1949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3379 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_132_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_4394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_5428 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3709 VPWR VGND wire3709/X wire3710/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_45_3660 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_2717 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_115_3338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26113__B _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15469__B2 _15705_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_2866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20162_ _25703_/A _20161_/X _20162_/A2 _28725_/Q _28725_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32148_ _32148_/Q _32204_/CLK _32148_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25925__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2547 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_135_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_236_2997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16130__A2 _16447_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2265 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_26_3070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_319 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_4153 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_3985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_287_3029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_2287 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_3_4753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19065__D1 _19216_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23400__A1 _31954_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_149_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24970_ _24970_/X _31129_/Q _25776_/C _25017_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_6_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20093_ _26859_/C1 _20092_/Y _20122_/A _28692_/Q _28692_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_32079_ _32079_/Q _32079_/CLK _32079_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_22_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_3849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1011_A _16206_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20161__B _20175_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_3013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20214__A1 _28759_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_6_3197 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1109_A wire1113/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24849__A _26559_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14692__A2 _14882_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18958__A2 _19317_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_1597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23921_ _23921_/X _24892_/C wire1317/X _28617_/Q wire3514/X _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_3_4797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23951__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_262_4905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18812__D1 _19346_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_96_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28416__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_4012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21962__A1 hold235/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16969__B2 _16968_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31392__D _31392_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_694 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17091__B1 _21630_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_5330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_148_3136 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_62 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26640_ _26640_/X _23772_/X _23776_/A _31794_/Q _26639_/Y _26643_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XFILLER_2_2349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_182 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17630__A2 _17539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23852_ _30845_/D _24310_/B _23852_/A _23873_/B _23873_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_268_1037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_3934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__20588__S _20589_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3518_A _31088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_2063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_39_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32077__CLK _32078_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18566__B _22620_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22803_ _29891_/Q _22803_/X _22800_/X _22802_/X _22933_/S _22745_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__22506__A3 _22512_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24900__A1 _31094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_607 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17470__B _17470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26571_ _26571_/X hold222/A hold196/A _31766_/Q _31764_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XANTENNA_618 _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_96_2389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23783_ _30822_/D _23813_/C _23783_/A _23807_/B _23807_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_93_3978 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_91_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30519__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22062__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18058__S _18079_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21714__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20995_ VGND VPWR _20999_/S _29460_/Q _27684_/A1 _29460_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_629 wire2203/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22372__D1 wire3213/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1947 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_70_3208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_4673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28310_ _28310_/Q _30757_/CLK _28310_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_fanout1478_A wire1486/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_39_3497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_720 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26783__B _26783_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19383__A2 wire1405/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25522_ _31340_/D _31340_/Q _25521_/Y _28440_/Q _19432_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_52_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_1346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22734_ _29735_/Q _22627_/C _22734_/X _23135_/B _22733_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_29290_ _29290_/Q _32302_/CLK _29290_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_228_2481 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28566__CLK _32431_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2042 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16197__A2 _16966_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17394__A1 hold214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_2782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19922__A4 _20061_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_3478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24584__A _31539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_2957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27598__C _27598_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_2170 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26653__A1 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29811__CLK _30482_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_2061 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28241_ _28241_/Q _31904_/CLK _28241_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_4398 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_87_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25453_ _25507_/D _25448_/A _25452_/X _19474_/Y _31306_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_161_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23467__A1 _28372_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23011__S0 _25693_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_1671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22665_ VGND VPWR _22665_/X _22747_/B _29878_/Q _22747_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__30736__D input56/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_52_2930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24664__B1 _31463_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_4319 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_2209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_187_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1645_A _19700_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19135__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24404_ _31005_/Q _24399_/Y _24404_/X _31004_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_21616_ VPWR VGND _21698_/C _29718_/Q _21616_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_103_2018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_37 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28172_ _28172_/Q _28402_/CLK _28172_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30669__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18879__D1 _19069_/D1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25384_ VGND VPWR _25384_/X _31279_/Q _31280_/Q _25389_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__17146__A1 _30205_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_107_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22596_ _22594_/S _22614_/B _22596_/X _22596_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__22308__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25208__A2 _25254_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_4701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_195_4870 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_120_2321 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_120_3066 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31914__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3962 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_5287 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27123_ _26950_/C _27122_/X _26949_/X _32039_/Q _32039_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_219_4542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_5528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15157__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24335_ _24334_/X _24357_/B1 wire1672/X _24353_/A1 _30970_/D VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o211a_1 XFILLER_250_5009 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23219__A1 _30211_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21547_ VGND VPWR _21545_/X _21542_/X _21546_/Y _21902_/A VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__18894__A1 _19382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_139_3839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29961__CLK _32357_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_81 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24967__A1 _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_3402 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27054_ _27120_/B _27120_/A _27098_/A _27098_/C _26950_/C _27054_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o41a_1 XANTENNA__14904__B1 _29561_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_2154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24266_ _31683_/Q _26542_/A _24266_/X _31658_/Q _26335_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_232_5454 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_137_3530 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_133_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_112_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21478_ _21458_/Y _21819_/B _21459_/Y _21473_/A _21455_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o2bb2ai_2 XFILLER_194_2455 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_4169 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_4166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25846__C _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_5476 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31567__D _31567_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26005_ VGND VPWR _14183_/A _19558_/A _26014_/A2 _26005_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_270_3033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_3446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23217_ VGND VPWR _23223_/S _30209_/Q hold233/X _30209_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18646__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26169__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5229 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17449__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20429_ VGND VPWR _20429_/S _28949_/Q _27242_/A0 _28949_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_46_2712 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_3454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_input171_A la_input[99] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24197_ _24197_/X _24207_/B1 _28547_/Q wire4021/X _19715_/C VGND VPWR _24196_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18521__S _18523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19989__A4 wire2308/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2186_A _20165_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26023__B _31526_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2122 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_66_2171 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_3197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21650__B1 _21651_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_2343 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23148_ VGND VPWR _23148_/X _23146_/X _23147_/X _23145_/X _23064_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_153_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1006 _27058_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_105 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_3793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_1924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1017 wire3508/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17137__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26958__B _27006_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_2177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24195__A2 _19926_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1028 _24014_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27118__C1 _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15970_ _16415_/A2 _16415_/A1 _29557_/Q _15970_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__30049__CLK _30466_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23079_ _30163_/D _23057_/S _23078_/X _30163_/Q wire1678/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_27956_ _27956_/Q _31933_/CLK _27956_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA_1039 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22978__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_287_3552 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_270_1675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20205__A1 _28750_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_114_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15880__A1 _32044_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_231_1637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14921_ _14921_/X _28878_/Q _14933_/B1 wire1506/X _15233_/B1 _14920_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_111_3758 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26907_ _26764_/A _26763_/B _26763_/A _26763_/D _26763_/C _26907_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a41oi_4 XANTENNA__23942__A2 _19646_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19071__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28096__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_2907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27887_ _27887_/Q _30402_/CLK _27887_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_92_4112 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_166_3214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xhold50 hk_dat_i[10] input8/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21953__A1 _22838_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_4573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29341__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15880__S wire969/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold61 hk_dat_i[2] hold61/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_276_694 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17082__B1 _16993_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21953__B2 wire3933/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3236 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17640_ _17639_/X _17596_/C _17634_/X _17640_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xhold72 hk_dat_i[5] hold72/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_248_3569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29626_ _29626_/Q _32430_/CLK _29626_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire2520_A _20720_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14852_ _14544_/A wire1733/X _14852_/X _15628_/A2 _32348_/Q _14544_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 X_26838_ VGND VPWR _26838_/A3 _26838_/A4 _26687_/A _26838_/X _26159_/A _26838_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_79_3299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xhold83 hk_dat_i[13] hold83/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_3520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20498__S _20512_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2618_A _14238_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_4437 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_166_3258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold94 hold94/A hold94/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__15632__A1 _15632_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28909__CLK _30866_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26974__A _26988_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_109_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_92_4167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23813__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_3883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_53_4129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_13803_ _31143_/Q _13803_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_148_3670 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30199__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17571_ VGND VPWR _26470_/B _31628_/Q _17570_/X _17571_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_57_3564 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29557_ _29557_/Q _31479_/CLK _29557_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_263_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14783_ _16791_/A2 _15607_/A1 _28746_/Q _14783_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_242_3113 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26769_ _26687_/A wire3454/A _19715_/C _26687_/D _26771_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_207_3244 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31444__CLK _31462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14840__C1 _14550_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_3537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_268_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19310_ _19310_/X _19307_/X _19310_/B1 _19309_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_207_2510 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_244_580 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_144_3545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16522_ _16522_/X wire1032/A _16519_/X _16521_/X _16522_/B1 _16517_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_278_4901 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28508_ _28508_/Q _31871_/CLK _28508_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_1_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13734_ _26607_/A _31776_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_2 XFILLER_226_3889 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_224_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_3676 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_203_3108 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_29488_ _29488_/Q _30406_/CLK _29488_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_13_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_1457 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_229_1577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_38_2262 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_109_2953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_35_3851 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_109_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26644__A1 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_4719 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14509__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5280 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1700 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27841__B1 _27844_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14199__A1 _14300_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_51_3130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_2565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19241_ _19377_/B _28074_/Q _19240_/X _19241_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_259_4333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28439_ _28439_/Q _32579_/CLK _28439_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_16453_ _16453_/X _29289_/Q _16934_/A2 _16960_/B2 _16949_/A1 _16452_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19588__A _19609_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15396__B1 _15738_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2798 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23458__A1 _29368_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2295 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27933__CLK _30667_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24655__B1 _31467_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2987_A _18490_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_70_3775 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_34_2148 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_4189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19126__A2 _19275_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_100_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_207_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2489 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15404_ VGND VPWR _15702_/S _28891_/Q _15403_/X _15404_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_51_3174 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14228__C _29964_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31450_ _31450_/Q _32390_/CLK _31450_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_19172_ _19172_/X _19169_/X _22090_/B1 _19171_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_16384_ _16384_/X wire1055/A _16377_/X _16379_/X wire921/X _16383_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_262_1192 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_371 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_83_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_4678 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_194_5070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31594__CLK _32277_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22130__A1 _22181_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_1154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_1777 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22130__B2 wire2275/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27020__D _27020_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_393 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_output488_A _28650_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21122__S _21139_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18123_ VGND VPWR _18123_/S wire3910/X _28051_/Q _28051_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30401_ _30401_/Q _30404_/CLK _30401_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_103_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22445__C _22445_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15148__B1 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15335_ _15707_/C _15561_/C1 _29121_/Q _15500_/A _15335_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_201_2142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_218_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31381_ VGND VPWR _31381_/D _32464_/CLK _31381_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__20141__B1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_4_1_0_core_clk clkbuf_5_3_0_core_clk/A clkbuf_4_1_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__17688__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22681__A2 _22747_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_cap2766 VPWR VGND _14132_/A _19513_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26947__A2 wire1570/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17539__C _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_3259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15120__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24941__B _24941_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_201_2186 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_4356 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30332_ _30332_/Q _30386_/CLK _30332_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_255_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18054_ _18054_/X _30413_/Q _30484_/Q _30414_/Q _18087_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_2 XFILLER_259_2986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_3832 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_64_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15266_ _16956_/A2 _15266_/A1 _28927_/Q _15266_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__20961__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output655_A _14165_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2509 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_3 _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26214__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_2276 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17005_ VGND VPWR _17005_/X hold230/A _17003_/X _30285_/Q _17004_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_138_2637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_1542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14217_ _31743_/Q _31741_/Q _26502_/C _31740_/Q _31742_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 XFILLER_6_65 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23616__A2_N wire1353/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18637__A1 wire3878/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_136_3040 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_2697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_151_4239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30263_ _30263_/Q _30279_/CLK _30263_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23091__C1 _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_3887 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15197_ _15192_/X wire1065/X wire1085/X _15196_/X _15197_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_190_4299 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18431__S _18431_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1564 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 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VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_4_7_0_core_clk_A clkbuf_4_7_0_core_clk/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_5009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23449__A1 _22141_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_2507 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_162_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23449__B2 _29822_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_797 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18606__S _18616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_143_2354 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29984__CLK _30432_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19117__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22636__B _22733_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24110__A2 wire1600/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22450_ _17094_/A _14317_/Y _22450_/X _16975_/X _22513_/A2 _16974_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a311o_1 XANTENNA_wire3001_A _18443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21540__B _21548_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_1975 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25012__B _25018_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17128__A1 wire3216/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31648_ _31648_/Q _32566_/CLK _31648_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__18325__A0 _27708_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_1243 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_69_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22121__A1 _30029_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21401_ _21401_/A _21864_/B _21401_/B _21641_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XANTENNA__15139__B1 _15610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3607 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18552__D _30430_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26399__B1 _26386_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22381_ _29940_/D _22385_/B1 _30479_/Q hold284/A _22356_/B VGND VPWR _22380_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__16126__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31579_ _31579_/Q _31698_/CLK _31579_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26938__A2 wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_3749 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30961__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15030__S _15639_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27060__A1 _27070_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_1317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1059_A _15766_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24120_ _24120_/X _20673_/D _30645_/Q _30709_/Q wire1633/A VGND VPWR wire1253/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__24949__A1 _19628_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_2742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21332_ _21444_/A _21329_/Y _14429_/B _14117_/Y _21651_/B _21372_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__29214__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_3711 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20683__B2 _24826_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23748__A _31771_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_5140 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20871__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_5550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_4065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_3110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16351__A2 _16387_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_2316 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_4027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24413__A3 _24434_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25610__A2 _25580_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15965__S wire970/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_82_3635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24051_ _31171_/Q wire810/A _24892_/B _24892_/C _31107_/Q _24051_/B1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_2 XFILLER_30_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18628__A1 wire3913/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21263_ VGND VPWR _23228_/S _29725_/Q _18562_/A _29725_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xwire4207 VPWR VGND wire4207/X wire4207/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_258_1773 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19825__B1 _26544_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23621__A1 _31076_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22424__A2 _22047_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18341__S _18364_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_210_5026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3468_A _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19664__C _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23621__B2 _31073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_3495 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1226_A _14540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_3237 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23002_ VGND VPWR _31395_/Q _23001_/X _23000_/X _23002_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20435__A1 _28955_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_2158 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20214_ VGND VPWR _20218_/S _28759_/Q _27697_/A1 _28759_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_63_2322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xwire3506 VPWR VGND _13784_/A _31162_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27654__S _27654_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17465__B _31052_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3517 VPWR VGND wire3517/X _31089_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_154_2450 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21194_ VGND VPWR _21194_/S _29636_/Q _27254_/A0 _29636_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16103__A2 wire999/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17300__A1 _17447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_4859 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_2794 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_239_core_clk _32571_/CLK clkbuf_5_28_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_217_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29364__CLK _30445_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_5149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_249_5269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27810_ _25795_/X _32529_/Q _27809_/Y _32529_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24177__A2 wire1289/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20145_ VGND VPWR _19559_/B _19628_/A _20168_/A2 _20145_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_167_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2816 VPWR VGND _25524_/C _25511_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_154_2494 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26571__B1 hold196/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3635_A _30721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28790_ _28790_/Q _32440_/CLK _28790_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25682__B _25682_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21466__A2_N _21465_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2827 VPWR VGND _23661_/S wire2827/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__23385__A0 _29681_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_4561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2838 wire2838/X _23131_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__24579__A hold487/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19589__C1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_5250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_210_3657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20199__A0 _27237_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_4129 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23924__A2 wire1633/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27741_ VGND VPWR _27747_/S _32470_/Q wire2248/A _32470_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_5545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19053__A1 _27873_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24953_ _24953_/Y _24953_/B _24955_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_6_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_189_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20076_ VGND VPWR _19555_/B _19555_/A _20106_/A _20076_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19680__B _19680_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_286_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27115__A2 _27117_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16796__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_5567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21935__A1 wire3779/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30341__CLK _31945_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_3293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_262_4713 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_5578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1595_A _23849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_2124 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23904_ _23903_/X wire1621/X _24081_/A3 _31125_/Q _23904_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 XFILLER_80_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3802_A _14408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18800__A1 _27989_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_4402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27672_ VGND VPWR _27677_/S _32407_/Q wire2242/X _32407_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_167_3556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_265_3157 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24884_ VGND VPWR wire2630/X _19503_/A _24881_/X _24884_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_167_2822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_1670 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15075__C1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_2157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15614__A1 _15624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4757 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23137__B1 wire2840/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1974 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16811__B1 _16816_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29411_ hold495/A _31920_/CLK _29411_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_93_3742 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26623_ _26623_/X _31779_/Q _31780_/Q _26619_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_39_3250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_4276 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23835_ _23835_/X _24281_/C _26949_/A _31888_/Q _31856_/Q wire1605/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_184_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_404 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_2866 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27956__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_415 wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_4298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_93_3775 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_848 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_1733 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_426 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_3111 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15090__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19356__A2 _19375_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29342_ _29342_/Q _31904_/CLK hold349/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_208_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_437 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_221_4421 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26554_ _26182_/A _26553_/Y _26543_/B _31760_/Q _31760_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_hold431_A hold431/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_448 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23766_ _31786_/Q _26643_/B _31787_/Q _26656_/A _31785_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__30491__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20978_ VGND VPWR _20979_/S _30184_/Q _29443_/Q _29443_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_459 wire719/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_3838 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_35_3158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_122_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19761__C1 _25904_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2590 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25505_ _25504_/X _31332_/Q _31332_/D _19499_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_126_3286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22717_ _22704_/A _22726_/B _22717_/Y _22710_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_35_2435 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29273_ _29273_/Q _32350_/CLK _29273_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_52_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26485_ _31703_/D _26435_/B _26484_/X _26480_/X _31703_/Q _17490_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__16575__C1 _16964_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_4320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15917__A2 _16040_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23697_ VGND VPWR _23879_/C _24273_/C _24273_/A _23697_/X _23696_/X _31499_/Q VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XANTENNA__18516__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20910__A2 _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_178_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_3483 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28224_ _28224_/Q _30272_/CLK _28224_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26018__B _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24101__A2 _24184_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_256_4517 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_220_2017 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2101_A wire2101/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25436_ _25435_/X _25447_/A _31358_/Q _25430_/Y _31298_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__21450__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22648_ _22663_/B _22649_/B _14412_/A _22656_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17119__A1 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_4818 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16590__A2 wire992/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22112__B2 _21032_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_5073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26960__C _31982_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28155_ _28155_/Q _32074_/CLK _28155_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_202_2462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25367_ _25414_/B1 _31268_/Q _31276_/Q _25265_/X _25367_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22oi_1 XFILLER_30_3770 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_159_3051 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22579_ VGND VPWR _22613_/S hold166/A _22578_/X _30068_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26929__A2 wire1573/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_68_2200 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3143_A _21717_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_3568 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24761__B _31461_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15120_ VGND VPWR _15750_/S _32427_/Q _32355_/Q _15120_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27775__D _27784_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27106_ _27122_/C _27116_/A _27106_/X _27116_/B _26890_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 X_24318_ _24318_/X _26376_/A1 _32006_/Q _31974_/Q _26772_/A VGND VPWR _24317_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_215_4214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28086_ _28086_/Q _32423_/CLK _28086_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20781__S _20786_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25298_ VGND VPWR _25303_/D _31263_/Q _25298_/X _31262_/Q _25413_/A VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_272_2405 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16342__A2 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15145__A3 wire1698/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_4285 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_opt_7_0_core_clk clkbuf_opt_7_1_core_clk/A clkbuf_5_2_1_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_156_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_2585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_130_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_147_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24480__C _24480_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15051_ _15612_/B _29145_/D _15050_/X _15032_/X _15023_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_85_3281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27037_ _31998_/Q _27051_/A _27037_/Y _27036_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_215_4258 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_3803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_26_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_4094 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18619__A1 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24249_ _30925_/D _26542_/B _31761_/Q _26542_/A _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__23073__C1 _23064_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29707__CLK _30430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3310_A _25776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2569 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_272_2449 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23612__B2 _24246_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5037 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2400 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3408_A wire3412/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26969__A _32000_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3923 _21289_/C _22935_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_4_4303 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14002_ _28495_/Q _14002_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_155_2258 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_Di0[9] wire2360/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_4242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_915 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_3899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19292__A1 _19289_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32242__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_3978 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_172_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_3869 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4602 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_2444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_189_5183 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_81_3189 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26339__B1_N _26338_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1195 _15646_/B1 _15738_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_24_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19831__A3 _26876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18810_ _18810_/X _19346_/D1 _27862_/Q _19346_/B1 _19346_/A2 _19346_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_250_2747 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25365__A1 _31275_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24168__A2 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_46_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3793 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26562__B1 _27131_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19790_ VGND VPWR _24459_/B _19790_/D _19791_/C _23873_/D _23618_/B VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_46_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14080__A _18546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_28988_ _28988_/Q _32420_/CLK _28988_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_270_2195 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_3574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5623 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14656__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22179__B2 hold493/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_650 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1423 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28731__CLK _32549_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_1592 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23915__A2 wire1621/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23393__A _23393_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29857__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19044__A1 _14101_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18741_ _30253_/Q _18741_/X _19379_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_98_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27939_ _27939_/Q _28326_/CLK _27939_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_283_417 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15953_ _15953_/X _28873_/Q wire1021/X _16039_/B2 _16040_/A2 _15952_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__19590__B _19590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_3679 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_248_3333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput140 VGND VPWR _30616_/D la_input[70] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XANTENNA_output236_A _14035_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xinput151 VGND VPWR _30596_/D la_input[80] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_98_3686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32392__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_845 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14904_ _16415_/A2 _15607_/A1 _29561_/Q _14904_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_228_3929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput162 VPWR VGND _30576_/D la_input[90] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XANTENNA__18252__C1 _18316_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26314__B1 _26218_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23391__A3 _18666_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18672_ VGND VPWR _18672_/X _29774_/Q _18668_/C _23342_/C _23348_/C VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_133_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xinput173 _14397_/C mprj_ack_i VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 X_30950_ _30950_/Q _32568_/CLK hold339/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_59_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3989 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_206_4906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15884_ _15884_/X wire1052/X _15877_/X _15883_/X _15879_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_131_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xinput184 mprj_dat_i[19] input184/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_283_3257 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_185_2922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23128__B1 _23127_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput195 VPWR VGND input195/X mprj_dat_i[29] VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_98_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30834__CLK _32319_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_2887 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16802__B1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21117__S _21136_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_3620 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25812__S _27854_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17623_ VGND VPWR _26470_/B _31633_/Q _17622_/X _17623_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_226_4365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3962 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_4035 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29609_ _29609_/Q _32429_/CLK _29609_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_14835_ _14835_/X _29012_/Q _14834_/X _15621_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__21706__A_N _29351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_5515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_5342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_236_377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23679__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30881_ _30881_/Q _32293_/CLK wire715/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_264_697 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14959__A3 _16544_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14813__C1 _29075_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_4229 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28881__CLK _32320_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_50_5537 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_37_3946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19347__A2 _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_859 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_3334 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24340__A2 wire1374/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2327 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17554_ VGND VPWR _17685_/A _17576_/A _17554_/X _17833_/S _17553_/X VGND VPWR NF_sky130_fd_sc_hd__and4bb_1 XFILLER_243_4690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23840__B _23849_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14766_ VGND VPWR _14766_/X _14763_/X _14765_/X _15517_/A1 wire1228/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27312__B _31386_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire4116_A _28568_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17358__A1 wire3574/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20956__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_3074 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18555__B1 _30450_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22351__A1 _30464_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_3938 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_960 _17362_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19898__A3 wire2184/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_550 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_2750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23332__S wire820/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16505_ _16500_/X _16839_/B1 _16839_/A1 _16504_/X _16505_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA__21641__A _21641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_971 _23932_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_2070 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_2690 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32551_ _32551_/Q _32551_/CLK _32551_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_92_2584 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17485_ _17490_/A _17490_/B _17479_/X _17485_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_4 XANTENNA_982 _26333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_70_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_5329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14697_ _14697_/X _32045_/Q _14696_/X _14882_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__15908__A2 _16249_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18426__S _18426_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_583 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_53_2546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_993 _30484_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30984__CLK _32287_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_2215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16030__A1 _32048_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27290__A1 _32154_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26093__A2 _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19224_ _28265_/Q _19224_/X _19357_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_31502_ _31502_/Q _31563_/CLK _31502_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_192_5018 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28111__CLK _31966_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16436_ VGND VPWR _16436_/X _16435_/X _16434_/X _16720_/C1 wire1055/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__29237__CLK _32569_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32482_ _32482_/Q _32545_/CLK _32482_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_199_2130 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_278_4797 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23300__A0 _30282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22103__A1 _29815_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2658 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_196_3730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15384__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16581__A2 wire996/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_53_1856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_3567 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_255_4027 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25840__A2 _31443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3285 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2435_A _27262_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31433_ _31433_/Q _32473_/CLK _31433_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14592__A1 _32301_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19155_ _19152_/X _19153_/X _19155_/X _19176_/B1 _19154_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 X_16367_ _16367_/X _16814_/B1 _16366_/X _28756_/Q _16805_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_259_3473 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16318__C1 _16317_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_157_3714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21457__A3 _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_2349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25767__B _32093_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_3949 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_177_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18106_ VGND VPWR _18110_/S wire3849/X _28035_/Q _28035_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_255_3337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16869__B1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30214__CLK _30455_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15318_ _15561_/C1 _15762_/A1 _15316_/X _15318_/Y _15317_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a211oi_1 XFILLER_9_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19086_ _28389_/Q wire1403/A _28389_/D _19074_/X _19085_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 X_31364_ _31364_/Q _31966_/CLK wire756/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__20691__S _20708_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16298_ VGND VPWR _16929_/S _32314_/Q _28922_/Q _16298_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_4325 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16333__A2 wire1741/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27593__A2 _32156_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_3310 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_29_3430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__26250__C1 _26509_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2602_A hold194/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28261__CLK _31955_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15785__S _16823_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29387__CLK _30415_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18037_ VGND VPWR _18037_/S _23286_/A1 _27969_/Q _27969_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30315_ _30315_/Q _30455_/CLK _30315_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_9_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1570_A wire1571/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_116_4145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15249_ VGND VPWR _15249_/X _15246_/X _15744_/B1 _15543_/S _15248_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 Xoutput603 _28703_/Q la_output[90] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_82_2208 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_47_2328 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5335 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout2410_A _14138_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31295_ _31295_/Q _31369_/CLK _31295_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput614 _14244_/Y mprj_adr_o[10] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24800__B1 _31053_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1668_A wire1668/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_4099 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_29_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput625 _24602_/A mprj_adr_o[21] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_236_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20417__A1 _27709_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_19_2_core_clk clkbuf_opt_19_3_core_clk/A clkbuf_opt_19_2_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__14895__A2 _15628_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput636 _17879_/A mprj_adr_o[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__21614__B1 _22067_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold40_A hold40/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27474__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_9_2823 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput647 wire2368/X mprj_dat_o[11] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_289_5594 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30246_ _30246_/Q _30246_/CLK _30246_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_271_1225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput658 wire2702/X mprj_dat_o[21] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_275_1394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_1919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_3579 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_2934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_3900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26002__C1 _26173_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_332_core_clk _30445_/CLK _29752_/CLK VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 Xoutput669 wire2744/X mprj_dat_o[31] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1979 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_231_4082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30364__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_42_4375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_116_3477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21090__A1 _27509_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_151_2623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17294__B1 _14399_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3922 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24159__A2 _19641_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25356__A1 _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_151_2634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26553__B1 _26543_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30177_ hold173/A _30433_/CLK _30177_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_64_2697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19988_ _19987_/X _28642_/Q _28642_/D _19988_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XFILLER_3_3112 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23367__A0 _29663_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_4701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_231_3381 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_233_2989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24399__A _31003_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15844__A1 wire3276/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_1681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_4_4881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14421__C _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23507__S _23515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23906__A2 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_3190 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18939_ _18939_/X _19368_/D1 _27996_/Q _19218_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_209_5242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22411__S _22619_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_4745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27979__CLK _31933_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_1958 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21917__A1 _21712_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_4129 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25108__A1 _24543_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_20_3950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19586__A2 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_1121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21950_ _22061_/S hold281/A _21950_/X _21999_/S1 _21501_/A _17148_/X hold266/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_107_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3466 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_240_5008 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_164_3707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17597__A1 _31713_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_23_2394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_162_4110 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_4162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22590__A1 _21505_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18794__B1 _18983_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17597__B2 _31712_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26856__A1 _19563_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_36_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_228_889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21027__S _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20901_ VGND VPWR _20901_/S _20900_/X _29379_/Q _29379_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_227_366 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_2142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_3_1754 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_75_3450 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2552 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22017__S1 _22071_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3904 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21881_ _21403_/B _21403_/A _21864_/X _21399_/X _21881_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_282_2033 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_697 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_3862 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_4438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_3926 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15072__A2 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24846__B _31028_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23620_ _23620_/X wire1877/X _24246_/B _32559_/Q _31032_/Q _24260_/D VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__23134__A3 wire1679/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24331__A2 wire1672/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20832_ _20832_/B _20832_/A _20836_/B _20832_/D _20832_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand4_2 XFILLER_162_3442 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23750__B _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3775 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3216_A _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17349__A1 wire3562/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20866__S _20866_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22342__A1 _18216_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17349__B2 _17446_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26608__A1 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29140__D _29140_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19743__C1 _25718_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_162_2730 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21551__A _30351_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2850 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_1365 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25023__A _25065_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_2121 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_23551_ VGND VPWR _23560_/S _30472_/Q _30042_/Q _30472_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_4162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_1327 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20763_ VGND VPWR _20784_/S _23647_/A1 _29277_/Q _29277_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_56_2181 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24619__B1 _31537_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18336__S _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__32115__CLK _32115_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_127_2883 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17240__S _17243_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1176_A _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22502_ VGND VPWR _22512_/A3 _22512_/A4 _22510_/A2 _22502_/X _30012_/Q _22510_/A1 + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_108_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26270_ _26269_/Y _26509_/D _31623_/Q _26267_/B _31623_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_225_1761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24284__D _24284_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23482_ VGND VPWR _23496_/S _23481_/X hold225/X _30427_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27820__A3 _25799_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24095__A1 wire4115/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_4274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_290_5120 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_238_4225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20694_ VGND VPWR _20695_/S _29210_/Q _27489_/A1 _29210_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__20167__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25292__B1 _25595_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_10_3607 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24095__B2 _28729_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_13_2029 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_17_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_3618 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire708 VPWR VGND wire708/X wire708/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_273_4127 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25221_ _25221_/X _25263_/B1 _29851_/D hold104/A _25263_/A2 VGND VPWR _25263_/C1 + VGND VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__14583__A1 _29101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22433_ _22433_/B _29982_/D _22433_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 Xwire719 VPWR VGND wire719/X wire720/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_238_3513 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_49_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18849__A1 _18846_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28604__CLK _31877_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_34_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22645__A2 _23140_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23842__A1 _31858_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25677__B _27395_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_wire3585_A wire3586/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_3194 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_309 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23842__B2 _31823_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2801 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_25152_ _25152_/X _31209_/Q _31210_/Q _24561_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_22364_ _22364_/X wire3213/X _18286_/X wire3712/X _22370_/A2 _29760_/Q VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 XFILLER_65_3118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4534 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32265__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_153_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16324__A2 wire1010/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_4425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22382__A _22382_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_3530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_4106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24103_ wire1810/X _24102_/X _28666_/Q _24165_/A3 _24103_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_192_4895 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_30_2398 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_65_2406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21315_ VPWR VGND _21316_/B _21315_/B _21659_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__18244__C_N _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30707__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25083_ wire877/A _24953_/B _25083_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29960_ _29960_/Q _30903_/CLK _29960_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15532__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18071__S _18077_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22295_ VGND VPWR _22307_/S _29881_/Q _29140_/Q _29881_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_fanout1510_A wire1521/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_3101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_69_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4004 VPWR VGND _21548_/A wire4004/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xfanout3208 _14407_/X _22448_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_8_3012 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4015 VPWR VGND wire4015/X _28716_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout3219 VPWR VGND _21551_/B _21288_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__20408__A1 _27507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26789__A _26791_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_5357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14886__A2 _15614_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4026 VPWR VGND wire4026/X _28675_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_28911_ _28911_/Q _32550_/CLK _28911_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__28754__CLK _29565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24034_ 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wire3303/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire4048 VPWR VGND wire4048/X wire4049/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xhold361 hold361/A hold361/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_load_slew2658_A _19563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2250 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire4059 wire4060/X wire4059/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_47_2873 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold372 hold372/A hold372/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19813__A3 wire2208/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold383 hold383/A hold383/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__21081__A1 _27693_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_3850 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25347__A1 _31272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold394 hold394/A hold394/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 X_28842_ _28842_/Q _32421_/CLK _28842_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_189_3022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16627__A3 _16928_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_2854 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21177_ VGND VPWR _21184_/S _29619_/Q _27489_/A1 _29619_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout1806 VPWR VGND wire1808/A _19788_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_229_4906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_4622 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_254_1489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_28_2294 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_115_2242 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_1621 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_186_4633 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2624 _19522_/B wire2625/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xwire3369 VPWR VGND wire3369/X _13853_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__15835__A1 _16149_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14638__A2 _15597_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1828 _18237_/Y _27690_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_8_2377 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26301__B _26301_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25898__A2 _25903_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_232_2477 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30857__CLK _31846_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2635 VPWR VGND _19538_/B _19539_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_41_3162 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_130_2718 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19026__A1 _28323_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_4245 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_20128_ _20128_/B _20128_/X _20128_/A _26687_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XFILLER_164_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2646 VPWR VGND _19550_/B _19551_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_265_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_41_3173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28773_ _28773_/Q _32550_/CLK _28773_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_981 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22321__S _23342_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_73_5515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_99_3973 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1912 VPWR VGND _19283_/S wire1912/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_25985_ VGND VPWR _14213_/A _19566_/A _26014_/A2 _25985_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire2657 VPWR VGND _19562_/B _14189_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_98_2226 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21908__A1 _14407_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout874 VPWR VGND _25081_/A _25079_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire2668 VPWR VGND wire2668/X _14182_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27116__C _27122_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_112_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_189_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_3653 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1934 VPWR VGND wire1934/X _18688_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_125_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xwire2679 VPWR VGND wire2679/X hold141/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 Xfanout885 _16971_/Y wire886/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_76_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_98_2248 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_27724_ VGND VPWR _27728_/S _25029_/B _32456_/Q _32456_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 Xfanout896 VPWR VGND wire898/A wire904/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_20059_ _25718_/A _20058_/Y wire853/X _28676_/Q _28676_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_24936_ _25676_/B1 _24935_/Y _24947_/A _31112_/Q _31112_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA_wire2051_A wire2052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1956 VPWR VGND _19087_/S wire1956/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_210_2764 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_input134_A la_input[65] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17588__A1 hold261/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2149_A _19702_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_4663 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20041__C1 _25687_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_277_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1978 _18790_/S wire1978/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_245_141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_3998 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_4390 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27413__A _31384_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_3386 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20592__A0 _29107_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26955__C _31973_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_19_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27655_ VGND VPWR _27657_/S _27664_/B _32394_/Q _32394_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24867_ _24874_/C _31079_/D _26559_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_234_837 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_58_3670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_57 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_265_2253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_201 _29855_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3359 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_494 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15063__A2 _15515_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16260__A1 _16445_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_1253 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19329__A2 _22086_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_212 _31906_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_4336 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14620_ wire3249/X wire1727/X _14620_/X _14705_/B1 _29070_/Q wire1693/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 X_26606_ wire3452/X _31775_/D _26604_/X _26861_/C1 _31880_/Q _26605_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_280_2729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28134__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2849 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24322__A2 _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_223 _17330_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23818_ wire1808/A _23817_/X _31815_/Q _19858_/B _23819_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XANTENNA_234 _30961_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_128_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27586_ VGND VPWR _27580_/X _31382_/Q _25682_/B _27586_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__27132__B _32041_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2316_A _14274_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_93_3594 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20776__S _20780_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_245 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_2297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24798_ _24795_/X _26403_/B _24796_/X _17475_/C _24793_/X _24798_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__23530__A0 hold469/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22333__A1 _30455_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_3886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_201_4803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_256 _29201_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14810__A2 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22333__B2 hold404/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2095 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_3518 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_197_5452 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_2210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_93_2882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_180_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_267 _30539_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29325_ _29325_/Q _32064_/CLK _29325_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24475__C _24475_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14551_ wire3247/X wire1541/X wire1489/A _14551_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21a_4 XFILLER_19_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_4090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26537_ VGND VPWR _31752_/D _26537_/B _26537_/A _26537_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_204_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_76_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_278 _24841_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_881 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_2390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_128_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23749_ _31771_/Q _23749_/Y _31772_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_261_1427 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_289 wire1252/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21541__C1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16012__A1 _16447_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2123 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_243_2573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3358_A wire3362/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_13_3220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_15_2828 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30237__CLK _31916_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_2145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17270_ VGND VPWR _17270_/X input196/X _17266_/X _17447_/A1 _17269_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_29256_ _29256_/Q _32351_/CLK _29256_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_2956 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14482_ _30219_/Q _15620_/A1 _27678_/A hold244/A _14482_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_196_3015 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26468_ _26468_/Y _26464_/X _26463_/Y _26466_/X _17481_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o31ai_1 XANTENNA__22991__S _25733_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_3982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16563__A2 _16563_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17760__A1 _17521_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25283__B1 _25408_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_4006 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17760__B2 _17524_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2298 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_16221_ VGND VPWR _16566_/S _30898_/Q _29176_/Q _16221_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_259_2013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28207_ _28207_/Q _30279_/CLK _28207_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14574__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25419_ VGND VPWR _25424_/S _31358_/Q _31289_/Q _31289_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_273_5373 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_174_4025 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29187_ _29187_/Q _32581_/CLK _29187_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30924__D _30924_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14075__A _30436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26399_ VGND VPWR _26555_/A2 _19503_/A _26386_/X _26399_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA_wire2685_A _14168_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_1301 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3525_A _31047_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_2270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24491__B _31042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_1878 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21844__A0 _21812_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_4661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20647__A1 _27707_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16152_ _16142_/X _16151_/X _16152_/Y wire920/X _16138_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a31oi_2 X_28138_ _28138_/Q _30477_/CLK _28138_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25051__C_N wire1298/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17512__A1 _31758_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1345 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26378__A3 _26335_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23819__C _23861_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_1356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30387__CLK _30387_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15103_ _15751_/A1 _16910_/A2 _15103_/X _15727_/A2 _29253_/Q _16910_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_272_2213 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_100_2566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_104_1990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_256_2956 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_215_4044 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_3368 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25586__A1 _31371_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16083_ VGND VPWR _16088_/C _16080_/X _16082_/X _16068_/S wire1048/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__15523__B1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28069_ _28069_/Q _30424_/CLK _28069_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_217_2918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_87_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_139_3499 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16720__C1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31632__CLK _31894_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_273_3993 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length895 VPWR VGND wire894/A _15791_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_100_2599 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_30100_ _30100_/Q _31938_/CLK _30100_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_139_2776 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14877__A2 _15629_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_87_1974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15034_ _15034_/X _28817_/Q _15628_/A2 _15628_/A3 _15630_/A1 _15033_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 X_19911_ _19910_/X _28605_/Q _28605_/D _19925_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__27294__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_289_4145 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_152_4378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3720 _30328_/Q _18328_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_31080_ _31080_/Q _31363_/CLK _31080_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__19265__A1 wire1900/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_3354 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_174_2678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3819 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_2066 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_4954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout3742 VPWR VGND _14534_/B _30223_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__21339__C _21339_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_1545 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2511 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_1958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_211_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21072__A1 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25338__A1 wire3495/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_113_3628 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30031_ VGND VPWR _30031_/D _30225_/CLK _30031_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_282_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3764 wire3766/X _19346_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_289_3444 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_core.RAM256_Di0[17] _19590_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19842_ _19841_/X _28573_/Q _28573_/D _19856_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XANTENNA__25338__B2 _31270_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3775 VPWR VGND _18535_/C _23061_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__17815__A2 _17870_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_3289 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19670__D1 _25982_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3786 hold403/A _20958_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_46_2394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_130_3931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14629__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout3797 VPWR VGND _21389_/D _21506_/D VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15826__A1 _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_4454 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_5199 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_5420 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23327__S _23334_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3870 VPWR VGND wire3870/X wire3871/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31782__CLK _31884_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24010__A1 _28721_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19773_ _25904_/A _19772_/Y _19772_/A _28543_/Q _28543_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire3881 VPWR VGND wire3881/X wire3882/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_152_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16985_ _16985_/X wire3791/A _29987_/Q _29415_/Q _22449_/A VGND VPWR _16984_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_280_5322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_5491 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_4026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_59_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24010__B2 _31135_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3352 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire3892 VPWR VGND wire3892/X wire3892/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_output618_A _23618_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_3753 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19568__A2 wire2664/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18225__C1 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18724_ _22551_/S _18723_/X _18713_/X _19382_/A1 _18724_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_0_3329 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_241_5306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_20_2523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15936_ VGND VPWR _15936_/X wire933/X wire1052/X _15935_/X _15934_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA_wire1151_A wire1151/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31982_ _31982_/Q _32014_/CLK _31982_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_260_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_146_4149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22572__A1 wire3702/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_269 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24947__A _24947_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18776__B1 _19196_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26838__A1 _26838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4643 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_4140 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_236_141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_181_3306 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18655_ VGND VPWR _18655_/S wire3820/X _28368_/Q _28368_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_209_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30933_ _30933_/Q _32039_/CLK _30933_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_280_921 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18240__A2 _18295_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18367__D _30414_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_185_3486 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_15867_ VGND VPWR _16443_/S _28943_/Q _29241_/Q _15867_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_237_697 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_1905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31012__CLK _31746_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4173 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_146_2714 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16251__A1 _16387_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_4308 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24666__B _24666_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_4649 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_645 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17606_ _17605_/X _17606_/Y _17604_/Y _17662_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__24313__A2 _26772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14818_ VGND VPWR _14818_/S _30893_/Q _29171_/Q _14818_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_198_5238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_3461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_3131 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30864_ _30864_/Q _32416_/CLK _30864_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_18586_ _21103_/C _22554_/B _18540_/X _18586_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__27042__B _27042_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_94_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_4097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_200_5014 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15798_ VGND VPWR _16823_/S _30485_/Q _30771_/Q _15798_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_107_2709 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_204_5194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_109_3270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22324__B2 _29911_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19725__C1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18664__B _18664_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14801__A2 _15228_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_2078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2552_A _20247_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3997 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3161 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_32603_ VPWR VGND _32603_/X _32603_/A VGND VPWR NF_sky130_fd_sc_hd__buf_2 XFILLER_55_1918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2760 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_2430 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17537_ VGND VPWR _17537_/X _17537_/B _17596_/C _17720_/S VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_200_5047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_3795 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_1062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28627__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14749_ VGND VPWR _15275_/S _29212_/Q _29276_/Q _14749_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_57_2490 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_21_1_core_clk clkbuf_opt_21_2_core_clk/A clkbuf_opt_21_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_198_4559 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30795_ _30795_/Q _31912_/CLK _30795_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16003__A1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17200__A0 _30401_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_261_2673 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_790 _30551_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_36_core_clk_A clkbuf_5_10_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4561 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_14_2305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_2471 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_32534_ _32534_/Q _32535_/CLK hold451/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27469__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31162__CLK _31162_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17468_ _17863_/A _17563_/A _17552_/S _17605_/B _26441_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XANTENNA__24077__A1 _30589_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_1961 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32288__CLK _32568_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_553 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_31_3342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16554__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15357__A3 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17751__A1 _31643_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24077__B2 _30525_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_2455 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17751__B2 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19207_ _28136_/Q _19207_/X _19311_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_200_2900 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_2349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17995__S _18012_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22088__B1 _22088_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2406 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length2817_A _25511_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16419_ VGND VPWR _16566_/S _29601_/Q _29633_/Q _16419_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_2067 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_1945 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19776__A _19776_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32465_ _32465_/Q _32498_/CLK _32465_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15762__B1 wire1083/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_179_3279 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3093 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_17399_ VGND VPWR _17398_/X wire2024/X hold26/A hold25/X _17447_/B2 VGND VPWR NF_sky130_fd_sc_hd__a211o_4 XFILLER_239_3844 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_1401 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4701 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20099__C1 _26694_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_4147 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20638__A1 _27698_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_5408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31416_ VGND VPWR _31416_/D _32225_/CLK hold487/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 X_19138_ _27909_/Q _19137_/X _19138_/Y _19185_/S VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__28777__CLK _32419_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_1989 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_31_2674 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_2119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_179_2578 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_5_10_0_core_clk clkbuf_5_10_1_core_clk/A clkbuf_4_5_0_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_200_2966 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_4011 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32396_ _32396_/Q _32548_/CLK _32396_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__16306__A2 _16458_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15109__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_179_2589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22406__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3506 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_1445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18700__B1 _18824_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23729__C _23807_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3446 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_238_1407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14317__A1 _29874_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_192_3457 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_4756 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_5110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19069_ _19069_/X _19069_/D1 _27938_/Q _19069_/B1 _19218_/A2 _19218_/A1 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__o2111a_1 X_31347_ _31347_/Q _32421_/CLK _31347_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_238_1429 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_47_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_215_5290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_5170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput400 _13801_/Y la_oenb[22] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_252_4789 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput411 _13884_/Y la_oenb[32] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_255_1721 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21100_ _23342_/C _22338_/A wire3213/A _21101_/A _23343_/C _22553_/C VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o311a_4 XFILLER_259_1890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14868__A2 wire1733/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_4177 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_48_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput422 _13874_/Y la_oenb[42] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_211_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22080_ hold384/A _23226_/S _29808_/D _22078_/X _22076_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__19256__A1 _19346_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput433 _13864_/Y la_oenb[52] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_134_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31278_ _31278_/Q _31282_/CLK _31278_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_9_2620 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28007__CLK _30450_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4207 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xoutput444 _13854_/Y la_oenb[62] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_96_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_2720 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_5632 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_173_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_138_2286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_170_3755 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25944__C _31484_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput455 _13908_/Y la_oenb[72] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_116_3263 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_4229 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput466 _13898_/Y la_oenb[82] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25329__A1 _31268_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21031_ VGND VPWR _21034_/S _30031_/Q wire3978/A _29496_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_112_3105 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_211_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30229_ _30229_/Q _31970_/CLK _30229_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__22260__B1 _30113_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput477 _13888_/Y la_oenb[92] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_233_3498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23745__B _31768_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput488 _28650_/Q la_output[101] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_0_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_5217 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_3179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_42_4194 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_9_1930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2675 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_4532 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput499 _28660_/Q la_output[111] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_285_5277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_5518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15817__A1 wire1052/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout4006_A _29451_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_2502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_3528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26121__B _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_41 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29135__D _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19008__A1 _19218_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3482 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25018__A wire877/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24001__A1 wire4123/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_25_2478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_112_2426 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_5_1805 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24001__B2 _28720_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_2027 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_4986 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_1985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_168_4374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15293__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_183_4839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_164_4216 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_249_2226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24552__A2 _31043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28157__CLK _30451_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25770_ _25772_/D _32095_/Q _32096_/Q _25768_/C _32098_/Q _32097_/Q VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_170_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22982_ VGND VPWR _31396_/Q _22981_/X _22978_/X _22982_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_3_2241 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_186_2527 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_263_4841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_3624 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18767__B1 wire1675/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20023__C1 _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_290_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_209_4360 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_243_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_461 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_110_2150 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24721_ _31567_/Q _31568_/Q _24721_/Y _31570_/Q _31569_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA_clkbuf_leaf_75_core_clk_A clkbuf_5_13_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26775__C _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_686 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27233__A _27233_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21933_ _21929_/Y _21933_/X _21932_/X _21924_/X _22063_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 XFILLER_271_921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18231__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_3810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_5570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16778__C1 _16949_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_3990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15045__A2 _15609_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24576__B _24576_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_4071 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_1569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16242__B2 _16805_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_58_2254 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire3500_A _31193_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25501__A1 _31330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_3550 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27440_ VGND VPWR _27476_/S _32278_/Q _27439_/X _32278_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_24652_ _24652_/Y _31468_/Q _24684_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_271_965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_58_2265 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21864_ VGND VPWR _21864_/X _21864_/B _21864_/A _21864_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XFILLER_107_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20596__S _20617_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_2437 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22315__A1 _29901_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17990__A1 wire3904/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31505__CLK _31798_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23603_ _24458_/C _24881_/D _24459_/C _24467_/C _24459_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_4 XFILLER_164_2869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_16_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_14_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20815_ VGND VPWR _20821_/S _29328_/Q _27624_/A1 _29328_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XPHY_904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__13999__A _28498_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_2410 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_179_27 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27371_ VGND VPWR _27375_/S _32224_/Q _27417_/A0 _32224_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_32_3106 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_127_3392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_915 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24583_ VGND VPWR _31046_/D _24582_/Y _27854_/C _31429_/Q _22972_/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_240_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18066__S _18079_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_2991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21795_ _21099_/C _21795_/X wire3206/A _22954_/S _23145_/A _17043_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA_fanout1460_A _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_4369 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29552__CLK _32358_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19192__B1 _19196_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_3868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_937 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29110_ _29110_/Q _31577_/CLK _29110_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26791__B _26791_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20877__A1 _20876_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26322_ _26321_/Y _26188_/A _31649_/Q _26327_/B _31649_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XPHY_948 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19731__A2 _19772_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23534_ VGND VPWR _23536_/S _30455_/Q _30025_/Q _30455_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27379__S _27384_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_2574 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_123_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20746_ VGND VPWR _20755_/S _27701_/A1 _29261_/Q _29261_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_5592 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16545__A2 _16841_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_205_2877 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24592__A _31543_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15202__C1 wire1113/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_14_3562 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_194_4935 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_32_2438 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24607__A3 _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_105_3690 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_29041_ _29041_/Q _32421_/CLK _29041_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_235_5622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14556__A1 _14642_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26253_ _31615_/Q _26253_/X _26267_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XANTENNA__19686__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_4334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23465_ VGND VPWR _23450_/X _23465_/X _23464_/X _23444_/Y _23445_/X _23459_/X VGND + VPWR NF_sky130_fd_sc_hd__a2111o_1 XANTENNA__15753__B1 _15762_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30744__D _30744_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22618__A2 _30366_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20677_ _20680_/B wire834/A _32337_/Q _20680_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__and3_2 XANTENNA__31655__CLK _32107_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_4689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_101_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_3663 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_1444 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_10_2703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_2189 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20629__A1 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_279_2989 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25204_ _26498_/A _25203_/X _25254_/A2 hold104/A _31227_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_238_4077 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_5382 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21826__B1 _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22416_ VGND VPWR _22598_/S _29972_/Q _21990_/Y _29972_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_156_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_158_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_5508 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3856 VPWR VGND _23286_/A1 wire3857/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_123_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26184_ VPWR VGND _31580_/D _26184_/B _26184_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XFILLER_216_4320 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23396_ _30370_/Q _23532_/S _30370_/D hold360/A _23395_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 Xmax_length3867 VPWR VGND _18607_/A1 wire3869/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__22094__A3 _18683_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22316__S _23365_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17918__B _30413_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_254_core_clk _31933_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_235_4965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_175_3666 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3033_A _18366_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_2642 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25135_ _25135_/D _31202_/Q _25135_/Y _31204_/Q _31203_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XFILLER_219_2030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22347_ _29923_/D _22385_/B1 _30462_/Q hold274/A _22356_/B VGND VPWR _22346_/Y VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_290_4293 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26765__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_173_4080 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_128_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_7_4729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_5121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_4375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_5418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_156_3087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_3980 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14859__A2 _15277_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2517 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_301 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_2577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25066_ _25681_/B1 _25065_/X _25082_/A2 _31176_/Q _31176_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_82_3262 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_2818 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29943_ hold195/A _32569_/CLK _29943_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_5_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2539 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22278_ _29838_/Q _29839_/Q _22278_/Y _22278_/D _29840_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__nand4_1 XFILLER_82_3273 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_117_2326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_4299 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3038 VPWR VGND _18145_/S _18120_/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 Xwire3100 VPWR VGND wire3100/X _17276_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_5_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14342__B _21462_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_27_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21054__A1 hold492/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22251__A0 _30401_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_47_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_216_3696 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17258__B1 wire2129/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24017_ _28498_/Q _24069_/A2 _24017_/X _28690_/Q _24079_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_2 XANTENNA__19798__A2 _19852_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3122 VPWR VGND wire3122/X wire3124/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_21229_ _30332_/D _21228_/X _21223_/Y _17079_/X _29690_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xhold180 hold180/A hold180/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__26517__B1 _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3133 wire3133/A wire3133/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_251_2853 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29874_ _29874_/Q _30757_/CLK _29874_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_8_2141 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold191 hold191/A hold191/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_21_4234 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_5317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_254_1275 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_43_2534 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1603 _19993_/X _24192_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__15269__C1 _15521_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_1117 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout3106_A _14365_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_5497 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_144_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_130_3238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_leaf_333_core_clk_A _29752_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20801__A1 _29314_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_1297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2421 VPWR VGND _23876_/C _23879_/B VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_25_3691 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28825_ _28825_/Q _30583_/CLK _28825_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_229_4725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1636 VPWR VGND _26781_/A _26793_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__27190__B1 _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_2185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_4785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_82_1882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_43_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3188 wire3188/X _17253_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__31035__CLK _31363_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26532__A3 _26533_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xwire3199 VPWR VGND _18668_/C _23348_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__15284__A2 _15621_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17145__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_2821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1669 wire1672/A _24889_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__26966__B _26966_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_21_3566 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3623 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_169_2725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_182_4316 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire2476 VPWR VGND _21172_/S _21167_/S VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA_wire2433_A _27238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16770_ VGND VPWR _16770_/X _16767_/X _16769_/X _16884_/S _16949_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_28756_ _28756_/Q _32316_/CLK _28756_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25870__B _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3295 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13982_ _28515_/Q _13982_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_134_1994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25968_ VGND VPWR wire754/X _26783_/B _31500_/Q _31500_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22986__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29082__CLK _32426_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_3762 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_43_1888 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_129_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18758__B1 wire1939/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_2348 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_59_2018 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_76_3033 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_729 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_1_2937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_5085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_234_601 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15721_ _15720_/X _15692_/S _15721_/A2 _32331_/Q _15721_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_95_3667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_4130 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1775 VPWR VGND wire1775/X _18796_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 X_27707_ VGND VPWR _27707_/S _27707_/A1 _32441_/Q _32441_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_267_1625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_max_length3667_A _30443_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24919_ VGND VPWR _19577_/B _19628_/A _24950_/A2 _24919_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_182_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_core.RAM256_WE0[0] wire1438/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28687_ VGND VPWR _28687_/D _32110_/CLK _28687_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_199_5514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25899_ VGND VPWR _14195_/A _19581_/A _25903_/S _25899_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 Xwire1797 VPWR VGND _29866_/D _17417_/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_262_4373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_167_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_227_4493 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_fanout3475_A _31397_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15036__A2 _15628_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_106_4111 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_245_2624 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_2673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27493__A1 _27686_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25099__A3 _24889_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_645 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_205_5470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17430__B1 _17248_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18440_ VGND VPWR _18443_/S wire3895/X _28214_/Q _28214_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_233_122 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19970__A2 _19988_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3099 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_15652_ VGND VPWR _15632_/X wire1074/A wire702/X _29161_/D VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 X_27638_ VGND VPWR _27638_/S _27737_/A1 _32380_/Q _32380_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_234_656 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_180_4062 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_1061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21903__B _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31185__CLK _31436_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_128_3178 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23503__A0 _30438_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22306__A1 _29892_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_284_1961 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17981__A1 wire3816/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_2999 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15441__C1 _15612_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_72_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_2045 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19707__C1 _27077_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_4046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14603_ _14603_/X _29617_/Q _15628_/A2 _14930_/B2 _14642_/S _14602_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_89_4106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32430__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_3022 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_3484 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14795__A1 _15235_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18371_ VGND VPWR _18371_/S wire3904/X _28148_/Q _28148_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_15583_ VGND VPWR _15583_/X _15580_/X _15611_/A1 _15610_/B1 _15582_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__27231__A_N _17874_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27569_ _25643_/C _32226_/Q _27569_/X _25643_/B _32218_/Q _32234_/Q wire3402/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XFILLER_279_5593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17502__D_N _26441_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_opt_35_0_core_clk_A clkbuf_5_30_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26048__A2 _31530_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_4070 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27245__A1 _32120_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20519__B _29453_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17322_ VGND VPWR _26974_/B _32286_/Q _17424_/B _17424_/C _29850_/D _17321_/X VGND + VPWR NF_sky130_fd_sc_hd__a311o_4 XFILLER_50_3239 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29308_ _29308_/Q _32306_/CLK _29308_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_223_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14534_ _23043_/B _14534_/B _14534_/X _23053_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3b_1 XANTENNA__27289__S _27292_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24059__A1 _31108_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_4666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_clkbuf_leaf_221_core_clk_A clkbuf_5_28_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30580_ hold342/A _30580_/CLK _30580_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_2010 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_204_3088 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24059__B2 _19928_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17733__A1 _17685_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16536__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_5479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_122_2021 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26599__A3 _31771_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_102_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_4699 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__14547__A1 _14544_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_256_4133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17253_ _30853_/Q _30821_/Q _17253_/Y _29198_/Q _30804_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_4 X_29239_ _29239_/Q _32113_/CLK _29239_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_106_2786 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14465_ hold398/A _14465_/X _30436_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XANTENNA__15744__B1 _15744_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22609__A2 _30363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18704__S _23304_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32580__CLK _32580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_141_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_16204_ _16840_/A2 _16415_/A1 _28984_/Q _16204_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_136_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32250_ _32250_/Q _32525_/CLK _32250_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_87_3162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_176_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_5154 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_opt_34_0_core_clk clkbuf_opt_34_1_core_clk/A clkbuf_5_29_1_core_clk/X VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_17184_ _21672_/A wire3216/X _17183_/X _17184_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__24578__A_N _31418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25110__B _31195_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14396_ _14396_/Y _26123_/C _26123_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__22085__A3 wire2273/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_3706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21130__S _21137_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output568_A _28736_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21220__A2_N _21222_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_83_3026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31201_ _31201_/Q _31746_/CLK _31201_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21293__A1 _30365_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16135_ _16447_/A2 _16447_/A1 _28782_/Q _16135_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__17497__B1 _17502_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25559__A1 _31358_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_48_3157 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_clkbuf_leaf_372_core_clk_A clkbuf_5_3_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_4453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32181_ _32181_/Q _32538_/CLK _32181_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__21293__B2 _30480_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_2141 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_2434 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17547__C _17627_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_3799 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_152_4142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1199_A wire1199/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_2032 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_217_2726 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_174_2442 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27963__D _27963_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_1028 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31132_ _31132_/Q _32529_/CLK _31132_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19238__A1 _19271_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16066_ VGND VPWR _16826_/S _32049_/Q _29108_/Q _16066_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_272_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_2347 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_3605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_217_2759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2426 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15511__A3 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26222__A _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_170_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_215_3162 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_286_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3053 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15017_ _14545_/B _16646_/A2 _15017_/X _15638_/A2 _29564_/Q _16544_/A3 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a311o_1 XFILLER_269_3804 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xfanout3550 _30997_/Q _17447_/A1 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 X_31063_ _31063_/Q _31369_/CLK _31063_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_286_4841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_5417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19762__C _19776_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_2634 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_233_1337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18997__B1 wire1896/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_250_2352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29425__CLK _30367_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18659__B _30333_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_117_2882 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30014_ _30014_/Q _30455_/CLK _30014_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23057__S _23057_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3515 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23990__B1 _20128_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27752__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2483 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19825_ VGND VPWR _26870_/B _25881_/B wire1330/A _19825_/X _26544_/C1 _19520_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_269_3859 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_187_3526 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__17563__B _17563_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_22_2618 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4836 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_250_2385 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_439 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_113_2746 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout2882 _20756_/X _20783_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_256_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_286_4896 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_95_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16472__A1 _28791_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26876__B _26876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16472__B2 _16960_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_4749 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1533_A wire1533/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19756_ _19718_/A _19776_/B _19770_/C _19756_/A _19756_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or4b_4 XANTENNA__25780__B _31418_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_4137 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_58_core_clk _32547_/CLK clkbuf_5_9_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_16968_ _16968_/X _16967_/X _16958_/X wire923/X _16954_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_228_4257 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_5565 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_5633 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_3137 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18749__B1 _19151_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21348__A2 _14431_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_78_3865 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22545__A1 _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30402__CLK _30402_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20005__C1 _26861_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_17_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21516__D _21588_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31528__CLK _32564_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3707 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_285_2459 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18707_ _18707_/X _18705_/Y _18703_/Y wire2275/X _18702_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_2 XFILLER_263_3425 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_3545 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20556__A0 _29072_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27053__A _27053_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2767_A wire2768/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15919_ _15919_/X _29072_/Q _16026_/A2 wire1458/X _16039_/C1 _15918_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XANTENNA__18213__A2 _18163_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_2811 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19410__A1 _27701_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_94_2410 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_4402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_4522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31965_ _31965_/Q _32079_/CLK _31965_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19687_ _26859_/C1 _19686_/Y _19711_/A2 _28504_/Q _28504_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_143_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30829__D _30829_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_260_core_clk_A clkbuf_5_19_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1860 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21899__A3 hold354/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_228_3567 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16899_ VGND VPWR _16899_/X _16928_/B1 _16949_/C1 _16898_/X _16897_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__18675__A _30331_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29575__CLK _32574_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26287__A2 wire2660/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27484__A1 _32300_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20020__A2 hold185/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16224__B2 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17421__B1 input192/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19961__A2 _19752_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30916_ _30916_/Q _32581_/CLK _30916_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18638_ VGND VPWR _18658_/S wire3873/A _28351_/Q _28351_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_228_2855 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_3218 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_223_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_4165 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_225_667 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14235__B1 _29515_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_146_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31896_ _31896_/Q _31896_/CLK _31896_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25495__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17972__A1 wire3843/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15578__A3 _15615_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16775__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26892__A wire752/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_4312 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_2438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_59_1873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22628__C _22663_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14786__A1 _15236_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_clkbuf_leaf_159_core_clk_A clkbuf_5_15_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_244_1422 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_18569_ _30433_/Q _18569_/X hold377/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_222_3133 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30847_ _30847_/Q _32275_/CLK _30847_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_276_4509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30552__CLK _31815_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_261_3193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_1892 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31678__CLK _32290_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19174__B1 _19159_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20600_ VGND VPWR _20604_/S _27248_/A0 _29115_/Q _29115_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_72_2763 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_18_2260 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_2880 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21580_ _21302_/X _21580_/Y _21307_/A _21665_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XFILLER_33_2725 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_72_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_3177 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_276_3808 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_1477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_30778_ _30778_/Q _31962_/CLK _30778_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17724__A1 _31724_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25247__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16527__A2 _16964_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_18_2282 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18921__B1 _19318_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17724__B2 _31723_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_102_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23520__S _23522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32517_ _32517_/Q _32525_/CLK _32517_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_20531_ VGND VPWR _20543_/S _29048_/Q _27690_/A1 _29048_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_141_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25301__A _25341_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_3950 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_5210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_63_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3519 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26995__B1 _26999_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17913__A_N _17891_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18614__S _18616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_11_3746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_222_1753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_219_4949 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_31_3183 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_3521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_239_3641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_4277 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_239_3652 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23250_ VGND VPWR _23250_/S _29498_/Q _30233_/Q _30233_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_229_52 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20462_ VGND VPWR _20473_/S _28981_/Q _27242_/A0 _28981_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32448_ _32448_/Q _32550_/CLK _32448_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25020__B _25020_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_3663 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_179_2375 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27539__A2 _32215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_4250 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_5569 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_3926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_118_4048 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_48_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_200_2774 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_193_4990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22201_ VGND VPWR _30040_/Q _22199_/Y _22200_/X _22201_/X _21051_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XANTENNA_max_length1233_A _26936_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_175_2228 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20087__A2 _20106_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23181_ _23191_/C1 _23191_/B1 _23190_/B hold377/A _23181_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__26747__B1 _26224_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3283_A wire3283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20393_ VGND VPWR _20410_/S _23647_/A1 _28915_/Q _28915_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_32379_ _32379_/Q _32379_/CLK _32379_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__14443__A _18580_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_44_4234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_fanout1041_A wire1044/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_1849 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17457__C _26470_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_270_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__26211__A2 _26227_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout1139_A _14794_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22132_ _22131_/X _22513_/C1 wire828/A _29819_/Q _29819_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_216_2214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_270_2717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22082__D _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_66_2556 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_279_317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_4605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput230 _13791_/Y la_iena[0] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_62_2409 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15502__A3 _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput241 _13781_/Y la_iena[10] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA_max_length1400_A wire1402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31058__CLK _32032_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21036__A1 wire3976/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput252 _13780_/Y la_iena[11] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__15973__S _16443_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_135_3672 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_44_2821 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14710__A1 _29522_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_3514 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22233__B1 _29834_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput263 _13777_/Y la_iena[14] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_26940_ _31964_/Q wire1573/X _31964_/D wire2724/X wire1232/X VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22063_ _22063_/B _22063_/Y _22063_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_290_1453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_2_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25970__A1 _19662_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32303__CLK _32547_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_40_3408 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_1934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3858 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 Xoutput274 _13767_/Y la_iena[24] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_1464 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18988__A0 _18983_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19672__C _26781_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_4048 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_4_14_0_core_clk clkbuf_5_29_0_core_clk/A clkbuf_3_7_2_core_clk/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 Xoutput285 _13978_/Y la_iena[34] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 Xclkbuf_3_3_2_core_clk clkbuf_4_7_0_core_clk/A clkbuf_3_3_2_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_265_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__21587__A2 _21514_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput296 _13968_/Y la_iena[44] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_246_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_2_4637 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18569__B hold377/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_2572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21014_ VGND VPWR _21021_/S _29479_/Q _27258_/A0 _29479_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__23981__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_64_2291 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_131_2813 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_3831 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27662__S _27667_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3618 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25971__A _31049_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_4750 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_99_2310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20795__A0 _24216_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27172__B1 wire1230/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3055 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26871_ _23599_/B _26870_/Y wire752/A _31885_/Q _31885_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_40_2718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_181_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire1005 wire1005/X wire1005/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_74_5621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_248_748 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_42_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_246_5069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16463__A1 _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15266__A2 _16956_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3582 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28610_ _28610_/Q _32553_/CLK _28610_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_77_4054 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25822_ VGND VPWR hold488/A _31436_/Q _30152_/Q _25822_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__29918__CLK _29928_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_247 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_99_2354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3715_A _30330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire1038 VPWR VGND wire1038/X wire1038/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29590_ _29590_/Q _32306_/CLK _29590_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_198_core_clk_A clkbuf_5_31_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_5605 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30082__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_3902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_2199 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_2034 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24587__A _31542_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_261_61 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23733__B1 _24188_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_5345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_74_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28541_ _28541_/Q _31796_/CLK _28541_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__32453__CLK _32498_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24930__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length1867_A _22679_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20547__A0 _27261_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_2056 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_90_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19401__A1 _27247_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25753_ _26771_/A _25752_/Y _31415_/Q _25751_/Y _31415_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_70_5529 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_4057 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_73_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22965_ VGND VPWR _22965_/S _30477_/Q _30142_/Q _30142_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_94_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__18585__A _23049_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_5209 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15018__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16215__A1 _16725_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27475__A1 _32294_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20011__A2 wire851/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24704_ _24704_/B _24704_/Y _31456_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__22819__B _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_227_2321 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_1929 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_2370 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_246_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_4254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19952__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_3693 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_21916_ _21914_/Y _21913_/X _21942_/S _21916_/Y _21915_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_4 XFILLER_284_1246 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28472_ _28472_/Q _30580_/CLK _28472_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_266_2381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_77_2674 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25684_ _25683_/X _25867_/A _25684_/Y _31391_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_244_976 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_125_3318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_164_3367 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24289__A1 _31668_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_5419 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14226__B1 wire3974/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_1381 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_19_2013 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_58_2062 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22896_ _22846_/B _22896_/Y _22895_/B _22895_/Y _22846_/A _22895_/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_1 XANTENNA__17963__A1 wire3873/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_2753 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25486__B1 _25448_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15569__A3 _15707_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_129_3498 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_1219 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_2857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_38_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28942__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_3542 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_0_2981 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_51_4238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_103_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_227_2365 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_77_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27423_ VGND VPWR _27423_/S _32579_/Q _32107_/Q _27423_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14777__A1 _15575_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_142_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_1680 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24635_ _24634_/X _24632_/Y _24620_/Y _24619_/X _24636_/B _24609_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_2 XFILLER_224_3965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_51_3515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21847_ _22061_/S hold465/A _21847_/X _21999_/S1 _21853_/A _17076_/Y _29788_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XPHY_701 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_223_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22839__A2 _22820_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_90_2830 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_227_2387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3233 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_19_2057 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16309__S _16884_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_712 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_230_125 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19165__B1 wire1883/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_38_1946 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2841 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_201_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_3094 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_734 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27354_ VGND VPWR hold144/A _32209_/Q _27274_/X _32209_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_51_2814 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2038 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_745 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24566_ _31211_/Q _24567_/D _31212_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XPHY_1300 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_240_3277 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_90_2874 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_142_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_2098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21778_ _21778_/B _29880_/Q _21778_/A _21778_/X _21778_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__16518__A2 wire999/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17715__A1 _17539_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_756 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_257_5165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1528 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1311 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_36_2382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18912__B1 _19145_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17715__B2 _17783_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25849__C _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_767 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26307__A _26876_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_4150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1322 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_198_4890 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_90_2896 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_2674 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_123_3086 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_26305_ _26305_/Y _26331_/B _26874_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XANTENNA__14529__A1 _22444_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_778 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_218_5138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_23517_ VGND VPWR _23523_/S _28397_/Q _30445_/Q _23517_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14529__B2 _14528_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20729_ VGND VPWR _20747_/S _24216_/A0 _29244_/Q _29244_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__15726__B1 wire1068/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_27285_ VGND VPWR _32149_/Q _27266_/X _27292_/S _32149_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_2 XPHY_1344 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24497_ _24546_/B _25416_/B _31042_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_2 XANTENNA__18524__S _18524_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_201_2538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_205_1962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17191__A2 _21659_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_253_4317 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_4036 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29024_ _29024_/Q _32353_/CLK _29024_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__26450__A2 _26464_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14250_ _19504_/B _14249_/Y _14168_/S _14047_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o21ai_4 XFILLER_101_3362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26236_ VPWR VGND _31606_/D _26236_/B _26236_/A VGND VPWR NF_sky130_fd_sc_hd__and2_1 XANTENNA__24997__C1 _25681_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_218_3703 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23448_ _23448_/Y _29377_/Q _23448_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_231_5305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24461__A1 _24458_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_4798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_1905 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_10_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xmax_length3675 VPWR VGND _23096_/A1 _23491_/A0 VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__20078__A2 wire2655/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21275__A1 _21746_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14181_ _24446_/A _14300_/A hold97/X _14181_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26167_ _26167_/X _31477_/Q _26148_/A _26164_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_49_2732 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_4773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16044__S _16837_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2383_A wire2384/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23379_ VGND VPWR _23559_/S _30357_/Q _29675_/Q _30357_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__14353__A _21778_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18140__A1 wire3846/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17367__C _17424_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout3223_A _21447_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28322__CLK _30406_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_4537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29448__CLK _30454_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_input62_A la_input[115] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25118_ _31198_/D _25116_/X _25181_/B _25117_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__16151__B1 _16839_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24213__A1 _30889_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_2325 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26098_ _26098_/X _14399_/B _14302_/Y _26120_/A2 _26096_/Y _26097_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__18691__A2 _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17494__A3 _31614_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25410__B1 _26236_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_212_3302 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_238_1760 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_84_2678 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21027__A1 _30027_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_5259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_270_3985 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_5201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_665 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22224__B1 wire2284/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17940_ VGND VPWR _17948_/S wire3841/X _27878_/Q _27878_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_45_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_2358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_3373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25049_ wire877/A _19955_/A2 _25049_/X _25085_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 X_29926_ hold440/A _31916_/CLK _29926_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__25961__A1 _25935_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_153 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2648_A _14197_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4547 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_212_3346 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_114_3756 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18979__B1 _23355_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_4558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__30425__CLK _30425_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23816__D _23849_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_60_4091 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_5125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_234_1657 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22775__B2 _22807_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23972__B1 _24046_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25881__A _26542_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_4110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17383__B _17383_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_197 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17871_ _17871_/X _17501_/X _31730_/Q _31734_/Q _17503_/A VGND VPWR _17870_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_43_3098 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2976 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_134_2470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xfanout1422 VPWR VGND _27624_/A1 _18308_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29857_ _29857_/Q _31927_/CLK _29857_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_23_2938 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25308__A4 _25303_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1433 _27254_/A0 _18283_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XANTENNA__28472__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_225 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_169_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_60_3390 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29598__CLK _32127_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15257__A2 _16938_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19610_ _27087_/C1 _19609_/Y _19609_/A _28475_/Q _28475_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 Xwire2251 VPWR VGND wire2251/X _19530_/Y VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA__26696__B _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_43_2386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xfanout1455 _16448_/A3 _16805_/A3 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 X_16822_ wire892/A _29680_/D _16803_/Y _16821_/X _16812_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__o2bb2a_1 X_28808_ VGND VPWR _28808_/D _32350_/CLK _28808_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_182_4102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_1_4169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_5_3593 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xwire2262 VPWR VGND _24841_/A _27120_/A VGND VPWR NF_sky130_fd_sc_hd__buf_4 XANTENNA_wire2815_A _25512_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1466 _16944_/B2 _16960_/B2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_40_3986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_268_3870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26910__B1 _24383_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2273 VPWR VGND wire2273/X wire2273/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_29788_ _29788_/Q _29788_/CLK _29788_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_1_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_4007 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_718 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_229_4577 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22527__A1 _29816_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2284 VPWR VGND wire2284/X wire2284/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__24497__A _25416_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23724__B1 _25566_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_95_3453 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19541_ _25512_/A _19540_/Y _19632_/A _28456_/Q _28456_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_186_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_4217 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_253_217 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20538__A0 _27697_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_1145 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16753_ wire1010/A wire1482/A _29610_/Q _16753_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_28739_ _28739_/Q _31351_/CLK _28739_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__22436__C_N _29985_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13965_ _28532_/Q _13965_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_1_2745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_207_4842 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30575__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16206__A1 wire1485/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_95_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26269__A2 wire2626/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1009 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27466__A1 _32291_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25376__A_N _31278_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20002__A2 wire2638/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_5322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17403__B1 input189/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_223_4121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15704_ _15703_/X _15740_/B1 _15721_/A2 _28971_/Q _15704_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_235_965 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_262_4181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31820__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_186_2880 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_19472_ VGND VPWR _28451_/D _26159_/A _19471_/Y _25539_/A _25540_/C VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 X_31750_ _31750_/Q _31750_/CLK _31750_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_203_4706 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16684_ VGND VPWR _16684_/X _16681_/X _16683_/X wire962/X _16940_/B1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_1_2789 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_143_3418 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_147_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_108_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13896_ _28601_/Q _13896_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XANTENNA_wire4029_A _28674_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17954__A1 wire3906/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_3019 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25477__B1 _25454_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_2110 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_182_3478 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27561__S1 _25643_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21750__A2 _21099_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21125__S _21129_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25820__S hold488/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30701_ _30701_/Q _32549_/CLK hold361/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_18423_ VGND VPWR _18423_/S _28198_/Q wire3841/X _28198_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22448__C _22448_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14768__A1 _15590_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_2465 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15965__A0 _32345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_160_3721 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15635_ _15635_/X _28432_/Q _15634_/X _15737_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_72_2026 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31681_ _31681_/Q _31762_/CLK _31681_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_182_2766 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_86_5503 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_2438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_275_5221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_4507 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_30632_ hold381/A _31570_/CLK _30632_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_261_1032 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18354_ VGND VPWR _18357_/S wire3846/X _28132_/Q _28132_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_245_1775 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_54_2460 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15566_ _15721_/A2 _15566_/Y wire1515/A _15543_/S _30913_/Q _15565_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221ai_1 XFILLER_195_4529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20964__S _20964_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16509__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25229__B1 _25263_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_15_2422 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_124_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_163_2198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_201_4463 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_15_3167 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_221_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1005 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2206 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_275_5265 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output685_A _32600_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_176_core_clk _31887_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_106_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_195_3806 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_1185 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1639 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31970__CLK _31970_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17305_ _30968_/Q _17305_/Y _30934_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_180_2490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_14517_ _29454_/Q _14517_/Y _30444_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XFILLER_204_2162 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_30_2909 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20710__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_681 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_2572 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15717__B1 _15760_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2512 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30563_ VGND VPWR hold204/X _32063_/CLK _30563_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_258_3538 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18285_ _18285_/Y _29862_/Q _29341_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_173_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_50_2346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15497_ VGND VPWR _15497_/X _15494_/X _15496_/X _15705_/A1 _15730_/C1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_253_5530 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_105_core_clk _32349_/CLK clkbuf_5_6_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA__17182__A2 _22510_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32302_ _32302_/Q _32302_/CLK _32302_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_278_2252 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_3841 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18661__C _18661_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_4207 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17236_ _17220_/C _21609_/A _17236_/Y _14092_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_158_4373 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_119_4324 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15193__A1 wire3258/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27747__S _27747_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14448_ _14448_/Y _29453_/Q _30438_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2b_1 XFILLER_236_3803 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4215 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30494_ _30494_/Q _31479_/CLK _30494_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_89_2567 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_158_3650 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24960__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_89_2578 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15732__A3 _16910_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_239_2247 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21266__A1 _29728_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2515_A _20695_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20069__A2 _20073_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27209__D_N _27204_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32233_ _32233_/Q _32233_/CLK _32233_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_239_1513 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14940__A1 _29217_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31200__CLK _32554_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26729__B1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17167_ _17220_/C _21966_/B _17167_/Y _22617_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_278_1573 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_274_2149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_14379_ _31008_/Q _31009_/Q _14379_/X _14383_/C _14370_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_2 XFILLER_236_3858 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32326__CLK _32575_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18131__A1 wire3877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire891 VPWR VGND wire891/X wire892/X VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_139_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_7_993 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_87_2280 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_80_3700 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_5025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16118_ VGND VPWR _16806_/S _29216_/Q _29280_/Q _16118_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_154_3558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32164_ _32164_/Q _32204_/CLK _32164_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27048__A _27051_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_2707 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24204__A1 _30565_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17098_ VGND VPWR _18664_/B _30199_/Q _30388_/Q _17098_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_158_2993 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_3_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_48_2264 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24204__B2 _32557_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_4313 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_2106 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_135_2223 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_171_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16693__A1 wire3287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15496__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31115_ _31115_/Q _32470_/CLK _31115_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_170_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22215__B1 _21051_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28815__CLK _32424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16049_ _16798_/A2 wire3272/X _29623_/Q _16049_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_217_2578 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25952__A1 _31555_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_174_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_3834 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32095_ _32095_/Q _32233_/CLK _32095_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_286_5361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_1172 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23726__D _23813_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_2109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_170_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_257_501 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire734_A wire734/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23963__B1 _23805_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_212_4592 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_3634 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27482__S _27484_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_4379 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31350__CLK _31796_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31046_ VGND VPWR _31046_/D _32402_/CLK hold488/A VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__32476__CLK _32544_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17293__B _17293_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_233_1145 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17237__A3 _17235_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26102__D _26123_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20204__S _20223_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_214 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_113_3266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_117_2690 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_208_5318 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_4912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_225 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_4633 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16445__A1 _16445_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15248__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_26_2595 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_247_5389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_39_4314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17642__B1 _17815_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25704__A1 _31399_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19808_ _26861_/C1 _19807_/X _19852_/A2 _28556_/Q _28556_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_257_556 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_233_1189 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_3356 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_876 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_247_3921 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_2166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_2789 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22518__A1 _30020_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_168_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16996__A2 _29876_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_729 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23715__B1 _25982_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28965__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_165_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_78_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23515__S _23515_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24912__C1 _25652_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21824__A _21846_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20529__A0 _27688_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2606 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_169_3790 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_19739_ _25904_/A _19738_/X _19715_/X _28526_/Q _28526_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_113_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30559__D hold127/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18198__A1 _29744_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19395__A0 _28411_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_1932 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_187_2677 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_3526 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18609__S _18615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_285_1533 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23191__A1 _29735_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2957_A _18668_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_4953 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27457__A1 _32285_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22639__B _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_224_3206 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19934__A2 _19968_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_59_3094 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire3031_A _18359_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22750_ _22746_/X _22747_/X _22745_/X _22751_/B _21404_/A _22779_/A1 VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a2111oi_1 XFILLER_263_3266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_165_2931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23730__A3 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_4281 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31948_ VGND VPWR _31948_/D _32318_/CLK _31948_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__14208__B1 hold104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_3687 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16748__A2 wire1010/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_124_4030 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17945__A1 wire3827/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_1408 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_225_4997 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_17_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_5630 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_165_3698 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21701_ _21701_/X _22661_/B _22733_/B _14404_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA_max_length1183_A _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15956__A0 _29073_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14759__A1 _29010_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_280_3580 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_22681_ _22747_/C _22747_/B _21328_/A _22681_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_0_1565 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_497 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_3662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_31879_ _31879_/Q _31879_/CLK _31879_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_124_4074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_224_2538 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19147__B1 wire1402/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_181_2254 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_209_2084 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_3553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24140__B1 wire1614/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24854__B _32559_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24420_ _24420_/D _31009_/Q _24420_/Y _31011_/Q _31010_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor4_1 XANTENNA__26680__A2 _31795_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21632_ _21777_/B _21812_/C _21632_/A _21632_/X _21632_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__20874__S _20906_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2522 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_181_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_5485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_4186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23250__S _23250_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_3452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25031__A _25041_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_120_3237 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24351_ _24350_/X _24888_/D wire1668/X _23611_/A _30978_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__20701__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15708__B1 _15718_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_241_2885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21563_ _21561_/Y _21537_/Y _21530_/Y _21564_/A _21562_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31ai_4 XFILLER_50_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14872__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_5349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18344__S _18357_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_240_1149 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18370__A1 _23272_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3498_A _31224_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23302_ _23302_/B _30440_/Q _30441_/Q _23302_/X _23302_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__25388__D _25388_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_88_2022 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20514_ VGND VPWR _20515_/S _27261_/A0 _29032_/Q _29032_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__24979__C1 _25076_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27070_ _27070_/B _27053_/C _27122_/B _27070_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__15184__A1 _15507_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27657__S _27657_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_33_2599 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24282_ _24282_/X wire1303/X _31663_/Q _31586_/Q _26364_/A1 VGND VPWR _24281_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__17468__B _17605_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_159_3469 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24443__A1 _14245_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21494_ _21499_/D _21514_/B _30357_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 XFILLER_124_1982 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20175__A wire877/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_4085 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_176_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25640__B1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_119_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16920__A2 _16947_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_49_2006 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_11_2853 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__21257__A1 _29719_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26021_ VGND VPWR _17876_/Y _31525_/Q wire2597/X _26021_/X _24599_/A VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 X_23233_ _20848_/A _22733_/B _23233_/Y _20848_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__22454__B1 _29988_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14931__A1 _30896_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_4813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_20445_ VGND VPWR _20452_/S _28965_/Q _27703_/A1 _28965_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_66_3043 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_235_4069 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_172_3614 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23797__A3 wire1625/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_270_3215 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_189_5502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_1914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_5569 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_252_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_66_3054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_5046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18122__A1 wire3912/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_137_3745 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_11_2886 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1525 VPWR VGND _15624_/A1 _15577_/A2 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_85_3688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16091__C _16091_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_274_2661 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30448__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_2000 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_69_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27393__A0 _27278_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23164_ _30180_/D _23185_/B _23163_/X _30180_/Q wire1679/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_20376_ _27793_/C _31398_/Q _27784_/C _20384_/S _27793_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4bb_4 XFILLER_192_2350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_5546 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3049 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19870__A1 _20128_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_118_3166 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_4812 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_27_2315 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_279_125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3330 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__28495__CLK _31578_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_213_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_2998 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_157_2492 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15487__A2 _15721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16684__A1 wire962/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22115_ VGND VPWR _22115_/X _22112_/X _22114_/X wire2273/X _22092_/B VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__22206__B1 hold444/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_235_2667 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3832_A _18217_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25943__A1 _25971_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_265_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_27972_ _27972_/Q _29550_/CLK _27972_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_23095_ _23180_/B _18535_/B _23180_/A _23095_/X _23095_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__29740__CLK _29914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14695__A0 _29072_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_251_1201 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_0_613 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_3081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_2689 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_44_3374 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_279_169 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_252_2970 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26797__A _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_4681 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_255_1392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27392__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29711_ VGND VPWR _29711_/D _30667_/CLK _29711_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XANTENNA__27145__A0 _32051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_111_3918 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26923_ _31947_/Q wire1573/A _31947_/D wire2362/X wire1232/A VPWR VGND VGND VPWR + NF_sky130_fd_sc_hd__a22o_1 X_22046_ _22046_/B _22046_/Y _22046_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_1 XANTENNA__20768__A0 _29282_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_2992 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_44_2662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4445 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_0_657 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_131_2621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2408 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__30598__CLK _31879_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16436__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15239__A2 _15752_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_5_2133 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_275_331 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15208__S _15516_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27696__A1 _27696_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_2410 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_281_4001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_4121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_5489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29642_ _29642_/Q _32365_/CLK _29642_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xclkbuf_5_3_0_core_clk clkbuf_5_3_1_core_clk/A clkbuf_5_3_0_core_clk/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__clkbuf_8 XFILLER_99_2140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31843__CLK _32010_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26854_ VGND VPWR wire2655/X _19522_/A wire753/X _26854_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_251_1289 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold461_A hold461/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4489 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15435__C _15435_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_4717 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_96_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22509__A1 _17221_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_248_589 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25805_ VGND VPWR _25807_/C _32545_/Q _32544_/Q _25806_/D VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__20060__D _20654_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_39_5593 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_126_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29890__CLK _30900_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_2416 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25171__A2 _31215_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29573_ _29573_/Q _32351_/CLK _29573_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_183_4466 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_18_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_22_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14998__B2 _15748_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26785_ _26785_/B wire1272/X _26791_/A _26785_/X _27070_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XFILLER_268_2476 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18189__A1 _18201_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23997_ _23997_/X _23995_/X _28528_/Q _24163_/B2 _19718_/B VGND VPWR wire812/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XANTENNA__18519__S _18522_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3626 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23182__A1 hold486/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19386__B1 _21173_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_131_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27448__A1 hold214/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_268_1753 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__23182__B2 _30114_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28524_ _28524_/Q _31436_/CLK _28524_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__19925__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_5585 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_13750_ _31267_/Q _25322_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 X_25736_ _31405_/D _31405_/Q _25735_/Y _25734_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_57_3768 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21193__A0 _27253_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_1726 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_input214_A serial_resetn_in VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22948_ VGND VPWR _22954_/S _21428_/A hold402/A _30125_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_92_2914 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_5205 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_229_1737 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2229_A _26783_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17936__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16739__A2 _16965_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_244_773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_144_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27543__S1 _25641_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21732__A2 _21645_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_261 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_2605 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__31993__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26120__A1 _17897_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_3_core_clk _30492_/CLK clkbuf_5_0_1_core_clk/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_281_1920 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28455_ VGND VPWR _28455_/D _31815_/CLK _28455_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_51_3301 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20940__A0 _29508_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_3421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15947__B1 _28977_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_5462 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26120__B2 _31551_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_3470 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25667_ _25668_/A _31387_/Q _25667_/Y _25668_/B VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XFILLER_103_4114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22879_ VGND VPWR _22910_/A _22846_/A _22846_/B _22879_/X _22878_/B VGND VPWR NF_sky130_fd_sc_hd__a2bb2o_1 XFILLER_142_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_3150 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_207_2758 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24131__B1 _24205_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15420_ _15415_/X wire1068/X wire1085/X _15419_/X _15420_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 X_27406_ VGND VPWR _27412_/S _32254_/Q _27268_/X _32254_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26671__A2 _26637_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3957 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_51_4079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_520 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_237_5503 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_24618_ _24618_/B _24636_/C _31534_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__xor2_1 XFILLER_199_2504 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19689__A1 _28505_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_3803 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XPHY_531 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_28386_ _28386_/Q _30378_/CLK _28386_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20784__S _20784_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4838 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_2338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19858__B _19858_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25598_ _25632_/B hold71/A _25598_/X _25580_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 XPHY_542 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_86_4109 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_242_1937 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1986 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_90_2671 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_205_3194 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_16_3487 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_553 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_3329 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_103_2701 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_107_2870 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_564 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21496__A1 _21674_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15351_ _15350_/X _15521_/S wire1172/A _29539_/Q _15351_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_27337_ VGND VPWR _27339_/S _32194_/Q _27276_/X _32194_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__22693__B1 _29731_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_575 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_24549_ _24548_/X _24550_/C _24547_/Y _31299_/Q _24546_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_272_5438 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1130 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14782__S _15275_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_12_2606 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31223__CLK _31369_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2723 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout3340_A _26913_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18254__S _18254_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32349__CLK _32349_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4873 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1141 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_12_2617 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2598_A _17891_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18361__A1 wire3828/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17164__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_16_2786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22284__B _23307_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_597 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XPHY_1152 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__27081__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14302_ _14302_/Y _17895_/B VPWR VGND VGND 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NF_sky130_fd_sc_hd__decap_6 XFILLER_123_2193 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15175__B2 _15608_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17378__B _17424_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_4125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_120_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_8_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_46_5553 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_1185 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_84_3110 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16911__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15714__A3 wire1515/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_1196 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_17021_ VGND VPWR wire886/A _17020_/X _17019_/X _30378_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_88_3290 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_197_2272 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29007_ _29007_/Q _32110_/CLK _29007_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_10_2330 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14233_ _17879_/A _19505_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_6 XFILLER_193_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26219_ _31598_/Q _26227_/A2 _26220_/B _32288_/Q _26235_/B1 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XFILLER_270_5173 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28838__CLK _32548_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14922__A1 _14546_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24985__A2 _25017_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30932__D _30932_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27199_ _32092_/D _27205_/B _27276_/C _27198_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21boi_1 XANTENNA__14083__A _30332_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_46_5597 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18113__A1 wire3830/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3154 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_49_3274 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19310__B1 _19310_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_3244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_62_4142 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_114_4210 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27384__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31373__CLK _32297_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14164_ hold137/A _14167_/S _30073_/Q hold136/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__mux2_4 XFILLER_7_5079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_45_3138 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2442 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_214_3419 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_3468 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__32499__CLK _32499_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_4104 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__19593__B _19594_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_4270 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_118_4390 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_273_2160 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26187__B2 _32272_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17321__C1 _17320_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_84_3198 VGND VPWR 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NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4333 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_188_5078 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22748__A1 _22733_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2456 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14686__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_62_3474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_110_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_1481 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27862__CLK _30462_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15883__C1 _15882_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28988__CLK _32420_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27136__A0 _32042_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3677 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_149_4306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25815__S _25825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2702 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17923_ VGND VPWR _17923_/S wire3898/X _27861_/Q _27861_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_29909_ _29909_/Q _30330_/CLK hold430/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_171_2478 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19613__A1 _28476_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_136_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_2882 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_2830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_4931 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output433_A _13864_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_209_5627 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_2218 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14530__B _30410_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26500__A _26539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_234_1476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16427__A1 _16720_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_3818 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27687__A1 _27687_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15118__S _15750_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24939__B _24939_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2746 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_230_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_283_5589 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_17854_ _17841_/X _17854_/X _17853_/X _17530_/B _17563_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XFILLER_3_2829 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire1064_A wire1065/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23843__B _23873_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_229_5097 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4146_A _28394_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20959__S _20980_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14438__B1 _14459_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_813 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_188_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25698__B1 _25867_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21066__D _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire2070 wire2070/X wire2071/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_227_729 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_282_824 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23640__A_N _29451_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_4877 VPWR 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VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__25162__A2 _24502_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28218__CLK _32401_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_2516 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_output600_A _28701_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_97_2858 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_2926 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_147_4063 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17785_ VGND VPWR _17842_/S _17773_/X _17784_/X _17785_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_184_2817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14997_ _16956_/A2 _15747_/A1 _28880_/Q _14997_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_282_857 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_4025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18429__S _18432_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2205 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27439__A1 _32276_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_3846 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire1380 VPWR VGND _19718_/A wire1380/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_53_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_235_740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24370__B1 _26382_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_56_3234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_3351 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_19524_ _19790_/D _26763_/B _23598_/C _23599_/C _23618_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 X_31802_ _31802_/Q _31806_/CLK _31802_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 Xwire1391 _20680_/B _26017_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_8 XANTENNA__19916__A2 _25980_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16736_ VGND VPWR _16736_/S _16735_/X _16734_/X _16736_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21184__A0 _27689_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_169_2396 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23712__A3 _20671_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_4661 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_13948_ _28549_/Q _13948_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_166_3985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_95_2560 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17927__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_1_1841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__24955__A _24955_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_203_5259 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_160_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_357_core_clk _32316_/CLK clkbuf_5_18_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_162_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_4350 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_924 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_88_5609 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_56_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22920__B2 _22938_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length2465_A _23250_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26111__A1 _31547_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27331__A hold143/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_31733_ _31733_/Q _31738_/CLK _31733_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19455_ VGND VPWR _28446_/D _27007_/A _25512_/B _19454_/Y _19456_/A VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XANTENNA__15938__B1 _29588_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20931__A0 wire3976/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16667_ _16667_/X _32364_/Q _16818_/A2 _16841_/B2 _16841_/C1 _16666_/X VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_199_5174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_13879_ _28618_/Q _13879_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__clkinv_4 XANTENNA__14258__A _24459_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_1885 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_220_5573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_147_2683 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_125_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_91_2457 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_199_5196 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_222_445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24674__B _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18406_ VGND VPWR _18431_/S _28181_/Q wire3900/X _28181_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__26662__A2 _26662_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28368__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15618_ _15618_/X _15630_/A1 _15614_/Y _15615_/Y _15617_/Y _15631_/A1 VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_160_3551 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_19386_ _21173_/B _30219_/Q _27678_/C _27678_/A _24210_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_4 X_31664_ _31664_/Q _32583_/CLK _31664_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_203_3846 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__20694__S _20695_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_125_3682 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_121_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_16598_ _16579_/X _29674_/D _16588_/X wire901/X _16597_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o22a_1 XANTENNA__19768__B _19768_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23020__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_1862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_89_3010 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_106_3070 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__14610__B1 _14610_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29613__CLK _31927_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_4326 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15953__A3 _16039_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_489 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_34_2842 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_108_2689 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_236_5013 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_280_1474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_125_2970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_2014 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18337_ VGND VPWR _18358_/S _23272_/A1 _28115_/Q _28115_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30615_ _30615_/Q _31837_/CLK hold345/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_277_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_280_1485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15549_ _15549_/X _15727_/A2 _15692_/S _29265_/Q wire1515/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 X_31595_ _31595_/Q _31679_/CLK _31595_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23881__C1 _23880_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18352__A1 _18644_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17155__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31003__D _31003_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_4312 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27611__A1 wire1826/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_2728 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_141_2271 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_160_2894 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_89_2331 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27477__S _27483_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18268_ VGND VPWR _18333_/S _28098_/Q _27251_/A0 _28098_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30546_ hold452/A _31977_/CLK input51/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_103_3991 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_5079 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_154_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_12_3885 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24690__A _31472_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31716__CLK _32566_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16902__A2 _16911_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_67_3330 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21239__A1 _29718_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_121_2889 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_258_2656 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_137_3019 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_17219_ _22510_/A2 _30015_/Q _17218_/X _17220_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__14913__A1 wire3251/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19784__A _24276_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_25_5637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_288_5401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_18199_ _22332_/B _18199_/Y _18199_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_271_3524 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_271_4269 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30477_ _30477_/Q _30477_/CLK _30477_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_28_3314 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18104__A1 wire3857/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29763__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5423 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_219_1906 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_271_2801 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire851_A wire851/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_134_3907 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20230_ VGND VPWR _20236_/S _28773_/Q _27679_/A1 _28773_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_119_3453 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_32216_ _32216_/Q _32473_/CLK _32216_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_275_2981 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27375__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_173_3967 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_45_4362 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16115__B1 _16151_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20998__A0 _27242_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_217_3065 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19852__A1 _13919_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_173_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_171_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_288_5456 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17312__C1 _17311_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22414__S _22613_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length782_A wire781/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20723__A _29452_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_193_2670 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27209__C _32097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_4275 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24189__B1 _24209_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16666__A1 _16817_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20367__A_N _31402_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_5433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2807 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_214_3942 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26113__C _26123_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_214_4687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14143__D _14143_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_132_4354 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_80_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20161_ _25081_/A _24925_/B _20161_/X _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XANTENNA__25925__A1 _24716_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32147_ _32147_/Q _32204_/CLK _32147_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__30740__CLK _32467_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3503 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__31866__CLK _32565_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_45_3672 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_3121 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_230_3221 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_232_2829 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_73_core_clk _31351_/CLK clkbuf_5_13_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_271_2878 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_252_1521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14677__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_1934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_277_629 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__23936__B1 _25022_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_3817 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2518 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_26_3082 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_132_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_258_821 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_41_2802 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20092_ VGND VPWR wire2682/X _19522_/A _20122_/A _20092_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XFILLER_6_3165 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32078_ _32078_/Q _32078_/CLK _32078_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_269_4176 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24403__B1_N _24437_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2862 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_113_3052 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23400__A2 _23403_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21947__C1 _22065_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_2728 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_4310 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16418__B2 _16642_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24849__B _24856_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_5629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_247_5175 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_5126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23920_ _28489_/Q _25982_/B _23919_/X _28553_/Q _23920_/X _19646_/B VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221o_4 X_31029_ _31029_/Q _31693_/CLK _31029_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_187_3142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18812__C1 _27990_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3246_A wire3247/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20869__S _23523_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_364 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_2317 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_230_1841 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_78_4182 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_5498 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__29143__D _29143_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_269_2763 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21962__A2 _22074_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17091__A1 _29887_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18847__B _19335_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23245__S _23248_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30890__CLK _32117_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_230_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_71_5613 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21554__A _21554_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3740 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17091__B2 _22756_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_4485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_284_172 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_23851_ _19792_/C _23850_/X _31826_/Q wire1624/X _23852_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_257_397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_4376 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_260_5342 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_78_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14867__S _15623_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_4786 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29143__CLK _32134_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_242_74 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18339__S _18339_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_225_5473 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_85 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_268_1049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19368__B1 _19368_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_4349 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17243__S _17243_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_4016 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_55_39 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24361__B1 _24888_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22802_ _22820_/C _22820_/B _30467_/Q _22802_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_273_879 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19907__A2 _19925_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_3334 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_165_4196 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_285_1341 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21175__A0 _27680_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26570_ wire3454/X hold270/A _26568_/X _26859_/C1 hold269/X _26569_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XANTENNA__24900__A2 _24941_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_2037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__22506__A4 _22512_/A4 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_2041 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_608 wire1770/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2600 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_4641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_221_5337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_260_5386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_4038 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23782_ _23783_/A _24178_/A2 _31838_/Q _31803_/Q _27053_/A VGND VPWR _23781_/X VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_263_3063 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_209 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_20994_ VGND VPWR _21018_/S _29459_/Q wire1833/X _29459_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA_619 _20114_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_243_3637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__21714__A2 _14331_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24865__A _25160_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_161_3315 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4614 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_91_4382 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_261 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4002 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_25521_ wire2952/X _25513_/A _25521_/Y _31340_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__26783__C _27076_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22733_ _22733_/B _22733_/Y _22733_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor2_2 XFILLER_0_2085 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_74_2644 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15929__B1 wire1032/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30120__CLK _30453_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_260_4685 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_221_4636 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_52_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31246__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_4193 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20922__B1 _20948_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_246_1358 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16197__A3 _16966_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17394__A2 _17245_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24584__B _24585_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_1373 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_55_2054 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_33_3020 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_107_2122 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18591__B2 wire3160/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27598__D _27678_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_206_3470 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27850__A1 _32548_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_165_2794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28240_ _28240_/Q _30484_/CLK _28240_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_241_3361 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2969 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25452_ _25452_/X hold305/A _31306_/Q _31305_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_146_2182 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_22664_ _22663_/Y _22664_/Y _14091_/Y _22663_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ai_2 XANTENNA__29293__CLK _30507_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_71_27 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_4068 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24664__A1 _31462_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23011__S1 _23036_/S1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22124__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_202_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__14601__B1 wire1104/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_2087 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2658 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__25861__B1 _31451_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_5222 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_142_2046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_276_4147 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_24403_ _24437_/B _24401_/Y _31004_/D _24402_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21ba_1 X_21615_ _22756_/C _21615_/X _29718_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 X_28171_ _28171_/Q _32442_/CLK _28171_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17479__A _26488_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3782_A _30029_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25383_ _31279_/Q _31280_/Q _25383_/Y _25388_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21oi_1 XANTENNA__18074__S _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_4169 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_244_1093 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_22595_ VGND VPWR _22598_/S hold139/A _22594_/X _30076_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__18343__A1 wire3885/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_161_1957 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_202_3378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_187_49 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_254_4401 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_102_4180 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_5266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__27063__C1 _27075_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19540__B1 _19632_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27602__A1 _27682_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_222_2081 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27122_ _27122_/B _26949_/A _27122_/A _27122_/X _27122_/C VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__or4b_1 XANTENNA__27387__S _27394_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15157__A1 _30902_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24334_ _32014_/Q _27053_/A _24334_/X _31982_/Q wire1346/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__30270__CLK _30270_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_178_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31396__CLK _32546_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_21546_ _21546_/A _21546_/Y _21903_/B _21546_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_2 XFILLER_202_2666 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16354__B1 _16491_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_219_4554 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_137_4221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold307_A hold307/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26810__C1 _26950_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_4006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_11_3384 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_8_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27053_ _27053_/A _27053_/B _27053_/C _27053_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and3_4 XFILLER_219_3842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14904__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_1009 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19694__A _20061_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24265_ _30928_/D _24264_/X _23611_/A _25881_/D wire1668/A _26837_/A VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o2111a_1 XANTENNA__24967__A2 _25031_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30752__D input95/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_85_3452 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21477_ _21476_/Y _21381_/B _21381_/A _21484_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_4 XFILLER_270_3001 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_267_93 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3414 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_4621 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_219_3875 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_85_3474 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length1311 VPWR VGND _24207_/B1 _24079_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_133_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_26004_ _26687_/B _26003_/Y _26014_/A2 _31517_/Q _31517_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__27885__CLK _31914_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_5377 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23216_ VGND VPWR _23223_/S _30208_/Q _30138_/Q _30208_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__27366__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20428_ VGND VPWR _20440_/S _28948_/Q _27143_/A1 _28948_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__16106__B1 _15957_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length1333 VPWR VGND _25566_/B _25982_/B VGND VPWR NF_sky130_fd_sc_hd__buf_6 X_24196_ _24196_/X _19993_/X _31153_/Q wire1283/A _28739_/Q _19926_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 Xmax_length1344 VPWR VGND _19770_/C _19776_/C VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_46_3458 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_105_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_137_3586 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16657__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25916__A1 _31475_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23147_ wire2840/X _30107_/Q _23147_/X _23157_/A2 hold266/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a22o_4 XANTENNA_wire2081_A wire2081/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_189_4631 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_20359_ VGND VPWR _20359_/S _27709_/A1 _28899_/Q _28899_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_136_53 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_213_3430 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16322__S _16961_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_input164_A la_input[92] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14668__B1 _14823_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_153_2142 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2179_A _19758_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_933 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15865__C1 wire1035/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_1007 wire2404/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_0_421 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_1018 wire3699/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_821 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_287_3520 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27118__B1 _31523_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_4839 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_1936 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23078_ VGND VPWR _23078_/X _23076_/X _23077_/X _23075_/X _23056_/S VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_114_2126 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_3474 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_1029 _30479_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27955_ _27955_/Q _30402_/CLK _27955_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_172_2798 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25862__C _25878_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_977 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_1616 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__16409__A1 wire3281/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_213_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14920_ _15223_/A _15575_/C _28846_/Q _14920_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_26906_ _26906_/X _26762_/C _31901_/Q _26905_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 X_22029_ VGND VPWR _22029_/Y _21946_/A _21666_/X _22028_/X wire3146/X VGND VPWR NF_sky130_fd_sc_hd__a31oi_1 XFILLER_270_1687 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_98_3868 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_29_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__19071__A2 _19368_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_163_5527 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_wire2346_A wire2347/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27886_ _27886_/Q _30454_/CLK _27886_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27135__B _27485_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20779__S _20786_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_282_109 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2238 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold40 hold40/A hold40/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__19860__C _19860_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_4102 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_813 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_20_2919 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_152_41 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold51 input8/X hold51/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__25008__C_N wire1283/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_183_4230 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21953__A2 _21953_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_2_4297 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26877__C1 _26893_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_275_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32021__CLK _32583_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21464__A _21464_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold62 hold62/A hold62/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_4244 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29625_ _29625_/Q _32114_/CLK _29625_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__17082__B2 _21711_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14851_ VGND VPWR _14851_/X _14850_/X _14849_/X _15630_/A1 _15631_/A1 VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_229_2202 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__26341__A1 _31658_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26837_ wire753/A wire838/A _26837_/A _26837_/B _26837_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_236_537 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xhold73 hold73/A hold73/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_265_4585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_40_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15093__A0 _29630_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3248 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xhold84 hold84/A hold84/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_fanout3290_A _15620_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19359__B1 _19283_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xhold95 hold95/A hold95/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA__16290__C1 wire1038/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17153__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24352__B1 wire1351/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_13802_ _31144_/Q _13802_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_166_2525 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26974__B _26974_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21166__A0 _27624_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29556_ _29556_/Q _32113_/CLK _29556_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_17570_ _17570_/X wire2420/X _17474_/C _17473_/X _17457_/B VGND VPWR _26245_/C VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 XFILLER_109_3622 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_14782_ VGND VPWR _15275_/S _30892_/Q _29170_/Q _14782_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_26768_ VGND VPWR _31835_/D _26768_/B _26771_/A _26768_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__22994__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28510__CLK _32016_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_127_2509 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_3576 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18031__A0 _27963_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29636__CLK _32439_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_3125 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_79_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_3418 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_224_4260 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_16521_ _16520_/X _16068_/S wire985/X _30906_/Q _16521_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_28507_ _28507_/Q _32322_/CLK _28507_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 X_13733_ _31979_/Q _13733_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_57_3598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25719_ _31401_/Q _25727_/B _31402_/Q _25719_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__23125__D_N _18535_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_207_2522 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_246_2571 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_2815 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_29487_ _29487_/Q _30285_/CLK _29487_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_204_4856 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_31_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30927__D _30927_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14078__A _18562_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_26699_ _26698_/Y _27131_/B _31802_/Q _26720_/A _31802_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_144_2823 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_207_3278 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18582__A1 _30422_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_3688 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__32171__CLK _32525_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24104__B1 _24957_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27841__A1 _32544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19240_ _19375_/A2 _28298_/Q _19336_/B1 _19240_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_38_2274 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_160_2102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23043__A_N _14534_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16452_ wire1010/X wire1482/X _29225_/Q _16452_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XFILLER_278_4946 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14199__A2 _14300_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28438_ _28438_/Q _32277_/CLK _28438_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__15396__A1 _15751_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_278_4957 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16593__B1 _32322_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24655__A1 _31466_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19588__B _26870_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30613__CLK _31873_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_3833 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__22115__C1 _22092_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4345 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__31739__CLK _31748_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_196_4646 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_15403_ _15403_/X _28859_/Q _15692_/S _15721_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__26569__B1_N wire3454/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3445 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XPHY_350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_242_1745 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_237_5333 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_19171_ _19170_/X _19318_/B1 _19201_/A2 _28330_/Q _19171_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_16_2550 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17389__A _17389_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22666__B1 _30454_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_361 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16383_ VGND VPWR _16383_/X _16380_/X _16382_/X _16720_/C1 wire1038/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_231_297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_100_5577 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_28369_ _28369_/Q _30481_/CLK _28369_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_207_1876 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28660__CLK _32552_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_372 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22130__A2 _22129_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_383 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_83_5539 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_194_5082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__25195__B1_N _24490_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30400_ _30400_/Q _30403_/CLK _30400_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_259_2921 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18122_ VGND VPWR _18152_/S wire3912/X _28050_/Q _28050_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_223_1166 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XPHY_394 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_15334_ _28424_/Q _15334_/Y _15333_/X _15718_/B1 wire1496/X _15503_/A2 VPWR VGND + VGND VPWR NF_sky130_fd_sc_hd__a311oi_1 XANTENNA__27297__S _27301_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4523 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_223_1177 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_31380_ _31380_/Q _32544_/CLK _31380_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__20141__A1 _28715_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_237_5388 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16345__B1 _16838_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_3298 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18885__A2 _19357_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17542__C1 _17552_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output383_A _13922_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_4212 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26947__A3 _26946_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_2965 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_233_4507 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__16896__A1 wire1482/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15699__A2 _15727_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30331_ _30331_/Q _30452_/CLK _30331_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_142_1890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18053_ _23417_/B _23415_/A _30415_/Q VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand2_1 X_15265_ _15752_/A2 _15265_/X _15264_/X _15752_/B1 _32431_/Q _15265_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_190_4234 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30662__D _30662_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30763__CLK _32296_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31889__CLK _32039_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25080__A1 _31183_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_255_2829 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_259_2998 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire4096_A _28649_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_155_3631 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_64_4259 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_3514 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_29_3634 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xmax_length3280 VPWR VGND _16956_/A1 wire3281/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XANTENNA__22969__A1 hold445/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17004_ hold461/A _29449_/Q _17004_/X _30316_/Q _29773_/Q VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a22o_1 XANTENNA__29016__CLK _32351_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_4 _29135_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_155_3642 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14216_ _14216_/Y _14216_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkinv_8 XANTENNA__27357__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30262_ _30262_/Q _30262_/CLK _30262_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XANTENNA__23091__B1 _21211_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_output550_A wire4013/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15196_ VGND VPWR _15196_/X _15195_/X _15762_/A1 _15718_/B1 _15194_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__19834__A1 _28569_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_190_2810 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_6_77 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_64_3558 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_output648_A wire2373/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xmax_length2590 _18321_/S _18317_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XANTENNA__16648__A1 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_32001_ _32001_/Q _32271_/CLK _32001_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 XFILLER_29_3689 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_27_4081 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_218_2662 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17845__B1 _17844_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25907__A1 _19558_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14147_ _14245_/B _14147_/Y _22520_/B _31257_/Q _24447_/A _29950_/Q VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__a221oi_4 XFILLER_171_2220 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_81_3861 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_wire1181_A _15500_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30193_ _30193_/Q _30411_/CLK _30193_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_287_927 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_4062 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_7_3441 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_97_4002 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_218_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_253_1830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_84_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_231_3541 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_4_793 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_27_3380 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_259_629 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31119__CLK _31119_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_133_3951 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23918__B1 _24199_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_281 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24186__A3 _24186_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_3_3305 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_209_5402 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_114_4095 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18955_ _18954_/X _19380_/B1 _19380_/A2 _28156_/Q _18955_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_14078_ _22078_/A _18562_/A VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_4 XANTENNA__25383__A2 _25388_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_3867 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28040__CLK _30276_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_3485 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26580__B2 _26616_/B2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__29166__CLK _32394_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25772__C _32101_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26230__A _26244_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_171_2286 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_269_2004 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_4174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22197__A2 _22194_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_110_3214 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_266_4349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23394__B2 _22448_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15871__A2 wire1732/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_55_5608 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__17852__A _17852_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17906_ _17906_/X _26763_/A _17913_/D _17910_/B _17891_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4b_4 XFILLER_283_4630 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_4300 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_20_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_209_5446 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_244_5337 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_18886_ _19298_/A2 _27993_/Q wire1930/X _18886_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 XANTENNA__19770__C _19770_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_267_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__15608__C1 wire1104/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_247_3025 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18667__B _29344_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_3484 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__27760__S _27765_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xfanout1071 _14566_/X wire1074/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_114_2693 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_282_621 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_244_4625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24388__C _24389_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26332__A1 _26331_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_75_4344 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_212_2294 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17837_ _17874_/A2 _31727_/Q _17836_/X _17837_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 Xfanout1082 wire1087/X wire1085/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_288_1959 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_282_632 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_75_3610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30143__CLK _30483_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_23_2598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_114_1970 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_264_4073 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31269__CLK _31282_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_79_3790 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23146__A1 _23302_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_1_3073 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_247_3069 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__24343__B1 _24357_/B1 VGND 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XFILLER_97_1954 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_184_1902 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_225_3323 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__24894__A1 _31091_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23697__A2 _24273_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_166_3782 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__14831__B1 _14675_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_191_core_clk _32567_/CLK clkbuf_5_27_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_182_3050 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_225_3334 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_242_529 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_254_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_184_2658 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__18022__A0 _27954_/Q VGND VPWR VPWR VGND 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VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19438_ _31341_/Q _31340_/Q _19432_/A _28440_/Q _28441_/Q _19438_/Y VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o2111ai_1 XANTENNA__30293__CLK _30433_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_238_5119 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_222_253 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20380__A1 _25029_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_182_2382 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_5392 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_108_3198 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19498__B _31330_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23449__A2 _29363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__22409__S _22616_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_123_2918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_52_2238 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_206_2065 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_162_2978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_125_3490 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_91_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_3332 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_143_2366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_5433 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31647_ _31647_/Q _32567_/CLK _31647_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19369_ VGND VPWR _19369_/X _18856_/B _19380_/B1 _28080_/Q _19368_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_277_3733 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_241_1233 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__17128__A2 _21903_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3411 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_216_5406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 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_21328_/Y _21444_/A _21651_/B _21329_/Y _21372_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_29_5581 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_121_2686 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_160_1990 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__20683__A2 _14147_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_30529_ _30529_/Q _31896_/CLK hold302/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__24949__A2 _19628_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30572__D _30572_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_216_4738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_86_3761 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_1329 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18622__S _18622_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23748__B _23748_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_195_3499 VGND VPWR VGND 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XFILLER_232_4039 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_21262_ VGND VPWR _23226_/S _29724_/Q _30440_/Q _29724_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21549__A _21549_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23082__B1 wire2840/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19825__A1 _19520_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire4208 VPWR VGND _32597_/A input1/X VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_82_3647 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20453__A _27485_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_288_5242 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__23621__A2 wire1371/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_176_2186 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_45_4170 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_23001_ _25691_/B _32488_/Q _23001_/X _23036_/S1 _32480_/Q _32496_/Q _32472_/Q VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__mux4_1 XANTENNA__16639__A1 _16721_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_1906 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_1785 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_210_5038 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20213_ VGND VPWR _20223_/S _28758_/Q _27696_/A1 _28758_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17238__S _17238_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_5557 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16639__B2 _16841_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17836__B1 _17503_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_210_4304 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_8_3249 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_217_2150 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xwire3507 _31158_/Q _13788_/A VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_8 XFILLER_82_2946 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_21193_ VGND VPWR _21201_/S _29635_/Q _27253_/A0 _29635_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_236_2773 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_wire3363_A wire3364/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_4034 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_284_5117 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_235_1026 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_fanout1121_A _14551_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_115_2402 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__17465__C _31050_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xwire3518 VPWR VGND wire3518/X _31088_/Q VGND VPWR NF_sky130_fd_sc_hd__buf_4 XFILLER_214_3750 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26020__B1 _17876_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17300__A2 input202/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_271_1930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_fanout1219_A _14540_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23909__B1 _25738_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_249_4514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_232_2637 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__32044__CLK _32403_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_28_2476 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_41_3322 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_3049 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_20144_ _28716_/D _19554_/Y _20143_/X wire877/A _20175_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_1 XFILLER_230_3040 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_232_1903 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_115_2435 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_8_1814 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_63_2378 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_2326 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_214_3794 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_167_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_277_459 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18858__A _28120_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23385__A1 _30363_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_253_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24579__B _27280_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_3366 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__24582__B1 _25703_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27740_ VGND VPWR _27747_/S _32469_/Q _25023_/B _32469_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_210_2913 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_3_4573 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_24952_ _25076_/C1 _24951_/Y _24955_/A _31120_/Q _31120_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_20075_ _26148_/A _20074_/Y _20106_/A _28683_/Q _28683_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XANTENNA__19053__A2 _19179_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_80_2692 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__20599__S _20615_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3628_A _30751_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_8_1869 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__21396__B1 _21677_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19680__C _26017_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_4258 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__28533__CLK _31836_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_76_3407 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_279_core_clk _31914_/CLK clkbuf_5_22_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_3_3861 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_22_2042 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__29659__CLK _32430_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26859__C1 _26859_/C1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21935__A2 wire3802/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_257_161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_282_4140 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_6_2283 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27670__S _27677_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23903_ _23903_/X _24081_/A3 _19928_/B _28615_/Q _31093_/Q _24892_/B VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 XFILLER_258_695 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__18261__B1 wire3174/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_262_4725 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_27671_ VGND VPWR _27677_/S _32406_/Q wire2248/A _32406_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__17481__B _31055_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_41_1942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_285_492 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_2_2136 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18800__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24883_ _26184_/A _24882_/Y _24881_/X _31087_/Q _31087_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 XFILLER_58_3830 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_3_3894 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18069__S _18074_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_36_5541 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2413 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23137__A1 hold281/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_leaf_208_core_clk _31553_/CLK clkbuf_5_31_1_core_clk/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__clkbuf_16 XFILLER_128_3519 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_97_3890 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__17912__D _26763_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__32194__CLK _32225_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16272__C1 wire1038/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_208_3510 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_29410_ _29410_/Q _31920_/CLK _29410_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23137__B2 _30105_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15614__A2 _15614_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_167_2834 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_189_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24334__B1 wire1346/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_221_5101 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3803 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26622_ wire3452/X _31779_/D _26620_/X _27059_/C1 _31884_/Q _26621_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_6_1593 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_183_2102 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_260_5161 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_247_3570 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21148__A0 _27143_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23834_ _30839_/D _23861_/C _23834_/A _23849_/B _23849_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XFILLER_243_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_145_3822 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_36_5585 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_149_3991 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_245_378 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_405 wire766/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23688__A2 _23737_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24885__A1 _31088_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_hold257_A hold257/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_187_2293 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__30636__CLK _32309_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_180_3713 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_39_3262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14822__B1 _14822_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_184_3882 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__22345__C1 _22344_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_416 wire746/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_148_2255 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_208_3554 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_19_3847 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_82_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_265_2479 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_427 wire744/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_29341_ VGND VPWR hold340/X _31914_/CLK _29341_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_180_3735 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_54_3738 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_226_581 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_26553_ VGND VPWR _14200_/Y _14398_/B _26543_/B _26553_/Y VGND VPWR NF_sky130_fd_sc_hd__o21ai_1 XANTENNA__19210__C1 _22554_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_70_3006 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_3123 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_438 wire724/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_23765_ VGND VPWR _23765_/C _31784_/Q _26652_/B _23765_/D _26631_/B VGND VPWR NF_sky130_fd_sc_hd__and4b_1 XFILLER_91_4190 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_145_3866 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30747__D hold280/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_20977_ VGND VPWR _20980_/S _30183_/Q _29442_/Q _29442_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_208_2842 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4433 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_449 wire721/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire3997_A wire3998/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26087__B1 _26120_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27808__A_N _25795_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_198_15 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_243_2733 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_183_2179 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_13_4114 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22360__A2 _22372_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26626__A2 _26678_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_74_2463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_25504_ VGND VPWR _31331_/Q _31332_/Q _31330_/Q _25504_/X _25454_/A _19498_/A VGND + VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_256_5208 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22716_ _22727_/B _22726_/B _22716_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or2_1 XFILLER_204_2706 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__15378__A1 _15747_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_263_2181 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_29272_ _29272_/Q _32113_/CLK _29272_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_122_3118 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_26484_ _26484_/X _31703_/Q _26483_/X _26492_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21bo_1 XFILLER_208_2886 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_221_4477 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_126_3298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_23696_ _23696_/X wire1628/X _31559_/Q _26838_/A1 _31511_/Q _23737_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__a32o_1 XANTENNA__22319__S _23388_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_35_2447 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_13_4158 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_281_1079 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_246_1199 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_178_4332 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_28223_ _28223_/Q _32137_/CLK _28223_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_104_4286 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_161_2466 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_25435_ _25430_/A _31298_/Q _24502_/X _24543_/D _25435_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a31o_1 XFILLER_221_3765 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__22648__B1 _14412_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_126_2586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_22647_ VGND VPWR _23342_/A _22646_/Y wire3770/A _30087_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_122_2428 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_126_1852 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30786__CLK _31959_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21450__C _21464_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_276_3210 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_52_3495 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA_fanout1922_A wire1924/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17119__A2 _21616_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_2029 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_4365 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_276_3221 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_273_4810 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_238_4930 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_87_3514 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_3631 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__29039__CLK _31577_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_1306 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_234_5517 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_139_4338 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_28154_ _28154_/Q _28326_/CLK _28154_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_220_1317 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__16327__B1 _16949_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_25366_ _25408_/B _25365_/X _25366_/X _25376_/C VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__or3b_1 XFILLER_178_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20123__A1 _28707_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27587__B1 _32339_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_22578_ VGND VPWR _22578_/S wire3699/X _22617_/C _22578_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_222_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_198_3090 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__18867__A2 _19374_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23860__A2 _24370_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_191_5266 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4521 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_202_2474 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26315__A _26819_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_max_length3230_A _30328_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_30_3782 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_27105_ VGND VPWR _32030_/D _27117_/A2 _27104_/X _26823_/B _27051_/A VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__16878__A1 _16878_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24761__C _24770_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24317_ VGND VPWR _24317_/X _32039_/Q _24317_/A _24317_/C VGND VPWR NF_sky130_fd_sc_hd__and3_1 XANTENNA__20674__A2 _20673_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_69_3970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_21529_ _21538_/B _21529_/A _21529_/C _21619_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nand3_1 X_28085_ _28085_/Q _32419_/CLK _28085_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_3249 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_25297_ _25297_/X _25414_/B1 _31263_/Q _25293_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XANTENNA__18532__S _18532_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire2296_A wire2296/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14889__B1 wire1089/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__30016__CLK _30314_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_194_2242 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_178_2985 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_272_2417 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_3222 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_155_2204 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_15050_ _15050_/X _15040_/Y _15611_/B1 _15036_/Y _15044_/Y _15049_/X VPWR VGND VGND + VPWR NF_sky130_fd_sc_hd__o32a_1 XANTENNA__27339__A0 _27280_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_27036_ _27036_/C _31997_/D _27051_/A _27036_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3_1 XFILLER_156_3962 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_4_5005 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 X_24248_ _30924_/D _26542_/B _31760_/Q _26542_/A _26542_/D VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__and4_1 XANTENNA__19816__A1 _28560_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_130_5515 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_191_4598 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_85_3293 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23612__A2 _24260_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20363__A _23599_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__28063__CLK _30272_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_254_3585 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__29189__CLK _30911_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_63_4270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_14001_ _28496_/Q _14001_/Y VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__inv_2 XFILLER_215_2802 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_191_3886 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA_core.RAM128_Di0[8] wire2356/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_4_5049 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3438 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_219_2982 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_2704 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire2463_A _23268_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_24179_ wire712/A _24174_/X wire733/X _24209_/B1 _24178_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o31a_2 XFILLER_42_3119 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14361__A _17078_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_172_2540 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xmax_length1174 VPWR VGND _15223_/A _15575_/A VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_111_4202 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_4254 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_269_927 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22989__S _31395_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26011__B1 _26014_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_215_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_210_5561 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_150_4262 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xfanout3957 _22613_/S _22619_/S VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_133_2513 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_172_2562 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 Xmax_length1196 VPWR VGND _15751_/B1 _15646_/B1 VGND VPWR NF_sky130_fd_sc_hd__buf_6 XFILLER_4_3603 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_231_2114 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__19831__A4 _19520_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15302__A1 _15607_/A1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3542 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_20_4118 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_1_741 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25365__A2 _31274_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24022__C1 _24014_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_98_3610 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__30166__CLK _30424_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_28987_ _28987_/Q _32291_/CLK _28987_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_250_2759 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_2598 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_137_1970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_185_4314 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_98_4366 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_24_2830 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_46_1864 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_163_51 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_150_3572 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_280_5504 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_228_4609 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15853__A2 _16515_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__31411__CLK _32416_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_24_3586 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18740_ _18740_/X _18737_/X wire1900/X _18739_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_1_785 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_245_5635 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__25770__C1 _32097_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15952_ wire1005/X wire1477/X _28841_/Q _15952_/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__a21o_1 X_27938_ _27938_/Q _30367_/CLK _27938_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__23393__B _23393_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23915__A3 _24081_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19044__A2 _19189_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_188_2013 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_249_662 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_245_4901 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_2_4061 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_40_2120 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21387__B1 _21506_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput130 VGND VPWR _30634_/D la_input[61] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_249_673 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23409__A_N wire3789/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_245_4912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26985__A _27007_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput141 VGND VPWR _30614_/D la_input[71] VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_7_1357 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_98_2931 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_248_4079 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__27580__S _31381_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14903_ _15597_/A2 _14903_/X _14902_/X _15235_/A1 _29216_/Q _15608_/B2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 Xinput152 VGND VPWR _30594_/D hold473/X VGND VPWR NF_sky130_fd_sc_hd__clkbuf_1 XFILLER_98_2942 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_188_2046 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_57_4030 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26314__A1 _26327_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_7_1379 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_18671_ _22167_/A1 _29774_/Q _23342_/C _18671_/Y VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__a21oi_2 Xinput163 _30574_/D la_input[91] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_4 XFILLER_59_2904 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__20302__S _20302_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15883_ VGND VPWR _15883_/X _16040_/A2 wire1032/X _15880_/X _15882_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 X_27869_ _27869_/Q _30272_/CLK _27869_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_237_857 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xinput174 mprj_dat_i[0] input174/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_76_3930 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__15066__B1 _15638_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_54_5641 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_229_2010 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__27900__CLK _30385_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xinput185 mprj_dat_i[1] input185/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XANTENNA_output229_A wire2299/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_236_345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_206_4918 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16802__A1 wire1035/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15605__A2 _15605_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__24325__B1 _24357_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_252_805 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_248_3389 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 Xinput196 mprj_dat_i[2] input196/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_2 XFILLER_185_2934 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__26865__A2 wire752/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17622_ _17622_/X _14244_/Y _17474_/C _17473_/X _17457_/B VGND VPWR _26245_/C VGND + VPWR NF_sky130_fd_sc_hd__a221o_1 X_29608_ _29608_/Q _30359_/CLK _29608_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_263_142 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14834_ wire1541/X _14834_/X _28980_/Q wire1488/X _14102_/Y _15623_/S VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_37_3914 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_15_5625 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_30880_ _30880_/Q _32024_/CLK wire717/X VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_111_2899 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_3302 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_226_4377 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_163_3922 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_18_4047 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23679__A2 _31524_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14813__B1 _14887_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18004__A0 _27938_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_57_3362 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_236_389 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__31561__CLK _31801_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_283_2568 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_92_3264 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_17553_ VGND VPWR _17532_/Y _17552_/X _17764_/B _17553_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_2 X_29539_ _29539_/Q _30863_/CLK _29539_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_37_3958 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_251_337 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 X_14765_ _14765_/X _28086_/Q _14764_/X _15515_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_283_1845 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_18_3346 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__30657__D hold287/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_204_5387 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_109_3463 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_264_1233 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23840__C _24310_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__18555__A1 _30432_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17358__A2 _30819_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xclkbuf_opt_11_1_core_clk clkbuf_opt_11_2_core_clk/A clkbuf_opt_11_1_core_clk/A VGND + VPWR VGND VPWR NF_sky130_fd_sc_hd__clkbuf_16 XANTENNA_950 wire4163/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_3297 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_226_3698 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22351__A2 _22356_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4331 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_31_4214 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22737__B _22747_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16504_ VGND VPWR _16504_/X _16249_/S wire1048/A _16503_/X _16502_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XANTENNA__26617__A2 _26684_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_281_2270 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__19898__A4 _26694_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_961 _17431_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_200_4506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__15369__A1 _28794_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_122_4342 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_35_4394 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32550_ _32550_/Q _32550_/CLK _32550_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_clkbuf_leaf_26_core_clk_A clkbuf_5_8_1_core_clk/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_17484_ _17479_/X _17484_/Y _17490_/A _17490_/B VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__nor3b_2 XANTENNA_972 _28043_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_109_2762 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__24089__C1 wire1256/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_259_4120 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__25825__A0 _31436_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_14696_ _14696_/X _14887_/A2 _14822_/B1 _29104_/Q wire1508/X VGND VPWR VGND VPWR + NF_sky130_fd_sc_hd__o31a_1 XFILLER_38_2082 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_wire4109_A _28576_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_31_3502 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_983 _26333_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_92_2596 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA_994 _27236_/A0 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_226_2997 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_260_893 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_output598_A _28699_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__21133__S _21134_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16030__A2 wire989/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19223_ _19222_/X _19367_/B1 _19380_/A2 _28201_/Q _19223_/X VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o211a_1 X_31501_ _31501_/Q _31578_/CLK _31501_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_53_2558 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_140_2506 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_204_3974 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__26093__A3 _31544_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16435_ VGND VPWR _16566_/S _28790_/Q _28822_/Q _16435_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_203_2227 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_32481_ _32481_/Q _32498_/CLK _32481_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XFILLER_196_4454 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_157_4405 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_220_757 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_35_2970 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_125_2074 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_258_29 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_242_2298 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__22103__A2 _29814_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_139_5551 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_200_3838 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__23300__A1 wire3813/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15131__S _15627_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XPHY_180 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31432_ _31432_/Q _32464_/CLK _31432_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 X_19154_ VGND VPWR _19178_/B _28361_/Q _27942_/Q _19154_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_196_3742 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_53_1868 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_255_4039 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__16318__B1 _16940_/B1 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_16366_ wire4148/X _16366_/X _29318_/Q wire1449/X _16791_/A2 _16815_/A2 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o221a_1 XFILLER_179_2738 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XPHY_191 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23849__A _23849_/A VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__14592__A2 _14817_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__20972__S _20979_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_220_3297 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_255_3305 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__21311__B1 _21549_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23851__A2 _19792_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_103_2350 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__25767__C _32094_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_199_2186 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_274_3939 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_259_3485 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_237_4451 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_4001 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XFILLER_138_3103 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA_max_length2330_A _14210_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18105_ VGND VPWR _18119_/S _18644_/A1 _28034_/Q _28034_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XFILLER_100_3950 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_86_3046 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__28406__CLK _32379_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15317_ VGND VPWR _15716_/S _29604_/Q _29636_/Q _15317_/X VGND VPWR NF_sky130_fd_sc_hd__mux2_1 XANTENNA__21862__A1 _29788_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19085_ _19085_/X wire1883/X _19079_/X _19084_/X wire3151/X _19085_/C1 VGND VPWR + VGND VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_177_3174 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_31363_ VGND VPWR _31363_/D _31363_/CLK _31363_/Q VGND VPWR NF_sky130_fd_sc_hd__dfxtp_4 XFILLER_12_2266 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_16297_ _16297_/X _32354_/Q _16964_/A2 _16966_/A3 _16736_/S _16296_/X VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__o311a_1 XFILLER_255_3349 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18442__S _18466_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_9_4226 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_192_2905 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_68_3 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__16333__A3 _16924_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_fanout2236_A _19538_/Y VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_258_1037 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XFILLER_86_2345 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_272_4386 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_233_4337 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_83_3934 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_61_5645 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XANTENNA__23064__A0 _23063_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_18036_ VGND VPWR _18037_/S _23285_/A1 _27968_/Q _27968_/D VGND VPWR NF_sky130_fd_sc_hd__mux2_1 X_30314_ _30314_/Q _30314_/CLK _30314_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__27755__S _27756_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_272_4397 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__32067__CLK _32067_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15248_ _15248_/X _28959_/Q _15247_/X _15752_/A2 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__o21a_1 XFILLER_290_2528 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 X_31294_ _31294_/Q _31923_/CLK _31294_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_2 Xoutput604 _28704_/Q la_output[91] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__24800__A1 _31051_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_86_2378 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_42_4310 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput615 _24459_/B mprj_adr_o[11] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_116_4157 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_64_2610 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_190_3352 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_211_5347 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_81_4370 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_9_2802 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 Xoutput626 _14302_/Y mprj_adr_o[22] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XANTENNA__30509__CLK _31912_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17058__S _23348_/C VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17818__B1 _17474_/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_29_3486 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA__14895__A3 _15628_/A3 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 Xoutput637 wire2408/X mprj_adr_o[3] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 X_30245_ _30245_/Q _30245_/CLK _30245_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA_wire1563_A wire1564/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_15179_ _15179_/X _15165_/X _15178_/X _15173_/X _15169_/X wire1093/A VGND VPWR VGND + VPWR NF_sky130_fd_sc_hd__a32o_1 Xoutput648 wire2373/X mprj_dat_o[12] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_9_2835 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 Xoutput659 wire2707/X mprj_dat_o[22] VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__buf_12 XFILLER_290_1849 VGND VPWR VGND VPWR NF_sky130_fd_sc_hd__decap_4 XANTENNA__28556__CLK _30580_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__16097__A2 _16825_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3912 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__18491__A0 _28264_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__17294__A1 _32298_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_99_3418 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XANTENNA_hold33_A hk_dat_i[31] VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__27056__A _27122_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__26553__A1 _14398_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__25356__A2 _25363_/D VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_266_4102 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_42_4387 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 X_30176_ _30176_/Q _30387_/CLK _30176_/D VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__dfxtp_1 XANTENNA__29801__CLK _30460_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 X_19987_ VGND VPWR wire1321/X wire2308/X _24951_/B _19987_/X _25867_/A wire1376/A + VGND VPWR NF_sky130_fd_sc_hd__a41o_1 XFILLER_42_4398 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XFILLER_77_4406 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_3 XFILLER_190_1950 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_250_3994 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_8 XANTENNA__31091__CLK _32543_/CLK VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__23367__A1 _30345_/Q VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__19273__S _19273_/S VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA__15844__A2 wire1533/X VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XANTENNA_wire1730_A _14539_/B VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_81_2990 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_3401 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 XFILLER_266_4146 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 X_18938_ VGND VPWR _18938_/X _19357_/B _22088_/B1 _27900_/Q _18937_/X VGND VPWR NF_sky130_fd_sc_hd__a211o_1 XFILLER_4_4893 VPWR VGND VGND VPWR NF_sky130_fd_sc_hd__decap_6 XANTENNA__19035__A2 _19203_/A2 VGND VPWR VPWR VGND NF_sky130_fd_sc_hd__diode_2 XFILLER_211_3978 VGND VPWR VGND VPWR NF_sky130_ef_sc_hd__decap_12 .ends .subckt QJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB a_n80_n297# a_80_n200# w_n338_n497# + a_n138_n200# X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE a_n80_n297# a_80_n200# w_n338_n497# + a_n138_n200# X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC a_80_n200# a_n272_n422# a_n138_n200# + a_n80_n288# X0 a_80_n200# a_n80_n288# a_n138_n200# a_n272_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM a_80_n200# a_n272_n422# a_n138_n200# + a_n80_n288# X0 a_80_n200# a_n80_n288# a_n138_n200# a_n272_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_pr__cap_mim_m3_1_WRT4AW c1_n3036_n3000# m3_n3136_n3100# X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u .ends .subckt QJ_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV a_n792_n200# a_138_n297# a_n298_n297# + a_298_n200# a_356_n297# a_n516_n297# a_574_n297# a_516_n200# a_n734_n297# a_734_n200# + a_n80_n297# a_80_n200# a_n138_n200# a_n356_n200# a_n574_n200# w_n992_n497# X0 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X1 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X2 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X3 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X4 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X5 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X6 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG a_n80_n297# a_80_n200# w_n338_n497# + a_n138_n200# X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_pr__cap_mim_m3_2_W5U4AW c2_n3079_n3000# m4_n3179_n3100# X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u .ends .subckt QJ_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ a_n683_n200# a_n189_n297# a_29_n297# + a_189_n200# a_n901_n200# a_247_n297# a_n407_n297# a_465_n297# a_407_n200# a_n625_n297# + a_683_n297# a_625_n200# a_n843_n297# w_n1101_n497# a_843_n200# a_n29_n200# a_n247_n200# + a_n465_n200# X0 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X2 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X4 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X5 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X6 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X7 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt QJ_sky130_fd_sc_hvl__buf_8 VPWR VGND X A VNB VPB X0 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X2 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X3 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X4 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X5 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X6 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X8 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X9 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X10 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X12 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X14 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X15 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X16 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X18 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X19 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X20 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X21 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u .ends .subckt QJ_sky130_fd_sc_hvl__inv_8 VGND VPWR Y A VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X1 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X3 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X4 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X5 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X6 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X8 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X9 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X10 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X11 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X13 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u .ends .subckt QJ_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 a_n1806_2500# a_n4122_n2932# a_n5280_2500# + a_2054_n2932# a_896_n2932# a_4756_2500# a_3598_n2932# a_3212_2500# a_n3736_n2932# + a_1668_n2932# a_n1806_n2932# a_5142_n2932# a_896_2500# a_510_n2932# a_n3350_2500# + a_n4508_2500# a_3212_n2932# a_n4894_2500# a_n5410_n3062# a_1282_2500# a_4756_n2932# + a_2826_2500# a_2826_n2932# a_n2192_n2932# a_n1034_2500# a_n2578_2500# a_n1420_2500# + a_n2964_2500# a_n648_n2932# a_n648_2500# a_n5280_n2932# a_n3350_n2932# a_4370_2500# + a_1282_n2932# a_124_n2932# a_n1420_n2932# a_n4894_n2932# a_124_2500# a_n2964_n2932# + a_n4122_2500# a_2054_2500# a_510_2500# a_n4508_n2932# a_4370_n2932# a_3598_2500# + a_3984_2500# a_2440_n2932# a_2440_2500# a_3984_n2932# a_n2192_2500# a_n3736_2500# + a_1668_2500# a_n262_n2932# a_n262_2500# a_n1034_n2932# a_5142_2500# a_n2578_n2932# X0 a_n2578_n2932# a_n2578_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X1 a_n1420_n2932# a_n1420_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X2 a_n1806_n2932# a_n1806_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X3 a_3212_n2932# a_3212_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X4 a_3598_n2932# a_3598_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X5 a_n2964_n2932# a_n2964_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X6 a_2826_n2932# a_2826_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X7 a_4370_n2932# a_4370_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X8 a_3984_n2932# a_3984_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X9 a_n262_n2932# a_n262_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X10 a_n3350_n2932# a_n3350_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X11 a_n4122_n2932# a_n4122_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X12 a_n3736_n2932# a_n3736_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X13 a_5142_n2932# a_5142_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X14 a_n4894_n2932# a_n4894_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X15 a_1282_n2932# a_1282_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X16 a_4756_n2932# a_4756_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X17 a_124_n2932# a_124_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X18 a_510_n2932# a_510_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X19 a_896_n2932# a_896_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X20 a_n648_n2932# a_n648_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X21 a_n5280_n2932# a_n5280_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X22 a_n4508_n2932# a_n4508_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X23 a_n1034_n2932# a_n1034_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X24 a_n2192_n2932# a_n2192_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X25 a_2054_n2932# a_2054_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X26 a_1668_n2932# a_1668_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u X27 a_2440_n2932# a_2440_2500# a_n5410_n3062# sky130_fd_pr__res_xhigh_po w=690000u l=2.5e+07u .ends .subckt QJ_sky130_fd_sc_hvl__schmittbuf_1 X A VPWR VGND VNB VPB X0 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X1 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X2 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X3 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X4 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u X5 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u X6 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u X7 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X8 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X9 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u .ends .subckt QJ_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS a_n792_n200# a_298_n200# a_516_n200# + a_734_n200# a_n926_n422# a_138_n288# a_n298_n288# a_80_n200# a_356_n288# a_n516_n288# + a_574_n288# a_n734_n288# a_n138_n200# a_n356_n200# a_n574_n200# a_n80_n288# X0 a_80_n200# a_n80_n288# a_n138_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X1 a_n574_n200# a_n734_n288# a_n792_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X2 a_734_n200# a_574_n288# a_516_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X3 a_298_n200# a_138_n288# a_80_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X4 a_n138_n200# a_n298_n288# a_n356_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X5 a_n356_n200# a_n516_n288# a_n574_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u X6 a_516_n200# a_356_n288# a_298_n200# a_n926_n422# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u .ends .subckt simple_por vdd3v3 vdd1v8 porb_h por_l porb_l vss1v8 vss3v3 XQJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 m1_2756_6573# QJ_sky130_fd_sc_hvl__schmittbuf_1_0/A + vdd3v3 m1_6249_7690# QJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB XQJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 m1_185_6573# m1_721_6815# vdd3v3 m1_2993_7658# + QJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB XQJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 m1_2756_6573# m1_4283_8081# vdd3v3 m1_2756_6573# + QJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB XQJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 m1_185_6573# m1_502_7653# vdd3v3 m1_185_6573# + QJ_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB XQJ_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 m1_4283_8081# m1_6249_7690# vdd3v3 vdd3v3 + QJ_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE XQJ_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_0 m1_185_6573# vss3v3 vss3v3 li_2550_5813# + QJ_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC XQJ_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 m1_2756_6573# vss3v3 vss3v3 m1_721_6815# + QJ_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM XQJ_sky130_fd_pr__cap_mim_m3_1_WRT4AW_0 QJ_sky130_fd_sc_hvl__schmittbuf_1_0/A vss3v3 + QJ_sky130_fd_pr__cap_mim_m3_1_WRT4AW XQJ_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081# + m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081# + vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081# vdd3v3 QJ_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV XQJ_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 m1_502_7653# m1_2993_7658# vdd3v3 vdd3v3 + QJ_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG XQJ_sky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss3v3 QJ_sky130_fd_sc_hvl__schmittbuf_1_0/A + QJ_sky130_fd_pr__cap_mim_m3_2_W5U4AW XQJ_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# + vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# + m1_502_7653# vdd3v3 vdd3v3 vdd3v3 m1_502_7653# vdd3v3 QJ_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ XQJ_sky130_fd_sc_hvl__buf_8_0 vdd3v3 vss3v3 porb_h QJ_sky130_fd_sc_hvl__inv_8_0/A + vss3v3 vdd3v3 QJ_sky130_fd_sc_hvl__buf_8 XQJ_sky130_fd_sc_hvl__inv_8_0 vss1v8 vdd1v8 por_l QJ_sky130_fd_sc_hvl__inv_8_0/A vss1v8 + vdd1v8 QJ_sky130_fd_sc_hvl__inv_8 XQJ_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 li_3322_5813# li_1391_165# vss3v3 li_7567_165# + li_6023_165# vdd3v3 li_9111_165# li_8726_5813# li_1391_165# li_6795_165# li_3707_165# + vss3v3 li_6410_5813# li_6023_165# li_1778_5813# li_1006_5813# li_8339_165# vss3v3 + vss3v3 li_6410_5813# li_9883_165# li_7954_5813# li_8339_165# li_2935_165# li_4094_5813# + li_2550_5813# li_4094_5813# li_2550_5813# li_4479_165# li_4866_5813# vss3v3 li_2163_165# + li_9498_5813# li_6795_165# li_5251_165# li_3707_165# li_619_165# li_5638_5813# li_2163_165# + li_1006_5813# li_7182_5813# li_5638_5813# li_619_165# li_9883_165# li_8726_5813# + li_9498_5813# li_7567_165# li_7954_5813# li_9111_165# li_3322_5813# li_1778_5813# + li_7182_5813# li_5251_165# li_4866_5813# li_4479_165# vss3v3 li_2935_165# QJ_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 XQJ_sky130_fd_sc_hvl__schmittbuf_1_0 QJ_sky130_fd_sc_hvl__inv_8_0/A QJ_sky130_fd_sc_hvl__schmittbuf_1_0/A + vdd3v3 vss3v3 vss3v3 vdd3v3 QJ_sky130_fd_sc_hvl__schmittbuf_1 XQJ_sky130_fd_sc_hvl__buf_8_1 vdd1v8 vss1v8 porb_l QJ_sky130_fd_sc_hvl__inv_8_0/A + vss1v8 vdd1v8 QJ_sky130_fd_sc_hvl__buf_8 XQJ_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 m1_721_6815# vss3v3 m1_721_6815# vss3v3 + vss3v3 m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# + m1_721_6815# vss3v3 m1_721_6815# vss3v3 m1_721_6815# QJ_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS .ends .subckt sky130_fd_sc_hd__dfrtp_1 Q RESET_B D CLK VGND VPWR VNB VPB X0 a_1217_47# a_27_47# a_1108_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X1 a_805_47# a_761_289# a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_1108_47# a_193_47# a_761_289# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X3 a_1283_21# a_1108_47# a_1462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_651_413# a_27_47# a_543_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND RESET_B a_805_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 Q a_1283_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 a_448_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_761_289# a_543_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X10 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_1108_47# a_27_47# a_761_289# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_543_47# a_27_47# a_448_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X13 a_1462_47# RESET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_543_47# a_193_47# a_448_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_448_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 VPWR a_1283_21# a_1270_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VPWR a_1108_47# a_1283_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_1270_413# a_193_47# a_1108_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X20 a_1283_21# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 VPWR a_761_289# a_651_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 Q a_1283_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_639_47# a_193_47# a_543_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X24 VGND a_1283_21# a_1217_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 a_651_413# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 a_761_289# a_543_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u .ends .subckt sky130_fd_sc_hd__nor2_1 B Y A VGND VPWR VNB VPB X0 VPWR A a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_109_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nand2_1 Y B A VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A a_113_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_113_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__o21ai_1 VGND VPWR A2 A1 B1 Y VNB VPB X0 Y A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=700000u l=150000u X2 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nor3b_2 C_N Y A B VGND VPWR VNB VPB X0 a_281_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_531_21# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR C_N a_531_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_281_297# a_531_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y a_531_21# a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND C_N a_531_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_27_297# B a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y a_531_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__dfstp_2 Q D VPWR SET_B CLK VGND VNB VPB X0 VGND a_652_21# a_586_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_956_413# a_476_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_1136_413# a_193_47# a_1028_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR a_476_47# a_652_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_586_47# a_193_47# a_476_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X5 a_1228_47# a_27_47# a_1028_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X7 a_476_47# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X8 a_1056_47# a_476_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X10 a_652_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VPWR a_1602_47# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_562_413# a_27_47# a_476_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VGND a_1028_413# a_1602_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND a_1602_47# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Q a_1602_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_1028_413# a_193_47# a_1056_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_476_47# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 VPWR a_1028_413# a_1602_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR a_652_21# a_562_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 Q a_1602_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_1028_413# a_27_47# a_956_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 VPWR a_1178_261# a_1136_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X25 a_1178_261# a_1028_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X26 a_796_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 a_1300_47# a_1178_261# a_1228_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X29 a_1178_261# a_1028_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=540000u l=150000u X30 a_652_21# a_476_47# a_796_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X31 VPWR SET_B a_1028_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X32 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X33 VGND SET_B a_1300_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nand2b_1 Y A_N B VGND VPWR VNB VPB X0 VGND A_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 Y a_27_93# a_206_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_206_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_93# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nand4bb_1 C D A_N Y B_N VPWR VGND VNB VPB X0 VGND B_N a_27_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_496_21# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 Y a_496_21# a_426_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_496_21# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_426_47# a_27_93# a_326_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B_N a_27_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_496_21# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 Y a_27_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_218_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_326_47# C a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__dfstp_1 D VPWR Q SET_B CLK VGND VNB VPB X0 VGND a_652_21# a_586_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_956_413# a_476_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VPWR a_476_47# a_652_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_586_47# a_193_47# a_476_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X4 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X5 a_476_47# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X6 a_1056_47# a_476_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X8 a_652_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_1224_47# a_27_47# a_1032_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_562_413# a_27_47# a_476_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND a_1032_413# a_1602_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 VPWR a_1182_261# a_1140_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 Q a_1602_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_1032_413# a_193_47# a_1056_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_476_47# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 a_1296_47# a_1182_261# a_1224_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 VPWR a_652_21# a_562_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 VPWR SET_B a_1032_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 a_1032_413# a_27_47# a_956_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 a_1182_261# a_1032_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X22 Q a_1602_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X24 a_1140_413# a_193_47# a_1032_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 VPWR a_1032_413# a_1602_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X26 a_796_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X28 a_1182_261# a_1032_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=540000u l=150000u X29 a_652_21# a_476_47# a_796_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X30 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X31 VGND SET_B a_1296_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__mux2_1 VGND VPWR S A1 A0 X VNB VPB X0 VPWR a_505_21# a_535_374# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_505_21# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_218_374# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND a_505_21# a_439_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_76_199# A0 a_218_374# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_505_21# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_439_47# A0 a_76_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_535_374# A1 a_76_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_76_199# A1 a_218_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_218_47# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_76_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_76_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o21a_1 X A1 B1 A2 VGND VPWR VNB VPB X0 VPWR A1 a_382_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_297_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_297_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_382_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o2bb2ai_1 Y A1_N A2_N B2 B1 VGND VPWR VNB VPB X0 VPWR A2_N a_112_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y a_112_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND B2 a_394_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_112_297# A2_N a_112_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_112_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_112_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR B1 a_478_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_394_47# a_112_297# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_394_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_478_297# B2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nor3_1 C Y A B VGND VPWR VNB VPB X0 VPWR A a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_193_297# B a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_109_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__buf_12 A X VGND VPWR VNB VPB X0 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VPWR A a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND A a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_109_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_109_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a21oi_1 A1 B1 Y A2 VPWR VGND VNB VPB X0 a_199_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_113_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A1 a_113_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_113_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_199_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__xnor2_1 VGND VPWR B Y A VNB VPB X0 a_377_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_47_47# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_129_47# B a_47_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_285_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y a_47_47# a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A a_129_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A a_47_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_47_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y B a_377_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_285_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o2111ai_2 A1 A2 B1 C1 D1 Y VPWR VGND VNB VPB X0 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_298_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A1 a_497_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_664_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A2 a_497_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_298_47# B1 a_497_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_497_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y D1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_497_47# B1 a_298_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y A2 a_664_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_27_47# C1 a_298_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_47# D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_497_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A1 a_664_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_664_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__o31ai_2 A1 Y B1 A3 A2 VGND VPWR VNB VPB X0 a_281_297# A3 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_281_297# A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_47# B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A3 a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_297# A2 a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__and2_1 VPWR VGND X B A VNB VPB X0 VPWR B a_59_75# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_59_75# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND B a_145_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_59_75# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 X a_59_75# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_145_75# A a_59_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__a41oi_1 VGND VPWR A4 Y B1 A1 A2 A3 VNB VPB X0 a_236_47# A4 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_428_47# A2 a_336_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A1 a_428_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_336_47# A3 a_236_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR A4 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__clkinv_4 A Y VPWR VGND VNB VPB X0 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__dfrtn_1 CLK_N Q RESET_B D VGND VPWR VNB VPB X0 a_1217_47# a_193_47# a_1108_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X1 a_805_47# a_761_289# a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_1108_47# a_27_47# a_761_289# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X3 a_1283_21# a_1108_47# a_1462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_651_413# a_193_47# a_543_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND RESET_B a_805_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 Q a_1283_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR CLK_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 a_448_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_761_289# a_543_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X10 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_1108_47# a_193_47# a_761_289# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_543_47# a_193_47# a_448_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X13 a_1462_47# RESET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_543_47# a_27_47# a_448_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_448_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 VPWR a_1283_21# a_1270_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VPWR a_1108_47# a_1283_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_1270_413# a_27_47# a_1108_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X20 a_1283_21# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 VPWR a_761_289# a_651_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X22 Q a_1283_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_639_47# a_27_47# a_543_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X24 VGND a_1283_21# a_1217_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 a_651_413# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 VGND CLK_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 a_761_289# a_543_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u .ends .subckt sky130_fd_sc_hd__inv_4 Y A VPWR VGND VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o2111ai_1 D1 C1 A2 A1 B1 Y VGND VPWR VNB VPB X0 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_235_47# C1 a_163_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_343_47# B1 a_235_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_454_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_454_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_163_47# D1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND A2 a_343_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_343_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__clkbuf_4 X A VGND VPWR VNB VPB X0 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nand3_1 Y A C B VGND VPWR VNB VPB X0 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_193_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o31a_1 X A2 B1 A1 A3 VGND VPWR VNB VPB X0 a_103_199# B1 a_253_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR a_103_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_337_297# A2 a_253_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_103_199# A3 a_337_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_253_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B1 a_103_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_103_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_253_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_253_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND A2 a_253_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nor3_2 C Y A B VGND VPWR VNB VPB X0 Y C a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_281_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_281_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_297# B a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__dlymetal6s2s_1 VPWR VGND A X VNB VPB X0 a_558_47# a_381_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND X a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_841_47# a_664_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A a_62_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A a_62_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_558_47# a_381_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_62_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR X a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_841_47# a_664_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_62_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_558_47# a_664_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND a_558_47# a_664_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o21bai_1 A1 Y B1_N A2 VPWR VGND VNB VPB X0 a_388_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_105_352# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_297_47# a_105_352# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_297_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_388_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR B1_N a_105_352# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 Y a_105_352# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__buf_4 VPWR VGND X A VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__dfxtp_1 Q CLK D VPWR VGND VNB VPB X0 Q a_1059_315# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_891_413# a_193_47# a_634_159# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X2 a_561_413# a_27_47# a_466_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X4 Q a_1059_315# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND a_634_159# a_592_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR a_891_413# a_1059_315# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_466_413# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VPWR a_634_159# a_561_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_634_159# a_466_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X11 a_634_159# a_466_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=750000u l=150000u X12 a_975_413# a_193_47# a_891_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 VGND a_1059_315# a_1017_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_891_413# a_27_47# a_634_159# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X16 a_592_47# a_193_47# a_466_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X17 a_1017_47# a_27_47# a_891_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X18 VPWR a_1059_315# a_975_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_466_413# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X20 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X21 VGND a_891_413# a_1059_315# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nand3b_1 B C A_N Y VGND VPWR VNB VPB X0 Y a_53_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_232_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A_N a_53_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A_N a_53_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_316_47# B a_232_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y a_53_93# a_316_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a31o_1 A2 B1 A1 A3 X VGND VPWR VNB VPB X0 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_209_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_303_47# A2 a_209_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_209_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND B1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_80_21# A1 a_303_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_209_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_80_21# B1 a_209_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_209_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__o22a_1 A2 X B1 A1 B2 VGND VPWR VNB VPB X0 a_78_199# B1 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VPWR A1 a_493_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_493_297# A2 a_78_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_78_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A2 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_78_199# B2 a_292_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_215_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_215_47# B2 a_78_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_292_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_78_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o31ai_1 Y A2 A1 A3 B1 VPWR VGND VNB VPB X0 Y B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y A3 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_193_297# A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o211ai_4 A1 B1 A2 C1 Y VGND VPWR VNB VPB X0 VPWR A1 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A2 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_806_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_110_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_110_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_110_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# B1 a_1314_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y A2 a_110_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_27_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y C1 a_978_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 Y C1 a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_27_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_27_47# B1 a_806_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_110_297# A2 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 a_806_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 a_978_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_1314_47# C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 Y C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 Y B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a21o_1 A2 A1 B1 X VPWR VGND VNB VPB X0 a_81_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_299_297# B1 a_81_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR a_81_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A1 a_299_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_81_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_384_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_299_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_384_47# A1 a_81_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nor4_1 D C Y A B VGND VPWR VNB VPB X0 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_191_297# C a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_297_297# B a_191_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a2bb2o_1 VGND VPWR B1 A1_N A2_N X B2 VNB VPB X0 a_226_47# A2_N a_226_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_489_413# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_226_297# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR B2 a_489_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_489_413# a_226_47# a_76_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_76_199# a_226_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND B1 a_556_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_556_47# B2 a_76_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND A2_N a_226_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_226_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_76_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_76_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt caravel_clocking core_clk ext_clk ext_clk_sel ext_reset pll_clk pll_clk90 + resetb resetb_sync sel2[0] sel2[1] sel2[2] sel[0] sel[1] sel[2] user_clk VPWR VGND XFILLER_26_30 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_432_ _432_/Q _372_/S _432_/D _204_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_294_ _430_/Q _294_/Y _429_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_363_ _363_/Y _429_/Q _365_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_8_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_415_ _415_/Q _372_/S _440_/Q _204_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_346_ VGND VPWR _292_/Y _416_/D _419_/Q _347_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 X_277_ _421_/Q _277_/Y _422_/Q _423_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3b_2 XFILLER_23_53 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_22 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_79 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_329_ _329_/B _329_/Y _329_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_6_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_1_1__f__037_ _208_/A0 clkbuf_0__037_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_431_ _431_/Q _431_/D VPWR _372_/S _204_/A1 VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_13_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_293_ _293_/Y _223_/S _365_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_9_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_362_ VGND VPWR _293_/Y _295_/C _361_/Y _428_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 XANTENNA__265__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_12_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_104 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_345_ _345_/C _431_/Q _311_/C _347_/A _419_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4bb_1 X_414_ _414_/D VPWR _414_/Q fanout27/X _207_/A1 VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_276_ VGND VPWR _360_/S _210_/X _426_/Q _426_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_9_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_328_ _329_/B _442_/D _327_/A _441_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_0_58 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_0_14 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA__395__B1 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_29_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_29_20 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_20_88 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_20_55 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_22_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_292_ _292_/Y _345_/C _431_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_13_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_430_ _430_/Q fanout26/X _430_/D _456_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_361_ VGND VPWR _280_/X _223_/S _219_/X _361_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 X_413_ _413_/Q _372_/S _413_/D _204_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_344_ VGND VPWR _342_/Y _414_/Q _343_/Y _414_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 X_275_ _447_/D _232_/X _273_/Y _234_/S _274_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o2bb2ai_1 XFILLER_5_131 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_258_ _258_/A _258_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_9_79 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_327_ _441_/D _329_/A _327_/A _442_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XANTENNA__452__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_6_14 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput11 _341_/Y resetb_sync VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_16_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_291_ _433_/Q _345_/C _432_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_26_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_360_ VGND VPWR _360_/S _211_/X _427_/Q _427_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_12_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_24 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_412_ _413_/D fanout26/X _412_/D _456_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_343_ _342_/Y _234_/S _343_/Y _414_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_274_ _274_/Y _447_/Q _385_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_5_143 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_23 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_29_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_58 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_9_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_326_ VGND VPWR _450_/Q _326_/Y _451_/Q VGND VPWR sky130_fd_sc_hd__xnor2_1 X_257_ _257_/A _257_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_18_56 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA__395__A2 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_309_ VGND VPWR _311_/C _309_/Y _311_/B VGND VPWR sky130_fd_sc_hd__xnor2_1 Xclkbuf_0_divider.out clkbuf_0_divider.out/X _304_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_6_26 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_131 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_79 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_170 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_input8_A sel[1] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_7_91 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_290_ _422_/D _215_/X _288_/Y _219_/S _289_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o2bb2ai_1 Xclkbuf_0_pll_clk clkbuf_0_pll_clk/X pll_clk VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_12_192 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_118 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_411_ _411_/D VPWR _411_/Q _372_/S _411_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_273_ _273_/Y _234_/S _385_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_342_ _327_/A _442_/D _441_/D _453_/Q _299_/Y _342_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__o2111ai_2 XANTENNA__446__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_23_79 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_325_ VGND VPWR _441_/D _325_/Y _442_/D VGND VPWR sky130_fd_sc_hd__xnor2_1 X_308_ _307_/Y _308_/Y _305_/Y _306_/X _298_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o31ai_2 XFILLER_1_60 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_239_ VGND VPWR _300_/Y _327_/A _339_/Y _239_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_165 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_31_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__451__SET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_31_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_135 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_1_0__f_pll_clk90 _455_/CLK clkbuf_0_pll_clk90/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_12_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_341_ _409_/Q _341_/Y _341_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_410_ _411_/Q VPWR _410_/Q _372_/S _410_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_272_ _263_/Y _234_/S _272_/Y _265_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_4_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_324_ VGND VPWR _431_/Q _324_/Y _432_/Q VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_9_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_255_ _255_/A _255_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_18_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_36 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_1_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_307_ _414_/Q _307_/Y _449_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_238_ VGND VPWR _240_/S _442_/D _237_/X _238_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_340_ VGND VPWR _457_/Q _340_/Y _458_/Q VGND VPWR sky130_fd_sc_hd__xnor2_1 X_271_ _449_/D _271_/B _271_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_5_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_5_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_23_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_4_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__455__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_9_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_323_ _323_/Y _321_/Y _323_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_2_105 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA__240__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_306_ VPWR VGND _306_/X _414_/Q _449_/Q VGND VPWR sky130_fd_sc_hd__and2_1 X_237_ VGND VPWR _300_/Y _442_/D _336_/Y _237_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_20_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_167 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_19_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA__213__A1 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_15_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_126 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_118 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_input6_A sel2[2] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_270_ VGND VPWR _243_/Y _271_/B _234_/S _262_/Y _263_/Y _265_/X VGND VPWR sky130_fd_sc_hd__a41oi_1 X_399_ VGND VPWR _400_/A _458_/Q _242_/X _458_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_4_40 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_322_ VGND VPWR _429_/Q _428_/Q _430_/Q _323_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_2_139 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_1_0__f_net10 core_clk clkbuf_0_net10/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_1_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_253_ _253_/A _412_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_4 X_305_ _305_/B _305_/Y _441_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 X_236_ VGND VPWR _240_/S _441_/D _235_/X _236_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_1_41 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_fanout27_A fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_19_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_219_ VGND VPWR _219_/S _311_/C _218_/X _219_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XANTENNA_clkbuf_0_pll_clk_A pll_clk VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_30_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_112 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_398_ VGND VPWR _400_/A _457_/Q _241_/X _457_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_4_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_252_ _453_/Q _300_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_4 XFILLER_1_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_321_ _430_/Q _321_/Y _428_/Q _429_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_304_ _303_/Y _304_/Y _301_/Y _302_/X _365_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o31ai_2 X_235_ VGND VPWR _300_/Y _441_/D _300_/C _235_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_32_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_191 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_218_ VGND VPWR _295_/Y _311_/C _295_/C _218_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xuser_clk_out_buffer user_clk _208_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_21_186 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_105 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_397_ VGND VPWR _395_/Y _456_/Q _396_/Y _456_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 X_251_ _251_/Y _446_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 X_320_ VGND VPWR _429_/Q _320_/Y _428_/Q VGND VPWR sky130_fd_sc_hd__xnor2_1 X_449_ _449_/D VPWR _449_/Q fanout27/X _449_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XANTENNA__234__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xclkbuf_1_1__f_divider.out _206_/A1 clkbuf_0_divider.out/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_303_ _456_/Q _303_/Y _424_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_234_ VGND VPWR _234_/S _327_/A _233_/X _260_/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_1_87 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_217_ VGND VPWR _223_/S _351_/A _216_/X _257_/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_18_170 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_118 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__328__B1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_465_ _465_/Q fanout27/X _465_/D _208_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_396_ _395_/Y _223_/S _396_/Y _456_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 Xfanout20 _437_/Q _416_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XANTENNA_input4_A sel2[0] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_13_63 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_250_ _450_/Q _250_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_1_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_379_ _443_/Q _379_/Y _465_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_448_ _455_/CLK _448_/Q fanout28/X _448_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XFILLER_24_40 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_302_ VPWR VGND _302_/X _456_/Q _424_/Q VGND VPWR sky130_fd_sc_hd__and2_1 X_233_ VGND VPWR _262_/Y _327_/A _335_/Y _233_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_1_99 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_216_ VGND VPWR _277_/Y _351_/A _319_/Y _216_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_21_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__282__B1 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_12_133 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_259__1 _447_/CLK _455_/CLK VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 X_464_ _464_/D VPWR _464_/Q fanout27/X _464_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_395_ _294_/Y _428_/Q _311_/B _351_/A _311_/C _395_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o2111ai_1 XFILLER_4_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xfanout21 _240_/S _234_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 X_447_ _447_/D VPWR _447_/Q fanout28/X _447_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_378_ _378_/Y _378_/A _441_/Q _378_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_1_176 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_1_110 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_301_ _301_/B _301_/Y _416_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 XFILLER_24_52 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_232_ VGND VPWR _234_/S _442_/D _231_/X _232_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_1_0__f__037_ _206_/A0 clkbuf_0__037_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_28_139 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_32 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_215_ VGND VPWR _219_/S _311_/B _214_/X _215_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_16_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_6 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_30_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_463_ _463_/Q fanout27/X _463_/D _464_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_394_ _455_/D _455_/Q _393_/Y _240_/S _265_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_1 Xfanout22 _234_/S _445_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xclkbuf_1_1__f_pll_clk90 _207_/A1 clkbuf_0_pll_clk90/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_377_ _378_/B _442_/Q _464_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_446_ _455_/CLK _446_/Q fanout28/X _446_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XFILLER_8_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA__219__A1 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_406__6 _426_/CLK _204_/A1 VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 Xclkbuf_0_ext_clk clkbuf_0_ext_clk/X ext_clk VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_231_ VGND VPWR _262_/Y _442_/D _332_/Y _231_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_300_ _300_/C _300_/Y _454_/Q _455_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 X_429_ _429_/Q _429_/D VPWR fanout26/X _456_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_19_20 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_88 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_10_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput1 VPWR VGND ext_clk_sel _253_/A VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_18_140 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_214_ VGND VPWR _277_/Y _311_/B _316_/Y _214_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_24_165 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_7 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_23_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__282__A2 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_32_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_462_ _465_/D fanout27/X _462_/D _208_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_27_53 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_393_ _240_/S _393_/Y _240_/X _265_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__o21bai_1 Xfanout23 _219_/S _223_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 X_445_ _445_/Q fanout28/X _445_/D _207_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_376_ _378_/A _464_/Q _442_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_256__4 _422_/CLK _456_/CLK VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 XANTENNA_input2_A ext_reset VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_230_ VGND VPWR _234_/S _441_/D _229_/X _258_/A VGND VPWR sky130_fd_sc_hd__mux2_1 X_359_ VGND VPWR _360_/S _209_/X _425_/Q _425_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_428_ _428_/Q fanout26/X _428_/D _456_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 Xinput2 VGND VPWR _341_/A ext_reset VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_27_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_213_ VGND VPWR _219_/S _311_/C _212_/X _255_/A VGND VPWR sky130_fd_sc_hd__mux2_1 X_403__8 _410_/CLK _403__8/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 XFILLER_18_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_24_144 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_188 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_8 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_79 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_0_net10 clkbuf_0_net10/X _206_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_21_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_66 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_32 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_7_173 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_7_195 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_461_ _461_/D VPWR _464_/D fanout27/X _464_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_392_ _454_/D _454_/Q _391_/Y _240_/S _265_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_1 XFILLER_4_14 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout13 VPWR VGND _327_/A _465_/Q VGND VPWR sky130_fd_sc_hd__buf_4 Xfanout24 _223_/S _420_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 XFILLER_1_157 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_444_ _444_/D VPWR _444_/Q fanout27/X _207_/A1 VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_375_ _444_/D _375_/B _375_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_24_66 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_427_ _456_/CLK _427_/Q fanout26/X _427_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XFILLER_1_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_358_ VGND VPWR _287_/Y _257_/Y _357_/Y _423_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 Xinput3 VGND VPWR input3/X resetb VGND VPWR sky130_fd_sc_hd__clkbuf_1 XANTENNA__327__A _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_289_ _289_/Y _422_/Q _357_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_212_ VGND VPWR _277_/Y _311_/C _247_/Y _212_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XANTENNA__267__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_411__30 _411_/D _411__30/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XANTENNA__445__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_32_66 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_148 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_460_ _463_/D fanout27/X _460_/D _464_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_391_ _240_/S _391_/Y _238_/X _265_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__o21bai_1 XFILLER_4_26 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_144 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout25 VPWR VGND _372_/S fanout29/X VGND VPWR sky130_fd_sc_hd__buf_4 Xfanout14 VPWR VGND _442_/D _464_/Q VGND VPWR sky130_fd_sc_hd__buf_4 X_374_ VGND VPWR _297_/Y _400_/A _444_/Q _375_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 X_443_ _443_/Q _207_/A1 _465_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_0_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput4 VGND VPWR _460_/D sel2[0] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_426_ _426_/D VPWR _426_/Q fanout26/X _426_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_288_ _288_/Y _219_/S _357_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_357_ _357_/B _423_/Q _219_/S _357_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_1 X_211_ VGND VPWR _223_/S _313_/B _315_/X _211_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_10_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_10_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_409_ _410_/Q VPWR _409_/Q fanout27/X _409_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_24_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_21_116 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_105 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_390_ VGND VPWR _298_/Y _300_/C _389_/Y _453_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_4_156 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xfanout15 VPWR VGND _441_/D _463_/Q VGND VPWR sky130_fd_sc_hd__buf_4 Xclkbuf_1_1__f_pll_clk _204_/A1 clkbuf_0_pll_clk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xfanout26 VPWR VGND fanout26/X fanout29/X VGND VPWR sky130_fd_sc_hd__buf_4 X_373_ _373_/C _457_/Q _400_/A _375_/A _444_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4bb_1 XANTENNA__312__A1 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_442_ _442_/Q _455_/CLK _442_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_0_170 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA__345__A_N _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__447__SET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xinput5 VGND VPWR _461_/D sel2[1] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_425_ _456_/CLK _425_/Q fanout26/X _425_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_287_ _278_/Y _219_/S _287_/Y _280_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_356_ VGND VPWR _287_/Y _255_/Y _355_/Y _421_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_19_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_35 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_210_ VGND VPWR _223_/S _313_/Y _310_/Y _210_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_1_0__f_divider2.out _464_/CLK clkbuf_0_divider2.out/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_16 X_339_ _339_/Y _337_/Y _339_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_2_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_30_139 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__264__A _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_15_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_38 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_139 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_14_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout16 _463_/Q _400_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xfanout27 VPWR VGND fanout27/X fanout28/X VGND VPWR sky130_fd_sc_hd__buf_4 X_372_ VGND VPWR _372_/S _372_/A1 _440_/Q _440_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_441_ _441_/Q _455_/CLK _441_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_13_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__312__A2 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_24_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_424_ _424_/D VPWR _424_/Q fanout26/X _424_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_286_ _424_/D _286_/B _286_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_355_ _357_/B _421_/Q _219_/S _355_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_1 Xinput6 VGND VPWR _462_/D sel2[2] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XANTENNA__221__A1 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__212__A1 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_269_ _263_/Y _243_/Y _262_/Y _265_/X _271_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 X_338_ VGND VPWR _453_/Q _454_/Q _455_/Q _339_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_32_170 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_26 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_0__037_ clkbuf_0__037_/X _205_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_4_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout28 VPWR VGND fanout28/X fanout29/X VGND VPWR sky130_fd_sc_hd__buf_4 X_371_ _433_/D _369_/Y _371_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_440_ _440_/Q _204_/A1 _440_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 Xfanout17 VPWR VGND _351_/A _439_/Q VGND VPWR sky130_fd_sc_hd__buf_4 XFILLER_0_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_354_ _280_/X _420_/D _352_/Y _223_/S _353_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_14_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_285_ VGND VPWR _244_/Y _286_/B _223_/S _277_/Y _278_/Y _280_/X VGND VPWR sky130_fd_sc_hd__a41oi_1 X_423_ _456_/CLK _423_/Q fanout26/X _423_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XANTENNA__448__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xinput7 VGND VPWR _434_/D sel[0] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_4_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_190 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_268_ _385_/B _268_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_337_ _455_/Q _337_/Y _454_/Q _453_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XANTENNA_clkbuf_0_pll_clk90_A pll_clk90 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_15_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_138 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_1_0__f_divider.out _439_/CLK clkbuf_0_divider.out/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_11_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__342__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 Xfanout29 VPWR VGND fanout29/X input3/X VGND VPWR sky130_fd_sc_hd__buf_2 Xfanout18 VPWR VGND _311_/B _438_/Q VGND VPWR sky130_fd_sc_hd__buf_4 X_370_ _371_/B _432_/Q _416_/D _431_/Q _433_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o31ai_1 XANTENNA__242__A0 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_353_ _353_/Y _353_/A _416_/Q _353_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_284_ _278_/Y _244_/Y _277_/Y _280_/X _286_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 X_422_ _422_/D VPWR _422_/Q fanout26/X _422_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 Xclkbuf_1_0__f_pll_clk _456_/CLK clkbuf_0_pll_clk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xinput8 VGND VPWR _435_/D sel[1] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_19_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_18_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_267_ _327_/A _441_/D _442_/D _263_/Y _385_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o211ai_4 X_336_ VGND VPWR _453_/Q _336_/Y _454_/Q VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_32_183 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_191 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_319_ _319_/Y _317_/Y _319_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_11_131 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_190 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout19 VPWR VGND _311_/C _437_/Q VGND VPWR sky130_fd_sc_hd__buf_4 XFILLER_12_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_input9_A sel[2] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_0_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__233__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA__215__A1 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_421_ _456_/CLK _421_/Q fanout26/X _421_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_352_ VGND VPWR _351_/X _350_/Y _280_/X _352_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 Xinput9 VGND VPWR _436_/D sel[2] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_283_ _357_/B _283_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_407__2 _449_/CLK _207_/A1 VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 XPHY_60 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_266_ _400_/A _298_/B _464_/Q _327_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 XFILLER_18_104 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_335_ _335_/Y _333_/Y _335_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_24_118 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_195 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_249_ _249_/Y _457_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 X_318_ VGND VPWR _421_/Q _422_/Q _423_/Q _319_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_22_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_6_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_172 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_194 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_0_divider2.out clkbuf_0_divider2.out/X _308_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_0_131 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_24_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_351_ VPWR VGND _351_/X _418_/Q _351_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_420_ _420_/Q _372_/S _420_/D _204_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_282_ _351_/A _311_/C _311_/B _278_/Y _357_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o211ai_4 XFILLER_27_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_61 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_334_ VGND VPWR _446_/Q _447_/Q _448_/Q _335_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 X_265_ _327_/A _441_/D _442_/D _265_/X VGND VPWR VGND VPWR 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VGND VPWR sky130_fd_sc_hd__decap_3 X_263_ _452_/Q _263_/Y _451_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_11_65 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__281__A2 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_20_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_315_ _278_/Y _246_/Y _314_/X _315_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_246_ _425_/Q _246_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_11_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__454__SET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_22_86 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_229_ VGND VPWR _262_/Y _441_/D _251_/Y _229_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XANTENNA__450__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_17_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_64 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_1_1__f_ext_clk _205_/A0 clkbuf_0_ext_clk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XPHY_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_400_ _459_/Q _457_/Q _400_/Y _400_/A _458_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_25_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_262_ _446_/Q _262_/Y _447_/Q _448_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3b_2 XPHY_31 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_20 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_9 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_331_ _263_/Y _250_/Y _330_/X _331_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_32_144 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_174 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_245_ _245_/Y _431_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_14_166 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_314_ _314_/X _426_/Q _427_/Q _425_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_0_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA__309__A _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_228_ VGND VPWR _240_/S _329_/B _331_/X _228_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_6_140 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__311__B _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_0_157 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_5_79 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_65 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_54 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_43 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_32 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_330_ _330_/X _451_/Q _452_/Q _450_/Q VGND VPWR VGND VPWR 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VGND VPWR sky130_fd_sc_hd__mux2_1 XANTENNA__239__A1 _327_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_6_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__311__C _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_28_87 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_55 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA_input5_A sel2[1] VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XPHY_44 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_33 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_260_ _260_/A _260_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XPHY_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_11 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_32_157 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_458_ _458_/Q fanout27/X _458_/D _207_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_17_143 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_389_ VGND VPWR _265_/X _234_/S _236_/X _389_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 X_243_ _449_/Q _243_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_4 X_312_ _313_/B _311_/B _351_/A _311_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_404__9 _411_/CLK core_clk VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 XFILLER_20_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_226_ VGND VPWR _240_/S _325_/Y _250_/Y _226_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_209_ VGND VPWR _219_/S _309_/Y _246_/Y _209_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_32_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_56 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_34 VPWR VGND VGND VPWR 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sky130_fd_sc_hd__decap_3 X_456_ _456_/D VPWR _456_/Q fanout26/X _456_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_387_ VGND VPWR _388_/S _226_/X _450_/Q _450_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_310_ VGND VPWR _425_/Q _310_/Y _426_/Q VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_14_104 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_241_ VGND VPWR _297_/Y _249_/Y _442_/D _241_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_22_170 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_439_ _439_/Q fanout29/X _439_/D _439_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_9_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_14 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_224_ VGND VPWR _292_/Y _245_/Y _438_/Q _224_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_10_162 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_140 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_207_ VGND VPWR _264_/Y _207_/A1 _444_/Q _305_/B VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_24_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_24 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_26 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_58 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_36 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_17_157 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_91 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_386_ VGND VPWR _272_/Y _260_/Y _385_/Y _448_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 X_455_ _455_/Q fanout28/X _455_/D _455_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XANTENNA_input3_A resetb VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_31_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_23_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_240_ VGND VPWR _240_/S _327_/A _239_/X _240_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_369_ _433_/Q _431_/Q _369_/Y _416_/D _432_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_438_ _438_/D VPWR _438_/Q fanout29/X _206_/A1 VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_13_171 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_22_26 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_223_ VGND VPWR _223_/S _351_/A _222_/X _223_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_10_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_206_ VGND VPWR _413_/Q _206_/A1 _206_/A0 _206_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_17_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_118 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_40 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_59 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_48 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_26 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__434__D _434_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_17_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_385_ _385_/B _448_/Q _234_/S _385_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_1 X_454_ _454_/Q _454_/D VPWR fanout28/X _455_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_368_ VGND VPWR _416_/D _432_/Q _225_/X _432_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_437_ _437_/Q fanout29/X _437_/D _206_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_299_ _455_/Q _299_/Y _454_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_12_60 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_222_ VGND VPWR _295_/Y _351_/A _323_/Y _222_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_6_102 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_205_ VGND VPWR _413_/D _415_/Q _205_/A0 _205_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_3_105 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_0_pll_clk90 clkbuf_0_pll_clk90/X pll_clk90 VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_18_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_29_178 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA__214__A1 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_25_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_38 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_16 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_51 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_384_ VGND VPWR _272_/Y _258_/Y _383_/Y _446_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 X_453_ _453_/Q fanout28/X _453_/D _455_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_16_170 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_clkbuf_0_ext_clk_A ext_clk VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_22_140 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_367_ VGND VPWR _416_/D _431_/Q _224_/X _431_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XANTENNA__279__B _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_436_ _439_/D fanout29/X _436_/D _439_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_298_ _298_/Y _240_/S _298_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_3_30 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_96 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_10_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_221_ VGND VPWR _223_/S _311_/B _220_/X _221_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_6_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_419_ _419_/D VPWR _419_/Q _372_/S _204_/A1 VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_5_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_204_ VGND VPWR _279_/Y _204_/A1 _419_/Q _301_/B VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_3_117 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_1_1__f_net10 _403__8/A clkbuf_0_net10/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XPHY_28 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_17_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_383_ _385_/B _446_/Q _234_/S _383_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_1 X_452_ _455_/CLK _452_/Q fanout28/X _452_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XFILLER_31_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_182 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_297_ _297_/Y _373_/C _457_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_435_ _435_/D VPWR _438_/D _372_/S _439_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_366_ VGND VPWR _293_/Y _219_/S _365_/Y _430_/D _223_/X VGND VPWR sky130_fd_sc_hd__a2bb2o_1 XANTENNA__280__B1 _311_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_3_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_3_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_84 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_input1_A ext_clk_sel VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_220_ VGND VPWR _295_/Y _311_/B _320_/Y _220_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_6_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_418_ _418_/Q _204_/A1 _439_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_349_ _353_/B _417_/Q _438_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_23_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_203_ VGND VPWR _268_/Y _240_/S _298_/Y _388_/S VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_0_98 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_20_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_18 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_382_ _265_/X _445_/D _378_/Y _445_/Q _381_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_451_ _451_/D VPWR _451_/Q fanout28/X _451_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_408__3 _451_/CLK _455_/CLK VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 X_296_ _459_/Q _373_/C _458_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_434_ _437_/D _372_/S _434_/D _206_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_13_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_131 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_365_ _365_/Y _430_/Q _365_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_9_157 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_279_ _311_/B _279_/Y _439_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_417_ _417_/Q _204_/A1 _438_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_348_ _353_/A _438_/Q _417_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_5_160 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_202_ VGND VPWR _283_/Y _219_/S _293_/Y _360_/S VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_2_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_0_66 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_28_181 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_10 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_19 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_381_ VGND VPWR _380_/X _379_/Y _265_/X _381_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 X_450_ _455_/CLK _450_/Q fanout28/X _450_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_433_ _433_/Q _372_/S _433_/D _204_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_26_62 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA__280__A2 _311_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_364_ VGND VPWR _293_/Y _219_/S _363_/Y _429_/D _221_/X VGND VPWR sky130_fd_sc_hd__a2bb2o_1 X_295_ _295_/C _295_/Y _429_/Q _430_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 X_347_ _419_/D _347_/B _347_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XANTENNA__459__RESET_B fanout28/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_416_ _416_/Q _204_/A1 _416_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_278_ _427_/Q _278_/Y _426_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_5_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_128 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_405__5 _424_/CLK _456_/CLK VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_4 XFILLER_29_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_6_66 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_174 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_380_ VPWR VGND _380_/X _443_/Q _465_/Q VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_16_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 .ends .subckt gpio_defaults_block_1803 VPWR gpio_defaults[0] gpio_defaults[10] gpio_defaults[11] + gpio_defaults[12] gpio_defaults[1] gpio_defaults[2] gpio_defaults[3] gpio_defaults[4] + gpio_defaults[5] gpio_defaults[6] gpio_defaults[7] gpio_defaults[8] gpio_defaults[9] + VGND Xgpio_default_value\[8\] gpio_defaults[8] gpio_default_value\[8\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[6\] gpio_defaults[6] gpio_default_value\[6\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[4\] gpio_defaults[4] gpio_default_value\[4\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[2\] gpio_defaults[2] gpio_default_value\[2\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xgpio_default_value\[12\] gpio_default_value\[12\]/LO gpio_defaults[12] VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[0\] gpio_default_value\[0\]/LO gpio_defaults[0] VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[10\] gpio_defaults[10] gpio_default_value\[10\]/HI VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[9\] gpio_defaults[9] gpio_default_value\[9\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_2_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[7\] gpio_defaults[7] gpio_default_value\[7\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[5\] gpio_defaults[5] gpio_default_value\[5\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_2_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[3\] gpio_defaults[3] gpio_default_value\[3\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[1\] gpio_default_value\[1\]/LO gpio_defaults[1] VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[11\] gpio_default_value\[11\]/LO gpio_defaults[11] VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 .ends .subckt sky130_fd_sc_hd__dfbbp_1 RESET_B VGND CLK SET_B Q VPWR D Q_N VNB VPB X0 a_788_47# a_942_21# a_648_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X1 VPWR RESET_B a_942_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X2 VGND a_1429_21# a_1364_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR a_942_21# a_1663_329# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X4 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X5 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR a_1429_21# a_1341_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_474_413# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X8 a_1545_47# a_942_21# a_1429_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X9 VPWR a_1429_21# a_2136_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X10 a_582_47# a_193_47# a_474_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X11 a_1429_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 a_648_21# a_474_413# a_788_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X13 a_1341_413# a_193_47# a_1255_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_1663_329# a_1255_47# a_1429_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X15 a_1160_47# a_648_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X16 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_1255_47# a_27_47# a_1113_329# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 Q a_2136_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 a_648_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 a_788_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 Q_N a_1429_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND RESET_B a_942_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 Q a_2136_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VPWR a_942_21# a_892_329# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X25 a_558_413# a_27_47# a_474_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 VGND a_648_21# a_582_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X27 a_892_329# a_474_413# a_648_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X28 VGND a_1429_21# a_2136_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X29 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X30 a_474_413# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X31 a_1364_47# a_27_47# a_1255_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X32 a_1255_47# a_193_47# a_1160_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X33 Q_N a_1429_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X34 a_1545_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X35 VPWR a_648_21# a_558_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X36 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X37 a_1113_329# a_648_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X38 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X39 a_1429_21# a_1255_47# a_1545_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u .ends .subckt sky130_fd_sc_hd__inv_8 A Y VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt spare_logic_block spare_xfq[0] spare_xfq[1] spare_xfqn[0] spare_xfqn[1] spare_xi[0] + spare_xi[1] spare_xi[2] spare_xi[3] spare_xib spare_xmx[0] spare_xmx[1] spare_xna[0] + spare_xna[1] spare_xno[0] spare_xno[1] spare_xz[0] spare_xz[10] spare_xz[11] spare_xz[12] + spare_xz[13] spare_xz[14] spare_xz[15] spare_xz[16] spare_xz[17] spare_xz[18] spare_xz[19] + spare_xz[1] spare_xz[20] spare_xz[21] spare_xz[22] spare_xz[23] spare_xz[24] spare_xz[25] + spare_xz[26] spare_xz[2] spare_xz[3] spare_xz[4] spare_xz[5] spare_xz[6] spare_xz[7] + spare_xz[8] spare_xz[9] vccd vssd XFILLER_0_57 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_24 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_57 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_35 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[8\] spare_xz[8] spare_logic_const\[8\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 Xspare_logic_nor\[0\] spare_xz[11] spare_xno[0] spare_xz[9] vssd vccd vssd vccd sky130_fd_sc_hd__nor2_2 XFILLER_0_47 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_47 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xspare_logic_const\[22\] spare_xz[22] spare_logic_const\[22\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_0_15 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_3 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_24 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_9_57 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_25 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_const\[15\] spare_xz[15] spare_logic_const\[15\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_9_36 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_6_59 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[6\] spare_xz[6] spare_logic_const\[6\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_9_48 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xspare_logic_const\[20\] spare_xz[20] spare_logic_const\[20\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_9_16 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_17 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XPHY_0 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_61 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xspare_logic_const\[13\] spare_xz[13] spare_logic_const\[13\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_1_62 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_61 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_29 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XPHY_1 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_const\[4\] spare_xz[4] spare_logic_const\[4\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_7_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_2 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_41 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_flop\[0\] spare_xz[25] vssd spare_xz[21] spare_xz[23] spare_xfq[0] vccd + spare_xz[19] spare_xfqn[0] vssd vccd sky130_fd_sc_hd__dfbbp_1 Xspare_logic_mux\[1\] vssd vccd spare_xz[16] spare_xz[14] spare_xz[18] spare_xmx[1] + vssd vccd sky130_fd_sc_hd__mux2_2 XPHY_3 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_20 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_53 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[11\] spare_xz[11] spare_logic_const\[11\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_10_52 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_4 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_8 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[2\] spare_xz[2] spare_logic_const\[2\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_5 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_inv\[3\] spare_xz[3] spare_xi[3] vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_21 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_6 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_7 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_34 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[0\] spare_xz[0] spare_logic_const\[0\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_8 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_inv\[1\] spare_xz[1] spare_xi[1] vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_1_48 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_46 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_9 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_const\[25\] spare_xz[25] spare_logic_const\[25\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 Xspare_logic_nand\[1\] spare_xna[1] spare_xz[6] spare_xz[8] vssd vccd vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_1_38 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_15 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_10_14 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[18\] spare_xz[18] spare_logic_const\[18\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_10_59 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_27 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[9\] spare_xz[9] spare_logic_const\[9\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_8_8 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_nor\[1\] spare_xz[12] spare_xno[1] spare_xz[10] vssd vccd vssd vccd sky130_fd_sc_hd__nor2_2 XFILLER_7_39 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_4_29 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[23\] spare_xz[23] spare_logic_const\[23\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 Xspare_logic_const\[16\] spare_xz[16] spare_logic_const\[16\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_2_41 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_52 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[7\] spare_xz[7] spare_logic_const\[7\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 Xspare_logic_biginv spare_xz[4] spare_xib vssd vccd vssd vccd sky130_fd_sc_hd__inv_8 XFILLER_8_41 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_5_31 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[21\] spare_xz[21] spare_logic_const\[21\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_2_54 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_41 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_8_20 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_53 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_43 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xspare_logic_const\[14\] spare_xz[14] spare_logic_const\[14\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_2_22 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_8 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[5\] spare_xz[5] spare_logic_const\[5\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_8_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_12 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_20 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_flop\[1\] spare_xz[26] vssd spare_xz[22] spare_xz[24] spare_xfq[1] vccd + spare_xz[20] spare_xfqn[1] vssd vccd sky130_fd_sc_hd__dfbbp_1 XFILLER_0_3 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_5_57 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[12\] spare_xz[12] spare_logic_const\[12\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_21 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_10 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_47 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_57 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_15 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[3\] spare_xz[3] spare_logic_const\[3\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_22 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_11 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_8 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_12 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_23 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_mux\[0\] vssd vccd spare_xz[15] spare_xz[13] spare_xz[17] spare_xmx[0] + vssd vccd sky130_fd_sc_hd__mux2_2 XPHY_13 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_15 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[10\] spare_xz[10] spare_logic_const\[10\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_2_29 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XPHY_14 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_const\[1\] spare_xz[1] spare_logic_const\[1\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_15 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_inv\[2\] spare_xz[2] spare_xi[2] vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_8_29 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_5_19 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[26\] spare_xz[26] spare_logic_const\[26\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XFILLER_7_3 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XFILLER_11_29 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 XPHY_16 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_41 vssd vccd vssd vccd sky130_fd_sc_hd__decap_12 Xspare_logic_const\[19\] spare_xz[19] spare_logic_const\[19\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_17 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_9_63 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_18 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_inv\[0\] spare_xz[0] spare_xi[0] vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_0_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_10 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_9 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[24\] spare_xz[24] spare_logic_const\[24\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 XPHY_19 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xspare_logic_nand\[0\] spare_xna[0] spare_xz[5] spare_xz[7] vssd vccd vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_3_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_34 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_66 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xspare_logic_const\[17\] spare_xz[17] spare_logic_const\[17\]/HI vccd vssd vssd vccd + sky130_fd_sc_hd__conb_1 .ends .subckt user_id_programming mask_rev[0] mask_rev[10] mask_rev[11] mask_rev[12] mask_rev[13] + mask_rev[14] mask_rev[15] mask_rev[16] mask_rev[17] mask_rev[18] mask_rev[19] mask_rev[1] + mask_rev[20] mask_rev[21] mask_rev[22] mask_rev[23] mask_rev[24] mask_rev[25] mask_rev[26] + mask_rev[27] mask_rev[28] mask_rev[29] mask_rev[2] mask_rev[30] mask_rev[31] mask_rev[3] + mask_rev[4] mask_rev[5] mask_rev[6] mask_rev[7] mask_rev[8] mask_rev[9] VPWR VGND Xmask_rev_value\[1\] mask_rev[1] mask_rev_value\[1\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_6_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xmask_rev_value\[30\] mask_rev[30] mask_rev_value\[30\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_0_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[23\] mask_rev[23] mask_rev_value\[23\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_0_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[16\] mask_rev[16] mask_rev_value\[16\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_0_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xmask_rev_value\[21\] mask_rev[21] mask_rev_value\[21\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_3_6 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_6_28 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_18 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xmask_rev_value\[14\] mask_rev[14] mask_rev_value\[14\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[8\] mask_rev[8] mask_rev_value\[8\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_1_6 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[12\] mask_rev[12] mask_rev_value\[12\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_10 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_33 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xmask_rev_value\[6\] mask_rev[6] mask_rev_value\[6\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_6 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[28\] mask_rev[28] mask_rev_value\[28\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_8_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_24 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xmask_rev_value\[10\] mask_rev[10] mask_rev_value\[10\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_7 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_35 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmask_rev_value\[4\] mask_rev[4] mask_rev_value\[4\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_8 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_36 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[26\] mask_rev[26] mask_rev_value\[26\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_4_26 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xmask_rev_value\[19\] mask_rev[19] mask_rev_value\[19\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_7_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xmask_rev_value\[2\] mask_rev[2] mask_rev_value\[2\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 Xmask_rev_value\[31\] mask_rev[31] mask_rev_value\[31\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 Xmask_rev_value\[24\] mask_rev[24] mask_rev_value\[24\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_5_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xmask_rev_value\[17\] mask_rev[17] mask_rev_value\[17\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 Xmask_rev_value\[0\] mask_rev[11] mask_rev_value\[0\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_5_31 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_2_32 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xmask_rev_value\[22\] mask_rev[22] mask_rev_value\[22\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xmask_rev_value\[15\] mask_rev[15] mask_rev_value\[15\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_44 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_8_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_5_11 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xmask_rev_value\[9\] mask_rev[9] mask_rev_value\[9\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_8_44 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_5_23 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xmask_rev_value\[20\] mask_rev[20] mask_rev_value\[20\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_10 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[13\] mask_rev[13] mask_rev_value\[13\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 Xmask_rev_value\[7\] mask_rev[7] mask_rev_value\[7\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_11 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_2_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XPHY_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_2_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xmask_rev_value\[29\] mask_rev[29] mask_rev_value\[29\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_13 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_0_7 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xmask_rev_value\[11\] mask_rev[0] mask_rev_value\[11\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_8_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[5\] mask_rev[5] mask_rev_value\[5\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XPHY_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xmask_rev_value\[27\] mask_rev[27] mask_rev_value\[27\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_6_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_16 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_3_30 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XPHY_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_0_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xmask_rev_value\[3\] mask_rev[3] mask_rev_value\[3\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_0_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmask_rev_value\[25\] mask_rev[25] mask_rev_value\[25\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 Xmask_rev_value\[18\] mask_rev[18] mask_rev_value\[18\]/HI VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 .ends .subckt gpio_defaults_block_0801 VPWR gpio_defaults[0] gpio_defaults[10] gpio_defaults[11] + gpio_defaults[12] gpio_defaults[1] gpio_defaults[2] gpio_defaults[3] gpio_defaults[4] + gpio_defaults[5] gpio_defaults[6] gpio_defaults[7] gpio_defaults[8] gpio_defaults[9] + VGND Xgpio_default_value\[8\] gpio_defaults[8] gpio_default_value\[8\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[6\] gpio_defaults[6] gpio_default_value\[6\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[4\] gpio_defaults[4] gpio_default_value\[4\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[2\] gpio_defaults[2] gpio_default_value\[2\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xgpio_default_value\[12\] gpio_defaults[12] gpio_default_value\[12\]/HI VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[0\] gpio_default_value\[0\]/LO gpio_defaults[0] VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_1_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[10\] gpio_defaults[10] gpio_default_value\[10\]/HI VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_1_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[9\] gpio_defaults[9] gpio_default_value\[9\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 XFILLER_2_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xgpio_default_value\[7\] gpio_defaults[7] gpio_default_value\[7\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[5\] gpio_defaults[5] gpio_default_value\[5\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_2_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[3\] gpio_defaults[3] gpio_default_value\[3\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 XFILLER_2_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_12 Xgpio_default_value\[1\] gpio_defaults[1] gpio_default_value\[1\]/HI VPWR VGND VGND + VPWR sky130_fd_sc_hd__conb_1 Xgpio_default_value\[11\] gpio_default_value\[11\]/LO gpio_defaults[11] VPWR VGND + VGND VPWR sky130_fd_sc_hd__conb_1 .ends .subckt sky130_fd_sc_hvl__decap_4 VGND VPWR VNB VPB X0 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X1 VPWR VGND VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u .ends .subckt sky130_fd_sc_hvl__decap_8 VGND VPWR VNB VPB X0 VPWR VGND VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X1 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u X2 VPWR VGND VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=1e+06u X3 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=1e+06u .ends .subckt sky130_fd_sc_hvl__diode_2 DIODE VGND VPWR VPB VNB D0 VNB DIODE sky130_fd_pr__diode_pw2nd_11v0 pj=3.16e+06 area=6.072e+11 .ends .subckt sky130_fd_sc_hvl__lsbufhv2lv_1 X A VPWR VGND VPWR_uq0 VGND_uq0 VPB VNB LVPWR X0 a_30_1337# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X1 VGND_uq0 a_30_1337# a_30_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X2 VGND_uq0 a_30_207# a_389_141# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X3 VGND_uq0 a_30_207# a_389_141# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X4 a_389_1337# a_30_1337# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X5 VGND_uq0 a_30_207# a_389_141# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X6 VGND A a_30_1337# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X7 VGND a_30_1337# a_389_1337# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X8 a_389_141# a_30_207# VGND_uq0 VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X9 VGND a_30_1337# a_389_1337# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X10 LVPWR a_389_141# X LVPWR sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u X11 VGND_uq0 a_389_141# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=740000u l=150000u X12 a_389_1337# a_30_1337# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u X13 LVPWR a_389_1337# a_389_141# LVPWR sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u X14 a_30_207# a_30_1337# VPWR_uq0 VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u X15 a_389_1337# a_389_141# LVPWR LVPWR sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u .ends .subckt xres_buf A X VPWR LVPWR LVGND VGND XFILLER_0_24 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_4 XFILLER_1_0 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_8 XFILLER_0_16 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_8 XFILLER_1_8 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_4 XANTENNA_lvlshiftdown_A A VGND VPWR VPWR VGND sky130_fd_sc_hvl__diode_2 XFILLER_2_0 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_8 XFILLER_0_0 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_8 XFILLER_0_8 VGND VPWR VGND VPWR sky130_fd_sc_hvl__decap_8 Xlvlshiftdown X A VPWR VGND VPWR VGND VPWR VGND LVPWR sky130_fd_sc_hvl__lsbufhv2lv_1 .ends .subckt sky130_fd_sc_hd__buf_8 A X VGND VPWR VNB VPB X0 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_27_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt gpio_signal_buffering mgmt_io_in_unbuf[11] mgmt_io_out_buf[11] mgmt_io_out_buf[10] + mgmt_io_out_buf[9] mgmt_io_in_unbuf[10] mgmt_io_in_unbuf[9] mgmt_io_in_unbuf[8] + mgmt_io_out_buf[8] mgmt_io_in_unbuf[7] mgmt_io_in_unbuf[6] mgmt_io_out_buf[7] mgmt_io_out_buf[6] + mgmt_io_in_unbuf[5] mgmt_io_in_unbuf[4] mgmt_io_in_unbuf[3] mgmt_io_in_unbuf[2] + mgmt_io_in_unbuf[1] mgmt_io_in_unbuf[0] mgmt_io_out_buf[0] mgmt_io_out_buf[1] mgmt_io_out_buf[2] + mgmt_io_out_buf[3] mgmt_io_out_buf[4] mgmt_io_out_buf[5] mgmt_io_out_unbuf[0] mgmt_io_out_unbuf[1] + mgmt_io_out_unbuf[2] mgmt_io_out_unbuf[3] mgmt_io_out_unbuf[4] mgmt_io_out_unbuf[5] + mgmt_io_out_unbuf[6] mgmt_io_out_unbuf[7] mgmt_io_out_unbuf[8] mgmt_io_out_unbuf[9] + mgmt_io_out_unbuf[10] mgmt_io_out_unbuf[11] mgmt_io_in_buf[11] mgmt_io_in_buf[10] + mgmt_io_in_buf[9] mgmt_io_in_buf[8] mgmt_io_in_buf[7] mgmt_io_in_buf[6] mgmt_io_in_buf[5] + mgmt_io_in_buf[4] mgmt_io_in_buf[3] mgmt_io_in_buf[2] mgmt_io_in_buf[1] mgmt_io_in_buf[0] + mgmt_io_in_unbuf[12] mgmt_io_in_unbuf[13] mgmt_io_in_unbuf[14] mgmt_io_out_buf[14] + mgmt_io_out_buf[13] mgmt_io_out_buf[12] mgmt_io_out_buf[15] mgmt_io_out_buf[16] + mgmt_io_in_unbuf[16] mgmt_io_in_unbuf[15] mgmt_io_out_buf[17] mgmt_io_out_buf[18] + mgmt_io_out_buf[19] mgmt_io_out_buf[20] mgmt_io_out_buf[21] mgmt_io_out_buf[22] + mgmt_io_in_unbuf[22] mgmt_io_in_unbuf[21] mgmt_io_in_unbuf[20] mgmt_io_in_unbuf[19] + mgmt_io_in_unbuf[18] mgmt_io_in_unbuf[17] mgmt_io_out_buf[23] mgmt_io_out_buf[24] + mgmt_io_out_buf[25] mgmt_io_out_buf[26] mgmt_io_in_unbuf[26] mgmt_io_in_unbuf[25] + mgmt_io_in_unbuf[24] mgmt_io_in_unbuf[23] mgmt_io_out_buf[27] mgmt_io_out_buf[28] + mgmt_io_out_buf[29] mgmt_io_out_buf[30] mgmt_io_in_unbuf[30] mgmt_io_in_unbuf[29] + mgmt_io_in_unbuf[28] mgmt_io_in_unbuf[27] mgmt_io_oeb_buf[0] mgmt_io_oeb_buf[1] + mgmt_io_oeb_buf[2] mgmt_io_oeb_unbuf[2] mgmt_io_oeb_unbuf[1] mgmt_io_oeb_unbuf[0] + mgmt_io_in_buf[30] mgmt_io_in_buf[29] mgmt_io_in_buf[28] mgmt_io_in_buf[27] mgmt_io_out_unbuf[27] + mgmt_io_out_unbuf[28] mgmt_io_out_unbuf[29] mgmt_io_out_unbuf[30] mgmt_io_out_unbuf[26] + mgmt_io_out_unbuf[25] mgmt_io_out_unbuf[24] mgmt_io_out_unbuf[23] mgmt_io_out_unbuf[22] + mgmt_io_out_unbuf[21] mgmt_io_out_unbuf[20] mgmt_io_out_unbuf[19] mgmt_io_out_unbuf[18] + mgmt_io_out_unbuf[17] mgmt_io_out_unbuf[16] mgmt_io_out_unbuf[15] mgmt_io_out_unbuf[14] + mgmt_io_out_unbuf[13] mgmt_io_out_unbuf[12] mgmt_io_in_buf[12] mgmt_io_in_buf[13] + mgmt_io_in_buf[14] mgmt_io_in_buf[15] mgmt_io_in_buf[16] mgmt_io_in_buf[17] mgmt_io_in_buf[18] + mgmt_io_in_buf[19] mgmt_io_in_buf[20] mgmt_io_in_buf[21] mgmt_io_in_buf[22] mgmt_io_in_buf[23] + mgmt_io_in_buf[24] mgmt_io_in_buf[25] mgmt_io_in_buf[26] vccd vccd9 vccd_uq0 vccd_uq1 + vccd_uq2 vccd_uq3 vccd_uq4 vccd_uq5 vccd_uq6 vccd_uq7 vssd Xsky130_fd_sc_hd__buf_8_0 sky130_fd_sc_hd__buf_8_0/A mgmt_io_out_buf[8] vssd vccd_uq6 + vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_1 sky130_fd_sc_hd__buf_8_1/A mgmt_io_out_buf[9] vssd vccd_uq6 + vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_2 sky130_fd_sc_hd__buf_8_2/A mgmt_io_out_buf[10] vssd vccd_uq6 + vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_3 sky130_fd_sc_hd__buf_8_3/A sky130_fd_sc_hd__buf_8_3/X vssd + vccd_uq6 vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_4 mgmt_io_in_unbuf[8] sky130_fd_sc_hd__buf_8_4/X vssd vccd_uq6 + vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_5 mgmt_io_in_unbuf[9] sky130_fd_sc_hd__buf_8_5/X vssd vccd_uq6 + vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_6 mgmt_io_in_unbuf[10] sky130_fd_sc_hd__buf_8_6/X vssd vccd_uq6 + vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_7 sky130_fd_sc_hd__buf_8_7/A sky130_fd_sc_hd__buf_8_7/X vssd + vccd_uq4 vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_100 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_8 sky130_fd_sc_hd__buf_8_8/A sky130_fd_sc_hd__buf_8_8/X vssd + vccd_uq4 vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_90 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_0 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_9 mgmt_io_in_unbuf[15] sky130_fd_sc_hd__buf_8_9/X vssd vccd_uq4 + vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_91 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_80 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_1 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_92 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_81 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_70 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_2 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_93 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_82 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_71 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_60 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_190 sky130_fd_sc_hd__buf_8_73/X mgmt_io_out_buf[30] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_94 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_83 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_72 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_61 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_50 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_4 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_95 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_84 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_73 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_62 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_51 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_40 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_191 mgmt_io_in_unbuf[29] sky130_fd_sc_hd__buf_8_74/A vssd + vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_180 mgmt_io_out_unbuf[7] sky130_fd_sc_hd__buf_8_180/X vssd + vccd vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_90 mgmt_io_out_unbuf[16] sky130_fd_sc_hd__buf_8_90/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_5 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_192 sky130_fd_sc_hd__buf_8_78/X mgmt_io_out_buf[28] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_181 sky130_fd_sc_hd__buf_8_181/A mgmt_io_in_buf[7] vssd vccd + vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_170 mgmt_io_in_unbuf[6] sky130_fd_sc_hd__buf_8_170/X vssd + vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_96 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_85 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_74 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_63 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_52 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_41 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_30 vssd vccd_uq4 vssd vccd_uq4 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_91 mgmt_io_out_unbuf[17] sky130_fd_sc_hd__buf_8_91/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_80 sky130_fd_sc_hd__buf_8_80/A mgmt_io_in_buf[12] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_6 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_193 mgmt_io_in_unbuf[27] sky130_fd_sc_hd__buf_8_77/A vssd + vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_182 mgmt_io_in_unbuf[0] mgmt_io_in_buf[0] vssd vccd vssd vccd + sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_171 sky130_fd_sc_hd__buf_8_171/A mgmt_io_out_buf[6] vssd vccd_uq1 + vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_160 mgmt_io_out_unbuf[5] mgmt_io_out_buf[5] vssd vccd vssd + vccd sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_97 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_86 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_75 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_64 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_53 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_42 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_31 vssd vccd_uq4 vssd vccd_uq4 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_20 vssd vccd_uq6 vssd vccd_uq6 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_92 mgmt_io_out_unbuf[18] sky130_fd_sc_hd__buf_8_92/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_81 mgmt_io_out_unbuf[12] sky130_fd_sc_hd__buf_8_81/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_70 mgmt_io_oeb_unbuf[0] sky130_fd_sc_hd__buf_8_70/X vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_7 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_194 sky130_fd_sc_hd__buf_8_194/A sky130_fd_sc_hd__buf_8_67/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_183 mgmt_io_out_unbuf[0] mgmt_io_out_buf[0] vssd vccd vssd + vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_172 mgmt_io_out_unbuf[11] sky130_fd_sc_hd__buf_8_172/X vssd + vccd vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_161 mgmt_io_in_unbuf[5] mgmt_io_in_buf[5] vssd vccd vssd vccd + sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_150 sky130_fd_sc_hd__buf_8_7/X mgmt_io_out_buf[14] vssd vccd_uq5 + vssd vccd_uq5 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_98 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_87 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_76 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_65 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_54 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_43 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_32 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_21 vssd vccd_uq6 vssd vccd_uq6 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_10 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_93 mgmt_io_out_unbuf[19] sky130_fd_sc_hd__buf_8_93/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_82 sky130_fd_sc_hd__buf_8_82/A mgmt_io_in_buf[13] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_71 mgmt_io_oeb_unbuf[1] sky130_fd_sc_hd__buf_8_71/X vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_60 sky130_fd_sc_hd__buf_8_60/A sky130_fd_sc_hd__buf_8_60/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_8 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_195 sky130_fd_sc_hd__buf_8_36/X sky130_fd_sc_hd__buf_8_195/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_184 mgmt_io_in_unbuf[11] sky130_fd_sc_hd__buf_8_17/A vssd + vccd_uq7 vssd vccd_uq7 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_173 sky130_fd_sc_hd__buf_8_173/A mgmt_io_in_buf[11] vssd vccd + vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_162 sky130_fd_sc_hd__buf_8_172/X sky130_fd_sc_hd__buf_8_3/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_151 sky130_fd_sc_hd__buf_8_15/X mgmt_io_out_buf[13] vssd vccd_uq5 + vssd vccd_uq5 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_140 sky130_fd_sc_hd__buf_8_79/X mgmt_io_out_buf[27] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_99 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_88 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_77 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_66 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_55 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_44 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_33 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_22 vssd vccd_uq6 vssd vccd_uq6 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_11 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_94 sky130_fd_sc_hd__buf_8_94/A mgmt_io_in_buf[18] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_83 mgmt_io_out_unbuf[13] sky130_fd_sc_hd__buf_8_83/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_72 sky130_fd_sc_hd__buf_8_72/A mgmt_io_in_buf[30] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_61 sky130_fd_sc_hd__buf_8_61/A sky130_fd_sc_hd__buf_8_61/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_50 sky130_fd_sc_hd__buf_8_50/A sky130_fd_sc_hd__buf_8_50/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_9 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_163 sky130_fd_sc_hd__buf_8_17/X sky130_fd_sc_hd__buf_8_173/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_152 sky130_fd_sc_hd__buf_8_13/X mgmt_io_out_buf[12] vssd vccd_uq5 + vssd vccd_uq5 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_141 sky130_fd_sc_hd__buf_8_41/X sky130_fd_sc_hd__buf_8_80/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_130 sky130_fd_sc_hd__buf_8_90/X sky130_fd_sc_hd__buf_8_51/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_89 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_78 vssd vccd_uq0 vssd vccd_uq0 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_67 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_56 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_45 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_34 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_23 vssd vccd_uq7 vssd vccd_uq7 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_12 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_185 sky130_fd_sc_hd__buf_8_3/X mgmt_io_out_buf[11] vssd vccd_uq7 + vssd vccd_uq7 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_174 mgmt_io_out_unbuf[9] sky130_fd_sc_hd__buf_8_174/X vssd + vccd vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_95 sky130_fd_sc_hd__buf_8_95/A mgmt_io_in_buf[19] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_84 sky130_fd_sc_hd__buf_8_84/A mgmt_io_in_buf[14] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_73 mgmt_io_out_unbuf[30] sky130_fd_sc_hd__buf_8_73/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_62 sky130_fd_sc_hd__buf_8_62/A sky130_fd_sc_hd__buf_8_62/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_40 sky130_fd_sc_hd__buf_8_40/A sky130_fd_sc_hd__buf_8_40/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_51 sky130_fd_sc_hd__buf_8_51/A sky130_fd_sc_hd__buf_8_51/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_186 sky130_fd_sc_hd__buf_8_69/X mgmt_io_oeb_buf[2] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_175 sky130_fd_sc_hd__buf_8_175/A mgmt_io_in_buf[9] vssd vccd + vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_164 sky130_fd_sc_hd__buf_8_174/X sky130_fd_sc_hd__buf_8_1/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_153 mgmt_io_in_unbuf[12] sky130_fd_sc_hd__buf_8_14/A vssd + vccd_uq5 vssd vccd_uq5 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_142 mgmt_io_in_unbuf[4] mgmt_io_in_buf[4] vssd vccd vssd vccd + sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_131 sky130_fd_sc_hd__buf_8_49/X sky130_fd_sc_hd__buf_8_89/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_120 sky130_fd_sc_hd__buf_8_98/X sky130_fd_sc_hd__buf_8_61/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_79 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_68 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_57 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_46 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_35 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_24 vssd vccd_uq5 vssd vccd_uq5 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_13 vssd vccd_uq1 vssd vccd_uq1 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_96 sky130_fd_sc_hd__buf_8_96/A mgmt_io_in_buf[20] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_85 mgmt_io_out_unbuf[14] sky130_fd_sc_hd__buf_8_85/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_74 sky130_fd_sc_hd__buf_8_74/A mgmt_io_in_buf[29] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_63 sky130_fd_sc_hd__buf_8_63/A mgmt_io_out_buf[24] vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_30 sky130_fd_sc_hd__buf_8_30/A sky130_fd_sc_hd__buf_8_52/A + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_41 sky130_fd_sc_hd__buf_8_41/A sky130_fd_sc_hd__buf_8_41/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_52 sky130_fd_sc_hd__buf_8_52/A sky130_fd_sc_hd__buf_8_52/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_187 sky130_fd_sc_hd__buf_8_71/X mgmt_io_oeb_buf[1] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_176 mgmt_io_out_unbuf[8] sky130_fd_sc_hd__buf_8_176/X vssd + vccd vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_165 sky130_fd_sc_hd__buf_8_5/X sky130_fd_sc_hd__buf_8_175/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_154 sky130_fd_sc_hd__buf_8_6/X sky130_fd_sc_hd__buf_8_179/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_143 mgmt_io_out_unbuf[4] mgmt_io_out_buf[4] vssd vccd vssd + vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_132 sky130_fd_sc_hd__buf_8_88/X sky130_fd_sc_hd__buf_8_43/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_121 sky130_fd_sc_hd__buf_8_60/X sky130_fd_sc_hd__buf_8_121/X + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_110 mgmt_io_in_unbuf[28] sky130_fd_sc_hd__buf_8_75/A vssd + vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_69 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_58 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_47 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_36 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_25 vssd vccd_uq5 vssd vccd_uq5 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_14 vssd vccd_uq1 vssd vccd_uq1 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_97 mgmt_io_out_unbuf[20] sky130_fd_sc_hd__buf_8_97/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_86 sky130_fd_sc_hd__buf_8_86/A mgmt_io_in_buf[15] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_75 sky130_fd_sc_hd__buf_8_75/A mgmt_io_in_buf[28] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_64 mgmt_io_in_unbuf[24] sky130_fd_sc_hd__buf_8_64/X vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_20 mgmt_io_in_unbuf[21] sky130_fd_sc_hd__buf_8_62/A vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_31 sky130_fd_sc_hd__buf_8_51/X sky130_fd_sc_hd__buf_8_31/X + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_42 sky130_fd_sc_hd__buf_8_42/A sky130_fd_sc_hd__buf_8_42/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_53 sky130_fd_sc_hd__buf_8_53/A sky130_fd_sc_hd__buf_8_53/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_188 sky130_fd_sc_hd__buf_8_70/X mgmt_io_oeb_buf[0] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_177 sky130_fd_sc_hd__buf_8_177/A mgmt_io_in_buf[8] vssd vccd + vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_166 sky130_fd_sc_hd__buf_8_176/X sky130_fd_sc_hd__buf_8_0/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_155 sky130_fd_sc_hd__buf_8_178/X sky130_fd_sc_hd__buf_8_2/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_144 mgmt_io_in_unbuf[3] mgmt_io_in_buf[3] vssd vccd vssd vccd + sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_133 sky130_fd_sc_hd__buf_8_52/X sky130_fd_sc_hd__buf_8_87/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_122 sky130_fd_sc_hd__buf_8_97/X sky130_fd_sc_hd__buf_8_54/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_111 sky130_fd_sc_hd__buf_8_76/X mgmt_io_out_buf[29] vssd vccd9 + vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_100 sky130_fd_sc_hd__buf_8_121/X mgmt_io_in_buf[22] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_59 vssd vccd9 vssd vccd9 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_48 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_37 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_26 vssd vccd_uq5 vssd vccd_uq5 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_15 vssd vccd_uq1 vssd vccd_uq1 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_98 mgmt_io_out_unbuf[21] sky130_fd_sc_hd__buf_8_98/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_87 sky130_fd_sc_hd__buf_8_87/A mgmt_io_in_buf[16] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_76 mgmt_io_out_unbuf[29] sky130_fd_sc_hd__buf_8_76/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_65 sky130_fd_sc_hd__buf_8_65/A mgmt_io_out_buf[25] vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_10 sky130_fd_sc_hd__buf_8_33/X mgmt_io_out_buf[15] vssd vccd_uq4 + vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_21 sky130_fd_sc_hd__buf_8_61/X mgmt_io_out_buf[21] vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_32 sky130_fd_sc_hd__buf_8_9/X sky130_fd_sc_hd__buf_8_42/A + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_43 sky130_fd_sc_hd__buf_8_43/A sky130_fd_sc_hd__buf_8_43/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_54 sky130_fd_sc_hd__buf_8_54/A sky130_fd_sc_hd__buf_8_54/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_189 mgmt_io_in_unbuf[30] sky130_fd_sc_hd__buf_8_72/A vssd + vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_178 mgmt_io_out_unbuf[10] sky130_fd_sc_hd__buf_8_178/X vssd + vccd vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_167 sky130_fd_sc_hd__buf_8_4/X sky130_fd_sc_hd__buf_8_177/A + vssd vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_156 mgmt_io_in_unbuf[14] sky130_fd_sc_hd__buf_8_8/A vssd vccd_uq5 + vssd vccd_uq5 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_145 mgmt_io_out_unbuf[3] mgmt_io_out_buf[3] vssd vccd vssd + vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_134 sky130_fd_sc_hd__buf_8_85/X sky130_fd_sc_hd__buf_8_44/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_123 sky130_fd_sc_hd__buf_8_62/X sky130_fd_sc_hd__buf_8_99/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_112 sky130_fd_sc_hd__buf_8_112/A sky130_fd_sc_hd__buf_8_65/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_101 sky130_fd_sc_hd__buf_8_119/X mgmt_io_in_buf[23] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_49 vssd vccd_uq2 vssd vccd_uq2 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_38 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_27 vssd vccd_uq4 vssd vccd_uq4 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_16 vssd vccd_uq1 vssd vccd_uq1 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_99 sky130_fd_sc_hd__buf_8_99/A mgmt_io_in_buf[21] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_88 mgmt_io_out_unbuf[15] sky130_fd_sc_hd__buf_8_88/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_77 sky130_fd_sc_hd__buf_8_77/A mgmt_io_in_buf[27] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_66 mgmt_io_in_unbuf[25] sky130_fd_sc_hd__buf_8_66/X vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_11 mgmt_io_in_unbuf[16] sky130_fd_sc_hd__buf_8_30/A vssd vccd_uq4 + vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_22 mgmt_io_in_unbuf[20] sky130_fd_sc_hd__buf_8_53/A vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_33 sky130_fd_sc_hd__buf_8_43/X sky130_fd_sc_hd__buf_8_33/X + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_44 sky130_fd_sc_hd__buf_8_44/A sky130_fd_sc_hd__buf_8_44/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_55 sky130_fd_sc_hd__buf_8_55/A sky130_fd_sc_hd__buf_8_55/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_168 sky130_fd_sc_hd__buf_8_180/X mgmt_io_out_buf[7] vssd vccd_uq1 + vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_157 mgmt_io_in_unbuf[13] sky130_fd_sc_hd__buf_8_16/A vssd + vccd_uq5 vssd vccd_uq5 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_146 mgmt_io_in_unbuf[2] mgmt_io_in_buf[2] vssd vccd vssd vccd + sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_135 sky130_fd_sc_hd__buf_8_42/X sky130_fd_sc_hd__buf_8_86/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_124 sky130_fd_sc_hd__buf_8_93/X sky130_fd_sc_hd__buf_8_56/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_113 sky130_fd_sc_hd__buf_8_68/X sky130_fd_sc_hd__buf_8_113/X + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_102 mgmt_io_out_unbuf[22] sky130_fd_sc_hd__buf_8_118/A vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_39 vssd vccd_uq3 vssd vccd_uq3 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_28 vssd vccd_uq4 vssd vccd_uq4 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_17 vssd vccd_uq1 vssd vccd_uq1 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_179 sky130_fd_sc_hd__buf_8_179/A mgmt_io_in_buf[10] vssd vccd + vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_89 sky130_fd_sc_hd__buf_8_89/A mgmt_io_in_buf[17] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_78 mgmt_io_out_unbuf[28] sky130_fd_sc_hd__buf_8_78/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_67 sky130_fd_sc_hd__buf_8_67/A mgmt_io_out_buf[26] vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_12 sky130_fd_sc_hd__buf_8_31/X mgmt_io_out_buf[16] vssd vccd_uq4 + vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_23 sky130_fd_sc_hd__buf_8_54/X mgmt_io_out_buf[20] vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_34 sky130_fd_sc_hd__buf_8_8/X sky130_fd_sc_hd__buf_8_45/A + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_45 sky130_fd_sc_hd__buf_8_45/A sky130_fd_sc_hd__buf_8_45/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_56 sky130_fd_sc_hd__buf_8_56/A sky130_fd_sc_hd__buf_8_56/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_169 mgmt_io_in_unbuf[7] sky130_fd_sc_hd__buf_8_181/A vssd + vccd_uq1 vssd vccd_uq1 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_158 mgmt_io_out_unbuf[6] sky130_fd_sc_hd__buf_8_171/A vssd + vccd vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_147 mgmt_io_out_unbuf[2] mgmt_io_out_buf[2] vssd vccd vssd + vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_136 sky130_fd_sc_hd__buf_8_83/X sky130_fd_sc_hd__buf_8_46/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_125 sky130_fd_sc_hd__buf_8_53/X sky130_fd_sc_hd__buf_8_96/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_114 sky130_fd_sc_hd__buf_8_114/A sky130_fd_sc_hd__buf_8_63/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_103 sky130_fd_sc_hd__buf_8_116/X mgmt_io_in_buf[24] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_29 vssd vccd_uq4 vssd vccd_uq4 sky130_ef_sc_hd__decap_12 Xsky130_ef_sc_hd__decap_12_18 vssd vccd_uq1 vssd vccd_uq1 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_13 sky130_fd_sc_hd__buf_8_39/X sky130_fd_sc_hd__buf_8_13/X + vssd vccd_uq4 vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_24 sky130_fd_sc_hd__buf_8_56/X mgmt_io_out_buf[19] vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_79 mgmt_io_out_unbuf[27] sky130_fd_sc_hd__buf_8_79/X vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_68 mgmt_io_in_unbuf[26] sky130_fd_sc_hd__buf_8_68/X vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_57 mgmt_io_in_unbuf[23] sky130_fd_sc_hd__buf_8_57/X vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_35 sky130_fd_sc_hd__buf_8_44/X sky130_fd_sc_hd__buf_8_7/A + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_46 sky130_fd_sc_hd__buf_8_46/A sky130_fd_sc_hd__buf_8_46/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_159 sky130_fd_sc_hd__buf_8_170/X mgmt_io_in_buf[6] vssd vccd + vssd vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_148 mgmt_io_out_unbuf[1] mgmt_io_out_buf[1] vssd vccd vssd + vccd sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_137 sky130_fd_sc_hd__buf_8_45/X sky130_fd_sc_hd__buf_8_84/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_126 sky130_fd_sc_hd__buf_8_92/X sky130_fd_sc_hd__buf_8_48/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_115 sky130_fd_sc_hd__buf_8_66/X sky130_fd_sc_hd__buf_8_115/X + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_104 mgmt_io_out_unbuf[23] sky130_fd_sc_hd__buf_8_117/A vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_ef_sc_hd__decap_12_19 vssd vccd_uq6 vssd vccd_uq6 sky130_ef_sc_hd__decap_12 Xsky130_fd_sc_hd__buf_8_69 mgmt_io_oeb_unbuf[2] sky130_fd_sc_hd__buf_8_69/X vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_58 sky130_fd_sc_hd__buf_8_58/A mgmt_io_out_buf[23] vssd vccd_uq2 + vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_14 sky130_fd_sc_hd__buf_8_14/A sky130_fd_sc_hd__buf_8_38/A + vssd vccd_uq4 vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_25 mgmt_io_in_unbuf[19] sky130_fd_sc_hd__buf_8_55/A vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_36 sky130_fd_sc_hd__buf_8_36/A sky130_fd_sc_hd__buf_8_36/X + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_47 sky130_fd_sc_hd__buf_8_47/A sky130_fd_sc_hd__buf_8_47/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_149 mgmt_io_in_unbuf[1] mgmt_io_in_buf[1] vssd vccd vssd vccd + sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_138 sky130_fd_sc_hd__buf_8_81/X sky130_fd_sc_hd__buf_8_40/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_127 sky130_fd_sc_hd__buf_8_55/X sky130_fd_sc_hd__buf_8_95/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_116 sky130_fd_sc_hd__buf_8_64/X sky130_fd_sc_hd__buf_8_116/X + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_105 mgmt_io_out_unbuf[24] sky130_fd_sc_hd__buf_8_114/A vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_59 sky130_fd_sc_hd__buf_8_59/A sky130_fd_sc_hd__buf_8_59/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_15 sky130_fd_sc_hd__buf_8_37/X sky130_fd_sc_hd__buf_8_15/X + vssd vccd_uq4 vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_26 mgmt_io_in_unbuf[18] sky130_fd_sc_hd__buf_8_47/A vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_37 sky130_fd_sc_hd__buf_8_46/X sky130_fd_sc_hd__buf_8_37/X + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_48 sky130_fd_sc_hd__buf_8_48/A sky130_fd_sc_hd__buf_8_48/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_139 sky130_fd_sc_hd__buf_8_195/X sky130_fd_sc_hd__buf_8_82/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_128 sky130_fd_sc_hd__buf_8_47/X sky130_fd_sc_hd__buf_8_94/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_117 sky130_fd_sc_hd__buf_8_117/A sky130_fd_sc_hd__buf_8_58/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_106 sky130_fd_sc_hd__buf_8_115/X mgmt_io_in_buf[25] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_16 sky130_fd_sc_hd__buf_8_16/A sky130_fd_sc_hd__buf_8_36/A + vssd vccd_uq4 vssd vccd_uq4 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_27 sky130_fd_sc_hd__buf_8_48/X mgmt_io_out_buf[18] vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_38 sky130_fd_sc_hd__buf_8_38/A sky130_fd_sc_hd__buf_8_41/A + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_49 sky130_fd_sc_hd__buf_8_49/A sky130_fd_sc_hd__buf_8_49/X + vssd vccd_uq2 vssd vccd_uq2 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_129 sky130_fd_sc_hd__buf_8_91/X sky130_fd_sc_hd__buf_8_50/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_118 sky130_fd_sc_hd__buf_8_118/A sky130_fd_sc_hd__buf_8_59/A + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_107 sky130_fd_sc_hd__buf_8_113/X mgmt_io_in_buf[26] vssd vccd_uq0 + vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_17 sky130_fd_sc_hd__buf_8_17/A sky130_fd_sc_hd__buf_8_17/X + vssd vccd_uq6 vssd vccd_uq6 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_28 mgmt_io_in_unbuf[17] sky130_fd_sc_hd__buf_8_49/A vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_39 sky130_fd_sc_hd__buf_8_40/X sky130_fd_sc_hd__buf_8_39/X + vssd vccd_uq3 vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_119 sky130_fd_sc_hd__buf_8_57/X sky130_fd_sc_hd__buf_8_119/X + vssd vccd9 vssd vccd9 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_108 mgmt_io_out_unbuf[25] sky130_fd_sc_hd__buf_8_112/A vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_18 mgmt_io_in_unbuf[22] sky130_fd_sc_hd__buf_8_60/A vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_29 sky130_fd_sc_hd__buf_8_50/X mgmt_io_out_buf[17] vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_109 mgmt_io_out_unbuf[26] sky130_fd_sc_hd__buf_8_194/A vssd + vccd_uq0 vssd vccd_uq0 sky130_fd_sc_hd__buf_8 Xsky130_fd_sc_hd__buf_8_19 sky130_fd_sc_hd__buf_8_59/X mgmt_io_out_buf[22] vssd vccd_uq3 + vssd vccd_uq3 sky130_fd_sc_hd__buf_8 .ends .subckt sky130_fd_sc_hd__buf_6 VPWR VGND X A VNB VPB X0 VPWR a_161_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_161_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_161_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_161_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND A a_161_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_161_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_161_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND a_161_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_161_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_161_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_161_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_161_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_161_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR A a_161_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND a_161_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_161_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__and2_4 X B A VGND VPWR VNB VPB X0 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND B a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_110_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and3b_4 A_N X C B VGND VPWR VNB VPB X0 a_98_199# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_56_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_56_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_56_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_98_199# a_56_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_56_297# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_56_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_257_47# B a_152_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_56_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_56_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_152_47# a_98_199# a_56_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR C a_56_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_98_199# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X13 a_56_297# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VGND C a_257_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 X a_56_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nand2_8 A B Y VGND VPWR VNB VPB X0 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nand2_4 Y A B VGND VPWR VNB VPB X0 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_27_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__clkbuf_8 X A VGND VPWR VNB VPB X0 VPWR A a_110_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_110_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND A a_110_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_110_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 VGND a_110_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 X a_110_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 VPWR a_110_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 X a_110_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__and3b_1 A_N B X C VGND VPWR VNB VPB X0 a_109_93# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_209_311# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_109_93# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_296_53# a_109_93# a_209_311# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR C a_209_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_368_53# B a_296_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_209_311# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_209_311# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR a_109_93# a_209_311# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND C a_368_53# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__inv_12 A Y VGND VPWR VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt mprj2_logic_high HI vccd2 vssd2 XFILLER_0_57 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_209 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_4 XFILLER_0_69 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_15 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_81 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_1_181 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_29 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_3 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_193 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_1_95 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XPHY_0 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XPHY_1 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_1_85 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_6 XFILLER_1_41 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_53 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XPHY_2 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XPHY_3 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_1_141 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_197 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_153 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_165 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_0_209 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_4 XFILLER_1_57 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_113 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_69 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_169 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_125 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_15 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_181 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_137 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_0_193 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_1_29 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_1_107 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_4 XFILLER_0_141 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_197 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_153 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_165 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_0_113 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_3 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_169 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_125 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_137 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_0_81 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 Xinst inst/LO HI vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__conb_1 XFILLER_0_85 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_41 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_109 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 XFILLER_0_97 vssd2 vccd2 vssd2 vccd2 sky130_fd_sc_hd__decap_12 XFILLER_0_53 vccd2 vssd2 vssd2 vccd2 sky130_fd_sc_hd__decap_3 .ends .subckt mprj_logic_high HI[0] HI[100] HI[101] HI[102] HI[103] HI[104] HI[105] HI[106] + HI[107] HI[108] HI[109] HI[10] HI[110] HI[111] HI[112] HI[113] HI[114] HI[115] HI[116] + HI[117] HI[118] HI[119] HI[11] HI[120] HI[121] HI[122] HI[123] HI[124] HI[125] HI[126] + HI[127] HI[128] HI[129] HI[12] HI[130] HI[131] HI[132] HI[133] HI[134] HI[135] HI[136] + HI[137] HI[138] HI[139] HI[13] HI[140] HI[141] HI[142] HI[143] HI[144] HI[145] HI[146] + HI[147] HI[148] HI[149] HI[14] HI[150] HI[151] HI[152] HI[153] HI[154] HI[155] HI[156] + HI[157] HI[158] HI[159] HI[15] HI[160] HI[161] HI[162] HI[163] HI[164] HI[165] HI[166] + HI[167] HI[168] HI[169] HI[16] HI[170] HI[171] HI[172] HI[173] HI[174] HI[175] HI[176] + HI[177] HI[178] HI[179] HI[17] HI[180] HI[181] HI[182] HI[183] HI[184] HI[185] HI[186] + HI[187] HI[188] HI[189] HI[18] HI[190] HI[191] HI[192] HI[193] HI[194] HI[195] HI[196] + HI[197] HI[198] HI[199] HI[19] HI[1] HI[200] HI[201] HI[202] HI[203] HI[204] HI[205] + HI[206] HI[207] HI[208] HI[209] HI[20] HI[210] HI[211] HI[212] HI[213] HI[214] HI[215] + HI[216] HI[217] HI[218] HI[219] HI[21] HI[220] HI[221] HI[222] HI[223] HI[224] HI[225] + HI[226] HI[227] HI[228] HI[229] HI[22] HI[230] HI[231] HI[232] HI[233] HI[234] HI[235] + HI[236] HI[237] HI[238] HI[239] HI[23] HI[240] HI[241] HI[242] HI[243] HI[244] HI[245] + HI[246] HI[247] HI[248] HI[249] HI[24] HI[250] HI[251] HI[252] HI[253] HI[254] HI[255] + HI[256] HI[257] HI[258] HI[259] HI[25] HI[260] HI[261] HI[262] HI[263] HI[264] HI[265] + HI[266] HI[267] HI[268] HI[269] HI[26] HI[270] HI[271] HI[272] HI[273] HI[274] HI[275] + HI[276] HI[277] HI[278] HI[279] HI[27] HI[280] HI[281] HI[282] HI[283] HI[284] HI[285] + HI[286] HI[287] HI[288] HI[289] HI[28] HI[290] HI[291] HI[292] HI[293] HI[294] HI[295] + HI[296] HI[297] HI[298] HI[299] HI[29] HI[2] HI[300] HI[301] HI[302] HI[303] HI[304] + HI[305] HI[306] HI[307] HI[308] HI[309] HI[30] HI[310] HI[311] HI[312] HI[313] HI[314] + HI[315] HI[316] HI[317] HI[318] HI[319] HI[31] HI[320] HI[321] HI[322] HI[323] HI[324] + HI[325] HI[326] HI[327] HI[328] HI[329] HI[32] HI[330] HI[331] HI[332] HI[333] HI[334] + HI[335] HI[336] HI[337] HI[338] HI[339] HI[33] HI[340] HI[341] HI[342] HI[343] HI[344] + HI[345] HI[346] HI[347] HI[348] HI[349] HI[34] HI[350] HI[351] HI[352] HI[353] HI[354] + HI[355] HI[356] HI[357] HI[358] HI[359] HI[35] HI[360] HI[361] HI[362] HI[363] HI[364] + HI[365] HI[366] HI[367] HI[368] HI[369] HI[36] HI[370] HI[371] HI[372] HI[373] HI[374] + HI[375] HI[376] HI[377] HI[378] HI[379] HI[37] HI[380] HI[381] HI[382] HI[383] HI[384] + HI[385] HI[386] HI[387] HI[388] HI[389] HI[38] HI[390] HI[391] HI[392] HI[393] HI[394] + HI[395] HI[396] HI[397] HI[398] HI[399] HI[39] HI[3] HI[400] HI[401] HI[402] HI[403] + HI[404] HI[405] HI[406] HI[407] HI[408] HI[409] HI[40] HI[410] HI[411] HI[412] HI[413] + HI[414] HI[415] HI[416] HI[417] HI[418] HI[419] HI[41] HI[420] HI[421] HI[422] HI[423] + HI[424] HI[425] HI[426] HI[427] HI[428] HI[429] HI[42] HI[430] HI[431] HI[432] HI[433] + HI[434] HI[435] HI[436] HI[437] HI[438] HI[439] HI[43] HI[440] HI[441] HI[442] HI[443] + HI[444] HI[445] HI[446] HI[447] HI[448] HI[449] HI[44] HI[450] HI[451] HI[452] HI[453] + HI[454] HI[455] HI[456] HI[457] HI[458] HI[459] HI[45] HI[460] HI[461] HI[462] HI[46] + HI[47] HI[48] HI[49] HI[4] HI[50] HI[51] HI[52] HI[53] HI[54] HI[55] HI[56] HI[57] + HI[58] HI[59] HI[5] HI[60] HI[61] HI[62] HI[63] HI[64] HI[65] HI[66] HI[67] HI[68] + HI[69] HI[6] HI[70] HI[71] HI[72] HI[73] HI[74] HI[75] HI[76] HI[77] HI[78] HI[79] + HI[7] HI[80] HI[81] HI[82] HI[83] HI[84] HI[85] HI[86] HI[87] HI[88] HI[89] HI[8] + HI[90] HI[91] HI[92] HI[93] HI[94] HI[95] HI[96] HI[97] HI[98] HI[99] HI[9] vccd1 + vssd1 Xinsts\[210\] insts\[210\]/LO HI[210] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[308\] insts\[308\]/LO HI[308] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[425\] insts\[425\]/LO HI[425] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[160\] insts\[160\]/LO HI[160] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_357 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 XFILLER_2_302 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[258\] insts\[258\]/LO HI[258] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[40\] insts\[40\]/LO HI[40] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[375\] insts\[375\]/LO HI[375] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[88\] insts\[88\]/LO HI[88] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_165 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[123\] insts\[123\]/LO HI[123] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_669 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[338\] insts\[338\]/LO HI[338] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[240\] insts\[240\]/LO HI[240] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[9\] insts\[9\]/LO HI[9] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[455\] insts\[455\]/LO HI[455] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[288\] insts\[288\]/LO HI[288] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[190\] insts\[190\]/LO HI[190] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[70\] insts\[70\]/LO HI[70] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[203\] insts\[203\]/LO HI[203] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_561 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[418\] insts\[418\]/LO HI[418] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[153\] insts\[153\]/LO HI[153] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[320\] insts\[320\]/LO HI[320] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[33\] insts\[33\]/LO HI[33] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[368\] insts\[368\]/LO HI[368] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[270\] insts\[270\]/LO HI[270] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_177 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_3_486 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[116\] insts\[116\]/LO HI[116] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[400\] insts\[400\]/LO HI[400] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[233\] insts\[233\]/LO HI[233] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_209 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[183\] insts\[183\]/LO HI[183] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[350\] insts\[350\]/LO HI[350] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[448\] insts\[448\]/LO HI[448] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_721 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[63\] insts\[63\]/LO HI[63] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[398\] insts\[398\]/LO HI[398] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_573 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[146\] insts\[146\]/LO HI[146] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[313\] insts\[313\]/LO HI[313] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[26\] insts\[26\]/LO HI[26] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_3_3 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[430\] insts\[430\]/LO HI[430] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_189 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[263\] insts\[263\]/LO HI[263] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[380\] insts\[380\]/LO HI[380] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[109\] insts\[109\]/LO HI[109] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[93\] insts\[93\]/LO HI[93] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_3_498 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 XFILLER_1_80 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[226\] insts\[226\]/LO HI[226] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[343\] insts\[343\]/LO HI[343] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[176\] insts\[176\]/LO HI[176] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[56\] insts\[56\]/LO HI[56] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[460\] insts\[460\]/LO HI[460] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[293\] insts\[293\]/LO HI[293] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_541 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_585 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[139\] insts\[139\]/LO HI[139] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[306\] insts\[306\]/LO HI[306] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[19\] insts\[19\]/LO HI[19] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_393 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[423\] insts\[423\]/LO HI[423] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[256\] insts\[256\]/LO HI[256] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[373\] insts\[373\]/LO HI[373] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_617 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[86\] insts\[86\]/LO HI[86] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[121\] insts\[121\]/LO HI[121] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[219\] insts\[219\]/LO HI[219] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[336\] insts\[336\]/LO HI[336] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[169\] insts\[169\]/LO HI[169] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[49\] insts\[49\]/LO HI[49] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[286\] insts\[286\]/LO HI[286] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[7\] insts\[7\]/LO HI[7] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[453\] insts\[453\]/LO HI[453] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_597 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[201\] insts\[201\]/LO HI[201] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[416\] insts\[416\]/LO HI[416] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[249\] insts\[249\]/LO HI[249] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[151\] insts\[151\]/LO HI[151] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_681 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[31\] insts\[31\]/LO HI[31] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_629 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[366\] insts\[366\]/LO HI[366] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[199\] insts\[199\]/LO HI[199] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[79\] insts\[79\]/LO HI[79] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[114\] insts\[114\]/LO HI[114] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[329\] insts\[329\]/LO HI[329] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[231\] insts\[231\]/LO HI[231] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[446\] insts\[446\]/LO HI[446] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[181\] insts\[181\]/LO HI[181] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[279\] insts\[279\]/LO HI[279] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[61\] insts\[61\]/LO HI[61] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[396\] insts\[396\]/LO HI[396] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[144\] insts\[144\]/LO HI[144] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[409\] insts\[409\]/LO HI[409] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[311\] insts\[311\]/LO HI[311] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[24\] insts\[24\]/LO HI[24] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[359\] insts\[359\]/LO HI[359] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_3 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 Xinsts\[261\] insts\[261\]/LO HI[261] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[107\] insts\[107\]/LO HI[107] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[91\] insts\[91\]/LO HI[91] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[224\] insts\[224\]/LO HI[224] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_0 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[439\] insts\[439\]/LO HI[439] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[174\] insts\[174\]/LO HI[174] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[341\] insts\[341\]/LO HI[341] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[54\] insts\[54\]/LO HI[54] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[389\] insts\[389\]/LO HI[389] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[291\] insts\[291\]/LO HI[291] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[137\] insts\[137\]/LO HI[137] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[304\] insts\[304\]/LO HI[304] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[17\] insts\[17\]/LO HI[17] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[421\] insts\[421\]/LO HI[421] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[254\] insts\[254\]/LO HI[254] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[371\] insts\[371\]/LO HI[371] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[84\] insts\[84\]/LO HI[84] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[217\] insts\[217\]/LO HI[217] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_1 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[334\] insts\[334\]/LO HI[334] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[167\] insts\[167\]/LO HI[167] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[47\] insts\[47\]/LO HI[47] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_309 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[5\] insts\[5\]/LO HI[5] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[451\] insts\[451\]/LO HI[451] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[284\] insts\[284\]/LO HI[284] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_331 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 XFILLER_1_172 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[247\] insts\[247\]/LO HI[247] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[414\] insts\[414\]/LO HI[414] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_470 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 XFILLER_1_96 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[364\] insts\[364\]/LO HI[364] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[197\] insts\[197\]/LO HI[197] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[77\] insts\[77\]/LO HI[77] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[112\] insts\[112\]/LO HI[112] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_2 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[327\] insts\[327\]/LO HI[327] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_557 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[444\] insts\[444\]/LO HI[444] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[277\] insts\[277\]/LO HI[277] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_343 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[394\] insts\[394\]/LO HI[394] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_118 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_184 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[407\] insts\[407\]/LO HI[407] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[142\] insts\[142\]/LO HI[142] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[22\] insts\[22\]/LO HI[22] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[357\] insts\[357\]/LO HI[357] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[105\] insts\[105\]/LO HI[105] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_3 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[222\] insts\[222\]/LO HI[222] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[437\] insts\[437\]/LO HI[437] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[172\] insts\[172\]/LO HI[172] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_355 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[52\] insts\[52\]/LO HI[52] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[387\] insts\[387\]/LO HI[387] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_196 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[135\] insts\[135\]/LO HI[135] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[302\] insts\[302\]/LO HI[302] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[15\] insts\[15\]/LO HI[15] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[252\] insts\[252\]/LO HI[252] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[82\] insts\[82\]/LO HI[82] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_4 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[215\] insts\[215\]/LO HI[215] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[165\] insts\[165\]/LO HI[165] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[332\] insts\[332\]/LO HI[332] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_301 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_1_367 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[45\] insts\[45\]/LO HI[45] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_109 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[3\] insts\[3\]/LO HI[3] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_142 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[282\] insts\[282\]/LO HI[282] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[128\] insts\[128\]/LO HI[128] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[412\] insts\[412\]/LO HI[412] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[245\] insts\[245\]/LO HI[245] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[362\] insts\[362\]/LO HI[362] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[195\] insts\[195\]/LO HI[195] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[75\] insts\[75\]/LO HI[75] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_5 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[110\] insts\[110\]/LO HI[110] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[208\] insts\[208\]/LO HI[208] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_505 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[158\] insts\[158\]/LO HI[158] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[325\] insts\[325\]/LO HI[325] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_379 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[38\] insts\[38\]/LO HI[38] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[442\] insts\[442\]/LO HI[442] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[275\] insts\[275\]/LO HI[275] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_154 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_121 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[392\] insts\[392\]/LO HI[392] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[405\] insts\[405\]/LO HI[405] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[140\] insts\[140\]/LO HI[140] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[238\] insts\[238\]/LO HI[238] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[20\] insts\[20\]/LO HI[20] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[355\] insts\[355\]/LO HI[355] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[188\] insts\[188\]/LO HI[188] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_709 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XPHY_6 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[68\] insts\[68\]/LO HI[68] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_517 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[103\] insts\[103\]/LO HI[103] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[318\] insts\[318\]/LO HI[318] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[220\] insts\[220\]/LO HI[220] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[170\] insts\[170\]/LO HI[170] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[435\] insts\[435\]/LO HI[435] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_689 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_2_645 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_601 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_133 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[268\] insts\[268\]/LO HI[268] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[50\] insts\[50\]/LO HI[50] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[385\] insts\[385\]/LO HI[385] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[98\] insts\[98\]/LO HI[98] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_442 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_68 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[133\] insts\[133\]/LO HI[133] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[300\] insts\[300\]/LO HI[300] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[13\] insts\[13\]/LO HI[13] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XPHY_7 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[348\] insts\[348\]/LO HI[348] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[250\] insts\[250\]/LO HI[250] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[298\] insts\[298\]/LO HI[298] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_529 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[80\] insts\[80\]/LO HI[80] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[213\] insts\[213\]/LO HI[213] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_337 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[428\] insts\[428\]/LO HI[428] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_657 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_613 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[330\] insts\[330\]/LO HI[330] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[163\] insts\[163\]/LO HI[163] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[43\] insts\[43\]/LO HI[43] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[378\] insts\[378\]/LO HI[378] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[280\] insts\[280\]/LO HI[280] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[1\] insts\[1\]/LO HI[1] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_454 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_421 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_410 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[126\] insts\[126\]/LO HI[126] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[410\] insts\[410\]/LO HI[410] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[243\] insts\[243\]/LO HI[243] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[458\] insts\[458\]/LO HI[458] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[360\] insts\[360\]/LO HI[360] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[193\] insts\[193\]/LO HI[193] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[73\] insts\[73\]/LO HI[73] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[206\] insts\[206\]/LO HI[206] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_669 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_625 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_113 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 Xinsts\[156\] insts\[156\]/LO HI[156] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[323\] insts\[323\]/LO HI[323] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[36\] insts\[36\]/LO HI[36] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[273\] insts\[273\]/LO HI[273] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[440\] insts\[440\]/LO HI[440] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_433 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[390\] insts\[390\]/LO HI[390] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[119\] insts\[119\]/LO HI[119] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[403\] insts\[403\]/LO HI[403] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[236\] insts\[236\]/LO HI[236] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_701 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[353\] insts\[353\]/LO HI[353] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[186\] insts\[186\]/LO HI[186] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[66\] insts\[66\]/LO HI[66] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[101\] insts\[101\]/LO HI[101] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[149\] insts\[149\]/LO HI[149] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_637 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[316\] insts\[316\]/LO HI[316] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[29\] insts\[29\]/LO HI[29] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[433\] insts\[433\]/LO HI[433] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[266\] insts\[266\]/LO HI[266] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[383\] insts\[383\]/LO HI[383] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[96\] insts\[96\]/LO HI[96] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_253 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[131\] insts\[131\]/LO HI[131] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[229\] insts\[229\]/LO HI[229] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_713 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[11\] insts\[11\]/LO HI[11] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[346\] insts\[346\]/LO HI[346] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[179\] insts\[179\]/LO HI[179] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[59\] insts\[59\]/LO HI[59] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_307 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[296\] insts\[296\]/LO HI[296] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[309\] insts\[309\]/LO HI[309] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[211\] insts\[211\]/LO HI[211] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[426\] insts\[426\]/LO HI[426] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[161\] insts\[161\]/LO HI[161] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[259\] insts\[259\]/LO HI[259] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[41\] insts\[41\]/LO HI[41] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_490 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_3_722 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[376\] insts\[376\]/LO HI[376] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_265 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_221 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[89\] insts\[89\]/LO HI[89] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_60 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[124\] insts\[124\]/LO HI[124] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_725 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[241\] insts\[241\]/LO HI[241] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[339\] insts\[339\]/LO HI[339] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_319 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[456\] insts\[456\]/LO HI[456] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[289\] insts\[289\]/LO HI[289] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[191\] insts\[191\]/LO HI[191] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[71\] insts\[71\]/LO HI[71] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[204\] insts\[204\]/LO HI[204] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[419\] insts\[419\]/LO HI[419] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[154\] insts\[154\]/LO HI[154] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[321\] insts\[321\]/LO HI[321] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[34\] insts\[34\]/LO HI[34] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[369\] insts\[369\]/LO HI[369] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_277 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_233 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[271\] insts\[271\]/LO HI[271] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_72 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[117\] insts\[117\]/LO HI[117] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[234\] insts\[234\]/LO HI[234] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[401\] insts\[401\]/LO HI[401] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[351\] insts\[351\]/LO HI[351] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[449\] insts\[449\]/LO HI[449] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[184\] insts\[184\]/LO HI[184] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[64\] insts\[64\]/LO HI[64] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[399\] insts\[399\]/LO HI[399] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_673 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[147\] insts\[147\]/LO HI[147] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[314\] insts\[314\]/LO HI[314] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[27\] insts\[27\]/LO HI[27] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[431\] insts\[431\]/LO HI[431] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_289 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 XFILLER_2_245 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[264\] insts\[264\]/LO HI[264] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[381\] insts\[381\]/LO HI[381] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[94\] insts\[94\]/LO HI[94] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[227\] insts\[227\]/LO HI[227] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[344\] insts\[344\]/LO HI[344] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[177\] insts\[177\]/LO HI[177] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[57\] insts\[57\]/LO HI[57] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[461\] insts\[461\]/LO HI[461] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[294\] insts\[294\]/LO HI[294] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_641 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_685 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[307\] insts\[307\]/LO HI[307] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_471 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[424\] insts\[424\]/LO HI[424] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[257\] insts\[257\]/LO HI[257] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_85 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_3_511 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 Xinsts\[374\] insts\[374\]/LO HI[374] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[87\] insts\[87\]/LO HI[87] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[122\] insts\[122\]/LO HI[122] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[337\] insts\[337\]/LO HI[337] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_108 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 Xinsts\[8\] insts\[8\]/LO HI[8] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[454\] insts\[454\]/LO HI[454] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[287\] insts\[287\]/LO HI[287] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_653 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_697 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[202\] insts\[202\]/LO HI[202] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_461 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[417\] insts\[417\]/LO HI[417] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[152\] insts\[152\]/LO HI[152] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_97 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[32\] insts\[32\]/LO HI[32] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[367\] insts\[367\]/LO HI[367] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[115\] insts\[115\]/LO HI[115] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[232\] insts\[232\]/LO HI[232] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[447\] insts\[447\]/LO HI[447] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[182\] insts\[182\]/LO HI[182] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[62\] insts\[62\]/LO HI[62] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_665 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[397\] insts\[397\]/LO HI[397] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_484 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[145\] insts\[145\]/LO HI[145] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[312\] insts\[312\]/LO HI[312] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[25\] insts\[25\]/LO HI[25] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_281 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[262\] insts\[262\]/LO HI[262] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_3 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[108\] insts\[108\]/LO HI[108] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[92\] insts\[92\]/LO HI[92] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[225\] insts\[225\]/LO HI[225] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[342\] insts\[342\]/LO HI[342] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[175\] insts\[175\]/LO HI[175] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[55\] insts\[55\]/LO HI[55] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[292\] insts\[292\]/LO HI[292] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_441 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[138\] insts\[138\]/LO HI[138] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[305\] insts\[305\]/LO HI[305] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[18\] insts\[18\]/LO HI[18] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_293 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[422\] insts\[422\]/LO HI[422] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[255\] insts\[255\]/LO HI[255] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[372\] insts\[372\]/LO HI[372] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[85\] insts\[85\]/LO HI[85] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[120\] insts\[120\]/LO HI[120] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[218\] insts\[218\]/LO HI[218] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[335\] insts\[335\]/LO HI[335] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[168\] insts\[168\]/LO HI[168] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[48\] insts\[48\]/LO HI[48] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[6\] insts\[6\]/LO HI[6] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[452\] insts\[452\]/LO HI[452] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[285\] insts\[285\]/LO HI[285] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[200\] insts\[200\]/LO HI[200] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_261 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[415\] insts\[415\]/LO HI[415] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[150\] insts\[150\]/LO HI[150] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[248\] insts\[248\]/LO HI[248] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_581 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[30\] insts\[30\]/LO HI[30] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[365\] insts\[365\]/LO HI[365] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[198\] insts\[198\]/LO HI[198] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[78\] insts\[78\]/LO HI[78] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[113\] insts\[113\]/LO HI[113] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[230\] insts\[230\]/LO HI[230] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[328\] insts\[328\]/LO HI[328] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[445\] insts\[445\]/LO HI[445] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[278\] insts\[278\]/LO HI[278] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[180\] insts\[180\]/LO HI[180] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[60\] insts\[60\]/LO HI[60] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[395\] insts\[395\]/LO HI[395] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_273 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[408\] insts\[408\]/LO HI[408] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[143\] insts\[143\]/LO HI[143] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[310\] insts\[310\]/LO HI[310] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[23\] insts\[23\]/LO HI[23] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[358\] insts\[358\]/LO HI[358] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[260\] insts\[260\]/LO HI[260] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[106\] insts\[106\]/LO HI[106] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[90\] insts\[90\]/LO HI[90] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[223\] insts\[223\]/LO HI[223] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[438\] insts\[438\]/LO HI[438] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[340\] insts\[340\]/LO HI[340] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[173\] insts\[173\]/LO HI[173] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[53\] insts\[53\]/LO HI[53] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[388\] insts\[388\]/LO HI[388] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[290\] insts\[290\]/LO HI[290] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_230 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[136\] insts\[136\]/LO HI[136] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[303\] insts\[303\]/LO HI[303] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[16\] insts\[16\]/LO HI[16] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[420\] insts\[420\]/LO HI[420] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[253\] insts\[253\]/LO HI[253] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[370\] insts\[370\]/LO HI[370] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[83\] insts\[83\]/LO HI[83] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[216\] insts\[216\]/LO HI[216] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[166\] insts\[166\]/LO HI[166] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[333\] insts\[333\]/LO HI[333] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[46\] insts\[46\]/LO HI[46] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[450\] insts\[450\]/LO HI[450] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_209 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[283\] insts\[283\]/LO HI[283] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[4\] insts\[4\]/LO HI[4] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_710 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_242 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[129\] insts\[129\]/LO HI[129] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[413\] insts\[413\]/LO HI[413] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[246\] insts\[246\]/LO HI[246] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[196\] insts\[196\]/LO HI[196] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[363\] insts\[363\]/LO HI[363] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[76\] insts\[76\]/LO HI[76] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[209\] insts\[209\]/LO HI[209] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[111\] insts\[111\]/LO HI[111] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[159\] insts\[159\]/LO HI[159] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[326\] insts\[326\]/LO HI[326] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[39\] insts\[39\]/LO HI[39] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_722 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[443\] insts\[443\]/LO HI[443] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_221 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_1_254 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_4 Xinsts\[276\] insts\[276\]/LO HI[276] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[393\] insts\[393\]/LO HI[393] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[406\] insts\[406\]/LO HI[406] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[141\] insts\[141\]/LO HI[141] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[239\] insts\[239\]/LO HI[239] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[21\] insts\[21\]/LO HI[21] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[356\] insts\[356\]/LO HI[356] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[189\] insts\[189\]/LO HI[189] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[69\] insts\[69\]/LO HI[69] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[104\] insts\[104\]/LO HI[104] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_617 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[221\] insts\[221\]/LO HI[221] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[319\] insts\[319\]/LO HI[319] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[436\] insts\[436\]/LO HI[436] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[171\] insts\[171\]/LO HI[171] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[269\] insts\[269\]/LO HI[269] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[51\] insts\[51\]/LO HI[51] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[386\] insts\[386\]/LO HI[386] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[99\] insts\[99\]/LO HI[99] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[134\] insts\[134\]/LO HI[134] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[301\] insts\[301\]/LO HI[301] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[14\] insts\[14\]/LO HI[14] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[349\] insts\[349\]/LO HI[349] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[251\] insts\[251\]/LO HI[251] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[299\] insts\[299\]/LO HI[299] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_629 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_0_673 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[81\] insts\[81\]/LO HI[81] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[214\] insts\[214\]/LO HI[214] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[429\] insts\[429\]/LO HI[429] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[164\] insts\[164\]/LO HI[164] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[331\] insts\[331\]/LO HI[331] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[44\] insts\[44\]/LO HI[44] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[379\] insts\[379\]/LO HI[379] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[2\] insts\[2\]/LO HI[2] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[281\] insts\[281\]/LO HI[281] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[127\] insts\[127\]/LO HI[127] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[411\] insts\[411\]/LO HI[411] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[244\] insts\[244\]/LO HI[244] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[459\] insts\[459\]/LO HI[459] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[361\] insts\[361\]/LO HI[361] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[194\] insts\[194\]/LO HI[194] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_641 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_0_685 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[74\] insts\[74\]/LO HI[74] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_405 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_1_449 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[207\] insts\[207\]/LO HI[207] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[157\] insts\[157\]/LO HI[157] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[324\] insts\[324\]/LO HI[324] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[37\] insts\[37\]/LO HI[37] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[441\] insts\[441\]/LO HI[441] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_533 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[274\] insts\[274\]/LO HI[274] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[391\] insts\[391\]/LO HI[391] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[404\] insts\[404\]/LO HI[404] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[237\] insts\[237\]/LO HI[237] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_609 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[354\] insts\[354\]/LO HI[354] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[187\] insts\[187\]/LO HI[187] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[67\] insts\[67\]/LO HI[67] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_697 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 Xinsts\[102\] insts\[102\]/LO HI[102] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_417 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[317\] insts\[317\]/LO HI[317] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[434\] insts\[434\]/LO HI[434] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_545 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[267\] insts\[267\]/LO HI[267] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_589 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[384\] insts\[384\]/LO HI[384] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_386 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[97\] insts\[97\]/LO HI[97] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[132\] insts\[132\]/LO HI[132] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[12\] insts\[12\]/LO HI[12] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[347\] insts\[347\]/LO HI[347] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_1_429 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[297\] insts\[297\]/LO HI[297] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[212\] insts\[212\]/LO HI[212] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[162\] insts\[162\]/LO HI[162] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[427\] insts\[427\]/LO HI[427] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_557 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_502 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[42\] insts\[42\]/LO HI[42] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[377\] insts\[377\]/LO HI[377] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_398 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_365 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_321 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[0\] insts\[0\]/LO HI[0] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[125\] insts\[125\]/LO HI[125] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[242\] insts\[242\]/LO HI[242] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[457\] insts\[457\]/LO HI[457] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[192\] insts\[192\]/LO HI[192] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[72\] insts\[72\]/LO HI[72] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[205\] insts\[205\]/LO HI[205] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_569 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_514 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[155\] insts\[155\]/LO HI[155] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[322\] insts\[322\]/LO HI[322] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[35\] insts\[35\]/LO HI[35] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[272\] insts\[272\]/LO HI[272] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_377 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 XFILLER_2_333 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[118\] insts\[118\]/LO HI[118] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_141 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_130 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_8 Xinsts\[402\] insts\[402\]/LO HI[402] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[235\] insts\[235\]/LO HI[235] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_601 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_0_645 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[352\] insts\[352\]/LO HI[352] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[185\] insts\[185\]/LO HI[185] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[65\] insts\[65\]/LO HI[65] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[100\] insts\[100\]/LO HI[100] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[148\] insts\[148\]/LO HI[148] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_526 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_6 Xinsts\[315\] insts\[315\]/LO HI[315] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[28\] insts\[28\]/LO HI[28] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[265\] insts\[265\]/LO HI[265] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[432\] insts\[432\]/LO HI[432] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_345 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[382\] insts\[382\]/LO HI[382] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_2_197 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 XFILLER_2_153 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[95\] insts\[95\]/LO HI[95] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[130\] insts\[130\]/LO HI[130] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[228\] insts\[228\]/LO HI[228] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 XFILLER_0_613 vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__decap_3 XFILLER_0_657 vssd1 vccd1 vssd1 vccd1 sky130_fd_sc_hd__decap_12 Xinsts\[10\] insts\[10\]/LO HI[10] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[178\] insts\[178\]/LO HI[178] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[345\] insts\[345\]/LO HI[345] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[58\] insts\[58\]/LO HI[58] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[462\] insts\[462\]/LO HI[462] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 Xinsts\[295\] insts\[295\]/LO HI[295] vccd1 vssd1 vssd1 vccd1 sky130_fd_sc_hd__conb_1 .ends .subckt sky130_fd_sc_hvl__conb_1 VGND VNB VPWR VPB LO HI R0 VGND LO sky130_fd_pr__res_generic_po w=510000u l=45000u R1 HI VPWR sky130_fd_pr__res_generic_po w=510000u l=45000u .ends .subckt mgmt_protect_hv vccd vdda1 vdda2 mprj2_vdd_logic1 mprj_vdd_logic1 vssa1 vssa2 + vssd Xmprj2_logic_high_hvl vssa2 vssa2 vdda2 vdda2 mprj2_logic_high_hvl/LO mprj2_logic_high_lv/A + sky130_fd_sc_hvl__conb_1 Xmprj_logic_high_hvl vssa1 vssa1 vdda1 vdda1 mprj_logic_high_hvl/LO mprj_logic_high_lv/A + sky130_fd_sc_hvl__conb_1 Xmprj_logic_high_lv mprj_vdd_logic1 mprj_logic_high_lv/A vdda1 vssd vdda1 vssd vdda1 + vssd vccd sky130_fd_sc_hvl__lsbufhv2lv_1 Xmprj2_logic_high_lv mprj2_vdd_logic1 mprj2_logic_high_lv/A vdda2 vssd vdda2 vssd + vdda2 vssd vccd sky130_fd_sc_hvl__lsbufhv2lv_1 .ends .subckt sky130_fd_sc_hd__bufbuf_8 A X VGND VPWR VNB VPB X0 a_318_47# a_206_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR a_318_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR a_206_47# a_318_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_318_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_318_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_318_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_318_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_206_47# a_318_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_318_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_318_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_318_47# a_206_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_318_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_206_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_318_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_206_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR a_318_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND a_206_47# a_318_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND a_318_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND a_318_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND a_318_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 X a_318_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VGND a_318_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 VPWR a_206_47# a_318_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X24 VGND A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 X a_318_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and2b_4 B X A_N VGND VPWR VNB VPB X0 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_33_199# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_33_199# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_27_47# a_33_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_109_47# a_33_199# a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt mgmt_protect caravel_clk2 user1_vcc_powergood user1_vdd_powergood user2_vcc_powergood + user2_vdd_powergood user_irq[0] user_irq[1] user_irq[2] user_irq_core[0] user_irq_core[1] + user_irq_core[2] user_irq_ena[0] user_irq_ena[1] user_irq_ena[2] la_data_in_core[108] + la_data_in_core[109] la_data_in_core[110] la_data_in_core[111] la_data_in_core[112] + la_data_in_core[113] la_data_in_core[114] la_data_in_core[115] la_data_in_core[116] + la_data_in_core[117] la_data_in_core[118] la_data_in_core[119] la_data_in_core[120] + la_data_in_core[121] la_data_in_core[122] la_data_in_core[123] la_data_in_core[124] + la_data_in_core[125] la_data_in_core[126] la_data_in_core[127] la_data_out_core[108] + la_data_out_core[109] la_data_out_core[110] la_data_out_core[111] la_data_out_core[112] + la_data_out_core[113] la_data_out_core[114] la_data_out_core[115] la_data_out_core[116] + la_data_out_core[117] la_data_out_core[118] la_data_out_core[119] la_data_out_core[120] + la_data_out_core[121] la_data_out_core[122] la_data_out_core[123] la_data_out_core[124] + la_data_out_core[125] la_data_out_core[126] la_data_out_core[127] la_oenb_core[107] + la_oenb_core[108] la_oenb_core[109] la_oenb_core[110] la_oenb_core[111] la_oenb_core[112] + la_oenb_core[113] la_oenb_core[114] la_oenb_core[115] la_oenb_core[116] la_oenb_core[117] + la_oenb_core[118] la_oenb_core[119] la_oenb_core[120] la_oenb_core[121] la_oenb_core[122] + la_oenb_core[123] la_oenb_core[124] la_oenb_core[125] la_oenb_core[126] la_oenb_core[127] + user_clock2 la_data_in_core[94] la_data_in_core[95] la_data_in_core[96] la_data_in_core[97] + la_data_in_core[98] la_data_in_core[99] la_data_out_core[87] la_data_out_core[88] + la_data_out_core[89] la_data_out_core[90] la_data_out_core[91] la_data_out_core[92] + la_data_out_core[93] la_data_out_core[94] la_data_out_core[95] la_data_out_core[96] + la_data_out_core[97] la_data_out_core[98] la_data_out_core[99] la_oenb_core[100] + la_oenb_core[101] la_oenb_core[102] la_oenb_core[103] la_oenb_core[104] la_oenb_core[105] + la_oenb_core[106] la_data_out_core[100] la_data_out_core[101] la_data_out_core[102] + la_data_out_core[103] la_data_out_core[104] la_data_out_core[105] la_data_out_core[106] + la_data_out_core[107] la_data_in_core[104] la_data_in_core[105] la_data_in_core[106] + la_data_in_core[107] la_data_in_core[100] la_data_in_core[101] la_data_in_core[102] + la_data_in_core[103] la_data_in_core[88] la_data_in_core[89] la_data_in_core[90] + la_data_in_core[91] la_data_in_core[92] la_oenb_core[87] la_oenb_core[88] la_oenb_core[89] + la_oenb_core[90] la_oenb_core[91] la_oenb_core[92] la_oenb_core[93] la_oenb_core[94] + la_oenb_core[95] la_oenb_core[96] la_oenb_core[97] la_oenb_core[98] la_oenb_core[99] + la_data_in_core[93] la_data_out_core[67] la_data_out_core[68] la_data_out_core[69] + la_data_out_core[70] la_data_out_core[71] la_data_out_core[72] la_data_out_core[73] + la_data_out_core[74] la_data_out_core[75] la_data_out_core[76] la_data_out_core[77] + la_data_out_core[78] la_data_out_core[79] la_data_out_core[80] la_data_out_core[81] + la_data_out_core[82] la_data_out_core[83] la_data_out_core[84] la_data_out_core[85] + la_data_out_core[86] la_data_in_core[87] la_data_in_core[67] la_data_in_core[68] + la_data_in_core[69] la_data_in_core[70] la_data_in_core[71] la_data_in_core[72] + la_data_in_core[73] la_data_in_core[74] la_data_in_core[75] la_data_in_core[76] + la_data_in_core[77] la_data_in_core[78] la_data_in_core[79] la_data_in_core[80] + la_data_in_core[81] la_data_in_core[82] la_data_in_core[83] la_data_in_core[84] + la_data_in_core[85] la_data_in_core[86] la_oenb_core[67] la_oenb_core[68] la_oenb_core[69] + la_oenb_core[70] la_oenb_core[71] la_oenb_core[72] la_oenb_core[73] la_oenb_core[74] + la_oenb_core[75] la_oenb_core[76] la_oenb_core[77] la_oenb_core[78] la_oenb_core[79] + la_oenb_core[80] la_oenb_core[81] la_oenb_core[82] la_oenb_core[83] la_oenb_core[84] + la_oenb_core[85] la_oenb_core[86] la_data_in_core[55] la_data_in_core[56] la_data_in_core[57] + la_data_in_core[58] la_data_in_core[59] la_data_in_core[60] la_oenb_core[46] la_oenb_core[47] + la_oenb_core[48] la_oenb_core[49] la_oenb_core[50] la_oenb_core[51] la_oenb_core[52] + la_oenb_core[53] la_oenb_core[54] la_oenb_core[55] la_oenb_core[56] la_oenb_core[57] + la_oenb_core[58] la_oenb_core[59] la_oenb_core[60] la_oenb_core[61] la_oenb_core[62] + la_oenb_core[63] la_oenb_core[64] la_oenb_core[65] la_oenb_core[66] la_data_in_core[61] + la_data_in_core[62] la_data_in_core[63] la_data_in_core[64] la_data_in_core[65] + la_data_in_core[66] la_data_out_core[64] la_data_out_core[65] la_data_out_core[66] + la_data_out_core[61] la_data_out_core[62] la_data_out_core[63] la_data_in_core[47] + la_data_in_core[48] la_data_in_core[49] la_data_in_core[50] la_data_in_core[51] + la_data_in_core[52] la_data_in_core[53] la_data_in_core[54] la_data_out_core[47] + la_data_out_core[48] la_data_out_core[49] la_data_out_core[50] la_data_out_core[51] + la_data_out_core[52] la_data_out_core[53] la_data_out_core[54] la_data_out_core[55] + la_data_out_core[56] la_data_out_core[57] la_data_out_core[58] la_data_out_core[59] + la_data_out_core[60] la_data_in_core[37] la_data_in_core[38] la_data_in_core[39] + la_data_in_core[40] la_data_in_core[41] la_data_out_core[26] la_data_out_core[27] + la_data_out_core[28] la_data_out_core[29] la_data_out_core[30] la_data_out_core[31] + la_data_out_core[32] la_data_out_core[33] la_data_out_core[34] la_data_out_core[35] + la_data_out_core[36] la_data_out_core[37] la_data_out_core[38] la_data_out_core[39] + la_oenb_core[26] la_oenb_core[27] la_oenb_core[28] la_oenb_core[29] la_oenb_core[30] + la_oenb_core[31] la_oenb_core[32] la_oenb_core[33] la_oenb_core[34] la_oenb_core[35] + la_oenb_core[36] la_oenb_core[37] la_oenb_core[38] la_oenb_core[39] la_oenb_core[40] + la_oenb_core[41] la_oenb_core[42] la_oenb_core[43] la_oenb_core[44] la_oenb_core[45] + la_data_out_core[40] la_data_out_core[41] la_data_out_core[42] la_data_out_core[43] + la_data_out_core[44] la_data_out_core[45] la_data_out_core[46] la_data_in_core[42] + la_data_in_core[43] la_data_in_core[44] la_data_in_core[45] la_data_in_core[46] + la_data_in_core[26] la_data_in_core[27] la_data_in_core[28] la_data_in_core[29] + la_data_in_core[30] la_data_in_core[31] la_data_in_core[32] la_data_in_core[33] + la_data_in_core[34] la_data_in_core[35] la_data_in_core[36] la_data_out_core[17] + la_data_out_core[18] la_data_out_core[19] la_data_out_core[20] la_data_out_core[21] + la_data_out_core[22] la_data_out_core[23] la_oenb_core[12] la_oenb_core[13] la_oenb_core[14] + la_oenb_core[15] la_oenb_core[16] la_oenb_core[17] la_oenb_core[18] la_oenb_core[19] + la_oenb_core[20] la_oenb_core[21] la_oenb_core[22] la_oenb_core[23] la_oenb_core[24] + la_oenb_core[25] la_data_in_core[11] la_oenb_core[5] la_data_in_core[8] la_data_in_core[10] + la_data_in_core[12] la_data_in_core[13] la_data_in_core[14] la_data_in_core[15] + la_data_in_core[16] la_oenb_core[6] la_data_in_core[17] la_data_in_core[18] la_data_in_core[19] + la_data_in_core[9] la_data_in_core[20] la_data_out_core[6] la_data_in_core[21] la_oenb_core[7] + la_data_in_core[22] la_data_in_core[23] la_data_in_core[24] la_data_in_core[25] + la_oenb_core[10] la_data_out_core[24] la_data_out_core[10] la_data_out_core[25] + la_data_in_core[7] la_data_out_core[7] la_oenb_core[8] la_data_in_core[6] la_data_out_core[12] + la_data_out_core[13] la_data_out_core[14] la_data_out_core[9] la_data_out_core[15] + la_data_out_core[16] la_data_out_core[11] la_oenb_core[11] la_oenb_core[9] la_data_out_core[8] + la_data_out_core[1] la_data_in_core[0] la_oenb_core[2] la_data_out_core[0] la_data_in_core[1] + la_data_in_core[2] la_oenb_core[0] la_data_in_core[5] la_data_in_core[4] la_oenb_core[1] + la_data_in_core[3] la_oenb_core[3] la_data_out_core[5] la_data_out_core[4] la_data_out_core[3] + la_data_out_core[2] mprj_adr_o_user[18] mprj_adr_o_user[19] mprj_adr_o_user[20] + mprj_adr_o_user[21] mprj_adr_o_user[22] mprj_adr_o_user[23] mprj_adr_o_user[24] + mprj_adr_o_user[25] mprj_adr_o_user[26] mprj_adr_o_user[27] mprj_adr_o_user[28] + mprj_adr_o_user[29] mprj_adr_o_user[30] mprj_adr_o_user[31] mprj_dat_i_user[17] + mprj_dat_i_user[18] mprj_dat_i_user[19] mprj_dat_i_user[20] mprj_dat_i_user[21] + mprj_dat_i_user[22] mprj_dat_i_user[23] mprj_dat_i_user[24] mprj_dat_i_user[25] + mprj_dat_i_user[26] mprj_dat_i_user[27] mprj_dat_i_user[28] mprj_dat_i_user[29] + mprj_dat_i_user[30] mprj_dat_i_user[31] mprj_dat_o_user[17] mprj_dat_o_user[18] + mprj_dat_o_user[19] mprj_dat_o_user[20] mprj_dat_o_user[21] mprj_dat_o_user[22] + mprj_dat_o_user[23] mprj_dat_o_user[24] mprj_dat_o_user[25] mprj_dat_o_user[26] + mprj_dat_o_user[27] mprj_dat_o_user[28] mprj_dat_o_user[29] mprj_dat_o_user[30] + mprj_dat_o_user[31] la_oenb_core[4] mprj_dat_i_user[1] mprj_adr_o_user[14] mprj_adr_o_user[15] + mprj_adr_o_user[16] mprj_adr_o_user[17] mprj_ack_i_user mprj_adr_o_user[0] mprj_adr_o_user[2] + mprj_adr_o_user[1] mprj_adr_o_user[10] mprj_adr_o_user[3] mprj_dat_i_user[2] mprj_adr_o_user[4] + mprj_adr_o_user[5] mprj_dat_i_user[3] mprj_dat_i_user[4] mprj_dat_i_user[5] mprj_dat_i_user[6] + mprj_dat_i_user[7] mprj_dat_i_user[8] mprj_dat_i_user[9] mprj_dat_o_user[0] mprj_dat_o_user[10] + mprj_dat_o_user[11] mprj_dat_o_user[12] mprj_dat_o_user[13] mprj_dat_o_user[14] + mprj_dat_o_user[15] mprj_dat_o_user[16] mprj_adr_o_user[6] mprj_adr_o_user[7] mprj_adr_o_user[8] + mprj_dat_o_user[1] mprj_adr_o_user[9] mprj_cyc_o_user mprj_dat_i_user[0] mprj_dat_i_user[10] + mprj_dat_i_user[11] mprj_dat_i_user[12] mprj_dat_i_user[13] mprj_dat_i_user[14] + mprj_dat_i_user[15] mprj_dat_i_user[16] mprj_dat_o_user[2] mprj_adr_o_user[11] mprj_adr_o_user[12] + mprj_dat_o_user[3] mprj_dat_o_user[4] mprj_dat_o_user[5] mprj_dat_o_user[6] mprj_dat_o_user[7] + mprj_dat_o_user[8] mprj_dat_o_user[9] mprj_sel_o_user[0] mprj_sel_o_user[1] mprj_sel_o_user[2] + mprj_sel_o_user[3] mprj_stb_o_user mprj_we_o_user user_clock mprj_adr_o_user[13] + user_reset la_data_in_mprj[5] la_data_in_mprj[6] la_data_in_mprj[7] la_data_in_mprj[8] + la_data_in_mprj[9] la_data_in_mprj[0] la_data_in_mprj[10] la_data_in_mprj[11] la_data_in_mprj[12] + la_data_in_mprj[13] la_data_in_mprj[14] la_data_in_mprj[15] la_data_in_mprj[16] + la_data_in_mprj[17] la_data_in_mprj[18] la_data_in_mprj[1] la_data_in_mprj[2] la_data_in_mprj[3] + la_data_in_mprj[4] la_data_out_mprj[0] la_data_out_mprj[10] la_data_out_mprj[11] + la_data_out_mprj[12] la_data_out_mprj[13] la_data_out_mprj[14] la_data_out_mprj[15] + la_data_out_mprj[16] la_data_out_mprj[17] la_data_out_mprj[1] la_data_out_mprj[2] + la_data_out_mprj[3] la_data_out_mprj[4] la_oenb_mprj[0] la_oenb_mprj[10] la_oenb_mprj[11] + la_oenb_mprj[12] la_oenb_mprj[13] la_oenb_mprj[14] la_oenb_mprj[15] la_oenb_mprj[16] + la_oenb_mprj[17] la_oenb_mprj[1] la_oenb_mprj[2] la_oenb_mprj[3] la_oenb_mprj[4] + la_oenb_mprj[5] la_oenb_mprj[6] la_oenb_mprj[7] la_oenb_mprj[8] la_oenb_mprj[9] + la_data_out_mprj[5] la_data_out_mprj[6] la_data_out_mprj[7] la_data_out_mprj[8] + la_data_out_mprj[9] la_iena_mprj[0] la_iena_mprj[10] la_iena_mprj[11] la_iena_mprj[12] + la_iena_mprj[13] la_iena_mprj[14] la_iena_mprj[15] la_iena_mprj[16] la_iena_mprj[17] + la_iena_mprj[1] la_iena_mprj[2] la_iena_mprj[3] la_iena_mprj[4] la_iena_mprj[5] + la_iena_mprj[6] la_iena_mprj[7] la_iena_mprj[8] la_iena_mprj[9] la_data_in_mprj[36] + la_data_in_mprj[37] la_data_in_mprj[20] la_data_in_mprj[21] la_data_in_mprj[22] + la_data_in_mprj[23] la_data_in_mprj[24] la_oenb_mprj[18] la_oenb_mprj[19] la_data_in_mprj[25] + la_oenb_mprj[20] la_oenb_mprj[21] la_oenb_mprj[22] la_oenb_mprj[23] la_oenb_mprj[24] + la_oenb_mprj[25] la_oenb_mprj[26] la_oenb_mprj[27] la_oenb_mprj[28] la_oenb_mprj[29] + la_data_in_mprj[26] la_oenb_mprj[30] la_oenb_mprj[31] la_oenb_mprj[32] la_oenb_mprj[33] + la_oenb_mprj[34] la_oenb_mprj[35] la_oenb_mprj[36] la_oenb_mprj[37] la_data_in_mprj[27] + la_data_in_mprj[28] la_data_in_mprj[29] la_data_in_mprj[19] la_data_out_mprj[18] + la_data_out_mprj[19] la_data_in_mprj[30] la_data_out_mprj[20] la_data_out_mprj[21] + la_data_out_mprj[22] la_data_out_mprj[23] la_data_out_mprj[24] la_data_out_mprj[25] + la_data_out_mprj[26] la_data_out_mprj[27] la_data_out_mprj[28] la_data_out_mprj[29] + la_data_in_mprj[31] la_data_out_mprj[30] la_data_out_mprj[31] la_data_out_mprj[32] + la_iena_mprj[18] la_iena_mprj[19] la_data_out_mprj[33] la_iena_mprj[20] la_iena_mprj[21] + la_iena_mprj[22] la_iena_mprj[23] la_iena_mprj[24] la_iena_mprj[25] la_iena_mprj[26] + la_iena_mprj[27] la_iena_mprj[28] la_iena_mprj[29] la_data_out_mprj[34] la_iena_mprj[30] + la_iena_mprj[31] la_iena_mprj[32] la_iena_mprj[33] la_iena_mprj[34] la_iena_mprj[35] + la_iena_mprj[36] la_iena_mprj[37] la_data_out_mprj[35] la_data_out_mprj[36] la_data_out_mprj[37] + la_data_in_mprj[32] la_data_in_mprj[33] la_data_in_mprj[34] la_data_in_mprj[35] + la_data_in_mprj[38] la_data_in_mprj[39] la_oenb_mprj[38] la_oenb_mprj[39] la_oenb_mprj[40] + la_oenb_mprj[41] la_oenb_mprj[42] la_oenb_mprj[43] la_oenb_mprj[44] la_oenb_mprj[45] + la_oenb_mprj[46] la_oenb_mprj[47] la_oenb_mprj[48] la_oenb_mprj[49] la_data_in_mprj[40] + la_oenb_mprj[50] la_oenb_mprj[51] la_oenb_mprj[52] la_oenb_mprj[53] la_oenb_mprj[54] + la_oenb_mprj[55] la_oenb_mprj[56] la_data_in_mprj[41] la_data_in_mprj[42] la_data_in_mprj[43] + la_data_in_mprj[44] la_data_out_mprj[38] la_data_out_mprj[54] la_data_out_mprj[55] + la_data_out_mprj[56] la_data_out_mprj[57] la_data_out_mprj[39] la_data_in_mprj[45] + la_data_out_mprj[40] la_data_out_mprj[41] la_data_out_mprj[42] la_data_out_mprj[43] + la_data_out_mprj[44] la_data_out_mprj[45] la_data_out_mprj[46] la_data_out_mprj[47] + la_data_out_mprj[48] la_data_out_mprj[49] la_data_in_mprj[46] la_data_out_mprj[50] + la_data_out_mprj[51] la_data_out_mprj[52] la_data_out_mprj[53] la_data_in_mprj[47] + la_data_in_mprj[48] la_data_in_mprj[49] la_data_in_mprj[50] la_data_in_mprj[51] + la_data_in_mprj[55] la_data_in_mprj[56] la_iena_mprj[38] la_iena_mprj[39] la_data_in_mprj[57] + la_iena_mprj[40] la_iena_mprj[41] la_iena_mprj[42] la_iena_mprj[43] la_iena_mprj[44] + la_iena_mprj[45] la_iena_mprj[46] la_iena_mprj[47] la_iena_mprj[48] la_iena_mprj[49] + la_iena_mprj[50] la_iena_mprj[51] la_iena_mprj[52] la_iena_mprj[53] la_iena_mprj[54] + la_iena_mprj[55] la_iena_mprj[56] la_iena_mprj[57] la_data_in_mprj[54] la_data_in_mprj[52] + la_data_in_mprj[53] la_oenb_mprj[66] la_oenb_mprj[67] la_oenb_mprj[68] la_oenb_mprj[69] + la_data_in_mprj[64] la_oenb_mprj[70] la_oenb_mprj[71] la_oenb_mprj[72] la_oenb_mprj[73] + la_oenb_mprj[74] la_oenb_mprj[75] la_oenb_mprj[76] la_data_in_mprj[62] la_data_in_mprj[63] + la_oenb_mprj[57] la_data_in_mprj[65] la_oenb_mprj[58] la_oenb_mprj[59] la_data_in_mprj[66] + la_data_in_mprj[67] la_data_in_mprj[68] la_data_in_mprj[69] la_data_in_mprj[61] + la_data_in_mprj[70] la_data_in_mprj[71] la_data_in_mprj[72] la_data_in_mprj[73] + la_data_in_mprj[74] la_data_in_mprj[75] la_data_in_mprj[76] la_oenb_mprj[60] la_data_out_mprj[58] + la_data_out_mprj[59] la_oenb_mprj[61] la_data_out_mprj[60] la_data_out_mprj[61] + la_data_out_mprj[62] la_data_out_mprj[63] la_data_out_mprj[64] la_data_out_mprj[65] + la_data_out_mprj[66] la_data_out_mprj[67] la_data_out_mprj[68] la_data_out_mprj[69] + la_data_in_mprj[58] la_oenb_mprj[62] la_data_out_mprj[70] la_data_out_mprj[71] la_data_out_mprj[72] + la_data_out_mprj[73] la_data_out_mprj[74] la_data_out_mprj[75] la_data_out_mprj[76] + la_iena_mprj[58] la_iena_mprj[59] caravel_clk la_iena_mprj[60] la_iena_mprj[61] + la_iena_mprj[62] la_iena_mprj[63] la_iena_mprj[64] la_iena_mprj[65] la_iena_mprj[66] + la_iena_mprj[67] la_iena_mprj[68] la_iena_mprj[69] caravel_rstn la_iena_mprj[70] + la_iena_mprj[71] la_iena_mprj[72] la_iena_mprj[73] la_iena_mprj[74] la_iena_mprj[75] + la_iena_mprj[76] la_data_in_mprj[59] la_oenb_mprj[63] la_data_in_mprj[60] la_oenb_mprj[64] + la_oenb_mprj[65] la_iena_mprj[80] la_iena_mprj[81] la_iena_mprj[82] la_iena_mprj[83] + la_iena_mprj[84] la_iena_mprj[85] la_iena_mprj[86] la_iena_mprj[87] la_iena_mprj[88] + la_iena_mprj[89] la_iena_mprj[90] la_iena_mprj[91] la_iena_mprj[92] la_iena_mprj[93] + la_iena_mprj[94] la_iena_mprj[95] la_data_out_mprj[77] la_data_out_mprj[78] la_data_out_mprj[79] + la_data_out_mprj[80] la_data_out_mprj[81] la_data_out_mprj[82] la_data_out_mprj[83] + la_data_out_mprj[84] la_data_out_mprj[85] la_data_out_mprj[86] la_data_out_mprj[87] + la_data_out_mprj[88] la_data_out_mprj[89] la_data_out_mprj[90] la_data_out_mprj[91] + la_data_out_mprj[92] la_data_out_mprj[93] la_data_out_mprj[94] la_data_out_mprj[95] + la_data_out_mprj[96] la_oenb_mprj[77] la_oenb_mprj[78] la_oenb_mprj[79] la_oenb_mprj[80] + la_oenb_mprj[81] la_oenb_mprj[82] la_oenb_mprj[83] la_oenb_mprj[84] la_oenb_mprj[85] + la_oenb_mprj[86] la_oenb_mprj[87] la_oenb_mprj[88] la_oenb_mprj[89] la_oenb_mprj[90] + la_oenb_mprj[91] la_oenb_mprj[92] la_oenb_mprj[93] la_oenb_mprj[94] la_oenb_mprj[95] + la_data_in_mprj[80] la_data_in_mprj[81] la_data_in_mprj[82] la_data_in_mprj[83] + la_data_in_mprj[84] la_data_in_mprj[85] la_data_in_mprj[86] la_data_in_mprj[87] + la_data_in_mprj[88] la_data_in_mprj[89] la_data_in_mprj[90] la_data_in_mprj[91] + la_data_in_mprj[92] la_data_in_mprj[93] la_data_in_mprj[94] la_data_in_mprj[95] + la_data_in_mprj[96] la_data_in_mprj[77] la_data_in_mprj[78] la_data_in_mprj[79] + la_iena_mprj[77] la_iena_mprj[78] la_iena_mprj[79] la_iena_mprj[110] la_oenb_mprj[96] + la_oenb_mprj[97] la_oenb_mprj[98] la_oenb_mprj[99] la_iena_mprj[111] la_iena_mprj[112] + la_iena_mprj[113] la_iena_mprj[114] la_iena_mprj[115] la_data_in_mprj[116] la_iena_mprj[96] + la_iena_mprj[97] la_iena_mprj[98] la_iena_mprj[99] la_data_out_mprj[97] la_data_out_mprj[98] + la_data_out_mprj[99] la_iena_mprj[100] la_iena_mprj[101] la_iena_mprj[102] la_iena_mprj[103] + la_data_in_mprj[97] la_data_in_mprj[98] la_data_in_mprj[99] la_data_in_mprj[101] + la_data_in_mprj[102] la_data_in_mprj[103] la_data_in_mprj[104] la_data_in_mprj[105] + la_data_in_mprj[106] la_data_in_mprj[107] la_data_in_mprj[108] la_data_in_mprj[109] + la_data_in_mprj[100] la_data_in_mprj[110] la_data_in_mprj[111] la_data_in_mprj[112] + la_data_in_mprj[113] la_data_in_mprj[114] la_data_in_mprj[115] la_iena_mprj[104] + la_iena_mprj[105] la_data_out_mprj[100] la_data_out_mprj[101] la_data_out_mprj[102] + la_data_out_mprj[103] la_data_out_mprj[104] la_data_out_mprj[105] la_data_out_mprj[106] + la_data_out_mprj[107] la_data_out_mprj[108] la_data_out_mprj[109] la_iena_mprj[106] + la_data_out_mprj[110] la_data_out_mprj[111] la_data_out_mprj[112] la_data_out_mprj[113] + la_data_out_mprj[114] la_data_out_mprj[115] la_iena_mprj[107] la_iena_mprj[108] + la_oenb_mprj[100] la_oenb_mprj[101] la_oenb_mprj[102] la_oenb_mprj[103] la_oenb_mprj[104] + la_oenb_mprj[105] la_oenb_mprj[106] la_oenb_mprj[107] la_oenb_mprj[108] la_oenb_mprj[109] + la_iena_mprj[109] la_oenb_mprj[110] la_oenb_mprj[111] la_oenb_mprj[112] la_oenb_mprj[113] + la_oenb_mprj[114] la_oenb_mprj[115] la_data_in_mprj[118] la_data_in_mprj[119] la_data_in_mprj[120] + la_data_in_mprj[121] la_data_in_mprj[122] mprj_cyc_o_core la_data_in_mprj[123] mprj_dat_i_core[0] + mprj_dat_i_core[1] mprj_dat_i_core[2] mprj_dat_i_core[3] mprj_dat_i_core[4] mprj_dat_i_core[5] + mprj_dat_i_core[6] mprj_dat_i_core[7] la_data_in_mprj[124] la_data_in_mprj[125] + la_data_in_mprj[126] la_data_in_mprj[127] mprj_adr_o_core[1] mprj_adr_o_core[2] + mprj_adr_o_core[3] mprj_adr_o_core[4] mprj_adr_o_core[5] mprj_adr_o_core[6] mprj_adr_o_core[7] + la_iena_mprj[125] mprj_dat_o_core[0] mprj_dat_o_core[1] mprj_dat_o_core[2] mprj_dat_o_core[3] + mprj_dat_o_core[4] mprj_dat_o_core[5] mprj_dat_o_core[6] mprj_dat_o_core[7] la_iena_mprj[126] + la_iena_mprj[127] la_data_out_mprj[126] la_data_out_mprj[127] la_data_out_mprj[123] + la_data_out_mprj[120] la_data_out_mprj[116] la_data_out_mprj[117] la_data_out_mprj[118] + la_iena_mprj[122] la_data_out_mprj[121] la_iena_mprj[121] la_data_out_mprj[124] + la_data_out_mprj[122] la_iena_mprj[116] la_iena_mprj[117] la_iena_mprj[118] la_data_in_mprj[117] + la_iena_mprj[119] la_data_out_mprj[125] la_iena_mprj[120] la_iena_mprj[123] mprj_ack_i_core + la_iena_mprj[124] mprj_adr_o_core[0] la_oenb_mprj[116] la_oenb_mprj[117] la_oenb_mprj[118] + la_oenb_mprj[119] mprj_sel_o_core[0] mprj_sel_o_core[1] mprj_sel_o_core[2] mprj_sel_o_core[3] + la_data_out_mprj[119] la_oenb_mprj[120] la_oenb_mprj[121] la_oenb_mprj[122] mprj_stb_o_core + la_oenb_mprj[123] mprj_we_o_core la_oenb_mprj[124] la_oenb_mprj[125] la_oenb_mprj[126] + la_oenb_mprj[127] mprj_dat_o_core[16] mprj_dat_o_core[17] mprj_dat_o_core[18] mprj_dat_o_core[19] + mprj_dat_i_core[28] mprj_dat_o_core[20] mprj_dat_o_core[21] mprj_dat_o_core[22] + mprj_dat_o_core[23] mprj_dat_o_core[24] mprj_dat_o_core[25] mprj_dat_o_core[26] + mprj_dat_o_core[27] mprj_dat_o_core[28] mprj_dat_o_core[29] mprj_dat_i_core[29] + mprj_dat_o_core[30] mprj_dat_o_core[31] mprj_dat_i_core[10] mprj_dat_i_core[30] + mprj_dat_i_core[31] mprj_dat_i_core[11] mprj_dat_i_core[12] mprj_dat_o_core[8] mprj_dat_o_core[9] + mprj_dat_i_core[13] mprj_dat_i_core[14] mprj_dat_i_core[15] mprj_dat_i_core[8] mprj_dat_i_core[9] + mprj_dat_i_core[16] mprj_dat_i_core[17] mprj_dat_i_core[18] mprj_dat_i_core[19] + mprj_adr_o_core[14] mprj_adr_o_core[15] mprj_adr_o_core[16] mprj_adr_o_core[17] + mprj_adr_o_core[18] mprj_adr_o_core[19] mprj_adr_o_core[13] mprj_adr_o_core[20] + mprj_adr_o_core[21] mprj_adr_o_core[22] mprj_adr_o_core[23] mprj_adr_o_core[24] + mprj_adr_o_core[25] mprj_adr_o_core[26] mprj_adr_o_core[27] mprj_adr_o_core[28] + mprj_adr_o_core[10] mprj_adr_o_core[11] mprj_adr_o_core[12] mprj_adr_o_core[29] + mprj_dat_i_core[20] mprj_adr_o_core[30] mprj_adr_o_core[31] mprj_iena_wb mprj_dat_i_core[21] + mprj_dat_i_core[22] mprj_dat_i_core[23] mprj_dat_i_core[24] mprj_dat_i_core[25] + mprj_adr_o_core[8] mprj_adr_o_core[9] mprj_dat_i_core[26] mprj_dat_i_core[27] mprj_dat_o_core[10] + mprj_dat_o_core[11] mprj_dat_o_core[12] mprj_dat_o_core[13] mprj_dat_o_core[14] + mprj_dat_o_core[15] vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd2 vccd vssd vssd1 XANTENNA_wire1828_A wire1828/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_3940 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1891 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3984 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2489 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_461 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1389 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1031 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_1665 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[34\]_A la_data_out_core[34] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1676 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1075 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4563 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_2262 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3851 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3895 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1655 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1902 vccd vssd wire1902/X wire1902/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1425 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1913 vccd vssd _257_/A wire1913/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1924 vccd vssd _335_/A wire1924/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1935 vccd vssd _332_/A wire1935/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1946 vccd vssd _191_/A wire1947/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_929 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_4312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1957 vccd vssd wire1957/X wire1957/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3691 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1968 vccd vssd _176_/A wire1969/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1979 vccd vssd _169_/A wire1979/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_45_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input127_A la_data_out_mprj[96] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2044_A wire2044/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1232 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_501_ _501_/X _501_/B _501_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_202 _349_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_213 _533_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_224 wire1985/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1265 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_235 _563_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_246 wire2190/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_257 _256_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_432_ _560_/A _432_/X _432_/C _432_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_26_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_363_ vccd vssd _363_/A _363_/X _363_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_35_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2119 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input92_A la_data_out_mprj[64] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_294_ vccd vssd _294_/A _294_/X _294_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_48_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2542 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_800 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[8\] mprj_dat_i_user[8] max_cap1456/X _122_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_6_855 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4327 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[25\]_A la_data_out_core[25] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_4051 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1419 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3350 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4095 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2958 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3455 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_582 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2721 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3488 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output513_A wire1292/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_2579 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3132 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1311_A wire1312/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output882_A wire1066/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1409_A _319_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_3067 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[25\] _008_/A la_data_out_core[25] _188_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_53_1621 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_2317 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_1632 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_2486 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1031 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1778_A wire1779/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[16\]_A la_data_out_core[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1974 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4067 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[100\]_A la_data_out_core[100] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XANTENNA__304__A _304_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1945_A wire1945/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2621 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_3377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput467 wire1212/X la_data_in_core[103] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput478 _482_/X la_data_in_core[113] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3399 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput489 wire1205/X la_data_in_core[123] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2435 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1209 vccd vssd wire1209/X _475_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2479 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3831 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2253 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_1057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3792 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__490__A_N _618_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_4242 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4128 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1115 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2152 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__214__A _214_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_313 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2161_A wire2162/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input244_A la_iena_mprj[86] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2259_A wire2260/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1710 vccd vssd _559_/A wire1710/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1721 vccd vssd _527_/A wire1721/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1732 vccd vssd _612_/A wire1732/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1743 vccd vssd _191_/B wire1743/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1255 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1754 vccd vssd _440_/C wire1754/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input411_A mprj_adr_o_core[30] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1765 vccd vssd wire1765/X wire1765/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1776 vccd vssd _383_/B wire1777/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_1119 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1787 vccd vssd wire1787/X wire1787/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1798 vccd vssd _374_/B wire1799/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_707 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4006 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4028 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3316 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_3327 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_415_ _543_/A _415_/X _415_/C _415_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_32_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2041 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_486 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_346_ _346_/X _346_/B _346_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 X_277_ _277_/X _277_/B _277_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3972 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output463_A wire1294/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4135 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1094_A wire1095/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4179 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2700 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output728_A _605_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1227 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_880 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1359_A wire1360/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_2540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_523 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1526_A wire1527/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_2343 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3099 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_2437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_545 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1895_A wire1896/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2163 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4448 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_946 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire979_A wire980/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_489 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__034__A _034_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3130 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_2519 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3016 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_2451 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3904 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3832 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2495 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1006 vccd vssd wire1006/X wire1007/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1017 vccd vssd wire1017/X wire1018/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1028 vccd vssd wire1028/X wire1029/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1039 vccd vssd wire1039/X wire1040/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3625 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_1302 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__209__A _209_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_570 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_200_ vccd vssd _200_/A _200_/X _200_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_23_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire2007_A wire2008/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_131_ _131_/Y _131_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_32_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input194_A la_iena_mprj[40] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_97 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4411 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_062_ _062_/Y _062_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_32_1579 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_4505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__386__A_N _514_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input361_A la_oenb_mprj[76] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input459_A mprj_we_o_core vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input55_A la_data_out_mprj[30] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4032 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__598__B _598_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_1339 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2230 vccd vssd _473_/B wire2231/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2241 vccd vssd wire2241/X wire2241/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2252 vccd vssd _457_/B wire2253/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2263 vccd vssd wire2263/X wire2264/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2274 vccd vssd wire2274/X wire2274/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1540 vccd vssd _349_/B wire1541/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2285 vccd vssd _441_/B wire2285/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1551 vccd vssd wire1551/X wire1552/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2296 vccd vssd _432_/B wire2296/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1562 vccd vssd wire1562/X wire1563/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1573 vccd vssd wire1573/X wire1574/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1584 vccd vssd wire1584/X wire1585/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1595 vccd vssd wire1595/X wire1596/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_589 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__119__A _119_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3293 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_2401 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output580_A wire1223/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1107_A wire1108/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_329_ _329_/X _329_/B _329_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_30_776 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_2792 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output845_A _596_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1476_A _246_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2839 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[92\] wire1125/A la_data_out_core[92] wire1467/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_45_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1643_A wire1644/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1046 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2657 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__301__B _301_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1810_A wire1811/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_2256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1522 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__029__A _029_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3956 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4212 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_231 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1270 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_1221 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1298 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2327 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3927 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__211__B _211_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1591 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2178 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_832 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2124_A wire2125/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input207_A la_iena_mprj[52] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_1121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_3455 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2601 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3319 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_1165 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_1007 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1187 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_114_ _114_/Y _114_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_10_2331 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_045_ _045_/Y _045_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2364 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_1630 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3623 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_1685 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1169 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2060 vccd vssd _599_/B wire2061/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2071 vccd vssd wire2071/X wire2072/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2082 vccd vssd _590_/B wire2082/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1057_A wire1058/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2093 vccd vssd wire2093/X wire2094/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2532 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__401__A_N _529_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1370 vccd vssd wire1370/X wire1371/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_342 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1381 vccd vssd wire1381/X _343_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_53_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1392 vccd vssd wire1392/X _339_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1820 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1224_A _458_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output795_A wire1156/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4532 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[20\] mprj_dat_i_user[20] load_slew1458/X _134_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_50_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1593_A wire1594/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1438 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1760_A wire1760/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__312__A _312_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3019 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1753 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_1617 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_621 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_3764 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_529 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1338 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4064 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__206__B _206_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2651 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4403 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1994 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2229 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2074_A wire2075/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input157_A la_iena_mprj[122] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput301 _518_/A la_oenb_mprj[21] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA__424__A_N _552_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput312 vccd vssd _400_/A_N la_oenb_mprj[31] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput323 vccd vssd _538_/A la_oenb_mprj[41] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_44_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput334 vccd vssd wire1712/A la_oenb_mprj[51] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_4276 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput345 _558_/A la_oenb_mprj[61] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput356 vccd vssd wire1701/A la_oenb_mprj[71] vssd vccd sky130_fd_sc_hd__buf_6 Xinput367 vccd vssd wire1691/A la_oenb_mprj[81] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input324_A la_oenb_mprj[42] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput378 vccd vssd _588_/A la_oenb_mprj[91] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_40_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput389 vccd vssd wire1674/A mprj_adr_o_core[10] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3597 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2852 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input18_A la_data_out_mprj[112] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_684 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_695 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_594_ _594_/X _594_/B _594_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_21_1088 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3230 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_3241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3138 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1774 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1184 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_5 _399_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput808 _562_/X la_oenb_core[65] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput819 _572_/X la_oenb_core[75] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 X_028_ _028_/A _028_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_10_1471 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output543_A wire1231/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__132__A _132_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1174_A _523_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output710_A _075_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1341_A wire1342/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1439_A _302_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[55\] _038_/A la_data_out_core[55] _218_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_1_2340 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_2028 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1606_A wire1606/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_153 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3904 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_2206 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3915 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2217 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3926 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2348 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_186 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__307__A _307_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1975_A wire1975/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_3672 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire961_A wire962/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1814 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__447__A_N _447_/A_N vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1279 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_2433 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_3189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1721 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1815 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_4480 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3840 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1414 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_22_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1425 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3848 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3561 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__217__A _217_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2470 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2208 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input274_A la_oenb_mprj[112] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2191_A wire2192/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2219 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2289_A wire2290/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input441_A mprj_dat_o_core[28] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_3587 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput120 _377_/C la_data_out_mprj[8] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_20_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput131 _378_/C la_data_out_mprj[9] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput142 _272_/B la_iena_mprj[109] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_27_1297 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput153 vccd vssd _282_/B la_iena_mprj[119] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_7_1369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3361 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput164 _176_/B la_iena_mprj[13] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput175 _186_/B la_iena_mprj[23] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput186 _196_/B la_iena_mprj[33] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_18_4004 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3383 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput197 _206_/B la_iena_mprj[43] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_48_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_153 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_577_ _577_/X _577_/B _577_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2635 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output493_A wire1201/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2554 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input85_A la_data_out_mprj[58] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_1891 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_2587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4339 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4102 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4063 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_2926 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3401 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3592 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_561 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XFILLER_20_605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output875_A _310_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[18\] _001_/A la_data_out_core[18] _181_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_31_3388 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1673_A wire1674/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[100\]_B _263_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__304__B _304_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3104 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1840_A wire1840/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput468 wire1211/X la_data_in_core[104] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xoutput479 _483_/X la_data_in_core[114] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1921 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2447 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3091 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__320__A _320_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_4533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_9_1976 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1818 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1998 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_4483 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2232 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4508 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3887 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_911 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_3818 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4254 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3564 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_1127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__214__B _214_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1485 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_336 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_2121 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3671 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__230__A _230_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1700 wire1700/A _569_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1711 vccd vssd _555_/A wire1711/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1223 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1722 vccd vssd _526_/A wire1722/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input237_A la_iena_mprj[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1733 vccd vssd _611_/A wire1733/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1744 vccd vssd _481_/C input18/X vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_46_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1755 vccd vssd _304_/A wire1755/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1278 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1766 vccd vssd _387_/B wire1767/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1777 vccd vssd wire1777/X wire1777/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1788 vccd vssd _377_/B wire1789/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_248 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1799 vccd vssd wire1799/X wire1799/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input404_A mprj_adr_o_core[24] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_414_ _542_/A _414_/X _414_/C _414_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_32_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_345_ _345_/X _345_/B _345_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_276_ _276_/X _276_/B _276_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_26_4103 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2395 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3984 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4147 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3468 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1087_A wire1088/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_2734 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1239 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1009 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3231 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1254_A _408_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_2355 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1873 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1421_A _314_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1519_A wire1519/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_2399 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_579 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_50_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_914 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1790_A wire1791/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_1403 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1888_A wire1888/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_1414 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_446 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__315__A _315_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3039 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__050__A _050_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1007 vccd vssd wire1007/X wire1008/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1018 vccd vssd wire1018/X wire1019/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2288 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3949 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1029 vccd vssd wire1029/X wire1030/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3684 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_207 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__209__B _209_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_582 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_1369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_3372 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_130_ _130_/Y _130_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_7_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_1082 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__225__A _225_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_061_ _061_/Y _061_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_27_4423 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input187_A la_iena_mprj[34] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_1867 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input354_A la_oenb_mprj[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2271_A wire2272/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4000 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input48_A la_data_out_mprj[24] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2220 vccd vssd _478_/B wire2221/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2231 vccd vssd wire2231/X wire2231/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2242 vccd vssd _466_/B wire2243/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_4088 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire2253 vccd vssd wire2253/X wire2254/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3354 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2850 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2264 vccd vssd wire2264/X wire2264/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_1272 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1530 vccd vssd _354_/B wire1531/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2275 vccd vssd _449_/B wire2276/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2631 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1541 vccd vssd wire1541/X wire1541/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2286 vccd vssd _440_/B wire2286/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1552 vccd vssd wire1552/X wire1552/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2297 vccd vssd _307_/A wire2297/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1563 vccd vssd wire1563/X wire1563/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1574 vccd vssd wire1574/X wire1575/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1585 vccd vssd wire1585/X wire1586/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1596 vccd vssd wire1596/X wire1596/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1002_A wire1003/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_328_ _328_/X _328_/B _328_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_output573_A _453_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_1182 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_259_ vccd vssd _259_/A _259_/X _259_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_7_940 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output740_A _616_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_995 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output838_A _589_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1371_A wire1372/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1469_A _253_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1003 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__480__A_N _608_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[85\] la_data_out_core[85] wire1474/X wire1130/A vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_8 XFILLER_44_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1636_A wire1636/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1803_A wire1803/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3902 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3815 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_869 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3837 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1578 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4360 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3968 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_379 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4224 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3692 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_4268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_243 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_1211 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3556 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__045__A _045_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_1255 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_1266 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_4320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_626 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4364 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4458 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2146 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_1395 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_825 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_1701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_1723 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input102_A la_data_out_mprj[73] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2117_A wire2117/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2023 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1019 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_1199 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_113_ _113_/Y _113_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_044_ _044_/A _044_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_3099 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4231 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1620 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_2387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4275 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3635 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3416 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2873 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3212 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2050 vccd vssd _604_/B wire2051/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3234 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2061 vccd vssd wire2061/X wire2061/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2072 vccd vssd wire2072/X wire2073/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2083 vccd vssd _589_/B wire2083/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3184 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2094 vccd vssd wire2094/X wire2094/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1360 vccd vssd wire1360/X _350_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1371 vccd vssd wire1371/X wire1372/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1382 vccd vssd wire1382/X wire1383/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1393 vccd vssd wire1393/X wire1394/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_376 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_2588 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1865 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output690_A _057_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output788_A _544_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2107 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output955_A wire1453/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_2298 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_wb_dat_gates\[13\] mprj_dat_i_user[13] split4/A _127_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_28_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3898 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__312__B _312_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3156 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_3950 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[1\]_A mprj_dat_i_user[1] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2258 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[111\] la_data_out_core[111] _274_/X _094_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_1_3790 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2054 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__376__A_N _504_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_858 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_869 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_677 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_to_mprj_in_gates\[1\]_A la_data_out_core[1] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3776 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_187 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4032 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_541 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4076 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3364 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__503__A _503_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4415 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3703 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_924 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_1413 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput302 _519_/A la_oenb_mprj[22] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_4172 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput313 vccd vssd wire1719/A la_oenb_mprj[32] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_4255 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput324 _539_/A la_oenb_mprj[42] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput335 vccd vssd _549_/A la_oenb_mprj[52] vssd vccd sky130_fd_sc_hd__buf_4 XANTENNA_wire2067_A wire2067/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput346 vccd vssd wire1710/A la_oenb_mprj[62] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3471 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput357 vccd vssd wire1700/A la_oenb_mprj[72] vssd vccd sky130_fd_sc_hd__buf_6 Xinput368 vccd vssd wire1690/A la_oenb_mprj[82] vssd vccd sky130_fd_sc_hd__buf_6 Xinput379 vccd vssd _589_/A la_oenb_mprj[92] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_4208 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input317_A la_oenb_mprj[36] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2234_A wire2235/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_593_ _593_/X _593_/B _593_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2541 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_563 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1786 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_6 _402_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2151 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_3708 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1196 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_2913 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput809 _563_/X la_oenb_core[66] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 X_027_ _027_/A _027_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_46_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2979 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output536_A wire1243/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2670 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_3257 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1167_A wire1168/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3020 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2797 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_990 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__399__A_N _527_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1334_A wire1335/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2007 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1190 vccd vssd wire1190/X _507_/X vssd vccd sky130_fd_sc_hd__buf_6 Xuser_to_mprj_in_gates\[48\] _031_/A la_data_out_core[48] _211_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_34_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2396 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_806 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1501_A wire1502/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2327 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3938 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__307__B _307_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1350 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1870_A wire1871/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1968_A wire1969/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__323__A _323_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2489 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1755 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4492 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3780 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4132 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_4187 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1873 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3584 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_3475 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1005 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_4485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1147 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3150 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__233__A _233_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2184_A wire2184/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input267_A la_oenb_mprj[106] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_710 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input434_A mprj_dat_o_core[21] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput110 vccd vssd wire1753/A la_data_out_mprj[80] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_2926 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput121 _459_/C la_data_out_mprj[90] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput132 _625_/B la_iena_mprj[0] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_input30_A la_data_out_mprj[123] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput143 _173_/B la_iena_mprj[10] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput154 _174_/B la_iena_mprj[11] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput165 _177_/B la_iena_mprj[14] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput176 _187_/B la_iena_mprj[24] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput187 _197_/B la_iena_mprj[34] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_2650 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput198 vccd vssd _207_/B la_iena_mprj[44] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_40_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4038 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2040 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_677 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1993 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_576_ _576_/X _576_/B _576_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_16_165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1214 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_160 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_171 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_182 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output486_A _489_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output653_A _023_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput606 _096_/Y la_data_in_mprj[113] vssd vccd vssd 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput469 wire1210/X la_data_in_core[105] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__601__A _601_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_2415 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3070 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2509 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1833_A wire1833/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_2459 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__320__B _320_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2288 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4271 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__048__A _048_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4266 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_1843 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1231 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_797 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3429 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_1139 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2187 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4215 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__511__A _511_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_2144 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3683 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__230__B _230_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3777 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1701 vccd vssd _568_/A wire1701/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1712 vccd vssd _548_/A wire1712/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1723 vccd vssd _295_/A_N wire1724/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1734 vccd vssd _610_/A wire1734/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1745 vccd vssd _457_/C wire1745/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4100 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input132_A la_iena_mprj[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1756 vccd vssd _394_/B wire1757/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_216 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2147_A wire2148/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_4122 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1767 vccd vssd wire1767/X wire1767/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1778 vccd vssd _382_/B wire1779/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1789 vccd vssd wire1789/X wire1789/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_400 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1097 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_413_ _541_/A _413_/X _413_/C _413_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_53_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_344_ vccd vssd _344_/A _344_/X _344_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_53_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_275_ _275_/X _275_/B _275_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_2997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4115 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3996 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4159 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3447 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_1146 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_2025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3171 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output616_A _105_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1247_A _415_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_2367 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1414_A wire1415/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[30\] _013_/A la_data_out_core[30] _193_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_33_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1783_A wire1783/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__315__B _315_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1950_A wire1950/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1183 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3154 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__331__A _331_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1008 vccd vssd wire1008/X wire1009/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1774 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1019 vccd vssd wire1019/X wire1020/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_9_1796 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_5_1649 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_4397 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_219 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_2984 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_580 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4030 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_ack_gate_A mprj_ack_i_user vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_753 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_594 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__506__A _506_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1673 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3237 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_1094 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__225__B _225_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_060_ _060_/A _060_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_49_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2536 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2097_A wire2098/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_145 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__241__A _241_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2264_A wire2264/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input347_A la_oenb_mprj[63] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2210 vccd vssd wire2210/X wire2211/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_4056 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2221 vccd vssd wire2221/X wire2221/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_3491 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3563 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2232 vccd vssd _472_/B wire2233/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2243 vccd vssd wire2243/X wire2243/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2254 vccd vssd wire2254/X wire2254/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1520 vccd vssd _361_/B wire1520/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2265 vccd vssd _453_/B wire2266/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1531 vccd vssd wire1531/X wire1531/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2276 vccd vssd wire2276/X wire2276/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1542 vccd vssd _348_/B wire1543/X vssd vccd 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sky130_fd_sc_hd__decap_4 XFILLER_34_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2550 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3159 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_2583 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2594 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_327_ _327_/X _327_/B _327_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_30_789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_258_ _258_/X _258_/B _258_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3760 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output566_A _447_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_189_ vccd vssd _189_/X _189_/B _189_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_6_473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1197_A _500_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output733_A _609_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3108 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3277 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1364_A wire1365/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1059 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output900_A wire982/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_2418 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[78\] wire1137/A la_data_out_core[78] wire1481/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_22_2429 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1629_A wire1629/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3950 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_3914 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_325 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3827 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_358 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1998_A wire1999/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire984_A wire985/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__326__A _326_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3524 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1261 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_789 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3568 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_277 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[91\]_A la_data_out_core[91] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__061__A _061_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_4332 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4437 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4376 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3725 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_1341 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3460 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1735 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2012_A wire2012/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__236__A _236_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_2669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_2057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input297_A la_oenb_mprj[18] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_112_ _112_/Y _112_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_51_1957 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2079 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_237 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_2311 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[82\]_A la_data_out_core[82] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_043_ _043_/A _043_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_27_4243 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_1643 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input60_A la_data_out_mprj[35] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3603 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__402__C _402_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2924 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1116 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_3130 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2040 vccd vssd _608_/B wire2041/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2051 vccd vssd wire2051/X wire2051/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2062 vccd vssd _598_/B wire2063/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2073 vccd vssd wire2073/X wire2073/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2084 vccd vssd _588_/B wire2085/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1350 vccd vssd wire1350/X wire1351/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3196 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2095 vccd vssd _582_/B wire2096/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1361 vccd vssd wire1361/X wire1362/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3268 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1372 vccd vssd wire1372/X _346_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1383 vccd vssd wire1383/X wire1384/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2545 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1991 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1394 vccd vssd wire1394/X _338_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_837 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_1855 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_561 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1112_A wire1113/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output683_A _051_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_4556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output850_A wire1414/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_1407 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[73\]_A la_data_out_core[73] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output948_A wire1426/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1481_A _241_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1579_A wire1580/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2649 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3113 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_3052 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3063 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1746_A wire1746/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[1\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_2373 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1913_A wire1913/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[104\] la_data_out_core[104] _267_/X _087_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_26_837 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_100 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3613 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_667 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1354 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_155 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_4000 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_4180 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3788 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__056__A _056_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_4044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1610 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3332 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4088 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1031 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[64\]_A la_data_out_core[64] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_2664 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__503__B _503_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4427 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_903 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3715 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2209 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_402 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3759 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput303 vccd vssd _520_/A la_oenb_mprj[23] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_44_2473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3511 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput314 _530_/A la_oenb_mprj[33] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_9_2091 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput325 vccd vssd _540_/A la_oenb_mprj[43] vssd vccd sky130_fd_sc_hd__buf_6 Xinput336 vccd vssd _550_/A la_oenb_mprj[53] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_40_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput347 vccd vssd wire1709/A la_oenb_mprj[63] vssd vccd sky130_fd_sc_hd__buf_6 Xinput358 vccd vssd wire1699/A la_oenb_mprj[73] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3483 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput369 vccd vssd wire1689/A la_oenb_mprj[83] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_1024 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xload_slew1457 load_slew1458/X split4/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_1_1129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input212_A la_iena_mprj[57] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_592_ _592_/X _592_/B _592_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire2227_A wire2227/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_347 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__470__A_N _598_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3276 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_575 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_to_mprj_in_gates\[55\]_A la_data_out_core[55] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_568 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_7 _527_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_4051 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_026_ _026_/A _026_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_10_2174 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__413__B _413_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4095 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2710 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2502 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output529_A wire1249/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1062_A wire1063/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_2629 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3076 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1180 vccd vssd wire1180/X _517_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1191 vccd vssd wire1191/X _506_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2364 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1327_A wire1328/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output898_A wire992/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1031 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4364 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2506 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2539 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_1805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_1362 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[46\]_A la_data_out_core[46] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__604__A _604_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1838 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_1849 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__323__B _323_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1002 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_4460 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2253 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1300 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3828 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__493__A_N _621_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_4144 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_656 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_453 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_4106 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3421 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1830 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2731 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_3427 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4442 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_1159 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[37\]_A la_data_out_core[37] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__514__A _514_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[121\]_A la_data_out_core[121] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_8_4432 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__233__B _233_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4235 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4476 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_700 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input162_A la_iena_mprj[127] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2177_A wire2178/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_1845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2980 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_766 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput100 vccd vssd wire1754/A la_data_out_mprj[71] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_4042 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput111 vccd vssd wire1752/A la_data_out_mprj[81] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput122 _460_/C la_data_out_mprj[91] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput133 _263_/B la_iena_mprj[100] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_3341 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput144 _273_/B la_iena_mprj[110] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_input427_A mprj_dat_o_core[15] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput155 vccd vssd _283_/B la_iena_mprj[120] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_22_3280 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput166 _178_/B la_iena_mprj[15] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_input23_A la_data_out_mprj[117] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput177 _188_/B la_iena_mprj[25] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_2189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput188 _198_/B la_iena_mprj[35] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput199 vccd vssd _208_/B la_iena_mprj[45] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_17_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2684 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_3207 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_122 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_575_ _575_/X _575_/B _575_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__408__B _408_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1351 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_150 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_2230 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XPHY_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_172 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2372 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_183 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[28\]_A la_data_out_core[28] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output479_A _483_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[112\]_A la_data_out_core[112] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_29_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput607 _097_/Y la_data_in_mprj[114] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3528 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput618 _107_/Y la_data_in_mprj[124] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput629 _002_/Y la_data_in_mprj[19] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_output646_A _017_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_009_ _009_/Y _009_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_29_2755 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1277_A _386_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output813_A wire1194/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_3116 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1444_A _301_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[60\] _043_/A la_data_out_core[60] _223_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_23_2376 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_921 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1611_A wire1611/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3872 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__318__B _318_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2759 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_648 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3015 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1980_A wire1981/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3460 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[19\]_A la_data_out_core[19] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_3482 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[103\]_A la_data_out_core[103] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XANTENNA__334__A _334_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4511 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_4555 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_1603 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1647 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1905 vccd vssd _262_/A wire1906/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1916 vccd vssd _254_/A wire1916/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_4395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1927 vccd vssd _234_/A wire1927/A vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_41_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2072 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1938 vccd vssd _207_/A wire1938/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1949 vccd vssd _189_/A wire1949/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_1130 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_1213 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2993 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1246 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_3636 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_205 _337_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1257 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_216 _284_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_227 wire2075/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__509__A _509_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_238 _563_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_249 wire2235/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_626 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_4083 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__228__B _228_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_360_ vccd vssd _360_/X _360_/B _360_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_17_3360 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1660 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_291_ vccd vssd _291_/X _291_/B _291_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_52_3295 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__244__A _244_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__389__A_N _517_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2294_A wire2294/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input377_A la_oenb_mprj[90] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4240 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2291 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2939 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_1642 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_751 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_987 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_2314 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_558_ vccd vssd _558_/A _558_/X _558_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_wire1025_A _133_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_434 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output596_A _087_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_2467 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1012 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_489_ _617_/A _489_/X _489_/C _489_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_31_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4492 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_641 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output763_A wire1176/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1911 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1089 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_1944 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1394_A _338_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output930_A wire1319/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1561_A wire1562/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3128 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1659_A wire1660/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__601__B _601_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1934 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1826_A wire1826/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4474 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__329__A _329_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4212 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_3680 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3571 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_1866 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_1243 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1107 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2133 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__064__A _064_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_1189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_2166 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_2199 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3927 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4560 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput960 _295_/X user_reset vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__511__B _511_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_2134 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_2073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2950 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3695 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1702 vccd vssd _567_/A wire1702/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1713 vccd vssd _544_/A wire1713/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1724 vccd vssd wire1724/X wire1725/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1735 vccd vssd _609_/A wire1735/A vssd vccd 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vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_2437 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_326_ _326_/X _326_/B _326_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_9_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2459 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__416__B _416_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_257_ _257_/X _257_/B _257_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_2773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_1195 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_3772 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_964 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1524_A wire1524/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_304 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_849 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_50_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__607__A _607_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1893_A wire1894/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__326__B _326_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire977_A _143_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[91\]_B wire1468/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__342__A _342_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_2760 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2702 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_1747 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__517__A _517_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_2003 vssd vccd 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3743 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_4488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__530__A _530_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_3607 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2029 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_745 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input155_A la_iena_mprj[120] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2072_A wire2073/X vssd vccd vccd vssd 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sky130_fd_sc_hd__decap_6 XFILLER_24_947 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1280 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3692 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_2871 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1856 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__345__A _345_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_1135 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1266 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4331 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3939 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4572 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_1499 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__080__A _080_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput950 wire1445/X mprj_we_o_user vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_4375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2085 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1412 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_2168 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1423 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1703 vccd vssd _566_/A wire1703/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1725 vccd vssd wire1725/X input3/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1736 vccd vssd _597_/A wire1736/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1747 vccd vssd _455_/C wire1747/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1758 vccd vssd _393_/B wire1758/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1551 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1000 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1769 vccd vssd wire1769/X wire1769/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_1011 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_1022 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_3412 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_1033 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__239__B _239_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2035_A wire2036/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input118_A la_data_out_mprj[88] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3456 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_411_ _539_/A _411_/X _411_/C _411_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_36_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_342_ vccd vssd _342_/A _342_/X _342_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_wire2202_A wire2202/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_799 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__255__A _255_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_273_ _273_/X _273_/B _273_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_2343 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input83_A la_data_out_mprj[56] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_2376 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4060 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_840 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__421__C _421_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1159 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_873 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3195 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_2691 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_3109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_2303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output504_A wire1273/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1865 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_1718 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1135_A wire1135/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_609_ _609_/X _609_/B _609_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_53_2101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3832 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1302_A _367_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output873_A _308_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__165__A _165_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3876 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[16\] _163_/A la_data_out_core[16] _179_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 Xuser_wb_dat_gates\[29\] mprj_dat_i_user[29] split5/X _143_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_31_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1466 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1671_A wire1672/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1769_A wire1769/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1797 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__612__B _612_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2394 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1671 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1743 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[127\] _110_/A la_data_out_core[127] _290_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_3_2021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4355 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3582 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__379__A_N _507_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_4308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3509 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_2997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_1929 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4054 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_4076 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__075__A _075_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_3353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_449 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_rebuffer6_A wire1460/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1517 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_961 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_994 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1815 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3703 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__522__B _522_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput780 wire1197/X la_oenb_core[3] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2201 vccd vssd wire2201/X wire2202/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput791 wire1196/X la_oenb_core[4] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2212 vccd vssd _481_/B wire2213/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2223 vccd vssd wire2223/X wire2223/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1231 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2234 vccd vssd _471_/B wire2235/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1500 vccd vssd wire1500/X wire1500/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2245 vccd vssd _464_/B wire2245/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1511 vccd vssd _368_/B wire1511/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2612 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2256 vccd vssd wire2256/X wire2257/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input235_A la_iena_mprj[78] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2152_A wire2152/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1522 vccd vssd _359_/B wire1522/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2267 vccd vssd wire2267/X wire2267/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1533 vccd vssd wire1533/X wire1533/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2278 vccd vssd _447_/B wire2278/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1544 vccd vssd _347_/B wire1545/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2289 vccd vssd _437_/B wire2290/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1555 vccd vssd wire1555/X wire1555/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2656 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1566 vccd vssd wire1566/X wire1566/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2667 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1577 vccd vssd _308_/B wire1578/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1588 vccd vssd wire1588/X wire1589/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1599 vccd vssd wire1599/X wire1600/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_3220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input402_A mprj_adr_o_core[22] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3106 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_325_ vccd vssd _325_/X _325_/B _325_/A vssd vccd sky130_fd_sc_hd__and2_1 XANTENNA__416__C _416_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_769 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_921 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_256_ vccd vssd _256_/A _256_/X _256_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_10_460 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3784 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_187_ vccd vssd _187_/A _187_/X _187_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_48_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__432__B _432_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2523 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1085_A _121_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output621_A _110_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_2567 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output719_A wire1200/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_3042 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3053 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1938 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1252_A _410_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3963 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1517_A wire1517/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_571 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__607__B _607_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_703 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1951 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_213 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1886_A wire1886/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1247 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__623__A _623_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__342__B _342_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_wb_dat_gates\[4\]_A mprj_dat_i_user[4] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2252 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_1321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_1573 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[4\]_A la_data_out_core[4] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4116 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1103 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__517__B _517_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1759 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_883 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_574 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2015 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_110_ _110_/A _110_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_14_3194 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2493 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__533__A _533_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_041_ _041_/A _041_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_2346 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input185_A la_iena_mprj[32] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input352_A la_oenb_mprj[68] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2854 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2937 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input46_A la_data_out_mprj[22] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2020 vccd vssd _615_/B wire2021/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2031 vccd vssd wire2031/X wire2031/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2042 vccd vssd _607_/B wire2043/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2053 vccd vssd wire2053/X wire2053/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2064 vccd vssd _597_/B wire2065/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1330 vccd vssd wire1330/X _360_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2075 vccd vssd wire2075/X wire2075/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1341 vccd vssd wire1341/X wire1342/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2086 vccd vssd _587_/B wire2086/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1352 vccd vssd wire1352/X wire1353/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2097 vccd vssd _581_/B wire2098/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1363 vccd vssd wire1363/X _349_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1374 vccd vssd wire1374/X wire1375/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1385 vccd vssd wire1385/X wire1386/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2558 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_2486 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1396 vccd vssd wire1396/X _337_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1879 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__427__B _427_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3094 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3802 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_308_ _308_/X _308_/B _308_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1000_A wire1001/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output571_A _451_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_239_ _239_/X _239_/B _239_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_45_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output836_A wire1146/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1467_A _255_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3137 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2403 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_3920 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_2331 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3076 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[83\] la_data_out_core[83] wire1476/X wire1132/A vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_8 XFILLER_26_3087 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1702 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1634_A wire1635/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1801_A wire1801/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__618__A _618_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_3161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1284 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_3648 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__337__B _337_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_2914 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__417__A_N _545_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1011 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3356 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_2622 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_1093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__353__A _353_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2655 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2699 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_3121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput305 vccd vssd _522_/A la_oenb_mprj[25] vssd vccd sky130_fd_sc_hd__buf_4 Xinput316 vccd vssd wire1718/A la_oenb_mprj[35] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_4186 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3524 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput327 _542_/A la_oenb_mprj[45] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput338 vccd vssd _552_/A la_oenb_mprj[55] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_5_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput349 vccd vssd wire1707/A la_oenb_mprj[65] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_1004 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_1109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2867 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_590_ _590_/X _590_/B _590_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_2_2889 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xload_slew1459 wire1460/X split5/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3292 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__528__A _528_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input100_A la_data_out_mprj[71] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_872 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2115_A wire2116/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_2566 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_2577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_1291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__263__A _263_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1166 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4031 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_024_ _024_/A _024_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XANTENNA_9 _554_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2187 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4075 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_2949 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2651 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3238 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_1549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_2695 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2322 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1160 vccd vssd wire1160/X wire1161/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1171 vccd vssd wire1171/X _531_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1182 vccd vssd wire1182/X _515_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3089 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_154 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1193 vccd vssd wire1193/X _504_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1048_A wire1049/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_2294 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_625 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3935 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1687 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output786_A wire1164/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_382 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1055 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3654 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1331 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output953_A wire2302/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__173__A _173_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_wb_dat_gates\[11\] mprj_dat_i_user[11] rebuffer2/X _125_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_51_2991 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3698 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1584_A wire1585/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_1239 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1751_A wire1751/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1849_A wire1849/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__620__B _620_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2108 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_1313 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_3888 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_964 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3808 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__348__A _348_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4433 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_853 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_1128 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__083__A _083_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3503 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_4259 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__530__B _530_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2960 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_735 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2802 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3547 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_234 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2261 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_1869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput102 _442_/C la_data_out_mprj[73] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput113 vccd vssd wire1750/A la_data_out_mprj[83] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_27_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3321 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput124 _462_/C la_data_out_mprj[93] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_wire2065_A wire2065/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input148_A la_iena_mprj[114] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput135 _265_/B la_iena_mprj[102] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput146 _275_/B la_iena_mprj[112] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput157 vccd vssd _285_/B la_iena_mprj[122] vssd vccd sky130_fd_sc_hd__buf_4 Xinput168 _180_/B la_iena_mprj[17] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput179 vccd vssd _190_/B la_iena_mprj[27] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_29_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2232_A wire2233/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input315_A la_oenb_mprj[34] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__258__A _258_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_573_ _573_/X _573_/B _573_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_3621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[30\]_B split5/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2942 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_130 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_1364 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_152 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_163 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_174 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_1239 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_301 vccd vssd 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XFILLER_0_3869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4236 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_274 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3535 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__345__B _345_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2146 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3907 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__361__A _361_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_4343 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2103 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput940 wire1382/X mprj_dat_o_user[5] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput951 wire1838/X user1_vcc_powergood vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_4387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3725 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_1953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3736 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_1341 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_1817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3528 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_1205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_1997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1704 vccd vssd _565_/A wire1704/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1715 vccd vssd _537_/A _409_/A_N vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_41_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1726 vccd vssd _618_/A wire1726/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1479 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1737 vccd vssd _487_/C input24/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1748 vccd vssd _454_/C wire1748/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1759 vccd vssd _392_/B wire1759/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1563 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1056 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1067 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1078 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_410_ _538_/A _410_/X _410_/C _410_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_19_3468 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_1089 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2028_A wire2028/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_341_ vccd vssd _341_/A _341_/X _341_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_36_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_272_ _272_/X _272_/B _272_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_13_2333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_3922 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input382_A la_oenb_mprj[95] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input76_A la_data_out_mprj[4] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__271__A _271_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_896 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1485 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_384 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2315 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2495 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_1855 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2280 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_608_ _608_/X _608_/B _608_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1030_A _132_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1128_A wire1128/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_539_ _539_/X _539_/B _539_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_53_1401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_3844 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_2266 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2157 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_406 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_2179 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_2299 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4280 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_3899 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__450__A_N _578_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output866_A _331_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1497_A wire1498/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1120 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1153 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__181__A _181_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1787 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_3124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1664_A wire1665/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2340 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_3179 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1831_A wire1831/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3848 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1929_A wire1929/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_4334 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_3600 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2011 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2033 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_2044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_1293 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__356__A _356_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3490 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3365 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[94\]_A la_data_out_core[94] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1507 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4438 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__091__A _091_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_1827 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_3715 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_4392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4151 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3759 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3680 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3450 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput770 _527_/X la_oenb_core[30] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput781 _537_/X la_oenb_core[40] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2202 vccd vssd wire2202/X wire2202/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput792 wire1160/X la_oenb_core[50] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2213 vccd vssd wire2213/X wire2214/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2224 vccd vssd _476_/B wire2225/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2235 vccd vssd wire2235/X wire2235/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1501 vccd vssd _344_/B wire1502/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2246 vccd vssd _463_/B wire2246/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1512 vccd vssd _367_/B wire1512/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2257 vccd vssd wire2257/X wire2257/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1523 vccd vssd _358_/B wire1523/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2268 vccd vssd _452_/B wire2269/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1534 vccd vssd _352_/B wire1535/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2279 vccd vssd _446_/B wire2279/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1545 vccd vssd wire1545/X wire1545/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input130_A la_data_out_mprj[99] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1556 vccd vssd _313_/B wire1557/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2145_A wire2145/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1567 vccd vssd _310_/B wire1568/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input228_A la_iena_mprj[71] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1578 vccd vssd wire1578/X wire1579/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1589 vccd vssd wire1589/X wire1590/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__473__A_N _601_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__266__A _266_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_324_ _324_/X _324_/B _324_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[85\]_A la_data_out_core[85] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_2742 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_255_ _255_/X _255_/B _255_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2764 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_186_ vccd vssd _186_/X _186_/B _186_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_45_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__432__C _432_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_2535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1078_A wire1079/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_1906 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_4560 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2579 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1917 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1245_A _417_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1411 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_2228 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1412_A wire1413/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_583 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__176__A _176_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4228 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_715 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3516 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_to_mprj_in_gates\[76\]_A la_data_out_core[76] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1242 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1781_A wire1781/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1879_A wire1880/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__623__B _623_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4471 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[4\]_B split4/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_3612 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2275 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3706 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1563 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__496__A_N _624_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__086__A _086_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_1115 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_862 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1159 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[67\]_A la_data_out_core[67] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_2472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_040_ _040_/A _040_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA__533__B _533_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2095_A wire2096/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input178_A la_iena_mprj[26] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3617 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input345_A la_oenb_mprj[61] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2262_A wire2263/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2010 vccd vssd _618_/B wire2011/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2021 vccd vssd wire2021/X wire2022/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2032 vccd vssd _611_/B wire2033/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_3291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input39_A la_data_out_mprj[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2043 vccd vssd wire2043/X wire2044/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2054 vccd vssd _602_/B wire2055/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1320 vccd vssd wire1320/X wire1321/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2065 vccd vssd wire2065/X wire2065/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1331 wire1332/X wire1331/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2076 vccd vssd _593_/B wire2077/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2087 vccd vssd _586_/B wire2087/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1342 vccd vssd wire1342/X _356_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2515 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1353 vccd vssd wire1353/X wire1354/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2098 vccd vssd wire2098/X wire2098/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1364 vccd vssd wire1364/X wire1365/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1961 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1375 vccd vssd wire1375/X _345_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1386 vccd vssd wire1386/X wire1387/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_369 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1397 vccd vssd wire1397/X _328_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1836 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_881 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__427__C _427_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3972 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[58\]_A la_data_out_core[58] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_307_ _307_/X _307_/B _307_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_2149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_238_ _238_/X _238_/B _238_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__443__B _443_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output564_A _445_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1871 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__369__A_N _497_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_169_ vccd vssd _169_/A _169_/X _169_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_1893 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_796 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1195_A _502_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output731_A _607_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output829_A _581_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1362_A wire1363/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3932 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_2343 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[76\] la_data_out_core[76] _239_/X _059_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_23_3976 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1627_A wire1628/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4404 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_4448 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__618__B _618_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3725 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_136 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1296 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1996_A wire1997/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire982_A wire983/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[49\]_A la_data_out_core[49] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_1782 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1793 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1023 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__353__B _353_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_3904 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1966 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput306 vccd vssd _523_/A la_oenb_mprj[26] vssd vccd sky130_fd_sc_hd__buf_4 Xinput317 vccd vssd _405_/A_N la_oenb_mprj[36] vssd vccd sky130_fd_sc_hd__buf_6 Xinput328 la_oenb_mprj[46] _543_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_22_4198 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput339 vccd vssd _553_/A la_oenb_mprj[56] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_29_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2982 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2824 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2846 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2592 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_2523 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_884 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_372 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2010_A wire2011/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_545 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__544__A _544_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[124\]_A la_data_out_core[124] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_16_2589 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input295_A la_oenb_mprj[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__263__B _263_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2122 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_023_ _023_/A _023_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA_input462_A user_irq_ena[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2939 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_4087 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2663 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_2549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_5_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1150 vccd vssd wire1150/X wire1151/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2312 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1161 vccd vssd wire1161/X _547_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1172 vccd vssd wire1172/X _530_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2273 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1183 vccd vssd wire1183/X _514_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1194 vccd vssd wire1194/X _503_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__438__B _438_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1655 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3909 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1110_A _116_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output681_A _049_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3780 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output779_A wire1169/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[115\]_A la_data_out_core[115] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_31_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_4080 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output946_A wire1435/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1577_A wire1578/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2405 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1809 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3823 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1911_A wire1911/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_976 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4212 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[102\] _085_/A la_data_out_core[102] _265_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_26_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__348__B _348_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2890 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_821 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_681 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1888 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__364__A _364_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[106\]_A la_data_out_core[106] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_51_1009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2431 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2453 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3559 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3300 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput103 vccd vssd _443_/C la_data_out_mprj[74] vssd vccd sky130_fd_sc_hd__buf_4 Xinput114 vccd vssd wire1749/A la_data_out_mprj[84] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_49_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput125 _463_/C la_data_out_mprj[94] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput136 _266_/B la_iena_mprj[103] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput147 _276_/B la_iena_mprj[113] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput158 vccd vssd _286_/B la_iena_mprj[123] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_5_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2058_A wire2059/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput169 vccd vssd _181_/B la_iena_mprj[18] vssd vccd sky130_fd_sc_hd__buf_4 XANTENNA__539__A _539_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3399 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1953 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input210_A la_iena_mprj[55] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_572_ _572_/X _572_/B _572_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire2225_A wire2225/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input308_A la_oenb_mprj[28] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_2607 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_120 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_131 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_2954 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2342 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_142 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_153 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_3931 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_164 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__274__A _274_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_175 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_186 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_006_ _006_/Y _006_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_29_2725 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3233 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__440__C _440_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3194 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__407__A_N _535_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_2471 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output527_A wire1251/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_1369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1060_A _126_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1158_A wire1159/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2120 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4532 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1325_A wire1326/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_3711 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_4576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput941 wire1379/X mprj_dat_o_user[6] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_2115 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput952 output952/A user1_vdd_powergood vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4399 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1705 vccd vssd _564_/A wire1705/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2975 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1716 vccd vssd _534_/A _406_/A_N vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_1397 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1727 vccd vssd _617_/A wire1727/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1738 vccd vssd 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sky130_ef_sc_hd__decap_12 XFILLER_39_1493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_271_ _271_/X _271_/B _271_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_23_982 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3934 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__552__A _552_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_1693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2389 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2292_A wire2292/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1092 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_934 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_1430 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_185_ vccd vssd _185_/A _185_/X _185_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_2798 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_wb_dat_gates\[4\] _118_/A mprj_dat_i_user[4] split4/X vssd vccd vssd vccd sky130_fd_sc_hd__nand2_4 XFILLER_7_989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2547 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_672 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_3910 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_2271 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_3088 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3932 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1238_A wire1239/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1405_A _322_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[21\] _004_/A la_data_out_core[21] _184_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_20_204 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3686 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[76\]_B _239_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3528 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1227 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__192__A _192_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1298 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1774_A wire1775/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1941_A wire1941/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4483 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4408 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3602 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_2265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3624 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_1481 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_1957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3668 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4060 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1209 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_4187 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_1080 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1152 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__367__A _367_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1614 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_915 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1658 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3629 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2088_A wire2089/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2000 vccd vssd wire2000/X wire2000/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_27_2867 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput590 wire1285/X la_data_in_core[9] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2011 vccd vssd wire2011/X wire2012/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2022 vccd vssd wire2022/X wire2022/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input240_A la_iena_mprj[82] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2033 vccd vssd wire2033/X wire2034/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3206 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input338_A la_oenb_mprj[55] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2044 vccd vssd wire2044/X wire2044/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2255_A wire2256/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2055 vccd vssd wire2055/X wire2055/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1310 vccd vssd wire1310/X _365_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3228 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__440__A_N _568_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1321 vccd vssd wire1321/X wire1322/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2066 vccd vssd _596_/B wire2067/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2422 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2591 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1332 vccd vssd wire1332/X wire1333/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2077 vccd vssd wire2077/X wire2077/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1343 vccd vssd wire1343/X wire1344/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2444 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2088 vccd vssd _585_/B wire2089/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2099 vccd vssd _580_/B wire2100/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1354 vccd vssd wire1354/X _352_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1365 vccd vssd wire1365/X wire1366/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_348 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1376 vccd vssd wire1376/X wire1377/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1387 vccd vssd wire1387/X _341_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1398 vccd vssd wire1398/X wire1399/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__277__A _277_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_510 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3984 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_306_ _306_/X _306_/B _306_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4240 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_4284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_237_ _237_/X _237_/B _237_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__443__C _443_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_168_ vccd vssd _168_/X _168_/B _168_/A vssd vccd sky130_fd_sc_hd__and2_1 XANTENNA_output557_A wire1288/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_099_ _099_/Y _099_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_23_3900 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output724_A _601_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_3944 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2355 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1355_A wire1356/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2399 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3988 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[69\] _052_/A la_data_out_core[69] _232_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_39_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1522_A wire1522/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_2026 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_4416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__187__A _187_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_1231 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_649 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3737 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3748 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4004 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4015 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1891_A wire1892/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1989_A wire1989/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3483 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire975_A wire976/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_3916 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_918 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__463__A_N _591_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput307 _524_/A la_oenb_mprj[27] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 Xinput318 vccd vssd _406_/A_N la_oenb_mprj[37] vssd vccd sky130_fd_sc_hd__buf_6 Xinput329 vccd vssd _416_/A_N la_oenb_mprj[47] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2803 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2814 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_1164 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__097__A _097_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_841 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2404 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_2535 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__544__B _544_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[124\]_B _287_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_4560 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_1758 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input190_A la_iena_mprj[37] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input288_A la_oenb_mprj[125] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_022_ _022_/A _022_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_6_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1400 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3892 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2167 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_4224 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_126 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3403 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1072 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_4268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4159 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_343 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__364__B _364_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[106\]_B wire1462/X vssd vccd vccd vssd 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sky130_ef_sc_hd__decap_12 X_005_ _005_/A _005_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_21_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_2303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2483 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3969 vssd vccd vssd vccd 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output889_A wire1031/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_1406 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_4181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__184__B _184_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_4198 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1687_A wire1687/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1628 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1027 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1854_A wire1855/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_2319 vccd vssd vssd vccd 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vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3484 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_4116 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2151 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2173 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3161 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3172 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2048 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_270_ _270_/X _270_/B _270_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_22_460 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_994 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_2482 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2493 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__552__B _552_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input270_A la_oenb_mprj[109] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2285_A wire2285/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input368_A la_oenb_mprj[82] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3419 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3340 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_3110 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3384 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_3143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1454 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1971 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1835 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_1846 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_606_ _606_/X _606_/B _606_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_15_4525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4536 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_537_ _537_/X _537_/B _537_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__446__C _446_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_468_ _596_/A _468_/B _468_/X _468_/C vssd vccd vssd vccd sky130_fd_sc_hd__and3b_1 XANTENNA_wire1016_A wire1017/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_460 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output587_A _466_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_399_ vssd vccd _399_/B _399_/X _527_/A _399_/C vssd vccd sky130_fd_sc_hd__and3b_2 XFILLER_31_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__462__B _462_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output754_A wire1184/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1166 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1385_A wire1386/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2403 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output921_A wire1346/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[99\] wire1121/A _262_/X la_data_out_core[99] vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_1 XFILLER_29_2353 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1552_A wire1552/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3613 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1817_A wire1817/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_1481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_2068 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1334 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_1896 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2956 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_725 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2622 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2070 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1066 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1970 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__372__B _372_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_975 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[7\]_A mprj_dat_i_user[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3739 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4131 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4175 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput750 wire1188/X la_oenb_core[12] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput761 wire1178/X la_oenb_core[22] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput772 _529_/X la_oenb_core[32] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput783 wire1166/X la_oenb_core[42] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2204 vccd vssd wire2204/X wire2205/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput794 wire1158/X la_oenb_core[52] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3474 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2812 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2215 vccd vssd _480_/B wire2216/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_1785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2226 vccd vssd _475_/B wire2227/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2237 vccd vssd _469_/B wire2238/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_1173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1503 vccd vssd _343_/B wire1504/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2248 vccd vssd _461_/B wire2248/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1514 vccd vssd wire1514/X wire1514/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1267 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2259 vccd vssd wire2259/X wire2260/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1525 vccd vssd _338_/B wire1526/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1536 vccd vssd _351_/B wire1537/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_user_to_mprj_in_gates\[7\]_A la_data_out_core[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1547 vccd vssd wire1547/X wire1548/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1558 vccd vssd wire1558/X wire1559/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1569 vccd vssd wire1569/X wire1570/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1395 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__547__B _547_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input116_A la_data_out_mprj[86] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2033_A wire2034/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2544 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_322_ vccd vssd _322_/A _322_/X _322_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_wire2200_A wire2201/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__563__A _563_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_253_ vccd vssd _253_/A _253_/X _253_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_10_4444 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_452 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_975 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__282__B _282_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input81_A la_data_out_mprj[54] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_184_ vccd vssd _184_/A _184_/X _184_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_45_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3227 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_150 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3192 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2300 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3067 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output502_A wire1293/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_3988 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__457__B _457_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1133_A wire1133/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_2090 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_4480 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3621 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1300_A wire1301/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output871_A _335_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_wb_dat_gates\[27\] _141_/A mprj_dat_i_user[27] split5/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 Xuser_to_mprj_in_gates\[14\] _161_/A la_data_out_core[14] _177_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_33_1829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1386 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1239 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__192__B _192_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1520 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1767_A wire1767/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4451 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4495 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1934_A wire1934/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_3636 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3719 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[125\] _108_/A la_data_out_core[125] _288_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_20_4072 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4166 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_1368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3432 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3371 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4108 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_1070 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1164 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__367__B _367_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_360 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_3418 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__392__A_N _520_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2608 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2029 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2430 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_4309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_3503 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_3547 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4180 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2824 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput580 wire1223/X la_data_in_core[90] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2001 vccd vssd _621_/B wire2002/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput591 _147_/Y la_data_in_mprj[0] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2012 vccd vssd wire2012/X wire2012/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_27_2879 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2023 vccd vssd _614_/B wire2024/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1031 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2034 vccd vssd wire2034/X wire2034/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1300 vccd vssd wire1300/X wire1301/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2045 vccd vssd _606_/B wire2046/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1311 wire1312/X wire1311/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2056 vccd vssd _601_/B wire2057/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2067 vccd vssd wire2067/X wire2067/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1322 vccd vssd wire1322/X _362_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2078 vccd vssd _592_/B wire2079/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input233_A la_iena_mprj[76] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1333 vccd vssd wire1333/X _359_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2248_A wire2248/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_2434 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1344 vccd vssd wire1344/X wire1345/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2089 vccd vssd wire2089/X wire2089/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1355 vccd vssd wire1355/X wire1356/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__558__A _558_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1366 vccd vssd wire1366/X _348_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1377 vccd vssd wire1377/X wire1378/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1388 vccd vssd wire1388/X wire1389/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1399 vccd vssd wire1399/X _327_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input400_A mprj_adr_o_core[20] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__277__B _277_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1849 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_2953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_544 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2352 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3865 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__293__A _293_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3996 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_305_ _305_/X _305_/B _305_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4252 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_569 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_236_ _236_/X _236_/B _236_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3573 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_167_ vccd vssd _167_/X _167_/B _167_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_10_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3013 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_098_ _098_/Y _098_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_45_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3035 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_3046 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1083_A wire1084/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3912 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_481 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output717_A _082_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_4392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1250_A _412_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2141 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1348_A _354_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2174 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1210 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__187__B _187_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_1243 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1326 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_883 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_842 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_330 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4027 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3304 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_547 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1884_A wire1884/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2603 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_1183 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_1074 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire968_A wire969/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2073 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3928 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4206 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3400 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput308 vccd vssd _525_/A la_oenb_mprj[28] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_29_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3505 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput319 _535_/A la_oenb_mprj[38] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_25_1132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_691 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3106 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_514 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_694 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_2547 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_021_ _021_/A _021_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_2135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input183_A la_iena_mprj[30] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_1412 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2198_A wire2199/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1423 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3311 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__560__B _560_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input350_A la_oenb_mprj[66] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input448_A mprj_dat_o_core[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input44_A la_data_out_mprj[20] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_901 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1130 vccd vssd _068_/A wire1130/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1141 vccd vssd _104_/A wire1141/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__288__A _288_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1152 vccd vssd wire1152/X _554_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1163 vccd vssd wire1163/X _546_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1174 vccd vssd wire1174/X _523_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2286 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1185 vccd vssd wire1185/X _512_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1196 vccd vssd wire1196/X _501_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_35_617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_352 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__454__C _454_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_1323 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1367 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_219_ vccd vssd _219_/A _219_/X _219_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__470__B _470_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2680 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output834_A wire1147/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1465_A _258_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[81\] la_data_out_core[81] wire1478/X wire1134/A vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_8 XFILLER_6_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3764 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__198__A _198_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_4236 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_425 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_138 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3546 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3459 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_694 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2747 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3112 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__430__A_N _558_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__380__B _380_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_4207 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3736 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_1798 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_716 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput105 vccd vssd _445_/C la_data_out_mprj[76] vssd vccd sky130_fd_sc_hd__buf_4 Xinput116 vccd vssd wire1747/A la_data_out_mprj[86] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput127 _465_/C la_data_out_mprj[96] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput138 _268_/B la_iena_mprj[105] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_5_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput149 _278_/B la_iena_mprj[115] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_39_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2656 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[15\]_B load_slew1458/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2678 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_570_ _570_/X _570_/B _570_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_116 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1966 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_100 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_981 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_2300 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_111 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__555__B _555_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2113_A wire2114/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_122 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_1690 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_3911 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_491 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_144 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_155 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_166 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_3955 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input398_A mprj_adr_o_core[19] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_188 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3988 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__571__A _571_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_004_ _004_/A _004_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_46_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__290__B _290_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_93 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_2749 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2451 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2545 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_1811 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_2495 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1833 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__449__C _449_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_irq_gates\[0\]_A user_irq_core[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_915 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1046_A wire1047/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_4556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_1465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_2 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__465__B _465_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1213_A _471_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__453__A_N _581_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output784_A _540_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3410 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1131 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output951_A wire1838/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2791 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1582_A wire1583/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_1186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_1197 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1039 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3815 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2237 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1847_A wire1848/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4356 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_1569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_4378 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_1861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2932 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_1124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_447 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3343 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__375__B _375_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_4088 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2653 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1529 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1810 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2566 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1821 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_max_length1714_A _416_/A_N vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2252 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3566 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2063_A wire2063/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input146_A la_iena_mprj[112] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3143 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3165 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_622_ _622_/X _622_/B _622_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire2230_A wire2231/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input313_A la_oenb_mprj[32] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__476__A_N _604_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_2486 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__566__A _566_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_553_ vccd vssd _553_/A _553_/X _553_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_44_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__285__B _285_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_484_ _612_/A _484_/X _484_/C _484_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_3329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_3752 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1905 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_1304 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2098 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3021 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4571 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_1845 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output532_A wire1246/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3076 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1889 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4468 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_1674 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1428_A wire1429/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[44\] _027_/A la_data_out_core[44] _207_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_18_4375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4228 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_3543 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__195__B _195_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_4299 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3505 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1295 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_1237 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1797_A wire1797/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3284 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_3295 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_2583 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_12_2594 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3820 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2001 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput910 wire1081/X mprj_dat_i_core[7] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput921 wire1346/X mprj_dat_o_user[17] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput932 wire1311/X mprj_dat_o_user[27] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput943 wire1373/X mprj_dat_o_user[8] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3864 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_2045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xuser_to_mprj_in_gates\[6\] _153_/A _169_/X la_data_out_core[6] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 Xoutput954 output954/A user2_vdd_powergood vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_45_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[30\]_A la_data_out_core[30] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_2966 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1707 vccd vssd _562_/A wire1707/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1718 vccd vssd _532_/A wire1718/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_4197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1729 vccd vssd _615_/A wire1729/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1037 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[97\]_A la_data_out_core[97] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_3053 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3086 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_2341 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_472 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1072 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2060 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4020 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2071 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input263_A la_oenb_mprj[102] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2180_A wire2181/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2278_A wire2278/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 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_605_/X _605_/B _605_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_45_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_244 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_536_ _536_/X _536_/B _536_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_15_4548 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[88\]_A la_data_out_core[88] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2138 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3104 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_467_ _595_/A _467_/X _467_/C _467_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_13_4250 vssd vccd vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_9_1703 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output914_A wire1367/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_2459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[12\]_A la_data_out_core[12] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1758 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2194 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1313 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_2913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_1324 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_737 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire998_A wire999/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_4036 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[79\]_A la_data_out_core[79] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_3324 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_2634 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1679 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_2667 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__372__C _372_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2391 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_1256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4143 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput740 _616_/X la_oenb_core[119] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput751 wire1187/X la_oenb_core[13] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4007 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput762 wire1177/X la_oenb_core[23] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_4187 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput773 wire1172/X la_oenb_core[33] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput784 _540_/X la_oenb_core[43] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2205 vccd vssd wire2205/X wire2205/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput795 wire1156/X la_oenb_core[53] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2216 vccd vssd wire2216/X wire2217/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2227 vccd vssd wire2227/X wire2227/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3569 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2238 vccd vssd wire2238/X wire2238/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1504 vccd vssd wire1504/X wire1504/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2249 vccd vssd _460_/B wire2249/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1515 vccd vssd _366_/B wire1515/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1526 vccd vssd wire1526/X wire1527/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1537 vccd vssd wire1537/X wire1537/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_user_to_mprj_in_gates\[7\]_B _170_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1049 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_2879 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1548 vccd vssd wire1548/X wire1548/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1559 vccd vssd wire1559/X wire1559/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_575 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2026_A wire2027/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input109_A la_data_out_mprj[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_321_ vccd vssd _321_/A _321_/X _321_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_19_2567 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_252_ _252_/X _252_/B _252_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__563__B _563_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3711 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_280 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_1009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_183_ vccd vssd _183_/A _183_/X _183_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_input380_A la_oenb_mprj[93] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_987 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input74_A la_data_out_mprj[48] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3239 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_630 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_3160 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_140 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_309 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__457__C _457_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_4312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3600 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3780 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3644 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_519_ _519_/X _519_/B _519_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3666 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__473__B _473_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_4080 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2211 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1376 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output864_A _329_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1495_A wire1496/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_1565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1662_A wire1662/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2140 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2162 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_3648 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4040 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1494 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_4145 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_4084 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[118\] la_data_out_core[118] _281_/X _101_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_3_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2732 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3488 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2693 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_545 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__383__B _383_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_762 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_3515 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3559 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4192 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2836 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput570 _450_/X la_data_in_core[81] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput581 wire1222/X la_data_in_core[91] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2002 vccd vssd wire2002/X wire2003/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput592 _083_/Y la_data_in_mprj[100] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2013 vccd vssd _617_/B wire2014/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2024 vccd vssd wire2024/X wire2025/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2035 vccd vssd _610_/B wire2036/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1301 vccd vssd wire1301/X wire1302/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1043 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2046 vccd vssd wire2046/X wire2046/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3136 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1312 vccd vssd wire1312/X wire1313/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2571 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire2057 vccd vssd wire2057/X wire2057/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1323 wire1324/X wire1323/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2068 vccd vssd _595_/B wire2069/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1334 vccd vssd wire1334/X wire1335/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2079 vccd vssd wire2079/X wire2079/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1345 vccd vssd wire1345/X _355_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1356 vccd vssd wire1356/X wire1357/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__558__B _558_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_1942 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_1098 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_328 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1367 vccd vssd wire1367/X wire1368/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input226_A la_iena_mprj[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2143_A wire2143/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1378 vccd vssd wire1378/X _344_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1389 vccd vssd wire1389/X wire1390/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_523 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__574__A _574_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[127\]_A la_data_out_core[127] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_51_3833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_304_ _304_/X _304_/B _304_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__293__B _293_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_4264 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_235_ _235_/X _235_/B _235_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_166_ vccd vssd _166_/X _166_/B _166_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_13_1251 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_1262 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_097_ _097_/Y _097_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_45_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3119 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_3069 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_994 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1076_A wire1077/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4360 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2379 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4454 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__468__B _468_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3764 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1243_A _419_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2186 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1890 vccd vssd _270_/A wire1890/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_106 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_350 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1410_A wire1411/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1508_A wire1508/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[118\]_A la_data_out_core[118] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_15_3441 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_3452 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_190 _344_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3316 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1195 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1877_A wire1878/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4271 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_3412 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3664 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput309 vccd vssd wire1722/A la_oenb_mprj[29] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_29_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2952 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3539 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__378__B _378_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_832 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_640 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3118 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[109\]_A la_data_out_core[109] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_51_150 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_1749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1126 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_020_ _020_/Y _020_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_20_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1435 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_3323 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input176_A la_iena_mprj[24] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2093_A wire2094/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1479 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3367 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3209 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2738 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2260_A wire2260/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3141 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input343_A la_oenb_mprj[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__569__A _569_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input37_A la_data_out_mprj[14] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_2451 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1120 vccd vssd wire1120/X _114_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3038 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1131 vccd vssd _067_/A wire1131/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__288__B _288_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1142 vccd vssd _103_/A wire1142/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1153 vccd vssd wire1153/X wire1154/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1164 vccd vssd wire1164/X _542_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1175 vccd vssd wire1175/X _522_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1186 vccd vssd wire1186/X _511_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1625 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1197 vccd vssd wire1197/X _500_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3636 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_570 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_1379 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_218_ vccd vssd _218_/A _218_/X _218_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_10_3360 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output562_A _443_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_149_ _149_/A _149_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_45_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__470__C _470_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output827_A _579_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1008 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1360_A _350_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1420 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[74\] _057_/A la_data_out_core[74] _237_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_38_401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1625_A wire1626/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_1102 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_106 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_4248 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_692 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3427 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2704 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1994_A wire1994/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire980_A wire981/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_4448 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_846 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2759 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_356 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_367 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2478 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3704 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4219 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_3507 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2986 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3220 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput106 vccd vssd _446_/C la_data_out_mprj[77] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_6_3472 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput117 vccd vssd wire1746/A la_data_out_mprj[87] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput128 _466_/C la_data_out_mprj[97] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_44_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput139 _269_/B la_iena_mprj[106] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_9_1171 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3347 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2624 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_128 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_2924 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_112 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_123 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_134 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_145 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire2106_A wire2106/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_156 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_167 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_178 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_1513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3967 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_1546 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input293_A la_oenb_mprj[14] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_389 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_4392 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__571__B _571_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_90 _256_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_003_ _003_/A _003_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_29_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2706 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input460_A user_irq_ena[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_2463 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__299__A _299_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_3927 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1856 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_794 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3870 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_949 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3812 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1372 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1039_A wire1040/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_3 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__465__C _465_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3422 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output777_A _534_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3444 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3466 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_2781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_1143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1608 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_3488 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__481__B _481_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output944_A wire1370/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1575_A wire1576/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3827 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4302 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3601 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__002__A _002_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3584 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_1250 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_1103 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1219 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_927 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_201 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xuser_to_mprj_in_gates\[100\] la_data_out_core[100] _263_/X _083_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_39_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_1611 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_459 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__375__C _375_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3355 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2512 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3268 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2523 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_632 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_654 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__391__B _391_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3512 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3534 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_1025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input139_A la_iena_mprj[106] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2056_A wire2057/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_621_ _621_/X _621_/B _621_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1731 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3108 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1742 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_552_ _552_/X _552_/B _552_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__566__B _566_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2223_A wire2223/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input306_A la_oenb_mprj[26] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_2429 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_483_ _611_/A _483_/X _483_/C _483_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_32_429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_993 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__582__A _582_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3764 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2077 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_1073 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_2321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_2271 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3871 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output525_A wire1253/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_1169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3724 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_2218 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_1423 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1156_A wire1157/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_1517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__420__A_N _548_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4332 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__476__B _476_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1323_A wire1324/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_779 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output894_A wire1011/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1263 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_4387 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[37\] _020_/A la_data_out_core[37] _200_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_23_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3528 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2843 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_3599 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_1249 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2551 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput900 wire982/X mprj_dat_i_core[27] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput911 wire1076/X mprj_dat_i_core[8] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3832 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput922 wire1343/X mprj_dat_o_user[18] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput933 wire1307/X mprj_dat_o_user[28] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput944 wire1370/X mprj_dat_o_user[9] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput955 wire1453/X user_clock vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 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XANTENNA__386__B _386_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3032 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[97\]_B _260_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2440 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3196 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_974 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_4053 vccd vssd vssd vccd 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XFILLER_49_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input67_A la_data_out_mprj[41] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_1253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_686 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_1117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_185 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_196 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__100__A _100_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_554 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_565 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4324 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3792 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_518_ _518_/X _518_/B _518_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1021_A wire1022/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1311 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output592_A _083_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1119_A wire1120/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__473__C _473_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_449_ _577_/A _449_/X _449_/C _449_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_31_2223 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__489__A_N _617_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output857_A wire1403/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_1599 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2202 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_2224 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1655_A wire1656/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_2246 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3053 vssd vccd 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sky130_fd_sc_hd__decap_3 XFILLER_7_2909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_2848 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput560 _441_/X la_data_in_core[72] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput571 _451_/X la_data_in_core[82] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput582 wire1221/X la_data_in_core[92] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2003 vccd vssd wire2003/X wire2003/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput593 _084_/Y la_data_in_mprj[101] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_1011 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2014 vccd vssd wire2014/X wire2015/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2025 vccd vssd wire2025/X wire2025/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2036 vccd vssd wire2036/X wire2037/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2047 vccd vssd _605_/B wire2048/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3148 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1302 vccd vssd wire1302/X _367_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2058 vccd vssd _600_/B wire2059/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1055 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1313 vccd vssd wire1313/X wire1314/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1324 vccd vssd wire1324/X wire1325/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2069 vccd vssd wire2069/X wire2069/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2583 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1335 vccd vssd wire1335/X wire1336/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1346 vccd vssd wire1346/X wire1347/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1357 vccd vssd wire1357/X _351_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1368 vccd vssd wire1368/X wire1369/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1379 vccd vssd wire1379/X wire1380/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input121_A la_data_out_mprj[90] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input219_A la_iena_mprj[63] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4508 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__574__B _574_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_877 vssd vccd vssd vccd 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sky130_fd_sc_hd__and2_1 XFILLER_6_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[2\] mprj_dat_i_user[2] max_cap1456/X _116_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_6_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_096_ _096_/A _096_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA_powergood_check_mprj_vdd_logic1 output952/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_984 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1069_A wire1070/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__468__C _468_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1880 vccd vssd wire1880/X wire1880/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1236_A wire1237/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1891 vccd vssd _269_/A wire1892/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_1317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_1256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3707 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_118 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_855 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__484__B _484_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4283 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4219 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_4158 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1331 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_wb_dat_gates\[27\]_A mprj_dat_i_user[27] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__378__C _378_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3264 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_2491 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_3206 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__394__B _394_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[109\]_B _272_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_162 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1285 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1447 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3335 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2086_A wire2086/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input169_A la_iena_mprj[18] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3379 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_2717 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2689 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_1381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__569__B _569_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2253_A wire2254/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input336_A la_oenb_mprj[53] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_wb_dat_gates\[18\]_A mprj_dat_i_user[18] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1110 vccd vssd wire1110/X _116_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1121 vccd vssd _082_/A wire1121/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1132 vccd vssd _066_/A wire1132/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2474 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1143 vccd vssd wire1143/X _624_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1154 vccd vssd wire1154/X _553_/X vssd vccd sky130_fd_sc_hd__buf_6 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vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_28_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_079_ _079_/A _079_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA_wire1186_A _511_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output722_A _599_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_280 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__479__B _479_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1353_A wire1354/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4180 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[67\] _050_/A la_data_out_core[67] _230_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_1_3540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3562 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1520_A wire1520/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1618_A wire1619/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_1020 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_170 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_1158 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3873 vssd vccd vssd vccd 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vccd sky130_fd_sc_hd__decap_4 XFILLER_2_4016 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput107 _447_/C la_data_out_mprj[78] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_3232 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput118 vccd vssd wire1745/A la_data_out_mprj[88] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__389__B _389_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_2119 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3315 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3484 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput129 _467_/C la_data_out_mprj[98] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_3265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1565 vssd vccd vssd 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vccd sky130_fd_sc_hd__decap_3 XPHY_157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_179 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2001_A wire2002/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1558 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input286_A la_oenb_mprj[123] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_80 _360_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_002_ _002_/A _002_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA_91 _256_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1211 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1391 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_1255 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input453_A mprj_iena_wb vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3226 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_3154 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__299__B _299_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1401 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_405 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1384 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_4 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_674 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_1701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3592 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_4168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1101_A wire1102/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1155 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__481__C _481_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output937_A wire1295/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1470_A _252_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1568_A wire1569/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3839 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_2611 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1509 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_622 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2666 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_2508 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_2699 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_187 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__391__C _391_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2287 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_3441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_2317 vccd vssd vssd vccd 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XFILLER_13_2327 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3916 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_2084 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_4044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2095 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_802 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_2125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3332 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_835 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_846 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3376 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input151_A la_iena_mprj[117] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2166_A wire2166/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input249_A la_iena_mprj[90] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2528 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1963 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__577__B _577_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input416_A mprj_adr_o_core[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_603_ _603_/X _603_/B _603_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_input12_A la_data_out_mprj[107] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1551 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_534_ _534_/X _534_/B _534_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_17_268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__593__A _593_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_465_ _593_/A _465_/B _465_/X _465_/C vssd vccd vssd vccd sky130_fd_sc_hd__and3b_1 XFILLER_14_953 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_3128 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_975 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_986 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_396_ _524_/A _396_/X _396_/C _396_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_43_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_3573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_456 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_1261 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xmax_cap1456 split4/A max_cap1456/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3107 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output468_A wire1211/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3068 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1099_A wire1100/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3923 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2439 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2367 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_3967 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1716 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3730 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1677 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1266_A _396_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_4328 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output802_A wire1195/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3774 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__487__B _487_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1433_A wire1434/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput290 _624_/A la_oenb_mprj[127] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_36_544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1600_A wire1601/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_4016 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3440 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_4196 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3375 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1003 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_1014 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_1637 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2603 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_2040 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_912 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput720 _597_/X la_oenb_core[100] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput731 _607_/X la_oenb_core[110] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3652 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3411 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xoutput742 _617_/X la_oenb_core[120] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput753 wire1185/X la_oenb_core[15] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3433 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3444 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput764 wire1175/X la_oenb_core[25] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput775 _532_/X la_oenb_core[35] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3696 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput786 wire1164/X la_oenb_core[45] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2207 vccd vssd wire2207/X wire2208/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput797 wire1155/X la_oenb_core[55] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2218 vccd vssd _479_/B wire2219/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2229 vccd vssd wire2229/X wire2229/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2837 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input4_A la_data_out_mprj[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1506 vccd vssd wire1506/X wire1506/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3240 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1517 vccd vssd _364_/B wire1517/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1528 vccd vssd _356_/B wire1528/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3262 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1539 vccd vssd wire1539/X wire1539/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__397__B _397_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3248 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_599 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_250_ _250_/X _250_/B _250_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_17_2260 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3860 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3871 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2736 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_3901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3724 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_181_ _181_/X _181_/B _181_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_52_1450 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1461 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input199_A la_iena_mprj[45] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__410__A_N _538_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2493 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input366_A la_oenb_mprj[80] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2283_A wire2283/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3140 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_irq_gates\[1\] _112_/A _292_/X user_irq_core[1] vssd vccd vssd vccd sky130_fd_sc_hd__nand2_1 XFILLER_43_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3048 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_175 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__588__A _588_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_3820 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2483 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2275 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3864 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3897 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1381 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_517_ _517_/X _517_/B _517_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_709 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1214 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_1334 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_448_ _576_/A _448_/X _448_/C _448_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_wire1014_A wire1015/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_219 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output585_A wire1218/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1367 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_293 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2235 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_379_ _507_/A _379_/X _379_/C _379_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output752_A wire1186/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1383_A wire1384/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3731 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3803 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[97\] wire1123/A la_data_out_core[97] _260_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_2 XFILLER_42_3021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2175 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1550_A wire1551/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1524 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1648_A wire1649/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4103 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1546 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__498__A _498_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1579 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_809 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1815_A wire1815/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1145 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_2745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_856 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3112 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__433__A_N _561_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_775 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2319 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4207 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1607 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput550 _432_/X la_data_in_core[63] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput561 _442_/X la_data_in_core[73] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput572 _452_/X la_data_in_core[83] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput583 wire1220/X la_data_in_core[93] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2004 vccd vssd _620_/B wire2005/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput594 _085_/Y la_data_in_mprj[102] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2015 vccd vssd wire2015/X wire2015/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1023 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2026 vccd vssd _613_/B wire2027/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2037 vccd vssd wire2037/X wire2037/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1303 wire1304/X wire1303/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2048 vccd vssd wire2048/X wire2049/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_1067 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2059 vccd vssd wire2059/X wire2059/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__201__A _201_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_2415 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1314 vccd vssd wire1314/X _364_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1325 vccd vssd wire1325/X wire1326/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1336 vccd vssd wire1336/X _358_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1347 vccd vssd wire1347/X wire1348/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3070 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3081 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1358 vccd vssd wire1358/X wire1359/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1369 vccd vssd wire1369/X _347_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2391 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2031_A wire2031/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input114_A la_data_out_mprj[84] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2129_A wire2129/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_302_ _302_/X _302_/B _302_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_51_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2399 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_233_ vccd vssd _233_/A _233_/X _233_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_50_1409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__590__B _590_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_735 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_164_ vccd vssd _164_/X _164_/B _164_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_49_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_768 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_095_ _095_/A _095_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_32_1898 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2304 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3711 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_3650 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_4467 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_831 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3777 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1870 vccd vssd _283_/A wire1871/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_output500_A wire1276/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1881 vccd vssd _278_/A wire1882/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1892 vccd vssd wire1892/X wire1892/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_374 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1131_A wire1131/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1229_A wire1230/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__456__A_N _584_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_4133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_311 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__484__C _484_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_170 _509_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_181 wire995/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_192 _342_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3476 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[12\] _159_/A la_data_out_core[12] _175_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 Xuser_wb_dat_gates\[25\] _139_/A mprj_dat_i_user[25] split5/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_50_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1598_A wire1599/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_2639 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1927 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_2098 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1765_A wire1765/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3600 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_2011 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2033 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2921 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2882 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[27\]_B split5/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[123\] wire1139/A la_data_out_core[123] _286_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_2 XFILLER_29_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2564 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__394__C _394_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_878 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1106 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_rebuffer2_A split4/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2285 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_204 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_1459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3347 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2635 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3110 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2079_A wire2079/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3071 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_3154 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1100 vccd vssd wire1100/X _118_/Y vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_user_wb_dat_gates\[18\]_B load_slew1458/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1111 vccd vssd wire1111/X wire1112/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1122 vccd vssd _081_/A wire1122/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input231_A la_iena_mprj[74] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1133 vccd vssd _065_/A wire1133/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2246_A wire2246/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input329_A la_oenb_mprj[47] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__479__A_N _607_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1144 vccd vssd wire1144/X _623_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1155 vccd vssd wire1155/X _552_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1166 vccd vssd wire1166/X _539_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1177 vccd vssd wire1177/X _520_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1188 vccd vssd wire1188/X _509_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1199 vccd vssd wire1199/X _498_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__585__B _585_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3741 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_697 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3616 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3064 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_216_ vccd vssd _216_/A _216_/X _216_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_11_583 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__106__A _106_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_147_ _147_/A _147_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_45_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_1083 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_078_ _078_/A _078_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_45_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4424 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output548_A wire1226/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1081_A wire1082/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1179_A _518_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_3817 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__479__C _479_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_1433 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output715_A _080_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4192 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1346_A wire1347/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4286 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_1190 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3596 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__495__B _495_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1513_A wire1514/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_1054 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_1805 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_182 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_3284 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3126 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire966_A wire967/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__016__A _016_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[60\]_A la_data_out_core[60] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput108 vccd vssd _448_/C la_data_out_mprj[79] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_44_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput119 _458_/C la_data_out_mprj[89] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_9_1151 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3244 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3327 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3040 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_103 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_114 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_3903 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XPHY_125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_136 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_147 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_158 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1504 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_1537 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_70 _363_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_001_ _001_/A _001_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA_81 _360_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_92 _298_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input181_A la_iena_mprj[29] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input279_A la_oenb_mprj[117] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_1223 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2196_A wire2196/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3111 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2719 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[51\]_A la_data_out_core[51] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_1267 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3166 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input446_A mprj_dat_o_core[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input42_A la_data_out_mprj[19] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3850 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__596__A _596_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_4439 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_5_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1396 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_5 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_664 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_163 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output498_A wire1278/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_1893 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1167 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1296_A wire1297/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2480 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output832_A _584_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3807 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[42\]_A la_data_out_core[42] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1517 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_4337 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3614 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1230 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1630_A wire1631/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3597 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_233 vssd vccd vssd vccd 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XFILLER_30_1941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1351 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4056 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__204__A _204_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2610 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_324 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_858 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_3388 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_368 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input144_A la_iena_mprj[110] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2061_A wire2061/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2159_A wire2159/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1171 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_602_ _602_/X _602_/B _602_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_input311_A la_oenb_mprj[30] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input409_A mprj_adr_o_core[29] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3920 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1563 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_533_ _533_/X _533_/B _533_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_33_729 vssd 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XFILLER_18_1346 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3360 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1660 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1007_A wire1008/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_378_ _506_/A _378_/X _378_/C _378_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_output480_A _484_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3382 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1502 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output578_A wire1224/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2670 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_2641 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_832 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1808_A wire1809/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_342 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_802 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_813 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_835 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3151 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3102 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2570 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3168 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4219 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput540 wire1236/X la_data_in_core[54] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3220 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput551 _433_/X la_data_in_core[64] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3472 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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sky130_fd_sc_hd__decap_4 XFILLER_11_3864 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3359 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3050 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__212__A _212_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_934 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3083 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_3166 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_1225 vccd vssd vssd vccd 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_358 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2436 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_1932 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1183 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1987 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2054_A wire2055/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_1998 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input137_A la_iena_mprj[104] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_601_ _601_/X _601_/B _601_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_37_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2254 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4081 vccd vssd vssd vccd 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sky130_fd_sc_hd__decap_4 X_394_ _522_/A _394_/X _394_/C _394_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_14_999 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4298 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_1296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3015 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3947 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3710 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3743 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3671 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output523_A wire1254/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_3524 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1453 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_1212 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3798 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3568 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput270 _606_/A la_oenb_mprj[109] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XFILLER_49_885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput281 vccd vssd wire1728/A la_oenb_mprj[119] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_7_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2928 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput292 _510_/A la_oenb_mprj[13] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_36_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1321_A wire1322/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_568 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output892_A wire1111/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1419_A _315_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_207 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[35\] _018_/A _198_/X la_data_out_core[35] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 XFILLER_14_3306 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_1942 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2064 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_1049 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1690_A wire1690/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1788_A wire1789/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_970 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__305__A _305_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput700 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vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1536 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output473_A _478_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1569 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output640_A _012_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output738_A _614_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3827 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_3755 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1271_A _392_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1369_A _347_/X vssd vccd vccd vssd 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vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1703_A wire1703/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3130 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2451 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire989_A wire990/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_2424 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__035__A _035_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_4501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2782 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2818 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput530 wire1248/X la_data_in_core[45] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput541 wire1234/X la_data_in_core[55] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput552 _434_/X la_data_in_core[65] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3232 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput563 _444_/X la_data_in_core[75] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3484 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput574 _454_/X la_data_in_core[85] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput585 wire1218/X la_data_in_core[95] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2006 vccd vssd wire2006/X wire2006/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput596 _087_/Y la_data_in_mprj[104] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2017 vccd vssd wire2017/X wire2018/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2028 vccd vssd wire2028/X wire2028/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3118 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2039 vccd vssd wire2039/X wire2039/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1305 vccd vssd wire1305/X wire1306/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1316 vccd vssd wire1316/X wire1317/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1327 wire1328/X wire1327/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1338 vccd vssd wire1338/X wire1339/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1349 vccd vssd wire1349/X wire1350/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_39_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1979 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3971 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_300_ _300_/X _300_/B _300_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_42_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_2368 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2017_A wire2018/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_231_ vccd vssd _231_/A _231_/X _231_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_1981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_97 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_232 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_162_ _162_/Y _162_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_10_3556 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1845 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_49_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_748 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_093_ _093_/A _093_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA_input371_A la_oenb_mprj[85] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3007 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input65_A la_data_out_mprj[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_431 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__599__B _599_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_497 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_4436 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_load_slew1459_A wire1460/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1340 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3663 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1850 vccd vssd _290_/A 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XFILLER_49_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3123 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__212__B _212_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2591 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_3178 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3009 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1102 vccd vssd wire1102/X wire1103/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1113 vccd vssd wire1113/X wire1114/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2383 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1124 vccd vssd _078_/A wire1124/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1135 vccd vssd _063_/A wire1135/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1146 vccd vssd wire1146/X _587_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3994 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1157 vccd vssd wire1157/X _550_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1168 vccd vssd wire1168/X _538_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1179 vccd vssd wire1179/X _518_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_97 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input217_A la_iena_mprj[61] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4444 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__375__A_N _503_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3710 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2301_A wire2301/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3776 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3798 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_1317 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_214_ vccd vssd _214_/A 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vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1868_A wire1869/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1759 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__313__A _313_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2935 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2764 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__398__A_N _526_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_1916 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2007 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_2396 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_655 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1662 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_3943 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_116 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_3954 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_127 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_2218 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3916 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_138 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_1041 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__207__B _207_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3651 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_360 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_50 _303_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_61 _365_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_72 _363_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_83 _288_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_94 _298_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1247 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3135 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2084_A wire2085/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input167_A la_iena_mprj[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2517 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_710 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2251_A wire2251/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input334_A la_oenb_mprj[51] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1849 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input28_A la_data_out_mprj[121] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_4132 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4252 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_975 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_7 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4116 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_603 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3453 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_12_3404 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1612 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1623 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1667 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_1044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3790 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3346 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_337 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1900 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_2415 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3441 vssd vccd vssd vccd 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vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3148 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_2583 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_712 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_723 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__316__A _316_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[90\]_A la_data_out_core[90] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput520 wire1257/X la_data_in_core[36] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput531 wire1247/X la_data_in_core[46] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput542 wire1232/X la_data_in_core[56] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput553 _435_/X la_data_in_core[66] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_2109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput564 _445_/X la_data_in_core[76] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput575 _455_/X la_data_in_core[86] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__051__A _051_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3255 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput586 wire1217/X la_data_in_core[96] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2007 vccd vssd _619_/B wire2008/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput597 _088_/Y la_data_in_mprj[105] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2018 vccd vssd wire2018/X wire2019/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2029 vccd vssd _612_/B wire2030/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1306 vccd vssd wire1306/X _366_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input2_A caravel_clk2 vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1317 vccd vssd wire1317/X wire1318/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1328 vccd vssd wire1328/X wire1329/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1339 vccd vssd wire1339/X _357_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1947 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_3095 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2372 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_230_ vccd vssd _230_/A _230_/X _230_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA__226__A _226_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_161_ _161_/Y _161_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XANTENNA_input197_A la_iena_mprj[43] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_1223 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3568 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_092_ _092_/A _092_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_3579 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[81\]_A la_data_out_core[81] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2281_A wire2281/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3019 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input364_A la_oenb_mprj[79] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1581 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input58_A la_data_out_mprj[33] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_966 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_443 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_454 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4404 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_4573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_49_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_487 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_2125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_1953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1840 vccd vssd wire1840/X wire1840/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1851 vccd vssd wire1851/X wire1852/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_1205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_1997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1862 vccd vssd wire1862/X wire1863/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1873 vccd vssd _282_/A wire1874/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1884 vccd vssd _276_/A wire1884/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_344 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1895 vccd vssd _267_/A wire1896/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_837 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_140 _513_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_151 _477_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_162 _469_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_173 _509_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_184 wire1107/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_195 _342_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4483 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_572 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_428_ _556_/A _428_/X _428_/C _428_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_wire1012_A wire1013/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2013 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output583_A wire1220/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3170 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_1189 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_359_ _359_/X _359_/B _359_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2046 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_50_1957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output750_A wire1188/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[72\]_A la_data_out_core[72] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output848_A _305_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1479_A _243_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_793 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[95\] wire1124/A la_data_out_core[95] wire1465/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_44_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2902 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3575 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3658 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1646_A wire1647/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2852 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_1368 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_1138 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_wb_dat_gates\[0\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1379 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1813_A wire1813/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput2 _297_/B caravel_clk2 vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_42_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2692 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_697 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__046__A _046_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3844 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_2266 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2108 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4007 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3888 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[63\]_A la_data_out_core[63] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3260 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2627 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3282 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_3940 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1103 vccd vssd wire1103/X wire1104/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_918 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1114 vccd vssd wire1114/X wire1115/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2456 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1125 vccd vssd _075_/A wire1125/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_108 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1136 vccd vssd _062_/A wire1136/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1147 vccd vssd wire1147/X _586_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1158 vccd vssd wire1158/X wire1159/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_4470 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1169 vccd vssd wire1169/X _536_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input112_A la_data_out_mprj[82] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_697 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire2127_A wire2127/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_1009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_358 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_213_ vccd vssd _213_/A _213_/X _213_/B vssd vccd sky130_fd_sc_hd__and2_2 X_144_ _144_/A _144_/Y vssd vccd vssd vccd sky130_fd_sc_hd__inv_12 XFILLER_49_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[54\]_A la_data_out_core[54] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_075_ _075_/A _075_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_13_1075 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2675 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1941 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2686 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_4416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__403__B _403_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3851 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_1996 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_3895 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3748 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4223 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3450 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3472 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1171 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1670 vccd vssd wire1670/X wire1670/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1681 vccd vssd _595_/A wire1681/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1692 wire1692/A _577_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_18_141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_601 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1227_A _429_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output798_A wire1153/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[23\] mprj_dat_i_user[23] rebuffer3/X _137_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 Xuser_to_mprj_in_gates\[10\] _157_/A _173_/X la_data_out_core[10] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 XFILLER_50_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1596_A wire1596/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[45\]_A la_data_out_core[45] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1763_A wire1763/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_2903 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__313__B _313_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1930_A wire1930/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3466 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2660 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[121\] wire1141/A la_data_out_core[121] _284_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_2 XFILLER_22_2546 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2618 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1198 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_2353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3900 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_122 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_106 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_128 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_139 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_497 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4364 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_862 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_40 _361_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_51 _303_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3663 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_62 _365_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3674 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_73 _362_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_84 _288_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[36\]_A la_data_out_core[36] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_394 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_95 _232_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__504__A _504_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[120\]_A la_data_out_core[120] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_46_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2077_A wire2077/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_766 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2264 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input327_A la_oenb_mprj[45] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1300 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2244_A wire2244/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1945 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3806 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1366 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_954 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__492__A_N _620_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_8 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_4264 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3530 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4128 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[27\]_A la_data_out_core[27] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[111\]_A la_data_out_core[111] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_49_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_127_ _127_/Y _127_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_29_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_058_ _058_/A _058_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_45_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_4224 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output546_A wire1289/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1782 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1177_A _520_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3775 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_3556 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3797 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output713_A _078_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1344_A wire1345/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2190 vccd vssd wire2190/X wire2190/A vssd vccd sky130_fd_sc_hd__buf_6 Xuser_to_mprj_in_gates\[58\] _041_/A la_data_out_core[58] _221_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_1_3385 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1511_A wire1511/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_2684 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1609_A wire1610/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_965 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__308__B _308_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2539 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_2085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_136 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1978_A wire1978/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_3972 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire964_A wire965/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_4113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[18\]_A la_data_out_core[18] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[102\]_A la_data_out_core[102] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_11_1524 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput60 _404_/C la_data_out_mprj[35] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_11_1546 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput71 _414_/C la_data_out_mprj[45] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput82 vccd vssd _424_/C la_data_out_mprj[55] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_28_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput93 vccd vssd input93/X la_data_out_mprj[65] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_3528 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2722 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_2540 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3149 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3099 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2365 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_1861 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1736 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4420 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_4431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2172 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4453 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_4404 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_4448 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3736 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1326 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_191 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__234__A _234_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2194_A wire2195/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2508 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input277_A la_oenb_mprj[115] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4511 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 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XFILLER_41_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_392_ _520_/A _392_/X _392_/C _392_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_52_3571 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2207_A wire2208/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_1991 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_776 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3544 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input394_A mprj_adr_o_core[15] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_2881 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_9_449 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_1243 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input88_A la_data_out_mprj[60] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3290 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2112 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__411__B _411_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3892 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3548 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput250 _254_/B la_iena_mprj[91] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput261 vccd vssd wire1736/A la_oenb_mprj[100] vssd vccd sky130_fd_sc_hd__buf_6 Xinput272 _607_/A la_oenb_mprj[110] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XFILLER_23_1247 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput283 vccd vssd wire1727/A la_oenb_mprj[120] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_4101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output509_A wire1267/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput294 _512_/A la_oenb_mprj[15] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XFILLER_18_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1042_A wire1043/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_4047 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_2790 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3444 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_1065 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3466 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output780_A wire1197/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1307_A wire1308/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output878_A wire1422/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_2055 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_3081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_2331 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_994 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_1229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4324 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1676_A wire1677/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_2397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3612 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput702 _068_/Y la_data_in_mprj[85] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_4368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput713 _078_/Y la_data_in_mprj[95] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput724 _601_/X la_oenb_core[104] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput735 _611_/X la_oenb_core[114] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__602__A _602_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput746 _621_/X la_oenb_core[124] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput757 wire1181/X la_oenb_core[19] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1843_A wire1843/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput768 _526_/X la_oenb_core[29] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput779 wire1169/X la_oenb_core[39] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__321__B _321_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_2736 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2004 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__403__A_N _531_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_2471 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_3208 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_1853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2507 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__049__A _049_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4532 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3880 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2188 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_603 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__512__A _512_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1195 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_3008 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__231__B _231_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4536 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1731 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2487 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input142_A la_iena_mprj[109] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2157_A wire2157/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3720 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input407_A mprj_adr_o_core[27] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_4476 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_50_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_513_ vccd vssd _513_/A _513_/X _513_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_19_3764 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_444_ _572_/A _444_/X _444_/C _444_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_37_1939 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_375_ _503_/A _375_/X _375_/C _375_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_13_3352 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_2651 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4403 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_964 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2146 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_1412 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_1434 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__426__A_N _554_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3779 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3531 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1257_A _405_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_3417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_2611 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1424_A wire1425/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_1088 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[40\] _023_/A la_data_out_core[40] _203_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_20_2699 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1793_A wire1794/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1140 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__316__B _316_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1774 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[90\]_B wire1469/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput510 wire1266/X la_data_in_core[27] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__332__A _332_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput521 wire1256/X la_data_in_core[37] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput532 wire1246/X la_data_in_core[47] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput543 wire1231/X la_data_in_core[57] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3464 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput554 _436_/X la_data_in_core[67] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xuser_to_mprj_in_gates\[2\] _149_/A _165_/X la_data_out_core[2] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 Xoutput565 _446_/X la_data_in_core[77] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput576 _456_/X la_data_in_core[87] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput587 _466_/X la_data_in_core[97] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2008 vccd vssd wire2008/X wire2009/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_3267 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput598 _089_/Y la_data_in_mprj[106] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2019 vccd vssd wire2019/X wire2019/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2616 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2627 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1307 wire1308/X wire1307/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1318 vccd vssd wire1318/X _363_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3052 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1329 vccd vssd wire1329/X wire1330/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2384 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3904 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_2315 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3915 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3937 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_4340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2359 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__507__A _507_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_160_ _160_/Y _160_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XANTENNA__226__B _226_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1858 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_091_ _091_/Y _091_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XANTENNA_user_to_mprj_in_gates\[81\]_B wire1478/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__449__A_N _577_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__242__A _242_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2274_A wire2274/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input357_A la_oenb_mprj[72] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_978 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_466 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3726 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1830 vccd vssd _356_/A wire1830/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1841 vccd vssd _293_/A wire1842/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1852 vccd vssd wire1852/X wire1852/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1863 vccd vssd wire1863/X wire1863/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1874 vccd vssd wire1874/X wire1874/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1885 vccd vssd _275_/A wire1885/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1896 vccd vssd wire1896/X wire1896/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_356 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4295 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_130 _625_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_141 _513_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_152 _476_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1714 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_163 _469_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_174 _509_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_185 wire1119/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_196 _342_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_427_ _555_/A _427_/X _427_/C _427_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_42_893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_584 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_4495 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_358_ _358_/X _358_/B _358_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_1925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1005_A _137_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output576_A _456_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_289_ vccd vssd _289_/X _289_/B _289_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_31_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[72\]_B _235_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output743_A _618_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2004 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1374_A wire1375/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output910_A wire1081/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[88\] wire1127/A wire1471/X la_data_out_core[88] vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_1 XFILLER_26_3587 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1347 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3120 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1639_A wire1639/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3236 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3164 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput3 vccd vssd input3/X caravel_rstn vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_621 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1806_A wire1807/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_131 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire994_A wire995/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__327__A _327_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2250 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1257 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2879 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4019 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__062__A _062_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2065 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2639 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3294 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_2953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2571 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1104 vccd vssd wire1104/X wire1105/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_2997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1115 vccd vssd wire1115/X _115_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3974 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1126 vccd vssd _074_/A wire1126/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1137 vccd vssd _061_/A wire1137/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1148 vccd vssd wire1148/X _558_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1159 vccd vssd wire1159/X _549_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4359 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input105_A la_data_out_mprj[76] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2022_A wire2022/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_1433 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__237__A _237_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_370 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_690 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_212_ _212_/X _212_/B _212_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_543 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1611 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_143_ _143_/A _143_/Y vssd vccd vssd vccd sky130_fd_sc_hd__inv_12 XFILLER_52_1081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_to_mprj_in_gates\[54\]_B _217_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input70_A la_data_out_mprj[44] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_074_ _074_/A _074_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_45_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__403__C _403_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3863 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_230 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_4257 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_3692 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3462 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_1773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3484 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1660 vccd vssd wire1660/X wire1661/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1671 vccd vssd _316_/B wire1672/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1682 vccd vssd _594_/A wire1682/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1693 wire1693/A _576_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_18_164 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1122_A wire1122/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output693_A _060_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output860_A wire1400/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[16\] mprj_dat_i_user[16] load_slew1458/X _130_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA_wire1491_A wire1491/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1132 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1589_A wire1590/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire990 vccd vssd wire990/X wire991/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1756_A wire1757/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3351 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__610__A _610_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[114\] la_data_out_core[114] _277_/X _097_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_2_1929 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_613 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_107 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_988 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_118 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__057__A _057_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1032 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_1054 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3620 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_30 _523_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_41 _322_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_52 _303_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_63 _365_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_74 _362_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_85 _269_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_96 _232_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__504__B _504_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[120\]_B _283_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3209 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__520__A _520_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1902 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2107 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2276 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4508 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2129 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input222_A la_iena_mprj[66] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_4290 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2237_A wire2238/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_657 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_9 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_4276 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3542 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_4189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_1029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_1452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_126_ _126_/Y _126_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XANTENNA__414__B _414_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[111\]_B _274_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_057_ _057_/A _057_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_7_3721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_4477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_4236 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3671 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output539_A wire1238/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1072_A wire1073/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3568 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3342 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output706_A _072_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2180 vccd vssd wire2180/X wire2181/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2191 vccd vssd _488_/B wire2192/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1337_A wire1338/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1490 vccd vssd _432_/C input91/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_229 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2674 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1504_A wire1504/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_wb_dat_gates\[20\]_A mprj_dat_i_user[20] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2064 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__605__A _605_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_3984 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1873_A wire1874/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4208 vssd vccd vssd vccd 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vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2013 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3231 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__340__A _340_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2322 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2399 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_900 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_410 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4563 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_wb_dat_gates\[11\]_A mprj_dat_i_user[11] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_476 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_1494 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4140 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_3748 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1338 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__515__A _515_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_4184 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__234__B _234_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input172_A la_iena_mprj[20] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2187_A wire2187/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1079 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3811 vccd vssd vssd vccd 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XFILLER_7_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_884 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3768 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1445 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput240 _245_/B la_iena_mprj[82] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_49_855 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput251 _255_/B la_iena_mprj[92] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_24_2984 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput262 vccd vssd _598_/A la_oenb_mprj[101] vssd vccd sky130_fd_sc_hd__buf_4 Xinput273 _608_/A la_oenb_mprj[111] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XFILLER_23_1259 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput284 vccd vssd wire1726/A la_oenb_mprj[121] vssd vccd sky130_fd_sc_hd__buf_6 Xinput295 vccd vssd _513_/A la_oenb_mprj[16] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_18_3401 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1035_A _131_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_3347 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3478 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2012 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_589_ _589_/X _589_/B _589_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1202_A _495_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output773_A wire1172/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__155__A _155_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3099 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output940_A wire1382/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_4336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput703 _069_/Y la_data_in_mprj[86] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1571_A wire1571/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3624 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1669_A wire1670/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput714 _079_/Y la_data_in_mprj[96] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput725 _602_/X la_oenb_core[105] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput736 _612_/X la_oenb_core[115] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__602__B _602_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput747 _622_/X la_oenb_core[125] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput758 wire1199/X la_oenb_core[1] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput769 wire1198/X la_oenb_core[2] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2461 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_700 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2134 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_4408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_2708 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_799 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__065__A _065_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_409 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__512__B _512_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3134 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_2411 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2444 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4548 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_169 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2308 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3994 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1743 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1787 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2010 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2052_A wire2053/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input135_A la_iena_mprj[102] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2065 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__378__A_N _506_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1270 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_512_ vccd vssd _512_/A _512_/X _512_/B vssd vccd sky130_fd_sc_hd__and2_2 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XFILLER_6_976 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_4459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__422__B _422_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_1424 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1518 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output521_A wire1256/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output619_A _108_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_3587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2853 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_685 vssd vccd vssd vccd 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XFILLER_25_3279 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput599 _090_/Y la_data_in_mprj[107] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1308 vccd vssd wire1308/X wire1309/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2409 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1319 wire1320/X wire1319/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_41_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[3\]_A la_data_out_core[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__507__B _507_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3695 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_729 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1383 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_090_ _090_/A _090_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA__523__A _523_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__242__B _242_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input252_A la_iena_mprj[93] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_3600 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_2263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3705 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3644 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1820 vccd vssd _364_/A wire1821/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1831 vccd vssd _355_/A wire1831/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1842 vccd vssd wire1842/X wire1843/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1853 vccd vssd _289_/A wire1854/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1864 vccd vssd _285_/A wire1865/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1875 vccd vssd _281_/A wire1876/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1886 vccd vssd _274_/A wire1886/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1897 vccd vssd _266_/A wire1898/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_120 _166_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3540 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vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1115_A _115_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output686_A _053_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_409_ _409_/A_N _409_/X _409_/C _409_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_50_1701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_2566 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output853_A wire1408/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__163__A _163_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire980 vccd vssd wire980/X wire981/X vssd vccd sky130_fd_sc_hd__buf_6 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vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_3012 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[107\] la_data_out_core[107] _270_/X _090_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA__439__A_N _567_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__338__A _338_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_108 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_466 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_157 vccd vssd vssd vccd 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vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2415 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__520__B _520_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3822 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1914 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2288 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_1313 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1958 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_1407 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1969 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input215_A la_iena_mprj[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4113 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__248__A _248_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4157 vssd vccd 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4248 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3683 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__430__B _430_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_2960 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4055 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1065_A _125_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2170 vccd vssd wire2170/X wire2170/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2181 vccd vssd wire2181/X wire2181/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2192 vccd vssd wire2192/X wire2193/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2570 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1480 vccd vssd wire1480/X _242_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3398 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1491 vccd vssd _300_/B wire1491/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1232_A wire1233/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__158__A _158_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_2697 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_1952 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_978 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[20\]_B load_slew1458/X vssd vccd vccd vssd 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vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput84 _426_/C la_data_out_mprj[57] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_7_890 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput95 vccd vssd input95/X la_data_out_mprj[67] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_45_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_2713 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__621__A _621_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2768 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3243 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__340__B _340_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3171 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_205 vssd vccd vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_25_488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3896 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__515__B _515_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_4196 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_3462 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_1773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1161 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1058 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__531__A _531_/A vssd vccd vccd vssd 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2591 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__261__A _261_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4343 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3631 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_841 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_4387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3725 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3675 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1363 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput230 _236_/B la_iena_mprj[73] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput241 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sky130_ef_sc_hd__decap_12 X_588_ vccd vssd _588_/X _588_/B _588_/A vssd vccd sky130_fd_sc_hd__and2_1 XANTENNA_wire1028_A wire1029/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2647 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output599_A _090_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_3181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_3072 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_929 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3094 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output766_A _524_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_4304 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 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wire1565/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput748 wire1144/X la_oenb_core[126] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_7_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput759 wire1180/X la_oenb_core[20] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3130 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3152 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1731_A wire1731/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3163 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1829_A wire1829/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_2556 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_734 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__346__A _346_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1423 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_2288 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1434 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1407 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[93\]_A la_data_out_core[93] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__081__A _081_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_616 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2423 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_649 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3951 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1711 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3780 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2055 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input128_A la_data_out_mprj[97] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1321 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2045_A wire2046/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_511_ _511_/X _511_/B _511_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_2_1387 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_4000 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_442_ _570_/A _442_/X _442_/C _442_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_wire2212_A wire2213/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_211 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__256__A _256_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_4044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_373_ _501_/A _373_/X _373_/C _373_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4088 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input93_A la_data_out_mprj[65] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1031 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[84\]_A la_data_out_core[84] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_2664 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_wb_dat_gates\[9\] mprj_dat_i_user[9] max_cap1456/X _123_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_26_4427 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3715 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_2209 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__422__C _422_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4151 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1447 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_4004 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3680 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_660 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_1171 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_1013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output514_A wire1263/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2876 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2635 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_2679 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_829 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1312_A wire1313/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_583 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3276 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output883_A wire1061/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__472__A_N _600_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_3118 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__166__A _166_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[26\] _009_/A la_data_out_core[26] _189_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_18_2564 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2417 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[75\]_A la_data_out_core[75] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2775 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_4112 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1779_A wire1779/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2797 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__613__B _613_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4156 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput501 wire1275/X la_data_in_core[19] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput512 wire1264/X la_data_in_core[29] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput523 wire1254/X la_data_in_core[39] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3444 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput534 wire1244/X la_data_in_core[49] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1946_A wire1947/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput545 wire1228/X la_data_in_core[59] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput556 _438_/X la_data_in_core[69] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_user_wb_dat_gates\[3\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput567 _448_/X la_data_in_core[79] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput578 wire1224/X la_data_in_core[89] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput589 wire1216/X la_data_in_core[99] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1309 vccd vssd wire1309/X wire1310/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2579 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_3076 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_1157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_837 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_3892 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__076__A _076_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4364 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3652 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_4228 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1351 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_to_mprj_in_gates\[66\]_A la_data_out_core[66] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_1275 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1297 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__523__B _523_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4324 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3831 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_3612 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2162_A wire2162/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_3623 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2275 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input245_A la_iena_mprj[87] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1810 vccd vssd _368_/A wire1811/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3739 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1821 vccd vssd wire1821/X wire1821/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1585 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1832 vccd vssd _300_/A wire1832/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1843 vccd vssd wire1843/X wire1843/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1854 vccd vssd wire1854/X wire1855/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1865 vccd vssd wire1865/X wire1866/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input412_A mprj_adr_o_core[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1876 vccd vssd wire1876/X wire1876/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__495__A_N _623_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1887 vccd vssd _273_/A wire1887/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1898 vccd vssd wire1898/X wire1898/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1140 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_110 _182_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_121 _166_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_132 _625_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_143 _506_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_154 _476_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_165 _469_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_176 wire1760/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_425_ vssd vccd _425_/B _425_/X _553_/A _425_/C vssd vccd sky130_fd_sc_hd__and3b_2 XANTENNA_187 _344_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_2141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_198 _340_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__417__C _417_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1148 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_597 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_356_ _356_/X _356_/B _356_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_user_to_mprj_in_gates\[57\]_A la_data_out_core[57] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_287_ _287_/X _287_/B _287_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__433__B _433_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output464_A wire1215/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4235 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3523 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3606 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2017 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3617 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output631_A _003_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output729_A _606_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2866 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_4097 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_1591 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_3144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput5 _469_/C la_data_out_mprj[100] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_0_3249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_2443 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1527_A wire1527/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_3188 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_111 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1858 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__608__B 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sky130_ef_sc_hd__decap_12 XANTENNA__343__B _343_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1292 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2619 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3022 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_906 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3077 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2437 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1106 vccd vssd wire1106/X wire1107/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1117 vccd vssd wire1117/X wire1118/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1128 vccd vssd _070_/A wire1128/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1139 vccd vssd _106_/A wire1139/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__518__B _518_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3736 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_884 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_210_ _210_/X _210_/B _210_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_51_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[39\]_A la_data_out_core[39] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2008_A wire2009/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__534__A _534_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[123\]_A la_data_out_core[123] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 X_141_ _141_/A _141_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_32_1624 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input195_A la_iena_mprj[41] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_1034 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2623 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1657 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4511 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_072_ _072_/A _072_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_32_1679 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2082 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_2667 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4555 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input362_A la_oenb_mprj[77] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input56_A la_data_out_mprj[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_3718 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4132 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_2061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_298 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3431 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1640 vccd vssd _306_/B wire1641/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1651 vccd vssd wire1651/X wire1651/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1662 vccd vssd wire1662/X wire1662/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1673 vccd vssd _315_/B wire1674/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1684 vccd vssd _585_/A wire1684/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1196 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_2868 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1695 wire1695/A _574_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_19_4072 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3360 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__428__B _428_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3202 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_408_ _536_/A _408_/X _408_/C _408_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_14_394 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output581_A wire1222/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1108_A wire1109/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output679_A _047_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_2409 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[114\]_A la_data_out_core[114] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_32_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_339_ _339_/X _339_/B _339_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2291 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_1156 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire970 vccd vssd wire970/X wire971/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_output846_A wire1191/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire981 vccd vssd wire981/X _142_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire992 vccd vssd wire992/X wire993/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_31_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2917 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1477_A _245_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3320 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[93\] _076_/A la_data_out_core[93] wire1466/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_48_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1644_A wire1644/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3182 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1811_A wire1811/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_2312 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1909_A wire1910/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3068 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__619__A _619_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_412 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_946 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__338__B _338_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_957 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_10 _554_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2082 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_21 _222_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_32 wire1606/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[105\]_A la_data_out_core[105] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XANTENNA__354__A _354_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_43 _559_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_54 _303_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_375 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_65 _365_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3092 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_76 _360_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3688 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_87 _269_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_98 _230_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2427 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3784 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3856 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1926 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__529__A _529_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input110_A la_data_out_mprj[80] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input208_A la_iena_mprj[53] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1899 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__264__A _264_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_3132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_124_ _124_/Y _124_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_10_2431 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1476 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_055_ _055_/A _055_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_49_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1730 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2475 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1774 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__430__C _430_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3695 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4001 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_4181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3300 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1269 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2160 vccd vssd _501_/B wire2160/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3261 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2171 vccd vssd _495_/B wire2172/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_4089 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2182 vccd vssd _491_/B wire2183/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3355 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2193 vccd vssd wire2193/X wire2193/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1058_A wire1059/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1470 _252_/X wire1470/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1481 vccd vssd wire1481/X _241_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1492 vccd vssd _299_/B wire1493/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2593 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output796_A _551_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_2629 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_106 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_128 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_1365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__174__A _174_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2807 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_wb_dat_gates\[21\] mprj_dat_i_user[21] load_slew1458/X _135_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_30_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1594_A wire1595/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput30 _492_/C la_data_out_mprj[123] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_50_1565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput41 _387_/C la_data_out_mprj[18] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput52 _397_/C la_data_out_mprj[28] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput63 _407_/C la_data_out_mprj[38] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput74 _417_/C la_data_out_mprj[48] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_wire1761_A wire1761/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput85 vccd vssd _427_/C la_data_out_mprj[58] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_41_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput96 vccd vssd input96/X la_data_out_mprj[68] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1859_A wire1860/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__621__B _621_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3255 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3183 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__406__A_N _406_/A_N vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3119 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1842 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1060 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__349__A _349_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3864 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_629 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_3799 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__084__A _084_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1730 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_1004 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_1184 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3008 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__531__B _531_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_533 vccd vssd vssd vccd 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vssd sky130_fd_sc_hd__diode_2 XFILLER_40_1745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__259__A _259_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input19_A la_data_out_mprj[113] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1155 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_3065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2651 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__425__C _425_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4425 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4458 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_107_ _107_/Y _107_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_32_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput908 wire1091/X mprj_dat_i_core[5] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput919 wire1352/X mprj_dat_o_user[15] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_45_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__429__A_N _557_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_038_ _038_/A _038_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XANTENNA__441__B _441_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 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sky130_fd_sc_hd__diode_2 XFILLER_26_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[56\] _039_/A la_data_out_core[56] _219_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_35_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_272 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1607_A wire1608/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2415 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__616__B _616_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1162 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3750 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1976_A wire1976/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire962_A wire963/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_2047 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1335 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__351__B _351_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_308 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_2616 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3063 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3951 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2395 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__079__A _079_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1569 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__526__B _526_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3872 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__542__A _542_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2192_A wire2193/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input275_A la_oenb_mprj[113] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2319 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__261__B _261_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1607 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3704 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input442_A mprj_dat_o_core[29] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3643 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_4399 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_1425 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_4151 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3687 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput220 vccd vssd _227_/B la_iena_mprj[64] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_1_897 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput231 _237_/B la_iena_mprj[74] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_0_374 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_1375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput242 _247_/B la_iena_mprj[84] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_4173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_3450 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput253 _257_/B la_iena_mprj[94] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_7_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput264 _600_/A la_oenb_mprj[103] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 Xinput275 vccd vssd wire1734/A la_oenb_mprj[113] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3483 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput286 vccd vssd _620_/A la_oenb_mprj[123] vssd vccd sky130_fd_sc_hd__buf_4 Xinput297 vccd vssd _515_/A la_oenb_mprj[18] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_48_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_587_ vccd vssd _587_/A _587_/X _587_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__436__B _436_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1914 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output494_A wire1282/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output661_A _031_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_2356 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output759_A wire1180/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1292_A _371_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_4119 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput705 _071_/Y la_data_in_mprj[88] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput716 _081_/Y la_data_in_mprj[98] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput727 _604_/X la_oenb_core[107] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput738 _614_/X la_oenb_core[117] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput749 wire1143/X la_oenb_core[127] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_output926_A wire1334/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_2121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_1117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1557_A wire1558/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1724_A wire1725/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_2568 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_2496 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_540 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__346__B _346_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_757 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_407 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[93\]_B wire1466/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_1419 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__362__A _362_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3042 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3125 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_1217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3963 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2457 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_4471 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2023 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_4424 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_518 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_510_ _510_/X _510_/B _510_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_45_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2078 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1344 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3734 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2038_A wire2039/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_441_ _569_/A _441_/X _441_/C _441_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA__537__A _537_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3609 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4061 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_372_ _500_/A _372_/X _372_/C _372_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2205_A wire2205/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_4056 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3382 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input392_A mprj_adr_o_core[13] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_1043 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[84\]_B wire1475/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_2692 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input86_A la_data_out_mprj[59] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__272__A _272_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_934 vssd vccd vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_20_2603 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_1025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2866 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2647 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output507_A wire1270/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1040_A _130_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_348 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_551 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_3124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2423 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3288 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3179 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1305_A wire1306/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output876_A wire1424/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1121 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[19\] _002_/A la_data_out_core[19] _182_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_20_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[75\]_B _238_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__182__A _182_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_4124 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1674_A wire1674/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput502 wire1293/X la_data_in_core[1] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4168 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput513 wire1292/X la_data_in_core[2] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_48_3985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput524 wire1291/X la_data_in_core[3] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput535 wire1290/X la_data_in_core[4] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3456 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput546 wire1289/X la_data_in_core[5] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput557 wire1288/X la_data_in_core[6] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1841_A wire1842/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput568 wire1287/X la_data_in_core[7] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3248 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1939_A wire1939/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput579 wire1286/X la_data_in_core[8] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3180 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2547 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1929 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3860 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2365 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3998 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__357__A _357_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4376 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1806 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1243 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1363 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_1227 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__092__A _092_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_425 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_4336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3843 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3771 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1800 vccd vssd _373_/B wire1801/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1312 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input140_A la_iena_mprj[107] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1811 vccd vssd wire1811/X wire1811/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1334 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1822 vccd vssd _363_/A wire1823/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input238_A la_iena_mprj[80] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1833 vccd vssd _354_/A wire1833/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1844 vccd vssd _292_/A wire1845/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1855 vccd vssd wire1855/X wire1855/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1866 vccd vssd wire1866/X wire1866/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1877 vccd vssd _280_/A wire1878/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1888 vccd vssd _272_/A wire1888/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1899 vccd vssd _265_/A wire1900/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input405_A mprj_adr_o_core[25] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_100 _230_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_111 _182_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__267__A _267_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_122 _164_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_133 _625_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_144 _506_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1706 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_155 _475_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_166 _469_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3428 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_424_ vssd vccd _424_/B _424_/X _552_/A _424_/C vssd vccd sky130_fd_sc_hd__and3b_2 XFILLER_37_1728 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_177 wire1758/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_188 _344_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1127 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_199 _340_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_2153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3130 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_355_ _355_/X _355_/B _355_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[57\]_B _220_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2028 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_286_ _286_/X _286_/B _286_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_13_2451 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_2495 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__433__C _433_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4203 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_764 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4247 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3629 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1088_A wire1089/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1339 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_981 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_1109 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1030 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1255_A _407_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_2411 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3156 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput6 _470_/C la_data_out_mprj[101] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_4_2685 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_1951 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1422_A _313_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_605 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_2499 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__177__A _177_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2351 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2827 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1791_A wire1792/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[48\]_B _211_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1889_A wire1889/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2297 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__624__B _624_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_2595 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3117 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[0\] _147_/A _625_/X la_data_out_core[0] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 XFILLER_40_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2355 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1107 vccd vssd wire1107/X wire1108/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3966 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1118 vccd vssd wire1118/X wire1119/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1129 vccd vssd _069_/A wire1129/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_4380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1895 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_602 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2140 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3740 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1461 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__087__A _087_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4140 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_852 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4162 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_660 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4004 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4184 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3472 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[39\]_B _202_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_140_ _140_/A _140_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XANTENNA__534__B _534_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[123\]_B _286_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1171 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_071_ _071_/A _071_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_2635 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4523 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input188_A la_iena_mprj[35] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_4567 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__550__A _550_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_1967 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input355_A la_oenb_mprj[70] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3708 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2272_A wire2272/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__462__A_N _590_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input49_A la_data_out_mprj[25] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3651 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_3673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2095 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_3443 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1630 vccd vssd _327_/B wire1631/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1641 vccd vssd wire1641/X wire1642/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1652 vccd vssd _322_/B wire1653/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_635 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1663 vccd vssd _319_/B wire1664/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1674 vccd vssd wire1674/X wire1674/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1685 vccd vssd _584_/A wire1685/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1696 wire1696/A _573_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_34_616 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_4084 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__428__C _428_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2502 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_407_ _535_/A _407_/X _407_/C _407_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_15_3258 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_90 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__444__B _444_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[114\]_B _277_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_338_ _338_/X _338_/B _338_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_1260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1003_A wire1004/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output574_A _454_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_269_ vccd vssd _269_/A _269_/X _269_/B vssd vccd sky130_fd_sc_hd__and2_2 Xwire971 vccd vssd wire971/X wire972/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3892 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4011 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire982 vccd vssd wire982/X wire983/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire993 vccd vssd wire993/X wire994/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_output741_A wire1189/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output839_A _590_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2929 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1372_A _346_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1020 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[86\] la_data_out_core[86] wire1473/X wire1129/A vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_8 XFILLER_26_3387 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2528 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1637_A wire1638/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_3025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3194 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_903 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__619__B _619_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1804_A wire1805/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_wb_dat_gates\[23\]_A mprj_dat_i_user[23] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_2368 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1634 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_435 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire992_A wire993/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_4460 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4324 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3612 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_11 _213_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_22 _223_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_1079 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[105\]_B wire1463/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__354__B _354_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_1311 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_33 _340_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_44 _559_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_55 _367_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_66 _365_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_77 _360_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_88 _264_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_99 _230_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__485__A_N _613_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2439 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3752 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1670 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1681 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3796 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4271 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_903 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[14\]_A mprj_dat_i_user[14] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_4224 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_1801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3512 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2020_A wire2021/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input103_A la_data_out_mprj[74] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2118_A wire2118/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3567 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__545__A _545_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2735 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1108 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1119 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__264__B _264_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_123_ _123_/Y _123_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_10_2443 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4331 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_054_ _054_/A _054_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_7_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__280__A _280_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2487 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_3505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3757 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_3538 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2150 vccd vssd wire2150/X wire2150/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_4068 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2161 vccd vssd _500_/B wire2162/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2172 vccd vssd wire2172/X wire2173/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1191 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2183 vccd vssd wire2183/X wire2184/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3284 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2194 vccd vssd _487_/B wire2195/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1460 wire1461/X wire1460/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__439__B _439_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1471 vccd vssd wire1471/X _251_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2644 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1482 vccd vssd wire1482/X _240_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2583 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1493 vccd vssd wire1493/X wire1493/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2666 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1965 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1120_A _114_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1218_A _464_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output691_A _058_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output789_A _545_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__174__B _174_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output956_A _297_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_2218 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2229 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_wb_dat_gates\[14\] mprj_dat_i_user[14] split4/X _128_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 Xinput20 vccd vssd input20/X la_data_out_mprj[114] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput31 _493_/C la_data_out_mprj[124] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_wire1587_A wire1588/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput42 _388_/C la_data_out_mprj[19] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput53 _398_/C la_data_out_mprj[29] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput64 _408_/C la_data_out_mprj[39] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput75 _418_/C la_data_out_mprj[49] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput86 _428_/C la_data_out_mprj[59] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA__190__A _190_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput97 vccd vssd input97/X la_data_out_mprj[69] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_3267 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_3195 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2347 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2419 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[112\] la_data_out_core[112] _275_/X _095_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA__349__B _349_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_733 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_1381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_1392 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3745 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__365__A _365_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3876 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_298 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3420 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1016 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4515 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4311 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput402 vccd vssd wire1632/A mprj_adr_o_core[22] vssd vccd sky130_fd_sc_hd__buf_6 Xinput413 vccd vssd wire1581/A mprj_adr_o_core[3] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2068_A wire2069/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput424 vccd vssd wire1541/A mprj_dat_o_core[12] vssd vccd sky130_fd_sc_hd__buf_6 Xinput435 vccd vssd wire1522/A mprj_dat_o_core[22] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput446 vccd vssd wire1510/A mprj_dat_o_core[3] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3571 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2065 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput457 vccd vssd _304_/B mprj_sel_o_core[3] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_2_3665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_1101 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_4308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input220_A la_iena_mprj[64] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2964 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input318_A la_oenb_mprj[37] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4010 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1239 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_4021 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4054 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__275__A _275_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3364 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3206 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2554 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_106_ _106_/A _106_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_51_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_3808 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput909 wire1086/X mprj_dat_i_core[6] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 X_037_ _037_/A _037_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_45_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__441__C _441_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_361 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3543 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_3471 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output537_A wire1242/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1070_A _124_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3120 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1335_A wire1336/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2118 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1290 vccd vssd wire1290/X _373_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_39_2129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3106 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[49\] _032_/A la_data_out_core[49] _212_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_35_744 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_1773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1502_A wire1502/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2427 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__185__A _185_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1639 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3762 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3784 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1871_A wire1872/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1969_A wire1969/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_4008 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2545 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_2628 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1927 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3075 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1877 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1515 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_1526 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_1537 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4243 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3640 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3531 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1261 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__095__A _095_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_438 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_758 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_482 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3884 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__542__B _542_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2571 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input170_A la_iena_mprj[19] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input268_A la_oenb_mprj[107] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2185_A wire2186/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1310 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_3716 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_1332 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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sky130_fd_sc_hd__decap_3 X_569_ _569_/X _569_/B _569_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_706 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_2700 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1200_A _497_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2479 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output771_A _528_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1756 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output869_A _334_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__182__B _182_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1431 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_9_4136 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput503 wire1274/X la_data_in_core[20] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput514 wire1263/X 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XFILLER_29_1972 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3012 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2559 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1251 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3977 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__357__B _357_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4208 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1239 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4304 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_448 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_2222 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3980 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4348 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3783 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3636 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1801 vccd vssd wire1801/X wire1801/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_2299 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1812 vccd vssd _367_/A wire1813/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1823 vccd vssd wire1823/X wire1823/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1834 vccd vssd _353_/A wire1834/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1845 vccd vssd wire1845/X wire1846/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input133_A la_iena_mprj[100] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1429 vssd vccd vssd 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XFILLER_10_3348 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_1183 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_070_ _070_/Y _070_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_49_2813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2647 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4535 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2098_A wire2098/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_201 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__550__B _550_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input250_A la_iena_mprj[91] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_1408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2265_A wire2266/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input348_A la_oenb_mprj[64] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4156 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3591 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1620 vccd vssd wire1620/X wire1621/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_603 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1631 vccd vssd wire1631/X wire1632/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1642 vccd vssd wire1642/X wire1643/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1653 vccd vssd wire1653/X wire1654/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2984 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1664 vccd vssd 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sky130_fd_sc_hd__diode_2 XFILLER_45_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4067 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output734_A _610_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1032 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1115 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1365_A wire1366/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_790 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output901_A wire978/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 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XFILLER_1_2601 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2184 vccd vssd wire2184/X wire2184/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1450 vccd vssd wire1450/X wire1451/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2195 vccd vssd wire2195/X wire2196/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2551 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1461 vccd vssd wire1461/X _294_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_753 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1472 vccd vssd wire1472/X _250_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__439__C _439_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1483 vccd vssd _439_/C input99/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_775 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_2656 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1911 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1494 vccd vssd _294_/B wire1495/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_650 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__455__B _455_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_1345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1113_A wire1114/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output684_A _052_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_2344 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_686 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput10 _474_/C la_data_out_mprj[105] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_output851_A wire1412/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput21 vccd vssd input21/X la_data_out_mprj[115] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput32 _494_/C la_data_out_mprj[125] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_output949_A wire1449/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput43 _370_/C la_data_out_mprj[1] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput54 _371_/C la_data_out_mprj[2] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_50_1589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput65 _372_/C la_data_out_mprj[3] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_wire1482_A _240_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput76 _373_/C la_data_out_mprj[4] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput87 _374_/C la_data_out_mprj[5] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA__190__B _190_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput98 _375_/C la_data_out_mprj[6] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_45_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1747_A wire1747/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1800 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1855 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1719 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[105\] la_data_out_core[105] wire1463/X _088_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_0_2144 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1410 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3800 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3702 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4447 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3822 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4458 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3844 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_789 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xmprj2_logic_high_inst wire2306/A vccd2 vssd2 mprj2_logic_high XFILLER_11_4100 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__365__B _365_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3888 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__452__A_N _580_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_1407 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_152 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_697 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3487 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4527 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_3815 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2259 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4240 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput403 vccd vssd wire1629/A mprj_adr_o_core[23] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput414 vccd vssd wire1576/A mprj_adr_o_core[4] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_4284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput425 vccd vssd wire1539/A mprj_dat_o_core[13] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_3791 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput436 vccd vssd wire1521/A mprj_dat_o_core[23] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput447 vccd vssd wire1508/A mprj_dat_o_core[4] vssd vccd sky130_fd_sc_hd__buf_6 Xinput458 vccd vssd wire1493/A mprj_stb_o_core vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_29_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2130_A wire2130/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1168 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input213_A la_iena_mprj[58] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2228_A wire2229/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__556__A _556_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3332 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_1020 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__275__B _275_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2566 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_12_2517 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__291__A _291_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_105_ _105_/Y _105_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4151 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_036_ _036_/A _036_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_1540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1584 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2613 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_3369 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1063_A wire1064/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_3132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2420 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1280 vccd vssd wire1280/X _383_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1291 vccd vssd wire1291/X _372_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1328_A wire1329/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__475__A_N _603_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3118 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output899_A wire987/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__185__B _185_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3774 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1304 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1315 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1864_A wire1865/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_1906 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4560 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2292 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2375 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xmprj_logic_high_inst wire2301/A wire2300/A _396_/B _397_/B _398_/B _399_/B _400_/B + _401_/B _402_/B _403_/B _404_/B wire2299/A _405_/B _406_/B _407_/B _408_/B _409_/B + _410_/B _411_/B _412_/B _413_/B _414_/B wire2298/A _415_/B _416_/B _417_/B _418_/B + _419_/B _420_/B _421_/B _422_/B _423_/B _424_/B wire2297/A _425_/B _426_/B _427_/B + _428_/B _429_/B _430_/B _431_/B wire2296/A wire2295/A wire2294/A wire2293/A wire2292/A + wire2291/A wire2290/A wire2288/A wire2287/A wire2286/A wire2285/A wire2284/A wire2283/A + wire2282/A wire2281/A wire2280/A wire2279/A wire2278/A wire2277/A wire2276/A wire2274/A + wire2272/A wire2270/A wire2267/A wire2264/A wire2261/A wire2260/A wire2257/A wire2254/A + wire2251/A wire2250/A wire2249/A wire2248/A wire2247/A wire2246/A wire2245/A _311_/A + wire2244/A wire2243/A wire2241/A wire2239/A wire2238/A wire2236/A wire2235/A wire2233/A + wire2231/A wire2229/A _312_/A wire2227/A wire2225/A wire2223/A wire2221/A wire2219/A + wire2217/A wire2214/A wire2211/A wire2208/A wire2205/A _313_/A wire2202/A wire2199/A + wire2196/A wire2193/A wire2190/A wire2187/A wire2184/A wire2181/A wire2178/A wire2175/A + _314_/A _296_/A wire2173/A wire2170/A wire2168/A wire2166/A wire2164/A wire2162/A + wire2160/A wire2159/A wire2157/A wire2156/A _315_/A wire2155/A wire2154/A wire2152/A + wire2151/A _509_/B wire2150/A wire2148/A wire2146/A wire2145/A wire2144/A _316_/A + wire2143/A wire2142/A wire2141/A wire2140/A wire2139/A wire2138/A wire2137/A wire2136/A + _523_/B _524_/B _317_/A wire2135/A _526_/B _527_/B _528_/B _529_/B wire2134/A wire2133/A + _532_/B _533_/B _534_/B _318_/A _535_/B _536_/B _537_/B wire2132/A _539_/B _540_/B + _541_/B _542_/B _543_/B _544_/B _319_/A _545_/B _546_/B _547_/B _548_/B _549_/B + _550_/B _551_/B _552_/B _553_/B _554_/B _320_/A _555_/B _556_/B _557_/B _558_/B + wire2131/A _560_/B wire2130/A wire2129/A wire2128/A wire2127/A _321_/A wire2126/A + wire2125/A wire2123/A wire2122/A wire2120/A wire2118/A wire2117/A wire2116/A wire2114/A + wire2112/A _322_/A wire2110/A wire2108/A wire2106/A wire2104/A wire2102/A wire2100/A + wire2098/A wire2096/A wire2094/A wire2091/A _323_/A wire2089/A wire2087/A wire2086/A + wire2085/A wire2083/A wire2082/A wire2081/A wire2079/A wire2077/A wire2075/A _324_/A + wire2073/A wire2069/A wire2067/A wire2065/A wire2063/A wire2061/A wire2059/A wire2057/A + wire2055/A wire2053/A wire2051/A _325_/A wire2049/A wire2046/A wire2044/A wire2041/A + wire2039/A wire2037/A wire2034/A wire2031/A wire2028/A wire2025/A _326_/A wire2022/A + wire2019/A wire2015/A wire2012/A wire2009/A wire2006/A wire2003/A wire2000/A wire1997/A + wire1994/A _327_/A wire1991/A wire1989/A wire1987/A wire1985/A wire1983/A wire1981/A + wire1979/A wire1978/A wire1976/A wire1975/A _328_/A wire1974/A wire1973/A wire1971/A + wire1969/A wire1967/A wire1966/A wire1964/A wire1962/A wire1961/A wire1960/A wire1958/A + wire1957/A wire1955/A wire1953/A wire1952/A wire1951/A wire1950/A wire1949/A wire1948/A + wire1947/A wire1945/A wire1944/A wire1943/A wire1942/A wire1941/A wire1940/A _197_/A + _198_/A _199_/A _200_/A _201_/A _202_/A wire1939/A _203_/A _204_/A _205_/A _206_/A + wire1938/A wire1937/A wire1936/A _210_/A _211_/A _212_/A wire1935/A _213_/A _214_/A + _215_/A _216_/A _217_/A _218_/A _219_/A _220_/A _221_/A _222_/A wire1934/A _223_/A + _224_/A _225_/A _226_/A _227_/A _228_/A _229_/A wire1933/A wire1932/A wire1931/A + wire1930/A wire1929/A wire1928/A wire1927/A _235_/A _236_/A _237_/A wire1926/A _239_/A + _240_/A _241_/A wire1925/A wire1924/A wire1923/A _244_/A _245_/A _246_/A _247_/A + wire1922/A wire1921/A wire1920/A wire1919/A wire1918/A _336_/A wire1917/A wire1916/A + wire1915/A wire1914/A wire1913/A wire1912/A wire1911/A wire1910/A wire1908/A wire1906/A + _337_/A wire1904/A wire1902/A wire1900/A wire1898/A wire1896/A wire1894/A wire1892/A + wire1890/A wire1889/A wire1888/A _338_/A wire1887/A wire1886/A wire1885/A wire1884/A + wire1883/A wire1882/A wire1880/A wire1878/A wire1876/A wire1874/A _339_/A wire1872/A + wire1869/A wire1866/A wire1863/A wire1860/A wire1858/A wire1855/A wire1852/A wire1849/A + wire1846/A _340_/A wire1843/A wire1840/A _294_/A _341_/A _342_/A _343_/A _344_/A + _299_/A _345_/A _346_/A _347_/A _348_/A _349_/A wire1837/A wire1836/A wire1835/A + wire1834/A wire1833/A wire1832/A wire1831/A wire1830/A wire1829/A wire1828/A wire1827/A + wire1826/A wire1825/A wire1824/A wire1823/A wire1821/A wire1819/A wire1817/A wire1815/A + wire1813/A wire1811/A wire1809/A wire1807/A wire1805/A wire1803/A wire1801/A wire1799/A + wire1797/A wire1795/A wire1792/A wire1789/A wire1787/A wire1785/A wire1783/A wire1781/A + wire1779/A wire1777/A wire1775/A wire1773/A wire1771/A wire1769/A wire1767/A wire1765/A + wire1763/A wire1761/A wire1760/A wire1759/A wire1758/A wire1757/A wire1755/A vccd1 + vssd1 mprj_logic_high XFILLER_2_1505 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3652 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3543 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_4299 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[96\]_A la_data_out_core[96] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_3587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1237 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_494 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_4532 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1871 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_4576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_1901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2080_A wire2081/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input163_A la_iena_mprj[12] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_822 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2178_A wire2178/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[20\]_A la_data_out_core[20] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput200 vccd vssd _209_/B la_iena_mprj[46] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_40_2201 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput211 _219_/B la_iena_mprj[56] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_44_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput222 vccd vssd _229_/B la_iena_mprj[66] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_0_365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput233 _239_/B la_iena_mprj[76] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_input330_A la_oenb_mprj[48] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_2234 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput244 _249_/B la_iena_mprj[86] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_input428_A mprj_dat_o_core[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput255 _259_/B la_iena_mprj[96] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput266 vccd vssd _602_/A la_oenb_mprj[105] vssd vccd sky130_fd_sc_hd__buf_4 XANTENNA_input24_A la_data_out_mprj[118] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput277 vccd vssd wire1732/A la_oenb_mprj[115] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput288 _622_/A la_oenb_mprj[125] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_2740 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3496 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput299 vccd vssd _498_/A la_oenb_mprj[1] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_29_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4019 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_1015 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1048 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__286__A _286_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_585_ _585_/X _585_/B _585_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_17_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[87\]_A la_data_out_core[87] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2049 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_3195 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_461 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_984 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_472 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_2369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__452__C _452_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput707 _155_/Y la_data_in_mprj[8] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput718 _156_/Y la_data_in_mprj[9] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput729 _606_/X la_oenb_core[109] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 X_019_ _019_/Y _019_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XANTENNA_wire1180_A _517_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4075 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1278_A _385_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_192 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[11\]_A la_data_out_core[11] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1445_A wire1446/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_2443 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[61\] _044_/A la_data_out_core[61] _224_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XANTENNA_wire1612_A wire1613/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__196__A _196_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1593 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_597 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[78\]_A la_data_out_core[78] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4250 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3560 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1713 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[6\]_B split4/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_1167 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1189 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_3077 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1725 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1302 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1252 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_4448 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_370_ _498_/A _370_/X _370_/C _370_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_13_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[69\]_A la_data_out_core[69] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3313 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_2060 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__553__B _553_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_1078 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_2678 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input280_A la_oenb_mprj[118] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2295_A wire2295/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2970 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input378_A la_oenb_mprj[91] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_435 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3525 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3475 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_1005 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_2763 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1257 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_2616 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2592 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3224 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__447__C _447_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_512 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_568_ _568_/X _568_/B _568_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1026_A wire1027/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1702 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output597_A _088_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1713 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2589 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_499_ _499_/X _499_/B _499_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__463__B _463_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3880 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output764_A wire1175/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1395_A wire1396/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1492 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput504 wire1273/X la_data_in_core[21] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_output931_A wire1315/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput515 wire1262/X la_data_in_core[31] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput526 wire1252/X la_data_in_core[41] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput537 wire1242/X la_data_in_core[51] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput548 wire1226/X la_data_in_core[61] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1562_A wire1563/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput559 _440_/X la_data_in_core[71] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2527 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3046 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1827_A wire1827/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_1285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1600 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3909 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4383 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3780 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3622 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__373__B _373_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_1207 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2140 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3751 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_2234 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3992 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3795 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1802 vccd vssd _372_/B wire1803/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1813 vccd vssd wire1813/X wire1813/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1824 vccd vssd _362_/A wire1824/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1835 vccd vssd _352_/A wire1835/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1846 vccd vssd wire1846/X wire1846/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_4212 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1857 vccd vssd wire1857/X wire1858/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1868 vccd vssd wire1868/X wire1869/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1879 vccd vssd _279_/A wire1880/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__548__B _548_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1121 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2043_A wire2044/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input126_A la_data_out_mprj[95] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_4256 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_102 _209_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_113 _173_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_1093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_124 _164_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_135 _565_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_146 _504_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_157 _475_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_422_ vssd vccd _422_/B _422_/X _550_/A _422_/C vssd vccd sky130_fd_sc_hd__and3b_2 XANTENNA_wire2210_A wire2211/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_168 _398_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_179 _558_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[126\]_A la_data_out_core[126] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XANTENNA__564__A _564_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_353_ _353_/X _353_/B _353_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_14_589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__283__B _283_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input91_A la_data_out_mprj[63] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_284_ _284_/X _284_/B _284_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_48_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[7\] mprj_dat_i_user[7] rebuffer1/X _121_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_26_4227 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_788 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3559 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_9_1319 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_972 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3283 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3208 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output512_A wire1264/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput8 _472_/C la_data_out_mprj[103] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_49_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__458__B _458_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2698 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1143_A _624_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1975 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_372 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1310_A _365_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1408_A wire1409/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output881_A wire1116/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3920 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_2222 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[117\]_A la_data_out_core[117] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[24\] _007_/A la_data_out_core[24] _187_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_18_2375 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__193__B _193_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1777_A wire1777/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1240 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_1896 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1944_A wire1944/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2532 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__409__A_N _409_/A_N vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2335 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1109 vccd vssd wire1109/X wire1110/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__368__B _368_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3692 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3775 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1474 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_832 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[108\]_A la_data_out_core[108] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_14_3430 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_353 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_364 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_1741 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3316 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1638 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1351 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_224 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4102 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_257 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2300 vccd vssd _395_/B wire2300/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput890 wire1026/X mprj_dat_i_core[18] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2160_A wire2160/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input243_A la_iena_mprj[85] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_2075 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4168 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3506 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2258_A wire2259/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3686 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1610 vccd vssd wire1610/X wire1611/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__559__A _559_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1621 vccd vssd wire1621/X wire1621/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2952 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1133 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1632 vccd vssd wire1632/X wire1632/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1643 vccd vssd wire1643/X wire1644/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1654 vccd vssd wire1654/X wire1654/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4020 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1665 vccd vssd wire1665/X wire1665/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input410_A mprj_adr_o_core[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1177 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1676 vccd vssd wire1676/X wire1677/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1687 vccd vssd _582_/A wire1687/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1698 wire1698/A _571_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_18_158 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_405_ _405_/A_N _405_/X _405_/C _405_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA__294__A _294_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_70 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_1549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_92 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_336_ _336_/X _336_/B _336_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_267_ _267_/X _267_/B _267_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3861 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire962 vccd vssd wire962/X wire963/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire973 vccd vssd wire973/X _144_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire984 vccd vssd wire984/X wire985/X vssd vccd sky130_fd_sc_hd__buf_6 X_198_ vccd vssd _198_/A _198_/X _198_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_45_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire995 vccd vssd wire995/X wire996/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_26_4035 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1093_A wire1094/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4079 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2611 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_1044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output727_A _604_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1358_A wire1359/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_3091 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__188__B _188_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1525_A wire1526/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_467 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_651 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_13 _213_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire978_A wire979/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_24 wire1801/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_35 _362_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_46 _526_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_1373 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_57 _367_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_68 _364_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_79 _360_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_1357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1379 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__370__C _370_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2351 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4444 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__381__A_N _509_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_1177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3837 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3776 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_1525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1694 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3572 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_4204 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3405 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_1224 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2261 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_1869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_4013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2006_A wire2006/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_121_ _121_/Y _121_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_32_2169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2570 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input193_A la_iena_mprj[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4311 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_052_ _052_/A _052_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XANTENNA__561__B _561_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2467 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4355 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input360_A la_oenb_mprj[75] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input458_A mprj_stb_o_core vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_4399 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1788 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input54_A la_data_out_mprj[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1799 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3220 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2130 vccd vssd _561_/B wire2130/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2141 vccd vssd _517_/B wire2141/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__289__A _289_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2152 vccd vssd _507_/B wire2152/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2163 vccd vssd _499_/B wire2164/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2174 vccd vssd _494_/B wire2175/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1440 wire1441/X wire1440/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2185 vccd vssd _490_/B wire2186/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2196 vccd vssd wire2196/X wire2196/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1451 vccd vssd wire1451/X _299_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_434 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1462 _269_/X wire1462/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_1_1901 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1473 _249_/X wire1473/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1484 vccd vssd _438_/C input97/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1495 vccd vssd wire1495/X wire1496/X vssd vccd sky130_fd_sc_hd__buf_6 Xpowergood_check vccd vdda1 vdda2 output954/A output952/A vssa1 vssa2 vssd mgmt_protect_hv XFILLER_19_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3160 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_3625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1978 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__455__C _455_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_161 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1106_A wire1107/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_319_ vccd vssd _319_/A _319_/X _319_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_50_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput11 _475_/C la_data_out_mprj[106] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput22 vccd vssd input22/X la_data_out_mprj[116] vssd vccd sky130_fd_sc_hd__buf_6 Xinput33 _495_/C la_data_out_mprj[126] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA__471__B _471_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput44 _389_/C la_data_out_mprj[20] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput55 _399_/C la_data_out_mprj[30] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_output844_A _595_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput66 _409_/C la_data_out_mprj[40] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput77 _419_/C la_data_out_mprj[50] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_28_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput88 _429_/C la_data_out_mprj[60] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput99 vccd vssd input99/X la_data_out_mprj[70] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_2717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_2728 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1475_A _247_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3203 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[91\] wire1126/A la_data_out_core[91] wire1468/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_6_3225 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1642_A wire1643/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1812 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__199__A _199_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_2316 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1907_A wire1908/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_2281 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_2112 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4404 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_2813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_404 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_223 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_1466 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3856 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4270 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4112 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_993 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4156 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3433 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3444 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_164 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1143 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__381__B _381_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4539 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_3827 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_514 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4252 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2170 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput404 vccd vssd wire1626/A mprj_adr_o_core[24] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput415 vccd vssd wire1571/A mprj_adr_o_core[5] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput426 vccd vssd wire1537/A mprj_dat_o_core[14] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_4296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput437 vccd vssd wire1520/A mprj_dat_o_core[24] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput448 vccd vssd wire1506/A mprj_dat_o_core[5] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_1250 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput459 vccd vssd wire1491/A mprj_we_o_core vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3584 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3300 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__556__B _556_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2123_A wire2123/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input206_A la_iena_mprj[51] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2512 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_1677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1065 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2545 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_1087 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__572__A _572_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_104_ _104_/Y _104_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_8_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__291__B _291_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2231 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_035_ _035_/A _035_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_7_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2275 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4163 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4268 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_3304 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1003 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2708 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1056_A wire1057/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1270 vccd vssd wire1270/X _393_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1281 vccd vssd wire1281/X _382_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3188 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1292 vccd vssd wire1292/X _371_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2476 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__466__B _466_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1223_A _459_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output794_A wire1158/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_4432 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4476 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1592_A wire1593/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_2039 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1327 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1857_A wire1858/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1918 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_4572 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_2260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3932 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_713 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__376__B _376_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3664 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3506 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[96\]_B wire1464/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_1817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3528 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2843 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1563 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1585 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3296 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1883 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_801 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_4347 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_812 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2073_A wire2073/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_1957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input156_A la_iena_mprj[121] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_4060 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput201 vccd vssd _210_/B la_iena_mprj[47] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_2_4132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_1345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_878 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput212 _220_/B la_iena_mprj[57] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput223 vccd vssd _230_/B la_iena_mprj[67] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_44_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput234 _240_/B la_iena_mprj[77] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput245 _250_/B la_iena_mprj[87] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_2246 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput256 _260_/B la_iena_mprj[97] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput267 _603_/A la_oenb_mprj[106] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XANTENNA_input323_A la_oenb_mprj[41] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2240_A wire2241/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput278 vccd vssd wire1731/A la_oenb_mprj[116] vssd vccd sky130_fd_sc_hd__buf_6 Xinput289 _623_/A la_oenb_mprj[126] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA__567__A _567_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1005 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input17_A la_data_out_mprj[111] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_1589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2796 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_212 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3319 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__286__B _286_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_584_ _584_/X _584_/B _584_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_38_2153 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[87\]_B wire1472/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_996 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_2495 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput708 _073_/Y la_data_in_mprj[90] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput719 wire1200/X la_oenb_core[0] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 X_018_ _018_/Y _018_/A vccd vssd vssd vccd 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vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1438_A wire1439/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_1984 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[54\] _037_/A la_data_out_core[54] _217_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XANTENNA__196__B _196_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_2284 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1605_A wire1606/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_4565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[78\]_B wire1481/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3848 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1405 vccd vssd vssd vccd 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sky130_ef_sc_hd__decap_12 XANTENNA_input9_A la_data_out_mprj[104] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_1759 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1358 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3450 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3461 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_1761 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_1093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_13_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1002 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3494 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1636 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2624 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_22_793 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_1972 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input273_A la_oenb_mprj[111] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2288_A wire2288/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__465__A_N _593_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input440_A mprj_dat_o_core[27] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1214 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_3318 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__297__A _297_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3294 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_3203 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3214 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_567_ vccd vssd _567_/A _567_/X _567_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_524 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_2546 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4560 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_498_ _498_/X _498_/B _498_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_output492_A wire1202/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1019_A wire1020/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__463__C _463_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2757 vccd vssd vssd vccd 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vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_1013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2092 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3683 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_1300 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1322 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_590 vssd vccd vssd vccd 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sky130_fd_sc_hd__diode_2 XFILLER_24_877 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3486 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1054 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_1797 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_1065 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2097 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_1363 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_1385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4480 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2032 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput880 wire1452/X mprj_cyc_o_user vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_2043 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire2301 vccd vssd _295_/B wire2301/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput891 wire1021/X mprj_dat_i_core[19] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1600 vccd vssd wire1600/X wire1601/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1112 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1611 vccd vssd wire1611/X wire1611/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__559__B _559_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input236_A la_iena_mprj[79] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2153_A wire2154/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1622 wire1623/X _329_/B vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_user_wb_dat_gates\[17\]_A mprj_dat_i_user[17] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1633 vccd vssd _326_/B wire1634/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1644 vccd vssd wire1644/X wire1644/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1655 vccd vssd _321_/B wire1656/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2997 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1666 vccd vssd _318_/B wire1667/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4032 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1677 vccd vssd wire1677/X wire1678/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1688 vccd vssd _581_/A wire1688/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_1481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1699 wire1699/A _570_/A vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_input403_A mprj_adr_o_core[23] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__575__A _575_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_404_ vssd vccd _404_/B _404_/X _532_/A _404_/C vssd vccd sky130_fd_sc_hd__and3b_2 XPHY_60 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__294__B _294_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_71 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_82 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_93 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_93 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_335_ _335_/X _335_/B _335_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_30_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_266_ _266_/X _266_/B _266_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_1105 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_571 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire963 vccd vssd wire963/X wire964/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_10_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire974 vccd vssd wire974/X wire975/X vssd vccd sky130_fd_sc_hd__buf_6 X_197_ _197_/X _197_/B _197_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 Xwire985 vccd vssd wire985/X wire986/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire996 vccd vssd wire996/X _139_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_26_4047 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1086_A wire1087/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1056 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_2717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1139 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_2093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2667 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3153 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__469__B _469_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1253_A _409_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_3175 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3980 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_49_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_2255 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1420_A wire1421/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1518_A wire1518/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1016 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_825 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_14 _219_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_25 _285_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1887_A wire1887/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_36 _362_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_346 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_47 _618_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_58 _366_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_69 _364_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1396 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2291 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_2363 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3891 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1651 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__379__B _379_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_1537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_2872 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_118 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_630 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3261 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_195 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_120_ _120_/A _120_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_49_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3158 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_051_ _051_/A _051_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_49_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input186_A la_iena_mprj[33] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1160 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4367 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input353_A la_oenb_mprj[69] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_1218 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input47_A la_data_out_mprj[23] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4027 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2120 vccd vssd wire2120/X wire2120/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_27_2998 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3232 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__289__B _289_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2131 vccd vssd _559_/B wire2131/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2142 vccd vssd _516_/B wire2142/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2153 vccd vssd _506_/B wire2154/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2164 vccd vssd wire2164/X wire2164/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1430 wire1431/X wire1430/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2175 vccd vssd wire2175/X wire2175/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1441 wire1442/X wire1441/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_1_2614 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2186 vccd vssd wire2186/X wire2187/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2197 vccd vssd _486_/B wire2198/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1452 vccd vssd wire1452/X _298_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1463 _268_/X wire1463/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1474 _248_/X wire1474/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1485 vccd vssd _437_/C input96/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1924 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1496 vccd vssd wire1496/X wire1496/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_939 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_3172 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2471 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_318_ _318_/X _318_/B _318_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_output572_A _452_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput12 _476_/C la_data_out_mprj[107] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput23 vccd vssd input23/X la_data_out_mprj[117] vssd vccd sky130_fd_sc_hd__buf_6 Xinput34 _496_/C la_data_out_mprj[127] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput45 _390_/C la_data_out_mprj[21] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 X_249_ _249_/X _249_/B _249_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 Xinput56 _400_/C la_data_out_mprj[31] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput67 _410_/C la_data_out_mprj[41] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_32_1981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput78 _420_/C la_data_out_mprj[51] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput89 _430_/C la_data_out_mprj[61] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_28_2707 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output837_A wire1145/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1370_A wire1371/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1468_A _254_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[84\] la_data_out_core[84] wire1475/X wire1131/A vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_8 XFILLER_44_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2486 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1635_A wire1636/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1802_A wire1803/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_4536 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire990_A wire991/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_611 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_3456 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1155 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__381__C _381_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3839 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_4264 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput405 vccd vssd wire1621/A mprj_adr_o_core[25] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_3760 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput416 vccd vssd wire1566/A mprj_adr_o_core[6] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3624 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput427 vccd vssd wire1535/A mprj_dat_o_core[15] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput438 vccd vssd wire1519/A mprj_dat_o_core[25] vssd vccd sky130_fd_sc_hd__buf_6 Xinput449 vccd vssd wire1504/A mprj_dat_o_core[6] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_2923 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2945 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_4082 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2978 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3312 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_3323 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input101_A la_data_out_mprj[72] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_2600 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_3345 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2116_A wire2116/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_2622 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_471 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2644 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__572__B _572_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1845 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_103_ _103_/Y _103_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4131 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_034_ _034_/Y _034_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_4225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_2287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4175 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_1785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3568 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2751 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3156 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1260 vccd vssd wire1260/X _402_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3178 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_2433 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_2372 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1271 vccd vssd wire1271/X _392_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1282 vccd vssd wire1282/X _381_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_265 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1293 vccd vssd wire1293/X _370_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1049_A wire1050/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1743 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__466__C _466_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output787_A _543_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4444 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3710 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__371__A_N _499_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__482__B _482_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2007 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output954_A output954/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_wb_dat_gates\[12\] mprj_dat_i_user[12] split4/A _126_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_8_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1585_A wire1586/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1339 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1825 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__003__A _003_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_1858 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3089 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2344 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_4013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3966 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_22_1413 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3988 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4391 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[110\] la_data_out_core[110] _273_/X _093_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_27_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_736 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__376__C _376_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_1242 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3676 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3518 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_920 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_942 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1108 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__392__B _392_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[9\]_A mprj_dat_i_user[9] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2585 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3800 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_4315 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_4556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3603 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4359 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_4100 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3647 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_857 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_868 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput202 _211_/B la_iena_mprj[48] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_4072 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput213 _221_/B la_iena_mprj[58] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_7_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[9\]_A la_data_out_core[9] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_1357 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput224 vccd vssd _231_/B la_iena_mprj[68] vssd vccd sky130_fd_sc_hd__buf_4 XANTENNA_input149_A la_iena_mprj[115] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2066_A wire2067/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput235 _241_/B la_iena_mprj[78] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput246 _251_/B la_iena_mprj[88] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput257 _261_/B la_iena_mprj[98] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_3382 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2258 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput268 _604_/A la_oenb_mprj[107] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XFILLER_40_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput279 vccd vssd wire1730/A la_oenb_mprj[117] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_2681 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__567__B _567_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2233_A wire2233/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input316_A la_oenb_mprj[35] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_3407 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1028 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1039 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_224 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_583_ _583_/X _583_/B _583_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__394__A_N _522_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2619 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2018 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__583__A _583_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3175 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2343 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2327 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2051 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput709 _074_/Y la_data_in_mprj[91] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_7_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_017_ _017_/Y _017_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_46_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2095 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_2857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output535_A wire1290/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_2401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1166_A _539_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__477__B _477_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1333_A _359_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_883 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1967_A wire1967/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1748 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[9\] _156_/A la_data_out_core[9] _172_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_41_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_4392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1699 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_3691 vssd vccd vssd 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vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2140 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output485_A wire1283/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2769 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1423 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_3405 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput506 wire1271/X la_data_in_core[23] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput517 wire1260/X la_data_in_core[33] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput528 wire1250/X la_data_in_core[43] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1283_A _380_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2691 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_1556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_407 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4443 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2203 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_4487 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2258 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1524 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1804 vccd vssd _371_/B wire1805/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1815 vccd vssd wire1815/X wire1815/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1826 vccd vssd _360_/A wire1826/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1837 vccd vssd _350_/A wire1837/A vssd vccd sky130_fd_sc_hd__buf_4 Xwire1848 vccd vssd wire1848/X wire1849/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1859 vccd vssd _287_/A wire1860/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_45_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2870 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_104 _209_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_115 _173_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_126 _164_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_420_ _548_/A _420_/X _420_/C _420_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_137 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2100 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_1888 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[26\]_B split5/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2155 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2199 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3145 vssd 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sky130_fd_sc_hd__decap_4 Xoutput892 wire1111/X mprj_dat_i_core[1] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3583 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1601 vccd vssd wire1601/X wire1601/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3519 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1612 wire1613/X _331_/B vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1623 vccd vssd wire1623/X wire1624/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2965 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1634 vccd vssd wire1634/X wire1635/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_user_wb_dat_gates\[17\]_B load_slew1458/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_2818 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1645 vccd vssd _324_/B wire1646/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1656 vccd vssd wire1656/X wire1657/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input131_A la_data_out_mprj[9] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1667 vccd vssd wire1667/X wire1667/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2146_A wire2146/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1678 vccd vssd wire1678/X wire1679/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input229_A la_iena_mprj[72] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1689 vccd vssd _580_/A wire1689/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_4088 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__575__B _575_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3218 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_403_ _531_/A _403_/X _403_/C _403_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_14_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_50 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2090 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_61 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_72 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_83 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_94 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_334_ _334_/X _334_/B _334_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__591__A _591_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_2853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_265_ _265_/X _265_/B _265_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_13_2274 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_583 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire964 vccd vssd wire964/X wire965/X vssd vccd sky130_fd_sc_hd__buf_6 X_196_ _196_/X _196_/B _196_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 Xwire975 vccd vssd wire975/X wire976/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_10_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire986 vccd vssd wire986/X _141_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire997 vccd vssd wire997/X wire998/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4059 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2707 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_2729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1079_A wire1080/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_281 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__469__C _469_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_irq_gates\[2\]_A user_irq_core[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1246_A _416_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__478__A_N _606_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_406 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__485__B _485_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1413_A _317_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_664 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3752 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_15 _219_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_26 _290_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_37 _362_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_48 _609_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1782_A wire1783/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_369 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_59 _366_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4571 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_1113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2320 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_3469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2342 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_1157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__379__C _379_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_1549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1319 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3480 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_929 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4228 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_970 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__395__B _395_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1215 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_697 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_1562 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_358 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_2414 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_050_ _050_/A _050_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_49_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1746 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2096_A wire2096/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input179_A la_iena_mprj[27] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[50\]_A la_data_out_core[50] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2263_A wire2264/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_2966 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input346_A la_oenb_mprj[62] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2110 vccd vssd wire2110/X wire2110/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2121 vccd vssd _568_/B wire2122/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2132 vccd vssd _538_/B wire2132/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2143 vccd vssd _515_/B wire2143/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3316 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3244 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_2289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2154 vccd vssd wire2154/X wire2154/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1420 vccd vssd wire1420/X wire1421/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2165 vccd vssd _498_/B wire2166/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1431 wire1432/X wire1431/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_2762 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2176 vccd vssd _493_/B wire2177/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1442 vccd vssd wire1442/X wire1443/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2187 vccd vssd wire2187/X wire2187/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1453 vccd vssd wire1453/X wire1454/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2198 vccd vssd wire2198/X wire2199/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__586__A _586_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1464 _259_/X wire1464/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_46_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2576 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1475 _247_/X wire1475/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1486 vccd vssd _436_/C input95/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1497 vccd vssd _346_/B wire1498/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_992 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2483 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_2325 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_317_ vccd vssd _317_/A _317_/X _317_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_50_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput13 _477_/C la_data_out_mprj[108] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput24 vccd vssd input24/X la_data_out_mprj[118] vssd vccd sky130_fd_sc_hd__buf_6 X_248_ _248_/X _248_/B _248_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_7_841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput35 _381_/C la_data_out_mprj[12] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput46 _391_/C la_data_out_mprj[22] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_output565_A _446_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput57 _401_/C la_data_out_mprj[32] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput68 _411_/C la_data_out_mprj[42] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput79 vccd vssd _421_/C la_data_out_mprj[52] vssd vccd sky130_fd_sc_hd__buf_4 X_179_ vccd vssd _179_/A _179_/X _179_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_wire1196_A _501_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output732_A _608_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[41\]_A la_data_out_core[41] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3155 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2443 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1363_A _349_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[77\] wire1138/A la_data_out_core[77] wire1482/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_2 XFILLER_38_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1836 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_4573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1530_A wire1531/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1054 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1628_A wire1629/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_4504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_981 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_4548 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1997_A wire1997/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire983_A wire984/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_656 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2193 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[32\]_A la_data_out_core[32] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2003 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput406 vccd vssd wire1616/A mprj_adr_o_core[26] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_9_2183 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_4276 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput417 vccd vssd wire1563/A mprj_adr_o_core[7] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_3772 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput428 vccd vssd wire1533/A mprj_dat_o_core[16] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_4359 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput439 vccd vssd wire1518/A mprj_dat_o_core[26] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_29_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[99\]_A la_data_out_core[99] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2011_A wire2012/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2109_A wire2110/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_1078 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_2509 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_2678 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input296_A la_oenb_mprj[17] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_102_ _102_/Y _102_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_033_ _033_/Y _033_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_27_4143 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2299 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4187 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[23\]_A la_data_out_core[23] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2763 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_2605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_26_1016 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2785 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2868 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1250 vccd vssd wire1250/X _412_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1261 vccd vssd wire1261/X _401_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1272 vccd vssd wire1272/X _391_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1283 vccd vssd wire1283/X _380_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1294 vccd vssd wire1294/X _369_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2489 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_299 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1799 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1111_A wire1112/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output682_A _050_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_2291 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__482__C _482_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output947_A wire1430/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1480_A _242_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1578_A wire1579/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[14\]_A la_data_out_core[14] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1745_A wire1745/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3057 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3901 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1912_A wire1912/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_1677 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[103\] la_data_out_core[103] _266_/X _086_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_25_203 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_748 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1182 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_1193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1966 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_781 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1298 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3688 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_431 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_954 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__392__C _392_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3243 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[9\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_3276 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1598 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3615 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_3867 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_847 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3659 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_346 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput203 vccd vssd _212_/B la_iena_mprj[49] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_2_4145 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[9\]_B _172_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput214 _222_/B la_iena_mprj[59] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_24_2947 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4084 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput225 vccd vssd _232_/B la_iena_mprj[69] vssd vccd sky130_fd_sc_hd__buf_4 Xinput236 _242_/B la_iena_mprj[79] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput247 _252_/B la_iena_mprj[89] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput258 _262_/B la_iena_mprj[99] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_5_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput269 _605_/A la_oenb_mprj[108] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_8 XFILLER_2_2721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2059_A wire2059/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3477 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input211_A la_iena_mprj[56] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_582_ _582_/X _582_/B _582_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_29_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2226_A wire2227/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input309_A la_oenb_mprj[29] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_236 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_589 vssd vccd vssd vccd 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sky130_fd_sc_hd__buf_8 Xoutput518 wire1259/X la_data_in_core[34] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput529 wire1249/X la_data_in_core[44] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_output645_A _016_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1910 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1276_A _387_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_2519 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3080 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__488__B _488_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1443_A wire1444/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2050 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1610_A wire1611/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3750 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_1382 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3794 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4050 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_209 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4072 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3382 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1568 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_4411 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__384__A_N _512_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_4455 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1503 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_4240 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_3859 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1547 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__398__B _398_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1317 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1805 vccd vssd wire1805/X wire1805/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1816 vccd vssd _365_/A wire1817/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1827 vccd vssd _359_/A wire1827/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1838 vccd vssd wire1838/X wire1839/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3572 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1849 vccd vssd wire1849/X wire1849/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_105 _209_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_116 _169_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_127 _164_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1179 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_138 _513_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_149 _477_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_350_ _350_/X _350_/B _350_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_17_3271 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_281_ _281_/X _281_/B _281_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_14_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input376_A la_oenb_mprj[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2293_A wire2293/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2806 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_4184 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_430 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_953 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_4048 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__589__A _589_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3264 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2613 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_1597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_1901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2596 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_1945 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_617_ _617_/X _617_/B _617_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_45_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_548_ _548_/X _548_/B _548_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1024_A wire1025/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output595_A _086_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3956 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_479_ _607_/A _479_/X _479_/C _479_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_31_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_4392 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output762_A wire1177/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2567 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__490__C _490_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1393_A wire1394/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1560_A wire1561/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1658_A wire1658/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__499__A _499_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3916 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2327 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2496 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4352 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1825_A wire1825/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3712 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_1394 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3400 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_846 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_1700 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1012 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_4470 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3466 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1154 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1089 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_3827 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4460 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_4263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput860 wire1400/X mprj_adr_o_user[20] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3612 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput871 _335_/X mprj_adr_o_user[30] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3792 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput882 wire1066/X mprj_dat_i_core[10] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_1311 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2303 vccd vssd wire2303/X wire2304/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_1873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3645 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput893 wire1016/X mprj_dat_i_core[20] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__202__A _202_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3667 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_2089 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1602 wire1603/X _333_/B vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1613 vccd vssd wire1613/X wire1614/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1624 vccd vssd wire1624/X wire1625/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1635 vccd vssd wire1635/X wire1636/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1646 vccd vssd wire1646/X wire1647/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1158 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1657 vccd vssd wire1657/X wire1658/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3380 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1399 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1668 vccd vssd _317_/B wire1669/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1679 vccd vssd wire1679/X wire1679/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2041_A wire2041/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input124_A la_data_out_mprj[93] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_4056 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire2139_A wire2139/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3322 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_2621 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_402_ vssd vccd _402_/B _402_/X _530_/A _402_/C vssd vccd sky130_fd_sc_hd__and3b_2 XPHY_40 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_51 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_3399 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2306_A wire2306/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_62 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_73 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_2518 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_84 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_333_ _333_/X _333_/B _333_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XPHY_95 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2810 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4532 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__591__B _591_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_264_ _264_/X _264_/B _264_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_195_ _195_/X _195_/B _195_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_6_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire965 vccd vssd wire965/X _146_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire976 vccd vssd wire976/X wire977/X vssd vccd sky130_fd_sc_hd__buf_6 Xuser_wb_dat_gates\[5\] _119_/A mprj_dat_i_user[5] split4/X vssd vccd vssd vccd sky130_fd_sc_hd__nand2_4 Xwire987 vccd vssd wire987/X wire988/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire998 vccd vssd wire998/X wire999/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3326 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2636 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_761 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3083 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2371 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3960 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output510_A wire1266/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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XFILLER_50_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_315 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_16 _220_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_849 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1354 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_27 _231_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_38 _361_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_49 _303_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_371 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1775_A wire1775/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1674 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_1685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_1169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__022__A _022_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3724 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1581 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_1675 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__422__A_N _550_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3492 vccd vssd vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_15_632 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_131 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3196 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2495 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_12_3926 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_4340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_316_ vccd vssd _316_/A _316_/X _316_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_30_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__107__A _107_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput14 _478_/C la_data_out_mprj[109] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 X_247_ _247_/X _247_/B _247_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput25 vccd vssd _488_/C la_data_out_mprj[119] vssd vccd sky130_fd_sc_hd__buf_4 Xinput36 _382_/C la_data_out_mprj[13] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_45_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_853 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput47 _392_/C la_data_out_mprj[23] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput58 _402_/C la_data_out_mprj[33] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_48_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput69 _412_/C la_data_out_mprj[43] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 X_178_ _178_/X _178_/B _178_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_output558_A _439_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2157 vssd vccd vssd vccd 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vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__496__B _496_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1523_A wire1523/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_3884 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_4516 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_705 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1386 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1872 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire976_A wire977/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3594 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_668 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__017__A _017_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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_169_/B la_iena_mprj[6] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_4096 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput237 _170_/B la_iena_mprj[7] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_3445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput248 _171_/B la_iena_mprj[8] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput259 _172_/B la_iena_mprj[9] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_3456 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__210__A _210_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_2661 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3180 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_581_ 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vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__493__C _493_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4232 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1590_A wire1591/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_1252 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_3586 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1688_A wire1688/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1728 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1855_A wire1855/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3660 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__030__A _030_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4419 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1328 vssd vccd vssd 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sky130_fd_sc_hd__decap_6 XFILLER_50_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_1227 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4084 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1369 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1972_A wire1973/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1082 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4423 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4467 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2216 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1443 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[29\]_A mprj_dat_i_user[29] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_1465 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1806 vccd vssd _370_/B wire1807/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3540 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input7_A la_data_out_mprj[102] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_1559 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__398__C _398_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1817 vccd vssd wire1817/X wire1817/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1828 vccd vssd _358_/A wire1828/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1839 vccd vssd wire1839/X wire1840/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1103 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1031 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2883 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_106 _209_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_117 _169_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1169 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_128 _625_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3548 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_139 _513_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_516 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_173 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_280_ _280_/X _280_/B _280_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3147 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2593 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1783 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1794 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_737 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input271_A la_oenb_mprj[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_2192 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2286_A wire2286/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input369_A la_oenb_mprj[83] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_910 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1491 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4196 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_420 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__589__B _589_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_987 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3276 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_2439 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_616_ _616_/X _616_/B _616_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_40_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_547_ vccd vssd _547_/A _547_/X _547_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_35_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_4360 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_3968 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_478_ _606_/A _478_/X _478_/C _478_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_output490_A wire1204/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1017_A wire1018/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output588_A _467_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_1812 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_1211 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output755_A wire1183/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1255 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_3204 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_1878 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1386_A wire1387/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3248 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output922_A wire1343/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__499__B _499_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1553_A wire1554/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1752 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3928 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2293 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1720_A _400_/A_N vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_608 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1818_A wire1819/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_1581 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_3757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4102 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_803 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3412 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_858 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_1100 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1789 vccd vssd vssd vccd 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vssd vccd sky130_fd_sc_hd__buf_8 Xwire2304 vccd vssd wire2304/X wire2305/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput894 wire1011/X mprj_dat_i_core[21] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_1705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3657 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_1323 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3416 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1603 vccd vssd wire1603/X wire1604/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1614 vccd vssd wire1614/X wire1615/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1625 vccd vssd wire1625/X wire1626/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_4093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_2884 vssd vccd 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XFILLER_19_2633 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3378 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_41 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_52 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_63 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_74 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_85 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_332_ _332_/X _332_/B _332_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire2201_A wire2202/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_4500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_96 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_2699 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2822 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_263_ _263_/X _263_/B _263_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3832 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input82_A la_data_out_mprj[55] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_194_ _194_/X _194_/B _194_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 Xwire966 vccd vssd wire966/X wire967/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire977 vccd vssd wire977/X _143_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire988 vccd vssd wire988/X wire989/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire999 vccd vssd wire999/X wire999/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2648 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_784 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1362 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_3950 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output503_A wire1274/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1134_A wire1134/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__374__A_N _502_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4308 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_806 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1301_A wire1302/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_817 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output872_A _336_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_17 _220_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_wb_dat_gates\[28\] mprj_dat_i_user[28] split5/X _142_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XANTENNA_28 _602_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[15\] _162_/A la_data_out_core[15] _178_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_33_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_39 _361_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1670_A wire1670/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1768_A wire1769/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4551 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__303__A _303_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3703 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1935_A wire1935/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3736 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2399 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[126\] _109_/A la_data_out_core[126] _289_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_2 XFILLER_0_4244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3690 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_994 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_964 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3291 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1575 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_1439 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3603 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1759 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_1196 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_3647 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4280 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__213__A _213_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput680 _048_/Y la_data_in_mprj[65] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2101 vccd vssd _579_/B wire2102/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput691 _058_/Y la_data_in_mprj[75] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2112 vccd vssd wire2112/X wire2112/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2123 vccd vssd _567_/B wire2123/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_3382 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2134 vccd vssd _530_/B wire2134/A vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_47_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1400 vccd vssd wire1400/X wire1401/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2145 vccd vssd _513_/B wire2145/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2156 vccd vssd _504_/B wire2156/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1411 vccd vssd wire1411/X _318_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3329 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2151_A wire2151/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2167 vccd vssd _497_/B wire2168/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2523 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1422 vccd vssd wire1422/X _313_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input234_A la_iena_mprj[77] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2178 vccd vssd wire2178/X wire2178/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1433 vccd vssd wire1433/X wire1434/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2249_A wire2249/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1444 vccd vssd wire1444/X _301_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2189 vccd vssd wire2189/X wire2190/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1455 vccd vssd wire1455/X _296_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1466 vccd vssd wire1466/X _256_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1905 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__397__A_N _525_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1477 _245_/X wire1477/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_769 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1488 vccd vssd _434_/C input93/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1499 vccd vssd _345_/B wire1500/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_3120 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1938 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input401_A mprj_adr_o_core[21] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3164 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_644 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2338 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_315_ vccd vssd _315_/A _315_/X _315_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_12_3938 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_246_ _246_/X _246_/B _246_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 Xinput15 _379_/C la_data_out_mprj[10] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput26 _380_/C la_data_out_mprj[11] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_10_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput37 _383_/C la_data_out_mprj[14] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput48 _393_/C la_data_out_mprj[24] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput59 _403_/C la_data_out_mprj[34] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_45_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_177_ _177_/X _177_/B _177_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3695 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_397 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2423 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1084_A wire1085/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2528 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2467 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output620_A _109_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1251_A _411_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1349_A wire1350/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4528 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1516_A wire1516/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_3718 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3838 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3729 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_1398 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_3540 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4116 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3562 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1130 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_1103 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1885_A wire1885/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_146 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire969_A _145_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2151 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_179 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__033__A _033_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2141 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_4317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_22_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4328 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput408 vccd vssd wire1606/A mprj_adr_o_core[28] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput419 vccd vssd wire1555/A mprj_adr_o_core[9] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_3785 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1462 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_725 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_1107 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_2661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__208__A _208_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_100_ _100_/Y _100_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_51_1837 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_3960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2382 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2224 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_031_ _031_/A _031_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_1501 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input184_A la_iena_mprj[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2199_A wire2199/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_97 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_49_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_824 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2710 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input351_A la_oenb_mprj[67] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input449_A mprj_dat_o_core[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input45_A la_data_out_mprj[21] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_2618 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2798 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3104 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__597__B _597_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_202 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1230 vccd vssd wire1230/X _427_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1241 vccd vssd wire1241/X _421_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1252 vccd vssd wire1252/X _410_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1263 vccd vssd wire1263/X _399_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1860 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1274 vccd vssd wire1274/X _389_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1871 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1285 vccd vssd wire1285/X _378_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1296 vccd vssd wire1296/X wire1297/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1724 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_975 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__118__A _118_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3724 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_1423 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__412__A_N _540_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output570_A _450_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_229_ vccd vssd _229_/A _229_/X _229_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_10_3481 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1299_A wire1300/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output835_A wire1192/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3026 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1466_A _256_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3820 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[82\] la_data_out_core[82] wire1477/X wire1133/A vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_8 XFILLER_44_1129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3864 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2286 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1633_A wire1634/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4350 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__300__B _300_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1800_A wire1801/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_4216 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_4336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3515 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3635 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2803 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_1979 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__028__A _028_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_1080 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2511 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_2691 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_4421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_4432 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_4443 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1843 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3797 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_3065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2905 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_1338 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput205 _213_/B la_iena_mprj[50] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput216 _223_/B la_iena_mprj[60] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput227 vccd vssd _233_/B la_iena_mprj[70] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_40_2228 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput238 _243_/B la_iena_mprj[80] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_5_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput249 _253_/B la_iena_mprj[90] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_2712 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__210__B _210_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_2734 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1009 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_580_ _580_/X _580_/B _580_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_44_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2480 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_3112 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3003 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2114_A wire2114/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__435__A_N _563_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1612 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input399_A mprj_adr_o_core[1] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_2319 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_12_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4480 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_014_ _014_/A _014_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_46_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_1386 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2601 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_3357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_2551 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2426 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_2595 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1933 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2200 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1060 vccd vssd wire1060/X _126_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1071 vccd vssd wire1071/X wire1072/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1082 vccd vssd wire1082/X wire1083/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1093 vccd vssd wire1093/X wire1094/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1047_A wire1048/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_2266 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_1543 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output785_A wire1165/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4293 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output952_A output952/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_wb_dat_gates\[10\] mprj_dat_i_user[10] max_cap1456/X _124_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_12_3598 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1583_A wire1584/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_1139 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1750_A wire1750/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1614 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1848_A wire1849/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_4412 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2111 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3733 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3672 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_1421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1246 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3708 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4100 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3490 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__458__A_N _586_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_4024 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4035 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_21_296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2341 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2975 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_3600 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3447 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_2735 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_679 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3210 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2064_A wire2065/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3221 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_2025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input147_A la_iena_mprj[113] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_178 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2531 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_3287 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2542 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2231_A wire2231/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input314_A la_oenb_mprj[33] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_514 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1841 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_3109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_563_ vccd vssd _563_/A _563_/X _563_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_35_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1896 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_494_ vssd vccd _494_/B _494_/X _622_/A _494_/C vssd vccd sky130_fd_sc_hd__and3b_2 XFILLER_38_1253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2110 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2706 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1128 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2176 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_1415 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput509 wire1267/X la_data_in_core[26] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3121 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1923 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1224 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output533_A wire1245/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3018 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3187 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1164_A _542_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3823 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1279 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2278 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1331_A wire1332/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_1649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1429_A _304_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[45\] _028_/A la_data_out_core[45] _208_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_53_4355 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_344 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_804 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1351 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_4317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3774 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3616 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1798_A wire1799/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4096 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__306__A _306_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1965_A wire1966/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3920 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4479 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[7\] _154_/A la_data_out_core[7] _170_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_45_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[29\]_B split5/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1807 vccd vssd wire1807/X wire1807/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1818 vccd vssd _301_/A wire1819/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1829 vccd vssd _357_/A wire1829/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_4228 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1115 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2895 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_107 _208_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1159 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_118 _169_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_129 _625_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_528 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2561 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2403 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__216__A _216_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1150 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_1161 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2750 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_2160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2783 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[80\]_A la_data_out_core[80] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1470 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input264_A la_oenb_mprj[103] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2279_A wire2279/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_933 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3211 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2819 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2510 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_2521 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input431_A mprj_dat_o_core[19] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_3108 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2626 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_498 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_2350 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_615_ _615_/X _615_/B _615_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_17_333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_546_ vccd vssd _546_/A _546_/X _546_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_45_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_477_ _605_/A _477_/B _477_/X _477_/C vssd vccd vssd vccd sky130_fd_sc_hd__and3b_1 XFILLER_50_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output483_A _487_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3682 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1824 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1223 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output650_A _021_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[71\]_A la_data_out_core[71] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output748_A wire1144/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3227 vssd vccd vssd vccd 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la_data_out_core[62] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_207 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_4243 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput840 _591_/X la_oenb_core[94] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput851 wire1412/X mprj_adr_o_user[12] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput862 wire1398/X mprj_adr_o_user[22] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_4287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput873 _308_/X mprj_adr_o_user[3] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput884 wire1056/X mprj_dat_i_core[12] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2305 vccd vssd wire2305/X wire2306/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput895 wire1006/X mprj_dat_i_core[22] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2924 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_1335 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_4072 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1604 vccd vssd wire1604/X wire1605/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_1285 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1615 vccd vssd wire1615/X wire1616/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1626 vccd vssd wire1626/X wire1626/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1637 vccd vssd _325_/B wire1638/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_1149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1648 vccd vssd _323_/B wire1649/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1659 vccd vssd _320_/B wire1660/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2197 vssd vccd vssd vccd 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XFILLER_13_2299 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire978 vccd vssd wire978/X wire979/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input75_A la_data_out_mprj[49] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire989 vccd vssd wire989/X wire990/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[53\]_A la_data_out_core[53] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3113 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_262 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1891 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2478 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_601 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_529_ _529_/X _529_/B _529_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_15_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3608 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_18 _221_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_29 _604_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output865_A _330_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_1307 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1031 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_1053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[44\]_A la_data_out_core[44] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1663_A wire1664/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4563 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__303__B _303_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1830_A wire1830/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3809 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1594 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4184 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_4195 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xuser_to_mprj_in_gates\[119\] la_data_out_core[119] _282_/X _102_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_0_3544 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_910 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_601 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_155 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2591 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_3287 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1587 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_2564 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_49_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2597 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_1131 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[35\]_A la_data_out_core[35] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1153 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3615 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4292 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3659 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4051 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__213__B _213_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2947 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput670 _039_/Y la_data_in_mprj[56] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_4095 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput681 _049_/Y la_data_in_mprj[66] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2102 vccd vssd wire2102/X wire2102/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3444 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput692 _059_/Y la_data_in_mprj[76] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2113 vccd vssd _573_/B wire2114/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2124 vccd vssd _566_/B wire2125/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_3394 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire2135 vccd vssd _525_/B wire2135/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2146 vccd vssd _512_/B wire2146/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1401 vccd vssd wire1401/X _325_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1412 vccd vssd wire1412/X wire1413/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2157 vccd vssd _503_/B wire2157/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2168 vccd vssd wire2168/X wire2168/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1423 vccd vssd wire1423/X _312_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2179 vccd vssd _492_/B wire2180/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1434 vccd vssd wire1434/X _303_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1445 wire1446/X wire1445/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_4_1029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_2557 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2144_A wire2144/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1467 vccd vssd wire1467/X _255_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input227_A la_iena_mprj[70] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1478 _244_/X wire1478/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1489 vccd vssd _433_/C input92/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3132 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_678 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_314_ _314_/X _314_/B _314_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_51_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_188 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_245_ _245_/X _245_/B _245_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4364 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput16 vccd vssd _479_/C la_data_out_mprj[110] vssd vccd sky130_fd_sc_hd__buf_4 Xinput27 vccd vssd _489_/C la_data_out_mprj[120] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_45_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput38 _384_/C la_data_out_mprj[15] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_6_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput49 _394_/C la_data_out_mprj[25] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 X_176_ vccd vssd _176_/A _176_/X _176_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_user_to_mprj_in_gates\[26\]_A la_data_out_core[26] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_1351 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[110\]_A la_data_out_core[110] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_48_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2435 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_560 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1077_A wire1078/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_1806 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4460 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2479 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3820 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1079 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1244_A _418_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3897 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1990 vccd vssd _625_/A wire1991/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_52_217 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_995 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1438 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3828 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1411_A _318_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1509_A wire1510/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__491__A_N _619_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_4128 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3574 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_114 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1705 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1115 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1780_A wire1781/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1878_A wire1878/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[17\]_A la_data_out_core[17] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[101\]_A la_data_out_core[101] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_6_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4371 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4213 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_1801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3512 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2164 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput409 vccd vssd wire1601/A mprj_adr_o_core[29] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_44_1845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3556 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3639 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1474 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_1244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3280 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1040 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_1961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_453 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_1026 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__208__B _208_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2372 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_030_ _030_/A _030_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_11_3972 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__224__A _224_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1535 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3423 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input177_A la_iena_mprj[25] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2094_A wire2094/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input344_A la_oenb_mprj[60] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2261_A wire2261/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input38_A la_data_out_mprj[15] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1220 vccd vssd wire1220/X _462_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1231 vccd vssd wire1231/X _426_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1242 vccd vssd wire1242/X _420_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1253 vccd vssd wire1253/X _409_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1264 vccd vssd wire1264/X _398_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1275 vccd vssd wire1275/X _388_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1286 vccd vssd wire1286/X _377_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2459 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1883 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1297 vccd vssd wire1297/X wire1298/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_35_729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_987 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3872 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3736 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_228_ vccd vssd _228_/A _228_/X _228_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_7_641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1626_A wire1626/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4304 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4348 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_537 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_2993 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__309__A _309_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2815 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1995_A wire1996/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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XFILLER_40_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2657 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_850 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1978 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1050 vccd vssd wire1050/X _128_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_48_865 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1061 vccd vssd wire1061/X wire1062/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3981 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1072 vccd vssd wire1072/X wire1073/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1083 vccd vssd wire1083/X wire1084/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1094 vccd vssd wire1094/X wire1095/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_53_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_1577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3680 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output778_A wire1170/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_1719 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output945_A wire1440/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_1287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1576_A wire1576/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3927 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2349 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1637 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4435 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2123 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3881 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__311__B _311_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2145 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_4112 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xuser_to_mprj_in_gates\[101\] _084_/A la_data_out_core[101] _264_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_17_4123 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4156 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__039__A _039_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1065 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_2601 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_2618 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_765 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2066 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_787 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_2077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2364 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1630 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_2375 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3540 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3612 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__502__A _502_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2057_A wire2057/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_2460 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__402__A_N _530_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2587 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_562_ vccd vssd _562_/A _562_/X _562_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_2_2598 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2224_A wire2225/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input307_A la_oenb_mprj[27] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_493_ vssd vccd _493_/B _493_/X _621_/A _493_/C vssd vccd sky130_fd_sc_hd__and3b_2 XFILLER_18_2529 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_570 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2122 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_3820 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_2253 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2718 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2286 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1203 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2371 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output526_A wire1252/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_4432 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2064 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1324_A wire1325/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1280 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_4476 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output895_A wire1006/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_356 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_816 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[38\] _021_/A la_data_out_core[38] _201_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_53_3655 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__306__B _306_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1860_A wire1860/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1958_A wire1958/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3932 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2113 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4210 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2168 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__425__A_N _553_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1478 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1808 vccd vssd _369_/B wire1809/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1819 vccd vssd wire1819/X wire1819/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1022 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1127 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3528 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_108 _208_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_119 _166_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3165 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3296 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_3187 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_2442 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_551 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3198 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_2573 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_2415 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__216__B _216_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2762 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2795 vssd vccd vssd vccd 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sky130_ef_sc_hd__decap_12 XANTENNA_wire1656_A wire1657/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_2285 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1645 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__600__A _600_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_3501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2844 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_624 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3200 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_123 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__047__A _047_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_2510 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3108 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_2543 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_3329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_874 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[35\]_B _198_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3627 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4030 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_5_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_4063 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput660 _030_/Y la_data_in_mprj[47] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1640 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput671 _040_/Y la_data_in_mprj[57] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput682 _050_/Y la_data_in_mprj[67] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2103 vccd vssd _578_/B wire2104/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2700 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput693 _060_/Y la_data_in_mprj[77] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2114 vccd vssd wire2114/X wire2114/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3456 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2125 vccd vssd wire2125/X wire2125/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2136 vccd vssd _522_/B wire2136/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1155 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2147 vccd vssd _511_/B wire2148/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2503 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3248 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1402 vccd vssd wire1402/X _324_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2158 vccd vssd _502_/B wire2159/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1413 vccd vssd wire1413/X _317_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1424 vccd vssd wire1424/X wire1425/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2169 vccd vssd _496_/B wire2170/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1435 wire1436/X wire1435/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1446 vccd vssd wire1446/X wire1447/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1468 vccd vssd wire1468/X _254_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1479 vccd vssd wire1479/X _243_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_3100 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input122_A la_data_out_mprj[91] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2137_A wire2137/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3177 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2443 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3188 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2304_A wire2305/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2307 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_167 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_313_ _313_/X _313_/B _313_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_52_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4332 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_690 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2080 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_85 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_244_ _244_/X _244_/B _244_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_4376 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput17 vccd vssd _480_/C la_data_out_mprj[111] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_10_3642 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput28 vccd vssd _490_/C la_data_out_mprj[121] vssd vccd sky130_fd_sc_hd__buf_4 Xinput39 _385_/C la_data_out_mprj[16] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_13_1330 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_175_ _175_/X _175_/B _175_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_6_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[3\] _117_/A mprj_dat_i_user[3] max_cap1456/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_7_878 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1363 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[110\]_B _273_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3126 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_2232 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1980 vccd vssd _168_/A wire1981/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_963 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1991 vccd vssd wire1991/X wire1991/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1404_A wire1405/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_977 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_999 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[20\] _003_/A la_data_out_core[20] _183_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_53_1121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1864 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_126 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_1274 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_1127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_193 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__314__B _314_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[101\]_B _264_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1496 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1940_A wire1940/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4383 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3743 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_2154 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3754 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3524 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__330__A _330_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1256 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3320 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4076 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1052 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[10\]_A mprj_dat_i_user[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_262 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2638 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1817 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3096 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__505__A _505_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_77 vccd vssd vssd vccd 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wire1052/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1062 vccd vssd wire1062/X wire1063/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1073 vccd vssd wire1073/X wire1074/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3993 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1084 vccd vssd wire1084/X wire1085/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3902 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_516 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1095 vccd vssd wire1095/X _119_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_53_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3826 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4224 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_273 vccd vssd vssd vccd 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vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output938_A wire1388/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1471_A _251_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1569_A wire1570/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3939 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4447 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3713 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4182 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1384 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1903_A wire1904/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_313 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_4135 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_4168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_3467 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2170 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_1609 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1300 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1956 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__055__A _055_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_799 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2988 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_4253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_2387 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_max_cap1456_A split4/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3624 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1675 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_3552 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_604 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__502__B _502_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3668 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2851 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2862 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2704 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_1137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1159 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_3256 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_527 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_561_ _561_/X _561_/B _561_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_2_1854 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input202_A la_iena_mprj[48] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_492_ vssd vccd _492_/B _492_/X _620_/A _492_/C vssd vccd sky130_fd_sc_hd__and3b_2 XANTENNA_wire2217_A wire2217/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1411 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input98_A la_data_out_mprj[6] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_287 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_910 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__412__B _412_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3073 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_4504 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2433 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_2383 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_3983 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3908 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3836 vssd vccd vssd vccd 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XANTENNA_wire1317_A wire1318/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output888_A wire1036/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_891 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4032 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2955 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1219 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_1339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1686_A wire1686/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__603__A _603_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1853_A wire1854/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3944 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3703 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__322__B _322_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3819 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4222 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_wb_dat_gates\[2\]_A mprj_dat_i_user[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1518 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1809 vccd vssd wire1809/X wire1809/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_4288 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2820 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2864 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1056 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_109 _208_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[2\]_A la_data_out_core[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_2265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_880 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3144 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3106 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1586 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_563 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1731 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1753 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1130 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_2173 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_4133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__513__A _513_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_902 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_3432 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__232__B _232_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_1502 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1557 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input152_A la_iena_mprj[118] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2167_A wire2168/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3031 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3075 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1145 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input417_A mprj_adr_o_core[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_613_ _613_/X _613_/B _613_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_input13_A la_data_out_mprj[108] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_346 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1673 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_544_ _544_/X _544_/B _544_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_44_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_475_ _603_/A _475_/B _475_/X _475_/C vssd vccd vssd vccd sky130_fd_sc_hd__and3b_1 XFILLER_31_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1350 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1394 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_1247 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output469_A wire1210/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2539 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2478 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_1827 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1267_A wire1268/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4439 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output803_A wire1149/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_600 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput390 vccd vssd wire1672/A mprj_adr_o_core[11] vssd vccd sky130_fd_sc_hd__buf_6 Xuser_to_mprj_in_gates\[50\] _033_/A la_data_out_core[50] _213_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_36_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1601_A wire1601/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_4116 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4187 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_636 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1183 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3448 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__317__B _317_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_1027 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1970_A wire1971/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__333__A _333_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput820 _573_/X la_oenb_core[76] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput831 _583_/X la_oenb_core[86] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3752 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput842 _593_/X la_oenb_core[96] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput853 wire1408/X mprj_adr_o_user[14] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3774 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xoutput864 _329_/X mprj_adr_o_user[24] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput875 _310_/X mprj_adr_o_user[5] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3627 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput886 wire1046/X mprj_dat_i_core[14] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput897 wire997/X mprj_dat_i_core[24] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_3_4063 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input5_A la_data_out_mprj[100] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_1359 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1606 vccd vssd wire1606/X wire1606/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1617 wire1618/X _330_/B vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1628 vccd vssd wire1628/X wire1629/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1639 vccd vssd wire1639/X wire1639/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3348 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XPHY_11 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_22 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_2062 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_33 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XPHY_44 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__508__A _508_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_55 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_2658 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_66 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_30_809 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_88 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__227__B _227_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_260_ _260_/X _260_/B _260_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XPHY_99 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_3960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_360 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3824 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_191_ vccd vssd _191_/A _191_/X _191_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_22_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2279 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire969 vccd vssd wire969/X _145_/Y vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__243__A _243_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2284_A wire2284/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input367_A la_oenb_mprj[81] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1881 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2607 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xuser_irq_gates\[2\] _113_/A _293_/X user_irq_core[2] vssd vccd vssd vccd sky130_fd_sc_hd__nand2_1 XFILLER_43_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_231 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3043 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3920 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3159 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_297 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1871 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_3860 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_45_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_527_ vccd vssd _527_/A _527_/X _527_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_35_3161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1401 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_3746 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1423 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_458_ _586_/A _458_/X _458_/C _458_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_wire1015_A _135_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__415__A_N _543_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output586_A wire1217/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_389_ _517_/A _389_/X _389_/C _389_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_output753_A wire1185/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_1077 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1384_A _342_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2231 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output920_A wire1349/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[98\] wire1122/A la_data_out_core[98] _261_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_2 XFILLER_29_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2336 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1551_A wire1552/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1649_A wire1650/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1657 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__600__B _600_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2082 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1816_A wire1817/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_2801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_2981 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_1173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_1184 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_964 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4060 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_1209 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_3267 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2408 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__063__A _063_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3639 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4075 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput650 _021_/Y la_data_in_mprj[38] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3341 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput661 _031_/Y la_data_in_mprj[48] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput672 _041_/Y la_data_in_mprj[58] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput683 _051_/Y la_data_in_mprj[68] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2104 vccd vssd wire2104/X wire2104/A vssd vccd sky130_fd_sc_hd__buf_6 Xoutput694 _061_/Y la_data_in_mprj[78] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2115 vccd vssd _572_/B wire2116/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2712 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__510__B _510_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2126 vccd vssd _565_/B wire2126/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3468 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2137 vccd vssd _521_/B wire2137/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2148 vccd vssd wire2148/X wire2148/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1403 vccd vssd wire1403/X _323_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1414 vccd vssd wire1414/X wire1415/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1167 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2159 vccd vssd wire2159/X wire2159/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1425 vccd vssd wire1425/X _311_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2695 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1436 wire1437/X wire1436/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1447 vccd vssd wire1447/X wire1448/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1469 _253_/X wire1469/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2032_A wire2033/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input115_A la_data_out_mprj[85] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__438__A_N _566_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__238__A _238_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2455 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_312_ vccd vssd _312_/A _312_/X _312_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_51_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2499 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_179 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_243_ vccd vssd _243_/A _243_/X _243_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1910 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput18 input18/X la_data_out_mprj[112] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_input80_A la_data_out_mprj[53] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_1320 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_4388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput29 _491_/C la_data_out_mprj[122] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 X_174_ _174_/X _174_/B _174_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3654 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3676 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_6_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__404__C _404_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3105 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3092 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_2244 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1302 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2288 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1970 vccd vssd _175_/A wire1971/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_output501_A wire1275/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1981 vccd vssd wire1981/X wire1981/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1992 vccd vssd _624_/B wire1993/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_975 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3808 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1132_A wire1132/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_4380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_945 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1843 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output870_A _307_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1718 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[13\] _160_/A la_data_out_core[13] _176_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 Xuser_wb_dat_gates\[26\] _140_/A mprj_dat_i_user[26] split5/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_53_1177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1599_A wire1600/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_1139 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1766_A wire1767/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_2100 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__611__A _611_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_4395 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3766 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__330__B _330_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3536 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1202 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[124\] _107_/A la_data_out_core[124] _287_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_42_2261 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_1869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_1487 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_1498 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2620 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3376 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__058__A _058_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_945 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_3621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2606 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[10\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_775 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_2628 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_rebuffer3_A split5/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__505__B _505_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3447 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__521__A _521_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput480 _484_/X la_data_in_core[115] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput491 wire1203/X la_data_in_core[125] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2779 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1200 vccd vssd wire1200/X _497_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1211 vccd vssd wire1211/X _473_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1222 vccd vssd wire1222/X _460_/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input232_A la_iena_mprj[75] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1233 vccd vssd wire1233/X _425_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1244 vccd vssd wire1244/X _418_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1255 vccd vssd wire1255/X _407_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2367 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1266 vccd vssd wire1266/X _396_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1277 vccd vssd wire1277/X _386_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1288 vccd vssd wire1288/X _375_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1299 wire1300/X wire1299/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_38_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_411 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_2853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3852 vssd vccd vssd vccd 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sky130_fd_sc_hd__decap_3 Xuser_to_mprj_in_gates\[80\] wire1135/A la_data_out_core[80] wire1479/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_4 XFILLER_3_4459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1631_A wire1632/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_1817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1205 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_1227 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_506 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4005 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_22_701 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_211 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2647 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1902 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__336__A _336_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_778 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2480 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[92\]_A la_data_out_core[92] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3089 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_4107 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__071__A _071_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3636 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1687 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2874 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_2885 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_1149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3235 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2512 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2523 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_2473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_22_2495 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_560_ _560_/X _560_/B _560_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_539 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1866 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1877 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_491_ _619_/A _491_/B _491_/X _491_/C vssd vccd vssd vccd sky130_fd_sc_hd__and3b_1 XFILLER_35_2801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_892 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2112_A wire2112/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_3980 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__246__A _246_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3893 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_1401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_1423 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input397_A mprj_adr_o_core[18] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_4280 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[83\]_A la_data_out_core[83] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__412__C _412_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_2351 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2309 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3995 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2489 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_4470 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_682 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3848 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1045_A _129_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1332 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4011 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4180 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1212_A _472_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output783_A wire1166/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__156__A _156_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3490 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3332 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1031 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_12_3354 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2680 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_output950_A wire1445/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[74\]_A la_data_out_core[74] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_1053 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_3398 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1581_A wire1581/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_270 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_3901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__603__B _603_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3715 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4201 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1846_A wire1846/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1425 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_3759 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[2\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4267 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_3555 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_1625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2832 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2876 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3290 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_1068 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__471__A_N _599_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_2531 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__066__A _066_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_575 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2439 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[65\]_A la_data_out_core[65] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4112 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__513__B _513_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_3400 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3466 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1536 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_3247 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1018 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_479 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire2062_A wire2063/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input145_A la_iena_mprj[111] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_2320 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3087 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_612_ _612_/X _612_/B _612_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_input312_A la_oenb_mprj[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_1630 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_543_ _543_/X _543_/B _543_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1663 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_474_ vssd vccd _474_/B _474_/X _602_/A _474_/C vssd vccd sky130_fd_sc_hd__and3b_2 XFILLER_18_2339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__407__C _407_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_1941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[56\]_A la_data_out_core[56] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__423__B _423_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4471 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output531_A wire1247/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output629_A _002_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4418 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1162_A wire1163/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_4368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3864 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3886 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput380 vccd vssd _590_/A la_oenb_mprj[93] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_42_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput391 vccd vssd wire1670/A mprj_adr_o_core[12] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_4220 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1427_A wire1428/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__494__A_N _622_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[43\] _026_/A la_data_out_core[43] _206_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_36_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4128 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_648 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3585 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2731 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_1716 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_3487 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_1115 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1749 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1796_A wire1797/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2016 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[47\]_A la_data_out_core[47] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__614__A _614_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1963_A wire1964/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__333__B _333_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_3720 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput810 _564_/X la_oenb_core[67] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput821 _574_/X la_oenb_core[77] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput832 _584_/X la_oenb_core[87] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput843 _594_/X la_oenb_core[97] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3764 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xoutput854 wire1407/X mprj_adr_o_user[15] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3606 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput865 _330_/X mprj_adr_o_user[25] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xuser_to_mprj_in_gates\[5\] _152_/A _168_/X la_data_out_core[5] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 XFILLER_9_3786 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput876 wire1424/X mprj_adr_o_user[6] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_3_4020 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_1305 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput887 wire1041/X mprj_dat_i_core[15] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2991 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput898 wire992/X mprj_dat_i_core[25] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_2844 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1607 wire1608/X _332_/B vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1618 vccd vssd wire1618/X wire1619/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1629 vccd vssd wire1629/X wire1629/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3374 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4028 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_12 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_2615 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_23 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_34 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_45 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_56 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__508__B _508_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2096 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_67 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_78 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_89 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_851 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_862 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3972 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_190_ vccd vssd _190_/A _190_/X _190_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_10_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[38\]_A la_data_out_core[38] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[122\]_A la_data_out_core[122] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XANTENNA__524__A _524_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__243__B _243_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input262_A la_oenb_mprj[101] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2277_A wire2277/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_3138 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_287 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3932 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2365 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2387 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_601 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2183 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4404 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4448 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1493 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_3714 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__418__B _418_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_526_ _526_/X _526_/B _526_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_50_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_2049 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_309 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_457_ _585_/A _457_/X _457_/C _457_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_53_1326 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_310 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_388_ _516_/A _388_/X _388_/C _388_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_output481_A _485_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1008_A wire1009/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[29\]_A la_data_out_core[29] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output579_A wire1286/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[113\]_A la_data_out_core[113] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_48_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output746_A _621_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_4408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1377_A wire1378/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3843 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2265 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_1603 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output913_A wire1395/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4215 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1544_A wire1545/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1809_A wire1809/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__609__A _609_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_2857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_4050 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__328__B _328_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire997_A wire998/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2523 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_821 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__344__A _344_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[104\]_A la_data_out_core[104] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_30_1123 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_4319 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1719 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2906 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput640 _012_/Y la_data_in_mprj[29] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput651 _022_/Y la_data_in_mprj[39] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_4087 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput662 _032_/Y la_data_in_mprj[49] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput673 _042_/Y la_data_in_mprj[59] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput684 _052_/Y la_data_in_mprj[69] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2105 vccd vssd _577_/B wire2106/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput695 _062_/Y la_data_in_mprj[79] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2116 vccd vssd wire2116/X wire2116/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2724 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2127 vccd vssd _564_/B wire2127/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2138 vccd vssd _520_/B wire2138/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2663 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1404 vccd vssd wire1404/X wire1405/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2149 vccd vssd _510_/B wire2150/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2674 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1415 vccd vssd wire1415/X wire1416/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1426 wire1427/X wire1426/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_1179 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1437 vccd vssd wire1437/X wire1438/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3171 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_2538 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1448 vccd vssd wire1448/X _300_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_921 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_3193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_965 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__519__A _519_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__238__B _238_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2025_A wire2025/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input108_A la_data_out_mprj[79] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_2467 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_311_ _311_/X _311_/B _311_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_51_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_242_ vccd vssd _242_/A _242_/X _242_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_52_65 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__254__A _254_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput19 vccd vssd input19/X la_data_out_mprj[113] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_7_825 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_173_ vccd vssd _173_/X _173_/B _173_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_32_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input73_A la_data_out_mprj[47] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_1387 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1960 vccd vssd wire1960/X wire1960/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1971 vccd vssd wire1971/X wire1971/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1982 vccd vssd _167_/A wire1983/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1993 vccd vssd wire1993/X wire1994/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4212 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4392 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3680 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_260 wire2025/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output696_A _154_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_509_ vccd vssd _509_/X _509_/B _509_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_37_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1221 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_670 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3588 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output863_A wire1397/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1287 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__164__A _164_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1298 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_wb_dat_gates\[19\] mprj_dat_i_user[19] load_slew1458/X _133_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA_wire1494_A wire1495/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1661_A wire1662/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1759_A wire1759/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__611__B _611_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2134 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_2084 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2189 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_3548 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2983 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2908 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1269 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_3261 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3272 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xuser_to_mprj_in_gates\[117\] la_data_out_core[117] _280_/X _100_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_25_913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_721 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_2676 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1942 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_3081 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_489 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3920 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2342 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__074__A _074_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__521__B _521_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_2747 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput470 wire1209/X la_data_in_core[106] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3773 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput481 _485_/X la_data_in_core[116] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput492 wire1202/X la_data_in_core[126] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__405__A_N _405_/A_N vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1201 vccd vssd wire1201/X _496_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2471 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1212 vccd vssd wire1212/X _472_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1223 vccd vssd wire1223/X _459_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1234 vccd vssd wire1234/X wire1235/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1245 vccd vssd wire1245/X _417_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1831 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1256 vccd vssd wire1256/X _406_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1267 vccd vssd wire1267/X wire1268/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input225_A la_iena_mprj[69] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1278 vccd vssd wire1278/X _385_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1289 vccd vssd wire1289/X _374_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_4109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__249__A _249_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4532 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_3831 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_8_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4164 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_225_ vccd vssd _225_/A _225_/X _225_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA__415__C _415_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_156_ _156_/A _156_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_13_1151 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1195 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_087_ _087_/A _087_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_49_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3008 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4536 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__431__B _431_/B vssd vccd vccd vssd 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vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_283 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1507_A wire1508/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3352 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_1505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__606__B _606_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3385 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1538 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_2515 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1876_A wire1876/A vssd vccd vccd vssd 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la_iena_mprj[54] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_22_3345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_1022 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2863 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2896 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3152 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__069__A _069_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2139 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3018 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3138 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_242 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2426 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_426 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__516__B _516_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_010_ _010_/A _010_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XANTENNA__532__A _532_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1624_A wire1625/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4195 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1046 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__617__A _617_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_3349 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1993_A wire1994/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__336__B _336_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2036 vssd vccd vssd vccd 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vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[36\] _019_/A la_data_out_core[36] _199_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_23_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_1196 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_1127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4476 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2787 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[47\]_B _210_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1789_A wire1789/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__614__B _614_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_2495 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1956_A wire1957/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput800 wire1150/X la_oenb_core[58] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput811 _565_/X la_oenb_core[68] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3732 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput822 _575_/X la_oenb_core[78] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput833 _585_/X la_oenb_core[88] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput844 _595_/X la_oenb_core[98] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput855 wire1406/X mprj_adr_o_user[16] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_2018 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1201 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_3535 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput866 _331_/X mprj_adr_o_user[26] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput877 wire1423/X mprj_adr_o_user[7] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput888 wire1036/X mprj_dat_i_core[16] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput899 wire987/X mprj_dat_i_core[26] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_2939 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1608 vccd vssd wire1608/X wire1609/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3342 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1619 vccd vssd wire1619/X wire1620/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_45_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3386 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2652 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1085 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_112 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_13 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_24 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_2627 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_35 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__077__A _077_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_46 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_57 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_68 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_79 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1541 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3848 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[122\]_B _285_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__524__B _524_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_1585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_47_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1861 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1872 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_2013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_712 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1894 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3231 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__540__A _540_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_734 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2172_A wire2173/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input255_A la_iena_mprj[96] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_2311 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2355 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_3944 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input422_A mprj_dat_o_core[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_2399 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3988 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_18_624 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4416 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_wb_dat_gates\[31\]_A mprj_dat_i_user[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_525_ _525_/X _525_/B _525_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA__418__C _418_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4140 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_456_ _584_/A _456_/X _456_/C _456_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_31_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_387_ _515_/A _387_/X _387_/C _387_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__434__B _434_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3494 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[113\]_B _276_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_1171 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output474_A wire1284/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3811 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output739_A _615_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3855 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1272_A _391_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1615 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__461__A_N _589_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4291 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3899 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3640 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output906_A wire1101/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_2073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3684 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__609__B _609_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1704_A wire1704/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_wb_dat_gates\[22\]_A mprj_dat_i_user[22] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_4095 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3263 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_137 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3225 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3236 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_14_3247 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__625__A _625_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_2682 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__344__B _344_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[104\]_B _267_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_888 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2292 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3540 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput630 _148_/Y la_data_in_mprj[1] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__360__A _360_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput641 _149_/Y la_data_in_mprj[2] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput652 _150_/Y la_data_in_mprj[3] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput663 _151_/Y la_data_in_mprj[4] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput674 _152_/Y la_data_in_mprj[5] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3354 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput685 _153_/Y la_data_in_mprj[6] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2106 vccd vssd wire2106/X wire2106/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_1676 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput696 _154_/Y la_data_in_mprj[7] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2117 vccd vssd _571_/B wire2117/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2128 vccd vssd _563_/B wire2128/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2736 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2139 vccd vssd _519_/B wire2139/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1405 vccd vssd wire1405/X _322_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1416 vccd vssd wire1416/X _316_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_2517 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2686 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1427 wire1428/X wire1427/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1438 vccd vssd wire1438/X wire1439/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1449 vccd vssd wire1449/X wire1450/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_3_3183 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__519__B _519_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_443 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3136 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[13\]_A mprj_dat_i_user[13] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_310_ _310_/X _310_/B _310_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_42_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_660 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2018_A wire2019/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__535__A _535_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_241_ _241_/X _241_/B _241_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_51_991 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_3612 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_172_ _172_/X _172_/B _172_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_49_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input372_A la_oenb_mprj[86] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__484__A_N _612_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input66_A la_data_out_mprj[40] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__270__A _270_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_597 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2202 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3741 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_3835 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1950 vccd vssd _188_/A wire1950/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1961 vccd vssd _181_/A wire1961/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1972 vccd vssd _174_/A wire1973/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1983 vccd vssd wire1983/X wire1983/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1994 vccd vssd wire1994/X wire1994/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__429__B _429_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_1589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_936 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4224 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_958 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_2_1291 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_250 wire2243/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1812 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_508_ vccd vssd _508_/A _508_/X _508_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_19_3692 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1020_A _134_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_1102 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1118_A wire1119/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3556 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output689_A _056_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_439_ _567_/A _439_/X _439_/C _439_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_50_3469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_181 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output856_A wire1404/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__180__A _180_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4228 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1654_A wire1654/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_1237 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3240 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__339__B _339_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_2633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_925 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_435 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_1998 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__355__A _355_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3932 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_2354 vssd vccd vssd vccd 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sky130_fd_sc_hd__buf_8 Xoutput493 wire1201/X la_data_in_core[127] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_40_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1202 vccd vssd wire1202/X _495_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1213 vccd vssd wire1213/X _471_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2314 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1224 vccd vssd wire1224/X _458_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1235 vccd vssd wire1235/X _424_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1246 vccd vssd wire1246/X _416_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1257 vccd vssd wire1257/X _405_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1268 vccd vssd wire1268/X _395_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1279 vccd vssd wire1279/X _384_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1718 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input120_A la_data_out_mprj[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_4500 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input218_A la_iena_mprj[62] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4544 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3100 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2302_A wire2303/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__265__A _265_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1406 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_630 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_224_ vccd vssd _224_/X _224_/B _224_/A vssd vccd sky130_fd_sc_hd__and2_1 XFILLER_7_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_155_ _155_/Y _155_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_6_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_wb_dat_gates\[1\] mprj_dat_i_user[1] max_cap1456/X _115_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_13_1163 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_086_ _086_/A _086_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_23_4504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__431__C _431_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4548 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3983 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2190 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1068_A wire1069/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3790 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_1101 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_3676 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1780 vccd vssd _381_/B wire1781/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1791 vccd vssd wire1791/X wire1792/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_1167 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3629 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4054 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1402_A _324_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_788 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_405 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__175__A _175_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_wb_dat_gates\[31\] mprj_dat_i_user[31] rebuffer6/X _145_/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_8 XFILLER_37_1664 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_449 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1074 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2685 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_2527 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_11_2538 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_1815 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1771_A wire1771/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__622__B _622_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4266 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_3302 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_4047 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_1034 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1275 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2706 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_2667 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2452 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__085__A _085_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1185 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_20_471 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3235 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input168_A la_iena_mprj[17] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_3279 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3075 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2252_A wire2253/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input335_A la_oenb_mprj[52] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1949 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1010 vccd vssd wire1010/X _136_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1021 vccd vssd wire1021/X wire1022/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1032 vccd vssd wire1032/X wire1033/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1043 vccd vssd wire1043/X wire1044/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input29_A la_data_out_mprj[122] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1054 vccd vssd wire1054/X wire1055/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_1410 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1065 vccd vssd wire1065/X _125_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1076 vccd vssd wire1076/X wire1077/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1087 vccd vssd wire1087/X wire1088/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1098 vccd vssd wire1098/X wire1099/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_2641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4396 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1951 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_4238 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__426__C _426_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3575 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_1203 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3597 vssd vccd vssd vccd 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vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2536 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[5\]_A la_data_out_core[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_4249 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_2825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4536 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3813 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2000_A wire2000/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_3868 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1447 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__543__A _543_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1870 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input285_A la_oenb_mprj[122] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__262__B _262_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1111 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1280 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3010 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1155 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input452_A mprj_dat_o_core[9] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3043 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1939 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3087 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1713 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3817 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_2160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_4494 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_1240 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_4327 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_5_1481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2079 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3724 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1345 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__437__B _437_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__418__A_N _546_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3301 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output769_A wire1198/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1088 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output936_A wire1299/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1567_A wire1568/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_3739 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_3513 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_4186 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_1605 vssd vccd vssd vccd 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vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_7_1587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput382 vccd vssd _592_/A la_oenb_mprj[95] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1050_A _128_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput393 vccd vssd wire1665/A mprj_adr_o_core[14] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_23_1379 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_3109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4244 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_809 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_606 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_617 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1315_A wire1316/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output886_A wire1046/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_3598 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_1729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[29\] _012_/A la_data_out_core[29] _192_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XANTENNA__390__A_N _518_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3120 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4488 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__183__A _183_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2029 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_3175 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1684_A wire1684/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_2452 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput801 _556_/X la_oenb_core[59] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput812 _566_/X la_oenb_core[69] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1851_A wire1852/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput823 _576_/X la_oenb_core[79] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3503 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3744 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1949_A wire1949/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput834 wire1147/X la_oenb_core[89] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput845 _596_/X la_oenb_core[99] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput856 wire1404/X mprj_adr_o_user[17] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_3_4000 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput867 _332_/X mprj_adr_o_user[27] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3547 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput878 wire1422/X mprj_adr_o_user[8] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput889 wire1031/X mprj_dat_i_core[17] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_3_4033 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_1257 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1609 vccd vssd wire1609/X wire1610/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_6_1020 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3354 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_1593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_4008 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2664 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__358__A _358_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_2697 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_658 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2606 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_4377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1985 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_14 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_25 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_36 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XPHY_47 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_58 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_69 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_875 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1531 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2287 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__093__A _093_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_547 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1283 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3243 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_212 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1335 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_768 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3287 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input150_A la_iena_mprj[116] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1368 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2165_A wire2166/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input248_A la_iena_mprj[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input415_A mprj_adr_o_core[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2152 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_636 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input11_A la_data_out_mprj[106] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__268__A _268_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2196 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_524_ _524_/X _524_/B _524_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_33_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3727 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_3738 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_455_ _583_/A _455_/X _455_/C _455_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_31_3017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_386_ _514_/A _386_/X _386_/C _386_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_13_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_1773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__434__C _434_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_16_1183 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1096 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output467_A wire1212/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3823 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1098_A wire1099/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__450__B _450_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output634_A _006_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3867 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1265_A _397_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_4386 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_4397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4156 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3591 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output801_A _556_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_1340 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3444 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4189 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3516 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1432_A wire1433/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_934 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput190 _200_/B la_iena_mprj[37] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_36_411 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__178__A _178_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_1198 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[22\]_B split5/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2205 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_617 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1899_A wire1900/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_2563 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_683 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2536 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_834 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2271 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_29_4181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput620 _109_/Y la_data_in_mprj[126] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput631 _003_/Y la_data_in_mprj[20] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3552 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__360__B _360_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_2919 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_3311 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput642 _013_/Y la_data_in_mprj[30] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput653 _023_/Y la_data_in_mprj[40] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput664 _033_/Y la_data_in_mprj[50] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput675 _043_/Y la_data_in_mprj[60] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3438 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput686 _053_/Y la_data_in_mprj[70] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2107 vccd vssd _576_/B wire2108/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput697 _063_/Y la_data_in_mprj[80] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_1115 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3208 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2118 vccd vssd _570_/B wire2118/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2643 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2129 vccd vssd _562_/B wire2129/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input3_A caravel_rstn vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1406 vccd vssd wire1406/X _321_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1417 vccd vssd wire1417/X wire1418/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1428 vccd vssd wire1428/X wire1429/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_901 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1439 vccd vssd wire1439/X _302_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__088__A _088_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3749 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3148 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[13\]_B split4/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_240_ vccd vssd _240_/A _240_/X _240_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA__535__B _535_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_171_ _171_/X _171_/B _171_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_10_3624 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1924 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input198_A la_iena_mprj[44] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3668 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__551__A _551_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input365_A la_oenb_mprj[7] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2282_A wire2282/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__270__B _270_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_irq_gates\[0\] _111_/A user_irq_core[0] _291_/X vssd vccd vssd vccd sky130_fd_sc_hd__nand2_2 XANTENNA_input59_A la_data_out_mprj[34] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_543 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_2225 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4487 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3764 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1940 vccd vssd _196_/A wire1940/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_2269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1951 vccd vssd _187_/A wire1951/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1962 vccd vssd _180_/A wire1962/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1973 vccd vssd wire1973/X wire1973/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1984 vccd vssd _166_/A wire1985/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1995 vccd vssd _623_/B wire1996/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1281 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_4236 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_240 _515_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_3513 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_251 _440_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_507_ vccd vssd _507_/A _507_/X _507_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_37_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_1824 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_108 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__445__B _445_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1013_A wire1014/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_438_ _566_/A _438_/X _438_/C _438_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_output584_A wire1219/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1158 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_369_ _497_/A _369_/X _369_/C _369_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_32_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output751_A wire1187/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xrebuffer1 split4/A rebuffer1/X vssd vccd vssd vccd sky130_fd_sc_hd__bufbuf_8 XANTENNA_output849_A wire1417/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1382_A wire1383/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2031 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__180__B _180_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3631 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[96\] la_data_out_core[96] wire1464/X _079_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_6_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3675 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1647_A wire1647/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_1216 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_2996 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_4047 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1814_A wire1815/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_2551 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_2689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__355__B _355_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3944 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_2366 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_1681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_27_4107 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3988 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2680 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2716 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3360 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_3371 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput472 wire1207/X la_data_in_core[108] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput483 _487_/X la_data_in_core[118] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput494 wire1282/X la_data_in_core[12] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1203 vccd vssd wire1203/X _494_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1214 vccd vssd wire1214/X _470_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2484 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1225 vccd vssd wire1225/X _431_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1236 vccd vssd wire1236/X wire1237/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_208 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1247 vccd vssd wire1247/X _415_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2359 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1258 vccd vssd wire1258/X _404_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1269 vccd vssd wire1269/X _394_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1708 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2030_A wire2031/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input113_A la_data_out_mprj[83] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2128_A wire2128/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_4556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__546__A _546_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2709 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_2266 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__265__B _265_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2299 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__451__A_N _579_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_223_ vccd vssd _223_/A _223_/X _223_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_23_491 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_613 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_154_ _154_/Y _154_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3487 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__281__A _281_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_085_ _085_/A _085_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_49_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_4516 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3951 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3995 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_395 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_720 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1770 vccd vssd _385_/B wire1771/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_753 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_1124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_1293 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1781 vccd vssd wire1781/X wire1781/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_53_509 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_4_1365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_1135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1792 vccd vssd wire1792/X wire1792/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_701 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1130_A wire1130/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1228_A _428_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output799_A wire1152/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4077 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__175__B _175_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2620 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_1031 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[11\] _158_/A la_data_out_core[11] _174_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 Xuser_wb_dat_gates\[24\] _138_/A mprj_dat_i_user[24] rebuffer3/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_50_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1597_A wire1598/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1827 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__191__A _191_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1764_A wire1765/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4004 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_2473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2810 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_1171 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2760 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_2602 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3419 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_2635 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[122\] wire1140/A la_data_out_core[122] _285_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_2 XFILLER_25_1046 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2876 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_22_2646 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_3165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__474__A_N _602_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_594 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__366__A _366_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1774 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_737 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_2439 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_4420 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[95\]_A la_data_out_core[95] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_rebuffer1_A split4/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2016 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_3837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3247 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_1569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3010 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2629 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_822 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2078_A wire2079/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_1917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1000 vccd vssd wire999/A wire1001/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1011 vccd vssd wire1011/X wire1012/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2270 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_2353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_1157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3098 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1022 vccd vssd wire1022/X wire1023/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input230_A la_iena_mprj[73] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1033 vccd vssd wire1033/X wire1034/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input328_A la_oenb_mprj[46] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1044 vccd vssd wire1044/X wire1045/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2245_A wire2245/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3892 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2386 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1055 vccd vssd wire1055/X _127_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3975 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_2228 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1066 vccd vssd wire1066/X wire1067/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1077 wire1078/X wire1077/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire1088 vccd vssd wire1088/X wire1089/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1099 vccd vssd wire1099/X wire1100/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4320 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3939 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__276__A _276_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_2653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4364 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_2517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3565 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_1985 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[86\]_A la_data_out_core[86] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_1215 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_1384 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_461 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_206_ _206_/X _206_/B _206_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 X_137_ _137_/A _137_/Y vssd vccd vssd vccd sky130_fd_sc_hd__inv_12 XFILLER_8_999 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__442__C _442_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_068_ _068_/Y _068_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_10_2594 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4324 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output547_A wire1227/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_2793 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_4407 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_1882 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_2657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4429 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1080_A _122_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_4368 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1178_A _519_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2139 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output714_A _079_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4131 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[10\]_A la_data_out_core[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1345_A _355_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_3441 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2290 vccd vssd wire2290/X wire2290/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_39_3129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[59\] _042_/A la_data_out_core[59] _222_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_1_2740 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2762 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__186__A _186_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_2141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_3140 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[77\]_A la_data_out_core[77] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3173 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2049 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1881_A wire1882/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1979_A wire1979/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2314 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire965_A _146_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1602 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_2358 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_3501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3606 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[5\]_B split4/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_2833 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_1709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_3144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1084 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_2454 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_2695 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__096__A _096_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_4504 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4548 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[68\]_A la_data_out_core[68] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_236 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1882 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_413 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input180_A la_iena_mprj[28] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2195_A wire2196/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_1123 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input278_A la_oenb_mprj[116] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3022 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_1167 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3127 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4508 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input445_A mprj_dat_o_core[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_3099 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input41_A la_data_out_mprj[18] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2036 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_1493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3627 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_851 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__437__C _437_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_2461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4172 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[59\]_A la_data_out_core[59] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output497_A wire1279/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__453__B _453_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output664_A _033_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1295_A wire1296/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output831_A _583_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output929_A wire1323/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2813 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1163 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2993 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_1016 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_2857 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3202 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_545 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_2567 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2458 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_3593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2409 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_2469 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_3457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__363__B _363_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_2280 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_2756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_2193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_4104 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2789 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_939 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3239 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_449 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2685 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_2527 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3182 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3013 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1973 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1105 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3057 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2356 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_4025 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__538__B _538_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_540_ _540_/X _540_/B _540_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_4069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_471_ _599_/A _471_/X _471_/C _471_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_32_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4492 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2110_A wire2110/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_2645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2208_A wire2208/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[125\]_A la_data_out_core[125] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XANTENNA__554__A _554_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input395_A mprj_adr_o_core[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_589 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input89_A la_data_out_mprj[61] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_29_3117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_4_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2449 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3626 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput350 vccd vssd wire1706/A la_oenb_mprj[66] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_23_1336 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput361 vccd vssd wire1696/A la_oenb_mprj[76] vssd vccd sky130_fd_sc_hd__buf_6 Xinput372 vccd vssd wire1686/A la_oenb_mprj[86] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput383 vccd vssd wire1683/A la_oenb_mprj[96] vssd vccd sky130_fd_sc_hd__buf_6 Xinput394 vccd vssd wire1662/A mprj_adr_o_core[15] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_53_4103 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__448__B _448_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1043_A wire1044/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1082 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_821 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output781_A _537_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1308_A wire1309/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output879_A wire1420/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[116\]_A la_data_out_core[116] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_31_3733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3132 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__183__B _183_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2464 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_1329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_4424 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1677_A wire1678/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput802 wire1195/X la_oenb_core[5] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput813 wire1194/X la_oenb_core[6] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput824 wire1193/X la_oenb_core[7] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput835 wire1192/X la_oenb_core[8] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3515 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput846 wire1191/X la_oenb_core[9] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_2961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput857 wire1403/X mprj_adr_o_user[18] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1844_A wire1845/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput868 _333_/X mprj_adr_o_user[28] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_3_4012 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput879 wire1420/X mprj_adr_o_user[9] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_3_4045 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_3311 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_4078 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_3283 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_1032 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_604 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2593 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2676 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_497 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__358__B _358_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_15 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_4209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_26 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4389 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XPHY_37 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_48 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_59 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_1207 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2965 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_331 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3991 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_2233 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_user_to_mprj_in_gates\[107\]_A la_data_out_core[107] vssd vccd vccd vssd + sky130_fd_sc_hd__diode_2 XFILLER_52_2244 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_887 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3806 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_559 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1251 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_2037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_3255 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3119 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_2554 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_268 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2324 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_2493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1831 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2060_A wire2061/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input143_A la_iena_mprj[10] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2158_A wire2159/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__549__A _549_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2142 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_4532 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__268__B _268_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input310_A la_oenb_mprj[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_1992 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input408_A mprj_adr_o_core[28] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4576 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1463 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_523_ _523_/X _523_/B _523_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_17_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3864 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4120 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_454_ _582_/A _454_/X _454_/C _454_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA__284__A _284_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_191 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_385_ _513_/A _385_/X _385_/C _385_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_31_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1042 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1785 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1195 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3835 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__450__C _450_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3879 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1628 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1639 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output627_A _000_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1701 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1160_A wire1161/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_4229 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_791 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_4168 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_wire1258_A _404_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2952 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_290 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3456 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2891 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2816 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput180 vccd vssd wire1743/A la_iena_mprj[28] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_42_1789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_2181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xinput191 _201_/B la_iena_mprj[38] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA__178__B _178_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_1177 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1425_A _311_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_916 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xuser_to_mprj_in_gates\[41\] _024_/A la_data_out_core[41] _204_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_33_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_4075 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2651 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__194__A _194_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1794_A wire1795/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_1251 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1104 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1961_A wire1961/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput610 _100_/Y la_data_in_mprj[117] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput621 _110_/Y la_data_in_mprj[127] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput632 _004_/Y la_data_in_mprj[21] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput643 _014_/Y la_data_in_mprj[31] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3323 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput654 _024_/Y la_data_in_mprj[41] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput665 _034_/Y la_data_in_mprj[51] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xuser_to_mprj_in_gates\[3\] _150_/A _166_/X la_data_out_core[3] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 Xoutput676 _044_/Y la_data_in_mprj[61] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_1033 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_3367 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput687 _054_/Y la_data_in_mprj[71] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2108 vccd vssd wire2108/X wire2108/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_25_2633 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput698 _064_/Y la_data_in_mprj[81] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2119 vccd vssd _569_/B wire2120/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_8_1127 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2655 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_3681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3130 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1407 vccd vssd wire1407/X _320_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1418 vccd vssd wire1418/X wire1419/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1429 vccd vssd wire1429/X _304_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3990 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2495 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2415 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_4017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2437 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_170_ _170_/X _170_/B _170_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_52_1351 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_1302 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3636 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_2361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__551__B _551_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1682 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input260_A la_oenb_mprj[0] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2275_A wire2276/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input358_A la_oenb_mprj[73] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_555 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_566 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__380__A_N _508_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1661 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__279__A _279_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1930 vccd vssd _334_/A wire1930/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3776 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1941 vccd vssd _195_/A wire1941/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1952 vccd vssd _186_/A wire1952/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_935 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1963 vccd vssd _179_/A wire1964/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1974 vccd vssd _173_/A wire1974/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_1317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1985 vccd vssd wire1985/X wire1985/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1996 vccd vssd wire1996/X wire1997/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1271 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_230 wire2085/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4248 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_241 wire2164/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_506_ vccd vssd _506_/A _506_/X _506_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_252 _438_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_640 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_437_ _565_/A _437_/X _437_/C _437_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_18_1246 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__445__C _445_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3271 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_368_ vccd vssd _368_/A _368_/X _368_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_wire1006_A wire1007/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output577_A _457_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1582 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_299_ _299_/X _299_/B _299_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 Xrebuffer2 split4/A rebuffer2/X vssd vccd vssd vccd sky130_fd_sc_hd__bufbuf_8 XFILLER_31_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__461__B _461_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output744_A _619_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2115 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4219 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1375_A _345_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3643 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3737 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[89\] la_data_out_core[89] wire1470/X _072_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA_output911_A wire1076/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3687 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1542_A wire1543/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1397 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_3220 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__189__A _189_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3494 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3253 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1013 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1807_A wire1807/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_2585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire995_A wire996/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_459 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_33_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_2323 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2492 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4119 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__371__B _371_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_2121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput473 _478_/X la_data_in_core[109] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput484 _488_/X la_data_in_core[119] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_43_2029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput495 wire1281/X la_data_in_core[13] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_2441 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1204 vccd vssd wire1204/X _493_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__099__A _099_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1215 vccd vssd wire1215/X _469_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1226 vccd vssd wire1226/X _430_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_9_1992 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1237 vccd vssd wire1237/X _423_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1248 vccd vssd wire1248/X _414_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_57 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1259 vccd vssd wire1259/X _403_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3525 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__546__B _546_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input106_A la_data_out_mprj[77] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2023_A wire2024/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3878 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4112 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_222_ vccd vssd _222_/A _222_/X _222_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_8_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__562__A _562_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_3444 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_153_ _153_/A _153_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__281__B _281_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input71_A la_data_out_mprj[45] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_084_ _084_/Y _084_/A vccd vssd vssd vccd sky130_fd_sc_hd__inv_4 XFILLER_45_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4528 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3963 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_385 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4324 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_4493 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3540 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1491 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1760 vccd vssd _391_/B wire1760/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1771 vccd vssd wire1771/X wire1771/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1782 vccd vssd _380_/B wire1783/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_242 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1793 vccd vssd _375_/B wire1794/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_735 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__456__B _456_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1043 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1677 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_492 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output861_A _326_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1087 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[17\] mprj_dat_i_user[17] load_slew1458/X _131_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA_wire1492_A wire1493/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__191__B _191_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3451 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1211 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1924_A wire1924/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_2794 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_1058 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3801 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[115\] la_data_out_core[115] _278_/X _098_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_39_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__366__B _366_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[95\]_B wire1465/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_4476 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_1029 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_2006 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2039 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_46_3805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_3849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_2321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1929 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_878 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1001 vccd vssd wire1001/X _138_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1012 vccd vssd wire1012/X wire1013/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3860 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1023 vccd vssd wire1023/X wire1024/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1034 vccd vssd wire1034/X wire1035/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1169 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1045 vccd vssd wire1045/X _129_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_1401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1056 vccd vssd wire1056/X wire1057/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2398 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1067 vccd vssd wire1067/X wire1068/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_3987 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2140_A wire2140/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1423 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input223_A la_iena_mprj[67] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1078 wire1079/X wire1078/X vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire2238_A wire2238/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1089 vccd vssd wire1089/X wire1090/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__557__A _557_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3809 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4332 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__276__B _276_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_3631 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4376 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_1341 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[86\]_B wire1473/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_1227 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__292__A _292_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_205_ _205_/X _205_/B _205_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_12_996 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_136_ _136_/A _136_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_7_477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4450 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_067_ _067_/Y _067_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_45_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3821 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4577 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_4336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3771 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_3782 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1073_A wire1074/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2280 vccd vssd _445_/B wire2280/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1240_A wire1241/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2291 vccd vssd _436_/B wire2291/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1338_A wire1339/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_2730 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1590 vccd vssd wire1590/X wire1591/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_1185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_1717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2796 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__186__B _186_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1505_A wire1506/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2153 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_3021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_738 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[77\]_B wire1482/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3196 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1874_A wire1874/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2949 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_4225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_4308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1658 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2845 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__441__A_N _569_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3156 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1309 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2499 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1848 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2284 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1550 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_4516 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3853 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_3826 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_248 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_2259 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_4240 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4284 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_1260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1894 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_46_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1135 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2090_A wire2091/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input173_A la_iena_mprj[21] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2188_A 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XANTENNA_wire1036_A wire1037/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_1177 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3556 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_1709 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2101 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_599_ _599_/X _599_/B _599_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_43_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__464__B _464_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[116\]_B _279_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output774_A wire1171/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1477 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output941_A wire1379/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput803 wire1149/X la_oenb_core[60] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1572_A wire1573/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput814 _567_/X la_oenb_core[70] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput825 _577_/X la_oenb_core[80] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1805 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput836 wire1146/X la_oenb_core[90] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput847 wire961/X mprj_ack_i_core vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3527 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput858 wire1402/X mprj_adr_o_user[19] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_2973 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput869 _334_/X mprj_adr_o_user[29] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1849 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_4057 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[25\]_A mprj_dat_i_user[25] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_1932 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_16 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_1998 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_27 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_38 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_49 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_10_4508 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1219 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__374__B _374_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[107\]_B _270_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_2977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_343 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_17_2376 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3818 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3987 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2511 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_225 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_2461 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_2303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2566 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_2347 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_3373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__549__B _549_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2053_A wire2053/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input136_A la_iena_mprj[103] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_wb_dat_gates\[16\]_A mprj_dat_i_user[16] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3409 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_522_ vccd vssd _522_/A _522_/X _522_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_wire2220_A wire2221/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input303_A la_oenb_mprj[23] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__565__A _565_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_453_ _581_/A _453_/X _453_/C _453_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4132 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_181 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__284__B _284_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_384_ _512_/A _384_/X _384_/C _384_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_35_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3464 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1021 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1054 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1639 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_12_1027 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4515 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_553 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_2308 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1513 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4377 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output522_A wire1255/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_1101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_741 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__459__B _459_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1153_A wire1154/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_3529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3468 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput170 vccd vssd _182_/B la_iena_mprj[19] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_23_1145 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1397 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput181 vccd vssd _192_/B la_iena_mprj[29] vssd vccd sky130_fd_sc_hd__buf_4 Xinput192 _202_/B la_iena_mprj[39] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_37_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1320_A wire1321/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1418_A wire1419/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_939 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output891_A wire1021/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[34\] _017_/A la_data_out_core[34] _197_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_23_129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_2630 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_192 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__194__B _194_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_32_696 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_2549 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1787_A wire1787/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_31_3597 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1116 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1954_A wire1955/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput600 _091_/Y la_data_in_mprj[108] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput611 _101_/Y la_data_in_mprj[118] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput622 _159_/Y la_data_in_mprj[12] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput633 _005_/Y la_data_in_mprj[22] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput644 _015_/Y la_data_in_mprj[32] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3335 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput655 _025_/Y la_data_in_mprj[42] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3576 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_2601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput666 _035_/Y la_data_in_mprj[52] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1646 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput677 _045_/Y la_data_in_mprj[62] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_2781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput688 _055_/Y la_data_in_mprj[72] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xwire2109 vccd vssd _575_/B wire2110/X vssd vccd sky130_fd_sc_hd__buf_6 Xoutput699 _065_/Y la_data_in_mprj[82] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_8_1139 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1408 vccd vssd wire1408/X wire1409/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_42_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_2509 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_1089 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3153 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1419 vccd vssd wire1419/X _315_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_45_1381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__369__B _369_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_273 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1773 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_4165 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_4029 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_630 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_2741 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_4452 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2785 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1027 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_3751 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_685 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_3762 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1694 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input253_A la_iena_mprj[94] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2170_A wire2170/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_2341 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_3086 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2268_A wire2269/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_578 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input420_A mprj_cyc_o_core vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1920 vccd vssd _250_/A wire1920/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1931 vccd vssd _232_/A wire1931/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3849 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1942 vccd vssd _194_/A wire1942/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1953 vccd vssd _185_/A wire1953/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3788 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1964 vccd vssd wire1964/X wire1964/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1975 vccd vssd _172_/A wire1975/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_947 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1986 vccd vssd _165_/A wire1987/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_1329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1997 vccd vssd wire1997/X wire1997/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_4352 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_4363 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_917 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_3640 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_220 _168_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_231 wire2093/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_505_ vccd vssd _505_/A _505_/X _505_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_50_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_242 _496_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_253 _342_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1203 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_1837 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_436_ _564_/A _436_/X _436_/C _436_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_53_1149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_367_ vccd vssd _367_/A _367_/X _367_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_32_3873 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2560 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_298_ vccd vssd _298_/X _298_/B _298_/A vssd vccd sky130_fd_sc_hd__and2_1 XANTENNA_output472_A wire1207/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xrebuffer3 split5/A rebuffer3/X vssd vccd vssd vccd sky130_fd_sc_hd__bufbuf_8 XFILLER_9_199 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_2593 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3611 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3705 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_2044 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output737_A _613_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3655 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1270_A _393_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1368_A wire1369/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_4091 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_3699 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output904_A wire970/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_4185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3390 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__189__B _189_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3348 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_1025 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2037 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_1303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire988_A wire989/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2925 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_2395 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_2969 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3394 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__371__C _371_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_1391 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2177 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_3143 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput463 wire1294/X la_data_in_core[0] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput474 wire1284/X la_data_in_core[10] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput485 wire1283/X la_data_in_core[11] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput496 wire1280/X la_data_in_core[14] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_2683 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_9_2694 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1205 vccd vssd wire1205/X _492_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1216 vccd vssd wire1216/X _468_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1227 vccd vssd wire1227/X _429_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1824 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1238 vccd vssd wire1238/X wire1239/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1249 vccd vssd wire1249/X _413_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_4561 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_69 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2260 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_703 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3893 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_2279 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_972 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2016_A wire2017/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_221_ vccd vssd _221_/A _221_/X _221_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_14_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_121 vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_3_865 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3975 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_342 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4231 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_load_slew1458_A split5/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_2002 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2182 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_1841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_3613 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_1885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1750 vccd vssd _452_/C wire1750/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_210 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1761 vccd vssd _390_/B wire1761/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_19_744 vssd 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sky130_fd_sc_hd__diode_2 XFILLER_48_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_4214 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_3441 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1652_A wire1653/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3474 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1223 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_22_3316 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_2773 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[108\] _091_/A la_data_out_core[108] _271_/X vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_4 XFILLER_17_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_1409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_747 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1765 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_4157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_920 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__370__A_N _498_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_452 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__382__B _382_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_10_2029 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_wb_dat_gates\[8\]_A mprj_dat_i_user[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xmax_length1714 vccd vssd wire1713/A _416_/A_N vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_49_1505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4117 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_9_3192 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3045 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1002 vccd vssd wire1002/X wire1003/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[8\]_A la_data_out_core[8] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3933 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1013 vccd vssd wire1013/X wire1014/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3872 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1024 vccd vssd wire1024/X wire1025/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2366 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1035 vccd vssd wire1035/X _131_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1046 vccd vssd wire1046/X wire1047/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1057 vccd vssd wire1057/X wire1058/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_1654 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1068 vccd vssd wire1068/X wire1069/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_1507 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1079 vccd vssd wire1079/X wire1080/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__557__B _557_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3919 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input216_A la_iena_mprj[60] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_213 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3643 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2300_A wire2300/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__573__A _573_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3698 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4090 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_204_ _204_/X _204_/B _204_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_12_975 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_1239 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_3231 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_135_ _135_/Y _135_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_49_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2530 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_1564 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_066_ _066_/Y _066_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_10_1840 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_4462 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4304 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_3603 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4348 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_3719 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1066_A wire1067/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_3360 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2270 vccd vssd wire2270/X wire2270/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2281 vccd vssd _309_/A wire2281/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3454 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2292 vccd vssd _435_/B wire2292/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1580 vccd vssd wire1580/X wire1581/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__467__B _467_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_2681 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1591 vccd vssd wire1591/X wire1591/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_53 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_2786 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_1197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_585 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_4433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__393__A_N _521_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_4477 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1400_A wire1401/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_2176 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_50_3033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3153 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_2029 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_1918 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_1306 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3186 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2496 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1041 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1867_A wire1868/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_3569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2261 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_4437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_44_2125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_2868 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2412 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_9_1075 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2506 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2489 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_861 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__377__B _377_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_3665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_500 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_3529 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4528 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_352 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_897 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_2129 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_3838 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_209 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4252 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_750 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3540 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4296 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_3584 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1272 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_3625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_949 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_1313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input166_A la_iena_mprj[15] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2083_A wire2083/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_3923 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3967 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_654 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_4453 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input333_A la_oenb_mprj[50] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_2141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_48_625 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_3680 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__568__A _568_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input27_A la_data_out_mprj[120] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_1833 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2185 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3796 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__287__B _287_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_1877 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_1326 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3716 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4130 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3738 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2305 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_2485 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_4038 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_2349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3397 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_1047 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2073 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_1973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_118_ _118_/A _118_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_29_3845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output552_A _434_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_4112 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_049_ _049_/Y _049_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_7_4353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3889 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 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vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire970_A wire971/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_2260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_4001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_2135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1423 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2179 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1508 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3037 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3048 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2483 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2314 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2336 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_2286 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1624 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_1657 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_39_3473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2082 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_4472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_4336 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_3061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_529 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1681 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input283_A la_oenb_mprj[120] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_3392 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2298_A wire2298/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__570__B 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vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput396 vccd vssd wire1654/A mprj_adr_o_core[17] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_35_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_639 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1145 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_3524 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3437 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2703 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_53_3459 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_374 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1029_A wire1030/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_598_ _598_/X _598_/B _598_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_32_834 vssd vccd vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_9_4448 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_1 la_data_out_core[2] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput804 wire1148/X la_oenb_core[61] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_output934_A wire1303/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput815 _568_/X la_oenb_core[71] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput826 _578_/X la_oenb_core[81] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput837 wire1145/X la_oenb_core[91] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_6_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1565_A wire1566/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput848 _305_/X mprj_adr_o_user[0] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_28_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput859 _306_/X mprj_adr_o_user[1] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3324 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_45_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2645 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_wb_dat_gates\[25\]_B split5/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__001__A _001_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_1944 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_2013 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_3613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2380 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_17 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_28 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_2068 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XPHY_39 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_23_812 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_300 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_23_845 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_17_2333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__374__C _374_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_3201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3381 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_2989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_2388 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3999 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_3289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__390__B _390_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_705 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2905 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3027 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_2523 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1761 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_1844 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_2359 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[16\]_B load_slew1458/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_1961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2046_A wire2046/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3800 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_input129_A la_data_out_mprj[98] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_521_ _521_/X _521_/B _521_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_2_1476 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_13_4100 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__565__B _565_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_452_ _580_/A _452_/X _452_/C _452_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_17_4280 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2213_A wire2214/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__454__A_N _582_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1407 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2433 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_4144 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_383_ _511_/A _383_/X _383_/C _383_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_50_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2477 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input94_A la_data_out_mprj[66] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3476 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__581__A _581_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4527 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1619 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3780 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1569 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3655 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2088 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_27_1271 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_281 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output515_A wire1262/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_irq_gates\[1\]_A user_irq_core[1] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_915 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput160 vccd vssd _288_/B la_iena_mprj[125] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_4_2965 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput171 _164_/B la_iena_mprj[1] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput182 _165_/B la_iena_mprj[2] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_49_797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xinput193 _166_/B la_iena_mprj[3] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_wire1146_A _587_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_4044 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3343 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__475__B _475_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1313_A wire1314/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output884_A wire1056/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xuser_to_mprj_in_gates\[27\] _010_/A la_data_out_core[27] _190_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_31_3521 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1821 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_848 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_2853 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_1297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4212 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3500 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput601 _092_/Y la_data_in_mprj[109] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput612 _102_/Y la_data_in_mprj[119] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3303 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput623 _160_/Y la_data_in_mprj[13] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput634 _006_/Y la_data_in_mprj[23] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput645 _016_/Y la_data_in_mprj[33] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput656 _026_/Y la_data_in_mprj[43] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput667 _036_/Y la_data_in_mprj[53] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3588 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2613 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput678 _046_/Y la_data_in_mprj[63] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput689 _056_/Y la_data_in_mprj[73] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_3110 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_25_2668 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1409 vccd vssd wire1409/X _319_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3082 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_3_3165 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__369__C _369_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_915 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3198 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__477__A_N _605_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_36_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__385__B _385_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_4420 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2010 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2753 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_4464 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2797 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_513 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1083 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_43_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4424 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4529 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2375 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input246_A la_iena_mprj[88] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2163_A wire2164/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_split4_A split4/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1910 vccd vssd wire1910/X wire1910/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1921 vccd vssd _249_/A wire1921/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1685 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1932 vccd vssd _231_/A wire1932/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1943 vccd vssd _193_/A wire1943/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1954 vccd vssd _184_/A wire1955/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_1308 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1965 vccd vssd _178_/A wire1966/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input413_A mprj_adr_o_core[3] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1976 vccd vssd _171_/A wire1976/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1987 vccd vssd wire1987/X wire1987/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__576__A _576_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1998 vccd vssd _622_/B wire1999/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_18_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_3630 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_210 wire1667/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_221 _168_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__295__B _295_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_504_ vccd vssd _504_/A _504_/X _504_/B vssd vccd sky130_fd_sc_hd__and2_2 XANTENNA_232 wire2094/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_243 _492_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_254 _621_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_631 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3696 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_435_ _563_/A _435_/X _435_/C _435_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_37_1849 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3240 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_366_ vccd vssd _366_/A _366_/X _366_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_35_1562 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_2138 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_3885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_3284 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_297_ _297_/X _297_/B _297_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_13_2572 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output465_A wire1214/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_2001 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1096_A wire1097/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3717 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output632_A _004_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_26_3667 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[40\]_A la_data_out_core[40] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_1427 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_1533 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_0_3305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_49_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_2690 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1430_A wire1431/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3288 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_wire1528_A wire1528/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_3299 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_2648 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1914 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_406 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3020 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_36_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_214 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_748 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_3097 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_14_2303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1897_A wire1898/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2937 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_2374 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3914 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_494 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3352 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput464 wire1215/X la_data_in_core[100] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_user_to_mprj_in_gates\[31\]_A la_data_out_core[31] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput475 _479_/X la_data_in_core[110] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_2651 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3155 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_3166 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xoutput486 _489_/X la_data_in_core[120] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput497 wire1279/X la_data_in_core[15] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_input1_A caravel_clk vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1206 vccd vssd wire1206/X _491_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_15 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1217 vccd vssd wire1217/X _465_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1228 vccd vssd wire1228/X _428_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1239 vccd vssd wire1239/X _422_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_28_701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2272 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3549 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_715 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_1593 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_user_to_mprj_in_gates\[98\]_A la_data_out_core[98] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_3749 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_36_2561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_220_ vccd vssd _220_/A _220_/X _220_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_49_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2009_A wire2009/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_11_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3582 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_151_ _151_/Y _151_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_10_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_3435 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_input196_A la_iena_mprj[42] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_17_1292 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_10_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3468 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_1757 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_082_ _082_/A _082_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_45_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2280_A wire2280/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input363_A la_oenb_mprj[78] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input57_A la_data_out_mprj[32] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[22\]_A la_data_out_core[22] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_3_877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_354 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4473 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_4243 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3520 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4337 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_2014 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_1460 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_3553 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3636 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_701 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1740 vccd vssd _484_/C input21/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_4_2069 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1751 vccd vssd _451_/C wire1751/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2924 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_1897 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1762 vccd vssd _389_/B wire1763/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1773 vccd vssd wire1773/X wire1773/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2946 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1784 vccd vssd _379_/B wire1785/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1795 vccd vssd wire1795/X wire1795/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_20_1149 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_3037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_81 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_4014 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[89\]_A la_data_out_core[89] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_4047 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1012 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_15_984 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_42_781 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_2060 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_472 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_418_ _546_/A _418_/X _418_/C _418_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XANTENNA_wire1011_A wire1012/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output582_A wire1221/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1109_A wire1110/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_2656 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_3693 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_349_ _349_/X _349_/B _349_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_35_1381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1245 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output847_A wire961/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1380_A wire1381/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1478_A _244_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[94\] _077_/A la_data_out_core[94] _257_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XANTENNA_user_to_mprj_in_gates\[13\]_A la_data_out_core[13] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_1141 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_3486 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1645_A wire1646/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3328 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_3124 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1812_A wire1813/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_4125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_236 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_4169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2701 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2745 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[8\]_B max_cap1456/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_3160 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_2527 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3057 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1003 vccd vssd wire1003/X wire1004/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2345 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1014 vccd vssd wire1014/X wire1015/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_user_to_mprj_in_gates\[8\]_B _171_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1025 vccd vssd wire1025/X _133_/Y vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_22_3884 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1036 vccd vssd wire1036/X wire1037/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1047 vccd vssd wire1047/X wire1048/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2378 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1058 vccd vssd wire1058/X wire1059/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1069 vccd vssd wire1069/X wire1070/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_38_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1519 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input111_A la_data_out_mprj[81] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input209_A la_iena_mprj[54] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2126_A wire2126/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_1911 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_51_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_16_3655 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_770 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__573__B _573_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_965 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_203_ _203_/X _203_/B _203_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_12_987 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_134_ _134_/Y _134_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_32_1554 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_49_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_3276 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_065_ _065_/Y _065_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_49_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_4474 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3751 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_48_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3615 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_151 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_685 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3795 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_4101 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_4281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_1_3411 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_4156 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1369 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_3973 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2260 vccd vssd wire2260/X wire2260/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2271 vccd vssd _451_/B wire2272/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2282 vccd vssd _444_/B wire2282/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2293 vccd vssd _308_/A wire2293/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1059_A wire1060/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1570 vccd vssd wire1570/X wire1571/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_39_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1581 vccd vssd wire1581/X wire1581/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__467__C _467_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_1093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1592 vccd vssd _307_/B wire1593/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_0_1018 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_4445 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1226_A _430_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output797_A wire1155/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_4309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__483__B _483_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_3045 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_wb_dat_gates\[22\] _136_/A mprj_dat_i_user[22] split5/A vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_33_1318 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_2453 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1621 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1595_A wire1596/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1665 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1762_A wire1763/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2825 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3333 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__004__A _004_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_2137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3283 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2435 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xuser_to_mprj_in_gates\[120\] wire1142/A _283_/X la_data_out_core[120] vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_1 XFILLER_29_317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_2468 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3633 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__377__C _377_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_4501 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_361 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3920 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_331 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_2297 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_865 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_1229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_876 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__393__B _393_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3552 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_795 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_283 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_917 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_3596 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3637 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2076_A wire2077/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_4421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input159_A la_iena_mprj[124] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_3979 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_1801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_637 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__568__B _568_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_1981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_47_125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2243_A wire2243/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3692 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_1_2017 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input326_A la_oenb_mprj[44] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_1380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1845 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_2197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_1233 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_169 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_1305 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1316 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_1889 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3165 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4142 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__584__A _584_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_3430 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_4066 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2317 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3474 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_1140 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2620 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2615 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_1059 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_51_1985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_117_ _117_/A _117_/Y vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_4 XFILLER_29_3857 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_048_ _048_/Y _048_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_4_961 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4124 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4365 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output545_A wire1228/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2457 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_4168 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1176_A _521_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_23_3434 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_1100 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_1122 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_3697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output712_A _077_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__478__B _478_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1343_A wire1344/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3781 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1199 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2090 vccd vssd _584_/B wire2091/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_26_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[57\] _040_/A la_data_out_core[57] _220_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_2 XFILLER_36_3817 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1510_A wire1510/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_1505 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1608_A wire1609/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_35_854 vssd vccd vssd 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XFILLER_34_4061 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3669 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_2269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_2512 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_2545 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_3721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__390__C _390_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_1855 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3225 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_728 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 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XANTENNA_wire2039_A wire2039/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_451_ _579_/A _451_/X _451_/C _451_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_26_662 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2401 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1499 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_19_3878 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_150 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_4292 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_481 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3400 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2445 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_382_ _510_/A _382_/X _382_/C _382_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_15_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2206_A wire2207/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_1880 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_1110 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_2309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2489 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_327 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_4470 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input393_A mprj_adr_o_core[14] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_349 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__581__B _581_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input87_A la_data_out_mprj[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_1007 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1089 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_4539 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_2001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4263 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3601 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4116 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3792 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3634 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4138 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_772 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__102__A _102_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_49_721 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_1283 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_23_1125 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput150 _279_/B la_iena_mprj[116] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_49_765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput161 vccd vssd _289_/B la_iena_mprj[126] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_48_253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput172 vccd vssd _183_/B la_iena_mprj[20] vssd vccd sky130_fd_sc_hd__buf_4 Xinput183 _193_/B la_iena_mprj[30] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XANTENNA_output508_A wire1269/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_37_3901 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput194 _203_/B la_iena_mprj[40] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_18_3300 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1041_A wire1042/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_4056 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_37_3945 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3213 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_3235 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_3809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__475__C _475_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_3355 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4201 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_429 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_4381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3388 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1306_A _366_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output877_A wire1423/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_1877 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__491__B _491_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_2253 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_3017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_4224 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2286 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1675_A wire1676/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_3512 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput602 _157_/Y la_data_in_mprj[10] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_4268 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput613 _158_/Y la_data_in_mprj[11] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput624 _161_/Y la_data_in_mprj[14] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_29_3473 vssd vccd vssd vccd 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XFILLER_20_3960 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3108 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_949 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_19_2407 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_39_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__385__C _385_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_14_4432 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3731 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_4476 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_153 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_197 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1641 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_1051 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4436 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3871 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2354 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2293 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_1631 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_24_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_3161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2387 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_1581 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1900 vccd vssd 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sky130_fd_sc_hd__diode_2 XFILLER_26_481 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_434_ _562_/A _434_/X _434_/C _434_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_32_4565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_1227 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_2253 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__592__A _592_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_1238 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_2729 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_365_ vccd vssd _365_/A _365_/X _365_/B vssd vccd sky130_fd_sc_hd__and2_2 XFILLER_9_113 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_4005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3252 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_2297 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_296_ _296_/X _296_/B _296_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_1449 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_831 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_4347 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_897 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_1301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_2057 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2912 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_48_1957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_4121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1089_A wire1090/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[40\]_B _203_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_2213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1439 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_2393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3212 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1256_A _406_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_27_1080 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_49_573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_1005 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_2605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_1589 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__486__B _486_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_2566 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_37_757 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1423_A _312_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_705 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_727 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_37_3753 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_3043 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3196 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2353 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_3904 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_2949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_3341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3948 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4032 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1961 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_3134 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xuser_to_mprj_in_gates\[1\] _148_/A _164_/X la_data_out_core[1] vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_1 Xoutput465 wire1214/X la_data_in_core[101] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_5_3217 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_user_to_mprj_in_gates\[31\]_B _194_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput476 _480_/X la_data_in_core[111] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA__444__A_N _572_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput487 _490_/X la_data_in_core[121] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_2663 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput498 wire1278/X la_data_in_core[16] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_25_3189 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1951 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1207 vccd vssd wire1207/X _477_/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1218 vccd vssd wire1218/X _464_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_27 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1229 vccd vssd wire1229/X wire1230/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1033 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_746 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__396__B _396_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[98\]_B _261_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_24_941 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_4104 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_36_2573 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_613 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_2437 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1703 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_150_ _150_/A _150_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_11_657 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_1260 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1173 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_081_ _081_/A _081_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_10_189 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input189_A la_iena_mprj[36] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2273_A wire2274/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input356_A la_oenb_mprj[71] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3808 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_4305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_43_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_377 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_8_2162 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2026 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3626 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__587__A _587_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_8_1472 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_3565 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1730 vccd vssd _614_/A wire1730/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2903 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1741 vccd vssd _483_/C input20/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_3659 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1752 vccd vssd _450_/C wire1752/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1763 vccd vssd wire1763/X wire1763/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1774 vccd vssd _384_/B wire1775/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1785 vccd vssd wire1785/X wire1785/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1796 vccd vssd _302_/A wire1797/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4184 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_93 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_289 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[89\]_B wire1470/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_19_3472 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1625 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 X_417_ _545_/A _417_/X _417_/C _417_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_53_81 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_3661 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_41_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_348_ _348_/X _348_/B _348_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1004_A wire1005/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output575_A _455_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_13_3093 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_1213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_4409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_1393 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_279_ _279_/X _279_/B _279_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_48_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__467__A_N _595_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output742_A _617_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1721 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1373_A wire1374/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[87\] wire1128/A la_data_out_core[87] wire1472/X vssd vccd + vssd vccd sky130_fd_sc_hd__nand2_4 XFILLER_9_1258 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1540_A wire1541/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_39_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_3250 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1638_A wire1639/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__497__A _497_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_42_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2560 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_0_2424 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1805_A wire1805/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_4137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire993_A wire994/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_568 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_15_4560 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2713 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4424 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_2893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_933 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_18_2281 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2757 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3892 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_432 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_53_2194 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_46_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3756 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_465 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_3193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_498 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_22_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2539 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3025 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_2471 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3069 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_2717 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1004 vccd vssd wire1004/X wire1005/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1015 vccd vssd wire1015/X _135_/Y vssd vccd sky130_fd_sc_hd__buf_6 Xwire1026 vccd vssd wire1026/X wire1027/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1037 vccd vssd wire1037/X wire1038/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1048 vccd vssd wire1048/X wire1049/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1059 vccd vssd wire1059/X wire1060/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__200__A _200_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_1667 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3325 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_3369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4237 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_3612 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1923 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire2021_A wire2022/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input104_A la_data_out_mprj[75] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2119_A wire2120/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_2813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2381 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1989 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_202_ _202_/X _202_/B _202_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_23_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_2857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_133_ _133_/Y _133_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_10_3255 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_10_2543 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_4431 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 X_064_ _064_/A _064_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_32_1588 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_3329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_1853 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_1017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_163 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_2_174 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_4293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_1409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3581 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire2250 vccd vssd _459_/B wire2250/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2261 vccd vssd _310_/A wire2261/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2272 vccd vssd wire2272/X wire2272/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2283 vccd vssd _443_/B wire2283/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2722 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_21_2650 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2294 vccd vssd _434_/B wire2294/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_3467 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1560 vccd vssd _312_/B wire1561/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1571 vccd vssd wire1571/X wire1571/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1582 vccd vssd _336_/B wire1583/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1593 vccd vssd wire1593/X wire1594/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_557 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3280 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_output692_A _059_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1219_A _463_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_2009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__483__C _483_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_15_2443 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_15_2465 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_50_1633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1021 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_wb_dat_gates\[15\] mprj_dat_i_user[15] load_slew1458/X _129_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XANTENNA_wire1588_A wire1589/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1054 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_31_1065 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_970 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_981 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3301 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1755_A wire1755/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1011 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_2149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_9_1022 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_3295 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_2644 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3389 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_329 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_42_1161 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1976 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[113\] la_data_out_core[113] _276_/X _096_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_2_1829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_53_822 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_3509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_373 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_4081 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_52_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_17_3932 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_1597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__393__C _393_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_3889 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_2521 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_763 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_295 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_3004 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_44_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_2303 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_1729 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_5_2121 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire2069_A wire2069/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_22_3660 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_1813 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_3765 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_4408 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input221_A la_iena_mprj[65] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_1857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2236_A wire2236/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input319_A la_oenb_mprj[38] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3133 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_4012 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_833 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_38_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_4154 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__584__B _584_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_4078 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_51_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2627 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4537 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_116_ _116_/Y _116_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_51_1997 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__105__A _105_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_047_ _047_/Y _047_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_10_1672 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_973 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_4136 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3571 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_461 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_3665 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output538_A wire1240/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1071_A wire1072/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1169_A _536_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_1217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__478__C _478_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_40_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output705_A _071_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire2080 vccd vssd _591_/B wire2081/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2091 vccd vssd wire2091/X wire2091/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1336_A _358_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_2480 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1390 vccd vssd wire1390/X _340_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_36_3829 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_4221 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_321 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__494__B _494_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[119\]_B _282_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_4265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1503_A wire1504/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_825 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_516 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_4129 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_869 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2841 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_1105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_2885 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3851 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_2727 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_30_2738 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_30_582 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_50_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__015__A _015_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_2601 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_28_3357 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_409 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_2093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_6_3131 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_41_2801 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[28\]_A mprj_dat_i_user[28] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2452 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_6_3197 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_29_137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_693 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_3317 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2073 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_39_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1005 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_888 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_3664 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3675 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XFILLER_46_3221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_2829 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_4231 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_2013 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_24_4275 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_2597 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_1301 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_24_3563 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2901 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_2057 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_1345 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_221 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput140 _270_/B la_iena_mprj[107] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput151 _280_/B la_iena_mprj[117] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_23_1137 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_49_777 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput162 vccd vssd _290_/B la_iena_mprj[127] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_37_928 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput173 vccd vssd _184_/B la_iena_mprj[21] vssd vccd sky130_fd_sc_hd__buf_4 XFILLER_48_265 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput184 _194_/B la_iena_mprj[31] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_23_1159 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput195 _204_/B la_iena_mprj[41] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_37_3913 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_3312 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2691 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_641 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3957 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1034_A wire1035/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_2622 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_18_3367 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_4213 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3209 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_35_4393 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_1509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_173 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_3269 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_53_2535 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_38_2081 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_579_ _579_/X _579_/B _579_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_4257 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_2688 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1201_A _496_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_output772_A _529_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XPHY_190 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA__491__C _491_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_4236 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_4006 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_3441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1570_A wire1571/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3917 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput603 _093_/Y la_data_in_mprj[110] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_3524 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput614 _103_/Y la_data_in_mprj[120] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1668_A wire1669/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_25_4039 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput625 _162_/Y la_data_in_mprj[15] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput636 _008_/Y la_data_in_mprj[25] vssd vccd vssd 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sky130_fd_sc_hd__decap_6 XFILLER_12_4190 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_3077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_309 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_1339 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_1653 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_3541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_3585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2311 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_537 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_4404 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__203__A _203_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3933 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2737 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_4448 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2366 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_25_3883 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2208 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_5_3977 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1901 vccd vssd _264_/A wire1902/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_3173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2399 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1912 vccd vssd _258_/A wire1912/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1923 vccd vssd _243_/A wire1923/A vssd vccd sky130_fd_sc_hd__buf_4 Xwire1934 vccd vssd _333_/A wire1934/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1945 vccd vssd _192_/A wire1945/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input134_A la_iena_mprj[101] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2051_A wire2051/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1956 vccd vssd _183_/A wire1957/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire2149_A wire2150/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xwire1967 vccd vssd _177_/A wire1967/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_416 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1978 vccd vssd wire1978/X wire1978/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1989 vccd vssd wire1989/X wire1989/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA_201 _340_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 X_502_ _502_/X _502_/B _502_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_27_961 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_212 _564_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input301_A la_oenb_mprj[21] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_223 _167_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_234 _563_/B vssd vccd vccd vssd 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sky130_fd_sc_hd__decap_4 XFILLER_9_4044 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1952_A wire1952/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_44_3725 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_4088 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_1413 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__023__A _023_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput466 wire1213/X la_data_in_core[102] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput477 _481_/X la_data_in_core[112] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1457 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_5_3229 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_2423 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xoutput488 wire1206/X la_data_in_core[122] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput499 wire1277/X la_data_in_core[17] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_9_2675 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_2517 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_25_2467 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_3493 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_1805 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 Xwire1208 vccd vssd wire1208/X _476_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_41_1001 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1219 vccd vssd wire1219/X _463_/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_9_1985 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_47_39 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_4492 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_2241 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_1045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_725 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_3841 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_20_3780 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__396__C _396_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_1089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_769 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_791 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_953 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2541 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_14_4274 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_32_2405 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_4116 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_2585 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_2449 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_4337 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_3595 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_1163 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_629 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_080_ _080_/A _080_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_49_2913 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_97 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2099_A wire2100/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_2501 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_2681 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_input251_A la_iena_mprj[92] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_3730 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input349_A la_oenb_mprj[65] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2266_A wire2267/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_43_2545 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_21_4256 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_1210 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_43_2589 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2038 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_3796 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1720 vccd vssd _528_/A _400_/A_N vssd vccd sky130_fd_sc_hd__buf_6 Xwire1731 vccd vssd _613_/A wire1731/A vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__587__B _587_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_1_3649 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_21_3577 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire1742 vccd vssd _482_/C input19/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3588 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1753 vccd vssd _449_/C wire1753/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_24_1265 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_2291 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_1107 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1764 vccd vssd _388_/B wire1765/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_46_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1775 vccd vssd wire1775/X wire1775/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire1786 vccd vssd _378_/B wire1787/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_37_3017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_1_2959 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1797 vccd vssd wire1797/X wire1797/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_34_3905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4196 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_33_205 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_15_3304 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3484 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_33_249 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_3949 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_4341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_416_ _416_/A_N _416_/X _416_/C _416_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_50_2505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1659 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_2073 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__108__A _108_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_2549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_293 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_347_ _347_/X _347_/B _347_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 X_278_ _278_/X _278_/B _278_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_1225 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output470_A wire1209/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_13_2371 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_10_3960 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output568_A wire1287/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_3709 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_3157 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_26_4123 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1199_A _498_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_5_161 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output735_A _611_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_48_1733 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_1121 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_4481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1777 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1366_A _348_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_38_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output902_A wire974/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_4_3262 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4517 vssd vccd vssd vccd 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sky130_ef_sc_hd__decap_12 XFILLER_26_1305 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__598__A _598_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_186 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_43_2353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_809 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2240 vccd vssd _467_/B wire2241/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_4169 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2251 vccd vssd _458_/B wire2251/A vssd vccd sky130_fd_sc_hd__buf_6 Xwire2262 vccd vssd _454_/B wire2263/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_40_3997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xwire2273 vccd vssd _450_/B wire2274/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3374 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire2284 vccd vssd _442_/B wire2284/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2712 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_1292 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1550 vccd vssd wire1550/X wire1551/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_21_3385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2295 vccd vssd _433_/B wire2295/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_5_2892 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1561 vccd vssd wire1561/X wire1562/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire1572 vccd vssd _309_/B wire1573/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire1583 vccd vssd wire1583/X wire1584/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_1_2756 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1009 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 Xwire1594 vccd vssd wire1594/X wire1595/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_47_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_1_2778 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_37_2113 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_3893 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_1401 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_569 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1114_A wire1115/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__434__A_N _562_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_30_2909 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_32_3481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2308 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_11_2319 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1645 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_output852_A wire1410/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_31_1033 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_4229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1689 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_31_1077 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_1541 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1650_A wire1651/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1748_A wire1748/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_3357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_9_1034 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__301__A _301_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_2667 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_2595 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4325 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1933 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_1955 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1173 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_4369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_0_2200 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xuser_to_mprj_in_gates\[106\] la_data_out_core[106] wire1462/X _089_/A vssd vccd vssd + vccd sky130_fd_sc_hd__nand2_8 XFILLER_37_385 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_29 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_17_3944 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_4200 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3808 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_15_4380 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2533 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_3581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_33_2577 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_2017 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_14_1286 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_44_4053 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_27_3049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2315 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_4097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_2409 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_4340 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_27_2359 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_2673 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__211__A _211_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_5_2166 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_820 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_47_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3101 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_18_41 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_40_1869 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_38_3145 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input214_A la_iena_mprj[59] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_85 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2131_A wire2131/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_16_525 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA__457__A_N _585_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire2229_A wire2229/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_4024 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_44_845 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_3009 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_3189 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_16_3410 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_4166 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_4057 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_517 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_38_1765 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3307 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_580 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_1153 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_51_2633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_51_1921 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4505 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_2639 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_7_245 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_1353 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4549 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3241 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_115_ _115_/Y _115_/A vssd vccd vssd vccd sky130_fd_sc_hd__clkinv_8 XFILLER_45_3105 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_10_2352 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_1397 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_3285 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_046_ _046_/Y _046_/A vccd vssd vssd vccd sky130_fd_sc_hd__clkinv_2 XFILLER_45_3149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1861 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_4148 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_3583 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_3_473 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_2702 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_7_2965 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_1135 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_27_2893 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_3761 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_617 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_1229 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_1157 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1064_A wire1065/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_3160 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2070 vccd vssd _297_/A wire2071/X vssd vccd sky130_fd_sc_hd__buf_6 Xwire2081 vccd vssd wire2081/X wire2081/A vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_36_4509 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xwire2092 vccd vssd _583_/B wire2093/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_43_1493 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1380 vccd vssd wire1380/X wire1381/X vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_35_812 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xwire1391 vccd vssd wire1391/X wire1392/X vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_wire1231_A _426_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_2492 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1329_A wire1330/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_52_3109 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_867 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__494__C _494_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_333 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_1885 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_4277 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_377 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_837 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4520 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_528 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_34_2853 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_4564 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_12_3830 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_33_1117 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_2897 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1865_A wire1866/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_50_1497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_4237 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2657 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_6_3143 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1945 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_26_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_41_2813 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_6_3176 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_3007 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_45_2993 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[28\]_B split5/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA__031__A _031_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_28_1989 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_2857 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_105 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1605 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_149 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_609 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_3465 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_2_1649 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_26_845 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_52_4333 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_3329 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_193 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_4355 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_3621 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_1017 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_20_1290 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_52_4377 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_0_1373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_3752 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_35_1905 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_539 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_13_3649 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_1326 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3941 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_21_561 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_2997 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_30_3985 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3373 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XANTENNA__206__A _206_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1673 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_11_3384 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_14_1061 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_3425 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1113 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_46_3469 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_53 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_49_1157 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2081_A wire2081/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input164_A la_iena_mprj[13] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_20_97 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_7_2217 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2179_A wire2180/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_0_421 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_3828 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_1909 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_wb_dat_gates\[19\]_B load_slew1458/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput300 _517_/A la_oenb_mprj[20] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_1_977 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput311 vccd vssd wire1721/A la_oenb_mprj[30] vssd vccd sky130_fd_sc_hd__buf_6 Xinput322 vccd vssd _409_/A_N la_oenb_mprj[40] vssd vccd sky130_fd_sc_hd__buf_6 Xinput333 vccd vssd _547_/A la_oenb_mprj[50] vssd vccd sky130_fd_sc_hd__buf_4 XANTENNA_input331_A la_oenb_mprj[49] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput344 _557_/A la_oenb_mprj[60] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_29_51 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_input429_A mprj_dat_o_core[17] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_2_3552 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput355 vccd vssd wire1702/A la_oenb_mprj[70] vssd vccd sky130_fd_sc_hd__buf_6 XFILLER_2_4297 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput366 vccd vssd wire1692/A la_oenb_mprj[80] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA_input25_A la_data_out_mprj[119] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xinput377 _587_/A la_oenb_mprj[90] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_48_469 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_40_1633 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2840 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput388 vccd vssd wire1679/A mprj_adr_o_core[0] vssd vccd sky130_fd_sc_hd__buf_6 Xinput399 vccd vssd wire1644/A mprj_adr_o_core[1] vssd vccd sky130_fd_sc_hd__buf_6 XANTENNA__595__B _595_/B vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_21_1043 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_1677 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_2895 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_333 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 X_595_ _595_/X _595_/B _595_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XFILLER_31_4417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_34_2149 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_12_550 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_16_2583 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_881 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_29_4313 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA__116__A _116_/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_12_2458 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_8_576 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_32_1172 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_4 la_data_out_core[5] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput807 _561_/X la_oenb_core[64] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput818 _571_/X la_oenb_core[74] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_49_3093 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output550_A _432_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_user_to_mprj_in_gates\[70\]_A la_data_out_core[70] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput829 _581_/X la_oenb_core[84] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_6_77 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_29_3689 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 X_029_ _029_/A _029_/Y vccd vssd vssd vccd sky130_fd_sc_hd__inv_2 XFILLER_29_2955 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_42_4557 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_wire1181_A _516_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_wire1279_A _384_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_7_3441 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_4_793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_7_4197 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_3_281 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_3_3305 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__489__C _489_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_2109 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output815_A _568_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_45_2289 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_3266 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_20_3 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_23_3277 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1446_A wire1447/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_6_1037 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xuser_to_mprj_in_gates\[62\] _045_/A la_data_out_core[62] _225_/X vssd vccd vssd vccd + sky130_fd_sc_hd__nand2_4 XFILLER_23_2587 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_48_981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1613_A wire1614/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_36_3605 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_19_160 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_19_193 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_34_4041 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_36_3649 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_1337 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_837 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_53_3963 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_34_4085 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_34_174 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_697 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_52_1504 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_52_1515 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA_wire1982_A wire1983/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_34_2661 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_369 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_50_1261 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_1223 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_47_3745 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_28_3133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_41_4001 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_43_3609 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_3216 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_11_1267 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_user_to_mprj_in_gates\[61\]_A la_data_out_core[61] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_47_3789 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_4181 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2421 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_3177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_46_1308 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_4045 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_28_2465 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_8_2548 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XANTENNA__399__C _399_/C vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_41_4089 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_44_1032 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_3_4573 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_28_1786 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2114 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_2_2136 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_41_1953 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_45_417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1341 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_4548 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_22_1385 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_19_3836 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_39_3273 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_1457 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_35_3137 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_26_686 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_380_ _508_/A _380_/X _380_/C _380_/B vssd vccd vssd vccd sky130_fd_sc_hd__and3b_4 XFILLER_13_4158 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_40_133 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_39_1893 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_13_3446 vccd vssd vssd vccd sky130_fd_sc_hd__decap_8 XFILLER_40_177 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_30_3793 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_input281_A la_oenb_mprj[119] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_33_1481 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_3192 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire2296_A wire2296/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XANTENNA_input379_A la_oenb_mprj[92] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_11_2491 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XANTENNA_user_to_mprj_in_gates\[52\]_A la_data_out_core[52] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_46_3277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_24_3531 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_8_3772 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_4287 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_42_2429 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_24_3575 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_20_3417 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_4_2913 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_7_2069 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_0_262 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_1_785 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_4_3669 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xinput130 _468_/C la_data_out_mprj[99] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_2_4072 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_23_1116 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput141 _271_/B la_iena_mprj[108] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_7_1357 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_48_233 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput152 _281_/B la_iena_mprj[118] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput163 _175_/B la_iena_mprj[12] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 Xinput174 _185_/B la_iena_mprj[22] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_40_1441 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xinput185 _195_/B la_iena_mprj[32] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_48_277 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_2_3393 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 Xinput196 _205_/B la_iena_mprj[42] vssd vccd vssd vccd sky130_fd_sc_hd__clkbuf_4 XFILLER_36_417 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_40_1485 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3324 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XFILLER_17_653 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_37_3969 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_35_4361 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_16_141 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_32_601 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_18_3379 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_31_4225 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 X_578_ _578_/X _578_/B _578_/A vssd vccd vssd vccd sky130_fd_sc_hd__and2_4 XANTENNA_wire1027_A wire1028/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_53_1802 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_38_2093 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_32_645 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output598_A _089_/Y vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_18_2667 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_31_4269 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_35_2981 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XPHY_180 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XPHY_191 vccd vssd vssd vccd sky130_fd_sc_hd__decap_3 XANTENNA_output765_A wire1174/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_51_1581 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_wire1396_A _337_/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_9_4248 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 XFILLER_25_4018 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XANTENNA_output932_A wire1311/X vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 Xoutput604 _094_/Y la_data_in_mprj[111] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_user_to_mprj_in_gates\[43\]_A la_data_out_core[43] vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3453 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput615 _104_/Y la_data_in_mprj[121] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_44_3929 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_4321 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput626 _163_/Y la_data_in_mprj[16] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_47_1617 vccd vssd vssd vccd sky130_fd_sc_hd__decap_6 Xoutput637 _009_/Y la_data_in_mprj[26] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 Xoutput648 _019_/Y la_data_in_mprj[36] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XANTENNA_wire1563_A wire1563/A vssd vccd vccd vssd sky130_fd_sc_hd__diode_2 XFILLER_29_3497 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 Xoutput659 _029_/Y la_data_in_mprj[46] vssd vccd vssd vccd sky130_fd_sc_hd__buf_8 XFILLER_42_4365 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2053 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_25_2627 vssd vccd vssd vccd sky130_fd_sc_hd__decap_4 XFILLER_28_1049 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_42_2941 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 XFILLER_45_2097 vssd vccd vssd vccd sky130_ef_sc_hd__decap_12 .ends .subckt sky130_fd_sc_hd__dfstp_4 Q D VPWR SET_B CLK VGND VNB VPB X0 a_1178_261# a_1028_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X1 VGND a_652_21# a_586_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VPWR a_1028_413# a_1598_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X3 a_1178_261# a_1028_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=540000u l=150000u X4 VGND a_1598_47# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_956_413# a_476_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 a_1136_413# a_193_47# a_1028_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR a_1598_47# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR a_476_47# a_652_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_586_47# a_193_47# a_476_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X10 VGND a_1598_47# Q VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR CLK a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X12 Q a_1598_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_476_47# a_27_47# a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=360000u l=150000u X14 a_1056_47# a_476_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 a_381_47# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=840000u l=150000u X16 a_652_21# SET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X17 a_1224_47# a_27_47# a_1028_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X18 a_562_413# a_27_47# a_476_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X19 a_1028_413# a_193_47# a_1056_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X20 a_476_47# a_193_47# a_381_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X21 Q a_1598_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_1296_47# a_1178_261# a_1224_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X23 VGND a_1028_413# a_1598_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X24 a_193_47# a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X25 VPWR a_652_21# a_562_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X26 VPWR a_1598_47# Q VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VGND SET_B a_1296_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X28 Q a_1598_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 a_1028_413# a_27_47# a_956_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X30 VPWR a_1178_261# a_1136_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X31 a_193_47# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X32 Q a_1598_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 a_796_47# SET_B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X34 a_381_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X35 Q a_1598_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X36 Q a_1598_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X37 a_652_21# a_476_47# a_796_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X38 VPWR SET_B a_1028_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X39 VGND CLK a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__a211o_1 VGND VPWR X A2 B1 A1 C1 VNB VPB X0 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_80_21# C1 a_472_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A2 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND B1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_300_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_217_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_80_21# A1 a_300_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_472_297# B1 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_80_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o211a_1 C1 B1 A2 A1 X VGND VPWR VNB VPB X0 VGND A1 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_510_47# B1 a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_79_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_79_21# A2 a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_297_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_79_21# C1 a_510_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_215_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o221a_1 A2 X B1 C1 A1 B2 VGND VPWR VNB VPB X0 a_240_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_51_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A1 a_240_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_51_297# B2 a_245_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_149_47# C1 a_51_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_240_47# B1 a_149_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A1 a_512_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_51_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_149_47# B2 a_240_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_245_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR C1 a_51_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_512_297# A2 a_51_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a221o_1 X B1 A1 B2 A2 VGND VPWR C1 VNB VPB X0 a_465_47# A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_109_297# B1 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_205_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR A2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_193_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# B1 a_205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_109_297# C1 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VGND C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A2 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o2111a_1 X D1 C1 B1 A2 A1 VPWR VGND VNB VPB X0 a_676_297# A2 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_512_47# B1 a_409_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_306_47# D1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_512_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR C1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_79_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR A1 a_676_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_512_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_409_47# C1 a_306_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_79_21# D1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a22o_1 A1 A2 X B2 B1 VPWR VGND VNB VPB X0 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_27_297# B1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND A2 a_373_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 X a_27_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_373_47# A1 a_27_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 X a_27_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_109_297# B2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_109_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nand4_1 C B Y D A VPWR VGND VNB VPB X0 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_193_47# C a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y A a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_277_47# B a_193_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and3_1 VGND VPWR X B A C VNB VPB X0 VPWR A a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR C a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_181_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VGND C a_181_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_27_47# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o2bb2a_1 A1_N X A2_N B2 B1 VPWR VGND VNB VPB X0 a_206_369# A1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_206_369# A2_N a_205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VGND B2 a_489_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_585_369# B2 a_76_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_489_47# a_206_369# a_76_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 a_489_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR A2_N a_206_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_76_199# a_206_369# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_205_47# A1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VPWR a_76_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR B1 a_585_369# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND a_76_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nor2_4 Y A B VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nor2_8 Y A B VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_297# B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 Y B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X27 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X31 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__and4_1 X C A B D VGND VPWR VNB VPB X0 a_27_47# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_197_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_303_47# C a_197_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR D a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND D a_303_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__and3_4 A B C X VGND VPWR VNB VPB X0 VPWR A a_94_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_294_47# B a_185_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_185_47# A a_94_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_94_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND C a_294_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_94_47# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_94_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_94_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR C a_94_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_94_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND a_94_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_94_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND a_94_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_94_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__and4b_1 VGND VPWR C A_N X D B VNB VPB X0 a_297_47# a_27_47# a_193_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_369_47# B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 VPWR D a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_193_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND D a_469_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_193_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR B a_193_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_193_413# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_193_413# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_469_47# C a_369_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__a221o_2 X B1 A1 B2 A2 VGND VPWR C1 VNB VPB X0 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_465_47# A1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_109_297# B1 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_205_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_193_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_27_47# B1 a_205_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_109_297# C1 a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A2 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and2b_1 X A_N B VGND VPWR VNB VPB X0 VPWR B a_207_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 X a_207_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_297_47# a_27_413# a_207_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 X a_207_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_207_413# a_27_413# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR A_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VGND B a_297_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_27_413# A_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__o31a_4 X B1 A3 A2 A1 VGND VPWR VNB VPB X0 VPWR A1 a_926_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A1 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_926_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A3 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_102_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_926_297# A2 a_672_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_102_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_496_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 X a_102_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_102_21# B1 a_496_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_102_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_102_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_102_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_102_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_672_297# A3 a_102_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_496_47# B1 a_102_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_102_21# A3 a_672_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND a_102_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_102_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_496_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR B1 a_102_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_496_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_672_297# A2 a_926_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a32o_1 X A3 B2 B1 A1 A2 VGND VPWR VNB VPB X0 a_93_21# A1 a_346_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_93_21# B1 a_250_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_584_47# B1 a_93_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_93_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND B2 a_584_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_256_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_250_297# B2 a_93_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND a_93_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_250_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A2 a_250_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_250_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_346_47# A2 a_256_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and4bb_1 VGND VPWR A_N D X C B_N VNB VPB X0 VPWR D a_343_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_223_47# B_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_515_93# a_223_47# a_429_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 a_223_47# B_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 X a_343_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_429_93# a_27_47# a_343_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VGND D a_615_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 a_343_93# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 a_343_93# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_615_93# C a_515_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 X a_343_93# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR a_223_47# a_343_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__a41o_1 VGND VPWR A3 A4 A2 X B1 A1 VNB VPB X0 a_465_47# A2 a_381_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A4 a_561_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A3 a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_297_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_297_297# A4 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A1 a_297_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_381_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_297_297# B1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_79_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_561_47# A3 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a2111o_1 VGND VPWR B1 X D1 A1 A2 C1 VNB VPB X0 VGND A2 a_660_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND C1 a_85_193# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_414_297# C1 a_334_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_85_193# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_334_297# D1 a_85_193# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_516_297# B1 a_414_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_516_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_660_47# A1 a_85_193# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_85_193# D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR A1 a_516_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_85_193# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR a_85_193# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a2111oi_1 B1 D1 C1 Y A2 A1 VPWR VGND VNB VPB X0 a_316_297# C1 a_217_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_420_297# B1 a_316_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR A1 a_420_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A2 a_568_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_420_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_217_297# D1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_568_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o41a_1 A1 A2 A3 A4 B1 X VGND VPWR VNB VPB X0 VGND A4 a_321_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_321_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_103_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR a_103_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND a_103_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VGND A2 a_321_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_321_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_511_297# A3 a_393_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_619_297# A2 a_511_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_321_47# B1 a_103_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_393_297# A4 a_103_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR A1 a_619_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__mux2_8 S A1 VPWR VGND A0 X VNB VPB X0 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_79_21# A0 a_792_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_1259_199# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_1302_47# A0 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X8 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_792_297# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_1259_199# S VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND a_1259_199# a_1302_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X14 a_79_21# A1 a_792_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X15 a_79_21# A0 a_1302_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X16 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR S a_792_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_792_297# A0 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_1302_47# a_1259_199# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X23 VPWR a_1259_199# a_1302_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_1302_297# a_1259_199# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_792_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X27 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_1302_297# A1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND S a_792_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u X30 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_79_21# A1 a_1302_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X32 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X33 a_792_47# S VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=640000u l=150000u .ends .subckt sky130_fd_sc_hd__a311o_1 A1 A2 X B1 C1 A3 VGND VPWR VNB VPB X0 a_75_199# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_208_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_315_47# A2 a_208_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND B1 a_75_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_75_199# A1 a_315_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_75_199# C1 a_544_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_544_297# B1 a_201_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_75_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_201_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VPWR A2 a_201_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_201_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND a_75_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o32a_1 X A3 A1 A2 B1 B2 VPWR VGND VNB VPB X0 a_77_199# B2 a_227_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_323_297# A2 a_227_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_227_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_227_47# B1 a_77_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_77_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B1 a_539_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_227_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR a_77_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_77_199# A3 a_323_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_227_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_227_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_539_297# B2 a_77_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nor4_4 A C Y D B VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_807_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y D a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_807_297# C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND D Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VGND D Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_807_297# C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_449_297# C a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_449_297# C a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_807_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 Y D a_807_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nand3_4 Y A B C VGND VPWR VNB VPB X0 a_27_47# B a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# B a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_445_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_445_47# A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_445_47# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_445_47# B a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND C a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nand2b_4 B A_N Y VGND VPWR VNB VPB X0 VGND B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_215_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_215_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a21boi_1 Y A1 B1_N A2 VPWR VGND VNB VPB X0 a_300_297# a_27_413# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND A2 a_384_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR B1_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 Y a_27_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_300_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_384_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND B1_N a_27_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_300_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__o21a_4 A1 A2 B1 X VPWR VGND VNB VPB X0 X a_80_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_475_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_80_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_762_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_475_47# B1 a_80_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A2 a_475_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND a_80_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_80_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_80_21# A2 a_762_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_80_21# B1 a_475_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_80_21# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_475_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 X a_80_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A1 a_934_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_934_297# A2 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 VPWR B1 a_80_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VPWR a_80_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND A1 a_475_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a31oi_1 VGND VPWR Y B1 A2 A1 A3 VNB VPB X0 Y A1 a_181_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_181_47# A2 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_109_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__nand4b_1 Y C D A_N B VGND VPWR VNB VPB X0 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_232_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VPWR A_N a_41_93# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VPWR a_41_93# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_316_47# C a_232_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 Y a_41_93# a_423_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_423_47# B a_316_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A_N a_41_93# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nand3b_4 A_N Y B C VGND VPWR VNB VPB X0 VGND C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 a_633_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_633_47# C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 VGND C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o21ba_1 B1_N A1 X A2 VGND VPWR VNB VPB X0 a_222_93# B1_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 VPWR A1 a_544_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VGND a_79_199# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_222_93# B1_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A2 a_448_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_448_47# a_222_93# a_79_199# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_79_199# a_222_93# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_544_297# A2 a_79_199# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_448_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VPWR a_79_199# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nor4_2 C D Y A B VGND VPWR VNB VPB X0 a_281_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_475_297# D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y D a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VGND D Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_475_297# C a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_281_297# C a_475_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_297# B a_281_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o311a_1 X A1 A2 A3 B1 C1 VGND VPWR VNB VPB X0 a_585_47# B1 a_266_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND A2 a_266_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR a_81_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_81_21# C1 a_585_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND a_81_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_266_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_368_297# A2 a_266_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_266_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_266_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_81_21# A3 a_368_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_81_21# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR B1 a_81_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a2111o_2 D1 A1 B1 C1 X A2 VGND VPWR VNB VPB X0 VPWR a_86_235# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND C1 a_86_235# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 X a_86_235# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_86_235# D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 X a_86_235# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_715_47# A1 a_86_235# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND A2 a_715_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_499_297# C1 a_427_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND a_86_235# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_86_235# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 a_607_297# B1 a_499_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_427_297# D1 a_86_235# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A1 a_607_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_607_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nand4b_4 D C B Y A_N VGND VPWR VNB VPB X0 a_991_47# C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_991_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_991_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 Y a_27_47# a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_633_47# B a_215_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND D a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VGND D a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 Y C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_215_47# B a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 VPWR D Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 a_633_47# C a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 a_633_47# C a_991_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR a_27_47# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 Y D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 VPWR C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X28 a_215_47# a_27_47# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X29 Y a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X30 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 a_991_47# C a_633_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X32 VPWR B Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X33 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a311oi_2 C1 A3 Y B1 A1 A2 VGND VPWR VNB VPB X0 Y A1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_641_297# B1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 VPWR A1 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_109_297# B1 a_641_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_109_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_277_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 a_109_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A3 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_27_47# A2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VPWR A2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_641_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 a_277_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 Y C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_109_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 Y C1 a_641_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__xor2_1 B X A VPWR VGND VNB VPB X0 X a_35_297# a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X B a_285_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_35_297# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 a_117_297# B a_35_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR B a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VGND A a_35_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VGND a_35_297# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 a_285_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A a_117_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 a_285_47# A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__o221a_4 C1 A1 A2 B1 B2 X VGND VPWR VNB VPB X0 a_27_47# B1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_109_47# A2 a_717_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_717_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 VGND A2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_277_297# B2 a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_109_47# B2 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_277_297# B1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_277_47# A1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_277_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 X a_109_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VPWR C1 a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_27_47# C1 a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_27_47# B2 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A1 a_277_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VGND a_109_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_277_47# B1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_277_47# B2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 VPWR a_109_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VPWR B1 a_277_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 X a_109_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR A1 a_717_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 a_109_47# C1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 a_717_297# A2 a_109_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_109_47# C1 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a211o_4 VGND VPWR C1 B1 X A2 A1 VNB VPB X0 X a_79_204# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VPWR A1 a_473_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_473_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_79_204# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND C1 a_79_204# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_79_204# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 VPWR a_79_204# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_473_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_473_297# B1 a_727_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 X a_79_204# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND B1 a_79_204# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_79_204# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND a_79_204# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_1123_47# A1 a_79_204# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_555_297# B1 a_473_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VPWR A2 a_473_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VGND A2 a_1123_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_951_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 VPWR a_79_204# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X19 VGND a_79_204# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_79_204# A1 a_951_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_79_204# C1 a_555_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_727_297# C1 a_79_204# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X23 X a_79_204# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a21bo_1 X A1 B1_N A2 VGND VPWR VNB VPB X0 a_298_297# a_27_413# a_215_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_215_297# a_27_413# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_298_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 X a_215_297# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR B1_N a_27_413# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 X a_215_297# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_382_47# A1 a_215_297# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B1_N a_27_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR A1 a_298_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A2 a_382_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a221o_4 A1 B1 C1 B2 X A2 VPWR VGND VNB VPB X0 VGND A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND B2 a_1053_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_804_297# B1 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_79_21# A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_445_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_804_297# C1 a_79_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_445_297# B1 a_804_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_1053_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_79_21# C1 a_804_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_1053_47# B1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 a_445_47# A1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 VGND C1 a_79_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VPWR a_79_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_79_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 a_804_297# B2 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_79_21# B1 a_1053_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_79_21# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_445_297# B2 a_804_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_445_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_445_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X24 VPWR A2 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X25 VPWR A1 a_445_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 X a_79_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 X a_79_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and4b_4 X D C B A_N VGND VPWR VNB VPB X0 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_815_47# B a_701_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 VPWR C a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_174_21# a_27_47# a_815_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X6 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 a_701_47# C a_617_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_174_21# D VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_174_21# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VPWR a_27_47# a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 a_617_47# D VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__nor3b_1 C_N Y A B VGND VPWR VNB VPB X0 VGND a_91_199# Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A a_245_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_91_199# C_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_245_297# B a_161_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_91_199# C_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_161_297# a_91_199# Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__nor3_4 A C B Y VGND VPWR VNB VPB X0 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_449_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 Y C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_449_297# C Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y C a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 VPWR A a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 Y B VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X17 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 Y C VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_27_297# B a_449_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VGND B Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X21 a_449_297# B a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 VGND C Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_27_297# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a21oi_4 B1 A2 A1 Y VGND VPWR VNB VPB X0 a_28_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 a_462_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 Y B1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 a_462_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_28_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_462_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y B1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 Y A1 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 a_28_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A2 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 VGND A2 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 a_28_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X16 VPWR A1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_28_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 VGND A2 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 VPWR A2 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 a_28_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y A1 a_462_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 a_462_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 VPWR A1 a_28_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a21o_4 A2 A1 X B1 VGND VPWR VNB VPB X0 VGND B1 a_84_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_741_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_84_21# A1 a_741_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND A2 a_901_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR a_84_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_483_297# B1 a_84_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 X a_84_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 a_84_21# B1 a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND a_84_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR a_84_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_483_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X12 VPWR A1 a_483_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 VGND a_84_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X14 X a_84_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 a_84_21# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_483_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 X a_84_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_901_47# A1 a_84_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 X a_84_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u .ends .subckt sky130_fd_sc_hd__a31oi_4 Y B1 A1 A3 A2 VPWR VGND VNB VPB X0 a_27_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_27_47# A2 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_27_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X7 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 VPWR A1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_27_297# B1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 a_445_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X13 Y B1 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_445_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X15 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_27_297# A3 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X18 a_27_47# A3 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 Y A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X20 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 Y A1 a_445_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X22 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 Y B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 a_445_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X26 VPWR A2 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_445_47# A2 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X28 a_27_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X29 VGND B1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X30 VPWR A3 a_27_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X31 VGND A3 a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and4_2 X C A B D VGND VPWR VNB VPB X0 VGND a_27_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 VGND D a_304_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 X a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_198_47# B a_109_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X4 a_27_47# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X5 VPWR a_27_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 a_304_47# C a_198_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 a_27_47# A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X8 VPWR D a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 X a_27_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VPWR B a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_109_47# A a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt sky130_fd_sc_hd__a2111o_4 C1 B1 A1 A2 X D1 VGND VPWR VNB VPB X0 a_30_297# C1 a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 VGND C1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X2 a_44_47# B1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VGND a_44_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VPWR A1 a_477_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR a_44_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 X a_44_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VGND B1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 X a_44_47# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X9 a_477_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X10 a_285_297# B1 a_477_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X11 VGND D1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X12 a_770_47# A2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 X a_44_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X14 a_30_297# D1 a_44_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X15 VGND A2 a_770_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X16 a_44_47# D1 a_30_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X17 a_477_297# B1 a_285_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X18 a_770_47# A1 a_44_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X19 a_477_297# A2 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X20 VPWR a_44_47# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X21 a_285_297# C1 a_30_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X22 a_44_47# D1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X23 a_44_47# A1 a_770_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X24 VGND a_44_47# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X25 VPWR A2 a_477_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X26 X a_44_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X27 a_44_47# C1 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__inv_6 Y A VPWR VGND VNB VPB X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X1 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X3 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 Y A VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 Y A VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X10 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X11 VGND A Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__a221oi_1 Y C1 A1 A2 B2 B1 VGND VPWR VNB VPB X0 a_465_47# A1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X1 a_109_297# B1 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X2 a_193_297# B2 a_109_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X3 a_204_47# B2 VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X4 VGND A2 a_465_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X5 a_193_297# A1 VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X6 Y B1 a_204_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X7 VPWR A2 a_193_297# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X8 a_109_297# C1 Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X9 VGND C1 Y VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u .ends .subckt sky130_fd_sc_hd__and4bb_2 VGND VPWR A_N C B_N X D VNB VPB X0 a_174_21# C VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X1 a_174_21# a_27_47# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X2 a_476_47# a_27_47# a_174_21# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X3 VPWR a_174_21# X VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X4 X a_174_21# VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u X5 a_548_47# a_505_280# a_476_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X6 VPWR A_N a_27_47# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X7 X a_174_21# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X8 VPWR D a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X9 VGND D a_639_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X10 VPWR a_505_280# a_174_21# VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X11 a_505_280# B_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X12 VGND a_174_21# X VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=650000u l=150000u X13 a_505_280# B_N VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X14 a_639_47# C a_548_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u X15 VGND A_N a_27_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u .ends .subckt housekeeping VPWR debug_in debug_mode debug_oeb debug_out irq[0] irq[1] irq[2] + mask_rev_in[0] mask_rev_in[10] mask_rev_in[11] mask_rev_in[12] mask_rev_in[13] mask_rev_in[14] + mask_rev_in[15] mask_rev_in[16] mask_rev_in[17] mask_rev_in[18] mask_rev_in[19] + mask_rev_in[1] mask_rev_in[20] mask_rev_in[21] mask_rev_in[22] mask_rev_in[23] mask_rev_in[24] + mask_rev_in[25] mask_rev_in[26] mask_rev_in[27] mask_rev_in[28] mask_rev_in[29] + mask_rev_in[2] mask_rev_in[30] mask_rev_in[31] mask_rev_in[3] mask_rev_in[4] mask_rev_in[5] + mask_rev_in[6] mask_rev_in[7] mask_rev_in[8] mask_rev_in[9] mgmt_gpio_in[0] mgmt_gpio_in[10] + mgmt_gpio_in[11] mgmt_gpio_in[12] mgmt_gpio_in[13] mgmt_gpio_in[14] mgmt_gpio_in[15] + mgmt_gpio_in[16] mgmt_gpio_in[17] mgmt_gpio_in[18] mgmt_gpio_in[19] mgmt_gpio_in[1] + mgmt_gpio_in[20] mgmt_gpio_in[21] mgmt_gpio_in[22] mgmt_gpio_in[23] mgmt_gpio_in[24] + mgmt_gpio_in[25] mgmt_gpio_in[26] mgmt_gpio_in[27] mgmt_gpio_in[28] mgmt_gpio_in[29] + mgmt_gpio_in[2] mgmt_gpio_in[30] mgmt_gpio_in[31] mgmt_gpio_in[32] mgmt_gpio_in[33] + mgmt_gpio_in[34] mgmt_gpio_in[35] mgmt_gpio_in[36] mgmt_gpio_in[37] mgmt_gpio_in[3] + mgmt_gpio_in[4] mgmt_gpio_in[5] mgmt_gpio_in[6] mgmt_gpio_in[7] mgmt_gpio_in[8] + mgmt_gpio_in[9] mgmt_gpio_oeb[0] mgmt_gpio_oeb[10] mgmt_gpio_oeb[11] mgmt_gpio_oeb[12] + mgmt_gpio_oeb[13] mgmt_gpio_oeb[14] mgmt_gpio_oeb[15] mgmt_gpio_oeb[16] mgmt_gpio_oeb[17] + mgmt_gpio_oeb[18] mgmt_gpio_oeb[19] mgmt_gpio_oeb[1] mgmt_gpio_oeb[20] mgmt_gpio_oeb[21] + mgmt_gpio_oeb[22] mgmt_gpio_oeb[23] mgmt_gpio_oeb[24] mgmt_gpio_oeb[25] mgmt_gpio_oeb[26] + mgmt_gpio_oeb[27] mgmt_gpio_oeb[28] mgmt_gpio_oeb[29] mgmt_gpio_oeb[2] mgmt_gpio_oeb[30] + mgmt_gpio_oeb[31] mgmt_gpio_oeb[32] mgmt_gpio_oeb[33] mgmt_gpio_oeb[34] mgmt_gpio_oeb[35] + mgmt_gpio_oeb[36] mgmt_gpio_oeb[37] mgmt_gpio_oeb[3] mgmt_gpio_oeb[4] mgmt_gpio_oeb[5] + mgmt_gpio_oeb[6] mgmt_gpio_oeb[7] mgmt_gpio_oeb[8] mgmt_gpio_oeb[9] mgmt_gpio_out[0] + mgmt_gpio_out[10] mgmt_gpio_out[11] mgmt_gpio_out[12] mgmt_gpio_out[13] mgmt_gpio_out[14] + mgmt_gpio_out[15] mgmt_gpio_out[16] mgmt_gpio_out[17] mgmt_gpio_out[18] mgmt_gpio_out[19] + mgmt_gpio_out[1] mgmt_gpio_out[20] mgmt_gpio_out[21] mgmt_gpio_out[22] mgmt_gpio_out[23] + mgmt_gpio_out[24] mgmt_gpio_out[25] mgmt_gpio_out[26] mgmt_gpio_out[27] mgmt_gpio_out[28] + mgmt_gpio_out[29] mgmt_gpio_out[2] mgmt_gpio_out[30] mgmt_gpio_out[31] mgmt_gpio_out[32] + mgmt_gpio_out[33] mgmt_gpio_out[34] mgmt_gpio_out[35] mgmt_gpio_out[36] mgmt_gpio_out[37] + mgmt_gpio_out[3] mgmt_gpio_out[4] mgmt_gpio_out[5] mgmt_gpio_out[6] mgmt_gpio_out[7] + mgmt_gpio_out[8] mgmt_gpio_out[9] pad_flash_clk pad_flash_clk_oeb pad_flash_csb + pad_flash_csb_oeb pad_flash_io0_di pad_flash_io0_do pad_flash_io0_ieb pad_flash_io0_oeb + pad_flash_io1_di pad_flash_io1_do pad_flash_io1_ieb pad_flash_io1_oeb pll90_sel[0] + pll90_sel[1] pll90_sel[2] pll_bypass pll_dco_ena pll_div[0] pll_div[1] pll_div[2] + pll_div[3] pll_div[4] pll_ena pll_sel[0] pll_sel[1] pll_sel[2] pll_trim[0] pll_trim[10] + pll_trim[11] pll_trim[12] pll_trim[13] pll_trim[14] pll_trim[15] pll_trim[16] pll_trim[17] + pll_trim[18] pll_trim[19] pll_trim[1] pll_trim[20] pll_trim[21] pll_trim[22] pll_trim[23] + pll_trim[24] pll_trim[25] pll_trim[2] pll_trim[3] pll_trim[4] pll_trim[5] pll_trim[6] + pll_trim[7] pll_trim[8] pll_trim[9] porb pwr_ctrl_out[0] pwr_ctrl_out[1] pwr_ctrl_out[2] + pwr_ctrl_out[3] qspi_enabled reset ser_rx ser_tx serial_clock serial_data_1 serial_data_2 + serial_load serial_resetn spi_csb spi_enabled spi_sck spi_sdi spi_sdo spi_sdoenb + spimemio_flash_clk spimemio_flash_csb spimemio_flash_io0_di spimemio_flash_io0_do + spimemio_flash_io0_oeb spimemio_flash_io1_di spimemio_flash_io1_do spimemio_flash_io1_oeb + spimemio_flash_io2_di spimemio_flash_io2_do spimemio_flash_io2_oeb spimemio_flash_io3_di + spimemio_flash_io3_do spimemio_flash_io3_oeb trap uart_enabled user_clock usr1_vcc_pwrgood + usr1_vdd_pwrgood usr2_vcc_pwrgood usr2_vdd_pwrgood wb_ack_o wb_adr_i[0] wb_adr_i[10] + wb_adr_i[11] wb_adr_i[12] wb_adr_i[13] wb_adr_i[14] wb_adr_i[15] wb_adr_i[16] wb_adr_i[17] + wb_adr_i[18] wb_adr_i[19] wb_adr_i[1] wb_adr_i[20] wb_adr_i[21] wb_adr_i[22] wb_adr_i[23] + wb_adr_i[24] wb_adr_i[25] wb_adr_i[26] wb_adr_i[27] wb_adr_i[28] wb_adr_i[29] wb_adr_i[2] + wb_adr_i[30] wb_adr_i[31] wb_adr_i[3] wb_adr_i[4] wb_adr_i[5] wb_adr_i[6] wb_adr_i[7] + wb_adr_i[8] wb_adr_i[9] wb_clk_i wb_cyc_i wb_dat_i[0] wb_dat_i[10] wb_dat_i[11] + wb_dat_i[12] wb_dat_i[13] wb_dat_i[14] wb_dat_i[15] wb_dat_i[16] wb_dat_i[17] wb_dat_i[18] + wb_dat_i[19] wb_dat_i[1] wb_dat_i[20] wb_dat_i[21] wb_dat_i[22] wb_dat_i[23] wb_dat_i[24] + wb_dat_i[25] wb_dat_i[26] wb_dat_i[27] wb_dat_i[28] wb_dat_i[29] wb_dat_i[2] wb_dat_i[30] + wb_dat_i[31] wb_dat_i[3] wb_dat_i[4] wb_dat_i[5] wb_dat_i[6] wb_dat_i[7] wb_dat_i[8] + wb_dat_i[9] wb_dat_o[0] wb_dat_o[10] wb_dat_o[11] wb_dat_o[12] wb_dat_o[13] wb_dat_o[14] + wb_dat_o[15] wb_dat_o[16] wb_dat_o[17] wb_dat_o[18] wb_dat_o[19] wb_dat_o[1] wb_dat_o[20] + wb_dat_o[21] wb_dat_o[22] wb_dat_o[23] wb_dat_o[24] wb_dat_o[25] wb_dat_o[26] wb_dat_o[27] + wb_dat_o[28] wb_dat_o[29] wb_dat_o[2] wb_dat_o[30] wb_dat_o[31] wb_dat_o[3] wb_dat_o[4] + wb_dat_o[5] wb_dat_o[6] wb_dat_o[7] wb_dat_o[8] wb_dat_o[9] wb_rstn_i wb_sel_i[0] + wb_sel_i[1] wb_sel_i[2] wb_sel_i[3] wb_stb_i wb_we_i VGND XFILLER_39_211 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_350 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_586 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_545 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6914_ _6914_/Q _6914_/D VPWR fanout478/X _7081_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_82_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6845_ _6845_/Q fanout474/X _6845_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_52_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6776_ _7195_/A fanout483/X _6776_/D _6777_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_168_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3988_ VGND VPWR _3989_/S hold99/X hold151/X _3988_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5727_ VGND VPWR _5727_/X _5814_/B1 _5724_/X _6909_/Q _5726_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_148_352 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5658_ _5664_/A _5658_/X _5666_/B _5658_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_191_653 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4609_ _4753_/B _4609_/Y _4607_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 XFILLER_190_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_151_517 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5589_ _7097_/Q _5979_/A _7098_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 Xhold340 _4055_/X _6491_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_720 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold351 _6463_/Q hold351/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold362 _4236_/X _6628_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold373 _6718_/Q hold373/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold384 _4108_/X _6523_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold395 _7196_/A hold395/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_199 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1040 _4061_/X _6494_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1051 hold1577/X _5172_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1062 _5383_/X _6938_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1073 _6611_/Q _4211_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1084 _5485_/X _7029_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1095 _6516_/Q _4099_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_202 _5652_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_26_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_601 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_159_628 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_689 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_173_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_8 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_230 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_23 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_1_593 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_383 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4960_ _4775_/B _5018_/A _4959_/Y _4947_/C _5088_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_64_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_206 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3911_ _7158_/Q _3911_/B1 _3164_/Y _3868_/S _3911_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_17_494 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4891_ _4947_/C _5029_/B _4902_/B _4878_/C _4810_/A _4490_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_177_403 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6630_ _6630_/Q fanout454/X _6630_/D _6632_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3842_ _3866_/S _3851_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_20_615 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6561_ _6561_/Q fanout452/X _6561_/D _6653_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3773_ _3773_/C _3794_/A _3773_/A _3773_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_192_406 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_503 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_514 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5512_ VGND VPWR _5513_/S hold99/X hold145/X _5512_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6492_ _7183_/A fanout484/X hold90/X _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_173_642 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_118_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5443_ VGND VPWR _5444_/S _5548_/A1 hold928/X _5443_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_172_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5374_ VGND VPWR _5381_/S _5524_/A1 _5374_/A0 _5374_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7113_ _7113_/Q fanout459/X _7113_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4325_ VGND VPWR _4327_/S _5544_/A1 hold431/X _4325_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7044_ _7044_/Q fanout482/X hold78/X _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4256_ VPWR VGND _4256_/A _4261_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_74_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3207_ _6917_/Q _3207_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4187_ _6638_/Q _6307_/B _4195_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_95_681 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_534 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_103_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_103_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_82_375 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_51_762 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6828_ _6828_/Q fanout475/X _6828_/D _6908_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6759_ _6759_/Q fanout459/X _6759_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_148_182 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold170 _7174_/A hold170/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold181 _5297_/X _6862_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold192 _6559_/Q hold192/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_120_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_93_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_501 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_46_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_159_403 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_745 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_406 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_127_311 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_325 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4110_ VGND VPWR hold38/X _5473_/A1 _4110_/A0 _4110_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5090_ _4672_/B _4542_/B _5090_/Y _4496_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_96_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4041_ VGND VPWR _4043_/S _6355_/A1 hold968/X _4041_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_578 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5992_ _5992_/X _5960_/X _6818_/Q _7071_/Q _5953_/X VGND VPWR _5991_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4943_ _4944_/C _5071_/A _4941_/X _4995_/B _4619_/Y _4673_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_178_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4874_ _4947_/B _4875_/C _4652_/Y _4873_/X _4542_/A _4694_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_6613_ _6613_/Q fanout454/X _6613_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3825_ _3826_/D _5229_/A _6874_/Q _6802_/Q _5310_/A VGND VPWR _3824_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_20_434 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_177_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_428 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6544_ _6544_/Q _6544_/D VPWR fanout445/X _6709_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3756_ _7064_/Q _5523_/A _3756_/X _6681_/Q _4286_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_9_490 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_3_5_0_csclk clkbuf_3_5_0_csclk/X clkbuf_3_5_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 X_6475_ _6475_/Q fanout445/X _6475_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3687_ VGND VPWR _3688_/C _4262_/A _3684_/X _6662_/Q _3686_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_118_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_314 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5426_ VGND VPWR _5426_/S _5513_/A1 hold700/X _5426_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput220 _7183_/X mgmt_gpio_out[18] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput231 _7193_/X mgmt_gpio_out[28] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput242 _7175_/X mgmt_gpio_out[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput253 _3948_/Y pad_flash_io0_oeb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput264 _6739_/Q pll_div[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5357_ VGND VPWR _5363_/S _5465_/A1 hold305/X _5357_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput275 _6431_/Q pll_trim[13] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput286 _6425_/Q pll_trim[23] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput297 _6751_/Q pwr_ctrl_out[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4308_ VGND VPWR _4309_/S _6356_/A1 hold748/X _4308_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_294 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5288_ VGND VPWR _5291_/S _5528_/A1 hold459/X _5288_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7027_ _7027_/Q _7027_/D VPWR fanout477/X _7085_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_59_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4239_ VGND VPWR _4243_/S _6353_/A1 _4239_/A0 _4239_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_28_545 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_718 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_375 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_526 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_250 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xwire347 VGND VPWR _3447_/B _3437_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_139_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_149_491 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xwire358 VGND VPWR _3410_/A _3392_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_136_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_152_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_176 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout480 VPWR VGND fanout480/X fanout485/X VGND VPWR sky130_fd_sc_hd__buf_4 XFILLER_93_437 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_397 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_64_71 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_531 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_44 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3610_ _3611_/D _4102_/A _6909_/Q input64/X _5346_/A VGND VPWR _3609_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4590_ VPWR VGND _4747_/A _4664_/B _4591_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3541_ _3552_/A _5319_/A _6854_/Q _6886_/Q _5283_/A VGND VPWR _3540_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold906 _6976_/Q hold906/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold917 _5296_/X _6861_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_6_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold928 _6992_/Q hold928/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold939 _5530_/X _7069_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6260_ _6633_/Q _5946_/X _6260_/X _6553_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_50_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3472_ _3472_/C _3485_/A _3472_/A _3472_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_143_656 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5211_ hold18/A hold17/X _5211_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_88_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6191_ _6191_/X _5948_/X _6650_/Q _6695_/Q _5973_/A VGND VPWR _6190_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_130_317 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5142_ _5142_/C _5142_/B _5142_/Y _5142_/D _5142_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 XFILLER_96_220 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5073_ VGND VPWR _5074_/C _5073_/B _5073_/A _5073_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_57_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4024_ VGND VPWR _4025_/S _5494_/A1 hold351/X _4024_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_65_662 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5975_ _5975_/D _5975_/C _5975_/Y _5975_/A _5975_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_4926_ _5068_/C _4926_/B _4992_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_100_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_52_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_20_220 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4857_ _4496_/Y _4878_/C _4856_/Y _4810_/A _4887_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_193_523 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3808_ _6938_/Q _5382_/A _3808_/X _6695_/Q _4304_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_20_264 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_176_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4788_ _5106_/A _4689_/A _4658_/C _4616_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_119_642 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6527_ _6527_/Q fanout484/X _6527_/D _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_181_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3739_ _3742_/C _5148_/A input15/X _6738_/Q _3381_/Y VGND VPWR _3738_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_180_206 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_228 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_420 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_67 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6458_ _6458_/Q fanout448/X _6458_/D _6747_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5409_ _5417_/S hold17/X _5409_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_133_177 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6389_ VPWR VGND _6389_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_48_607 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_618 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_18_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_28_397 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_70_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_34_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_235 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_453 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_152_464 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_518 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_94_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_117 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_172 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_492 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_22_518 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5760_ _6991_/Q _5627_/X _5760_/X _6831_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_34_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4711_ _4711_/X _4701_/Y _4627_/A _4710_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_148_715 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5691_ _5681_/Y _5691_/X _5690_/Y _5652_/Y _6787_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 XFILLER_187_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4642_ _4644_/B _4642_/A _4673_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_163_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_206 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_116_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4573_ _5041_/B _4724_/A _4965_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold703 _5289_/X _6855_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold714 _6824_/Q hold714/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6312_ VGND VPWR _6315_/S _6312_/A1 _6312_/A0 _7137_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3524_ _4202_/A _3562_/A _3546_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold725 _4296_/X _6688_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold736 _6568_/Q hold736/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold747 _5255_/X _6825_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold758 _6543_/Q hold758/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold769 _6356_/X _7154_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6243_ _6243_/X _5960_/X _6562_/Q _6672_/Q _5953_/X VGND VPWR _6242_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3455_ _4102_/A _3455_/A _3577_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_131_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_220 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6174_ _6175_/D _5976_/D _7062_/Q _6881_/Q _5954_/X VGND VPWR _6156_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3386_ _7017_/Q _5463_/A _3386_/X _7009_/Q _3370_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_97_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5125_ _4823_/X _5124_/X _4946_/X _4413_/Y _5126_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_85_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1403 _6798_/Q _5225_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_111_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1414 _6572_/Q hold1414/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_584 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1425 _6583_/Q hold1425/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1436 _7138_/Q _6313_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_437 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1447 _6595_/Q _4192_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5056_ _5058_/D _5142_/A _5089_/B _5089_/C _5056_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1458 _6729_/Q _3702_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1469 _6573_/Q _4167_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4007_ VGND VPWR _4007_/S _5540_/A1 hold744/X _4007_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_38_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_1_0_1_wb_clk_i clkbuf_2_1_0_wb_clk_i/A clkbuf_1_0_1_wb_clk_i/A VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_111_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_698 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5958_ _5968_/A _5981_/A _5979_/C _5958_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_52_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4909_ _4909_/Y _5051_/B _4969_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5889_ _5896_/A _5646_/X _6458_/Q _6653_/Q _5645_/X VGND VPWR _5888_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_193_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_119_483 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_2_2_0_csclk clkbuf_3_5_0_csclk/A clkbuf_2_3_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XFILLER_136_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_20_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold30 hold30/A hold30/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold41 hold53/X hold54/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold52 hold52/A hold52/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold63 hold63/A hold63/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold74 hold74/A hold74/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold85 hold85/A hold85/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold96 hold96/A hold96/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_289 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_323 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_676 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_31_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_176_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_340 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_351 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_362 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_373 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_5 _5310_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_137_291 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_486 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_98_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3240_ _3867_/B _6415_/Q _3264_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_140_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3171_ _6487_/Q _3837_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_13_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6930_ _6930_/Q _6930_/D VPWR fanout457/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_66_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6861_ _6861_/Q fanout474/X _6861_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 Xclkbuf_leaf_6_csclk _7036_/CLK clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5812_ _7001_/Q _5643_/X _5812_/X _6929_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_6792_ _6792_/Q fanout461/X _6792_/D _7054_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_34_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5743_ _6902_/Q _5621_/X _5743_/X _6886_/Q _5658_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_188_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_148_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5674_ _5681_/A _5928_/A2 _6963_/Q _6835_/Q _5642_/X VGND VPWR _5673_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_148_578 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4625_ _4625_/B _4969_/B _4625_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_163_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold500 _4260_/X _6658_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_128_280 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold511 _6807_/Q hold511/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4556_ VGND VPWR _4557_/A _4562_/A _4556_/A _4972_/A VGND VPWR sky130_fd_sc_hd__and3_1 Xhold522 _5434_/X _6984_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold533 _6479_/Q hold533/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3507_ _3571_/B _4292_/A _3573_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xhold544 _5525_/X _7064_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold555 _6539_/Q hold555/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_173_19 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_190_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold566 _7155_/Q hold566/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4487_ _4993_/A _4582_/B _4561_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold577 _5408_/X _6961_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold588 _7027_/Q hold588/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6226_ VGND VPWR _6226_/C _6221_/X _6226_/X _6226_/D _6226_/B VGND VPWR sky130_fd_sc_hd__and4b_1 Xhold599 _5509_/X _7050_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3438_ _7069_/Q _5523_/A _3438_/X _6896_/Q _5328_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_103_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6157_ _6929_/Q _5938_/X _6157_/X _6961_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1200 _5410_/X _6962_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3369_ _5463_/A _3373_/B hold75/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_58_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1211 _7010_/Q _5464_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_66_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1222 _5437_/X _6986_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5108_ VGND VPWR _5135_/B _5108_/B _5108_/A _5108_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1233 _7079_/Q _5542_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1244 _4257_/X _6655_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6088_ _6089_/C _5975_/C _6982_/Q _6838_/Q _5945_/X VGND VPWR _6087_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1255 _6645_/Q _4245_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1266 _4215_/X _6614_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1277 _6742_/Q _5155_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5039_ _5122_/A _5039_/C _5039_/A _5039_/B _5039_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_45_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1288 _4009_/X _6450_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1299 _6737_/Q _5149_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_82_49 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_53_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_21 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_618 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_512 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_139 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_178_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_147_31 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_42 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput120 VGND VPWR _3900_/C wb_adr_i[29] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput131 VGND VPWR _3899_/C wb_cyc_i VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput142 VGND VPWR _6333_/A2 wb_dat_i[19] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput153 VGND VPWR _6338_/A2 wb_dat_i[29] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput164 input164/X wb_rstn_i VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 XFILLER_48_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_248 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_624 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_117 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_32_679 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_181 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_192 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4410_ _4948_/A _4498_/A _4459_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_5390_ VGND VPWR _5390_/S _5513_/A1 hold658/X _5390_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4341_ _4753_/A _4607_/A _4690_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_98_112 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7060_ _7060_/Q fanout482/X hold88/X _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4272_ VGND VPWR _4273_/S _5494_/A1 hold355/X _4272_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6011_ _6014_/B _5965_/X _6971_/Q _6795_/Q _5947_/X VGND VPWR _6010_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_100_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3223_ _6543_/Q _3223_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_140_275 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_381 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_598 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6913_ _6913_/Q fanout475/X _6913_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6844_ _6844_/Q fanout475/X _6844_/D _6884_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_22_112 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6775_ hold91/A fanout483/X hold92/X _6777_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3987_ VGND VPWR _3989_/S _5469_/A1 hold630/X _3987_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5726_ _5726_/X _5648_/X _6901_/Q _6853_/Q _5621_/X VGND VPWR _5725_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5657_ VGND VPWR _5657_/B _5657_/X _5664_/A _5660_/C VGND VPWR sky130_fd_sc_hd__and3b_2 XFILLER_175_194 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4608_ _4608_/X _4607_/A _4753_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 XFILLER_163_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5588_ VGND VPWR _5594_/A _7098_/Q _6508_/Q _7097_/Q VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_163_356 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold330 _5336_/X _6897_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold341 _6785_/Q hold341/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4539_ _4552_/A _4959_/B _4591_/A _4549_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 XFILLER_190_175 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold352 _4024_/X _6463_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_190_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold363 _6948_/Q hold363/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_123 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold374 _4332_/X _6718_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold385 _6996_/Q hold385/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold396 _5201_/X _6777_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6209_ _6225_/A _5949_/X _6556_/Q _6676_/Q _5971_/B VGND VPWR _6208_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7189_ VGND VPWR _7189_/X _7189_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_58_510 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_133_33 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1030 _4028_/X _6466_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1041 _6780_/Q _5205_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_133_66 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_362 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1052 _5172_/X _6755_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1063 _6893_/Q _5332_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_684 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1074 _4211_/X _6611_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1085 _7021_/Q _5476_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1096 _4099_/X _6516_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_203 _5667_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_26_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_96 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_366 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_49_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_190_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_71_csclk _6926_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_64_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3910_ _6635_/D _3910_/B _3910_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_4890_ _4496_/Y _4895_/B _4892_/B _4697_/Y _4542_/A _4381_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_32_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3841_ _3866_/S _3860_/B _3840_/X _3867_/B _3837_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_4 XFILLER_32_487 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6560_ _6560_/Q fanout452/X _6560_/D _6653_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3772_ VGND VPWR _3773_/C _4127_/A _3769_/X _6540_/Q _3771_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_5511_ VGND VPWR _5513_/S _5538_/A1 hold403/X _5511_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6491_ _7182_/A fanout484/X _6491_/D _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_118_526 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_157_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5442_ VGND VPWR _5444_/S _5538_/A1 hold379/X _5442_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_173_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5373_ _5381_/S hold17/X _5373_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_114_721 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7112_ _7112_/Q fanout459/X _7112_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4324_ VGND VPWR _4327_/S _5534_/A1 hold265/X _4324_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_264 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7043_ _7043_/Q fanout478/X _7043_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4255_ VGND VPWR _4255_/S hold60/X _4255_/A0 _4255_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3206_ _6925_/Q _3206_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4186_ VGND VPWR _4186_/S _4186_/A1 _3410_/Y _6590_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_39_csclk _6969_/CLK _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xclkbuf_3_1_0_csclk clkbuf_3_1_0_csclk/X clkbuf_3_1_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XFILLER_82_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_546 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_82_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_82_387 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_590 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6827_ _6827_/Q _6827_/D VPWR fanout475/X _6884_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_51_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_50_262 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6758_ _6758_/Q fanout460/X _6758_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_183_418 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_11 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5709_ _6948_/Q _5637_/X _5709_/X _6804_/Q _5660_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_149_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6689_ _6689_/Q fanout448/X _6689_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_12_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_151_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold160 _6863_/Q hold160/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold171 _4074_/X _6500_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold182 _7043_/Q hold182/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_616 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold193 _4150_/X _6559_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_120_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_144_43 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_513 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_61_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_323 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_175 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_68_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_111_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4040_ VGND VPWR _4043_/S _6354_/A1 hold796/X _4040_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_49_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5991_ _5991_/X _5947_/X _7010_/Q _6970_/Q _5940_/X VGND VPWR _5990_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_91_151 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4942_ VGND VPWR _5071_/A _4942_/B _4942_/A _4942_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_178_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_177_201 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4873_ _4496_/Y _4873_/X _4700_/Y _4872_/X _4542_/A _4627_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_178_757 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6612_ _6612_/Q _6383_/A _6612_/D _6671_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3824_ _3824_/X _5190_/B _6670_/Q _4274_/A _6768_/Q _5190_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 X_6543_ _6543_/Q _6543_/D VPWR fanout445/X _6735_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3755_ _3760_/B _4220_/A _6427_/Q _6620_/Q _3981_/A VGND VPWR _3754_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_118_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6474_ _6474_/Q _3946_/B _6474_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3686_ _3686_/X _5211_/A _6996_/Q _6788_/Q _5445_/A VGND VPWR _3685_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_145_142 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput210 _3216_/Y mgmt_gpio_oeb[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5425_ VGND VPWR _5426_/S _5548_/A1 hold906/X _5425_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput221 _7184_/X mgmt_gpio_out[19] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_133_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xoutput232 _7194_/X mgmt_gpio_out[29] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput243 _7176_/X mgmt_gpio_out[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput254 _7198_/X pad_flash_io1_do VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5356_ VGND VPWR _5363_/S hold667/X _5356_/A0 _5356_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput265 _6740_/Q pll_div[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput276 _6432_/Q pll_trim[14] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_167 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_102_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput287 _6748_/Q pll_trim[24] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput298 _6752_/Q pwr_ctrl_out[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4307_ VGND VPWR _4309_/S _6355_/A1 hold956/X _4307_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_370 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_201 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5287_ VGND VPWR _5291_/S _5509_/A1 hold912/X _5287_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_59_148 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7026_ _7026_/Q _7026_/D VPWR fanout465/X _7026_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_4238_ VPWR VGND _4238_/A _4243_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_87_479 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4169_ VGND VPWR _4171_/S _4169_/A1 _3486_/Y _6575_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_730 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_571 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire348 VGND VPWR _3827_/D _3826_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_136_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_136_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_136_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_155_75 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_554 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout470 _6390_/A fanout470/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout481 fanout485/X fanout481/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_48_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_96 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3540_ _6918_/Q _5355_/A _3540_/X _7155_/Q _6352_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_128_665 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold907 _5425_/X _6976_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold918 _6880_/Q hold918/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_6_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold929 _5443_/X _6992_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3471_ _3472_/C _5274_/A _6943_/Q _6847_/Q _5382_/A VGND VPWR _3457_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_115_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5210_ VGND VPWR _5210_/S _5540_/A1 hold341/X _5210_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_143_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6190_ _6645_/Q _5976_/C _6190_/X _6565_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_43_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5141_ _5140_/X _5058_/C _4946_/X _4542_/A _5142_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_142_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_96_232 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5072_ _5088_/C _4650_/Y _4741_/A _4565_/X _5073_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_96_265 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4023_ VGND VPWR _4025_/S _6355_/A1 _4023_/A0 _4023_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_64_151 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5974_ VGND VPWR _5946_/X _5974_/D _5977_/A _5974_/C _5970_/X VGND VPWR sky130_fd_sc_hd__and4bb_1 X_4925_ VGND VPWR _5103_/A _4925_/B _5088_/A _5114_/A VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_40_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_178_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4856_ _4856_/Y _4911_/B _4856_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_3807_ _3807_/D _3807_/C _3827_/B _3807_/A _3807_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_4787_ _4714_/X _4644_/Y _4782_/Y _4791_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_119_654 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6526_ _6526_/Q fanout484/X hold7/X _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_193_579 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3738_ _6651_/Q _4250_/A _3738_/X _6546_/Q _4133_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_109_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6457_ _6457_/Q _6457_/D VPWR fanout447/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_173_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_118_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3669_ _3670_/D _4172_/A _6940_/Q _6580_/Q _5382_/A VGND VPWR _3668_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5408_ VGND VPWR _5408_/S _5513_/A1 hold576/X _5408_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6388_ VPWR VGND _6388_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_133_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_121_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5339_ VGND VPWR _5345_/S _5543_/A1 hold618/X _5339_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_125_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_89 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7009_ _7009_/Q fanout461/X _7009_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_18_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_75_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_33 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_83_471 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_302 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_549 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_722 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_226 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_737 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_131 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_440 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_124_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_81_408 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_508 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4710_ _4710_/Y _4969_/B _4710_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5690_ _5690_/D _5690_/C _5690_/Y _5690_/A _5690_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_187_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4641_ _4673_/B _4739_/A _4661_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_147_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4572_ _4947_/B _4574_/B _4672_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_175_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_116_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold704 _6839_/Q hold704/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6311_ VGND VPWR _6315_/S _6311_/A1 _3640_/Y _7136_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold715 _5254_/X _6824_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3523_ _3523_/D _3523_/C _3582_/B _3523_/A _3523_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 Xhold726 _6999_/Q hold726/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_155_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold737 _4161_/X _6568_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_115_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold748 _6698_/Q hold748/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_763 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold759 _4131_/X _6543_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6242_ _6242_/X _5948_/X _6652_/Q _6697_/Q _5973_/A VGND VPWR _6241_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3454_ _3454_/A _3454_/B _3577_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_115_178 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6173_ _6175_/C _5949_/X _6817_/Q _6937_/Q _5971_/B VGND VPWR _6172_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3385_ _6945_/Q _5382_/A _3385_/X _6993_/Q _5436_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5124_ _4496_/Y _4672_/B _4810_/A _5124_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 Xhold1404 _6469_/Q _4031_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1415 _6573_/Q hold1415/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_111_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1426 _6584_/Q hold1426/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_747 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1437 _6592_/Q _4189_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5055_ _5054_/X _5092_/B _4496_/Y _4413_/Y _5056_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 Xhold1448 _7137_/Q _6312_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1459 _6732_/Q _3488_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4006_ VGND VPWR _4007_/S _5548_/A1 hold892/X _4006_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_38_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5957_ _5969_/A _5968_/A _5969_/C _5975_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4908_ VGND VPWR _4907_/X _4845_/X _4465_/B _4915_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_178_351 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5888_ _7154_/Q _5625_/X _5888_/X _6718_/Q _5642_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_166_502 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4839_ VGND VPWR _5039_/C _4838_/X _4964_/B _4839_/X _4541_/X _5068_/A VGND VPWR + sky130_fd_sc_hd__a41o_1 XFILLER_166_568 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_193_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_193_376 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6509_ _6509_/Q fanout460/X _6509_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_134_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_251 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_121_148 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_102_340 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold20 hold20/A hold20/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_76_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3224__1 net399_2/A _7157_/CLK VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold31 hold31/A hold31/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_152_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold42 hold42/A hold42/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold53 hold53/A hold53/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold64 hold64/A hold64/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold75 hold75/A hold75/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold86 hold86/A hold86/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold97 hold97/A hold97/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_227 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_45_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_335 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_104 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_688 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_71_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_341 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_352 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_363 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_541 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_374 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_61_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_708 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_184_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_8_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_6 _5310_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_153_763 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_79_541 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_39_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3170_ _6635_/Q _3170_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_94_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_120_170 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6860_ _6860_/Q fanout478/X _6860_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_179_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5811_ VGND VPWR _5808_/X _5811_/X _5810_/X _6937_/Q _5654_/X _5809_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_34_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6791_ _6791_/Q fanout459/X _6791_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5742_ _5748_/A _5634_/X _6870_/Q _6974_/Q _5628_/X VGND VPWR _5741_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_50_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_148_524 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5673_ _6947_/Q _5637_/X _5673_/X _6955_/Q _5638_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4624_ _4942_/B _4620_/Y _4645_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_163_527 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_116_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold501 _6602_/Q hold501/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4555_ _5088_/C _4724_/A _4650_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 Xhold512 _5235_/X _6807_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold523 _6441_/Q hold523/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold534 _4043_/X _6479_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold545 _6747_/Q hold545/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3506_ _4250_/A _3554_/A _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold556 _4126_/X _6539_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_251 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4486_ _4690_/B _4626_/B _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold567 _6357_/X _7155_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold578 _6699_/Q hold578/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold589 _5483_/X _7027_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6225_ _6225_/D _6225_/C _6225_/Y _6225_/A _6225_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_89_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3437_ _3432_/X _3436_/X _3434_/X _3437_/Y _5346_/A _6912_/Q VPWR VGND VGND VPWR + sky130_fd_sc_hd__a2111oi_1 X_6156_ _7086_/Q _5976_/B _6156_/X _7046_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3368_ _5373_/A _3543_/A hold85/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold1201 _6786_/Q _5212_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1212 _5464_/X _7010_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1223 _6954_/Q _5401_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5107_ _4644_/Y _5108_/C _4663_/Y _4611_/Y _4969_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 Xhold1234 _5542_/X _7079_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_235 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3299_ hold72/X _3311_/C _3347_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_6087_ _6926_/Q _5938_/X _6087_/X _6958_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1245 _6660_/Q _4263_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_706 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1256 _4245_/X _6645_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1267 _6890_/Q _5329_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1278 _5155_/X _6742_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5038_ VGND VPWR _5038_/X _5115_/A _5114_/B _5038_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1289 _6675_/Q _4281_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_739 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_482 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_26_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_25_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_53_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6989_ _6989_/Q fanout480/X _6989_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_15_33 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_647 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_371 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_515 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_87 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_162_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput110 wb_adr_i[1] _4556_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xinput121 wb_adr_i[2] _4625_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput132 VGND VPWR _6323_/B1 wb_dat_i[0] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput143 VGND VPWR _6327_/B1 wb_dat_i[1] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_76_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput154 VGND VPWR _6329_/B1 wb_dat_i[2] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_76_544 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput165 VGND VPWR _6316_/A2 wb_sel_i[0] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_63_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_121 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_71_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_171 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_182 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_173 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_730 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4340_ _4562_/A _4607_/A _4753_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_153_571 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4271_ VGND VPWR _4273_/S _6355_/A1 _4271_/A0 _4271_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6010_ _6891_/Q _5946_/X _6010_/X _6803_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_97_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3222_ _6789_/Q _3222_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_79_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6912_ _6912_/Q fanout474/X _6912_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_54_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_35_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6843_ _6843_/D VPWR _6843_/Q fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_62_271 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6774_ _7193_/A fanout483/X _6774_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3986_ VGND VPWR _3989_/S _6357_/A1 hold620/X _3986_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_50_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5725_ _6869_/Q _5628_/X _5725_/X _6885_/Q _5658_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_148_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5656_ _5669_/B _5655_/X _6930_/Q _6794_/Q _5654_/X VGND VPWR _5653_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_191_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_387 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4607_ _4607_/A _4970_/A _4673_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_5587_ VPWR VGND _7098_/Q _5968_/A _7097_/Q VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_117_752 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold320 _5521_/X _7061_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_163_368 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold331 _6905_/Q hold331/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4538_ _4424_/Y _4500_/Y _4504_/X _4537_/Y _5023_/A _4538_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o41a_1 Xhold342 _5210_/X _6785_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_571 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_116_262 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold353 _7012_/Q hold353/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_187 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold364 _5394_/X _6948_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold375 _6515_/Q hold375/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_135 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold386 _5448_/X _6996_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4469_ _4672_/A _4472_/A _4469_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_117_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold397 _7078_/Q hold397/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6208_ _7035_/Q _5601_/X _6208_/X _6716_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_7188_ VGND VPWR _7188_/X _7188_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_58_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6139_ _6140_/C _5975_/C _6984_/Q _6840_/Q _5945_/X VGND VPWR _6138_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1020 _4135_/X _6546_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1031 _6451_/Q _4010_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_133_45 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1042 _5205_/X _6780_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1053 _6447_/Q _4005_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_133_78 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_374 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1064 _5332_/X _6893_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1075 _6909_/Q _5350_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1086 _5476_/X _7021_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1097 _6949_/Q _5395_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_204 _5971_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_45_249 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_290 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_641 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_162 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_335 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_5_csclk _6632_/CLK clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_123_744 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_174_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_29_290 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_433 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3840_ _3875_/C _7167_/Q _6485_/Q _3840_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_20_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3771_ _3771_/X _4032_/A _6794_/Q _6470_/Q _3326_/Y VGND VPWR _3770_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_32_499 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5510_ VGND VPWR _5513_/S _5528_/A1 hold483/X _5510_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_157_140 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6490_ _7181_/A fanout481/X _6490_/D _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_9_673 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5441_ VGND VPWR _5444_/S _5528_/A1 hold439/X _5441_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5372_ VGND VPWR _5372_/S _5513_/A1 hold654/X _5372_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7111_ _7111_/Q fanout459/X _7111_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4323_ VGND VPWR _4327_/S hold667/X _4323_/A0 _4323_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7042_ _7042_/Q fanout483/X _7042_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_101_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4254_ VGND VPWR _4255_/S _5494_/A1 hold389/X _4254_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3205_ _6933_/Q _3205_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4185_ VGND VPWR _4186_/S _4185_/A1 _3447_/Y _6589_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_661 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_94_171 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_82_399 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6826_ _6826_/Q _6826_/D VPWR fanout475/X _6908_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_168_405 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_274 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6757_ _6757_/Q fanout460/X _6757_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_149_641 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_285 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_639 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3969_ _3975_/S hold4/X VPWR VGND hold1/X hold5/A VGND VPWR sky130_fd_sc_hd__mux2_8 X_5708_ VGND VPWR _5711_/B _5928_/A2 _5697_/X _6836_/Q _5707_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_176_460 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_109_516 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6688_ _6688_/Q fanout448/X _6688_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_12_23 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5639_ _5639_/X _5638_/X _6946_/Q _6954_/Q _5637_/X VGND VPWR _5636_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_164_655 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_136_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_151_305 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold150 _5389_/X _6944_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold161 _5298_/X _6863_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold172 _7148_/Q hold172/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold183 _5501_/X _7043_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold194 _6678_/Q hold194/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_55 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_93_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_34_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_761 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_53_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_455 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_224 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_688 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_699 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_69_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_639 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_171 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5990_ _6938_/Q _5961_/X _5990_/X _6874_/Q _5976_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_64_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4941_ _4941_/X _5073_/B _4996_/C _4941_/B _4941_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_17_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_178_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4872_ _4872_/X _4872_/C _4872_/A _4872_/B _4872_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_20_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6611_ _6611_/Q _6611_/D VPWR fanout452/X _6668_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3823_ _3826_/C _4172_/A _6655_/Q _6578_/Q _4256_/A VGND VPWR _3822_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_192_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6542_ _6542_/Q fanout445/X _6542_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_158_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3754_ _6811_/Q _5238_/A _3754_/X _6466_/Q hold67/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_118_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6473_ _6473_/Q fanout448/X _6473_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3685_ _6852_/Q _5283_/A _3685_/X _6611_/Q _4208_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_118_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5424_ VGND VPWR _5426_/S _5538_/A1 hold882/X _5424_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput200 _3191_/Y mgmt_gpio_oeb[32] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput211 _3215_/Y mgmt_gpio_oeb[8] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput222 _3932_/X mgmt_gpio_out[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput233 _7174_/X mgmt_gpio_out[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput244 _7177_/X mgmt_gpio_out[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5355_ _5363_/S _5541_/B _5355_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xoutput255 _3950_/A pad_flash_io1_ieb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput266 _6741_/Q pll_div[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput277 _6433_/Q pll_trim[15] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput288 _6749_/Q pll_trim[25] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4306_ VGND VPWR _4309_/S _6354_/A1 hold818/X _4306_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput299 _6753_/Q pwr_ctrl_out[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_102_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5286_ VGND VPWR _5291_/S _5526_/A1 hold333/X _5286_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7025_ _7025_/Q fanout484/X hold31/X _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4237_ VGND VPWR _4237_/S _5546_/A1 hold842/X _4237_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4168_ VGND VPWR _4171_/S _4168_/A1 _6312_/A0 _6574_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_558 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4099_ VGND VPWR _4101_/S _4098_/X _4099_/A0 _4099_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_43_539 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6809_ _6809_/Q fanout481/X _6809_/D _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_51_583 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_33 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xwire349 VGND VPWR _3699_/A _3670_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_136_121 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_70_csclk _7037_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_151_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_105_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_566 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout460 VPWR VGND fanout460/X fanout462/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout471 VPWR VGND _6390_/A _6396_/A VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout482 fanout485/X fanout482/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_48_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_753 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_23_csclk _6884_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_30_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_14_263 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_38_csclk _7070_/CLK _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_155_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_143 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_128_677 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold908 _6808_/Q hold908/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold919 _5317_/X _6880_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3470_ _3472_/B _5463_/A _6839_/Q _7015_/Q _5265_/A VGND VPWR _3458_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_182_293 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_198 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5140_ _4821_/X _4518_/C _4672_/B _4542_/D _5140_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_170_499 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_96_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5071_ VGND VPWR _5077_/A _5071_/B _5071_/A _5071_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_84_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4022_ VGND VPWR _4025_/S _5492_/A1 _4022_/A0 _4022_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_111_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5973_ _5973_/B _5974_/D _5973_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_80_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4924_ _4562_/Y _4999_/B _4673_/A _4768_/C _4456_/Y _4689_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_33_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4855_ _4782_/A _4515_/Y _4855_/Y _4630_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3806_ _3807_/D _3585_/Y _6680_/Q input98/X _4286_/A VGND VPWR _3805_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4786_ _4791_/A _4785_/X _5108_/B _4781_/X _4689_/B _4673_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_165_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6525_ _6525_/Q fanout484/X _6525_/D _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_181_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3737_ _3742_/B _5274_/A _7048_/Q _6843_/Q _5505_/A VGND VPWR _3736_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_180_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6456_ _6456_/Q fanout447/X _6456_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3668_ _6462_/Q _4020_/A _3668_/X _6717_/Q _4328_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_173_293 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5407_ VGND VPWR _5408_/S hold99/X hold137/X _5407_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6387_ VPWR VGND _6387_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3599_ _3604_/A _4268_/A _6683_/Q _6668_/Q _4286_/A VGND VPWR _3598_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_88_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_500 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5338_ VGND VPWR _5345_/S hold667/X _5338_/A0 _5338_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_0_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_102_544 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5269_ VGND VPWR _5273_/S _5494_/A1 hold223/X _5269_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_75_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7008_ _7008_/Q fanout464/X _7008_/D _7033_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_56_631 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_344 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_314 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_483 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_156_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_215 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_647 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_152_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_293 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_658 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_157 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_152_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_745 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_233 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_439 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_461 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_678 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_728 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4640_ _4626_/Y _4673_/A _4639_/Y _5062_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_187_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4571_ _4589_/C _4548_/X _4559_/X _5099_/A _4570_/Y _4496_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 X_6310_ VGND VPWR _6315_/S _6310_/A1 _3700_/Y _7135_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold705 _5271_/X _6839_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3522_ _3523_/D _3381_/Y _6838_/Q input30/X _5265_/A VGND VPWR _3521_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_116_625 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_171_720 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold716 _6872_/Q hold716/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold727 _5451_/X _6999_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold738 _6873_/Q hold738/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold749 _4308_/X _6698_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6241_ _6647_/Q _5976_/C _6241_/X _6567_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_116_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3453_ _3453_/A hold64/X _3454_/A _5164_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_131_606 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6172_ _6449_/Q _5601_/X _6172_/X _6969_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3384_ _7033_/Q hold49/A _3384_/X _7054_/Q _5505_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5123_ _5123_/A _5123_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold1405 _6963_/Q _5411_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1416 _6575_/Q hold1416/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1427 _6588_/Q hold1427/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1438 _6594_/Q _4191_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5054_ _5057_/B _5057_/A _4672_/B _4413_/Y _5054_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_111_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1449 _6722_/Q _4988_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4005_ VGND VPWR _4007_/S _5469_/A1 _4005_/A0 _4005_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_65_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_303 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_111_48 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5956_ _5978_/A _5964_/A _5969_/C _5976_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4907_ _4907_/X _4887_/B _4907_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 X_5887_ _6279_/S _7116_/D _5885_/X _5887_/A1 _5886_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_21_542 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4838_ _4925_/B _4837_/X _4570_/Y _4453_/B _4838_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_193_355 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4769_ _4770_/D _4769_/C _4769_/A _4999_/A _4769_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_5_708 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_761 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6508_ _6508_/Q fanout460/X _6508_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_106_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_134_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6439_ _6439_/Q _6439_/D VPWR fanout447/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_134_488 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold10 hold10/A hold10/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold21 hold21/A hold21/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_102_352 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold32 hold32/A hold32/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_76_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold43 hold43/A hold43/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold54 hold54/A hold54/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold65 VPWR VGND hold65/X hold65/A VGND VPWR sky130_fd_sc_hd__buf_6 Xhold76 hold76/A hold76/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold87 hold87/A hold87/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold98 hold98/A hold98/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_174 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_239 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_188_116 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_320 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_331 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_71_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_342 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_353 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_364 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_375 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_553 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_513 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_411 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_7 _5391_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_125_422 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_285 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_94_556 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5810_ _5810_/X _5658_/X _6873_/Q _6889_/Q _5628_/X VGND VPWR _5801_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_6790_ _6790_/Q fanout457/X _6790_/D _7006_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_179_138 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5741_ _6982_/Q _5624_/X _5741_/X _6934_/Q _5654_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5672_ _5672_/A1 _6103_/B1 _7106_/D _5671_/X _5670_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_136_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_175_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4623_ _4623_/Y _4653_/B _4638_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_128_260 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4554_ _4559_/B _4554_/B _4574_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold502 _4200_/X _6602_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold513 _6871_/Q hold513/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold524 _3998_/X _6441_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3505_ _4044_/A hold74/X _3562_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold535 _6883_/Q hold535/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold546 _5160_/X _6747_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_606 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4485_ _4911_/B _4626_/B _4690_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xhold557 hold557/A hold557/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold568 _6926_/Q hold568/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold579 _4309_/X _6699_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6224_ _6225_/D _5975_/A _6456_/Q _6600_/Q _5944_/X VGND VPWR _6205_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_89_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3436_ _3436_/X _3964_/A _7000_/Q _6424_/Q _5445_/A VGND VPWR _3435_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_131_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6155_ _7033_/Q _5944_/X _6155_/X _6849_/Q _5975_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3367_ _3367_/Y _3370_/A _3511_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_97_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1202 _5212_/X _6786_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_203 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5106_ _5109_/B _5106_/C _5106_/A _5106_/B _5106_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1213 _6994_/Q _5446_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1224 _5401_/X _6954_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6086_ _6089_/B _5965_/X _6974_/Q _6798_/Q _5947_/X VGND VPWR _6085_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_111_182 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1235 _6619_/Q _4221_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3298_ _3298_/B1 _3298_/Y hold71/X _3975_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ai_2 Xhold1246 _4263_/X _6660_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_247 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1257 _6475_/Q _4039_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5037_ _5037_/C _5086_/C _5038_/C _5115_/B _5114_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 Xhold1268 _5329_/X _6890_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1279 _6460_/Q _4021_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_612 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_58 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_69 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_26_667 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6988_ _6988_/Q fanout456/X _6988_/D _7049_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_53_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5939_ _5981_/C _7098_/Q _7097_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_41_659 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_661 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_178_171 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_547 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_193_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_119_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_550 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_147_99 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_700 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_1_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_704 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_122_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput100 VGND VPWR _4337_/D wb_adr_i[10] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_76_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput111 _4566_/A wb_adr_i[20] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xinput122 VGND VPWR input122/X wb_adr_i[30] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_103_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput133 VGND VPWR _6330_/B1 wb_dat_i[10] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_49_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput144 VGND VPWR _6336_/A2 wb_dat_i[20] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput155 VGND VPWR _6341_/A2 wb_dat_i[30] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput166 VGND VPWR _6319_/B wb_sel_i[1] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_76_567 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_718 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_56_52 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_133 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_71_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_150 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_172 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_183 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_194 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_152 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_376 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4270_ VGND VPWR _4273_/S _5492_/A1 _4270_/A0 _4270_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_98_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3221_ _3221_/Y _6797_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_39_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_480 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6911_ _6911_/Q fanout474/X _6911_/D _6967_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6842_ _6842_/D VPWR _6842_/Q fanout463/X _7026_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_62_283 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6773_ _7192_/A fanout479/X _6773_/D _6777_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3985_ VGND VPWR _3989_/S _6356_/A1 hold770/X _3985_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5724_ _6997_/Q _5643_/X _5724_/X _6813_/Q _5667_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_10_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_50_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5655_ _5638_/A _5655_/X _5666_/C _5667_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_4606_ VPWR VGND _4607_/A _4975_/A _4970_/A VGND VPWR sky130_fd_sc_hd__and2_2 X_5586_ _5586_/A _7097_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold310 _4224_/X _6622_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold321 _6964_/Q hold321/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4537_ _4537_/C _4925_/B _4537_/Y _4537_/D _5068_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 XFILLER_190_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold332 _5345_/X _6905_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold343 _7004_/Q hold343/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold354 _5466_/X _7012_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold365 _7195_/A hold365/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold376 _4097_/X _6515_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4468_ _5041_/A _4817_/A _4965_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 Xhold387 _6956_/Q hold387/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold398 _5540_/X _7078_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_147 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6207_ _7152_/Q _5958_/X _6207_/X _6481_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3419_ _6808_/Q _5229_/A _3419_/X _7061_/Q hold86/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_89_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7187_ VGND VPWR _7187_/X _7187_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4399_ VPWR VGND _4551_/A _4459_/A _4813_/A VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_98_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6138_ _6928_/Q _5938_/X _6138_/X _6960_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_131_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1010 _4252_/X _6651_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_58_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1021 _6600_/Q _4198_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1032 _4010_/X _6451_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_133_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1043 _6499_/Q _4072_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1054 _4005_/X _6447_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6069_ _6069_/X _5960_/X _6821_/Q _7074_/Q _5953_/X VGND VPWR _6068_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_58_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_206 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1065 _7013_/Q _5467_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1076 _5350_/X _6909_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1087 _6989_/Q _5440_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1098 _5395_/X _6949_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_205 _3251_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_54_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_261 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_13_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_13_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_653 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_517 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_667 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_5_346 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_53 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_707 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_45_740 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_445 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3770_ _7010_/Q _5463_/A _3770_/X _6705_/Q _4316_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_157_152 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_472 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5440_ VGND VPWR _5444_/S _5545_/A1 _5440_/A0 _5440_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_184 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5371_ VGND VPWR _5372_/S hold99/X hold114/X _5371_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7110_ _7110_/Q fanout456/X _7110_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4322_ VPWR VGND _4322_/A _4327_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_7041_ _7041_/Q fanout477/X hold3/X _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4253_ VGND VPWR _4255_/S _5493_/A1 hold888/X _4253_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3204_ _3204_/Y _6941_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_79_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4184_ VGND VPWR _4186_/S _4184_/A1 _3486_/Y _6588_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_67_353 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_27_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_3_7_0_wb_clk_i _3937_/A1 clkbuf_3_7_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_6825_ _6825_/Q fanout473/X _6825_/D _7070_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_168_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6756_ _7173_/A fanout469/X _6756_/D _6769_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3968_ VGND VPWR _3980_/S _5465_/A1 hold247/X _3968_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_149_653 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5707_ _5707_/X _5905_/A2 _6844_/Q _6796_/Q _5902_/A2 VGND VPWR _5695_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_148_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6687_ _6687_/D VPWR _6687_/Q fanout448/X _6707_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3899_ VGND VPWR input123/X _3899_/D _3901_/C _3899_/C input122/X VGND VPWR sky130_fd_sc_hd__and4bb_1 XFILLER_176_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_528 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5638_ _5638_/A _5657_/B _5666_/C _5638_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_5569_ VGND VPWR _7092_/Q _5567_/Y _6508_/Q _7092_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_317 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold140 _5218_/X _6792_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold151 hold151/A hold151/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold162 _6958_/Q hold162/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold173 _3979_/X hold21/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold184 _6902_/Q hold184/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold195 _4284_/X _6678_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_277 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_288 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_58_397 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_27_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_160_66 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_54_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_20 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_236 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_601 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_515 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4940_ _4562_/Y _4941_/D _4673_/A _4738_/Y _4948_/B _4644_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_4871_ _4456_/Y _4872_/D _4694_/Y _4947_/B _4627_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_178_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6610_ _6610_/Q _6400_/A _6610_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3822_ _6604_/Q _4202_/A _3822_/X _6660_/Q _4262_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_177_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_20_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6541_ _6541_/Q fanout445/X _6541_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3753_ _3760_/A hold49/A _6915_/Q _7027_/Q _5355_/A VGND VPWR _3752_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_158_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6472_ _6472_/Q _6472_/D VPWR _3946_/B _6735_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_146_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3684_ input54/X _5193_/A _3684_/X _6804_/Q _5229_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_173_431 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5423_ VGND VPWR _5426_/S _5528_/A1 hold437/X _5423_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput201 _3190_/Y mgmt_gpio_oeb[33] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput212 _3214_/Y mgmt_gpio_oeb[9] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput223 _7185_/X mgmt_gpio_out[20] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput234 _7195_/X mgmt_gpio_out[30] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5354_ VGND VPWR _5354_/S _5540_/A1 hold675/X _5354_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput245 _3929_/X mgmt_gpio_out[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput256 _3950_/Y pad_flash_io1_oeb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput267 _6735_/Q pll_ena VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4305_ VGND VPWR _4309_/S _5491_/A1 _4305_/A0 _4305_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput278 _6418_/Q pll_trim[16] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput289 _6436_/Q pll_trim[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5285_ VGND VPWR _5291_/S _5465_/A1 hold293/X _5285_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_101_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7024_ _7024_/Q fanout482/X _7024_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_101_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4236_ VGND VPWR _4237_/S _5518_/A1 hold361/X _4236_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_101_236 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_150 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4167_ VGND VPWR _4171_/S _4167_/A1 _3640_/Y _6573_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_59 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4098_ VGND VPWR _5202_/B _5548_/A1 hold291/X _4098_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_82_164 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_58 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_4_csclk _6654_/CLK clkbuf_leaf_4_csclk/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_90_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6808_ _6808_/Q fanout482/X _6808_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6739_ _6739_/Q _6739_/D VPWR _3946_/B _6739_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_136_133 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_191_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_3_636 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_151_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_383 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout450 fanout486/X fanout450/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout461 fanout462/X fanout461/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_59_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout472 VPWR VGND _6396_/A fanout486/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_59_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_578 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout483 fanout484/X fanout483/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_120_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_518 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_710 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_592 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_765 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_128_623 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_133 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold909 _5236_/X _6808_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_103 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5070_ _4428_/Y _5071_/C _4846_/B _4771_/C _4542_/B _4619_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_29_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4021_ VGND VPWR _4025_/S _6353_/A1 _4021_/A0 _4021_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5972_ _5600_/A _5978_/A _5973_/B _5934_/X _5967_/X _5981_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__a311o_1 XFILLER_64_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4923_ _4740_/B _4747_/B _5043_/A _4921_/A _4747_/A _4923_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o2111ai_1 XFILLER_178_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_100_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4854_ _4947_/B _4877_/B _4902_/B _4542_/B _4616_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_33_595 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_381 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3805_ _6834_/Q _5265_/A _3805_/X _6715_/Q _4328_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4785_ _4967_/A _4784_/X _4689_/B _4902_/B _4785_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_6524_ _6524_/Q fanout484/X _6524_/D _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3736_ _6676_/Q _4280_/A _3736_/X _6551_/Q _4139_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_118_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_119_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6455_ _6455_/Q fanout447/X _6455_/D _6747_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3667_ _3670_/C _5182_/S _7012_/Q _6759_/Q _5463_/A VGND VPWR _3666_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5406_ VGND VPWR _5408_/S _5469_/A1 hold710/X _5406_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_134_659 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6386_ VPWR VGND _6386_/X _6400_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3598_ input46/X hold37/A _3598_/X _7066_/Q _5523_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_133_147 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5337_ _5345_/S _5541_/B _5337_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_88_735 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5268_ VGND VPWR _5273_/S _5526_/A1 hold369/X _5268_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_556 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7007_ _7007_/Q fanout461/X _7007_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4219_ VGND VPWR _4219_/S _5546_/A1 hold982/X _4219_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_75_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5199_ VGND VPWR _5201_/S hold42/X hold91/X hold92/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_141_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_746 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_171_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_401 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_65 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_152_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_180 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_320 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_64 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_61_101 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_598 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4570_ _4570_/Y _4959_/B _4570_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_3521_ _7083_/Q _5541_/A _3521_/X _6582_/Q _4172_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold706 _6927_/Q hold706/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold717 _5308_/X _6872_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold728 _6740_/Q hold728/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6240_ _6240_/C _6240_/Y _6240_/A _6240_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 Xhold739 _5309_/X _6873_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3452_ _5154_/A _3714_/B _3562_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_143_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_115_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_143_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_115_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_143_478 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6171_ _6175_/B _5975_/D _7025_/Q _6889_/Q _5937_/X VGND VPWR _6155_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3383_ _7025_/Q hold29/A _3383_/X _6969_/Q _5409_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_130_117 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_532 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5122_ VGND VPWR _5123_/A _5122_/B _5122_/A _5122_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1406 _5411_/X hold14/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1417 _7160_/Q hold8/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5053_ _5092_/B _4953_/Y _4824_/X _4523_/Y _4672_/B _4948_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 Xhold1428 _6589_/Q hold1428/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1439 _6593_/Q _4190_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4004_ VGND VPWR _4007_/S _5519_/A1 hold79/X hold80/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_1_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_65_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_80_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5955_ _5978_/A _5981_/B _5969_/C _5955_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4906_ VGND VPWR _4900_/Y _4381_/Y _4869_/B _4906_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 X_5886_ _7115_/Q _5552_/B _6103_/B1 _5886_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_166_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4837_ _4837_/X _5018_/A _5114_/A _5089_/A _4837_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_4768_ _4769_/D _4768_/C _4768_/A _4768_/B _4768_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_147_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6507_ _6507_/Q fanout460/X _6507_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3719_ _3720_/D _5145_/A _6443_/Q _6736_/Q _3999_/A VGND VPWR _3718_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4699_ _4706_/C _4628_/Y _4460_/A _4611_/B _4967_/B _4625_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 XFILLER_134_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6438_ _6438_/Q _6438_/D VPWR fanout447/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_88_521 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6369_ VPWR VGND _6369_/X _6396_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xclkbuf_leaf_22_csclk _6882_/CLK clkbuf_opt_2_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_96_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold11 hold11/A hold11/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold22 VPWR VGND hold22/X hold22/A VGND VPWR sky130_fd_sc_hd__buf_6 Xhold33 hold33/A hold33/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold44 hold44/A hold44/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold55 hold55/A hold55/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold66 hold66/A hold66/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold77 hold77/A hold77/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold88 hold88/A hold88/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold99 hold99/A hold99/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xclkbuf_leaf_37_csclk _7078_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_90_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_189_607 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_44_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_310 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_0_mgmt_gpio_in[4] clkbuf_0_mgmt_gpio_in[4]/X mgmt_gpio_in[4] VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_16 XPHY_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_332 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_343 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_375 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_376 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_387 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_565 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_144_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_137_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_8 hold29/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_152_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_263 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_106_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_429 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_94_568 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_120 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_167 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5740_ _6990_/Q _5627_/X _5740_/X _6830_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_188_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5671_ _5671_/X _6786_/Q _5610_/Y _5652_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_175_323 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4622_ VPWR VGND _4653_/B _4645_/B _4638_/A VGND VPWR sky130_fd_sc_hd__and2_2 X_4553_ _4553_/B _4554_/B _4947_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold503 _7030_/Q hold503/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_732 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold514 _5307_/X _6871_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_743 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_591 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold525 _6649_/Q hold525/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3504_ _3504_/D _3504_/C _3504_/Y _3504_/A _3504_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_116_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold536 _5321_/X _6883_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4484_ _4484_/Y _4972_/A _4562_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold547 _7190_/A hold547/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_618 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold558 _7048_/Q hold558/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold569 _5369_/X _6926_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6223_ _6225_/C _5975_/B _6681_/Q _6615_/Q _5934_/X VGND VPWR _6222_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3435_ _6984_/Q _5427_/A _3435_/X input32/X _3381_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_171_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_116_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6154_ VGND VPWR _6304_/S _6153_/X _6178_/A0 _6154_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3366_ _5274_/A _3571_/A _3379_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold1203 _6930_/Q _5374_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5105_ _4970_/Y _5106_/D _5010_/Y _4616_/Y _4613_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_97_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1214 _5446_/X _6994_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6085_ _6894_/Q _5946_/X _6085_/X _6806_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_57_215 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1225 _6751_/Q _5167_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3297_ _3297_/Y hold1003/X _3975_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold1236 _4221_/X _6619_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1247 _6970_/Q _5419_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5036_ _5115_/B _4909_/Y _4882_/C _4494_/Y _4902_/B _4500_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 Xhold1258 _4039_/X _6475_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_440 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_259 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1269 _6630_/Q _4239_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_605 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6987_ _6987_/Q _6987_/D VPWR fanout477/X _7085_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_41_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5938_ _5979_/A _5981_/A _5981_/B _5938_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_15_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5869_ _6697_/Q _5637_/X _5869_/X _6457_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_166_334 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_119_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_147_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_193_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_743 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_220 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_11 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_150_746 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_1_734 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput101 VGND VPWR _4337_/C wb_adr_i[11] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_49_716 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput112 wb_adr_i[21] _4702_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput123 VGND VPWR input123/X wb_adr_i[31] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_76_513 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput134 VGND VPWR _6332_/B1 wb_dat_i[11] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput145 VGND VPWR _6339_/A2 wb_dat_i[21] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_103_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput156 VGND VPWR _6344_/A2 wb_dat_i[31] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput167 VGND VPWR _6318_/B wb_sel_i[2] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_91_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_91_527 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_473 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_44_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_140 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_72_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_151 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_173 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_184 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_195 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_373 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_384 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_367 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_381 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3220_ _6805_/Q _3220_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_67_524 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_55_708 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6910_ _6910_/Q fanout478/X _6910_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_47_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6841_ _6841_/Q fanout464/X _6841_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_6772_ _7191_/A fanout479/X _6772_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3984_ VGND VPWR _3989_/S _6355_/A1 hold993/X _3984_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_50_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5723_ _5723_/X _5654_/X _6981_/Q _6933_/Q _5624_/X VGND VPWR _5717_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5654_ _5664_/A _5667_/C _5660_/C _5654_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4605_ _4753_/B _4625_/B _4753_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 X_5585_ VGND VPWR _7097_/Q _6508_/Q _5567_/Y _5586_/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_163_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold300 _5429_/X _6979_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold311 _7046_/Q hold311/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_7_91 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4536_ VGND VPWR _4969_/A _5010_/A _4881_/B _4537_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_117_765 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold322 _5412_/X _6964_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold333 _6852_/Q hold333/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold344 _5457_/X _7004_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold355 _6668_/Q hold355/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold366 _5200_/X _6776_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4467_ _5027_/A _4498_/A _4579_/B _4531_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_132_746 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold377 _6683_/Q hold377/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold388 _5403_/X _6956_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold399 _6940_/Q hold399/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6206_ _6610_/Q _5943_/X _6206_/X _6656_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_89_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3418_ _7053_/Q _5505_/A _3418_/X input27/X _3367_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_7186_ VGND VPWR _7186_/X _7186_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4398_ _4813_/A _4415_/A _4415_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 Xhold1000 _4173_/X _6578_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6137_ _6140_/B _5965_/X _6976_/Q _6800_/Q _5947_/X VGND VPWR _6136_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3349_ hold29/A hold75/A hold28/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_98_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_97_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1011 _6610_/Q _4210_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1022 _4198_/X _6600_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_58_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1033 _6615_/Q _4216_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1044 _4072_/X _6499_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6068_ _6068_/X _5948_/X _6909_/Q _6949_/Q _5973_/A VGND VPWR _6067_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_73_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1055 _7026_/Q _5482_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1066 _5467_/X _7013_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1077 _6842_/Q _5275_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1088 _5440_/X _6989_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5019_ _4681_/Y _4627_/A _5041_/B _4710_/Y _5021_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 Xhold1099 _6802_/Q _5230_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_206 _5490_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_53_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_26_487 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_22_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_167_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_624 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_1_531 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_107_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_36_207 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_234 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_273 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_744 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_177_418 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_654 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_131 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_145_359 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5370_ VGND VPWR _5372_/S _5469_/A1 hold706/X _5370_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4321_ VGND VPWR _4321_/S _6357_/A1 hold580/X _4321_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_746 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_234 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7040_ _7040_/Q _7040_/D VPWR fanout477/X _7081_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_4252_ VGND VPWR _4255_/S _5492_/A1 _4252_/A0 _4252_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_245 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3203_ _6949_/Q _3203_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4183_ VGND VPWR _4186_/S _4183_/A1 _4192_/A0 _6587_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_79_192 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_641 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_730 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_262 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6824_ _6824_/Q fanout473/X _6824_/D _6920_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6755_ _6755_/Q _6360_/A _6755_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3967_ _3975_/S hold11/X VPWR VGND hold8/X hold12/A VGND VPWR sky130_fd_sc_hd__mux2_8 X_5706_ _5706_/A _5706_/C _5706_/Y _5706_/D _5706_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_4 X_6686_ _6686_/Q fanout448/X _6686_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3898_ _4334_/C _4702_/C _4334_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_191_410 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5637_ _5664_/A _5658_/B _5657_/B _5637_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_164_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_148_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_191_465 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5568_ _5568_/Y _6506_/Q _5610_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold130 _5180_/X _6761_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold141 _6856_/Q hold141/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4519_ _4522_/B _4953_/A _4886_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold152 _6998_/Q hold152/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold163 _5405_/X _6958_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5499_ VGND VPWR hold77/A hold6/X _5499_/A0 _5499_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold174 hold21/X hold174/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold185 _5342_/X _6902_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold196 _6814_/Q hold196/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7169_ _7169_/Q _6399_/X _7169_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_58_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_674 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_77 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_733 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_169_10 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_32 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_215 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_127_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_6_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_17_240 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4870_ VGND VPWR _4872_/C _5027_/B _4870_/A _4870_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_3821_ _3826_/B _4208_/A _6810_/Q _6609_/Q _5238_/A VGND VPWR _3820_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_32_276 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6540_ _6540_/Q fanout445/X _6540_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_193_719 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3752_ _6995_/Q _5445_/A _3752_/X _6931_/Q _5373_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_146_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6471_ _6471_/Q _3946_/B _6471_/D _6739_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_185_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3683_ _3688_/B _4268_/A _6482_/Q _6667_/Q _4044_/A VGND VPWR _3682_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_173_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5422_ VGND VPWR _5426_/S _5545_/A1 _5422_/A0 _5422_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_173_465 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput202 _3189_/Y mgmt_gpio_oeb[34] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput213 _3933_/X mgmt_gpio_out[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_173_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput224 _7186_/X mgmt_gpio_out[21] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput235 _7196_/X mgmt_gpio_out[31] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5353_ VGND VPWR _5354_/S _5521_/A1 hold673/X _5353_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput246 _7178_/X mgmt_gpio_out[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput257 _6745_/Q pll90_sel[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput268 _6742_/Q pll_sel[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4304_ VPWR VGND _4304_/A _4309_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 Xoutput279 _6419_/Q pll_trim[17] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_87_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5284_ VGND VPWR _5291_/S _5524_/A1 _5284_/A0 _5284_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_4_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_102_738 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7023_ hold56/A fanout482/X hold57/X _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4235_ VGND VPWR _4237_/S _5544_/A1 hold461/X _4235_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4166_ VGND VPWR _4171_/S _4166_/A1 _3700_/Y _6572_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_460 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4097_ VGND VPWR _4101_/S _4096_/X hold375/X _4097_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_82_176 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_51_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6807_ _6807_/Q fanout481/X _6807_/D _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_11_416 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4999_ VGND VPWR _5001_/B _4999_/B _4999_/A _4999_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6738_ _6738_/Q _3946_/B _6738_/D _6739_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_23_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_315 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_270 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6669_ _6669_/Q fanout452/X _6669_/D _6677_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_164_432 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_487 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_191_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_648 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_132_395 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout440 VPWR VGND _6400_/B _6396_/B VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout451 VPWR VGND _6400_/A fanout452/X VGND VPWR sky130_fd_sc_hd__buf_4 Xfanout462 fanout462/X fanout466/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 Xfanout473 fanout474/X fanout473/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_59_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout484 VPWR VGND fanout484/X fanout485/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_74_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_696 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_61_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_61_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_120_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_175_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_128_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_10_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_292 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_115_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_89_72 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_170_457 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_703 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4020_ VPWR VGND _4020_/A _4025_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_49_184 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_346 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_368 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_614 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5971_ _5971_/D _5971_/C _5974_/C _5971_/A _5971_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_64_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_593 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4922_ _4965_/B _4737_/A _4576_/B _4582_/B _4922_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_80_658 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4853_ _4948_/C _4872_/A _4902_/B _4947_/B _4689_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_100_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_568 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3804_ _3807_/C _4157_/A _7055_/Q _6565_/Q hold86/A VGND VPWR _3803_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_60_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4784_ _4784_/X _4646_/Y _4716_/Y _4703_/Y _4702_/Y _4625_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 Xclkbuf_opt_2_0_csclk clkbuf_opt_2_0_csclk/X _6601_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_6523_ _6523_/Q fanout478/X _6523_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3735_ _3742_/A _4151_/A _6787_/Q _6561_/Q _5211_/A VGND VPWR _3734_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6454_ _6454_/Q _6383_/A _6454_/D _6655_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_174_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3666_ _6472_/Q _4032_/A _3666_/X _6712_/Q _4322_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_106_318 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5405_ VGND VPWR _5408_/S hold60/X hold162/X _5405_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_435 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6385_ VPWR VGND _6385_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3597_ _3597_/X _4250_/A _6869_/Q _6653_/Q _5301_/A VGND VPWR _3596_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_133_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5336_ VGND VPWR _5336_/S _5540_/A1 hold329/X _5336_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_671 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_88_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_88_747 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5267_ VGND VPWR _5273_/S _5465_/A1 hold297/X _5267_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7006_ _7006_/Q fanout458/X _7006_/D _7006_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_102_568 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4218_ VGND VPWR _4219_/S _5518_/A1 hold495/X _4218_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5198_ VGND VPWR _5201_/S _5528_/A1 hold443/X _5198_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_324 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4149_ VGND VPWR _4150_/S _5518_/A1 hold317/X _4149_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_83_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_149_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_741 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_125_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_401 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_124_148 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_467 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_332 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_110 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_625 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_62_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_61_135 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_84 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_730 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3520_ _4172_/A _3562_/A _3577_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_7_762 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_262 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold707 _5370_/X _6927_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold718 _6920_/Q hold718/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold729 _5152_/X _6740_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3451_ _3454_/A hold84/X _3562_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_41_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6170_ _6175_/A _5975_/B _7070_/Q _6873_/Q _5934_/X VGND VPWR _6169_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3382_ _6857_/Q _5283_/A _3382_/X _6985_/Q _5427_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_170_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_130_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_3_csclk _6653_/CLK clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5121_ _5118_/X _5116_/Y _5087_/D _5120_/X _5129_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_124_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1407 _7150_/Q _3963_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_408 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1418 _6597_/Q hold1418/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5052_ _4551_/A _4957_/Y _5142_/A _5041_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 Xhold1429 _6571_/Q hold1429/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_599 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_38_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4003_ VGND VPWR _4007_/S _5509_/A1 hold646/X _4003_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_65_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_80_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5954_ _5978_/A _5966_/A _5981_/B _5954_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_80_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_80_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4905_ VGND VPWR _4916_/B _4905_/B _5080_/A _5131_/A VGND VPWR sky130_fd_sc_hd__and3_1 X_5885_ _5652_/Y _5885_/X _5875_/X _6303_/S _6542_/Q _5884_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_4836_ _4837_/D _5088_/B _4835_/Y _4834_/X _4810_/B _4810_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_166_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4767_ VGND VPWR _4767_/C _4764_/X _4768_/D _4996_/B _4767_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_21_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6506_ _6506_/Q _6506_/D VPWR fanout459/X _7131_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3718_ _6875_/Q _5310_/A _3718_/X _7011_/Q _5463_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_4_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4698_ _4967_/B _4984_/A _4698_/C _4970_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_146_273 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6437_ _6437_/D VPWR _6437_/Q fanout449/X _7155_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_106_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3649_ _7081_/Q _5541_/A _3649_/X _6444_/Q _3999_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_134_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_134_468 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_161_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6368_ VPWR VGND _6368_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_0_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_161_298 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5319_ _5327_/S _5541_/B _5319_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_130_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6299_ _6300_/D _5976_/D _6694_/Q _6623_/Q _5954_/X VGND VPWR _6280_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold12 hold12/A hold9/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold23 hold23/A hold23/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_102_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold34 hold34/A hold34/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold45 hold45/A hold45/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_152_35 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold56 hold56/A hold56/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold67 hold67/A hold67/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold78 hold78/A hold78/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold89 hold89/A hold89/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_90_219 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_311 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_322 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_344 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_52_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_366 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_377 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_526 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_335 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_549 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_379 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_9 _5328_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_152_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_86_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_132 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_62_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_62_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5670_ _5670_/Y _5670_/B _5670_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_175_302 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4621_ _4616_/Y _4621_/X _4619_/Y _4846_/B _4673_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_129_752 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4552_ _4664_/A _4574_/A _4552_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_156_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold504 _5486_/X _7030_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold515 _6879_/Q hold515/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3503_ _3504_/D _5418_/A _6862_/Q _6974_/Q _5292_/A VGND VPWR _3502_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold526 _4249_/X _6649_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4483_ _4483_/Y _4984_/A _4636_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 Xhold537 _6803_/Q hold537/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold548 _5195_/X _6771_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold559 _5507_/X _7048_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6222_ _6701_/Q _5971_/A _6222_/X _6471_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_131_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3434_ _3434_/X _3999_/A _6960_/Q _6448_/Q _5400_/A VGND VPWR _3433_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_171_596 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6153_ VGND VPWR _6303_/S _6152_/X _7124_/Q _6153_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3365_ _3365_/Y _3373_/B _3511_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5104_ VGND VPWR _5099_/X _5138_/B _5077_/A _5129_/D _5103_/Y _5004_/A VGND VPWR + sky130_fd_sc_hd__a41o_1 Xhold1204 _5374_/X _6930_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6084_ VGND VPWR _6089_/A _5961_/X _6080_/X _6942_/Q _6083_/X VGND VPWR sky130_fd_sc_hd__a211o_1 Xhold1215 _6978_/Q _5428_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3296_ VGND VPWR _6488_/Q hold70/X _3292_/A hold71/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_97_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1226 _5167_/X _6751_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1237 _6690_/Q _4299_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1248 _5419_/X _6970_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5035_ VGND VPWR _5083_/C _4899_/B _5037_/C _5035_/D _5118_/B VGND VPWR sky130_fd_sc_hd__and4b_1 Xhold1259 _6510_/Q _4087_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_452 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6986_ _6986_/D VPWR _6986_/Q fanout457/X _7049_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5937_ _5979_/A _5964_/A _5981_/A _5937_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_41_639 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5868_ _6687_/Q _5632_/X _5868_/X _6707_/Q _5638_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_179_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_162 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_527 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4819_ _4902_/A _5057_/A _4562_/Y _4413_/Y _4542_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_5799_ _6507_/Q _6103_/B1 _5799_/Y _7111_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_166_379 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_305 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_187 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_103_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput102 VGND VPWR _4336_/B wb_adr_i[12] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput113 VPWR VGND wb_adr_i[22] _4334_/C VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xinput124 _4753_/A wb_adr_i[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xinput135 VGND VPWR _6335_/B1 wb_dat_i[12] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_193_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput146 VGND VPWR _6342_/A2 wb_dat_i[22] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput157 VGND VPWR _6333_/B1 wb_dat_i[3] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput168 VGND VPWR _6320_/A wb_sel_i[3] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_91_539 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_433 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_189_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_44_444 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_44_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_174 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_196 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_172_316 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_349 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_243 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_703 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_639 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_180_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_113_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_39_249 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_47_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6840_ _6840_/Q fanout463/X _6840_/D _6997_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_23_606 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6771_ _7190_/A fanout479/X _6771_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3983_ VGND VPWR _3989_/S _6354_/A1 hold828/X _3983_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5722_ VGND VPWR _5719_/X _5722_/X _5721_/X _7013_/Q _5630_/X _5720_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 Xclkbuf_leaf_21_csclk _6683_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_50_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5653_ _5653_/X _5652_/B _6850_/Q _6914_/Q _5648_/X VGND VPWR _5651_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_31_694 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_154 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_508 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4604_ VPWR VGND _4970_/A _4753_/B _4753_/A VGND VPWR sky130_fd_sc_hd__and2b_2 X_5584_ _5584_/A _7096_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xclkbuf_leaf_36_csclk _7076_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xhold301 _6939_/Q hold301/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4535_ _4537_/C _4535_/C _4535_/A _4535_/B _4535_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold312 _5504_/X _7046_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_232 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold323 _7058_/Q hold323/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold334 _5286_/X _6852_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold345 _6693_/Q hold345/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold356 _4272_/X _6668_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4466_ _4493_/B _4846_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold367 _6753_/Q hold367/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold378 _4290_/X _6683_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold389 _6653_/Q hold389/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6205_ _6466_/Q _5937_/X _6205_/X _6626_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_171_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3417_ VGND VPWR _6761_/Q _7131_/Q _6762_/Q _3417_/X VGND VPWR sky130_fd_sc_hd__mux2_2 X_7185_ VGND VPWR _7185_/X _7185_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_131_246 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4397_ _4415_/B _4739_/A _4400_/B _4396_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_6136_ _6896_/Q _5946_/X _6136_/X _6808_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3348_ _5211_/A _3586_/A _3714_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_58_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1001 _6666_/Q _4270_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1012 _4210_/X _6610_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1023 _6676_/Q _4282_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1034 _4216_/X _6615_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6067_ _6901_/Q _5976_/C _6067_/X _6829_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_58_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3279_ VGND VPWR hold81/A hold62/X _6488_/Q hold63/A VGND VPWR sky130_fd_sc_hd__mux2_2 Xhold1045 _6820_/Q _5250_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_39_750 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1056 _5482_/X _7026_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_677 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1067 _6834_/Q _5266_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5018_ _5021_/C _5018_/C _5018_/A _5112_/C _5018_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1078 _5275_/X _6842_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1089 _6805_/Q _5233_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_54_731 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_207 _5171_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_26_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6969_ _6969_/Q fanout474/X _6969_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_22_683 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_181_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_181_146 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_11 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_265 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold890 _6738_/Q hold890/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_36_219 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_57_580 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1590 _7181_/A hold1590/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_712 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_246 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_285 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_633 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_145_316 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_698 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4320_ VGND VPWR _4321_/S _6356_/A1 hold740/X _4320_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_153_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_153_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4251_ VGND VPWR _4255_/S _6353_/A1 _4251_/A0 _4251_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_577 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_588 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3202_ _6957_/Q _3202_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4182_ VGND VPWR _4186_/S _4182_/A1 _3640_/Y _6586_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_94_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6823_ _6823_/Q fanout474/X _6823_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6754_ _6754_/Q fanout456/X _6754_/D _7011_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3966_ VGND VPWR _3980_/S _5491_/A1 _3966_/A0 _3966_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_148_110 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5705_ _5706_/D _5814_/B1 _6820_/Q _6908_/Q _5818_/A2 VGND VPWR _5704_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6685_ _6685_/Q fanout448/X _6685_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3897_ VPWR VGND _4374_/A _4566_/A _4702_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5636_ _6970_/Q _5634_/X _5636_/X _6826_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_163_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_327 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_422 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5567_ _6508_/Q _5567_/Y _6506_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold120 _6412_/Q _3292_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold131 _7014_/Q hold131/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4518_ VGND VPWR _4518_/C _4515_/Y _4522_/A _4518_/D _4518_/B VGND VPWR sky130_fd_sc_hd__and4b_1 Xhold142 _5290_/X _6856_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold153 _5450_/X _6998_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5498_ VGND VPWR hold77/X _5543_/A1 hold602/X _5498_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_132_522 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_132_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold164 _7008_/Q hold164/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold175 _5318_/X _6881_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold186 _6684_/Q hold186/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4449_ _4948_/B _4551_/A _4813_/A _4579_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 Xhold197 _5243_/X _6814_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7168_ _7168_/Q _6398_/X _7168_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_58_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6119_ _6125_/A _5979_/X _7052_/Q _6991_/Q _5971_/A VGND VPWR _6105_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_100_430 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_709 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7099_ _7099_/Q fanout464/X _7099_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_85_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_58_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_46 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_89 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_706 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_44 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_88 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_6_602 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_657 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_182_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_396 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_110_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_76_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_92_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_45_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_45_572 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3820_ _7071_/Q _5532_/A _3820_/X _6550_/Q _4139_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_32_288 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3751_ _3751_/D _3751_/C _3761_/C _3751_/A _3751_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_6470_ _6470_/Q _3946_/B _6470_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3682_ _6567_/Q _4157_/A _3682_/X _6652_/Q _4250_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_145_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5421_ VGND VPWR _5426_/S _5484_/A1 hold880/X _5421_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_161_606 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput203 _3922_/X mgmt_gpio_oeb[35] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_114_500 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput214 _3926_/X mgmt_gpio_out[10] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5352_ VGND VPWR _5354_/S _5538_/A1 hold449/X _5352_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_200 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xoutput225 _7187_/X mgmt_gpio_out[22] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_99_211 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput236 _3923_/X mgmt_gpio_out[32] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput247 _3928_/X mgmt_gpio_out[8] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_114_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput258 _6746_/Q pll90_sel[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4303_ VGND VPWR _4303_/S _5546_/A1 hold838/X _4303_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput269 _6743_/Q pll_sel[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5283_ _5291_/S hold17/X _5283_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_87_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7022_ _7022_/Q fanout476/X _7022_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4234_ VGND VPWR _4237_/S _5534_/A1 hold413/X _4234_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4165_ VGND VPWR _4171_/S _4165_/A1 _3762_/Y _6571_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_472 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4096_ VGND VPWR _5202_/B hold42/X hold168/X _4096_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_24_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_82_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_531 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6806_ _6806_/Q fanout476/X _6806_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4998_ VGND VPWR _5001_/A _5069_/C _5068_/C _4998_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_23_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_428 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3949_ _3949_/B _3950_/A _6403_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_6737_ _6737_/Q _3946_/B _6737_/D _6739_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_23_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6668_ _6668_/Q fanout452/X _6668_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_109_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_176_282 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5619_ _5664_/A _5666_/B _5666_/C _5619_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_191_241 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6599_ _6599_/Q fanout454/X _6599_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_117_360 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_503 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout430 VPWR VGND _4322_/B hold16/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout441 _6401_/B _6396_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xfanout452 VPWR VGND fanout452/X fanout455/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout463 fanout465/X fanout463/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_171_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout474 fanout474/X fanout475/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_58_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout485 fanout486/X fanout485/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_74_623 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_61_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_159_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_60 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_288 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_764 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_157 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_89_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_97_715 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_536 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_84_409 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_49_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_472 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_49_196 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5970_ _5600_/A _5969_/A _5970_/X _5943_/X _5965_/X _5981_/C VGND VPWR VGND VPWR + sky130_fd_sc_hd__a311o_1 XFILLER_80_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4921_ _5043_/A _4921_/Y _4921_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_18_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_531 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4852_ _4456_/Y _4852_/X _4902_/B _4947_/B _4628_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_60_350 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3803_ input43/X _4058_/S _3803_/X input61/X _4102_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4783_ _4644_/Y _5108_/B _4663_/Y _4846_/B _4782_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_20_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6522_ _6522_/Q fanout478/X _6522_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3734_ _6656_/Q _4256_/A _3734_/X _6691_/Q _4298_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_146_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6453_ _6453_/Q _6383_/A _6453_/D _6655_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3665_ _3670_/B _4280_/A _6436_/Q _6677_/Q _3372_/Y VGND VPWR _3664_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_134_606 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5404_ VGND VPWR _5408_/S _5494_/A1 hold221/X _5404_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6384_ VPWR VGND _6384_/X _6400_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3596_ VGND VPWR _3596_/X _5292_/A _3593_/X _6861_/Q _3595_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_5335_ VGND VPWR _5336_/S _5548_/A1 hold940/X _5335_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5266_ VGND VPWR _5273_/S hold666/X _5266_/A0 _5266_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7005_ _7005_/Q fanout466/X _7005_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4217_ VGND VPWR _4219_/S _5544_/A1 hold662/X _4217_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5197_ VGND VPWR _5201_/S _5545_/A1 _5197_/A0 _5197_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4148_ VGND VPWR _4150_/S _5544_/A1 hold453/X _4148_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_55_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4079_ VGND VPWR _4083_/S hold42/X hold742/X _4079_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_70_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_158 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_184_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_764 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_192_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_639 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_59_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_1_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_120_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_187_300 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_509 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold708 _6919_/Q hold708/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_7_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_183_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold719 _5362_/X _6920_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3450_ VGND VPWR _6760_/Q _7118_/Q _6762_/Q _3450_/X VGND VPWR sky130_fd_sc_hd__mux2_2 X_3381_ _3381_/Y _3511_/A hold66/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5120_ _4906_/Y _5120_/B _5120_/X _5120_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 XFILLER_69_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5051_ _5089_/C _5051_/B _5051_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold1408 _7005_/Q _5458_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1419 _6586_/Q hold1419/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4002_ VGND VPWR _4007_/S _5484_/A1 hold886/X _4002_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_38_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_291 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_114 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5953_ _5969_/A _5969_/C _5981_/C _5953_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_80_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4904_ _5131_/A _4359_/Y _4850_/Y _4900_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_40_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5884_ VGND VPWR _5879_/X _5884_/X _5883_/X _6547_/Q _5655_/X _5881_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_21_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_33_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4835_ VGND VPWR _4554_/B _4551_/B _4574_/A _4835_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_21_578 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4766_ _4767_/C _4643_/Y _4627_/A _4626_/Y _4948_/C _4672_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 X_6505_ _7178_/A fanout464/X _6505_/D _6537_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3717_ _5145_/A hold28/X _3717_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_107_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4697_ _4697_/Y _4703_/B _4911_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_20_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6436_ _6436_/Q _6436_/D VPWR fanout447/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3648_ _3651_/C _3585_/Y _3957_/A input97/X _4102_/A VGND VPWR _3647_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6367_ VPWR VGND _6367_/X _6367_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3579_ _3580_/D _4014_/A _6870_/Q _6459_/Q _5301_/A VGND VPWR _3578_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_88_501 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5318_ VGND VPWR _5318_/S hold22/X _5318_/A0 _5318_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6298_ _6300_/C _5949_/X _6559_/Q _6679_/Q _5971_/B VGND VPWR _6297_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_88_556 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold13 VPWR VGND hold13/X hold9/X VGND VPWR sky130_fd_sc_hd__buf_6 Xhold24 hold24/A hold24/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5249_ VGND VPWR _5255_/S _5534_/A1 hold287/X _5249_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold35 hold35/A hold35/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold46 hold46/A hold46/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_102_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold57 hold57/A hold57/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold68 hold68/A hold68/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold79 hold79/A hold79/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XPHY_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_43_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_312 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_323 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_334 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_367 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_208 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_378 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_177_88 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_144 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_114 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_372 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4620_ _4620_/Y _4716_/A _4975_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_187_185 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_369 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_230 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4551_ _5088_/B _4551_/B _4551_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_144_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_144_712 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3502_ hold79/A _3999_/A _3502_/X _6659_/Q _4256_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_7_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold505 _6553_/Q hold505/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4482_ _4482_/B _4972_/A _4482_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xhold516 _5316_/X _6879_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_531 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold527 _6425_/Q hold527/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold538 _5231_/X _6803_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6221_ _6221_/X _5960_/X _6561_/Q _6671_/Q _5953_/X VGND VPWR _6220_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold549 _6891_/Q hold549/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3433_ _7032_/Q hold49/A _3433_/X _7016_/Q _5463_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_116_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_131_417 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6152_ _6140_/Y _6152_/X _6151_/X _6226_/B _6792_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_3364_ _5436_/A _3714_/A hold74/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_106_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5103_ _5103_/Y _5103_/A _5103_/C _5103_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_6083_ _6083_/X _5981_/X _6862_/Q _6918_/Q _5943_/X VGND VPWR _6079_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1205 _7002_/Q _5455_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3295_ _3295_/Y _3295_/A _3323_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_111_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1216 _5428_/X _6978_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1227 _6898_/Q _5338_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5034_ _5035_/D _5085_/B _5034_/A _5034_/B _5034_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1238 _4299_/X _6690_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1249 _7063_/Q _5524_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_464 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6985_ _6985_/Q fanout464/X _6985_/D _7033_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_80_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_264 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5936_ _5968_/A _5981_/B _5969_/C _5971_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_179_642 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5867_ _7153_/Q _5625_/X _5867_/X _6621_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_179_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4818_ _4456_/Y _4818_/X _4562_/Y _4902_/A _4948_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_166_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5798_ _5798_/X _5787_/Y _3227_/Y _5797_/Y _5651_/Y VGND VPWR _5552_/B VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4749_ _4581_/B _5099_/C _4611_/Y _4413_/Y _4616_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_147_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_274 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_31_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_134_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6419_ _6419_/Q _6419_/D VPWR fanout457/X _7049_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_103_653 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput103 VGND VPWR _4336_/A wb_adr_i[13] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_163_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput114 VPWR VGND wb_adr_i[23] _4334_/B VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_102_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput125 _4642_/A wb_adr_i[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 Xinput136 VGND VPWR _6338_/B1 wb_dat_i[13] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput147 VGND VPWR _6345_/A2 wb_dat_i[23] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_56_11 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput158 VGND VPWR _6336_/B1 wb_dat_i[4] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_57_740 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput169 _3899_/D wb_stb_i VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 XFILLER_29_486 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_44_489 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_120 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_142 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_2_csclk _6668_/CLK clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XPHY_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_164 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_175 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_157_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_397 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_126_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_153_542 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_629 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_113_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_494 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_581 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_754 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_62_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6770_ _7189_/A fanout479/X _6770_/D _7080_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3982_ VGND VPWR _3989_/S _6353_/A1 _3982_/A0 _3982_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5721_ _6949_/Q _5637_/X _5721_/X _7029_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_188_450 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_483 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_31_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5652_ _5652_/B _5899_/B _5652_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_4 X_4603_ _4682_/A _4993_/B _4607_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5583_ VGND VPWR _5583_/S _5664_/A _5582_/Y _5584_/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_129_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4534_ _4535_/D _4782_/A _5088_/A _4881_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21boi_1 Xhold302 _5384_/X _6939_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_542 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold313 _7062_/Q hold313/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold324 _5518_/X _7058_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold335 _7049_/Q hold335/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold346 _4302_/X _6693_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4465_ VPWR VGND _4493_/B _4465_/B _4489_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xhold357 _6980_/Q hold357/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold368 _5169_/X _6753_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold379 _6991_/Q hold379/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6204_ VGND VPWR _6279_/S _6203_/X _6204_/A0 _7127_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3416_ _5182_/S _3714_/B _3571_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_104_439 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_116_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7184_ VGND VPWR _7184_/X _7184_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4396_ _4396_/B _4415_/A _4396_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6135_ VGND VPWR _6140_/A _5961_/X _6131_/X _6944_/Q _6134_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3347_ _3347_/A _3356_/B _3714_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_85_301 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_770 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1002 _4270_/X _6666_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1013 _6519_/Q _4104_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1024 _4282_/X _6676_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6066_ _6066_/C _6075_/C _6066_/A _6066_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 XFILLER_100_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1035 _6551_/Q _4141_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3278_ _3453_/A hold83/X VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 Xhold1046 _5250_/X _6820_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1057 _6973_/Q _5422_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5017_ VGND VPWR _5018_/D _5064_/B _5106_/B _5062_/D VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1068 _5266_/X _6834_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1079 _6813_/Q _5242_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_41_404 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6968_ _6968_/Q fanout482/X _6968_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5919_ VGND VPWR _5919_/X _5614_/X _5917_/X _7038_/Q _5918_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_6899_ _6899_/Q _6899_/D VPWR fanout479/X _7080_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_139_314 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_100 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_108_712 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_125 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_23 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_135_586 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold880 _6972_/Q hold880/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold891 _5150_/X _6738_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_107_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_89_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_269 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_89_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_1_566 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_103_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_11 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_190_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_88_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1580 _7100_/Q _5596_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_592 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1591 _6528_/Q hold812/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_44_231 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_258 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_269 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_60_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_185_420 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_678 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_172_158 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_426 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_141_523 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_534 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4250_ VPWR VGND _4250_/A _4255_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_3201_ _6965_/Q _3201_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4181_ VGND VPWR _4186_/S _4181_/A1 _3700_/Y _6585_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_687 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_94_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6822_ _6822_/Q fanout475/X _6822_/D _6884_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_50_212 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_297 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6753_ _6753_/Q fanout459/X _6753_/D _7011_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3965_ VGND VPWR _3975_/S hold664/X _3251_/A _3965_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_10_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5704_ _5704_/X _5652_/B _6996_/Q _6916_/Q _5643_/X VGND VPWR _5651_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_176_431 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6684_ _6684_/Q fanout470/X _6684_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3896_ VGND VPWR _5959_/A _5966_/A _3887_/Y _6509_/D _3895_/X _5552_/B VGND VPWR + sky130_fd_sc_hd__a41o_1 X_5635_ _5638_/A _5635_/X _5666_/C _5657_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_163_125 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5566_ _7091_/D _3176_/Y _5565_/X _5564_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21boi_1 Xhold110 _7006_/Q hold110/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold121 _3292_/X hold121/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_163_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_478 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold132 _5468_/X _7014_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4517_ _4518_/C _5042_/B _4953_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5497_ VGND VPWR hold77/A hold667/X _5497_/A0 _5497_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold143 _6985_/Q hold143/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_597 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold154 _7144_/Q hold154/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold165 _5461_/X _7008_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold176 _7070_/Q hold176/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4448_ _4448_/B _4579_/B _4408_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 Xhold187 _4291_/X _6684_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold198 _7037_/Q hold198/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7167_ _7167_/Q _6397_/X _7167_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4379_ _4384_/A _4360_/B _4379_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_58_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6118_ _6118_/X _5960_/X _6823_/Q _7076_/Q _5953_/X VGND VPWR _6117_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7098_ _7098_/D VPWR _7098_/Q fanout462/X _7113_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_18_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6049_ _6049_/D _6049_/C _6049_/Y _6049_/A _6049_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_37_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_58 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_42_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_167_431 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_133 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_614 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_170_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_534 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_320 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_77_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_20_csclk _6714_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_134_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_92_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_698 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_35_csclk _6527_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_32_223 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3750_ _3751_/D _4208_/A input12/X _6610_/Q _3358_/Y VGND VPWR _3749_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3681_ _3688_/A _5319_/A _6836_/Q _6884_/Q _5265_/A VGND VPWR _3680_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_118_328 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5420_ VGND VPWR _5426_/S _5543_/A1 hold634/X _5420_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput204 _3921_/X mgmt_gpio_oeb[36] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5351_ VGND VPWR _5354_/S _5528_/A1 hold485/X _5351_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput215 _7179_/X mgmt_gpio_out[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_126_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_160_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput226 _7188_/X mgmt_gpio_out[23] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_154_681 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_512 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput237 _3924_/X mgmt_gpio_out[33] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput248 _3946_/Y pad_flash_clk_oeb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4302_ VGND VPWR _4303_/S _5518_/A1 hold345/X _4302_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput259 _6747_/Q pll90_sel[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5282_ VGND VPWR _5282_/S _5513_/A1 hold624/X _5282_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7021_ _7021_/Q fanout483/X _7021_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4233_ VGND VPWR _4237_/S hold667/X _4233_/A0 _4233_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4164_ VGND VPWR _4171_/S _4164_/A1 _3828_/Y _6570_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_68_665 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4095_ VGND VPWR _4101_/S _4094_/X hold393/X _4095_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_484 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_55_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6805_ _6805_/Q fanout477/X _6805_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_169_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_168_206 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4997_ _4998_/C _4997_/C _5073_/A _5103_/A _4997_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_23_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6736_ _6736_/Q _6736_/D VPWR _3946_/B _6739_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3948_ _3948_/A _3948_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_6667_ _6667_/D VPWR _6667_/Q fanout452/X _6668_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_164_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3879_ _3962_/B _6642_/Q _3879_/B1 _6642_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_176_294 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5618_ VPWR VGND _5666_/C _7092_/Q _7093_/Q VGND VPWR sky130_fd_sc_hd__and2b_2 X_6598_ _6598_/Q _7137_/CLK _6598_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5549_ VGND VPWR _5549_/S hold22/X _5549_/A0 hold23/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_372 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_342 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_407 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout420 hold13/X _5534_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xfanout431 VPWR VGND _5541_/B _5505_/B VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout442 _6396_/B _3268_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xfanout453 _6401_/A fanout454/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 Xfanout464 fanout465/X fanout464/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout475 fanout486/X fanout475/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout486 input75/X fanout486/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_171_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_104_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_58_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_104_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_584 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_716 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_174_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_76 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_6_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_127_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_143_629 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_3_6_0_wb_clk_i _7150_/CLK clkbuf_3_7_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_151_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_69_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_548 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_315 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4920_ VGND VPWR _5069_/A _4920_/B _5023_/B _4964_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_80_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_33_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_504 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4851_ _4496_/Y _4877_/A _4616_/Y _4413_/Y _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_3802_ _3807_/B _4044_/A input4/X _6480_/Q _3381_/Y VGND VPWR _3801_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4782_ _4975_/A _4782_/Y _4782_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_159_751 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6521_ _6521_/Q _6360_/A _6521_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3733_ VGND VPWR _3733_/X _5427_/A _3414_/Y _6979_/Q _3732_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_118_114 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6452_ _6452_/D VPWR _6452_/Q fanout452/X _6677_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_146_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_118_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3664_ _6988_/Q _5436_/A _3664_/X _6552_/Q _4139_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_134_618 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5403_ VGND VPWR _5408_/S _5526_/A1 hold387/X _5403_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3595_ _3595_/X _4298_/A input38/X _6693_/Q _3331_/Y VGND VPWR _3594_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6383_ VPWR VGND _6383_/X _6401_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5334_ VGND VPWR _5336_/S _5538_/A1 hold417/X _5334_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5265_ _5273_/S hold17/X _5265_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_87_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7004_ _7004_/Q fanout466/X _7004_/D _7012_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_141_194 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4216_ VGND VPWR _4219_/S _5492_/A1 _4216_/A0 _4216_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5196_ VGND VPWR _5201_/S _5484_/A1 hold858/X _5196_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4147_ VGND VPWR _4150_/S _5534_/A1 hold281/X _4147_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_56_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4078_ VGND VPWR _4084_/S _4077_/X hold349/X _4078_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_36_381 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_204 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6719_ _6719_/Q fanout455/X _6719_/D _7038_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_164_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_551 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_109_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_118_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_180_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_364 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_570 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_74_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_359 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_518 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_568 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold709 _5361_/X _6919_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_128_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmax_cap439 VPWR VGND _4591_/A _4434_/B VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_170_223 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_459 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3380_ hold65/X _3415_/B hold66/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_170_289 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_69_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5050_ _4820_/X _5049_/X _4946_/X _4456_/Y _5058_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_69_259 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1409 _6750_/Q _5165_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4001_ VGND VPWR _4007_/S _5465_/A1 hold263/X _4001_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_38_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_93_741 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_38_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5952_ _5969_/A _5979_/A _5981_/A _5952_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_46_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4903_ _4493_/B _4841_/X _4905_/B _5024_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_5883_ _5883_/X _5913_/B1 _6580_/Q _6552_/Q _5928_/A2 VGND VPWR _5882_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_178_323 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4834_ _4833_/X _4823_/X _4810_/B _4413_/Y _4834_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_21_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4765_ _4921_/A _4588_/Y _4767_/B _4992_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_193_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_193_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6504_ _6504_/Q _6360_/A _6504_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3716_ _3720_/C _3714_/Y _6605_/Q _6749_/Q _4202_/A VGND VPWR _3715_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4696_ _4695_/Y _4694_/Y _4482_/B _4706_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_146_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6435_ _6435_/Q _6435_/D VPWR fanout447/X _6746_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_161_201 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3647_ _7020_/Q hold29/A _3647_/X _6601_/Q _4196_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_162_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_136_49 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_115_651 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6366_ VPWR VGND _6366_/X _6401_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3578_ _6806_/Q _5229_/A _3578_/X _7199_/A _4102_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5317_ VGND VPWR _5318_/S _5548_/A1 hold918/X _5317_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_470 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_115_695 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6297_ _7038_/Q _5601_/X _6297_/X _6719_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_0_439 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold14 hold14/A hold14/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_130_654 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_568 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5248_ VGND VPWR _5255_/S _5473_/A1 _5248_/A0 _5248_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold25 hold25/A hold25/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold36 hold36/X hold36/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_29_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold47 VPWR VGND hold47/X hold47/A VGND VPWR sky130_fd_sc_hd__buf_6 Xhold58 hold58/A hold58/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_102_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold69 hold69/A hold69/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5179_ VGND VPWR _5181_/S _5469_/A1 hold696/X _5179_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_465 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_71_402 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_690 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_313 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_324 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_335 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_513 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_346 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_368 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_379 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_89 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_59_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_75_741 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_34_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_710 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_30_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4550_ _4553_/B _4551_/B _4947_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_3501_ _4256_/A _3555_/A _3546_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_156_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_144_724 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold506 _4143_/X _6553_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_7_583 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4481_ _4482_/B _4615_/B _4653_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xhold517 _7068_/Q hold517/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold528 _3980_/X _6425_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold539 _6484_/Q hold539/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6220_ _6220_/X _5948_/X _6651_/Q _6696_/Q _5973_/A VGND VPWR _6219_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3432_ _6880_/Q _5310_/A _3432_/X _6816_/Q _5238_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6151_ VGND VPWR _6143_/X _6226_/B _6151_/X _6151_/C _6145_/X VGND VPWR sky130_fd_sc_hd__and4bb_1 X_3363_ _5505_/A _3814_/A _3714_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5102_ _5101_/X _4933_/C _4663_/Y _4626_/Y _5138_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_6082_ _7083_/Q _5976_/B _6099_/B _7043_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3294_ _3294_/X hold32/X _3975_/S _3293_/Y hold121/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_2 Xhold1206 _5455_/X _7002_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1217 _6946_/Q _5392_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_527 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1228 _5338_/X _6898_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5033_ _5034_/D _5033_/C _5033_/A _5080_/B _5120_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_97_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1239 _7055_/Q _5515_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_122_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6984_ _6984_/Q fanout461/X _6984_/D _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_80_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5935_ _5969_/C _7101_/Q _7102_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_80_276 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_654 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_310 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5866_ _3185_/Y _5651_/B _5866_/Y _5899_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_166_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4817_ _5018_/A _4817_/A _4972_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_5797_ _5797_/A _5797_/C _5797_/Y _5797_/D _5797_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_4 XFILLER_178_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4748_ _5074_/A _4926_/B _4921_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_135_702 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_318 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4679_ _4682_/C _4679_/C _4925_/B _4679_/B _4679_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_107_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6418_ _6418_/D VPWR _6418_/Q fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_6349_ _6319_/B _6643_/Q _6348_/X _6349_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_1_759 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput104 VGND VPWR _4336_/D wb_adr_i[14] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_130_440 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput115 VGND VPWR _3904_/C wb_adr_i[24] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_163_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput126 VPWR VGND _4739_/A wb_adr_i[5] VGND VPWR sky130_fd_sc_hd__buf_6 Xinput137 VGND VPWR _6341_/B1 wb_dat_i[14] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_76_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput148 VGND VPWR _6324_/A2 wb_dat_i[24] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput159 VGND VPWR _6339_/B1 wb_dat_i[5] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_56_23 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_402 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_159 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_110 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_143 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_154 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_176 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_112 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_198 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_157_359 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_21_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_113_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_549 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_593 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3981_ VPWR VGND _3981_/A _3989_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5720_ _6941_/Q _5632_/X _5720_/X _6957_/Q _5638_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5651_ _5651_/Y _5899_/B _5651_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_175_145 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4602_ _4993_/B _4602_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_5582_ _5602_/A _5582_/Y _5664_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_117_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_627 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_129_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_144_510 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4533_ VGND VPWR _4912_/A _4490_/Y _4535_/C _4533_/D _5083_/A VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_190_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold303 _6713_/Q hold303/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold314 _5522_/X _7062_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold325 _6924_/Q hold325/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold336 _5508_/X _7049_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4464_ _5051_/B _4464_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold347 _6663_/Q hold347/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold358 _5430_/X _6980_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold369 _6836_/Q hold369/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6203_ VGND VPWR _6303_/S _6202_/X _6203_/A0 _6203_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3415_ hold84/X _3415_/B _3571_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7183_ VGND VPWR _7183_/X _7183_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4395_ _4441_/B _4396_/B _4642_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6134_ _6134_/X _5967_/X _7016_/Q _6856_/Q _5940_/X VGND VPWR _6130_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3346_ _3355_/B _5190_/B _3347_/A hold72/X VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 Xhold1003 _6725_/Q hold1003/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_313 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1014 _4104_/X _6519_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6065_ _6066_/C _5975_/C _6981_/Q _6837_/Q _5945_/X VGND VPWR _6064_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3277_ VGND VPWR _4988_/B2 hold82/X _3975_/S hold83/A VGND VPWR sky130_fd_sc_hd__mux2_2 Xhold1025 _6561_/Q _4153_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1036 _4141_/X _6551_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1047 _6884_/Q _5322_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1058 _5422_/X _6973_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5016_ _5011_/X _4991_/X _4975_/Y _4644_/Y _5062_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_39_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1069 _6933_/Q _5377_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_165_9 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_457 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6967_ _6967_/Q fanout474/X _6967_/D _6967_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_41_416 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_596 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5918_ _6484_/Q _5643_/X _5918_/X _6669_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_41_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6898_ _6898_/Q _6898_/D VPWR fanout476/X _7083_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_22_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5849_ _7035_/Q _5614_/X _5849_/X _6481_/Q _5643_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_21_151 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_158_47 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_107_201 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_381 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_137 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_598 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold870 _6467_/Q hold870/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_523 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_546 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold881 _5421_/X _6972_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold892 _6448_/Q hold892/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_67_11 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_49_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_131_760 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1570 _7158_/Q _3868_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1581 _6760_/Q hold696/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1592 _7101_/Q _5598_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_44_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_83_87 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_32_405 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_602 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_185_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_126 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_204 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_141_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3200_ _6973_/Q _3200_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4180_ VGND VPWR _4186_/S _4180_/A1 _3762_/Y _6584_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_121_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_699 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_349 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6821_ _6821_/Q fanout481/X _6821_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_50_224 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_23_438 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6752_ _6752_/Q fanout456/X _6752_/D _7011_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_23_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3964_ VPWR VGND _3964_/A _3980_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5703_ _5706_/C _5664_/X _6444_/Q _6924_/Q _5614_/X VGND VPWR _5702_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6683_ _6683_/Q _6390_/A _6683_/D _6683_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3895_ _7088_/Q _3886_/B _7090_/Q _7091_/Q _6509_/Q _3895_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o41a_1 XFILLER_176_443 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5634_ _5638_/A _5667_/B _5657_/B _5634_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_176_487 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_435 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5565_ _5565_/X _3176_/Y _5564_/A _5564_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_163_137 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold100 _4125_/X _6538_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold111 _5459_/X _7006_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_340 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4516_ _4518_/B _4953_/A _4531_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold122 _3294_/X _3323_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold133 _6757_/Q hold133/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5496_ hold77/A _5541_/B hold76/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xhold144 _5435_/X _6985_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold155 _3971_/X hold94/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_226 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold166 _6838_/Q hold166/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_181 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4447_ _4454_/A _4611_/B _4902_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold177 _5531_/X _7070_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold188 _6822_/Q hold188/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold199 _5494_/X _7037_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7166_ hold20/A _6396_/X _7166_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4378_ _4900_/A _4360_/B _4379_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 Xclkbuf_leaf_1_csclk _6677_/CLK clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_6117_ _6117_/X _5948_/X _6911_/Q _6951_/Q _5973_/A VGND VPWR _6116_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3329_ hold47/X hold65/X _3373_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7097_ _7097_/Q _7097_/D VPWR fanout462/X _7113_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_6048_ _6049_/D _5949_/X _6812_/Q _6932_/Q _5971_/B VGND VPWR _6047_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_73_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_487 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_160_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_73_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_232 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_202 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_53_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_22_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_167_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_145 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_10_655 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_155_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_115 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_6_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_619 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_373 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_61 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_353 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_89_460 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_555 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_460 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_432 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_431 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3680_ _6812_/Q _5238_/A _3680_/X _7041_/Q hold76/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5350_ VGND VPWR _5354_/S _5545_/A1 _5350_/A0 _5350_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput205 _3920_/X mgmt_gpio_oeb[37] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput216 _7180_/X mgmt_gpio_out[12] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput227 _7189_/X mgmt_gpio_out[24] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput238 _7197_/X mgmt_gpio_out[34] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4301_ VGND VPWR _4303_/S _5544_/A1 hold457/X _4301_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_524 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput249 _3943_/X pad_flash_csb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5281_ VGND VPWR _5282_/S _5548_/A1 hold922/X _5281_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_257 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7020_ _7020_/Q fanout476/X _7020_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4232_ VPWR VGND _4232_/A _4237_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_4163_ _4171_/S _6639_/Q _6307_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_110_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_655 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_677 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_55_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4094_ VGND VPWR _5202_/B _5519_/A1 hold766/X _4094_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_63_360 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6804_ _6804_/Q fanout477/X _6804_/D _7067_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_63_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4996_ _4997_/D _4996_/C _5021_/A _4996_/B _4996_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_6735_ _6735_/Q _3946_/B _6735_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3947_ _3948_/A _6404_/Q _3947_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_23_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6666_ _6666_/Q fanout452/X _6666_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3878_ VGND VPWR _6402_/Q hold15/A _6396_/B _3961_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_136_104 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5617_ _6442_/Q _5614_/X _5617_/X _6842_/Q _5616_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6597_ _6597_/Q _7137_/CLK _6597_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_164_468 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5548_ VGND VPWR _5549_/S _5548_/A1 hold926/X _5548_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_155_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5479_ VGND VPWR hold30/X _5521_/A1 hold315/X _5479_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xfanout410 VPWR VGND _5518_/A1 hold156/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_120_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout421 VPWR VGND _5491_/A1 _6353_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout432 VPWR VGND _5505_/B hold16/X VGND VPWR sky130_fd_sc_hd__buf_4 X_7149_ _7149_/Q fanout487/X _7149_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xfanout454 VPWR VGND fanout454/X fanout455/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout465 fanout466/X fanout465/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout476 fanout485/X fanout476/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout487 _6307_/B fanout487/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_58_165 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_176 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_52 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_74_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_82_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_516 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_555 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_549 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_728 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_251 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_118 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_111_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_696 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_145_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4850_ _4456_/A _4689_/Y _4850_/Y _4843_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_33_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3801_ _6978_/Q _5427_/A _3801_/X _6748_/Q _3714_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4781_ _4689_/B _4781_/X _4780_/Y _4846_/B _4627_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_6520_ _7197_/A fanout484/X _6520_/D _6777_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3732_ _3732_/X _3692_/Y _6626_/Q _6766_/Q _4232_/A VGND VPWR _3731_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_186_560 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_250 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6451_ _6451_/Q fanout452/X _6451_/D _6677_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3663_ _3670_/A _3381_/Y _6964_/Q input26/X _5409_/A VGND VPWR _3662_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_232 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5402_ VGND VPWR _5408_/S _5465_/A1 hold249/X _5402_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6382_ VPWR VGND _6382_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3594_ _6612_/Q _4208_/A _3594_/X _6602_/Q _4196_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5333_ VGND VPWR _5336_/S _5528_/A1 hold479/X _5333_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_114_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_114_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5264_ VGND VPWR _5264_/S _5540_/A1 hold679/X _5264_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7003_ _7003_/D VPWR _7003_/Q fanout458/X _7012_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_4215_ VGND VPWR _4219_/S _6353_/A1 _4215_/A0 _4215_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5195_ VGND VPWR _5201_/S _5543_/A1 hold547/X _5195_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4146_ VGND VPWR _4150_/S hold667/X _4146_/A0 _4146_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4077_ VGND VPWR _4083_/S hold60/X hold158/X _4077_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_706 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4979_ _4644_/Y _4981_/C _4663_/Y _4978_/X _4626_/Y _4782_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_6718_ _6718_/Q fanout455/X _6718_/D _7038_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_177_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6649_ _6649_/Q _6383_/A _6649_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_164_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_180_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_118_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_34_csclk _6777_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_133_630 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_160_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_376 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_49_csclk _7033_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_74_400 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_282 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_500 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_313 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_750 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_530 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_143_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_264 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_596 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4000_ VGND VPWR _4007_/S _5524_/A1 _4000_/A0 _4000_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_208 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5951_ _5969_/A _5966_/A _5979_/A _5976_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_65_488 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4902_ _5024_/B _4902_/B _4902_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5882_ _6467_/Q _5619_/X _5882_/X _6611_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4833_ _4832_/X _5057_/A _4810_/B _4542_/B _4833_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_193_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_178_379 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4764_ _4737_/A _4608_/X _4764_/X _4738_/A _4763_/X _4686_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__a311o_1 XFILLER_159_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_327 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6503_ _7177_/A fanout464/X _6503_/D _6537_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3715_ _6955_/Q _5400_/A _3715_/X _6566_/Q _4157_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_146_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4695_ _4695_/Y _4716_/A _4969_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_119_468 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6434_ _6434_/Q _6434_/D VPWR fanout447/X _6746_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3646_ _3651_/B _4145_/A _6682_/Q _6557_/Q _4286_/A VGND VPWR _3645_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_162_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_736 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6365_ VPWR VGND _6365_/X _6401_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3577_ _4014_/A hold74/X _3577_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_115_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5316_ VGND VPWR _5318_/S _5538_/A1 hold515/X _5316_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6296_ _6300_/B _5975_/A _6459_/Q _6603_/Q _5944_/X VGND VPWR _6295_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_29_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5247_ _5255_/S _5541_/B _5247_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xhold15 hold15/A hold15/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold26 hold26/A hold26/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_130_666 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold37 hold37/A hold37/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_603 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold48 hold48/A hold48/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold59 hold59/A hold59/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5178_ VGND VPWR _5181_/S _5526_/A1 hold359/X _5178_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4129_ VGND VPWR _4132_/S _6354_/A1 hold808/X _4129_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_44_606 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_414 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_330 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_302 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_303 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_341 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_314 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_336 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_385 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_369 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_61_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_177_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_177_68 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_530 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_232 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_4_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_180_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_438 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_449 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_86_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_94_506 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_87_580 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_157 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_628 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_128_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_744 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_30_388 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3500_ _3504_/C _4280_/A input7/X _6679_/Q _3365_/Y VGND VPWR _3498_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_190_319 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4480_ VPWR VGND _4615_/B _4636_/A _4653_/C VGND VPWR sky130_fd_sc_hd__and2_2 Xhold507 _6453_/Q hold507/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold518 _5529_/X _7068_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold529 _6608_/Q hold529/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3431_ _3431_/B _3447_/A _3431_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_171_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6150_ _6150_/D _6150_/C _6151_/C _6150_/A _6150_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_112_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3362_ _5364_/A _3714_/A _3573_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5101_ _5100_/Y _4997_/D _4644_/Y _4846_/B _5101_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_6081_ _7059_/Q _5954_/X _6099_/A _6878_/Q _5976_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_112_655 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3293_ _3293_/Y _6726_/Q _3975_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold1207 _6426_/Q _3982_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5032_ _5120_/B _4508_/D _4905_/B _4847_/Y _4695_/Y _4662_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 Xhold1218 _5392_/X _6946_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_539 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1229 _7039_/Q _5497_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_93_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6983_ _6983_/Q fanout465/X _6983_/D _6997_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_18_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5934_ _5966_/A _5968_/A _5981_/B _5934_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_179_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_288 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5865_ _5864_/Y _7115_/D _5863_/X _5865_/B2 _6279_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 XFILLER_178_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4816_ _4947_/B _4553_/B _4816_/Y _4947_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_5796_ _5797_/D _5663_/X _6880_/Q _6864_/Q _5661_/X VGND VPWR _5795_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4747_ VGND VPWR _4926_/B _4747_/B _4747_/A _4747_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_31_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_500 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4678_ _4679_/D _4942_/B _4648_/X _4660_/X wire380/X _4741_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_162_522 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_162_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6417_ _6417_/Q _6373_/X _6417_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_107_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3629_ _7005_/Q _3370_/Y _3629_/X _7037_/Q _5490_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_162_566 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_103_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6348_ _6644_/Q _6320_/A _6348_/X _6642_/Q _6318_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_103_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_471 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_163_26 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput105 VGND VPWR _4336_/C wb_adr_i[15] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_6279_ VGND VPWR _6279_/S _6278_/X _6279_/A0 _7130_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xinput116 VGND VPWR _3906_/A wb_adr_i[25] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_130_452 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput127 _4631_/D wb_adr_i[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_102_165 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput138 VGND VPWR _6344_/B1 wb_dat_i[15] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput149 VGND VPWR _6327_/A2 wb_dat_i[25] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_29_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_72_734 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_29_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_458 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_100 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_112_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_111 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_133 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_144 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_155 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_603 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_166 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_199 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_193_691 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_4_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_216 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_42 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_97_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3980_ VGND VPWR _3980_/S _5513_/A1 hold527/X _3980_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_50_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_31_653 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5650_ _5658_/B _5667_/C _5651_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_30_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4601_ _4601_/B _4993_/B _4601_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_5581_ _7095_/D _5583_/S _5574_/Y _5580_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_4532_ _4823_/A _4530_/X _4453_/B _4810_/A _4533_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_7_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_190_116 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold304 _4326_/X _6713_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold315 _7024_/Q hold315/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold326 _5367_/X _6924_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4463_ VPWR VGND _4911_/A _5051_/B _4856_/A VGND VPWR sky130_fd_sc_hd__and2_2 Xhold337 _6988_/Q hold337/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold348 _4266_/X _6663_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6202_ _6189_/Y _6202_/X _6201_/X _6226_/B _6540_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_3414_ _3511_/A _3414_/Y hold85/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xhold359 _6759_/Q hold359/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7182_ VGND VPWR _7182_/X _7182_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4394_ _4393_/A _4393_/B _4568_/B _4551_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__o21a_4 XFILLER_98_620 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6133_ _7085_/Q _5976_/B _6150_/B _7045_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3345_ VPWR VGND _3355_/B _3356_/B hold72/X VGND VPWR sky130_fd_sc_hd__and2_2 Xhold1004 _3297_/Y _3298_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6064_ _6925_/Q _5938_/X _6064_/X _6957_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1015 _6461_/Q _4022_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3276_ VGND VPWR _6488_/Q hold24/X hold81/X hold82/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_85_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1026 _4153_/X _6561_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1037 _6716_/Q _4330_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5015_ _4970_/Y _5064_/B _5010_/Y _4807_/X _4653_/Y _4645_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold1048 _5322_/X _6884_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1059 _6901_/Q _5341_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_54_712 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6966_ _6966_/Q fanout476/X _6966_/D _7083_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_41_428 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5917_ _6564_/Q _5631_/X _5917_/X _6654_/Q _5646_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6897_ _6897_/Q fanout481/X _6897_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5848_ _6476_/Q _5630_/X _5848_/X _6451_/Q _5634_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_22_675 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_166_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_59 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5779_ _6960_/Q _5638_/X _5779_/X _6856_/Q _5648_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_166_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_154_319 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_147_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_706 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_341 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_190_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold860 _6876_/Q hold860/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold871 _4029_/X _6467_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold882 _6975_/Q hold882/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold893 _4006_/X _6448_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_558 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_546 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_517 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_130_271 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1560 hold70/A _3855_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1571 _7170_/Q _3235_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_17_414 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1582 _6533_/Q hold824/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1593 _6498_/Q hold1593/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_17_458 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_657 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_606 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_156 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_511 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_406 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_171 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_95_601 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_48_572 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6820_ _6820_/Q fanout475/X _6820_/D _6884_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6751_ _6751_/Q fanout459/X _6751_/D _7011_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3963_ _3963_/S _3963_/A1 VPWR VGND hold15/X hold16/A VGND VPWR sky130_fd_sc_hd__mux2_8 X_5702_ _6964_/Q _5642_/X _5702_/X _6812_/Q _5667_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xclkbuf_1_1_0_wb_clk_i clkbuf_1_1_1_wb_clk_i/A clkbuf_0_wb_clk_i/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 X_6682_ _6682_/D VPWR _6682_/Q _6390_/A _6683_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3894_ _6508_/D _3893_/Y _3894_/B2 _6763_/Q _5552_/B _3887_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 XFILLER_148_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_293 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5633_ _6818_/Q _5631_/X _5633_/X _6938_/Q _5632_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_12_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5564_ VGND VPWR _7090_/D _5564_/B _5564_/A _5564_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_128_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_149 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold101 _6724_/Q hold101/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4515_ _4947_/B _4515_/Y _4542_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold112 _7000_/Q hold112/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold123 _3295_/Y _3355_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5495_ VGND VPWR _5495_/S hold60/X hold235/X _5495_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold134 _5176_/X _6757_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold145 _7053_/Q hold145/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4446_ _4993_/A _4531_/B _4495_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xhold156 hold94/X hold156/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold167 _5270_/X _6838_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_238 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold178 _7059_/Q hold178/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold189 _5252_/X _6822_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7165_ hold97/A _6395_/X _7165_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_132_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4377_ _4887_/A _4471_/B _4568_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_86_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6116_ _6903_/Q _5976_/C _6116_/X _6831_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3328_ _5229_/A _3571_/A hold85/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7096_ _7096_/D VPWR _7096_/Q fanout462/X _7113_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_112_271 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6047_ _6444_/Q _5601_/X _6047_/X _6964_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3259_ VGND VPWR _3260_/S _3259_/A1 _3260_/A1 _7161_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_27_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_499 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6949_ _6949_/Q fanout477/X _6949_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_41_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_678 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_511 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_6_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_185_68 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_650 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_709 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold690 _7033_/Q hold690/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_66 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_472 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_134_61 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_656 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1390 _5214_/X hold19/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_236 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_567 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_177_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_9_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_263 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_465 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput206 _3173_/Y mgmt_gpio_oeb[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput217 _3938_/X mgmt_gpio_out[13] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4300_ VGND VPWR _4303_/S _5534_/A1 hold277/X _4300_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput228 _7190_/X mgmt_gpio_out[25] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput239 _3925_/X mgmt_gpio_out[35] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5280_ VGND VPWR _5282_/S _5538_/A1 hold780/X _5280_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4231_ VGND VPWR _4228_/Y _4231_/X _3168_/A _6624_/Q _3170_/Y _5006_/A VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_4_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_344 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_114_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_99_269 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4162_ VGND VPWR _4162_/S hold60/X hold233/X _4162_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_431 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4093_ VGND VPWR _4101_/S _4092_/X _4093_/A0 _4093_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6803_ _6803_/Q _6803_/D VPWR fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_4995_ VGND VPWR _5004_/A _4995_/B _4995_/A _4995_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_168_219 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6734_ _3945_/A1 _6734_/Q _6386_/X _6734_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_3946_ _3946_/B _3946_/Y _6403_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_177_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6665_ _6665_/Q _6360_/A _6665_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3877_ _3962_/B hold15/A _6396_/B _6402_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_5616_ _5638_/A _5616_/X _5657_/B _5667_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_6596_ _6596_/Q _7137_/CLK _6596_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5547_ VGND VPWR _5549_/S hold42/X _5547_/A0 hold43/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_155_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5478_ VGND VPWR hold30/X hold42/X hold56/X hold57/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_132_333 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4429_ _5068_/A _4685_/A _4992_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 Xfanout400 hold54/X hold42/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout411 VPWR VGND _6355_/A1 _5526_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout422 hold666/X _6353_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_160_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xfanout433 _3178_/Y _6303_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_58_100 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7148_ _7148_/Q _6307_/B _7148_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xfanout444 fanout486/X _3946_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout455 fanout486/X fanout455/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout466 VPWR VGND fanout466/X fanout486/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout477 fanout485/X fanout477/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout488 _6307_/B input164/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_7079_ _7079_/Q _7079_/D VPWR fanout478/X _7079_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_58_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_73_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_82_670 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_241 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_431 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_155_403 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_366 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_123_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_517 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_111_528 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_145_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_103 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_37_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_372 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_45_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3800_ _3807_/A _4133_/A _6614_/Q _6545_/Q _4214_/A VGND VPWR _3799_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4780_ _4782_/A _4574_/B _4780_/Y _4707_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3731_ _6803_/Q _5229_/A _3731_/X _6579_/Q _4172_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xclkbuf_leaf_0_csclk _6709_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_174_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6450_ _6450_/Q fanout452/X _6450_/D _6677_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3662_ _6687_/Q _4292_/A _3662_/X _6467_/Q hold67/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_174_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5401_ VGND VPWR _5408_/S _5524_/A1 _5401_/A0 _5401_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_146_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6381_ VPWR VGND _6381_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3593_ _3593_/X _5274_/A _6901_/Q _6845_/Q _5337_/A VGND VPWR _3592_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_133_119 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5332_ VGND VPWR _5336_/S _5545_/A1 _5332_/A0 _5332_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_126_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5263_ VGND VPWR _5264_/S _5521_/A1 hold671/X _5263_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_206 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7002_ _7002_/D VPWR _7002_/Q fanout458/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_4214_ VPWR VGND _4214_/A _4219_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5194_ VGND VPWR _5201_/S _5473_/A1 _5194_/A0 _5194_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4145_ VPWR VGND _4145_/A _4150_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_4076_ VGND VPWR _4084_/S hold95/X _4076_/A0 hold96/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_24_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4978_ _4692_/Y _4978_/X _4969_/Y _4639_/Y _4663_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_6717_ _6717_/D VPWR _6717_/Q fanout455/X _7038_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3929_ _3929_/X _3956_/B _6504_/Q input77/X VPWR VGND VGND VPWR sky130_fd_sc_hd__mux2_4 XFILLER_20_740 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_177_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6648_ _6648_/Q fanout468/X _6648_/D _6671_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_125_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_164_266 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6579_ _6579_/Q fanout452/X _6579_/D _6677_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_180_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_707 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_59_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_120_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_36 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_388 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_93_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_59_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_86_294 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_342 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_684 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_762 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_200 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_542 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_143_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_170_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_111_303 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_185 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_92_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5950_ _6946_/Q _5948_/X _5950_/X _6930_/Q _5949_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_53_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_275 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4901_ _4498_/Y _4707_/Y _4900_/Y _4491_/Y _5080_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_5881_ _5616_/X _6601_/Q _5880_/X _5881_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_61_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4832_ _4831_/X _5092_/A _4810_/B _4948_/A _4832_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_21_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_190 _5513_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_21_526 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4763_ _4737_/A _4671_/A _4921_/A _4668_/C _4763_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_159_583 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6502_ _7176_/A fanout461/X _6502_/D _6539_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3714_ _3714_/B _3714_/Y _3714_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_4694_ _4694_/Y _4716_/A _4782_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_6433_ _6433_/Q _6433_/D VPWR fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_3645_ input37/X _3331_/Y _3645_/X _6606_/Q _4202_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_20_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3576_ _3580_/C _5490_/A _6982_/Q _7038_/Q _5427_/A VGND VPWR _3574_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_161_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6364_ VPWR VGND _6364_/X _6401_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5315_ VGND VPWR _5318_/S _5528_/A1 hold465/X _5315_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6295_ _6469_/Q _5937_/X _6295_/X _6629_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_114_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5246_ VGND VPWR _5246_/S _5540_/A1 hold762/X _5246_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold16 hold16/A hold16/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold27 VPWR VGND hold27/X hold27/A VGND VPWR sky130_fd_sc_hd__buf_6 Xhold38 hold38/A hold38/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_130_678 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold49 hold49/A hold49/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5177_ VGND VPWR _5181_/S _5494_/A1 hold209/X _5177_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4128_ VGND VPWR _4132_/S _5491_/A1 _4128_/A0 _4128_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_659 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_618 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4059_ VGND VPWR _4067_/S _4058_/X hold997/X _4059_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_426 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_304 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_314 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_375 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_348 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_359 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_397 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_51_194 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_192_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_117_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_586 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_4_736 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_68 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_133_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_94_518 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_61 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_74_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_662 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_80_csclk _6755_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xhold508 _4012_/X _6453_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold519 _6682_/Q hold519/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3430_ VGND VPWR _3426_/X _3431_/B _3429_/X _5182_/S _3417_/X _3428_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_143_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_491 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3361_ _5265_/A _3562_/A hold48/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_612 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5100_ VGND VPWR _5100_/Y _4588_/Y _4737_/A _4992_/A _4735_/X VGND VPWR sky130_fd_sc_hd__a31oi_1 X_6080_ _7006_/Q _5958_/X _6080_/X _6998_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_32_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3292_ VPWR VGND _3292_/X _6488_/Q _3292_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_112_667 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5031_ _4902_/A _5033_/C _4695_/Y _4872_/D _4542_/A _4627_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold1208 _3982_/X _6426_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1219 _7047_/Q _5506_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_65_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6982_ _6982_/Q fanout465/X _6982_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5933_ _5966_/A _5979_/A _5981_/B _5971_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 Xclkbuf_leaf_33_csclk _7086_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_33_150 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5864_ _5552_/B _6103_/B1 _5864_/Y _7114_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_178_122 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4815_ VGND VPWR _4553_/B _4947_/C _5041_/A _4815_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 X_5795_ _7024_/Q _5619_/X _5795_/X _6896_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_193_103 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_48_csclk _6981_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4746_ _4581_/B _4942_/C _4611_/Y _4948_/A _4645_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_193_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_158 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_406 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4677_ _5021_/A _4535_/A _4902_/B _4500_/A _4679_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_6416_ _6416_/Q _6372_/X _6416_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3628_ _3628_/D _3628_/C _3639_/B _3628_/A _3628_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_6347_ _3910_/A _4229_/X _4228_/Y _6347_/A1 _7149_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 X_3559_ _4133_/A _3714_/B _3814_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_163_38 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6278_ VGND VPWR _6303_/S _6277_/X _6278_/A0 _6278_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xinput106 VGND VPWR _4335_/B wb_adr_i[16] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput117 VGND VPWR _3900_/D wb_adr_i[26] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_130_464 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput128 VPWR VGND _4633_/B wb_adr_i[7] VGND VPWR sky130_fd_sc_hd__buf_4 Xinput139 VGND VPWR _6323_/A2 wb_dat_i[16] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_88_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5229_ _5237_/S _5541_/B _5229_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_102_177 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_72_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_297 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_112 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_673 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_145 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_155 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_156 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_167 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_178 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_165_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_90 _6558_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_125_203 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_2_3_0_wb_clk_i clkbuf_3_7_0_wb_clk_i/A clkbuf_2_3_0_wb_clk_i/A VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_79_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_79_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_94_326 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_35_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_30_120 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_148_328 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4600_ _4601_/B _4747_/B _4739_/B _4739_/A _4600_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4b_1 X_5580_ _5580_/X _7094_/Q _7095_/Q _5576_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_30_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4531_ _4823_/A _4810_/A _4531_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_184_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold305 _6915_/Q hold305/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold316 _5479_/X _7024_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_183_180 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4462_ VPWR VGND _4856_/A _4462_/B _4896_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xhold327 _6857_/Q hold327/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold338 _5439_/X _6988_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold349 hold349/A hold349/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6201_ _6192_/X _6201_/B _6201_/X _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 X_3413_ VGND VPWR _3829_/B _3413_/A1 _3412_/X _6734_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_144_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7181_ VGND VPWR _7181_/X _7181_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4393_ _4393_/B _4552_/A _4393_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_98_632 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6132_ _7061_/Q _5954_/X _6150_/A _6880_/Q _5976_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3344_ _5337_/A _3374_/A hold48/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_97_142 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_518 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6063_ _6066_/B _5965_/X _6973_/Q _6797_/Q _5947_/X VGND VPWR _6062_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3275_ hold26/X hold47/A hold46/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 Xhold1005 _3298_/Y hold72/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1016 _4022_/X _6461_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1027 _6601_/Q _4199_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1038 _4330_/X _6716_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5014_ _4796_/A _4982_/X _5010_/Y _4628_/Y _5018_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 Xhold1049 _6844_/Q _5277_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_381 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6965_ _6965_/Q fanout479/X _6965_/D _7080_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5916_ _6719_/Q _5642_/X _5916_/X _6634_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6896_ _6896_/Q fanout482/X _6896_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_179_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5847_ _5852_/B _5648_/X _6600_/Q _6605_/Q _5616_/X VGND VPWR _5846_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_166_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5778_ _6279_/S _5778_/X _5776_/X _5778_/A1 _5777_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_166_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4729_ VGND VPWR _4729_/X _4725_/Y _4728_/X _4964_/A _4229_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_108_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold850 _6804_/Q hold850/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold861 _5313_/X _6876_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold872 _7020_/Q hold872/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold883 _5424_/X _6975_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold894 _7032_/Q hold894/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_67_24 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_131_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_88_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1550 _6641_/Q _3168_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1561 _7159_/Q _3912_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1572 _7116_/Q _5887_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1583 _6412_/Q _3852_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1594 _7176_/A hold349/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_17_426 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_96 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_698 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_172_117 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_372 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_418 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_180_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_95_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_67_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_381 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6750_ _6750_/D VPWR _6750_/Q fanout457/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3962_ _3962_/B _6639_/D _3962_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_5701_ _5706_/B _5666_/X _6852_/Q _6892_/Q _5648_/X VGND VPWR _5700_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6681_ _6681_/Q fanout470/X _6681_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3893_ _3893_/Y _5966_/A _5959_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5632_ _5638_/A _5667_/B _5667_/C _5632_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_31_484 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_158 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5563_ _7089_/Q _7090_/Q _7088_/Q _5562_/D _5564_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_129_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4514_ VGND VPWR _4518_/D _4514_/B _4514_/A _4514_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_8_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold102 _3287_/Y _3356_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold113 _5452_/X _7000_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5494_ VGND VPWR _5495_/S _5494_/A1 hold198/X _5494_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold124 _3300_/Y _3571_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold135 _6840_/Q hold135/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_105_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold146 _5512_/X _7053_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4445_ VPWR VGND _4556_/A _5051_/A _4611_/B VGND VPWR sky130_fd_sc_hd__and2_2 Xhold157 _4030_/X _6468_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold168 _6783_/Q hold168/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold179 _5519_/X _7059_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7164_ hold40/A _6394_/X _7164_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_113_740 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4376_ _4376_/B _4465_/B _4376_/A _4568_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 X_6115_ _6115_/C _6126_/C _6115_/A _6115_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_86_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3327_ hold47/X hold84/X hold85/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7095_ _7095_/Q fanout462/X _7095_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_112_283 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6046_ _6049_/C _5975_/D _7020_/Q _6884_/Q _5937_/X VGND VPWR _6029_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_58_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_540 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3258_ VGND VPWR _3260_/S hold93/A _3259_/A1 _3258_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3189_ _7058_/Q _3189_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_94_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_53_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_267 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6948_ _6948_/Q fanout463/X _6948_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_42_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_22_440 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6879_ _6879_/Q fanout481/X _6879_/D _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_10_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_437 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_163_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_118_96 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold680 _5264_/X _6833_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold691 _5489_/X _7033_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_89_484 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_134_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_724 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_18_735 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1380 _6531_/Q _4117_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1391 _6654_/Q _4255_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_587 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_760 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput207 _3219_/Y mgmt_gpio_oeb[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput218 _7181_/X mgmt_gpio_out[16] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput229 _7191_/X mgmt_gpio_out[26] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_153_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_141_312 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4230_ _4230_/B _5006_/A _6640_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 XFILLER_4_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4161_ VGND VPWR _4162_/S _6356_/A1 hold736/X _4161_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_122_570 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_95_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4092_ VGND VPWR _5202_/B _5509_/A1 hold904/X _4092_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6802_ _6802_/Q _6802_/D VPWR fanout476/X _7051_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_36_598 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4994_ _4995_/C _4413_/Y _4621_/X _4428_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_6733_ _3927_/A1 _6733_/Q _6385_/X _6733_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_3945_ VGND VPWR _6403_/Q _3945_/A1 input83/X _3945_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6664_ _6664_/Q _6664_/D VPWR _6396_/A _6712_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3876_ _6485_/Q _3867_/B _6485_/D _6487_/Q _3875_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_149_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5615_ VPWR VGND _5657_/B _7094_/Q _7095_/Q VGND VPWR sky130_fd_sc_hd__and2b_2 XFILLER_137_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6595_ _6595_/Q _7137_/CLK _6595_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5546_ VGND VPWR _5549_/S _5546_/A1 hold816/X _5546_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5477_ VGND VPWR hold30/X _5528_/A1 hold455/X _5477_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_155_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_492 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4428_ _4753_/A _4428_/Y _4607_/A _4600_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_4 Xfanout401 hold60/X _6357_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xclkbuf_2_3__f_mgmt_gpio_in[4] net399_2/A clkbuf_0_mgmt_gpio_in[4]/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_99_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xfanout412 VPWR VGND _5493_/A1 _5526_/A1 VGND VPWR sky130_fd_sc_hd__buf_4 XFILLER_48_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xfanout423 VPWR VGND _5524_/A1 hold666/X VGND VPWR sky130_fd_sc_hd__buf_6 X_7147_ _7147_/Q _6307_/B _7147_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_86_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout434 VPWR VGND _5664_/A _5638_/A VGND VPWR sky130_fd_sc_hd__buf_4 Xfanout445 _6360_/A fanout445/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 X_4359_ _4359_/Y _4382_/B _4359_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_86_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout456 fanout466/X fanout456/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout467 VPWR VGND _6383_/A fanout469/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout478 fanout480/X fanout478/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout489 _4625_/A _4607_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_7078_ _7078_/Q fanout485/X _7078_/D _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_104_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6029_ _7028_/Q _5944_/X _6029_/X _6844_/Q _5975_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_100_286 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_100_297 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_137 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_738 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_22 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_429 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_163_481 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_104_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_92_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_65_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3730_ VGND VPWR _3762_/A _3730_/B _3730_/A _3730_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_158_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_174_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3661_ _3661_/D _3661_/C _3661_/Y _3661_/A _3661_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_5400_ _5408_/S hold17/X _5400_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_6380_ VPWR VGND _6380_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3592_ _6877_/Q _5310_/A _3592_/X _6885_/Q _5319_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_173_267 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_127_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5331_ VGND VPWR _5336_/S _5484_/A1 hold868/X _5331_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5262_ VGND VPWR _5264_/S _5538_/A1 hold790/X _5262_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_142 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7001_ _7001_/Q fanout464/X _7001_/D _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_142_687 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_518 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4213_ VGND VPWR _4213_/S _6357_/A1 hold447/X _4213_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_68_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5193_ VPWR VGND _5193_/A _5201_/S _5541_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_4144_ VGND VPWR _4144_/S _5546_/A1 hold944/X _4144_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_18_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_498 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4075_ VGND VPWR _4083_/S hold94/X _6535_/Q hold95/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_608 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_3_4_0_csclk _6601_/CLK clkbuf_3_5_0_csclk/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_63_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4977_ _4689_/B _4631_/Y _4970_/Y _4981_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_6716_ _6716_/Q fanout455/X _6716_/D _7038_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3928_ VGND VPWR _6406_/Q _3268_/C _6510_/Q _3928_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6647_ _6647_/Q _6647_/D VPWR _6383_/A _6671_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3859_ hold24/A _3851_/C _6488_/Q hold44/A _3861_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_20_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_137_459 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6578_ _6578_/Q fanout445/X _6578_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_124_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5529_ VGND VPWR _5531_/S _5538_/A1 hold517/X _5529_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_180_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_132_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_87_741 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_212 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_156_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_172 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_120 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_97_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_111_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_251 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_37_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_265 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_92_287 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_90 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4900_ _4900_/Y _4900_/B _4900_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5880_ _6472_/Q _5627_/X _5880_/X _6567_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4831_ _4830_/X _4824_/X _4810_/B _4542_/D _4831_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XANTENNA_180 _6542_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_191 _5494_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4762_ _4769_/C _4611_/Y _4627_/A _4627_/B _4581_/B _4542_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 X_6501_ _7175_/A fanout459/X hold96/X _6539_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3713_ _3720_/B _4244_/A input62/X _6646_/Q _4102_/A VGND VPWR _3712_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_4693_ _4693_/X _4753_/C _4881_/A _4975_/B _4630_/X VGND VPWR _4689_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6432_ _6432_/Q _6432_/D VPWR fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3644_ _3651_/A _3964_/A _6876_/Q _6420_/Q _5310_/A VGND VPWR _3643_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6363_ VPWR VGND _6363_/X _6401_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3575_ _5490_/A hold75/X _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_5314_ VGND VPWR _5318_/S _5509_/A1 hold628/X _5314_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6294_ _6300_/A _5975_/B _6684_/Q _6618_/Q _5934_/X VGND VPWR _6293_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5245_ VGND VPWR _5246_/S _5548_/A1 hold920/X _5245_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_69_741 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_114_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold17 hold17/A hold17/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_29_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold28 hold28/A hold28/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold39 hold39/A hold39/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5176_ VGND VPWR _5181_/S hold60/X hold133/X _5176_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_69_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_29_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4127_ VPWR VGND _4127_/A _4132_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_83_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4058_ VGND VPWR _4058_/S _5509_/A1 hold692/X _4058_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_3_5_0_wb_clk_i _7140_/CLK clkbuf_3_5_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XPHY_316 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_338 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_348 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_180_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_10_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_63 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_126_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_74_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_168_381 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_204 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold509 _6633_/Q hold509/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3360_ hold49/A hold48/X hold75/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_624 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_101 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3291_ hold34/X _3295_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_5030_ _4902_/A _5131_/B _4628_/Y _4852_/X _4542_/A _4691_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_112_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1209 _6794_/Q _5221_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_744 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_93_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6981_ _6981_/Q fanout463/X _6981_/D _6981_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_65_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_405 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5932_ _5981_/B _7100_/Q _7099_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_53_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5863_ _5863_/X _5852_/Y _3184_/Y _5862_/Y _5651_/Y VGND VPWR _5552_/B VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4814_ _5089_/A _4958_/B _4886_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5794_ _5797_/C _5905_/A2 _6968_/Q _6800_/Q _5642_/X VGND VPWR _5793_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4745_ _4672_/B _4768_/A _4626_/Y _4456_/Y _4639_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_193_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4676_ _5021_/A _4676_/B _4737_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_107_418 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_373 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6415_ _6415_/Q _6371_/X _6415_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3627_ _3628_/D _3381_/Y input6/X input29/X _3365_/Y VGND VPWR _3626_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6346_ VGND VPWR _6346_/S _6346_/A1 _6345_/X _7148_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_1_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3558_ _4274_/A hold35/X _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_0_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_270 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6277_ _6276_/X _6543_/Q _6277_/X _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 XFILLER_88_335 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3489_ _4232_/A _3554_/A _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xinput107 VGND VPWR _4335_/A wb_adr_i[17] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput118 VGND VPWR input118/X wb_adr_i[27] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_5228_ VGND VPWR _5228_/S _5513_/A1 hold687/X _5228_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xinput129 VGND VPWR _4337_/B wb_adr_i[8] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_102_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5159_ VGND VPWR _5160_/S _6357_/A1 hold553/X _5159_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_112_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_72_747 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_2_1_0_csclk clkbuf_3_3_0_csclk/A clkbuf_2_1_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XPHY_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_135 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_157 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_168 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA_80 _6869_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_91 _6558_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_180_343 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_180_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_134_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_106_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_133_292 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_79_357 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_94_338 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_714 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4530_ _4529_/Y _4528_/X _4453_/B _4413_/Y _4530_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_156_384 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold306 _5357_/X _6915_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4461_ _4690_/B _4611_/B _4902_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold317 _6558_/Q hold317/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold328 _5291_/X _6857_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold339 _7182_/A hold339/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6200_ _6200_/D _6200_/C _6200_/Y _6200_/A _6200_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_3412_ VGND VPWR _3829_/A _3449_/A1 _3410_/Y _3412_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7180_ _7180_/A _7180_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_4392_ VGND VPWR _4393_/B _4564_/A _4566_/A _4392_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6131_ _7008_/Q _5958_/X _6131_/X _7000_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3343_ _5400_/A _3573_/A hold28/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6062_ _6893_/Q _5946_/X _6062_/X _6805_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3274_ VGND VPWR _6720_/Q hold45/X _3975_/S hold46/A VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_100_616 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1006 _3355_/X _5171_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_39_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1017 _6579_/Q _4174_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5013_ _4970_/Y _5106_/B _5010_/Y _4796_/C _4619_/Y _4616_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold1028 _4199_/X _6601_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1039 hold1598/X _4061_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_38_232 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_265 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6964_ _6964_/Q fanout458/X _6964_/D _7006_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5915_ _5915_/X _5663_/X _6469_/Q _6613_/Q _5619_/X VGND VPWR _5914_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_22_600 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6895_ _6895_/Q fanout481/X _6895_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5846_ _6466_/Q _5619_/X _5846_/X _6610_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5777_ _7110_/Q _6507_/Q _6103_/B1 _5777_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_4728_ _4727_/X _5039_/A _4728_/X _4964_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 XFILLER_135_513 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_135_524 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_630 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4659_ _4660_/D _4658_/X _4657_/X _4646_/Y _4644_/Y _4846_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_107_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold840 _7035_/Q hold840/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold851 _5232_/X _6804_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold862 _6900_/Q hold862/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold873 _5475_/X _7020_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold884 _6736_/Q hold884/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6329_ _6642_/Q _6329_/A2 _6329_/X _4230_/B _6329_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_115_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold895 _5488_/X _7032_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_292 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_29_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1540 _6351_/X _7150_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1551 _4231_/X _6624_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1562 _7113_/Q _5821_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1573 _6761_/Q hold129/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1584 _7197_/A hold237/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_177_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_83_24 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1595 _6725_/Q _5113_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_83_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_438 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_83_79 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_121 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_138_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_165_192 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_32_csclk _7069_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_164_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_47_csclk _6997_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_57_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3961_ VPWR VGND _6636_/D _3961_/B _6644_/Q VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_16_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5700_ _6900_/Q _5621_/X _5700_/X _6884_/Q _5658_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_50_238 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6680_ _6680_/Q _6390_/A _6680_/D _6683_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_43_290 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_430 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3892_ VPWR VGND _5600_/A _5966_/A _7102_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_5631_ _5664_/A _5631_/X _5657_/B _5658_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_5562_ _7090_/Q _7089_/Q _5564_/B _5562_/D _7088_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 X_4513_ _4453_/B _4902_/A _4542_/A _4514_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_191_449 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5493_ VGND VPWR _5495_/S _5493_/A1 _5493_/A0 _5493_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_144_332 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold103 VPWR VGND _3717_/B _3511_/A VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_117_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold114 _6928_/Q hold114/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold125 hold125/A _3562_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_172_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_144_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold136 _5272_/X _6840_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4444_ _4753_/A _4607_/A _4993_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_4 XFILLER_144_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold147 _6982_/Q hold147/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold158 hold158/A hold158/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold169 _5208_/X _6783_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7163_ hold58/A _6393_/X _7163_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4375_ _4568_/B _4372_/X _4374_/A _4334_/B _4334_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_2 X_6114_ _6115_/C _5975_/C _6983_/Q _6839_/Q _5945_/X VGND VPWR _6113_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3326_ _3326_/Y _3562_/A _3714_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7094_ _7094_/Q fanout462/X _7094_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_86_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_85_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6045_ _6045_/X _5975_/B _7065_/Q _6868_/Q _5934_/X VGND VPWR _6044_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_112_295 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3257_ VGND VPWR _3260_/S _3257_/A1 hold93/A _3257_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_39_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3188_ _7066_/Q _3188_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_54_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_279 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6947_ _6947_/Q hold10/X VPWR fanout456/X _7011_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_6878_ _6878_/Q fanout476/X _6878_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_50_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5829_ _5829_/X _5654_/X _6460_/Q _6675_/Q _5624_/X VGND VPWR _5822_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_22_496 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_660 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_335 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold670 _5299_/X _6864_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold681 _6889_/Q hold681/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold692 hold692/A hold692/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_378 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_49_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_134_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1370 hold1370/A wb_dat_o[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1381 _6526_/Q _4112_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_747 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_57_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1392 _4255_/X hold61/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_330 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_706 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_293 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_126_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput208 _3218_/Y mgmt_gpio_oeb[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_153_140 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput219 _7182_/X mgmt_gpio_out[17] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_126_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4160_ VGND VPWR _4162_/S _5493_/A1 _4160_/A0 _4160_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_614 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_102 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4091_ VGND VPWR _4101_/S _4090_/X _4091_/A0 _4091_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_522 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6801_ _6801_/Q fanout459/X _6801_/D _7053_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4993_ _5069_/C _4993_/B _4993_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6732_ _3945_/A1 _6732_/Q _6384_/X _6732_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_3944_ _3946_/B _3944_/Y _6404_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6663_ _6663_/Q _6663_/D VPWR _6396_/A _7058_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_176_221 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3875_ VGND VPWR _3875_/X _3875_/B _7167_/Q _3875_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_177_755 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_608 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5614_ _5638_/A _5667_/B _5666_/B _5614_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_31_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6594_ _6594_/Q _7130_/CLK _6594_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5545_ VGND VPWR _5549_/S _5545_/A1 _5545_/A0 _5545_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_652 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5476_ VGND VPWR hold30/X _5545_/A1 _5476_/A0 _5476_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_160_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_3_0_0_csclk clkbuf_3_0_0_csclk/X clkbuf_3_1_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 X_4427_ _4992_/A _4561_/B _4632_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xfanout402 hold59/X hold60/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xfanout413 hold6/X _5526_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 X_7146_ hold52/A _6307_/B _7146_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4358_ VGND VPWR _4357_/B _4739_/A _4356_/B _4359_/B _4661_/A VGND VPWR sky130_fd_sc_hd__a2bb2o_1 Xfanout424 hold666/X hold667/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout435 _5638_/A _5899_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 XFILLER_101_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xfanout446 VPWR VGND _6360_/A fanout486/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout457 fanout466/X fanout457/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_100_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout468 VPWR VGND fanout468/X fanout469/X VGND VPWR sky130_fd_sc_hd__buf_4 X_3309_ hold27/X hold65/X _3370_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7077_ _7077_/Q fanout483/X _7077_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4289_ VGND VPWR _4291_/S _5544_/A1 hold519/X _4289_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xfanout479 fanout480/X fanout479/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_101_766 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_455 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6028_ VGND VPWR _6279_/S _6027_/X _6028_/A0 _6028_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_86_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_711 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_10_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_129_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_633 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_493 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_346 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_121 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_96_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_116 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_38_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_18_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_33_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_158_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3660_ _3661_/D _5148_/A _7073_/Q _6739_/Q _5532_/A VGND VPWR _3659_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_174_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3591_ _6617_/Q _4214_/A _3591_/X _6633_/Q _4238_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_127_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_408 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5330_ VGND VPWR _5336_/S _5543_/A1 hold549/X _5330_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5261_ VGND VPWR _5264_/S _5519_/A1 hold190/X _5261_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_114_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7000_ _7000_/Q fanout461/X _7000_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4212_ VGND VPWR _4213_/S _5518_/A1 hold493/X _4212_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_154 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5192_ VGND VPWR _5192_/S _5534_/A1 hold423/X _5192_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4143_ VGND VPWR _4144_/S _5518_/A1 hold505/X _4143_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4074_ VGND VPWR _4084_/S _4073_/X hold170/X _4074_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_64_661 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_519 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4976_ _4701_/Y _4981_/A _4975_/Y _4576_/Y _4613_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_51_366 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6715_ _6715_/Q fanout455/X _6715_/D _7038_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3927_ VGND VPWR _6405_/Q _3927_/A1 _6511_/Q _3927_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_20_720 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_703 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_714 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6646_ _6646_/Q fanout468/X _6646_/D _6671_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3858_ _6410_/D _3858_/A1 _3857_/X _3851_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_109_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6577_ _6577_/Q _7140_/CLK _6577_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3789_ _3789_/X _3788_/Y _7026_/Q hold49/A _5186_/A _3355_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 X_5528_ VGND VPWR _5531_/S _5528_/A1 hold435/X _5528_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_3_418 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_471 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5459_ VGND VPWR _5461_/S hold60/X hold110/X _5459_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_78_219 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_115_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_530 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7129_ _7129_/Q fanout486/X _7129_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_87_753 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_319 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_98 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_64 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_500 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_69_208 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_474 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_111_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_233 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_385 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4830_ _4830_/X _4829_/X _4828_/X _4821_/X _4810_/B _4542_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XANTENNA_170 _4108_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_60_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_181 _6925_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_192 _5544_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4761_ _4772_/C _4626_/Y _4627_/A _4615_/Y _4810_/A _4672_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 X_6500_ _7174_/A fanout461/X _6500_/D _6539_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3712_ _7019_/Q hold29/A _3712_/X _6827_/Q _5256_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_119_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4692_ _4975_/B _4692_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_174_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6431_ _6431_/Q _6431_/D VPWR fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3643_ _6972_/Q _5418_/A _3643_/X input45/X _4058_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_134_408 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6362_ VPWR VGND _6362_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3574_ _6990_/Q _5436_/A _3574_/X _6699_/Q _4304_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5313_ VGND VPWR _5318_/S _5484_/A1 hold860/X _5313_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_430 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6293_ _6704_/Q _5971_/A _6293_/X _6474_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_142_452 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_102_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5244_ VGND VPWR _5246_/S _5538_/A1 hold764/X _5244_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_316 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold18 hold18/A hold18/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_69_753 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold29 hold29/A hold29/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5175_ VPWR VGND _5182_/S _5181_/S hold17/X VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_84_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4126_ VGND VPWR _4126_/S _5513_/A1 hold555/X _4126_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4057_ VGND VPWR _4067_/S _4056_/X hold89/X hold90/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_45_17 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_631 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_306 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_317 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_339 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4959_ _4959_/Y _4959_/B _4959_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_177_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_202 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6629_ _6629_/Q _6390_/A _6629_/D _6629_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_165_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_503 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_152_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_430 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_102 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_550 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_87_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_614 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_72 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_102 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_461 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3290_ hold34/A _3975_/S hold33/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_111_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_112_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_66_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6980_ _6980_/Q fanout465/X _6980_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_53_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_93_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_683 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5931_ _6279_/S _7118_/D _5929_/X _7118_/Q _5930_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_5862_ _5862_/C _5862_/D _5862_/Y _5862_/A _5862_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_2 XFILLER_33_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4813_ VPWR VGND _4958_/B _4959_/B _4813_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5793_ _6872_/Q _5628_/X _5793_/X _7000_/Q _5643_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_21_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4744_ _4581_/B _4771_/A _4611_/Y _4542_/B _4619_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_159_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4675_ _4741_/A _4682_/B _4609_/Y _5002_/A _4565_/X _4663_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_6414_ _6414_/Q _6370_/X _6414_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3626_ _6688_/Q _4292_/A _3626_/X _6473_/Q _4032_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6345_ _6345_/X _6345_/B1 _6642_/Q _6350_/A2 _6345_/A2 VGND VPWR _6344_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3557_ _3565_/A _4268_/A _6694_/Q _6669_/Q _4298_/A VGND VPWR _3556_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6276_ VPWR VGND _6276_/X _6267_/X _6276_/D _6276_/C _6301_/C VGND VPWR sky130_fd_sc_hd__and4b_2 X_3488_ VGND VPWR _3829_/B _3488_/A1 _3487_/X _3488_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_282 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput108 VGND VPWR _4335_/D wb_adr_i[18] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_5227_ VGND VPWR _5227_/S _5521_/A1 hold722/X _5227_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_103_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput119 VGND VPWR input119/X wb_adr_i[28] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_130_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5158_ VGND VPWR _5160_/S _6356_/A1 hold754/X _5158_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4109_ _6396_/B hold38/A _5505_/B hold37/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_5089_ _5122_/C _5089_/C _5089_/A _5089_/B _5089_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_71_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_491 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_103 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_667 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_511 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_70 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_81 _6619_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_92 _6558_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_192_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_137_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_579 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_67 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_97_89 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_369 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_73 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_734 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_35_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_90_567 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_156_352 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_116_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4460_ _4782_/A _4460_/A _4993_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold307 _6937_/Q hold307/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_156_396 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold318 _4149_/X _6558_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold329 _6897_/Q hold329/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3411_ _3829_/B _7170_/Q _6487_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_4391_ _4564_/A _4566_/A _4393_/A _4392_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_6130_ _6864_/Q _5943_/X _6130_/X _6920_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3342_ hold27/X _3454_/B hold28/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_98_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_590 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6061_ VGND VPWR _6066_/A _5961_/X _6055_/X _6941_/Q _6060_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3273_ VGND VPWR _6488_/Q _3251_/A hold44/X hold45/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_97_155 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1007 _5164_/X _5165_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5012_ _4970_/Y _5134_/A _5010_/Y _4796_/A _4689_/B _4628_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_100_628 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1018 _4174_/X _6579_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1029 _6466_/Q _4028_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_53_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6963_ hold14/X VPWR _6963_/Q fanout458/X _6963_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5914_ VGND VPWR _5914_/X _5655_/X _5912_/X _6549_/Q _5913_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_6894_ _6894_/Q fanout476/X _6894_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5845_ _5852_/A _5628_/X _6646_/Q _6615_/Q _5621_/X VGND VPWR _5844_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_167_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_22_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5776_ _5652_/Y _5776_/X _5769_/X _6303_/S _6791_/Q _5775_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_4727_ _5039_/B _4964_/B _4611_/Y _4500_/A _4727_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_175_650 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_171 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4658_ VGND VPWR _4658_/X _5099_/B _5088_/A _4658_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_135_536 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_174_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_107_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput90 VPWR VGND spimemio_flash_io2_oeb input90/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_135_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold830 _6664_/Q hold830/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3609_ _6622_/Q _4220_/A _3609_/X _6563_/Q _4151_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold841 _5492_/X _7035_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold852 _6749_/Q hold852/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4589_ _4589_/B _4589_/A _4589_/Y _4589_/D _4589_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4_2 XFILLER_89_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold863 _5340_/X _6900_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_260 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_400 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold874 _6916_/Q hold874/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6328_ VGND VPWR _6346_/S _6328_/A1 _6327_/X _7142_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold885 _5147_/X _6736_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold896 _6885_/Q hold896/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_130_230 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6259_ _6264_/A _5961_/X _6688_/Q _6257_/X _6258_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a211o_2 XFILLER_67_48 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_190_49 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1530 _7104_/Q _5607_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_123_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1541 _6723_/Q _5061_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1552 _7117_/Q _5909_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1563 _7091_/Q _3176_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1574 _7168_/Q _3249_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_715 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1585 _6527_/Q hold692/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1596 _6536_/Q hold158/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_123_87 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_133 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_9_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_177 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_672 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_148_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_322 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_355 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_155 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_121_252 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_35_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_578 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_409 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3960_ _3960_/X _3960_/B _6769_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_3891_ VPWR VGND _5959_/A _5969_/A _5978_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_149_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5630_ _5664_/A _5658_/B _5666_/B _5630_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_31_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5561_ _5561_/A1 _5554_/Y _7089_/D _5560_/X _5604_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4512_ _4947_/C _4947_/B _4456_/Y _4514_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_5492_ VGND VPWR _5495_/S _5492_/A1 hold840/X _5492_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_156_171 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_156_182 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold104 _3372_/Y _3990_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold115 _5371_/X _6928_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold126 _3326_/Y _5220_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_105_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4443_ _4753_/A _4611_/B _4607_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 Xhold137 _6960_/Q hold137/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold148 _5432_/X _6982_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold159 _4123_/X _6536_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7162_ hold93/A _6392_/X _7162_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4374_ _4374_/B _4471_/C _4374_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6113_ _6927_/Q _5938_/X _6113_/X _6959_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3325_ _5418_/A _3379_/A _3543_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7093_ _7093_/Q _7093_/D VPWR fanout462/X _7113_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_86_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6044_ _7049_/Q _5971_/A _6044_/X _6988_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3256_ VGND VPWR _3260_/S _3256_/A1 _3257_/A1 _7164_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_100_447 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3187_ _3187_/Y _7074_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_54_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_353 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6946_ _6946_/D VPWR _6946_/Q fanout457/X _7049_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_81_375 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_9 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6877_ _6877_/Q fanout481/X _6877_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5828_ VGND VPWR _5824_/X _5828_/X _5827_/X _6475_/Q _5630_/X _5825_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 X_5759_ _7007_/Q _5625_/X _5759_/X _6879_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_185_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_118_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_366 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_517 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_190_483 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold660 _6793_/Q hold660/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_420 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold671 _6832_/Q hold671/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold682 _5327_/X _6889_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold693 _4113_/X _6527_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_131_594 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_134_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1360 hold1360/A wb_dat_o[20] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_85_681 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1371 _4188_/A1 hold1371/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_94_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1382 _4112_/X hold7/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_139 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1393 _7041_/Q _5499_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_545 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_342 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_344 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput209 _3217_/Y mgmt_gpio_oeb[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_126_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_5_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_153_185 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_696 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_325 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4090_ VGND VPWR _5202_/B _5484_/A1 _5205_/A0 _4090_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_67_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_191_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_128 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6800_ _6800_/Q fanout474/X _6800_/D _6920_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_91_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4992_ _4996_/D _4992_/B _4992_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6731_ _3945_/A1 _6731_/Q _6383_/X _6731_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_3943_ VGND VPWR _3268_/C input84/X _6404_/Q _3943_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_149_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6662_ _6662_/Q _6396_/A _6662_/D _7058_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3874_ _5606_/A _6762_/Q _7104_/Q _6757_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__mux2_4 XFILLER_177_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5613_ VPWR VGND _7095_/Q _5666_/B _7094_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_6593_ _6593_/Q _7130_/CLK _6593_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_191_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5544_ VGND VPWR _5549_/S _5544_/A1 hold215/X _5544_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5475_ VGND VPWR hold30/X _5484_/A1 hold872/X _5475_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_163 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4426_ _4607_/A _4753_/A _4632_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_4 Xfanout403 VPWR VGND _5546_/A1 _5519_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 X_7145_ _7145_/Q _6307_/B _7145_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_160_689 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout414 VPWR VGND _5484_/A1 _5544_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 X_4357_ VGND VPWR _4357_/B _4382_/B _4642_/A VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_113_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout425 VPWR VGND _5473_/A1 hold666/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout436 _7096_/Q _5899_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout447 VPWR VGND fanout447/X fanout450/X VGND VPWR sky130_fd_sc_hd__buf_6 X_3308_ hold65/A _3453_/A hold64/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xfanout458 fanout466/X fanout458/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 X_7076_ _7076_/Q fanout481/X _7076_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4288_ VGND VPWR _4291_/S _5534_/A1 hold269/X _4288_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_100_222 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout469 VPWR VGND fanout469/X fanout486/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_86_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3239_ _3239_/B _3875_/B _3837_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_6027_ VGND VPWR _6303_/S _6026_/X _7119_/Q _6027_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_46_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_14_228 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6929_ _6929_/Q fanout461/X _6929_/D _7054_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xclkbuf_leaf_31_csclk _7085_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_168_723 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_261 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_46_csclk _7065_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_182_269 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_664 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_89_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_303 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_190_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_145_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold490 _5363_/X _6921_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_1_0_0_wb_clk_i clkbuf_1_0_1_wb_clk_i/A clkbuf_0_wb_clk_i/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_104_594 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_191 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1190 _6353_/X _7151_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_556 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_73_651 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_73_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_364 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_581 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_159_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_174_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3590_ _6837_/Q _5265_/A _3590_/X _6581_/Q _4172_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_70_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_127_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5260_ VGND VPWR _5264_/S _5509_/A1 hold652/X _5260_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4211_ VGND VPWR _4213_/S _5493_/A1 _4211_/A0 _4211_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5191_ VGND VPWR _5192_/S hold667/X _5191_/A0 _5191_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_710 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_96_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4142_ VGND VPWR _4144_/S _5493_/A1 _4142_/A0 _4142_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_220 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_445 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4073_ VGND VPWR _4083_/S hold6/X hold401/X _4073_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4975_ _4975_/B _4975_/Y _4975_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_149_200 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6714_ _6714_/Q fanout470/X _6714_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_149_211 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3926_ VGND VPWR _6406_/Q _3251_/A _6512_/Q _3926_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6645_ _6645_/Q fanout468/X _6645_/D _6671_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3857_ _3857_/X _3850_/Y hold81/A _3856_/X _6488_/Q VGND VPWR _3866_/S VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_137_428 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6576_ _6576_/Q _7140_/CLK _6576_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_166_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3788_ _3788_/A _3788_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_117_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5527_ VGND VPWR _5531_/S _5545_/A1 _5527_/A0 _5527_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_133_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5458_ VGND VPWR _5462_/S _5494_/A1 _5458_/A0 _5458_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4409_ VGND VPWR _4584_/A _4570_/A _4551_/A _4459_/B VGND VPWR sky130_fd_sc_hd__and3_1 X_5389_ VGND VPWR _5390_/S hold99/X hold149/X _5389_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7128_ _7128_/Q fanout486/X _7128_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_86_231 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_765 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_86_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7059_ _7059_/Q _6396_/A _7059_/D _7083_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_131_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_507 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_231 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_10_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_653 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_206 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_518 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_151_486 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_71 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_92_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_18_397 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_45_194 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_160 hold666/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_61_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_171 _5291_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_182 _7066_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_61_687 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_193 _5465_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4760_ _4672_/B _5003_/A _4626_/Y _4948_/A _4653_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_193_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3711_ _3720_/A _5319_/A _6435_/Q _6883_/Q _3372_/Y VGND VPWR _3710_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4691_ _4975_/B _4691_/A _4902_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_6430_ _6430_/Q fanout449/X _6430_/D _6749_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3642_ VGND VPWR _3829_/B _3642_/A1 _3641_/X _3642_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_174_556 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_127_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6361_ VPWR VGND _6361_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3573_ _4304_/A _3573_/A _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_114_100 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5312_ VGND VPWR _5318_/S _5543_/A1 hold541/X _5312_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6292_ _6292_/X _5960_/X _6564_/Q _6674_/Q _5953_/X VGND VPWR _6291_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5243_ VGND VPWR _5246_/S _5519_/A1 hold196/X _5243_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_102_328 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_114_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold19 hold19/A hold19/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5174_ _5174_/X hold48/X _3717_/B hold667/X _5173_/X hold16/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 XFILLER_68_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4125_ VGND VPWR _4126_/S hold99/X _4125_/A0 _4125_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_383 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4056_ VGND VPWR _4058_/S hold6/X _4112_/A0 _4056_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_307 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_318 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4958_ _5046_/B _4958_/B _5042_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_177_17 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3909_ _3910_/B _3909_/B _3909_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_177_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4889_ _4645_/Y _5084_/D _4892_/B _4523_/Y _4689_/A _4491_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_137_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6628_ _6628_/Q _6390_/A _6628_/D _6683_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_137_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_450 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_106_601 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6559_ _6559_/Q _6390_/A _6559_/D _6629_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_106_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_161_751 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_158 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_194 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_125 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_42_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_168_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_167_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_143_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_143_239 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_201 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5930_ _7117_/Q _5552_/B _6103_/B1 _5930_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_53_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5861_ _5862_/D _5655_/X _6471_/Q _6546_/Q _5627_/X VGND VPWR _5860_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4812_ _4562_/Y _4948_/D _4812_/Y _4810_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_5792_ _5797_/B _5818_/A2 _6984_/Q _6824_/Q _5624_/X VGND VPWR _5791_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4743_ _4581_/B _4772_/A _4611_/Y _4810_/A _4613_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_21_359 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_187_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_236 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4674_ _4984_/B _4472_/A _4673_/Y _4674_/Y _4644_/B _4608_/X VPWR VGND VGND VPWR + sky130_fd_sc_hd__a2111oi_1 X_6413_ hold32/A _6369_/X _6413_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3625_ _3628_/C _3964_/A _6437_/Q _6421_/Q _3372_/Y VGND VPWR _3624_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_135_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6344_ _6644_/Q _6344_/A2 _6344_/X _6643_/Q _6344_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_115_431 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3556_ _7022_/Q hold29/A _3556_/X _6634_/Q _4238_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_88_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6275_ _6275_/D _6275_/C _6276_/D _6275_/A _6275_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_163_19 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3487_ VGND VPWR _3829_/A _6731_/Q _3486_/Y _3487_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xinput109 VGND VPWR _4335_/C wb_adr_i[19] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_5226_ VGND VPWR _5227_/S _5538_/A1 _5226_/A0 _5226_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_69_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_130_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5157_ VGND VPWR _5160_/S _6355_/A1 hold950/X _5157_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4108_ VGND VPWR _4108_/S _5538_/A1 hold383/X _4108_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_459 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_57_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5088_ _5089_/D _5088_/C _5088_/A _5088_/B _5088_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_56_267 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_278 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4039_ VGND VPWR _4043_/S _5491_/A1 _4039_/A0 _4039_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_440 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_115 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_126 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_52_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_687 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_148 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_185_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_60 _6025_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_71 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_82 _6898_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_126_718 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_93 _6568_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_138_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_133_250 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_133_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_161_592 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_0_720 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_102_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_6 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_401 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_148_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_176_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_320 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_352 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_116_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold308 _5381_/X _6937_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold319 _7061_/Q hold319/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_7_99 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_144_559 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3410_ _3410_/Y _3410_/A _3410_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_4390_ _4392_/C _4661_/A _4631_/D _4633_/B _4441_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_125_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3341_ hold86/A hold36/X hold85/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_124_261 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6060_ _6060_/X _5967_/X _7013_/Q _6853_/Q _5940_/X VGND VPWR _6054_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_112_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3272_ VGND VPWR _4885_/B2 hold25/X _3975_/S hold26/A VGND VPWR sky130_fd_sc_hd__mux2_2 Xhold1008 _5165_/X _6750_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5011_ _4644_/Y _5011_/X _5010_/Y _4689_/A _4639_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_112_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1019 _6546_/Q _4135_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_278 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6962_ _6962_/Q _6962_/D VPWR fanout457/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_53_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5913_ _6603_/Q _5616_/X _5913_/X _6554_/Q _5913_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6893_ _6893_/Q fanout481/X _6893_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_34_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5844_ _6456_/Q _5645_/X _5844_/X _6626_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_61_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5775_ _5774_/X _6935_/Q _5770_/X _5772_/X _5775_/X _5654_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a2111o_2 X_4726_ _5039_/B _4984_/A _4975_/A _4965_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_4657_ _4639_/Y _4657_/X _4652_/Y _4611_/Y _4620_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_175_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput80 VPWR VGND spi_sck input80/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xhold820 _6623_/Q hold820/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3608_ _3611_/C _4256_/A input55/X _6658_/Q _5193_/A VGND VPWR _3589_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xinput91 spimemio_flash_io3_do input91/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_174_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold831 _4267_/X _6664_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4588_ _4672_/B _4588_/Y _4948_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold842 _6629_/Q hold842/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold853 _5163_/X _6749_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold864 _6932_/Q hold864/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6327_ _6327_/X _6327_/B1 _6644_/Q _6350_/A2 _6327_/A2 VGND VPWR _6326_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold875 _5358_/X _6916_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3539_ _6352_/A hold74/X _3571_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xmgmt_gpio_15_buff_inst mgmt_gpio_out[15] _3936_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_103_412 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_115_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold886 _6444_/Q hold886/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_539 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold897 _5323_/X _6885_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_88_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6258_ _6258_/X _5967_/X _6478_/Q _6607_/Q _5940_/X VGND VPWR _6256_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5209_ VGND VPWR _5210_/S _5521_/A1 hold291/X _5209_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_190_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6189_ _6189_/C _6189_/Y _6189_/A _6189_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 Xhold1520 _7110_/Q _5757_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1531 hold52/A _6340_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1542 _6640_/Q _3954_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1553 _7114_/Q _5843_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1564 _7126_/Q _6179_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1575 _7087_/Q _5551_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1586 _7098_/Q _5590_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1597 _6784_/Q hold291/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_83_48 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_421 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_646 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_157_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_32_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_342 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_353 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_153_367 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_4_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_164_62 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_57_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3890_ _7099_/Q _5969_/A _7100_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 XFILLER_149_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_176_404 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_188_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5560_ _7089_/Q _5560_/X _6509_/Q _3885_/Y _7088_/Q _5552_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_129_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4511_ _4510_/X _4508_/X _4948_/C _4453_/B _4514_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_157_684 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5491_ VGND VPWR _5495_/S _5491_/A1 _5491_/A0 _5491_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold105 _3997_/X _6440_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold116 _6942_/Q hold116/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4442_ _4896_/B _4900_/A _4442_/Y _4724_/A _4465_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 Xhold127 _5227_/S _5228_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold138 _5407_/X _6960_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold149 _6944_/Q hold149/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_7161_ _7161_/Q _6391_/X _7161_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_144_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_98_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4373_ _4627_/A _4702_/B _4434_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_98_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6112_ _6115_/B _5965_/X _6975_/Q _6799_/Q _5947_/X VGND VPWR _6111_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_112_220 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3324_ _3356_/A hold73/X _3543_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7092_ _7092_/Q fanout462/X _7092_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_6043_ _6043_/X _5960_/X _6820_/Q _7073_/Q _5953_/X VGND VPWR _6042_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3255_ VGND VPWR _3260_/S _3255_/A1 _3256_/A1 _7165_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_100_459 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3186_ _7082_/Q _3186_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_39_598 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6945_ _6945_/Q fanout461/X _6945_/D _7054_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_81_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_760 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_2_2_0_wb_clk_i clkbuf_3_5_0_wb_clk_i/A clkbuf_2_3_0_wb_clk_i/A VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 X_6876_ _6876_/Q fanout476/X _6876_/D _7067_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_179_242 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_404 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5827_ _5827_/X _5913_/B1 _6578_/Q _6550_/Q _5928_/A2 VGND VPWR _5826_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5758_ _3226_/Y _5651_/B _5758_/Y _5899_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_4709_ _4902_/B _4691_/A _4619_/Y _5084_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_147_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_135_312 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5689_ _5690_/D _5663_/X _6939_/Q _6859_/Q _5632_/X VGND VPWR _5688_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_162_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_162_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_162_164 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold650 _7054_/Q hold650/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold661 _5219_/X _6793_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold672 _5263_/X _6832_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_432 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xmax_cap391 _4230_/B _6350_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xhold683 _6791_/Q hold683/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_743 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold694 _6935_/Q hold694/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_242 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_134_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_76_159 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1350 hold1350/A wb_dat_o[27] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1361 _6313_/A1 hold1361/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1372 hold1372/A wb_dat_o[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_57_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_204 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_693 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1383 hold1578/X _4125_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1394 _5499_/X hold3/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_403 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_256 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_72 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_389 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_174 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_68_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_82_107 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_75_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_568 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4991_ _4991_/X _4626_/Y _4646_/Y _4644_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_90_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6730_ _3945_/A1 _6730_/Q _6382_/X _6730_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_3942_ _3975_/S _3942_/A2 _3942_/X _3941_/Y _6396_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_189_540 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_415 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6661_ _6661_/Q _6396_/A _6661_/D _6712_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3873_ _6402_/D _3872_/X _6402_/Q _3832_/B _3264_/B _3838_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 X_5612_ _6304_/S _5610_/Y _5552_/B _5606_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_2 XFILLER_149_459 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6592_ _6592_/Q _7130_/CLK _6592_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5543_ VGND VPWR _5549_/S _5543_/A1 hold644/X _5543_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_191_215 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_117_312 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5474_ VGND VPWR hold30/X _5543_/A1 hold594/X _5474_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_175 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4425_ _5023_/B _4921_/A _4685_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_144_186 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_144_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7144_ _7144_/Q fanout487/X _7144_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_160_668 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout404 VPWR VGND _5528_/A1 _5519_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 X_4356_ _4356_/B _4492_/D _4356_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xfanout415 hold6/X _5544_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout426 hold665/X hold666/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xfanout437 _3975_/S _3963_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_113_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3307_ _5355_/A _3586_/A _3374_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xfanout448 VPWR VGND fanout448/X fanout450/X VGND VPWR sky130_fd_sc_hd__buf_4 X_7075_ _7075_/Q _6396_/A _7075_/D _7083_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xfanout459 fanout462/X fanout459/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_113_595 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4287_ VGND VPWR _4291_/S hold667/X _4287_/A0 _4287_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_100_234 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6026_ _6014_/Y _6026_/X _6025_/X _6226_/B _6787_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_3238_ _3249_/B _3239_/B _3829_/A _6485_/Q _3837_/A _6416_/Q VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_39_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_278 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_104_68 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3169_ _6642_/Q _3962_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_64_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_376 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6928_ _6928_/Q fanout461/X _6928_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_23_763 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_735 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6859_ _6859_/D VPWR _6859_/Q fanout456/X _7011_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_80_49 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_127_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_676 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold480 _5333_/X _6894_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_145_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold491 _6648_/Q hold491/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1180 _5293_/X _6858_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1191 _6922_/Q _5365_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_33_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_151 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_200 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_593 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_267 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_259 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_127_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_5_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4210_ VGND VPWR _4213_/S _5492_/A1 _4210_/A0 _4210_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5190_ VGND VPWR _5192_/S _5190_/B _5190_/A hold16/X VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_68_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4141_ VGND VPWR _4144_/S _5492_/A1 _4141_/A0 _4141_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4072_ VGND VPWR _4084_/S _4071_/X _4072_/A0 _4072_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4974_ _4983_/B _5008_/C _5021_/B _4974_/B _4974_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_6713_ _6713_/Q _6396_/A _6713_/D _7083_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3925_ _3957_/B input81/X VPWR VGND _6521_/Q _3925_/X VGND VPWR sky130_fd_sc_hd__mux2_8 XFILLER_51_379 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6644_ _6644_/Q fanout487/X _6644_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_20_733 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3856_ hold24/A hold62/A hold81/A hold44/A _3856_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_177_598 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6575_ _6575_/Q _7140_/CLK _6575_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3787_ _6755_/Q _3788_/A _7159_/Q _6404_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_5526_ VGND VPWR _5531_/S _5526_/A1 hold371/X _5526_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5457_ VGND VPWR _5462_/S _5526_/A1 hold343/X _5457_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_132_112 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4408_ _4408_/B _4459_/B _4633_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 XFILLER_132_156 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5388_ VGND VPWR _5390_/S _5469_/A1 hold712/X _5388_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7127_ _7127_/Q fanout486/X _7127_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4339_ _4661_/A _4642_/A _4739_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_115_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_115_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7058_ _7058_/Q _6396_/A _7058_/D _7058_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_115_89 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6009_ VGND VPWR _6014_/A _5961_/X _6006_/X _6939_/Q _6008_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_74_438 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_310 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_181 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_55_696 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_527 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_168_510 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_571 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_171_708 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_451 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_41 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_108_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_49_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_132_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_35 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_65_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_332 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_140 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_150 _5534_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_161 hold666/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_172 _5948_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_183 _6558_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_194 _5473_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_81_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3710_ _6923_/Q _5364_/A _3710_/X _6481_/Q _4044_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_186_351 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_716 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4690_ _4690_/Y _4690_/B _4690_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_119_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3641_ VGND VPWR _3829_/A _6729_/Q _3640_/Y _3641_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_146_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_568 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6360_ VPWR VGND _6360_/X _6400_/B _6360_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3572_ _3580_/B _4145_/A _6950_/Q _6559_/Q _3781_/A2 VGND VPWR _3570_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_127_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5311_ VGND VPWR _5318_/S _5473_/A1 _5311_/A0 _5311_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6291_ _6291_/X _5948_/X _6654_/Q _6699_/Q _5973_/A VGND VPWR _6290_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_114_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5242_ VGND VPWR _5246_/S _5545_/A1 _5242_/A0 _5242_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_605 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_30_csclk _7082_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5173_ _3355_/X _3320_/X _5173_/B1 _5173_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_69_766 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4124_ VGND VPWR _4126_/S _5469_/A1 hold742/X _4124_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_351 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_84_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput1 debug_mode input1/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_4055_ VGND VPWR _4067_/S _4054_/X hold339/X _4055_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_45_csclk _6908_/CLK clkbuf_opt_4_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_37_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_52_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_308 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_319 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4957_ _4574_/Y _4575_/Y _4957_/Y _4956_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3908_ _3909_/B _3908_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4888_ _4379_/B _4469_/A _4887_/A _4633_/B _4892_/B _4947_/C VGND VPWR VGND VPWR + sky130_fd_sc_hd__a2111o_2 XFILLER_138_716 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6627_ _6627_/Q _6627_/D VPWR _6390_/A _6629_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3839_ _3860_/B _6488_/Q _3867_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_192_343 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_259 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6558_ _6558_/Q _6558_/D VPWR _6390_/A _6712_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_192_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_462 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_398 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5509_ VGND VPWR _5513_/S _5509_/A1 hold598/X _5509_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6489_ _6489_/Q _6378_/X _6489_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_106_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_133_487 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_55 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_120_115 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_10 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xwire443 VPWR VGND _6367_/B _3268_/Y VGND VPWR sky130_fd_sc_hd__buf_4 XFILLER_124_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_97_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_80_216 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5860_ _6461_/Q _5624_/X _5860_/X _6666_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_61_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4811_ _4947_/C _4581_/B _4500_/A _5039_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_61_463 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5791_ _6976_/Q _5634_/X _5791_/X _5790_/Y _5652_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4742_ VGND VPWR _4574_/B _4472_/A _4737_/A _4996_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_193_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4673_ _4673_/B _4673_/Y _4673_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_119_248 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6412_ _6412_/Q _6368_/X _6412_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3624_ _6933_/Q _5373_/A _3624_/X _6708_/Q _4316_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_174_398 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6343_ VGND VPWR _6346_/S _6343_/A1 _6342_/X _7147_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3555_ _4238_/A _3555_/A hold66/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_127_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_115_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6274_ _6275_/D _5976_/D _6693_/Q _6622_/Q _5954_/X VGND VPWR _6255_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_143_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3486_ _3486_/Y _3486_/A _3486_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_102_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5225_ VGND VPWR _5228_/S hold60/X _5225_/A0 _5225_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5156_ VGND VPWR _5160_/S _6354_/A1 hold832/X _5156_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_69_585 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4107_ VGND VPWR _4108_/S _5528_/A1 hold433/X _4107_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_235 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5087_ _5115_/C _5087_/B _5087_/Y _5087_/D _5087_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 XFILLER_84_555 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4038_ VPWR VGND _4038_/A _4043_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_71_249 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_452 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_116 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_138 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_176 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5989_ _5989_/C _6001_/C _5989_/A _5989_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XPHY_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_50 _5654_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_61 _6025_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_138_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_72 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_21_21 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_83 _6949_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_153_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_94 _6837_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_180_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_119_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_137_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_184 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_106_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_730 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_134_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput190 _3200_/Y mgmt_gpio_oeb[23] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_121_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_102_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_87_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_238 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_750 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_7 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_677 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_688 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_90 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_94 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_7_67 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold309 _6622_/Q hold309/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_109_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3340_ _5523_/A _3370_/A _3455_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xclkbuf_3_4_0_wb_clk_i _7137_/CLK clkbuf_3_5_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_112_402 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3271_ VGND VPWR _6488_/Q hold44/A hold24/X hold25/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_98_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5010_ _5010_/B _5010_/Y _5010_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_87_80 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1009 _6651_/Q _4252_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_23_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7103__490 _7103__490/LO _7103_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__conb_1 XFILLER_93_352 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6961_ _6961_/Q fanout461/X _6961_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5912_ _6474_/Q _5627_/X _5912_/X _6569_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_53_249 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6892_ _6892_/Q fanout477/X _6892_/D _7067_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5843_ _7114_/D _5843_/A1 _5842_/X _6279_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_21_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_468 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_608 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5774_ _5774_/X _5660_/X _6839_/Q _6807_/Q _5657_/X VGND VPWR _5773_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_21_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4725_ _4725_/Y _4725_/B _5114_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_30_680 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4656_ _4655_/X _4654_/X _4645_/Y _4632_/Y _4660_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_174_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_174_184 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3607_ _3611_/B _5256_/A _6853_/Q _6829_/Q _5283_/A VGND VPWR _3590_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xinput70 _3959_/B mgmt_gpio_in[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xinput81 VPWR VGND spi_sdo input81/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xhold810 _6566_/Q hold810/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold821 _4225_/X _6623_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4587_ _4589_/D _4690_/A _4495_/A _4570_/Y _4580_/X _4586_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 Xinput92 spimemio_flash_io3_oeb input92/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xhold832 _6743_/Q hold832/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold843 _4237_/X _6629_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold854 _6812_/Q hold854/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6326_ _6642_/Q _6326_/A2 _6326_/X _6643_/Q _6326_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3538_ _3538_/D _3538_/C _3538_/Y _3538_/A _3538_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 Xhold865 _5376_/X _6932_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold876 _6471_/Q hold876/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold887 _4002_/X _6444_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_424 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold898 _7077_/Q hold898/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6257_ _7154_/Q _5958_/X _6257_/X _6483_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3469_ _3472_/A _5337_/A _3956_/A _6903_/Q _4083_/S VGND VPWR _3468_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_107_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5208_ VGND VPWR _5210_/S hold42/X hold168/X _5208_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6188_ _6189_/C _5952_/X _6665_/Q _6705_/Q _5938_/X VGND VPWR _6187_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1510 hold20/A _3254_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1521 _5757_/X _7110_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_691 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1532 _7160_/Q _3260_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5139_ _5077_/C _5103_/Y _5001_/B _5138_/X _5143_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 Xhold1543 _7169_/Q _3248_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_123_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1554 _6720_/Q _4731_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1565 hold44/A _3866_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1576 _6524_/Q hold1576/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_123_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1587 _6525_/Q hold622/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_123_78 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1598 _7185_/A hold1598/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_485 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_658 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_590 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_752 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_164_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_164_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_72 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_180_51 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_717 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_766 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_82 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_490 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4510_ _4510_/X _4902_/A _4509_/X _4456_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_157_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_117_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5490_ VPWR VGND _5490_/A _5495_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 Xhold106 _7147_/Q hold106/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_549 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4441_ _4441_/A _4441_/B _4947_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold117 _5387_/X _6942_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold128 _5225_/X _6798_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold139 _6792_/Q hold139/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_508 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7160_ _7160_/Q _6390_/X _7160_/D net399_2/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4372_ VPWR VGND _4372_/X _4591_/A _4702_/B VGND VPWR sky130_fd_sc_hd__and2_1 X_6111_ _6895_/Q _5946_/X _6111_/X _6807_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3323_ hold34/X _3323_/B hold72/X hold73/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_98_433 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_98_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7091_ _7091_/Q fanout460/X _7091_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_112_232 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_98_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6042_ _6042_/X _5948_/X _6908_/Q _6948_/Q _5973_/A VGND VPWR _6041_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3254_ VGND VPWR _3260_/S _3254_/A1 hold97/A _3254_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3185_ _6657_/Q _3185_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_6944_ _6944_/Q fanout463/X _6944_/D _6981_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_54_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6875_ _6875_/Q _6875_/D VPWR fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_179_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5826_ _6465_/Q _5619_/X _5826_/X _6609_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_167_416 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_22_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_449 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5757_ VGND VPWR _6279_/S _5756_/X _5757_/A0 _5757_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_148_674 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4708_ _4689_/B _5062_/B _4639_/Y _4469_/A _4690_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_175_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5688_ _6987_/Q _5627_/X _5688_/X _6875_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4639_ _4716_/A _4707_/C _4639_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold640 _6422_/Q hold640/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold651 _5513_/X _7054_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_711 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_176 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xmax_cap370 hold36/X _3814_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold662 _6616_/Q hold662/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold673 _6912_/Q hold673/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold684 _5217_/X _6791_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6309_ VGND VPWR _6315_/S _6309_/A1 _3762_/Y _7134_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_89_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold695 _5379_/X _6935_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_254 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_76_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_103_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1340 hold1340/A wb_dat_o[15] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1351 _4164_/A1 hold1351/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1362 hold1362/A wb_dat_o[29] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1373 _6308_/A1 hold1373/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1384 _7175_/A _4076_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_175_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_57_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1395 _7025_/Q _5480_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_208 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_25_260 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_173_419 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_622 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_154_655 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_485 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_175_84 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_4_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_67_138 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4990_ _4428_/Y _5003_/C _4846_/B _4948_/A _4645_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_63_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3941_ _3941_/B _3941_/Y _3975_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_6660_ _6660_/Q _6396_/A _6660_/D _7058_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3872_ _3872_/X _7170_/Q _3867_/A _6402_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_149_427 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5611_ _5552_/B _5610_/Y _5611_/Y _5606_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_6591_ _6591_/Q _7130_/CLK _6591_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5542_ VGND VPWR _5549_/S hold667/X _5542_/A0 _5542_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_192_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_157_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_184 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5473_ VGND VPWR hold30/X _5473_/A1 _5473_/A0 _5473_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4424_ _4581_/B _4424_/Y _4500_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_160_625 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7143_ hold4/A fanout487/X _7143_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4355_ _4356_/B _4642_/A _4607_/A _4753_/A _4563_/A _4556_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_113_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout405 VPWR VGND _5519_/A1 hold59/X VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout416 VPWR VGND _6354_/A1 _5465_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout427 VPWR VGND _6352_/B _5490_/B VGND VPWR sky130_fd_sc_hd__buf_6 X_3306_ _5346_/A _3554_/A _3379_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7074_ _7074_/Q fanout479/X _7074_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_140_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout438 VPWR VGND _5552_/B _6507_/Q VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_59_639 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout449 VPWR VGND fanout449/X fanout450/X VGND VPWR sky130_fd_sc_hd__buf_6 X_4286_ VPWR VGND _4286_/A _4291_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_3237_ _3239_/B _6416_/Q _6417_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6025_ VGND VPWR _6025_/B _6025_/X _6017_/X _6226_/B VGND VPWR sky130_fd_sc_hd__and3b_2 XFILLER_100_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_683 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_39_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3168_ _3168_/A _3910_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_54_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_388 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6927_ _6927_/Q fanout460/X _6927_/D _7054_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6858_ _6858_/Q _6858_/D VPWR fanout457/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_168_747 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5809_ _5809_/X _5634_/X _6985_/Q _6977_/Q _5624_/X VGND VPWR _5802_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6789_ _6789_/Q fanout456/X _6789_/D _6963_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_129_33 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_290 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_430 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_346 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_688 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_190_271 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_187 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_198 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_658 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold470 _5415_/X _6967_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold481 _6673_/Q hold481/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold492 _4248_/X _6648_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_296 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1170 _4070_/X _6498_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1181 _6764_/Q _5185_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_642 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1192 _5365_/X _6922_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_163 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_252 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_41_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_279 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_460 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_289 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_484 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4140_ VGND VPWR _4144_/S _6353_/A1 _4140_/A0 _4140_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4071_ VGND VPWR _4118_/B _6354_/A1 hold824/X _4071_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_609 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_91_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_303 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4973_ _4628_/Y _4616_/Y _4970_/Y _4974_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_6712_ _6712_/Q _6712_/D VPWR fanout470/X _6712_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3924_ _3957_/B input78/X VPWR VGND _6519_/Q _3924_/X VGND VPWR sky130_fd_sc_hd__mux2_8 XFILLER_189_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6643_ _6643_/Q fanout487/X _6643_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_149_246 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3855_ VGND VPWR _3866_/S _3855_/A1 _3854_/X _6411_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_6574_ _6574_/Q _7137_/CLK _6574_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3786_ _3793_/B _4038_/A _6866_/Q _6475_/Q _5301_/A VGND VPWR _3785_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5525_ VGND VPWR _5531_/S _5543_/A1 hold543/X _5525_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5456_ VGND VPWR _5462_/S _5465_/A1 hold253/X _5456_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_172_282 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_160_444 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_133_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_132_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4407_ VPWR VGND _4551_/A _4498_/A _4570_/A VGND VPWR sky130_fd_sc_hd__and2_2 X_5387_ VGND VPWR _5390_/S hold60/X hold116/X _5387_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_168 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7126_ _7126_/Q fanout459/X _7126_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_59_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4338_ VGND VPWR _4564_/A _4338_/B _4338_/A _4338_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_113_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_115_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_140_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7057_ _7057_/Q fanout478/X _7057_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4269_ VGND VPWR _4273_/S _6353_/A1 _4269_/A0 _4269_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_115_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6008_ _6008_/X _5967_/X _7011_/Q _6851_/Q _5940_/X VGND VPWR _6005_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_101_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_322 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_174 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_131_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_522 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_168_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_24_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_566 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_24_98 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_168_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_463 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_156_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_485 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_124_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_712 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_211 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_172_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_65_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_73_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_140 _6226_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_60_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_151 _5473_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_162 _5193_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_173 _5953_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_184 _6853_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_195 _5490_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3640_ _3640_/D _3640_/C _3640_/B _3640_/Y _3597_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4b_4 X_3571_ _3571_/B _4145_/A _3571_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_127_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_161_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5310_ _5318_/S _5541_/B _5310_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_6290_ _6649_/Q _5976_/C _6290_/X _6569_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_127_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5241_ VGND VPWR _5246_/S _5484_/A1 hold854/X _5241_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5172_ VGND VPWR _5172_/S _5491_/A1 _5172_/A0 _5172_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4123_ VGND VPWR _4126_/S hold60/X hold158/X _4123_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_575 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput2 VGND VPWR input2/X debug_oeb VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4054_ VGND VPWR _4058_/S _5534_/A1 hold622/X _4054_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_opt_1_0_csclk clkbuf_leaf_4_csclk/A clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_16 XFILLER_36_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_51_122 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_667 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_155 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4956_ _4965_/B _4554_/B _4956_/Y _5051_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3907_ _3907_/B _3907_/A _3909_/B _3907_/D _3907_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4_2 X_4887_ _4887_/B _4900_/B _4887_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6626_ _6626_/Q fanout469/X _6626_/D _6769_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3838_ _3838_/B _6415_/D _3838_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_192_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6557_ _6557_/Q _6390_/A _6557_/D _6629_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3769_ _6786_/Q _5211_/A _3769_/X _6675_/Q _4280_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5508_ VGND VPWR _5513_/S _5526_/A1 hold335/X _5508_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_3_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6488_ _6488_/Q _6377_/X _6488_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_106_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5439_ VGND VPWR _5444_/S _5526_/A1 hold337/X _5439_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_200 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_211 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_86_38 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7109_ _7109_/Q fanout456/X _7109_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_47_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_74_214 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_55_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_314 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_156_514 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_51_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_167_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_741 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_62 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_65_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_631 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4810_ _4810_/B _4810_/Y _4810_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_92_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5790_ _5790_/Y _6920_/Q _5899_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_4741_ _4741_/B _4992_/B _4741_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_33_199 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4672_ _4672_/B _4984_/B _4672_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6411_ hold70/A _6367_/X _6411_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3623_ _3628_/B _4127_/A _7021_/Q _6543_/Q hold29/A VGND VPWR _3587_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_134_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6342_ _6342_/X _6342_/B1 _6642_/Q _6350_/A2 _6342_/A2 VGND VPWR _6341_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3554_ _4268_/A _3554_/A _3814_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_6273_ _6275_/C _5949_/X _6558_/Q _6678_/Q _5971_/B VGND VPWR _6272_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_3485_ VGND VPWR _3486_/B _3485_/B _3485_/A _3485_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_103_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5224_ VGND VPWR _5228_/S _5494_/A1 hold200/X _5224_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5155_ VGND VPWR _5160_/S _5491_/A1 _5155_/A0 _5155_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_69_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4106_ VGND VPWR _4108_/S _6356_/A1 hold752/X _4106_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5086_ VGND VPWR _5114_/D _5086_/B _5088_/A _5086_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_56_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_84_567 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4037_ VGND VPWR _4037_/S _6357_/A1 hold582/X _4037_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_71_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_112_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_634 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_117 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_128 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5988_ _5989_/C _5938_/X _7047_/Q _6922_/Q _5971_/A VGND VPWR _5980_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XPHY_139 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4939_ _4484_/Y _5073_/B _4967_/A _4923_/Y _4460_/A _4563_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XANTENNA_40 _5300_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_51 _5940_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_165_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XANTENNA_62 _6025_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_73 _6100_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6609_ _6609_/Q fanout454/X _6609_/D _6653_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_138_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_84 _7152_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_21_33 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_95 _6405_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_137_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_306 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput180 _3209_/Y mgmt_gpio_oeb[14] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput191 _3199_/Y mgmt_gpio_oeb[24] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_153_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_47_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_494 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_8 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_43_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_7_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_303 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_7_79 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_44_csclk _7016_/CLK _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_109_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_369 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_701 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_112_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_124_274 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3270_ _3875_/B _6487_/Q hold15/A _7171_/Q _7156_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 Xclkbuf_leaf_59_csclk _7053_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_97_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6960_ _6960_/Q fanout465/X _6960_/D _6997_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5911_ _3225_/Y _5651_/B _5911_/Y _5899_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_19_483 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6891_ _6891_/D VPWR _6891_/Q fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5842_ VGND VPWR _5842_/X _7113_/Q _6103_/B1 _5552_/B _5841_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_61_261 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_615 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5773_ hold56/A _5619_/X _5773_/X _6863_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4724_ _4775_/B _4972_/A _4724_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_147_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4655_ _4628_/Y _4655_/X _4653_/Y _4626_/Y _4609_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 Xinput60 VPWR VGND input60/X mgmt_gpio_in[31] VGND VPWR sky130_fd_sc_hd__buf_2 Xhold800 _6823_/Q hold800/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3606_ _3611_/A _4139_/A _6797_/Q _6553_/Q _3326_/Y VGND VPWR _3605_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xinput71 mgmt_gpio_in[8] input71/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xhold811 _4159_/X _6566_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput82 VPWR VGND spi_sdoenb input82/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 X_4586_ _4583_/X _4942_/A _4951_/B _4563_/A _4586_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 Xhold822 _6605_/Q hold822/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput93 VPWR VGND input93/X trap VGND VPWR sky130_fd_sc_hd__buf_4 Xhold833 _5156_/X _6743_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold844 _6828_/Q hold844/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6325_ VGND VPWR _6346_/S _6325_/A1 _6324_/X _7141_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold855 _5241_/X _6812_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3537_ _3538_/D _3964_/A _6926_/Q _6422_/Q _5364_/A VGND VPWR _3536_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold866 _6547_/Q hold866/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold877 _4034_/X _6471_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold888 _6652_/Q hold888/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold899 _5539_/X _7077_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6256_ _6612_/Q _5943_/X _6256_/X _6658_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_103_436 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3468_ _7076_/Q _5532_/A _3468_/X _6887_/Q _5319_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_170_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5207_ VGND VPWR _5210_/S _5528_/A1 hold766/X _5207_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_76_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6187_ _6460_/Q _5945_/X _6187_/X _6578_/Q _5975_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1500 hold4/A _6331_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3399_ _3409_/B hold76/A _6841_/Q _7046_/Q _5265_/A VGND VPWR _3398_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_191_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1511 _3254_/X _7166_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1522 hold11/A _6328_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_69_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1533 _7148_/Q _6346_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5138_ VGND VPWR _5138_/X _5138_/B _5138_/A _5138_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_96_180 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1544 _3248_/X _7169_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1555 hold62/A _3858_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_123_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1566 _6637_/Q _3879_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1577 _6755_/Q hold1577/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1588 _7177_/A hold405/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5069_ _5103_/B _5069_/C _5069_/A _5069_/B _5069_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_45_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_84_375 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1599 _7089_/Q _5561_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_397 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_25_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_445 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_322 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_148_54 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_181_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_148_98 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_764 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_164_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_79_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_95_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_48_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_180_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_29_770 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_35_239 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_431 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_83 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4440_ _4724_/A _4690_/A _4495_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold107 _3977_/X hold98/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold118 _6790_/Q hold118/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_133 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold129 hold129/A hold129/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4371_ _4566_/A _4374_/B _4702_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_125_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6110_ VGND VPWR _6115_/A _5961_/X _6108_/X _6943_/Q _6109_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_98_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3322_ _5193_/A _3455_/A hold48/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7090_ _7090_/Q fanout460/X _7090_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_152_391 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6041_ _6900_/Q _5976_/C _6041_/X _6828_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_58_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3253_ VGND VPWR _3253_/S _3253_/A1 _3252_/Y _7167_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3184_ _6541_/Q _3184_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_6943_ _6943_/Q fanout464/X _6943_/D _6999_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_19_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6874_ _6874_/Q _6874_/D VPWR fanout476/X _7051_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_5825_ _6695_/Q _5637_/X _5825_/X _6455_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_179_288 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5756_ VGND VPWR _6303_/S _5755_/X _7109_/Q _5756_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4707_ _4716_/A _4707_/Y _4911_/B _4707_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_5687_ _5690_/C _5635_/X _7011_/Q _6827_/Q _5630_/X VGND VPWR _5686_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_175_483 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4638_ _4638_/Y _4638_/A _4661_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 Xhold630 _6431_/Q hold630/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_163_689 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold641 _3974_/X _6422_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4569_ _4636_/A _5099_/A _5043_/A _4737_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 Xhold652 _6829_/Q hold652/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xmax_cap371 hold35/X hold36/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold663 _4217_/X _6616_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_162_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold674 _5353_/X _6912_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6308_ VGND VPWR _6315_/S _6308_/A1 _3828_/Y _7133_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xmax_cap382 VPWR VGND _5913_/B1 _5660_/X VGND VPWR sky130_fd_sc_hd__buf_6 Xhold685 _6993_/Q hold685/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold696 hold696/A hold696/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6239_ _6240_/C _5975_/C _6462_/Q _6580_/Q _5945_/X VGND VPWR _6238_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_103_266 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_76_117 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1330 hold1330/A wb_dat_o[8] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1341 hold1426/X hold1341/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1352 hold1352/A wb_dat_o[16] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_91_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1363 _6309_/A1 hold1363/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1374 hold1374/A wb_dat_o[24] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_17_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1385 _6529_/Q _4115_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1396 _7161_/Q hold1/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_60_518 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_203 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_75 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_41 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_667 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_107_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_181_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_0_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_84_60 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_164 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3940_ VGND VPWR _6762_/Q _6758_/Q _7105_/Q _3940_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_63_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_261 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3871_ _3912_/B1 _6403_/Q _3837_/B _3837_/C _6403_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 X_5610_ _5610_/B _5610_/Y _6507_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_6590_ _6590_/Q _7137_/CLK _6590_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_83_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5541_ _5549_/S _5541_/B _5541_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_157_483 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5472_ hold30/A _5541_/B hold29/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_4423_ _4600_/B _4626_/B _4581_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_160_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7142_ hold11/A fanout487/X _7142_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4354_ _4357_/B _4356_/A _4642_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xfanout406 VPWR VGND _6356_/A1 _5494_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_98_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_113_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xfanout417 VPWR VGND _5492_/A1 _5465_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 Xfanout428 VPWR VGND _5490_/B hold17/X VGND VPWR sky130_fd_sc_hd__buf_4 X_3305_ _3313_/A hold27/X _3379_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7073_ _7073_/Q _6390_/A _7073_/D _7083_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4285_ VGND VPWR _4285_/S hold60/X hold229/X _4285_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6024_ _6024_/D _6024_/C _6025_/B _6024_/A _6024_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_3236_ VPWR VGND _3264_/B _6416_/Q _6417_/Q VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_73_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_54_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3167_ hold44/A _3167_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_27_548 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6926_ _6926_/Q fanout457/X _6926_/D _6926_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_6857_ _6857_/Q fanout482/X _6857_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_167_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5808_ VGND VPWR _5804_/X _5808_/X _5807_/X _6945_/Q _5632_/X _5805_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_167_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6788_ _6788_/Q fanout458/X hold19/X _7012_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_22_286 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5739_ _7022_/Q _5619_/X _5739_/X _6862_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_148_461 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_45 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_129_89 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_2_614 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold460 _5288_/X _6854_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold471 _6662_/Q hold471/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_391 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold482 _4278_/X _6673_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold493 _6612_/Q hold493/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1160 _5194_/X _6770_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_161_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1171 _6810_/Q _5239_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1182 _5185_/X _6764_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1193 _6700_/Q _4311_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_54_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_54_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_159_715 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_297 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_139_472 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_111 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_126_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_2_2__f_mgmt_gpio_in[4] _3568_/A1 clkbuf_0_mgmt_gpio_in[4]/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_181_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_96_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4070_ VGND VPWR _4084_/S _4069_/X _4070_/A0 _4070_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_459 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_334 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_570 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4972_ _5008_/C _5010_/B _4972_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_51_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6711_ _6711_/Q fanout470/X _6711_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3923_ _3957_/B input80/X VPWR VGND _6518_/Q _3923_/X VGND VPWR sky130_fd_sc_hd__mux2_8 XFILLER_189_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_149_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6642_ _6642_/Q fanout487/X _6642_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3854_ VGND VPWR _3854_/S _3283_/Y _3284_/X _3854_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_20_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6573_ _6573_/Q _7140_/CLK _6573_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_118_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3785_ _7039_/Q hold76/A _3785_/X _6710_/Q _4322_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_164_239 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5524_ VGND VPWR _5531_/S _5524_/A1 _5524_/A0 _5524_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_118_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5455_ VGND VPWR _5462_/S _5524_/A1 _5455_/A0 _5455_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4406_ _4570_/A _4739_/A _4415_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 X_5386_ VGND VPWR _5390_/S _5494_/A1 hold217/X _5386_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_120_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7125_ _7125_/Q fanout459/X _7125_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_99_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4337_ _4338_/C _4337_/C _4337_/A _4337_/B _4337_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_59_426 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7056_ _7056_/D VPWR _7056_/Q fanout485/X _7085_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_101_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4268_ VPWR VGND _4268_/A _4273_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_6007_ _6024_/A _5954_/X _7080_/Q _7056_/Q _5976_/B VGND VPWR _6004_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3219_ _3219_/Y _6821_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 X_4199_ VGND VPWR _4201_/S _5544_/A1 _4199_/A0 _4199_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_131_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6909_ _6909_/Q fanout481/X _6909_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_23_595 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_50_381 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_278 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_227 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_156_65 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_103 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold290 _5222_/X _6795_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_45_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_473 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_130 _3923_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_141 _6226_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_33_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_152 _5552_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_163 _5532_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_174 _5976_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_185 _7173_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_196 hold94/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_159_545 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_83 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3570_ _7059_/Q hold86/A _3570_/X _6454_/Q _4008_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_115_626 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5240_ VGND VPWR _5246_/S _5543_/A1 hold604/X _5240_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_46_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_130_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5171_ VGND VPWR _5172_/S _5171_/B _5186_/A _6352_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_96_510 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_223 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4122_ VGND VPWR _4126_/S _5494_/A1 hold243/X _4122_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4053_ VGND VPWR _4067_/S _4052_/X _4053_/A0 _4053_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput3 VGND VPWR input3/X debug_out VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_83_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4955_ VGND VPWR _5039_/D _4964_/B _5068_/A _5068_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_52_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3906_ VGND VPWR _3907_/D _3906_/B _3906_/A _3906_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_4886_ _4886_/B _4887_/B _5010_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_177_364 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6625_ _6625_/Q _6390_/A _6625_/D _6629_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3837_ VGND VPWR _3838_/B _3837_/B _3837_/A _3837_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6556_ _6556_/Q _6390_/A _6556_/D _6629_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3768_ _3773_/B _4014_/A _6418_/Q _6455_/Q _3964_/A VGND VPWR _3767_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_152_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5507_ VGND VPWR _5513_/S _5543_/A1 hold558/X _5507_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6487_ _6487_/Q _6376_/X _6487_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3699_ _3700_/C _3699_/C _3699_/A _3699_/B _3699_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_5438_ VGND VPWR _5444_/S _5543_/A1 hold570/X _5438_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput340 hold1375/X hold1376/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5369_ VGND VPWR _5372_/S _6357_/A1 hold568/X _5369_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7108_ _7108_/Q fanout456/X _7108_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_7039_ _7039_/Q _7039_/D VPWR fanout470/X _7083_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_47_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_74_226 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_487 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_353 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_129_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_167_31 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_7_547 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_367 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_183_378 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_124_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_38_407 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_65_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_602 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4740_ _4741_/B _4740_/B _4740_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_187_651 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_673 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_159_364 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4671_ _4679_/B _4671_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 X_6410_ hold62/A _6366_/X _6410_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3622_ _3628_/A _4304_/A _6429_/Q _6698_/Q _3981_/A VGND VPWR _3621_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6341_ _6644_/Q _6341_/A2 _6341_/X _6643_/Q _6341_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3553_ _3562_/B _4298_/A hold36/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_6272_ _7037_/Q _5601_/X _6272_/X _6718_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3484_ _3484_/D _3484_/C _3485_/C _3484_/A _3484_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_142_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5223_ VGND VPWR _5228_/S _5526_/A1 hold381/X _5223_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_103_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5154_ VPWR VGND _5154_/A _5160_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_4105_ VGND VPWR _4108_/S _5544_/A1 hold237/X _4105_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_111_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5085_ VGND VPWR _5087_/D _5085_/B _5085_/A _5085_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_4036_ VGND VPWR _4037_/S _6356_/A1 hold778/X _4036_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_59 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_25_646 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_107 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5987_ _5989_/B _5981_/X _6442_/Q _6914_/Q _5601_/X VGND VPWR _5950_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XPHY_118 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4938_ _4941_/B _5068_/B _5068_/A _5046_/A _5103_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_178_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_30 _3612_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_41 _5300_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4869_ VGND VPWR _4869_/C _4841_/X _4870_/C _4869_/D _4869_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XANTENNA_52 _5973_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_63 _6025_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_20_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6608_ _6608_/Q fanout448/X _6608_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_119_740 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_74 _6268_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_85 _6467_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_192_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_96 _6406_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_153_518 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_21_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6539_ _6539_/Q fanout461/X _6539_/D _6539_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_137_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_318 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_106_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput181 _3208_/Y mgmt_gpio_oeb[15] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput192 _3198_/Y mgmt_gpio_oeb[25] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_87_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_204 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_47_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_259 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_624 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_270 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_55_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_605 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_102_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_96 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_1_1__f__1177_ _6312_/A0 clkbuf_0__1177_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_7_377 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_3_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_124_286 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_140_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_738 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_310 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_395 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5910_ _6618_/Q _5628_/X _5910_/X _6629_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6890_ _6890_/Q _6890_/D VPWR fanout476/X _6890_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_34_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_752 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5841_ _5652_/Y _5841_/X _5828_/X _6303_/S _6540_/Q _5840_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_22_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5772_ _5772_/X _5648_/X _6903_/Q _6855_/Q _5621_/X VGND VPWR _5771_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_21_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4723_ _5046_/A _4723_/B _4984_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_4654_ _4653_/Y _4619_/Y _4846_/B _4654_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 Xinput50 VPWR VGND input50/X mgmt_gpio_in[22] VGND VPWR sky130_fd_sc_hd__buf_2 X_3605_ _6628_/Q _4232_/A _3605_/X _6648_/Q _4244_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_147_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput61 VGND VPWR input61/X mgmt_gpio_in[32] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput72 VPWR VGND mgmt_gpio_in[9] input72/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xhold801 _5253_/X _6823_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4585_ _4951_/B _4881_/B _5051_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold812 hold812/A hold812/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_174_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput83 VPWR VGND input83/X spimemio_flash_clk VGND VPWR sky130_fd_sc_hd__buf_2 Xhold823 _4204_/X _6605_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput94 VGND VPWR _3956_/B uart_enabled VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xhold834 _6701_/Q hold834/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6324_ _6324_/X _6324_/B1 _6644_/Q _6643_/Q _6324_/A2 VGND VPWR _6323_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3536_ _7075_/Q _5532_/A _3536_/X _6684_/Q _4286_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 Xhold845 _5259_/X _6828_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold856 _6908_/Q hold856/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold867 _4136_/X _6547_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_89_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_26 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold878 _7028_/Q hold878/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold889 _4253_/X _6652_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6255_ _6663_/Q _5976_/B _6255_/X _6713_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3467_ _3467_/D _3467_/C _3467_/Y _3467_/A _3467_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_5206_ VGND VPWR _5210_/S _5509_/A1 hold904/X _5206_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6186_ _6189_/B _5965_/X _6450_/Q _6545_/Q _5947_/X VGND VPWR _6185_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3398_ _3398_/X _3964_/A input28/X _6425_/Q _3367_/Y VGND VPWR _3384_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1501 _7120_/Q _6028_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1512 _6598_/Q _4195_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5137_ _4542_/D _5138_/C _4846_/B _4769_/A _4428_/Y _4653_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold1523 _7144_/Q _6334_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1534 _7123_/Q _6104_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1545 _7183_/A hold89/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_96_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1556 _6506_/Q _3894_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1567 _6417_/Q _3834_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5068_ VGND VPWR _5069_/D _5068_/B _5068_/A _5068_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1578 _6538_/Q hold1578/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1589 _6532_/Q hold1589/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_44_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4019_ VGND VPWR _4019_/S _6357_/A1 hold616/X _4019_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_262 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_571 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_180_101 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_495 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_724 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_267 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_513 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_102_470 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_87_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_91 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_90_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_443 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold108 hold98/X hold108/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_156_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold119 _5216_/X _6790_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_145 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4370_ _4495_/A _4556_/A _4441_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_125_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3321_ hold47/X _3454_/B hold48/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_140_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_457 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6040_ _6040_/C _6040_/Y _6040_/A _6040_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_3252_ VGND VPWR _6485_/Q _7167_/Q _3262_/C _3252_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_79_660 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_129 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3183_ _6655_/Q _3183_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_94_652 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_302 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6942_ _6942_/Q fanout457/X _6942_/D _7006_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6873_ _6873_/Q fanout473/X _6873_/D _7070_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5824_ _5824_/X _5655_/X _6599_/Q _6545_/Q _5616_/X VGND VPWR _5823_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_50_744 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5755_ wire367/X _5755_/X _5754_/Y _5652_/Y _6790_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_4706_ VGND VPWR _4706_/C _4693_/X _4722_/B _4706_/D _4706_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_147_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5686_ _6851_/Q _5648_/X _5686_/X _6883_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4637_ VPWR VGND _4638_/A _4707_/C _4661_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_147_186 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_190_443 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold620 _6430_/Q hold620/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold631 _3987_/X _6431_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4568_ _4568_/B _4741_/A _4664_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 Xhold642 _6657_/Q hold642/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold653 _5260_/X _6829_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xmax_cap361 VPWR VGND _4058_/S hold37/X VGND VPWR sky130_fd_sc_hd__buf_6 Xhold664 _7141_/Q hold664/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3519_ _3523_/C _4214_/A _6910_/Q _6618_/Q _5346_/A VGND VPWR _3518_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6307_ _6315_/S _6636_/Q _6307_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xhold675 _6913_/Q hold675/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xmax_cap383 _5658_/X _5910_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold686 _5444_/X _6993_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4499_ _4535_/A _4582_/B _5051_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold697 _5179_/X _6760_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6238_ _6667_/Q _5938_/X _6238_/X _6707_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_57_310 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6169_ _7054_/Q _5971_/A _6169_/X _6993_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 Xhold1320 hold1320/A wb_dat_o[18] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1331 hold1420/X hold1331/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1342 hold1342/A wb_dat_o[9] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1353 _4183_/A1 hold1353/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1364 hold1364/A wb_dat_o[25] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1375 _4192_/A1 hold1375/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1386 _7044_/Q _5502_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1397 _7086_/Q _5549_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_34 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_184 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_43_csclk _6920_/CLK _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_25_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_221 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_21 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_58_csclk _6953_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_43_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_193_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_154_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_634 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_175_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_595 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_76_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_48_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_376 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_176 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_273 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3870_ VGND VPWR _3870_/S _3912_/A1 _6404_/Q _6404_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XPHY_290 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5540_ VGND VPWR _5540_/S _5540_/A1 hold397/X _5540_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_192_719 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5471_ VGND VPWR _5471_/S _5513_/A1 hold626/X _5471_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_157_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_117_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4422_ _4921_/A _4607_/A _4947_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_7141_ _7141_/Q fanout487/X _7141_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_125_370 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4353_ VPWR VGND _4896_/A _4360_/B _4379_/B VGND VPWR sky130_fd_sc_hd__and2_1 Xfanout407 hold156/X _5494_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xfanout418 _5465_/A1 hold13/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_3304_ _5190_/A hold27/X _3313_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_7072_ _7072_/Q _7072_/D VPWR fanout470/X _7083_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_4284_ VGND VPWR _4285_/S _5494_/A1 hold194/X _4284_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xfanout429 hold16/X hold17/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_98_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6023_ _6024_/D _5949_/X _6811_/Q _6931_/Q _5971_/B VGND VPWR _6022_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_3235_ VGND VPWR _3235_/S _3251_/A _3235_/A0 _7170_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_67_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3166_ _3837_/A _6415_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_27_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6925_ _6925_/Q fanout461/X _6925_/D _6925_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_35_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_210 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6856_ _6856_/Q fanout464/X _6856_/D _6981_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5807_ _5807_/X _5638_/X _7017_/Q _6961_/Q _5630_/X VGND VPWR _5806_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6787_ _6787_/D VPWR _6787_/Q fanout458/X _7012_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3999_ _4007_/S _5541_/B _3999_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_5738_ _6966_/Q _5642_/X _5738_/X _6814_/Q _5667_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_13_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_175_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5669_ _5669_/D _5669_/C _5670_/B _5669_/A _5669_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_191_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_2_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold450 _5352_/X _6911_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold461 _6627_/Q hold461/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold472 _4265_/X _6662_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold483 _7051_/Q hold483/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold494 _4212_/X _6612_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_161_11 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1150 _5347_/X _6906_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_600 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_460 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1161 _7018_/Q _5473_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_58_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1172 _5239_/X _6810_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1183 _6455_/Q _4015_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1194 _4311_/X _6700_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_54_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_338 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_139_484 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_63 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_135_690 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_2_1_0_wb_clk_i clkbuf_3_3_0_wb_clk_i/A clkbuf_2_1_0_wb_clk_i/A VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_1_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_110_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_696 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_346 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4971_ _4902_/B _4645_/Y _4691_/A _4625_/B _4974_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_91_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6710_ _6710_/Q fanout470/X _6710_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3922_ _3957_/B input82/X VPWR VGND _3188_/Y _3922_/X VGND VPWR sky130_fd_sc_hd__mux2_8 XFILLER_51_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6641_ _6641_/Q fanout487/X _6641_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3853_ VGND VPWR _3853_/B _6412_/D _3853_/A VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_177_535 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_574 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6572_ _6572_/Q _7140_/CLK _6572_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3784_ _3793_/A _5154_/A _6954_/Q _6742_/Q _5400_/A VGND VPWR _3783_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_192_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5523_ _5531_/S _5541_/B _5523_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_157_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5454_ _5461_/S hold17/X _5454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_105_307 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_104 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_178 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4405_ _4810_/A _4459_/A _4549_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_5385_ VGND VPWR _5390_/S _5526_/A1 hold399/X _5385_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_132_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7124_ _7124_/Q fanout459/X _7124_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4336_ _4338_/B _4336_/C _4336_/A _4336_/B _4336_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_87_703 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_351 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7055_ _7055_/D VPWR _7055_/Q _6396_/A _7079_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_4267_ VGND VPWR _4267_/S _5546_/A1 hold830/X _4267_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6006_ _7003_/Q _5958_/X _6006_/X _6995_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3218_ _6829_/Q _3218_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4198_ VGND VPWR _4201_/S _5492_/A1 _4198_/A0 _4198_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_644 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_195 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_54_154 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6908_ _6908_/Q fanout475/X _6908_/D _6908_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6839_ _6839_/Q fanout464/X _6839_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_50_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_719 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_136_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_163_262 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold280 _5188_/X _6766_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold291 hold291/A hold291/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_86 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_73_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_46_677 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_120 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_131 _3925_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_142 _6279_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_61_647 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_153 _3927_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_33_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_164 _4157_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_175 _5975_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_186 _7118_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_159_524 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_197 hold99/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_81_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_139_292 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_571 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_182_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_115_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5170_ VGND VPWR _5170_/S _5494_/A1 hold211/X _5170_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_123_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_522 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4121_ VGND VPWR _4126_/S _5526_/A1 hold401/X _4121_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_235 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4052_ VGND VPWR _4058_/S _5473_/A1 _4110_/A0 _4052_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xinput4 VPWR VGND mask_rev_in[0] input4/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_36_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_260 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_51_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_91_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4954_ _4962_/B _4953_/Y _5057_/B _5047_/A _4946_/X _4413_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 X_3905_ _4335_/B _4335_/A _3906_/C _4336_/C _4336_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_4885_ _4884_/X _6721_/D _4839_/X _4885_/B2 _5006_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_6624_ _6624_/Q fanout487/X _6624_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_165_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3836_ _3836_/B _6416_/D _3836_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6555_ _6555_/Q fanout470/X _6555_/D _6712_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3767_ _7047_/Q _5505_/A _3767_/X _6751_/Q _5166_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5506_ VGND VPWR _5513_/S _5524_/A1 _5506_/A0 _5506_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_106_616 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6486_ _6486_/Q _6375_/X _6486_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3698_ _3698_/D _3698_/C _3699_/D _3698_/A _3698_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 Xoutput330 hold1373/X hold1374/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5437_ VGND VPWR _5444_/S _5524_/A1 _5437_/A0 _5437_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_221 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput341 hold1331/X hold1332/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_105_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5368_ VGND VPWR _5372_/S _5494_/A1 hold241/X _5368_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_86_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7107_ _7107_/Q fanout456/X _7107_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_99_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4319_ VGND VPWR _4321_/S _6355_/A1 hold954/X _4319_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5299_ VGND VPWR _5300_/S _5521_/A1 hold669/X _5299_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7038_ _7038_/Q fanout455/X _7038_/D _7038_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_74_238 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_750 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_168_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_515 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_137_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_519 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_76_51 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_614 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_190 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4670_ VPWR VGND _4671_/A _4676_/B _4928_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_187_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3621_ _6981_/Q _5427_/A _3621_/X _6463_/Q _4020_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6340_ VGND VPWR _6346_/S _6340_/A1 _6339_/X _7146_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3552_ _3552_/D _3552_/C _3581_/B _3552_/A _3552_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_143_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6271_ _6275_/B _5975_/A _6458_/Q _6602_/Q _5944_/X VGND VPWR _6270_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3483_ _3484_/D _5256_/A _6895_/Q _6831_/Q _5328_/A VGND VPWR _3482_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_143_766 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5222_ VGND VPWR _5228_/S _5465_/A1 hold289/X _5222_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_319 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5153_ VGND VPWR _5153_/S _6357_/A1 hold564/X _5153_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4104_ VGND VPWR _4108_/S _5492_/A1 _4104_/A0 _4104_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_111_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_57_717 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5084_ _5085_/C _5084_/C _5084_/A _5084_/B _5084_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_111_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4035_ VGND VPWR _4037_/S _6355_/A1 hold948/X _4035_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_24_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_658 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_108 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5986_ VGND VPWR _5989_/A _5971_/C _5982_/X _7039_/Q _5985_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XPHY_119 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_129 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4937_ _4922_/X _4668_/C _4996_/C _4671_/A _4921_/A _4737_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__a311oi_2 XFILLER_40_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_20 _3494_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_31 _3618_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4868_ _4672_/B _4869_/D _4643_/Y _4442_/Y _4846_/A _4694_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XANTENNA_42 _5300_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_53 _5948_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6607_ _6607_/Q fanout447/X _6607_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XANTENNA_64 _6051_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3819_ _3826_/A _3692_/Y _6555_/Q _6767_/Q _4145_/A VGND VPWR _3818_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XANTENNA_75 _6276_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_20_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4799_ _4798_/X _5008_/A _4673_/A _4483_/Y _4799_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XANTENNA_86 _7021_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_97 _6406_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6538_ _6538_/Q _6360_/A _6538_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_21_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_518 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_146_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_137_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_161_530 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6469_ _6469_/Q fanout454/X hold69/X _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_121_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput171 _3958_/X debug_in VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput182 _3207_/Y mgmt_gpio_oeb[16] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput193 _3197_/Y mgmt_gpio_oeb[26] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_121_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_514 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_47_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_219 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_31_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_296 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_75 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_527 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_363 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_262 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_152_574 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_569 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_47_761 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5840_ VGND VPWR _5829_/X _5840_/X _5839_/X _6450_/Q _5634_/X _5833_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_34_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_22_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5771_ _6871_/Q _5628_/X _5771_/X _6887_/Q _5658_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_21_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4722_ _4725_/B _4722_/C _4722_/A _4722_/B _4722_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_187_460 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4653_ _4653_/Y _4716_/A _4653_/B _4653_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 XFILLER_174_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_147_357 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput40 VGND VPWR input40/X mgmt_gpio_in[13] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_3604_ _3604_/D _3604_/C _3604_/Y _3604_/A _3604_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 Xinput51 mgmt_gpio_in[23] input51/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_162_316 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput62 VPWR VGND input62/X mgmt_gpio_in[33] VGND VPWR sky130_fd_sc_hd__buf_2 Xhold802 _6966_/Q hold802/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4584_ _4942_/A _5043_/A _4584_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xinput73 VGND VPWR _3952_/B pad_flash_io0_di VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput84 VPWR VGND input84/X spimemio_flash_csb VGND VPWR sky130_fd_sc_hd__buf_2 Xhold813 _4114_/X _6528_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_733 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold824 hold824/A hold824/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6323_ _6642_/Q _6323_/A2 _6323_/X _4230_/B _6323_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xinput95 input95/X usr1_vcc_pwrgood VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 X_3535_ _3571_/B _4286_/A hold36/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xhold835 _4312_/X _6701_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold846 _6456_/Q hold846/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold857 _5349_/X _6908_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold868 _6892_/Q hold868/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold879 _5484_/X _7028_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6254_ VGND VPWR _6279_/S _6253_/X _6278_/A0 _6254_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3466_ _3467_/D _5247_/A _6983_/Q _6823_/Q _5427_/A VGND VPWR _3460_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_89_639 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_143_585 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5205_ VGND VPWR _5210_/S _5484_/A1 _5205_/A0 _5205_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_103_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6185_ _6630_/Q _5946_/X _6185_/X _6550_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3397_ _3409_/A _5211_/A _3959_/B _6793_/Q _4083_/S VGND VPWR _3396_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1502 _6028_/X _7120_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1513 _7119_/Q _6003_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5136_ _6726_/Q _4229_/X _5136_/X _5135_/Y _5112_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_84_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1524 _7109_/Q _5736_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_111_471 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1535 _6584_/Q _4180_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1546 _7115_/Q _5865_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1557 _7132_/Q hold1557/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5067_ _5134_/B _5006_/Y _5067_/Y _5066_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 Xhold1568 _7093_/Q _5575_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1579 _6416_/Q _3835_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_506 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4018_ VGND VPWR _4019_/S _6356_/A1 hold756/X _4018_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_44_219 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_274 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5969_ _5969_/A _5979_/A _5969_/C _5971_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_185_408 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_600 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_8_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_106_276 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_75_311 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_42 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_57_64 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_455 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold109 _3978_/X _6424_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3320_ _3453_/A _3320_/X hold47/X hold64/X VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 XFILLER_180_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3251_ _3262_/C _6485_/Q _3251_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_140_555 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_85_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3182_ _6489_/Q _3182_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_94_664 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_314 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6941_ _6941_/Q fanout461/X _6941_/D _7054_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_93_185 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6872_ _6872_/Q fanout473/X _6872_/D _6920_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_34_263 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5823_ _6470_/Q _5627_/X _5823_/X _6565_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5754_ _5754_/C _5754_/Y _5754_/A _5754_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 XFILLER_148_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4705_ _4644_/Y _4706_/D _4702_/Y _4704_/X _4689_/A _4673_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_5685_ _5690_/B _5654_/X _6979_/Q _6931_/Q _5624_/X VGND VPWR _5684_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_147_143 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4636_ _4658_/C _4646_/A _4636_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_147_198 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_658 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold610 _6511_/Q hold610/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold621 _3986_/X _6430_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_118_48 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4567_ VPWR VGND _4737_/A _4568_/B _4664_/B VGND VPWR sky130_fd_sc_hd__and2b_2 Xhold632 _6841_/Q hold632/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold643 _4259_/X _6657_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_563 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold654 _6929_/Q hold654/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6306_ _6636_/Q _3910_/B _7132_/D _6306_/B2 _6305_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xmax_cap362 VPWR VGND _5202_/B _3331_/Y VGND VPWR sky130_fd_sc_hd__buf_6 Xmax_cap373 _3555_/A _3554_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold665 hold665/A hold665/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3518_ _6474_/Q _4032_/A _3518_/X _6479_/Q _4038_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold676 _5354_/X _6913_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xmax_cap384 _5657_/X _5928_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_1_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4498_ _4498_/Y _4843_/B _4498_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold687 _6801_/Q hold687/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold698 _6983_/Q hold698/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6237_ _6240_/B _5965_/X _6452_/Q _6547_/Q _5947_/X VGND VPWR _6236_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3449_ VGND VPWR _3829_/B _3449_/A1 _3448_/X _6733_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_131_577 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6168_ _6168_/X _5960_/X _6825_/Q _7078_/Q _5953_/X VGND VPWR _6167_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1310 _4033_/X _6470_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_322 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1321 hold1415/X hold1321/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1332 hold1332/A wb_dat_o[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1343 hold1427/X hold1343/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5119_ VGND VPWR _5120_/C _4450_/Y _4644_/B _4465_/B _4975_/B VGND VPWR sky130_fd_sc_hd__a31oi_1 XFILLER_85_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1354 hold1354/A wb_dat_o[12] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_84_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6099_ _6099_/D _6099_/C _6100_/C _6099_/A _6099_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 Xhold1365 _4189_/A1 hold1365/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1376 hold1376/A wb_dat_o[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_45_528 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1387 _7060_/Q _5520_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1398 _7145_/Q _3973_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_46 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_3_3_0_wb_clk_i _7113_/CLK clkbuf_3_3_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_53_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_436 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_391 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_233 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_44 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_452 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_271 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_646 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_108_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_63 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_110_728 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_599 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_48_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_601 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_91_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_388 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_701 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_572 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_31_266 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_176_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_280 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_290 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_400 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5470_ VGND VPWR _5471_/S _5521_/A1 hold750/X _5470_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_144_102 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_124 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_433 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4421_ _4626_/B _4753_/A _4607_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_172_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7140_ _7140_/Q _7140_/CLK _7140_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_4352_ _4352_/B _4360_/B _4633_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__xor2_1 XFILLER_125_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3303_ _3303_/Y hold26/X hold46/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xfanout408 VPWR VGND _5545_/A1 _5509_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 X_7071_ _7071_/Q _7071_/D VPWR fanout470/X _7083_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_4283_ VGND VPWR _4285_/S _5493_/A1 _4283_/A0 _4283_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xfanout419 VPWR VGND _5543_/A1 _5534_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_98_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6022_ _6443_/Q _5601_/X _6022_/X _6963_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3234_ VGND VPWR _3235_/S _6485_/Q _6415_/Q _3234_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_101_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3165_ _7158_/Q _3165_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_163 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_528 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6924_ _6924_/Q fanout458/X _6924_/D _7006_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_81_155 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_712 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_23_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6855_ _6855_/Q fanout464/X _6855_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_23_734 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5806_ _7009_/Q _5625_/X _5806_/X _6881_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6786_ _6786_/D VPWR _6786_/Q fanout456/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3998_ VGND VPWR _3998_/S _5513_/A1 hold523/X _3998_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_10_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_183_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_148_430 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5737_ _6958_/Q _5638_/X _5737_/X _6878_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_176_750 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_22_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5668_ _5669_/D _5667_/X _6890_/Q _6810_/Q _5666_/X VGND VPWR _5665_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_135_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4619_ _4619_/Y _4716_/A _4653_/B _4635_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 XFILLER_190_241 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5599_ _5597_/B _5602_/B _7101_/D _5598_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_151_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold440 _5441_/X _6990_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold451 _6806_/Q hold451/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold462 _4235_/X _6627_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold473 _6918_/Q hold473/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold484 _5510_/X _7051_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_145_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold495 _6617_/Q hold495/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1140 _5191_/X _6768_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1151 _6866_/Q _5302_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1162 _5473_/X _7018_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1173 _6555_/Q _4146_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_111 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1184 _4015_/X _6455_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_173_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1195 _6850_/Q _5284_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_54_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_41_531 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_542 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_102 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_271 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_455 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_606 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_157 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_168 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_107_371 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_503 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4970_ _4975_/B _4970_/Y _4970_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_91_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3921_ VGND VPWR input90/X _3187_/Y _3921_/S _3921_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_44_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6640_ _6640_/Q fanout487/X _6640_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_189_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3852_ _3853_/B _3860_/B _3852_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6571_ _6571_/Q _7137_/CLK _6571_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3783_ _6685_/Q _4292_/A _3783_/X _7034_/Q _5490_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5522_ VGND VPWR hold87/X _5540_/A1 hold313/X _5522_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_118_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_591 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5453_ VGND VPWR _5453_/S hold22/X hold497/X _5453_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_319 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4404_ _4549_/A _4408_/B _4448_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_5384_ VGND VPWR _5390_/S _5465_/A1 hold301/X _5384_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7123_ _7123_/Q fanout459/X _7123_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4335_ _4338_/A _4335_/C _4335_/A _4335_/B _4335_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_87_715 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_363 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_597 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7054_ _7054_/Q fanout461/X _7054_/D _7054_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4266_ VGND VPWR _4267_/S _5518_/A1 hold347/X _4266_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_57_csclk _6925_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_6005_ _6859_/Q _5943_/X _6005_/X _6915_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3217_ _6837_/Q _3217_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4197_ VGND VPWR _4201_/S hold666/X hold976/X _4197_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_54_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_656 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6907_ _6907_/D VPWR _6907_/Q fanout479/X _7082_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_6838_ _6838_/Q fanout463/X _6838_/D _7026_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6769_ _6769_/Q fanout469/X _6769_/D _6769_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_7_708 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_136_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold270 _4288_/X _6681_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold281 _6556_/Q hold281/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold292 _5209_/X _6784_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_291 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_64 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_110 _3956_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_121 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_61_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_132 _6747_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_143 _5902_/A2 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_154 hold6/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_165 _4238_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_176 _5960_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_121_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_187 _3957_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_198 _5171_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_60_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4120_ VGND VPWR _4126_/S _6354_/A1 hold824/X _4120_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_123_694 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4051_ _4322_/B _6396_/B _3692_/A hold37/X _4050_/X _4067_/S VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_4 XFILLER_83_206 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput5 mask_rev_in[10] input5/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_91_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4953_ _4953_/Y _5043_/B _4953_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_51_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3904_ _3904_/C _3906_/B _4335_/C _4335_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_4884_ _4884_/X _4884_/C _5006_/A _4884_/B _4884_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_6623_ _6623_/Q _6390_/A _6623_/D _6712_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3835_ _3838_/A _3836_/B _3835_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_20_556 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_177_388 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6554_ _6554_/Q _6383_/A _6554_/D _6674_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_158_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3766_ _3773_/A _4220_/A input52/X _6619_/Q _5193_/A VGND VPWR _3765_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_20_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5505_ _5513_/S _5505_/B _5505_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_6485_ _6485_/Q _6485_/D VPWR _6374_/X _3927_/A1 VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_173_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3697_ _3698_/D _4298_/A _6820_/Q _6692_/Q _5247_/A VGND VPWR _3696_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_118_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_106_628 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5436_ _5444_/S _5505_/B _5436_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xoutput320 hold1339/X hold1340/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput331 hold1363/X hold1364/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_105_138 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput342 hold1335/X hold1336/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_161_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5367_ VGND VPWR _5372_/S _5526_/A1 hold325/X _5367_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7106_ _7106_/Q fanout456/X _7106_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4318_ VGND VPWR _4321_/S _6354_/A1 hold814/X _4318_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_114_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5298_ VGND VPWR _5300_/S hold42/X hold160/X _5298_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_182 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7037_ _7037_/Q fanout450/X _7037_/D _7037_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4249_ VGND VPWR _4249_/S _5546_/A1 hold525/X _4249_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_75_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_667 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_30_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_11 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_43 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_183_76 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_78_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_19_656 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_250 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_166 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_486 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_626 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_681 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3620_ _3620_/D _3620_/C _3639_/A _3620_/A _3620_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_174_325 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_539 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3551_ _3552_/D _4196_/A _6830_/Q _6603_/Q _5256_/A VGND VPWR _3549_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_155_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6270_ _6468_/Q _5937_/X _6270_/X _6628_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3482_ input57/X _5193_/A _3482_/X _7084_/Q _5541_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_182_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5221_ VGND VPWR _5228_/S _5524_/A1 _5221_/A0 _5221_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5152_ VGND VPWR _5153_/S _6356_/A1 hold728/X _5152_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4103_ VGND VPWR _4108_/S _5491_/A1 _4103_/A0 _4103_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5083_ VGND VPWR _5115_/C _5083_/B _5083_/A _5083_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_110_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_111_697 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_71 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4034_ VGND VPWR _4037_/S _6354_/A1 hold876/X _4034_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_65_740 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5985_ _5985_/X _5944_/X _7018_/Q _7026_/Q _5937_/X VGND VPWR _5984_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XPHY_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4936_ VGND VPWR _4944_/B _5003_/B _4999_/B _5076_/A VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_52_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_10 _3355_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_21 _3504_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4867_ _5027_/B _4902_/B _4508_/C _4639_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XANTENNA_32 _3638_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_43 _5399_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6606_ _6606_/Q _6606_/D VPWR fanout447/X _6746_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XANTENNA_54 _5976_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3818_ _6898_/Q _5337_/A _3818_/X _6625_/Q _4232_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XANTENNA_65 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4798_ VGND VPWR _4798_/X _4638_/Y _4673_/A _4627_/B _4627_/A VGND VPWR sky130_fd_sc_hd__a211o_1 XANTENNA_76 _6276_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_87 _7040_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_98 _7157_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6537_ _6537_/Q fanout464/X _6537_/D _6537_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3749_ _6835_/Q _5265_/A _3749_/X _6451_/Q _4008_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_134_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6468_ _6468_/Q _6401_/A _6468_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_161_542 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5419_ VGND VPWR _5426_/S _5524_/A1 _5419_/A0 _5419_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_121_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6399_ VPWR VGND _6399_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xoutput172 _7173_/X irq[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput183 _3206_/Y mgmt_gpio_oeb[17] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput194 _3196_/Y mgmt_gpio_oeb[27] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_153_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_526 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_507 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_762 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_570 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_125 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_220 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_70_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_62_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_62_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_23_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_129_539 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_168_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_184_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_375 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_137_572 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_140_726 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_480 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_78_375 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_529 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5770_ _5770_/X _5634_/X _6983_/Q _6975_/Q _5624_/X VGND VPWR _5758_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_34_489 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_159_130 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4721_ VGND VPWR _4722_/D _4721_/B _4721_/A _4721_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_4652_ _4652_/Y _4653_/B _4653_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xinput30 VPWR VGND input30/X mask_rev_in[4] VGND VPWR sky130_fd_sc_hd__buf_2 X_3603_ _3604_/D _4145_/A _6805_/Q _6558_/Q _5229_/A VGND VPWR _3588_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_147_369 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput41 VGND VPWR input41/X mgmt_gpio_in[14] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4583_ _4582_/Y _4581_/B _4810_/A _4583_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_128_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_116_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput52 input52/X mgmt_gpio_in[24] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xinput63 _3957_/A mgmt_gpio_in[34] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 Xhold803 _5414_/X _6966_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_162_328 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput74 VPWR VGND pad_flash_io1_di _3953_/B VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xhold814 _6706_/Q hold814/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6322_ VGND VPWR _6317_/Y _6321_/X _6346_/S _6319_/Y _6643_/Q VGND VPWR sky130_fd_sc_hd__a211o_4 Xinput85 VPWR VGND input85/X spimemio_flash_io0_do VGND VPWR sky130_fd_sc_hd__buf_2 Xhold825 _4120_/X _6533_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3534_ _3538_/C hold67/A _6741_/Q _6469_/Q _5148_/A VGND VPWR _3531_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xinput96 VPWR VGND usr1_vdd_pwrgood input96/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_143_531 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold836 _7152_/Q hold836/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold847 _4016_/X _6456_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold858 _7191_/A hold858/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold869 _5331_/X _6892_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6253_ VGND VPWR _6303_/S _6252_/X _7128_/Q _6253_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3465_ _3467_/C _5154_/A _6863_/Q _6747_/Q _5292_/A VGND VPWR _3464_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_131_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5204_ VGND VPWR _5210_/S _5534_/A1 hold257/X _5204_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6184_ VGND VPWR _6189_/A _5961_/X _6182_/X _6685_/Q _6183_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3396_ VGND VPWR _3396_/X _3372_/Y _3393_/X _6441_/Q _3395_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_97_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1503 _7130_/Q _6279_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5135_ _5135_/A _5135_/Y _5135_/B _5135_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 Xhold1514 _7147_/Q _6343_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1525 hold58/A _3257_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1536 hold40/A _3256_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_111_483 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1547 _6489_/Q _3912_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1558 hold32/A _3849_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5066_ _5066_/X _5106_/C _5066_/A _5112_/C _5066_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1569 _7167_/Q _3253_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4017_ VGND VPWR _4019_/S _6355_/A1 hold960/X _4017_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5968_ _5968_/A _5969_/C _5979_/C _5976_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_40_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_286 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4919_ _4919_/X _5023_/C _5023_/A _5023_/B _4919_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_5899_ _5899_/Y _6658_/Q _5899_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_21_651 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_21_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_306 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_4_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_121_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_0_577 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_684 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_323 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_113_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_283 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_82 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_584 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_258 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_611 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3250_ VGND VPWR _3250_/B _7168_/D _3250_/A VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_3_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_567 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3181_ _4702_/B _4566_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XFILLER_79_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_676 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6940_ _6940_/Q fanout463/X _6940_/D _7063_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_81_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_93_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6871_ _6871_/Q fanout482/X _6871_/D _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_179_203 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5822_ _3183_/Y _5651_/B _5822_/Y _5899_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_179_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_404 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_275 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5753_ _5754_/C _5632_/X _7006_/Q _6942_/Q _5625_/X VGND VPWR _5737_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_22_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4704_ _4704_/X _4626_/B _4703_/Y _4460_/A _4616_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_1 XFILLER_148_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5684_ _5684_/X _5652_/B _6971_/Q _6915_/Q _5634_/X VGND VPWR _5651_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_187_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_175_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4635_ _4689_/B _4716_/A _4635_/B _4661_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 XFILLER_162_103 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold600 _7056_/Q hold600/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold611 _4089_/X _6511_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4566_ VGND VPWR _4664_/B _4566_/A _4566_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 Xhold622 hold622/A hold622/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold633 _5273_/X _6841_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_190_467 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold644 _7080_/Q hold644/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6305_ _6305_/Y _6641_/Q _6636_/Q _6635_/Q _3910_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__o31ai_1 X_3517_ _4038_/A hold74/X _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xmax_cap363 _4118_/B _4083_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_89_404 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold655 _5372_/X _6929_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_575 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xmax_cap374 _3571_/A hold125/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold666 hold666/A hold666/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 X_4497_ VPWR VGND _4843_/B _5042_/B _4579_/B VGND VPWR sky130_fd_sc_hd__and2_1 Xhold677 _6969_/Q hold677/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xmax_cap385 VPWR VGND _5905_/A2 _5655_/X VGND VPWR sky130_fd_sc_hd__buf_6 Xhold688 _5228_/X _6801_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold699 _5433_/X _6983_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6236_ _6632_/Q _5946_/X _6236_/X _6552_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3448_ VGND VPWR _3829_/A _3488_/A1 _3447_/Y _3448_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6167_ _6167_/X _5948_/X _6913_/Q _6953_/Q _5973_/A VGND VPWR _6166_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1300 _5149_/X _6737_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3379_ _3999_/A _3379_/A hold75/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold1311 _6418_/Q _3966_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1322 hold1322/A wb_dat_o[19] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5118_ VGND VPWR _5118_/X _5118_/B _5118_/A _5118_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1333 hold1419/X hold1333/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_111_291 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1344 hold1344/A wb_dat_o[13] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xclkbuf_0__1177_ clkbuf_0__1177_/X _3582_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_6098_ _6099_/D _5949_/X _6814_/Q _6934_/Q _5971_/B VGND VPWR _6097_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1355 _6315_/A1 hold1355/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1366 hold1366/A wb_dat_o[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_84_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1377 _6312_/A1 hold1377/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5049_ _4496_/Y _4672_/B _4542_/A _5049_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 Xhold1388 _7084_/Q _5547_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_27_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1399 _3973_/X hold59/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_743 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_58 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_770 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_267 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_656 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_102 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_294 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_531 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_153_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_153_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_122_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_175_99 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_48_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_48_323 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_315 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_592 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_177_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_177_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_228 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_270 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_100 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_740 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_292 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_144_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4420_ _4600_/B _4947_/A _4753_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 XFILLER_172_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4351_ _4379_/B _4351_/B _4352_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_3302_ hold72/X _3555_/A _3355_/B _3347_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3b_4 X_7070_ _7070_/Q fanout482/X _7070_/D _7070_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xfanout409 VPWR VGND _5509_/A1 _5518_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 X_4282_ VGND VPWR _4285_/S _5492_/A1 _4282_/A0 _4282_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6021_ _6024_/C _5975_/A _7027_/Q _6843_/Q _5944_/X VGND VPWR _6020_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3233_ VGND VPWR _3233_/S _3251_/A _3233_/A0 _7171_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_98_289 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_1_1_1_csclk clkbuf_2_3_0_csclk/A clkbuf_1_1_1_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 X_3164_ _7159_/Q _3164_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_67_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_82_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_175 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6923_ _6923_/Q _6923_/D VPWR fanout458/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_35_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6854_ _6854_/Q fanout478/X _6854_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5805_ _6953_/Q _5637_/X _5805_/X _7033_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6785_ _6785_/Q fanout481/X _6785_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3997_ VGND VPWR _3998_/S hold99/X _3997_/A0 _3997_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_13_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5736_ _6279_/S _7109_/D _5734_/X _5736_/A1 _5735_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_148_442 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5667_ _5664_/A _5667_/X _5667_/C _5667_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_135_125 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4618_ _4618_/Y _4653_/B _4635_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_5598_ _5602_/A _5598_/Y _5598_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_190_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_135_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold430 _5343_/X _6903_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold441 _6765_/Q hold441/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4549_ _4553_/B _4549_/B _4549_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold452 _5234_/X _6806_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_212 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold463 _6563_/Q hold463/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold474 _5360_/X _6918_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold485 _6910_/Q hold485/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_143_191 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold496 _4218_/X _6617_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_145_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6219_ _6646_/Q _5976_/C _6219_/X _6566_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_77_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7199_ VGND VPWR _7199_/X _7199_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_58_621 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_24 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1130 _4160_/X _6567_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1141 _6767_/Q _5189_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1152 _5302_/X _6866_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1163 _6465_/Q _4027_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1174 _4146_/X _6555_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1185 _6882_/Q _5320_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1196 _5284_/X _6850_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_166_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_757 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_239 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_70_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_186_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_220 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_122_320 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_738 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_318 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3920_ VGND VPWR input92/X _3186_/Y _3921_/S _3920_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_32_521 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3851_ _3850_/Y hold70/A _3853_/A _3851_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 X_6570_ _6570_/Q _7137_/CLK _6570_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3782_ _3782_/D _3782_/C _3794_/B _3782_/A _3782_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_164_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5521_ VGND VPWR hold87/X _5521_/A1 hold319/X _5521_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_118_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5452_ VGND VPWR _5453_/S hold99/X hold112/X _5452_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_172_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_173_765 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_147 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4403_ _4633_/B _4389_/Y _4448_/B _4563_/D _4653_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_145_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5383_ VGND VPWR _5390_/S hold666/X _5383_/A0 _5383_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7122_ _7122_/Q fanout456/X _7122_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_113_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4334_ _4334_/C _4434_/B _4702_/A _4334_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 XFILLER_5_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_141_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7053_ _7053_/Q fanout459/X _7053_/D _7053_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_113_375 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4265_ VGND VPWR _4267_/S _5544_/A1 hold471/X _4265_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6004_ _7040_/Q _5971_/C _6004_/X _6875_/Q _5976_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3216_ _6845_/Q _3216_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4196_ VPWR VGND _4196_/A _4201_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_82_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_487 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_318 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6906_ _6906_/Q _6906_/D VPWR fanout463/X _6908_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_23_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6837_ _6837_/Q fanout464/X _6837_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_145_8 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_587 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_738 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6768_ _6768_/Q fanout469/X _6768_/D _6769_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5719_ _7005_/Q _5625_/X _5719_/X _6877_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6699_ _6699_/Q _6360_/A _6699_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_108_114 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_286 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_128 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold260 _5447_/X _6995_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold271 _6752_/Q hold271/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold282 _4147_/X _6556_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold293 _6851_/Q hold293/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_727 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_46_602 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_85_270 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_100 _7157_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_111 _7199_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_122 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_133 _6739_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_33_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_144 _5902_/A2 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_14_510 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_155 hold60/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_166 _5166_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_121_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_177 _5975_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_188 input46/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_199 _5229_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_174_507 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_170_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_264 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_746 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_68_215 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_96_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4050_ VPWR VGND _4050_/X _5193_/A _6396_/B VGND VPWR sky130_fd_sc_hd__and2b_2 XFILLER_49_440 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput6 VPWR VGND mask_rev_in[11] input6/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_49_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_487 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_318 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4952_ _5057_/B _4542_/B _5043_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_3903_ _4336_/B _4336_/A _3907_/C _4337_/C _4337_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_4883_ _4884_/D _5023_/C _5023_/A _4882_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a21bo_1 X_6622_ _6622_/Q _6390_/A _6622_/D _6629_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3834_ _3832_/B _6417_/D _3836_/A _3867_/B _3834_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_6553_ _6553_/Q fanout469/X _6553_/D _6659_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_118_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3765_ _7018_/Q hold29/A _3765_/X _6962_/Q _5409_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_192_326 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5504_ VGND VPWR hold77/X _5540_/A1 hold311/X _5504_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6484_ _6484_/Q fanout450/X _6484_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3696_ _6621_/Q _4220_/A _3696_/X _6647_/Q _4244_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_161_702 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_264 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xpad_flashh_clk_buff_inst pad_flash_clk _3945_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_5435_ VGND VPWR _5435_/S hold22/X hold143/X _5435_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput310 _3953_/X spimemio_flash_io1_di VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput321 hold1351/X hold1352/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput332 hold1357/X hold1358/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput343 hold1337/X hold1338/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5366_ VGND VPWR _5372_/S _5465_/A1 hold245/X _5366_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_267 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7105_ _7105_/Q fanout460/X _7105_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4317_ VGND VPWR _4321_/S _5491_/A1 _4317_/A0 _4317_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5297_ VGND VPWR _5300_/S _5519_/A1 hold180/X _5297_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7036_ _7036_/D VPWR _7036_/Q fanout455/X _7036_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_4248_ VGND VPWR _4249_/S _5518_/A1 hold491/X _4248_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_259 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4179_ VGND VPWR _4186_/S _4179_/A1 _3828_/Y _6583_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_67_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_168_334 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_23 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_149_570 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_67 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_359 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_137_765 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_136_264 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_286 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_602 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_76_75 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_763 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_262 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_41_csclk _6967_/CLK clkbuf_opt_3_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_178_109 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_90 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_120 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_131 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_56_csclk _6539_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_128_721 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_174_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3550_ _4196_/A _3562_/A _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_143_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3481_ _3484_/C _5202_/B _6855_/Q input40/X _5283_/A VGND VPWR _3480_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_142_212 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_223 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5220_ _5227_/S hold17/X _5220_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_130_407 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5151_ VGND VPWR _5153_/S _6355_/A1 hold995/X _5151_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4102_ _4108_/S _5541_/B _4102_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_5082_ VGND VPWR _5087_/B _5114_/A _5088_/A _5082_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_96_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_164 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4033_ VGND VPWR _4037_/S _5491_/A1 _4033_/A0 _4033_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_49_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_752 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_52_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5984_ _6794_/Q _5965_/X _5984_/X _6826_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_169_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4935_ _4562_/Y _5076_/A _4620_/Y _4768_/B _4948_/C _4638_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xclkbuf_3_7_0_csclk clkbuf_3_7_0_csclk/X clkbuf_3_7_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XFILLER_33_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_11 _5265_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_22 _4220_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4866_ _4496_/Y _4870_/A _4639_/Y _4948_/C _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_177_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_33 _3688_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6605_ _6605_/Q fanout447/X _6605_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_192_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_44 _5471_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3817_ _3817_/D _3817_/C _3827_/C _3817_/A _3817_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_20_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_193_635 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_55 _5958_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4797_ _4611_/Y _4673_/A _4476_/Y _5008_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_165_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_66 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_77 _6276_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_88 _7040_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6536_ _6536_/Q fanout461/X _6536_/D _6539_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3748_ _3751_/C _4127_/A _6661_/Q _6541_/Q _4262_/A VGND VPWR _3747_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XANTENNA_99 _7157_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_118_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_201 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6467_ _6467_/Q _6467_/D VPWR _6401_/A _6654_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3679_ _3679_/D _3679_/C _3699_/B _3679_/A _3679_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_134_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_161_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5418_ _5426_/S _5541_/B _5418_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_6398_ VPWR VGND _6398_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xoutput173 _3959_/X irq[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_121_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput184 _3205_/Y mgmt_gpio_oeb[18] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5349_ VGND VPWR _5354_/S _5484_/A1 hold856/X _5349_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput195 _3195_/Y mgmt_gpio_oeb[28] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_87_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_36 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7019_ _7019_/D VPWR _7019_/Q fanout479/X _7085_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_28_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_67 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_424 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_654 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_242 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_223 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_492 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_332 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_120_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_78_387 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_47_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_34_402 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_418 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4720_ _4616_/Y _4721_/C _4626_/Y _4719_/X _4689_/A _4483_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_187_440 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_142 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4651_ _4484_/Y _4660_/B _4609_/Y _4650_/Y _4441_/A _4619_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_147_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput20 mask_rev_in[24] input20/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_3602_ _3604_/C _5247_/A _6917_/Q _6821_/Q _5355_/A VGND VPWR _3601_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xinput31 VGND VPWR input31/X mask_rev_in[5] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4582_ _4582_/B _4582_/Y _4992_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xinput42 VGND VPWR input42/X mgmt_gpio_in[15] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput53 mgmt_gpio_in[25] input53/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput64 mgmt_gpio_in[35] input64/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_128_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput75 VGND VPWR input75/X porb VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xhold804 _6435_/Q hold804/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6321_ _6321_/X _6320_/Y _6642_/Q _6644_/Q _6318_/Y VGND VPWR _4229_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3533_ hold67/A hold74/A hold66/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold815 _4318_/X _6706_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput86 _3947_/B spimemio_flash_io0_oeb VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xhold826 _6714_/Q hold826/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput97 VPWR VGND usr2_vcc_pwrgood input97/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xhold837 _6354_/X _7152_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold848 _6481_/Q hold848/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_116_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6252_ _6240_/Y _6252_/X _6251_/X _6226_/B _6542_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 Xhold859 _5196_/X _6772_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3464_ _6911_/Q _5346_/A _3464_/X _6951_/Q _5391_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5203_ VGND VPWR _5210_/S _5473_/A1 _5203_/A0 _5203_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6183_ _6183_/X _5967_/X _6475_/Q _6604_/Q _5940_/X VGND VPWR _6181_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3395_ _6865_/Q _5532_/A _3394_/X _7078_/Q _3395_/X _5292_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__a221o_4 X_5134_ VGND VPWR _5135_/C _5134_/B _5134_/A _5134_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_97_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1504 _7124_/Q _6129_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1515 _7145_/Q _6337_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1526 _3257_/X _7163_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1537 _7112_/Q _5820_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5065_ _5066_/D _5018_/A _4716_/Y _4650_/Y _4625_/B _4483_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_111_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1548 _3182_/Y _3869_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1559 _6635_/Q _3909_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4016_ VGND VPWR _4019_/S _6354_/A1 hold846/X _4016_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_16_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5967_ _5969_/C _5981_/C _5979_/C _5967_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_52_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4918_ _4919_/D _4918_/B _4918_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5898_ _5906_/A _5637_/X _6563_/Q _6698_/Q _5631_/X VGND VPWR _5897_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_193_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4849_ _5073_/A _4483_/Y _4535_/A _4846_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_193_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_454 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6519_ _6519_/Q _6400_/A _6519_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_180_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_134_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_738 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_88_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_357 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_752 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_73_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_295 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_541 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_76 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_596 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_487 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_188 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3180_ _7101_/Q _5600_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_79_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_66_335 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6870_ _6870_/Q fanout476/X _6870_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_34_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5821_ _6279_/S _7113_/D _5819_/X _5821_/A1 _5820_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_22_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_287 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5752_ _5754_/B _5645_/X _7014_/Q _7030_/Q _5630_/X VGND VPWR _5751_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4703_ _4703_/Y _4703_/B _4782_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5683_ _5690_/A _5667_/X _6923_/Q _6811_/Q _5664_/X VGND VPWR _5682_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_30_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4634_ VGND VPWR _4753_/C _4635_/B _4716_/A _4661_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_163_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold601 _5516_/X _7056_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4565_ _4653_/B _4563_/D _4595_/A _4565_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 Xhold612 _6672_/Q hold612/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_128_392 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold623 _4111_/X _6525_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold634 _6971_/Q hold634/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6304_ VGND VPWR _6304_/S _6303_/X _6304_/A0 _7131_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold645 _5543_/X _7080_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3516_ _4032_/A _3573_/A _3814_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold656 _7015_/Q hold656/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4496_ _4607_/A _4496_/B _4496_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold667 hold667/A hold667/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold678 _5417_/X _6969_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xmax_cap386 _5646_/X _5814_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 Xhold689 _6423_/Q hold689/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6235_ VGND VPWR _6240_/A _5961_/X _6232_/X _6687_/Q _6234_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3447_ _3447_/Y _3447_/A _3447_/B _3447_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 XFILLER_89_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6166_ _6905_/Q _5976_/C _6166_/X _6833_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3378_ hold76/A _3586_/A hold75/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_69_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1301 _6434_/Q _3991_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1312 _3966_/X _6418_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1323 hold1416/X hold1323/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5117_ _4823_/A _4858_/X _4695_/Y _4482_/B _5118_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_69_184 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1334 hold1334/A wb_dat_o[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_6097_ hold79/A _5601_/X _6097_/X _6966_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1345 hold1428/X hold1345/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1356 hold1356/A wb_dat_o[31] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1367 _4190_/A1 hold1367/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5048_ _4496_/Y _4672_/B _4413_/Y _5057_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 Xhold1378 hold1378/A wb_dat_o[28] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1389 _6788_/Q _5214_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_27_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6999_ _6999_/Q fanout465/X _6999_/D _6999_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_43_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_279 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_471 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_465 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_167 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_193_262 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_138_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_4_114 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_671 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_161_192 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_122_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_95_419 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_633 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_191_99 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_63_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_63_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_91_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_140_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_177_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_260 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_282 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_293 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_172_468 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4350_ _4357_/B _4661_/A _4631_/D _4351_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_3301_ _5283_/A _3586_/A _3562_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_4281_ VGND VPWR _4285_/S _6353_/A1 _4281_/A0 _4281_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6020_ _7019_/Q _5937_/X _6020_/X _6883_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3232_ _3829_/A _3233_/S _3867_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_140_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_140_398 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_66_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6922_ _6922_/D VPWR _6922_/Q fanout458/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_82_658 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6853_ _6853_/Q fanout474/X _6853_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_120_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_596 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5804_ _5804_/X _5655_/X _6849_/Q _6801_/Q _5616_/X VGND VPWR _5803_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_22_224 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6784_ _6784_/Q fanout481/X _6784_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3996_ VGND VPWR _3998_/S _5469_/A1 hold574/X _3996_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5735_ _5735_/A2 _6507_/Q _6103_/B1 _5735_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_13_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_290 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_616 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5666_ _5664_/A _5666_/X _5666_/C _5666_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_4617_ _4846_/B _4646_/A _4627_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_135_137 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5597_ _5597_/B _5602_/B _5600_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_163_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold420 _5535_/X _7073_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold431 _6712_/Q hold431/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4548_ _4947_/C _4548_/X _4464_/Y _5114_/A _4500_/A _4902_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold442 _5187_/X _6765_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold453 _6557_/Q hold453/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold464 _4155_/X _6563_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold475 _6870_/Q hold475/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold486 _5351_/X _6910_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4479_ _4653_/C _4479_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold497 _7001_/Q hold497/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6218_ _6218_/C _6226_/C _6218_/A _6218_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_7198_ VGND VPWR _7198_/X _7198_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_58_633 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1120 _5493_/X _7036_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6149_ _6150_/D _5949_/X _6816_/Q _6936_/Q _5971_/B VGND VPWR _6148_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1131 _6580_/Q _4175_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_58_666 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_143 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1142 _5189_/X _6767_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_161_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1153 _6826_/Q _5257_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1164 _4027_/X _6465_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1175 hold1590/X _4053_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1186 _5320_/X _6882_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1197 _6888_/Q _5326_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_53_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_741 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_332 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_1_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_110_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_633 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_177_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3850_ _3854_/S _3850_/Y _6488_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_3781_ _3782_/D _5523_/A _6946_/Q _7063_/Q _3781_/A2 VGND VPWR _3780_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5520_ VGND VPWR hold87/A hold42/X _5520_/A0 hold88/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_9_762 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5451_ VGND VPWR _5453_/S _5469_/A1 hold726/X _5451_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4402_ _4627_/B _4661_/A _4653_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_5382_ _5390_/S hold17/X _5382_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_7121_ _7121_/Q fanout456/X _7121_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4333_ VGND VPWR _4333_/S _6357_/A1 hold902/X _4333_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7052_ _7052_/Q fanout482/X _7052_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4264_ VGND VPWR _4267_/S _5534_/A1 hold267/X _4264_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6003_ VGND VPWR _6003_/B1 _6001_/X _6002_/Y _7119_/D _6103_/B1 VGND VPWR sky130_fd_sc_hd__a2bb2o_1 X_3215_ _6853_/Q _3215_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4195_ VGND VPWR _4195_/S _4195_/A1 _3410_/Y _6598_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_39_132 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_474 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_82_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_82_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6905_ _6905_/Q fanout481/X _6905_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_35_360 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_499 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6836_ _6836_/Q fanout463/X _6836_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_10_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6767_ _6767_/Q fanout470/X _6767_/D _6890_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3979_ VGND VPWR _6624_/Q hold172/X hold20/X _3979_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5718_ _6821_/Q _5818_/A2 _5718_/X _6965_/Q _5642_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_164_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6698_ _6698_/Q fanout445/X _6698_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_164_722 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5649_ _5652_/B _5667_/C _5658_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_151_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold250 _5402_/X _6955_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_163_298 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold261 _7072_/Q hold261/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold272 _5168_/X _6752_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold283 _6859_/Q hold283/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold294 _5285_/X _6851_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_131_184 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_93_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_33 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_101 _7157_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_112 _7199_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_123 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_134 _6428_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_26_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_145 _5513_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_156 hold99/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_167 _3700_/Y VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_81_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_178 _6301_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_14_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_159_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_189 _6423_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_14_577 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_174_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_1_1_0_csclk clkbuf_1_1_1_csclk/A clkbuf_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_167_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_221 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_732 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_743 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput7 VPWR VGND input7/X mask_rev_in[12] VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_49_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_433 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_455 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_499 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4951_ VPWR VGND _5047_/A _4951_/B _5114_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_17_371 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_17_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3902_ _4337_/B _3907_/B _4337_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_4882_ VGND VPWR _4882_/X _4882_/B _5023_/D _4882_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6621_ _6621_/Q _6621_/D VPWR _6390_/A _6629_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3833_ VPWR VGND _3836_/A _3838_/A _6416_/Q VGND VPWR sky130_fd_sc_hd__and2_1 X_6552_ _6552_/D VPWR _6552_/Q fanout454/X _6632_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3764_ VGND VPWR _3829_/B _3764_/A1 _3763_/X _3764_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_146_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5503_ VGND VPWR hold77/X _5548_/A1 hold910/X _5503_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6483_ _6483_/Q fanout450/X _6483_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3695_ _3698_/C _3358_/Y _3251_/A input13/X _4083_/S VGND VPWR _3694_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_161_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput300 _6754_/Q pwr_ctrl_out[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5434_ VGND VPWR _5435_/S hold99/X hold521/X _5434_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput311 _7199_/X spimemio_flash_io2_di VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput322 hold1347/X hold1348/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput333 hold1349/X hold1350/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_133_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput344 hold1329/X hold1330/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_99_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5365_ VGND VPWR _5372_/S _5524_/A1 _5365_/A0 _5365_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_126_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7104_ _7104_/Q fanout460/X _7104_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_160_279 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_3_3_0_csclk _7001_/CLK clkbuf_3_3_0_csclk/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_4316_ VPWR VGND _4316_/A _4321_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5296_ VGND VPWR _5300_/S _5509_/A1 hold916/X _5296_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_19_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7035_ _7035_/Q fanout455/X _7035_/D _7037_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_59_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4247_ VGND VPWR _4249_/S _5544_/A1 hold638/X _4247_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_75_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4178_ _4186_/S _6637_/Q _6307_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_28_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_27_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_67_293 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_2_0_0_wb_clk_i clkbuf_3_1_0_wb_clk_i/A clkbuf_2_1_0_wb_clk_i/A VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 X_6819_ _6819_/Q _6819_/D VPWR fanout475/X _6884_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_51_35 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_316 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_582 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_3_702 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_479 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_747 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_257 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_633 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_116_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_274 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_80 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_91 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_174_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_128_733 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_530 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3480_ _7060_/Q hold86/A _3480_/X _7052_/Q _5505_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_170_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_235 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5150_ VGND VPWR _5153_/S _6354_/A1 hold890/X _5150_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4101_ VGND VPWR _4101_/S _4100_/X hold720/X _4101_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_110 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5081_ _4902_/B _4464_/Y _4902_/A _4689_/A _5082_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_96_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4032_ VPWR VGND _4032_/A _4037_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_49_260 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_219 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_49_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5983_ _6842_/Q _5975_/A _5983_/X _6962_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4934_ _4562_/Y _5003_/B _4620_/Y _4770_/B _4542_/D _4652_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_17_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_178_655 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4865_ _5034_/A _4652_/Y _4518_/C _4700_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_33_694 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_12 _5265_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_32_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_23 _4220_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_34 _3742_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6604_ _6604_/Q fanout447/X _6604_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_177_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3816_ _3817_/D _4244_/A _6826_/Q _6645_/Q _5256_/A VGND VPWR _3815_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_177_176 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_45 _5627_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4796_ _4804_/A _4796_/C _4796_/A _5064_/A _4796_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XANTENNA_56 _5965_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_67 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_78 _6542_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6535_ _6535_/Q fanout460/X _6535_/D _6925_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XANTENNA_89 _6664_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3747_ _7072_/Q _5532_/A _3747_/X _7035_/Q _5490_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_118_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_500 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6466_ _6466_/Q _6401_/A _6466_/D _6653_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3678_ _3679_/D _4238_/A _6980_/Q _6632_/Q _5427_/A VGND VPWR _3677_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_133_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5417_ VGND VPWR _5417_/S _5540_/A1 hold677/X _5417_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6397_ VPWR VGND _6397_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xoutput174 _3960_/X irq[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5348_ VGND VPWR _5354_/S _5543_/A1 hold572/X _5348_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput185 _3204_/Y mgmt_gpio_oeb[19] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput196 _3194_/Y mgmt_gpio_oeb[29] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_87_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5279_ VGND VPWR _5282_/S _5528_/A1 hold467/X _5279_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_101_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7018_ _7018_/Q _7018_/D VPWR fanout476/X _7051_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_56_731 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_436 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_614 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_176 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_304 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_388 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_254 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_152_500 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_691 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_11_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_599 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_506 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xfanout390 _4372_/X _4716_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_143_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_47_753 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_159_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_305 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4650_ _4650_/Y _5043_/A _4650_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xinput10 VGND VPWR input10/X mask_rev_in[15] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_3601_ _7050_/Q _5505_/A _3601_/X _7082_/Q _5541_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xinput21 mask_rev_in[25] input21/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput32 VPWR VGND mask_rev_in[6] input32/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 X_4581_ _4581_/B _4581_/Y _4810_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_190_606 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput43 VGND VPWR input43/X mgmt_gpio_in[16] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput54 VGND VPWR input54/X mgmt_gpio_in[26] VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_6320_ _6320_/Y _6320_/B _6320_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold805 _3992_/X _6435_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3532_ _5148_/A hold85/X _3714_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_128_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_155_360 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput65 _7199_/A mgmt_gpio_in[36] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xhold816 _7083_/Q hold816/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput76 _3921_/S qspi_enabled VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 Xinput87 _7198_/A spimemio_flash_io1_do VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xinput98 usr2_vdd_pwrgood input98/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xhold827 _4327_/X _6714_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold838 _6694_/Q hold838/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold849 _4046_/X _6481_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6251_ _6243_/X _6251_/B _6251_/X _6301_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 X_3463_ _3467_/B _3381_/Y _6431_/Q input31/X _3981_/A VGND VPWR _3462_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_5202_ _6396_/B _5210_/S _5505_/B _5202_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_6182_ _7151_/Q _5958_/X _6182_/X _6480_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3394_ input42/X _5202_/B _3394_/X _6449_/Q _3999_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5133_ _4970_/Y _5134_/C _5010_/Y _4796_/D _4628_/Y _4631_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_111_430 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1505 _6588_/Q _4184_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1516 _7105_/Q _5609_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1527 _7141_/Q _6325_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1538 hold97/A _3255_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5064_ VGND VPWR _5106_/C _5064_/B _5064_/A _5064_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1549 _7099_/Q _5592_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4015_ VGND VPWR _4019_/S _6353_/A1 _4015_/A0 _4015_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_65_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5966_ _5966_/A _5981_/B _5981_/C _5971_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4917_ _4359_/Y _4887_/A _4384_/A _4887_/B _4872_/B _5033_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o41a_1 X_5897_ _6648_/Q _5621_/X _5897_/X _6553_/Q _5913_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_32_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4848_ _4689_/A _4469_/A _4490_/B _5029_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_20_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_21_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_148_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4779_ _4611_/Y _4902_/B _4500_/A _5068_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_181_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_703 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6518_ _6518_/Q _6360_/A _6518_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_134_500 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6449_ _6449_/Q fanout473/X _6449_/D _7070_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_134_555 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_363 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_40_csclk _6951_/CLK _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_121_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_2_0_0_csclk clkbuf_3_1_0_csclk/A clkbuf_2_1_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XFILLER_189_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_369 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_723 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_255 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_8_602 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_444 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_156_146 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_588 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_152 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_39_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5820_ _5820_/A2 _6507_/Q _5611_/Y _5820_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_5751_ _6950_/Q _5637_/X _5751_/X _6806_/Q _5660_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_34_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4702_ _4702_/B _4702_/A _4702_/Y _4965_/B _4702_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4_2 XFILLER_187_260 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5682_ _6867_/Q _5628_/X _5682_/X _6891_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_148_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4633_ VPWR VGND _4661_/B _4633_/B _4631_/D VGND VPWR sky130_fd_sc_hd__and2b_2 XFILLER_163_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4564_ _4566_/B _4773_/A _4564_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold602 _7040_/Q hold602/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_118_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold613 _4277_/X _6672_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6303_ VGND VPWR _6302_/X _7130_/Q _6303_/S _6303_/X VGND VPWR sky130_fd_sc_hd__mux2_2 Xhold624 _6849_/Q hold624/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold635 _5420_/X _6971_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3515_ _4214_/A _3555_/A _3562_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold646 _6445_/Q hold646/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4495_ _5042_/B _4495_/A _4632_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold657 _5469_/X _7015_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold668 _5174_/X _6756_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmax_cap376 VPWR VGND _6103_/B1 _5611_/Y VGND VPWR sky130_fd_sc_hd__buf_4 Xhold679 _6833_/Q hold679/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6234_ _6234_/X _5967_/X _6477_/Q _6606_/Q _5940_/X VGND VPWR _6231_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xmax_cap387 _5631_/X _5818_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 X_3446_ _3446_/D _3446_/C _3446_/Y _3446_/A _3446_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_170_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6165_ _6165_/C _6176_/C _6165_/A _6165_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 X_3377_ _5541_/A _3455_/A hold28/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_134_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1302 _3991_/X _6434_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1313 _7034_/Q _5491_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_483 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5116_ _5116_/A _5116_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold1324 hold1324/A wb_dat_o[21] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_6096_ _6099_/C _5975_/A _7030_/Q _6846_/Q _5944_/X VGND VPWR _6095_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1335 hold1418/X hold1335/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_69_196 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1346 hold1346/A wb_dat_o[14] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1357 _6310_/A1 hold1357/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_27_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1368 hold1368/A wb_dat_o[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5047_ VPWR VGND _5122_/B _5096_/B _5047_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xhold1379 hold1557/X hold1379/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_84_166 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_26_712 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_406 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6998_ _6998_/Q fanout465/X _6998_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5949_ _5978_/A _5981_/A _5981_/B _5949_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_43_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_483 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_175_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_134_341 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_0_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_191_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_76_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_572 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_734 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_222 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_514 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_726 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_208 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_250 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_258 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_283 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_294 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_190 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_671 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3300_ _3355_/B _3311_/C _3300_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_4280_ VPWR VGND _4280_/A _4285_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_140_322 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_709 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3231_ _3829_/A _3837_/A _3234_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_82_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6921_ _6921_/Q fanout464/X _6921_/D _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6852_ _6852_/Q fanout456/X _6852_/D _7049_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_81_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_704 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_501 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_681 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5803_ _6993_/Q _5627_/X _5803_/X _6833_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6783_ _6783_/Q fanout476/X _6783_/D _6890_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3995_ VGND VPWR _3998_/S _6357_/A1 hold586/X _3995_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5734_ _5652_/Y _5734_/X _5728_/X _3178_/Y _6789_/Q _5733_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_10_409 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5665_ _6858_/Q _5663_/X _5665_/X _6922_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_30_280 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_175_252 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_148_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_628 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4616_ _4716_/A _4698_/C _4616_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_5596_ _5574_/Y _5595_/X _5596_/A1 _5597_/B _7100_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 Xhold410 _5517_/X _7057_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_191_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold421 _6671_/Q hold421/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4547_ _5114_/A _4881_/B _4576_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xhold432 _4325_/X _6712_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold443 _7193_/A hold443/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold454 _4148_/X _6557_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold465 _6878_/Q hold465/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold476 _5306_/X _6870_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4478_ _4739_/A _4653_/C _4642_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 Xhold487 _6621_/Q hold487/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold498 _5453_/X _7001_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6217_ _6218_/C _5975_/C _6461_/Q _6579_/Q _5945_/X VGND VPWR _6216_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_104_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3429_ _3429_/X _3358_/Y input59/X input18/X _5193_/A VGND VPWR _3418_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7197_ VGND VPWR _7197_/X _7197_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_6148_ _6448_/Q _5601_/X _6148_/X _6968_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1110 _5413_/X _6965_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_58_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1121 _6717_/Q _4331_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1132 _4175_/X _6580_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1143 _6565_/Q _4158_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_58_678 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1154 _5257_/X _6826_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6079_ _7014_/Q _5940_/X _6079_/X _6854_/Q _5967_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1165 hold1576/X _4110_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1176 _4053_/X _6490_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_626 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1187 _6442_/Q _4000_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1198 _5326_/X _6888_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_715 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_13_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_720 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_110_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_127_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_344 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_49_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_464 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_63_136 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_81 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_586 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3780_ _3780_/X _3355_/X _6850_/Q _5283_/A input93/X _5190_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 XFILLER_158_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5450_ VGND VPWR _5453_/S hold60/X hold152/X _5450_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_67_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4401_ _4631_/D _4653_/B _4633_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 X_5381_ VGND VPWR _5381_/S _5540_/A1 hold307/X _5381_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7120_ _7120_/Q fanout466/X _7120_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xclkbuf_3_2_0_wb_clk_i _7131_/CLK clkbuf_3_3_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_4332_ VGND VPWR _4333_/S _5494_/A1 hold373/X _4332_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_5_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_113_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7051_ _7051_/Q fanout485/X _7051_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4263_ VGND VPWR _4267_/S hold667/X _4263_/A0 _4263_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_140_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6002_ VGND VPWR _6226_/B _6786_/Q _5610_/Y _6002_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 X_3214_ _6861_/Q _3214_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4194_ VGND VPWR _4195_/S _4194_/A1 _3447_/Y _6597_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_762 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_486 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6904_ _6904_/Q fanout482/X _6904_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_35_372 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6835_ _6835_/D VPWR _6835_/Q fanout463/X _7063_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_23_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_707 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6766_ _6766_/Q fanout470/X _6766_/D _6890_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3978_ VGND VPWR _3980_/S hold99/X _3978_/A0 _3978_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5717_ _3207_/Y _5651_/B _5717_/Y _5899_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_6697_ _6697_/Q _6697_/D VPWR fanout445/X _6755_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_109_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_2_1__f_mgmt_gpio_in[4] _3945_/A1 clkbuf_0_mgmt_gpio_in[4]/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_40_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_734 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_211 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5648_ _5664_/A _5648_/X _5663_/C _5658_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_108_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5579_ VGND VPWR _5583_/S _5658_/B _6508_/Q _5667_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_151_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold240 _4082_/X _6504_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold251 _6787_/Q hold251/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold262 _5534_/X _7072_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold273 _6620_/Q hold273/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold284 _5294_/X _6859_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold295 _6931_/Q hold295/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_49_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_104_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_58 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_250 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_626 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_102 _7157_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_113 input64/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_124 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_135 _6431_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_146 _5513_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_121_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_157 hold99/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_168 _3700_/Y VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_179 _5978_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_14_556 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_233 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_115_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_114_108 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_154_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_491 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_69_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput8 VGND VPWR input8/X mask_rev_in[13] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_49_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_76_294 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_607 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4950_ VGND VPWR _4950_/X _4723_/B _4581_/Y _4574_/A _4810_/Y VGND VPWR sky130_fd_sc_hd__a211o_1 X_3901_ VGND VPWR _3901_/C _4374_/A _3907_/A _3901_/D _4702_/C VGND VPWR sky130_fd_sc_hd__and4b_1 X_4881_ _4882_/C _4881_/B _4881_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6620_ _6620_/Q fanout470/X _6620_/D _6712_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3832_ _3832_/B _3838_/A _3837_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6551_ _6551_/Q fanout454/X _6551_/D _6632_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3763_ VGND VPWR _3829_/A _6727_/Q _3762_/Y _3763_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5502_ VGND VPWR hold77/X hold42/X _5502_/A0 hold78/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_9_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6482_ _6482_/Q _6482_/D VPWR fanout450/X _6707_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3694_ _7057_/Q hold86/A _3694_/X _6627_/Q _4232_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5433_ VGND VPWR _5435_/S _5469_/A1 hold698/X _5433_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput301 _3788_/Y reset VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput312 _7200_/X spimemio_flash_io3_di VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_10_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput323 hold1319/X hold1320/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput334 hold1377/X hold1378/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5364_ _5372_/S hold17/X _5364_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xoutput345 hold1341/X hold1342/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_7103_ _7103_/Q fanout460/X _7103_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_113_130 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4315_ VGND VPWR _4315_/S _6357_/A1 hold614/X _4315_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5295_ VGND VPWR _5300_/S _5544_/A1 hold407/X _5295_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7034_ _7034_/Q fanout450/X _7034_/D _7037_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4246_ VGND VPWR _4249_/S _5534_/A1 hold415/X _4246_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_19_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4177_ VGND VPWR _4177_/S _6357_/A1 hold562/X _4177_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_710 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_681 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_51_640 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_51_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_364 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6818_ _6818_/Q _6818_/D VPWR fanout476/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_51_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6749_ _6749_/Q _6749_/D VPWR fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_183_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_149_594 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_714 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_279 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_46_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_50 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_132_94 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_159_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_70 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_375 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_386 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_541 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_127_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_127_299 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_556 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_96_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4100_ VGND VPWR _5202_/B _5540_/A1 hold341/X _4100_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5080_ VGND VPWR _5087_/A _5080_/B _5080_/A _5080_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_96_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4031_ VGND VPWR hold68/X hold60/X _4031_/A0 hold69/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_49_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_64_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5982_ _6810_/Q _5971_/B _5982_/X _6890_/Q _5946_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4933_ _4944_/A _4933_/C _5068_/C _5002_/C _5138_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_4864_ _4864_/X _4618_/Y _5084_/A _4694_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XANTENNA_13 _5265_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_178_667 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_24 _3508_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6603_ _6603_/Q _6383_/A _6603_/D _6674_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3815_ _7002_/Q _3370_/Y _3815_/X _6764_/Q _5184_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_20_334 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_35 _3828_/Y VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4795_ _4796_/D _4546_/Y _4697_/Y _4631_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XANTENNA_46 _5627_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_57 _5971_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_192_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6534_ _6534_/Q fanout461/X _6534_/D _6539_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XANTENNA_68 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3746_ _3751_/B _4304_/A _6762_/Q _6696_/Q _5182_/S VGND VPWR _3745_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_118_222 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_79 _6787_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6465_ _6465_/Q _6401_/A _6465_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3677_ _7028_/Q hold49/A _3677_/X _7049_/Q _5505_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_118_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_372 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5416_ VGND VPWR _5417_/S _5548_/A1 hold924/X _5416_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6396_ VPWR VGND _6396_/X _6396_/B _6396_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5347_ VGND VPWR _5354_/S _5473_/A1 _5347_/A0 _5347_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput175 _3935_/X mgmt_gpio_oeb[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_142_770 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput186 _3934_/X mgmt_gpio_oeb[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput197 _3220_/Y mgmt_gpio_oeb[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_102_623 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5278_ VGND VPWR _5282_/S _5509_/A1 hold914/X _5278_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7017_ _7017_/Q fanout461/X _7017_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4229_ _4230_/B _4229_/X _6640_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 XFILLER_101_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_56_721 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_220 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_234 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_577 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_46_231 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_36_91 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_673 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_161 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_475 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_317 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3600_ _3604_/B _5166_/A _6893_/Q _6754_/Q _5328_/A VGND VPWR _3591_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_174_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput11 VPWR VGND mask_rev_in[16] input11/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xinput22 mask_rev_in[26] input22/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_4580_ _4580_/X _4948_/D _4561_/B _4611_/B _4578_/X _4575_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 Xinput33 mask_rev_in[7] input33/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput44 mgmt_gpio_in[17] input44/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput55 VPWR VGND input55/X mgmt_gpio_in[27] VGND VPWR sky130_fd_sc_hd__buf_2 X_3531_ _6564_/Q _4151_/A _3531_/X _6664_/Q _4262_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 Xinput66 VPWR VGND _7200_/A mgmt_gpio_in[37] VGND VPWR sky130_fd_sc_hd__buf_4 Xinput77 VGND VPWR input77/X ser_tx VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xhold806 _7075_/Q hold806/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold817 _5546_/X _7083_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold828 _6427_/Q hold828/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput88 VPWR VGND _3949_/B spimemio_flash_io1_oeb VGND VPWR sky130_fd_sc_hd__buf_4 Xinput99 _4563_/A wb_adr_i[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xhold839 _4303_/X _6694_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6250_ _6250_/D _6250_/C _6251_/B _6250_/A _6250_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_3462_ _6975_/Q _5418_/A _3462_/X _6935_/Q _5373_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_115_236 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5201_ VGND VPWR _5201_/S _5540_/A1 hold395/X _5201_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_109 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6181_ _6609_/Q _5943_/X _6181_/X _6655_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_130_206 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3393_ _3393_/X _3358_/Y _6953_/Q input19/X _3781_/A2 VGND VPWR _3383_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5132_ _5120_/X _5116_/Y _5087_/A _5131_/X _5143_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_123_291 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1506 _7131_/Q _6304_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_69_367 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1517 _7128_/Q _6229_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5063_ _5064_/C _4619_/Y _4974_/B _5010_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_57_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1528 _7161_/Q _3259_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1539 _7150_/Q _6351_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4014_ VPWR VGND _4014_/A _4019_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_65_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_746 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5965_ _5979_/A _5981_/B _5969_/C _5965_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_12_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4916_ VGND VPWR _4918_/B _4916_/B _5118_/A _4916_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_5896_ _5896_/C _5896_/Y _5896_/A _5896_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_4847_ _4847_/A _4847_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4778_ _5039_/B _4593_/Y _5023_/B _4777_/X _4884_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_165_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6517_ _6517_/Q fanout481/X _6517_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3729_ _3729_/A _3729_/C _3730_/C _3729_/D _3729_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_4 XFILLER_146_372 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_106_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6448_ _6448_/Q fanout483/X _6448_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_164_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_567 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6379_ VPWR VGND _6379_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_0_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_57_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_264 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_707 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_267 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_654 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_114 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_144_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_172_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_191 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_113_707 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_154_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5750_ VGND VPWR _5754_/A _5928_/A2 _5740_/X _6838_/Q _5749_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_22_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4701_ _4702_/A _4701_/Y _4702_/B _4702_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_5681_ _5681_/C _5681_/Y _5681_/A _5681_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_4632_ _4632_/Y _4632_/B _4753_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_163_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_147_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4563_ _4773_/A _4633_/B _4563_/A _4631_/D _4563_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_116_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold603 _5498_/X _7040_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold614 _6704_/Q hold614/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6302_ _6289_/Y _6302_/X _6301_/X _6226_/B _6544_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_3514_ VGND VPWR _3511_/Y _3523_/B _3414_/Y _6649_/Q _4244_/A _3513_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 Xhold625 _5282_/X _6849_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_116_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold636 _6952_/Q hold636/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4494_ _4494_/Y _4881_/B _5010_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold647 _4003_/X _6445_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold658 _6945_/Q hold658/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6233_ _6250_/A _5976_/D _6692_/Q _6621_/Q _5954_/X VGND VPWR _6230_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 Xmax_cap377 hold74/X hold75/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold669 _6864_/Q hold669/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3445_ _3446_/D _3365_/Y _6968_/Q input9/X _5409_/A VGND VPWR _3444_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_116_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmax_cap388 _5616_/X _5902_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 X_6164_ _6165_/C _5975_/C _6985_/Q _6841_/Q _5945_/X VGND VPWR _6157_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3376_ _3964_/A _3717_/B _3376_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5115_ _5116_/A _5115_/C _5115_/A _5115_/B _5115_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_85_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1303 _6540_/Q _4128_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1314 _5491_/X _7034_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6095_ _7022_/Q _5937_/X _6095_/X _6886_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1325 hold1422/X hold1325/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1336 hold1336/A wb_dat_o[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_57_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1347 hold1429/X hold1347/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5046_ VGND VPWR _5096_/B _5046_/B _5046_/A _5046_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1358 hold1358/A wb_dat_o[26] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_27_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1369 _4191_/A1 hold1369/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_318 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_724 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_26_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6997_ _6997_/Q fanout465/X _6997_/D _6997_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_43_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_418 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5948_ _5969_/A _5981_/A _5981_/C _5948_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_138_103 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5879_ VGND VPWR _5879_/X _5634_/X _5876_/X _6452_/Q _5878_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_126_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_5_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_103_740 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_68_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_191_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_51 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_584 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_17_746 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_716 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_240 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_251 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_262 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_284 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_125 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_295 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_444 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_129_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_8_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_651 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_738 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_215 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3230_ _6416_/Q _3234_/C _6417_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_140_378 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_473 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_94_432 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_318 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6920_ _6920_/Q fanout473/X _6920_/D _6920_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_6851_ _6851_/D VPWR _6851_/Q fanout456/X _6963_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5802_ _3228_/Y _5651_/B _5802_/Y _5899_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_6782_ _6782_/Q fanout481/X _6782_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3994_ VGND VPWR _3998_/S _6356_/A1 hold772/X _3994_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_50_568 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5733_ _5732_/X _6805_/Q _5729_/X _5731_/X _5733_/X _5660_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a2111o_2 XFILLER_50_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5664_ _5664_/A _5667_/C _5666_/C _5664_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4615_ _4615_/Y _4615_/B _4661_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5595_ VGND VPWR _5595_/X _5969_/A _6508_/Q _5968_/A VGND VPWR sky130_fd_sc_hd__and3_1 Xhold400 _5385_/X _6940_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold411 _7076_/Q hold411/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4546_ _4546_/Y _4753_/B _4562_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold422 _4276_/X _6671_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold433 _6522_/Q hold433/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_278 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold444 _5198_/X _6774_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold455 _7022_/Q hold455/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold466 _5315_/X _6878_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4477_ _5088_/A _5010_/A _4650_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xhold477 _6934_/Q hold477/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold488 _4223_/X _6621_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_248 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold499 _6658_/Q hold499/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_leaf_69_csclk _7026_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_6216_ _6666_/Q _5938_/X _6216_/X _6706_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3428_ _3428_/X _3981_/A _6928_/Q _6432_/Q _5364_/A VGND VPWR _3427_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7196_ VGND VPWR _7196_/X _7196_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_38_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_378 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6147_ _6150_/C _5975_/A _7032_/Q _6848_/Q _5944_/X VGND VPWR _6146_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1100 _5230_/X _6802_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3359_ _5256_/A _3562_/A hold28/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_97_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1111 _6677_/Q _4283_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1122 _4331_/X _6717_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1133 _6818_/Q _5248_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1144 _4158_/X _6565_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6078_ VGND VPWR _6279_/S _6077_/X _6078_/A0 _6078_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold1155 _6670_/Q _4275_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1166 _4110_/X _6524_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1177 _6665_/Q _4269_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5029_ VPWR VGND _5083_/C _5029_/B _5029_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xhold1188 _4000_/X _6442_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1199 _6962_/Q _5410_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_373 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_80_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_220 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_182_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_127_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_122_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_532 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_148 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_598 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_270 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_551 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4400_ VGND VPWR _4408_/B _4631_/D _4400_/B VGND VPWR sky130_fd_sc_hd__xnor2_2 XFILLER_145_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5380_ VGND VPWR _5381_/S _5548_/A1 hold930/X _5380_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4331_ VGND VPWR _4333_/S _5493_/A1 _4331_/A0 _4331_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7050_ _7050_/Q fanout483/X _7050_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4262_ VPWR VGND _4262_/A _4267_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_140_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6001_ VGND VPWR _6001_/C _5992_/X _6001_/X _6001_/D _6226_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_101_518 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3213_ _6869_/Q _3213_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4193_ VGND VPWR _4195_/S _4193_/A1 _3486_/Y _6596_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_140_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_281 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_67_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6903_ _6903_/Q fanout481/X _6903_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6834_ _6834_/D VPWR _6834_/Q fanout463/X _7026_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_35_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_50_332 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6765_ _6765_/Q fanout470/X _6765_/D _6890_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_50_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3977_ VGND VPWR hold106/X hold97/X _6624_/Q _3977_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_149_743 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5716_ _6445_/Q _5614_/X _5716_/X _6893_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6696_ _6696_/Q _6360_/A _6696_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_148_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5647_ _5669_/A _5646_/X _7026_/Q _6906_/Q _5645_/X VGND VPWR _5644_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_148_286 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_164_746 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_164_757 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_16 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5578_ _5667_/C _7095_/Q _7094_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold230 _4285_/X _6679_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold241 _6925_/Q hold241/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold252 _5213_/X _6787_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4529_ _4529_/Y _4413_/Y _4724_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold263 _6443_/Q hold263/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_6_8 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold274 _4222_/X _6620_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold285 _6827_/Q hold285/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold296 _5375_/X _6931_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7179_ _7179_/A _7179_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_58_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_103 _7173_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_114 _3957_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_125 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_164_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_136 _6432_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_147 _6357_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_158 hold99/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_169 _3803_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_41_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_595 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_5_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_69_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_39_8 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput9 VPWR VGND input9/X mask_rev_in[14] VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_162_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_37_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_619 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3900_ VGND VPWR input118/X _3900_/D _3901_/D _3900_/C input119/X VGND VPWR sky130_fd_sc_hd__and4bb_1 X_4880_ _4882_/B _5073_/A _4951_/B _5086_/B _4880_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_32_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_177_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_175 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3831_ VPWR VGND _3832_/B _3837_/C _3837_/B VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_32_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_177_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6550_ _6550_/Q fanout454/X _6550_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3762_ _3762_/Y _3762_/A _3762_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_5501_ VGND VPWR hold77/A _5519_/A1 hold182/X _5501_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6481_ _6481_/Q fanout450/X _6481_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3693_ _3698_/B _3692_/Y _6542_/Q _6765_/Q _4127_/A VGND VPWR _3691_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5432_ VGND VPWR _5435_/S hold60/X hold147/X _5432_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput302 _3956_/X ser_rx VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_133_418 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput313 hold1379/X wb_ack_o VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput324 hold1321/X hold1322/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5363_ VGND VPWR _5363_/S hold22/X hold489/X _5363_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_610 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput335 hold1361/X hold1362/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_7102_ _7102_/Q fanout464/X _7102_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4314_ VGND VPWR _4315_/S _6356_/A1 hold782/X _4314_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5294_ VGND VPWR _5300_/S _5465_/A1 hold283/X _5294_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_376 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7033_ _7033_/Q fanout464/X _7033_/D _7033_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4245_ VGND VPWR _4249_/S hold667/X _4245_/A0 _4245_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_484 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4176_ VGND VPWR _4177_/S _6356_/A1 hold734/X _4176_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_35_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_287 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6817_ _6817_/Q fanout473/X _6817_/D _7070_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_11_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_149_540 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6748_ _6748_/Q _6748_/D VPWR fanout449/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_137_702 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_212 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6679_ _6679_/Q fanout455/X _6679_/D _7036_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_176_392 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_204 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_105_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_132_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_78_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_164 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_116_63 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_120_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xmgmt_gpio_14_buff_inst mgmt_gpio_out[14] _3937_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_73_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_18_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_46_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_60 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_71 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_41_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_14_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_156 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_167 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_178 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_128_746 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4030_ VGND VPWR hold68/X _5494_/A1 _4030_/A0 _4030_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_2_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_221 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5981_ _5981_/A _5981_/B _5981_/C _5981_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_80_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_287 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4932_ _4562_/Y _5138_/A _4673_/A _4755_/X _4542_/A _4628_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_4863_ _4496_/Y _4877_/C _4618_/Y _4542_/B _4700_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_32_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_14 _5505_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6602_ _6602_/Q fanout469/X _6602_/D _6769_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XANTENNA_25 _4202_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3814_ _3814_/B _5184_/A _3814_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_178_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_36 _4084_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4794_ _4616_/Y _4796_/C _4619_/Y _4846_/B _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XANTENNA_47 _5631_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_177_189 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_58 _6301_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6533_ _6533_/Q _6360_/A _6533_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XANTENNA_69 _6075_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3745_ _6859_/Q _5292_/A _3745_/X _7003_/Q _3370_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_118_234 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6464_ _6464_/Q _6360_/A _6464_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3676_ _3679_/C _5301_/A _6900_/Q _6868_/Q _5337_/A VGND VPWR _3675_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_118_289 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5415_ VGND VPWR _5417_/S _5469_/A1 hold469/X _5415_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6395_ VPWR VGND _6395_/X _6396_/B _6396_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_114_451 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5346_ _5354_/S _5541_/B _5346_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xoutput176 _3213_/Y mgmt_gpio_oeb[10] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_0_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput187 _3203_/Y mgmt_gpio_oeb[20] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput198 _3193_/Y mgmt_gpio_oeb[30] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_102_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5277_ VGND VPWR _5282_/S _5484_/A1 _5277_/A0 _5277_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7016_ _7016_/Q fanout474/X _7016_/D _7016_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4228_ _4228_/Y _6638_/Q _4228_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_46_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4159_ VGND VPWR _4162_/S _6354_/A1 hold810/X _4159_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_62_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_471 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_178_58 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_11_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_73 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_465 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout392 hold22/X _5513_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_46_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_46_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_159_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_173 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput12 mask_rev_in[17] input12/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput23 VPWR VGND mask_rev_in[27] input23/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xinput34 VGND VPWR input34/X mask_rev_in[8] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_174_148 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput45 mgmt_gpio_in[18] input45/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_3530_ _4262_/A hold36/X hold66/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xinput56 mgmt_gpio_in[28] input56/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xhold807 _5537_/X _7075_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput67 VPWR VGND _3268_/C mgmt_gpio_in[3] VGND VPWR sky130_fd_sc_hd__buf_6 Xinput78 VPWR VGND spi_csb input78/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 Xinput89 spimemio_flash_io2_do input89/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xhold818 _6696_/Q hold818/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold829 _3983_/X _6427_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3461_ _3467_/A _3964_/A _6967_/Q _6423_/Q _5409_/A VGND VPWR _3456_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_116_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_115_248 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5200_ VGND VPWR _5201_/S _5521_/A1 hold365/X _5200_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_170_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_170_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6180_ _6660_/Q _5976_/B _6180_/X _6710_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3392_ _3392_/D _3392_/C _3392_/Y _3392_/A _3392_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_69_302 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_218 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5131_ VGND VPWR _5131_/X _5131_/B _5131_/A _5131_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1507 _7108_/Q _5735_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5062_ _5134_/B _5062_/C _5062_/A _5062_/B _5062_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1518 _7111_/Q _5778_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1529 _3258_/X _7162_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4013_ VGND VPWR _4013_/S _5546_/A1 hold978/X _4013_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_338 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_533 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_235 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5964_ _5964_/A _5969_/C _5981_/C _5975_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4915_ VGND VPWR _4915_/C _4906_/Y _4916_/C _4915_/D _4915_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_178_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_80_599 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5895_ VGND VPWR _5896_/C _5632_/X _5892_/X _6688_/Q _5894_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_4846_ _4846_/B _4847_/A _4846_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_20_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_627 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_165_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4777_ _4776_/X _5114_/B _4602_/Y _4753_/A _4777_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_6516_ _6516_/Q fanout481/X _6516_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3728_ _3729_/D _4196_/A _6939_/Q _6600_/Q _5382_/A VGND VPWR _3727_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_107_716 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_146_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6447_ _6447_/Q fanout461/X _6447_/D _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_146_395 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3659_ _6908_/Q _5346_/A _3659_/X _6916_/Q _5355_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_106_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_579 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6378_ VPWR VGND _6378_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_88_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5329_ VGND VPWR _5336_/S _5473_/A1 _5329_/A0 _5329_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_202 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_235 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_35 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_218 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_229 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_421 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_307 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_164_170 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_140_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_121_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_94_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_703 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_19_265 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_555 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4700_ _4700_/Y _4716_/A _4911_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_5680_ _5681_/C _5619_/X _7019_/Q _5677_/X _5679_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a211o_2 XFILLER_148_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4631_ _4631_/D _4653_/C _4716_/A _4631_/Y _4633_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4b_4 XFILLER_8_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4562_ _4562_/A _4600_/B _4562_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold604 _6811_/Q hold604/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6301_ _6292_/X _6301_/B _6301_/X _6301_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 Xhold615 _4315_/X _6704_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3513_ _7067_/Q _5523_/A _3513_/X _6464_/Q _4020_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold626 _7017_/Q hold626/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4493_ _5083_/A _4493_/B _5010_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold637 _5398_/X _6952_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold648 _7007_/Q hold648/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold659 _5390_/X _6945_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6232_ _7153_/Q _5958_/X _6232_/X _6482_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_131_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xmax_cap378 _3543_/A _3573_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_3444_ _6952_/Q _5391_/A _3444_/X _7024_/Q hold29/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_171_696 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6163_ _6165_/B _5965_/X _6977_/Q _6801_/Q _5947_/X VGND VPWR _6162_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3375_ _3375_/A _3415_/B _3814_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_5114_ _5115_/D _5114_/C _5114_/A _5114_/B _5114_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1304 _4128_/X _6540_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6094_ _6094_/X _5975_/B _7067_/Q _6870_/Q _5934_/X VGND VPWR _6093_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1315 hold1412/X hold1315/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1326 hold1326/A wb_dat_o[10] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1337 hold1421/X hold1337/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1348 hold1348/A wb_dat_o[17] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5045_ _4453_/B _4947_/B _4570_/Y _5046_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_57_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1359 _4168_/A1 hold1359/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_27_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6996_ _6996_/Q fanout463/X _6996_/D _7063_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5947_ _5969_/A _5968_/A _5981_/A _5947_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_43_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_240 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_139_605 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5878_ _5878_/X _5648_/X _6647_/Q _6606_/Q _5621_/X VGND VPWR _5877_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4829_ _4820_/X _4818_/X _4810_/B _4456_/Y _4829_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_193_243 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_148 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_287 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_134_376 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_161_184 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_103_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_76_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_116 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_758 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_235 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_230 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_241 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_252 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_263 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_402 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_274 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_285 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_296 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_129_137 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_172_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_227 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_335 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_39_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1 hold1/A hold1/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_39_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_444 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_81_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6850_ _6850_/D VPWR _6850_/Q fanout457/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5801_ _6905_/Q _5621_/X _5801_/X _6857_/Q _5648_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6781_ _6781_/Q fanout473/X _6781_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3993_ VGND VPWR _3998_/S _6355_/A1 hold984/X _3993_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5732_ VGND VPWR _5732_/X _5664_/X _5716_/X _6925_/Q _5718_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_22_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5663_ _5664_/A _5663_/X _5663_/C _5666_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_163_405 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4614_ VPWR VGND _4661_/A _4698_/C _4615_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5594_ _5597_/B _5964_/A _5594_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_191_747 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold401 _6534_/Q hold401/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4545_ VPWR VGND _4562_/A _4576_/B _4753_/B VGND VPWR sky130_fd_sc_hd__and2_2 Xhold412 _5538_/X _7076_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold423 _6769_/Q hold423/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold434 _4107_/X _6522_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold445 _6950_/Q hold445/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold456 _5477_/X _7022_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_145_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4476_ _4476_/Y _4710_/A _4984_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold467 _6846_/Q hold467/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold478 _5378_/X _6934_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold489 _6921_/Q hold489/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6215_ _6218_/B _5965_/X _6451_/Q _6546_/Q _5947_/X VGND VPWR _6214_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3427_ input69/X _4083_/S _3427_/X _7077_/Q _5532_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_7195_ VGND VPWR _7195_/X _7195_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_131_357 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6146_ _7024_/Q _5937_/X _6146_/X _6888_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3358_ _3358_/Y _3511_/A _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 Xhold1101 _6869_/Q _5305_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1112 _4283_/X _6677_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1123 _6632_/Q _4241_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1134 _5248_/X _6818_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6077_ VGND VPWR _6303_/S _6076_/X _7121_/Q _6077_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold1145 _6512_/Q _4091_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3289_ hold33/A hold32/X _3288_/Y _6488_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__a21bo_1 Xhold1156 _4275_/X _6670_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1167 _6550_/Q _4140_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1178 _4269_/X _6665_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5028_ _4522_/D _4875_/A _4695_/Y _4623_/Y _5085_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_38_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1189 _7151_/Q _6353_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6979_ _6979_/D VPWR _6979_/Q fanout463/X _7063_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_110_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_80_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_139_435 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_69 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_135_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_622 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold990 _6763_/Q hold990/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_95_208 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_379 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_76_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_76_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_544 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_157_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_282 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_298 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4330_ VGND VPWR _4333_/S _5492_/A1 _4330_/A0 _4330_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_600 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_482 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_633 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4261_ VGND VPWR _4261_/S _5546_/A1 hold970/X _4261_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6000_ _6000_/D _6000_/C _6001_/D _6000_/A _6000_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_86_219 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3212_ _6877_/Q _3212_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4192_ VGND VPWR _4195_/S _4192_/A1 _4192_/A0 _6595_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_39_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_55_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6902_ _6902_/Q fanout478/X _6902_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6833_ _6833_/Q fanout473/X _6833_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_24_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6764_ _6764_/Q fanout457/X _6764_/D _6926_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3976_ VGND VPWR _3980_/S _5469_/A1 hold689/X _3976_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5715_ _6845_/Q _5902_/A2 _5715_/X _6837_/Q _5928_/A2 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6695_ _6695_/Q fanout445/X _6695_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_191_500 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5646_ _5664_/A _5646_/X _5666_/B _5667_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_164_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5577_ _5576_/B _5576_/Y _7094_/Q _5574_/Y _7094_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_117_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold220 _5449_/X _6997_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold231 _6981_/Q hold231/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4528_ _4947_/B _4528_/X _4902_/A _4527_/X _4542_/B _4413_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_117_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_116_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold242 _5368_/X _6925_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold253 _7003_/Q hold253/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold264 _4001_/X _6443_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_49_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold275 _7011_/Q hold275/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold286 _5258_/X _6827_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4459_ _4542_/D _4459_/A _4459_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xhold297 _6835_/Q hold297/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_172_38 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7178_ _7178_/A _7178_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_131_198 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6129_ VGND VPWR _6304_/S _6128_/X _6129_/A0 _7124_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_112_390 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_444 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_58_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_58_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_104 user_clock VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_61_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_115 _3251_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_126 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_137 _6433_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_148 _5528_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_159 hold666/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_81_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_327 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_127_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_674 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_452 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_327 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_92_712 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_639 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3830_ _3830_/A1 _3829_/B _6727_/D _3829_/Y _3828_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xclkbuf_leaf_68_csclk _7063_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_189_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_32_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3761_ VGND VPWR _3761_/C _3733_/X _3762_/B _3761_/D _3761_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_13_591 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5500_ VGND VPWR hold77/X _5509_/A1 hold590/X _5500_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_192_319 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6480_ _6480_/Q fanout450/X _6480_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_145_202 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3692_ _3714_/B _3692_/Y _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XFILLER_145_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5431_ VGND VPWR _5435_/S _5494_/A1 hold231/X _5431_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_173_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput303 _5606_/A serial_clock VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput314 hold1371/X hold1372/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5362_ VGND VPWR _5363_/S _5521_/A1 hold718/X _5362_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_739 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput325 hold1365/X hold1366/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput336 hold1367/X hold1368/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7101_ _7101_/Q _7101_/D VPWR fanout464/X _7113_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_4313_ VGND VPWR _4315_/S _6355_/A1 hold972/X _4313_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5293_ VGND VPWR _5300_/S _6353_/A1 _5293_/A0 _5293_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_666 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7032_ _7032_/Q fanout483/X _7032_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_101_305 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_388 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4244_ VPWR VGND _4244_/A _4249_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_141_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_101_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4175_ VGND VPWR _4177_/S _6355_/A1 _4175_/A0 _4175_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_406 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_480 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6816_ _6816_/Q fanout482/X _6816_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_11_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6747_ _6747_/Q fanout447/X _6747_/D _6747_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3959_ VPWR VGND _6768_/Q _3959_/X _3959_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_149_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6678_ _6678_/Q fanout455/X _6678_/D _7037_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_109_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5629_ _5641_/B _5628_/X _6986_/Q _6866_/Q _5627_/X VGND VPWR _5626_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_164_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_191_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_144_290 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_104_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_132_496 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_116_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_120_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_74_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_100_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_61_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_56 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_620 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_322 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_61 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_72 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_316 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_83 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_42_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_94 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_42_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_167_360 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_155_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_257 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_588 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_115_419 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_576 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_143_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_157_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_539 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_1_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_110_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_233 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5980_ _6850_/Q _5967_/X _5980_/X _6986_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_52_406 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_52_428 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4931_ _4933_/C _4921_/Y _4741_/A _4741_/B _4612_/Y _4663_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 XFILLER_33_642 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_614 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4862_ _4689_/Y _4456_/Y _4872_/B _4496_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 XFILLER_177_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_177_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6601_ _6601_/Q _6601_/D VPWR fanout469/X _6601_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3813_ _3817_/C _5328_/A _6858_/Q _6890_/Q _5292_/A VGND VPWR _3812_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_177_135 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_15 _5505_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_26 _4127_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4793_ _4619_/Y _5064_/A _4645_/Y _4846_/B _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XANTENNA_37 _4108_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_20_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_119_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_48 _5637_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6532_ _6532_/Q _3946_/B _6532_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3744_ _3751_/A _4214_/A _6743_/Q _6615_/Q _5154_/A VGND VPWR _3743_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XANTENNA_59 _6301_/C VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_192_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6463_ _6463_/Q _6400_/A _6463_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_118_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3675_ _6924_/Q _5364_/A _3675_/X _6707_/Q _4316_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_106_408 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_352 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5414_ VGND VPWR _5417_/S _5546_/A1 hold802/X _5414_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6394_ VPWR VGND _6394_/X _6396_/B _6396_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5345_ VGND VPWR _5345_/S _5540_/A1 hold331/X _5345_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xoutput177 _3212_/Y mgmt_gpio_oeb[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_114_463 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput188 _3202_/Y mgmt_gpio_oeb[21] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput199 _3192_/Y mgmt_gpio_oeb[31] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5276_ VGND VPWR _5282_/S _5543_/A1 hold560/X _5276_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_101_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_87_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7015_ _7015_/Q fanout461/X _7015_/D _7017_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4227_ _6639_/Q _4228_/B _6636_/Q _6637_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_102_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4158_ VGND VPWR _4162_/S _5491_/A1 _4158_/A0 _4158_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4089_ VGND VPWR _4101_/S _4088_/X hold610/X _4089_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_43_406 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_127_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_87_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_59_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xfanout393 VPWR VGND _5540_/A1 hold22/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_46_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_653 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_102 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_634 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_30_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_105 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput13 VPWR VGND input13/X mask_rev_in[18] VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_128_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput24 VPWR VGND input24/X mask_rev_in[28] VGND VPWR sky130_fd_sc_hd__buf_2 Xinput35 VPWR VGND input35/X mask_rev_in[9] VGND VPWR sky130_fd_sc_hd__buf_2 Xinput46 VPWR VGND input46/X mgmt_gpio_in[19] VGND VPWR sky130_fd_sc_hd__buf_2 Xinput57 VGND VPWR input57/X mgmt_gpio_in[29] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput68 _3956_/A mgmt_gpio_in[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xhold808 _6541_/Q hold808/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold819 _4306_/X _6696_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xinput79 _3957_/B spi_enabled VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 X_3460_ input49/X _4058_/S _3460_/X _7068_/Q _5523_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_6_373 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3391_ _3392_/D _5274_/A _6921_/Q _6849_/Q _5355_/A VGND VPWR _3390_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_124_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5130_ _5131_/C _4518_/B _4895_/B _4855_/Y _4631_/Y _4691_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_69_314 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1508 _6586_/Q _4182_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5061_ VGND VPWR _6723_/D _4229_/X _5022_/Y _5061_/A1 _5060_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_96_155 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1519 _5778_/X _7111_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4012_ VGND VPWR _4013_/S _5518_/A1 hold507/X _4012_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_244 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_715 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5963_ _5978_/A _5969_/A _5969_/C _5975_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 Xclkbuf_opt_4_0_csclk clkbuf_opt_4_0_csclk/X _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_52_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4914_ VGND VPWR _4915_/D _5083_/B _5114_/B _5114_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_5894_ _5894_/X _5654_/X _6568_/Q _6678_/Q _5635_/X VGND VPWR _5893_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_80_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4845_ _4907_/B _5042_/B _4845_/X _4911_/B _4644_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_32_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_178_488 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_20_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4776_ VGND VPWR _4776_/X _5114_/A _5088_/A _4776_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_148_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6515_ _6515_/Q fanout476/X _6515_/D _6890_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3727_ _7040_/Q hold76/A _3727_/X _7152_/Q _6352_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_180_119 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_672 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6446_ hold79/A fanout478/X hold80/X _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3658_ _3661_/C _5154_/A _6796_/Q _6744_/Q _3326_/Y VGND VPWR _3657_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_173_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_106_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6377_ VPWR VGND _6377_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3589_ _7058_/Q hold86/A _3589_/X _6673_/Q _4274_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_88_623 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5328_ _5336_/S _5541_/B _5328_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_88_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5259_ VGND VPWR _5264_/S _5484_/A1 hold844/X _5259_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_113_21 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_564 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_575 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_372 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_44_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_43_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_169_433 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_623 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_319 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_157_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_333 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_55 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_112_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_263 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_93_147 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_93_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_62_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_241 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_403 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_274 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4630_ VGND VPWR _4653_/C _4633_/B _4630_/X _4631_/D _4716_/A VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_8_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4561_ _5043_/A _4690_/A _4561_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_8_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_406 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6300_ _6300_/D _6300_/C _6301_/B _6300_/A _6300_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_3512_ _4020_/A _3546_/A _3573_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold605 _5240_/X _6811_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold616 _6459_/Q hold616/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4492_ _4881_/B _4492_/D _4896_/A _4911_/A _4739_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and4b_4 Xhold627 _5471_/X _7017_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold638 _6647_/Q hold638/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold649 _5460_/X _7007_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6231_ _6611_/Q _5943_/X _6231_/X _6657_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3443_ _3446_/C _5274_/A input41/X _6848_/Q _5202_/B VGND VPWR _3442_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_170_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_355 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmax_cap368 _5391_/A _3781_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_143_366 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6162_ _6897_/Q _5946_/X _6162_/X _6809_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3374_ _5301_/A _3374_/A hold85/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_97_420 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5113_ _5113_/A1 _4229_/X _5113_/X _5112_/X _5109_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6093_ _7051_/Q _5971_/A _6093_/X _6990_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1305 _6518_/Q _4103_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1316 hold1316/A wb_dat_o[22] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1327 hold1424/X hold1327/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_111_274 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5044_ _5042_/Y _5058_/A _5043_/Y _4948_/C _4948_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 Xhold1338 hold1338/A wb_dat_o[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_38_520 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1349 _6311_/A1 hold1349/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6995_ _6995_/D VPWR _6995_/Q fanout458/X _7017_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_25_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5946_ _5979_/A _5964_/A _5969_/C _5946_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_41_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_43_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5877_ _6616_/Q _5628_/X _5877_/X _6627_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_139_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_166_403 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4828_ _5027_/A _4827_/X _4562_/Y _4948_/B _4828_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_4759_ _4672_/B _4999_/A _4626_/Y _4542_/A _4689_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_181_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_119_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_146_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_108_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_161_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6429_ _6429_/D VPWR _6429_/Q fanout449/X _7155_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_134_388 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_130_572 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_75_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_68 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_84_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_128 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_140_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_220 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_242 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_264 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_275 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_286 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_297 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_756 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_129_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_138_672 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_174 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_98_239 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_550 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold2 hold5/X hold6/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_181_70 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_94_456 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_139 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5800_ _5799_/Y _7112_/D _5798_/X _5820_/A2 _6279_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_6780_ _6780_/Q fanout473/X _6780_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3992_ VGND VPWR _3998_/S _6354_/A1 hold804/X _3992_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5731_ VGND VPWR _5731_/X _5905_/A2 _5715_/X _6797_/Q _5730_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_176_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_403 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5662_ _5669_/C _5661_/X _6802_/Q _6874_/Q _5913_/B1 VGND VPWR _5659_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_31_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4613_ _4613_/Y _4716_/A _4636_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_175_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5593_ VPWR VGND _7100_/Q _5964_/A _7099_/Q VGND VPWR sky130_fd_sc_hd__and2_2 X_4544_ VGND VPWR _4589_/B _4413_/Y _4561_/B _4948_/A _4562_/A VGND VPWR sky130_fd_sc_hd__a211o_1 Xhold402 _4121_/X _6534_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold413 _6626_/Q hold413/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold424 _5192_/X _6769_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold435 _7067_/Q hold435/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold446 _5396_/X _6950_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4475_ VPWR VGND _4650_/A _4710_/A _4984_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xhold457 _6692_/Q hold457/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_686 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold468 _5279_/X _6846_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_472 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6214_ _6631_/Q _5946_/X _6214_/X _6551_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_131_314 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold479 _6894_/Q hold479/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3426_ VGND VPWR _3426_/X _5256_/A _3423_/X _6832_/Q _3425_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_7194_ VGND VPWR _7194_/X hold91/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_6145_ _6145_/X _5975_/B _7069_/Q _6872_/Q _5934_/X VGND VPWR _6144_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3357_ hold65/X _3454_/A _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_112_572 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1102 _5305_/X _6869_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1113 _7187_/A _4065_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_434 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1124 _4241_/X _6632_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6076_ _6075_/X _6789_/Q _6076_/X _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 Xhold1135 _6799_/Q _5226_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3288_ _3288_/Y _6488_/Q _6414_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold1146 _4091_/X _6512_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1157 _6874_/Q _5311_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5027_ VGND VPWR _5080_/B _5027_/B _5027_/A _5027_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1168 _4140_/X _6550_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1179 _6858_/Q _5293_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_578 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6978_ _6978_/D VPWR _6978_/Q fanout458/X _7012_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5929_ _5652_/Y _5929_/X _5920_/X _6303_/S _6544_/Q _5928_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_179_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_179_594 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_756 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_182_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_134_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_634 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold980 _7153_/Q hold980/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold991 _5182_/X _5183_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_656 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_678 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_1_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_49_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_29_350 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_76_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_314 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_762 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_232 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_294 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_99_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4260_ VGND VPWR _4261_/S _5518_/A1 hold499/X _4260_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3211_ _6885_/Q _3211_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4191_ VGND VPWR _4195_/S _4191_/A1 _3640_/Y _6594_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_79_294 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_629 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6901_ _6901_/Q fanout481/X _6901_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_47_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6832_ _6832_/Q fanout474/X _6832_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_6763_ _6763_/Q fanout460/X _6763_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3975_ VGND VPWR _3975_/S hold52/X hold40/X hold53/A VGND VPWR sky130_fd_sc_hd__mux2_1 X_5714_ VGND VPWR _6279_/S _5713_/X _5735_/A2 _7108_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_6694_ _6694_/Q fanout470/X _6694_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_149_756 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5645_ _5664_/A _5666_/B _5660_/C _5645_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_40_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_439 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5576_ _5576_/B _5576_/Y _7094_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_156_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_117_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold210 _5177_/X _6758_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold221 _6957_/Q hold221/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4527_ _5084_/B _4525_/X _4453_/B _4542_/B _4527_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 Xhold232 _5431_/X _6981_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold243 hold243/A hold243/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold254 _5456_/X _7003_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold265 _6711_/Q hold265/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold276 _5465_/X _7011_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4458_ VGND VPWR _4953_/A _4813_/A _4551_/A _4459_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_132_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold287 _6819_/Q hold287/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_49_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_133 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold298 _5267_/X _6835_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3409_ wire357/X _3410_/B _3409_/A _3409_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3b_1 XFILLER_132_678 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7177_ VGND VPWR _7177_/X _7177_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4389_ _4389_/Y _4631_/D _4441_/B _4661_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_6128_ VGND VPWR _6303_/S _6127_/X _6128_/A0 _6128_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6059_ _6074_/B _5976_/D _7058_/Q _6877_/Q _5954_/X VGND VPWR _6058_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_58_489 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_128 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_105 user_clock VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_116 _3251_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_121_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_127 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_60_109 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_138 _6440_/Q VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_54_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_149 _5494_/A1 VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_53_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_53_194 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_41_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_356 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_339 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_732 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_14_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_743 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_255 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_686 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_710 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_339 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_754 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_76_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_724 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_201 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_172 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_44_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_334 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_177_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_676 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_518 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3760_ _3760_/D _3760_/C _3761_/D _3760_/A _3760_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_32_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_530 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3691_ _7004_/Q _3370_/Y _3691_/X _6477_/Q _4038_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_187_91 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5430_ VGND VPWR _5435_/S _5526_/A1 hold357/X _5430_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_439 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_596 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput304 _3450_/X serial_data_1 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5361_ VGND VPWR _5363_/S _5469_/A1 hold708/X _5361_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput315 hold1325/X hold1326/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput326 hold1359/X hold1360/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput337 hold1327/X hold1328/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_228 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7100_ _7100_/Q fanout464/X _7100_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4312_ VGND VPWR _4315_/S _6354_/A1 hold834/X _4312_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5292_ _5300_/S _5505_/B _5292_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_7031_ _7031_/Q fanout484/X hold51/X _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_114_678 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4243_ VGND VPWR _4243_/S _5546_/A1 hold974/X _4243_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_155 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_101_317 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4174_ VGND VPWR _4177_/S _5492_/A1 _4174_/A0 _4174_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_82_234 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6815_ _6815_/Q fanout473/X _6815_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_51_654 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6746_ _6746_/Q _6746_/D VPWR fanout447/X _6746_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_3958_ VPWR VGND _3958_/X input1/X _3958_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_50_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_176_350 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6677_ _6677_/Q _6677_/D VPWR fanout450/X _6677_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_109_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3889_ _7098_/Q _5978_/A _7097_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 XFILLER_136_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5628_ _5638_/A _5628_/X _5663_/C _5660_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_164_556 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_117_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5559_ _5604_/B _7089_/Q _7088_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_183_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_116_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_120_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_117 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_3_1_0_wb_clk_i _7130_/CLK clkbuf_3_1_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XPHY_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_51 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_62 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_84 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_187_637 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_174_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_551 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_182_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_83 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_1_260 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_64_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4930_ _4930_/X _4482_/B _4562_/Y _4741_/A _5099_/B _4758_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 XFILLER_18_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_654 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4861_ _4465_/B _4847_/A _4869_/C _4845_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_6600_ _6600_/Q fanout455/X _6600_/D _7036_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_32_164 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3812_ _3812_/X _3355_/X _6665_/Q _4268_/A _7173_/A _3320_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 XANTENNA_16 _3571_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_4792_ _4689_/Y _4703_/B _4576_/B _4796_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 XFILLER_177_147 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_193_607 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_27 _4304_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_38 _4108_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6531_ _6531_/Q fanout479/X hold39/X _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3743_ _6819_/Q _5247_/A _3743_/X _6471_/Q _4032_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XANTENNA_49 _5643_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_119_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6462_ _6462_/D VPWR _6462_/Q _6400_/A _6668_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3674_ _3679_/B _4310_/A input22/X _6702_/Q _3367_/Y VGND VPWR _3673_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_134_718 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5413_ VGND VPWR _5417_/S _5545_/A1 _5413_/A0 _5413_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_146_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6393_ VPWR VGND _6393_/X _6396_/B _6396_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5344_ VGND VPWR _5345_/S _5548_/A1 hold932/X _5344_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput178 _3211_/Y mgmt_gpio_oeb[12] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput189 _3201_/Y mgmt_gpio_oeb[22] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5275_ VGND VPWR _5282_/S hold666/X _5275_/A0 _5275_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7014_ _7014_/Q fanout457/X _7014_/D _7049_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4226_ _6643_/Q _6644_/Q _6642_/Q _4230_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_4 XFILLER_101_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4157_ VPWR VGND _4157_/A _4162_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_95_370 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4088_ VGND VPWR _5202_/B _5534_/A1 hold257/X _4088_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_705 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_83_587 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_38 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_168_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_149_350 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6729_ _3945_/A1 _6729_/Q _6381_/X _6729_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XFILLER_109_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_52_csclk _6537_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_164_386 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_540 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout394 VPWR VGND hold22/A hold174/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_46_289 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_470 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_440 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_698 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_128_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput14 VGND VPWR input14/X mask_rev_in[19] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput25 VGND VPWR input25/X mask_rev_in[29] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_167_180 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput36 VPWR VGND _3958_/A mgmt_gpio_in[0] VGND VPWR sky130_fd_sc_hd__buf_6 Xinput47 mgmt_gpio_in[1] input47/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput58 mgmt_gpio_in[2] _3251_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xinput69 VGND VPWR input69/X mgmt_gpio_in[6] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_183_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold809 _4129_/X _6541_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_143_515 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3390_ _6873_/Q _5301_/A _3390_/X _7086_/Q _5541_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_170_378 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_96_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_69_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_69_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5060_ VGND VPWR _5060_/X _5004_/Y _5038_/X _5069_/A _5059_/X VGND VPWR sky130_fd_sc_hd__a211o_1 Xhold1509 _7106_/Q _5672_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_97_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_167 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4011_ VGND VPWR _4013_/S _6355_/A1 _4011_/A0 _4011_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_38_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_38_735 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_532 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_351 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_524 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5962_ _5978_/A _5969_/C _5979_/C _5975_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4913_ VGND VPWR _4782_/A _5051_/A _4881_/B _5114_/C VGND VPWR sky130_fd_sc_hd__o21ai_1 X_5893_ _7037_/Q _5614_/X _5893_/X _6478_/Q _5630_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_21_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_33_484 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4844_ _5041_/C _4686_/Y _4887_/A _4869_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_178_456 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4775_ _4776_/C _5074_/A _4912_/A _4775_/B _4775_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_20_167 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_139 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6514_ _7180_/A fanout473/X _6514_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3726_ _3729_/C _3585_/Y _6971_/Q input96/X _5418_/A VGND VPWR _3725_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_106_206 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6445_ _6445_/Q fanout483/X _6445_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_174_684 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3657_ _7153_/Q _6352_/A _3657_/X _6457_/Q _4014_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_164_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3588_ _6813_/Q _5238_/A _3588_/X _6568_/Q _4157_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6376_ VPWR VGND _6376_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5327_ VGND VPWR _5327_/S _5540_/A1 hold681/X _5327_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_114_283 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5258_ VGND VPWR _5264_/S _5534_/A1 hold285/X _5258_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4209_ VGND VPWR _4213_/S _6353_/A1 _4209_/A0 _4209_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5189_ VGND VPWR _5189_/S hold667/X _5189_/A0 _5189_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_212 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_15 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_51_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_138 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_22_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_537 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_125_548 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_311 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_78_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_154_62 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_120_275 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_159 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_47_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_421 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_320 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4560_ _4595_/A _4563_/A _4563_/D _4631_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_175_459 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3511_ _3571_/B _3511_/Y _3511_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold606 _6865_/Q hold606/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4491_ _4491_/Y _4739_/A _4492_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold617 _4019_/X _6459_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold628 _6877_/Q hold628/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold639 _4247_/X _6647_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6230_ _6662_/Q _5976_/B _6230_/X _6712_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3442_ _6888_/Q _5319_/A _3442_/X _6872_/Q _5301_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xmax_cap369 _3814_/A _3455_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_170_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_170_164 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_143_378 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6161_ VGND VPWR _6165_/A _5961_/X _6159_/X _6945_/Q _6160_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3373_ _5319_/A _3374_/A _3373_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_97_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5112_ _5112_/X _5112_/C _5112_/A _5112_/B _5112_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_6092_ _6092_/X _5960_/X _6822_/Q _7075_/Q _5953_/X VGND VPWR _6091_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1306 _4103_/X _6518_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1317 hold1413/X hold1317/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5043_ _5043_/B _5043_/Y _5043_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold1328 hold1328/A wb_dat_o[30] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold1339 hold1423/X hold1339/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_38_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_65_351 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_0_wbbd_sck clkbuf_0_wbbd_sck/X _7149_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_53_524 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6994_ _6994_/D VPWR _6994_/Q fanout458/X _7012_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_80_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5945_ _5981_/A _5981_/C _5979_/C _5945_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_179_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_80_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5876_ _5876_/X _5654_/X _6462_/Q _6677_/Q _5624_/X VGND VPWR _5866_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_33_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_166_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_275 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4827_ _4827_/X _4574_/Y _4826_/X _4825_/Y _4810_/B _4948_/C VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_138_117 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4758_ _4758_/X _4947_/A _4607_/A _4413_/Y _4611_/Y _4616_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 XFILLER_147_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3709_ _3709_/C _3730_/A _3709_/A _3709_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_4689_ _4689_/Y _4689_/A _4689_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_161_120 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6428_ _6428_/Q _6428_/D VPWR fanout449/X _7155_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_161_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6359_ VPWR VGND _6359_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_88_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_84_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_84_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_44_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_140_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_210 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_232 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_242 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_254 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_265 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_33_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_276 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_454 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_287 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_426 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_459 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_684 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_99_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_152_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_104 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_58_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold3 hold3/A hold3/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_66_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_47_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3991_ VGND VPWR _3998_/S _5491_/A1 _3991_/A0 _3991_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_50_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5730_ _6989_/Q _5627_/X _5730_/X _6829_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_95_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_148_415 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5661_ _5638_/A _5661_/X _5663_/C _5667_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_4612_ _5010_/B _4612_/Y _4975_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_129_640 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5592_ _5592_/A1 _5591_/Y _7099_/D _5594_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_191_716 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4543_ _4456_/Y _4561_/B _4948_/C _4542_/X _4589_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 Xhold403 _7052_/Q hold403/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_128_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold414 _4234_/X _6626_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold425 _6631_/Q hold425/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_259 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold436 _5528_/X _7067_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_507 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4474_ VPWR VGND _4710_/A _4638_/A _4615_/B VGND VPWR sky130_fd_sc_hd__and2_1 Xhold447 _6613_/Q hold447/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold458 _4301_/X _6692_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold469 _6967_/Q hold469/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6213_ VGND VPWR _6218_/A _5961_/X _6207_/X _6686_/Q _6212_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3425_ _3425_/X _5211_/A input50/X _6792_/Q _4058_/S VGND VPWR _3424_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_131_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7193_ VGND VPWR _7193_/X _7193_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_131_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6144_ _7053_/Q _5971_/A _6144_/X _6992_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3356_ _3356_/A _3356_/B _3511_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_97_251 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1103 _7066_/Q _5527_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_112_584 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1114 _4065_/X _6496_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6075_ VPWR VGND _6075_/X _6069_/X _6075_/D _6075_/C _6301_/C VGND VPWR sky130_fd_sc_hd__and4b_2 X_3287_ _3285_/X hold101/X _3975_/S _3287_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_4 Xhold1125 _6452_/Q _4011_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1136 _5226_/X _6799_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1147 _6914_/Q _5356_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1158 _5311_/X _6874_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5026_ _5027_/C _4638_/Y _4915_/B _4695_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 Xhold1169 hold1593/X _4070_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_65_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6977_ _6977_/Q fanout464/X _6977_/D _7033_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_80_151 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5928_ VGND VPWR _5928_/X _5928_/A2 _5923_/X _6582_/Q _5927_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_5859_ _5862_/C _5642_/X _6686_/Q _6716_/Q _5632_/X VGND VPWR _5858_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_167_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_406 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_204 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_147_470 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_79_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_69 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold970 _6659_/Q hold970/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold981 _6355_/X _7153_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_134_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_741 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold992 _5183_/X _6763_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_135_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_89_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_135_75 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_86 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_103_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_95_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_326 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_44_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_376 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_32_549 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_158_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_157_267 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_145_429 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_654 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_99_527 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3210_ _6893_/Q _3210_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4190_ VGND VPWR _4195_/S _4190_/A1 _3700_/Y _6593_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_711 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_178 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_424 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6900_ _6900_/Q fanout479/X _6900_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_63_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6831_ _6831_/Q fanout474/X _6831_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_23_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6762_ _6762_/Q fanout460/X _6762_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3974_ VGND VPWR _3980_/S _6357_/A1 hold640/X _3974_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5713_ VGND VPWR _6303_/S _5712_/X _5713_/A0 _5713_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6693_ _6693_/Q fanout470/X _6693_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_31_571 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_149_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5644_ _6962_/Q _5642_/X _5644_/X _6994_/Q _5643_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_136_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5575_ _7093_/D _5667_/B _5610_/B _5658_/B _5575_/B1 _5568_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 Xhold200 _6797_/Q hold200/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_191_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold211 _6754_/Q hold211/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4526_ _5084_/B _4542_/B _4531_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 XFILLER_191_579 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold222 _5404_/X _6957_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold233 _6569_/Q hold233/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold244 _4122_/X _6535_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold255 _6762_/Q hold255/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold266 _4324_/X _6711_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4457_ _4508_/C _4459_/A _4579_/B _4724_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 Xhold277 _6691_/Q hold277/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_116_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold288 _5249_/X _6819_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold299 _6979_/Q hold299/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_18 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_145 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3408_ _3408_/D _3408_/C _3408_/Y _3408_/A _3408_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_7176_ _7176_/A _7176_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_172_29 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4388_ VPWR VGND _4396_/A _4441_/B _4642_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_98_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6127_ _6126_/X _6791_/Q _6127_/X _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 X_3339_ hold37/A hold36/X _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_6058_ _7082_/Q _5976_/B _6058_/X _7042_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_73_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_660 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5009_ _5112_/C _4625_/B _4981_/A _4702_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_73_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XANTENNA_106 user_clock VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_117 input45/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_128 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_139 _3581_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_26_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_471 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_184 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_502 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_258 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_122_112 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_146_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_96 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_167 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_487 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_1_486 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_76_276 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_118 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_736 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_57_490 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_32_346 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_688 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3690_ _3698_/A _3365_/Y _7065_/Q input5/X _5523_/A VGND VPWR _3689_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_738 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_145_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput305 _3417_/X serial_data_2 VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5360_ VGND VPWR _5363_/S _5528_/A1 hold473/X _5360_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput316 hold1333/X hold1334/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput327 hold1323/X hold1324/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput338 hold1355/X hold1356/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4311_ VGND VPWR _4315_/S _6353_/A1 _4311_/A0 _4311_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5291_ VGND VPWR _5291_/S _5540_/A1 hold327/X _5291_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_657 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7030_ _7030_/Q fanout478/X _7030_/D _7080_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 Xclkbuf_1_0__f__1177_ _4192_/A0 clkbuf_0__1177_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4242_ VGND VPWR _4243_/S _5518_/A1 hold509/X _4242_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_101_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4173_ VGND VPWR _4177_/S hold666/X hold999/X _4173_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6814_ _6814_/Q fanout480/X _6814_/D _7058_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_63_493 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6745_ _6745_/Q fanout447/X _6745_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3957_ VPWR VGND _3957_/X _3957_/B _3957_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_6676_ _6676_/Q fanout455/X _6676_/D _7036_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3888_ VGND VPWR _3887_/Y _6303_/S _5610_/B _6507_/D VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_109_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5627_ _5638_/A _5666_/C _5663_/C _5627_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_5558_ _5555_/Y _5564_/A _7088_/D _5558_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 XFILLER_117_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_217 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4509_ _4948_/C _4509_/X _4456_/Y _4947_/B _4496_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_132_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5489_ VGND VPWR hold50/X _5513_/A1 hold690/X _5489_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_120_616 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_104_178 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7159_ _7159_/Q _6389_/X _7159_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_58_221 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_340 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_73_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_27_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_30 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_41 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_52 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_290 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_63 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_187_627 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_96 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_563 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_182_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_763 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_66_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_140 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4860_ _4685_/A _4504_/X _5023_/D _5042_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3811_ _3817_/B _4250_/A _3958_/A _6650_/Q _4118_/B VGND VPWR _3810_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4791_ _4791_/X _5106_/A _4791_/A _4791_/B _4791_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XANTENNA_17 _5154_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_28 _3585_/Y VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_39 _5291_/S VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_6530_ _6530_/Q fanout479/X _6530_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3742_ _3742_/D _3742_/C _3761_/B _3742_/A _3742_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_186_671 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_502 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_9_372 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6461_ _6461_/Q _6400_/A _6461_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_185_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3673_ _6452_/Q _4008_/A _3673_/X _6697_/Q _4304_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_173_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5412_ VGND VPWR _5417_/S _5526_/A1 hold321/X _5412_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6392_ VPWR VGND _6392_/X _6396_/B _6396_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5343_ VGND VPWR _5345_/S _5538_/A1 hold429/X _5343_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_143 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput179 _3210_/Y mgmt_gpio_oeb[13] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5274_ _5282_/S _5541_/B _5274_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_7013_ _7013_/Q fanout480/X _7013_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4225_ VGND VPWR _4225_/S _5546_/A1 hold820/X _4225_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_101_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_68_563 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4156_ VGND VPWR _4156_/S _5546_/A1 hold946/X _4156_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_46_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4087_ VGND VPWR _4101_/S _4086_/X _4087_/A0 _4087_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_83_599 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_493 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_605 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_169_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4989_ _4428_/Y _4999_/C _4846_/B _4542_/A _4628_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_6728_ _3945_/A1 _6728_/Q _6380_/X _6728_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 XFILLER_183_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_362 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6659_ _6659_/Q fanout468/X _6659_/D _6659_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_125_708 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_140 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_398 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_132_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xfanout395 VPWR VGND _5548_/A1 _5521_/A1 VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_74_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_61_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_599 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_249 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_121 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_452 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput15 VGND VPWR input15/X mask_rev_in[1] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_155_310 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput26 VGND VPWR input26/X mask_rev_in[2] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput37 mgmt_gpio_in[10] input37/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_183_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput48 mgmt_gpio_in[20] input48/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 Xinput59 input59/X mgmt_gpio_in[30] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 XFILLER_183_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_270 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_752 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_69_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4010_ VGND VPWR _4013_/S _5492_/A1 _4010_/A0 _4010_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_77_91 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_500 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_544 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_257 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_503 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5961_ _5968_/A _5981_/A _5981_/B _5961_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_80_547 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4912_ VGND VPWR _5083_/B _5073_/A _4912_/A _4912_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_33_430 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5892_ _6483_/Q _5643_/X _5892_/X _6628_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_61_772 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4843_ _5041_/C _4843_/B _4959_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_33_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_178_468 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_159_660 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4774_ _4775_/D _4774_/C _5002_/A _4774_/B _5002_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_165_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6513_ _7179_/A fanout473/X _6513_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3725_ _6716_/Q _4328_/A _3725_/X _6711_/Q _4322_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_119_535 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_174_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6444_ _6444_/Q fanout479/X _6444_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3656_ VGND VPWR _3661_/B _5256_/A _3654_/Y _6828_/Q _3655_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_174_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_184 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6375_ VPWR VGND _6375_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3587_ _6997_/Q _5445_/A _3587_/X _6468_/Q hold67/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5326_ VGND VPWR _5327_/S _5548_/A1 _5326_/A0 _5326_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_115_774 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_130_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_87_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_102_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5257_ VGND VPWR _5264_/S _5473_/A1 _5257_/A0 _5257_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4208_ VPWR VGND _4208_/A _4213_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_180_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5188_ VGND VPWR _5189_/S _5534_/A1 hold279/X _5188_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4139_ VPWR VGND _4139_/A _4144_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_11_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_149_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_180_622 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_346 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_379 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_251 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_79_625 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_105_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_766 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_179 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_66_319 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_120_287 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_87_691 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_62 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_400 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_82 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_232 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_433 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_128_332 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_640 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3510_ _4244_/A _3555_/A _3577_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_4490_ _4490_/B _4490_/Y _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_156_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_673 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold607 _5300_/X _6865_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold618 _6899_/Q hold618/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold629 _5314_/X _6877_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3441_ _3446_/B _3326_/Y _6976_/Q _6800_/Q _5418_/A VGND VPWR _3440_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6160_ _6160_/X _5967_/X _7017_/Q _6857_/Q _5940_/X VGND VPWR _6158_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_40_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3372_ _3372_/Y _3546_/A _3717_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5111_ _5112_/D _4482_/A _4625_/B _4615_/Y _4650_/Y _5110_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 XFILLER_111_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6091_ _6091_/X _5948_/X _6910_/Q _6950_/Q _5973_/A VGND VPWR _6090_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1307 _6545_/Q _4134_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1318 hold1318/A wb_dat_o[23] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5042_ _5042_/B _5042_/Y _5051_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold1329 hold1425/X hold1329/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_680 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_363 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6993_ _6993_/Q fanout459/X _6993_/D _7053_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xclkbuf_leaf_51_csclk _6865_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_53_536 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5944_ _5978_/A _5964_/A _5981_/A _5944_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_41_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5875_ VGND VPWR _5870_/X _5875_/X _5874_/X _6557_/Q _5667_/X _5872_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_33_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4826_ _4810_/B _4902_/A _4948_/B _4826_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 Xclkbuf_leaf_66_csclk _7012_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4757_ _4542_/D _4770_/B _4611_/Y _4581_/B _4653_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_3708_ _3709_/C _3964_/A _6947_/Q _6419_/Q _3781_/A2 VGND VPWR _3707_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4688_ _4619_/Y _4722_/A _4631_/Y _5108_/A _4689_/A _4902_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_107_549 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6427_ _6427_/Q _6427_/D VPWR fanout449/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3639_ _3639_/B _3640_/D _3639_/A _3639_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 XFILLER_162_655 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_161_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6358_ VPWR VGND _6358_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_88_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5309_ VGND VPWR _5309_/S _5540_/A1 hold738/X _5309_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_102_221 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6289_ _6289_/C _6289_/Y _6289_/A _6289_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_88_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_265 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_124_66 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_19_csclk _6890_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_140_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_140_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_709 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_200 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_211 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_222 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_232 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_233 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_255 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_266 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_404 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_288 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_157_438 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_299 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_279 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_96 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_346 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_165 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_95 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_116 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold4 hold4/A hold4/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_47_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_74_182 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xnet399_2 net399_2/A _3941_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_3990_ VPWR VGND _3990_/A _3998_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_62_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_176_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5660_ _5664_/A _5660_/X _5660_/C _5667_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 XFILLER_31_764 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4611_ _4753_/B _4611_/B _4611_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_5591_ _7099_/Q _5594_/A _5591_/Y _5574_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_129_652 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4542_ _4542_/X _4948_/B _4542_/A _4542_/B _4542_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_129_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_128_173 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold404 _5511_/X _7052_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold415 _6646_/Q hold415/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold426 _4240_/X _6631_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4473_ _4638_/A _4739_/A _4642_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 Xhold437 _6974_/Q hold437/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold448 _4213_/X _6613_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold459 _6854_/Q hold459/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6212_ _6212_/X _5967_/X _6476_/Q _6605_/Q _5940_/X VGND VPWR _6206_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_116_379 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3424_ _6856_/Q _5283_/A _3424_/X _7008_/Q _3370_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_143_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7192_ VGND VPWR _7192_/X _7192_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_6143_ _6143_/X _5960_/X _6824_/Q _7077_/Q _5953_/X VGND VPWR _6142_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3355_ _3356_/A _3355_/B hold72/X _3355_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_97_263 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1104 _5527_/X _7066_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6074_ _6074_/D _6074_/C _6075_/D _6074_/A _6074_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_100_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1115 _7179_/A _4093_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3286_ hold101/X _3975_/S _3286_/X hold204/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a21o_4 Xhold1126 _4011_/X _6452_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1137 _7192_/A _5197_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5025_ _4902_/A _5118_/B _4616_/Y _4877_/B _4413_/Y _4691_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold1148 _5356_/X _6914_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1159 _7189_/A _5194_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_65_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_54_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6976_ _6976_/Q fanout483/X _6976_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_41_517 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_159_9 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5927_ VGND VPWR _5927_/X _5632_/X _5924_/X _6689_/Q _5926_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_179_541 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5858_ _6561_/Q _5631_/X _5858_/X _6556_/Q _5667_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_70_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_21_263 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4809_ _4810_/B _4992_/A _4886_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_5789_ _5797_/A _5658_/X _7016_/Q _6888_/Q _5630_/X VGND VPWR _5788_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_107_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_150_603 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_150_614 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold960 _6457_/Q hold960/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold971 _4261_/X _6659_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_135_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold982 _6618_/Q hold982/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold993 _6428_/Q hold993/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_753 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_617 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_189_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_157_235 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_750 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_666 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_99_539 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_95_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_436 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_458 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_94_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_672 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_48_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_47_193 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6830_ _6830_/Q fanout475/X _6830_/D _6884_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_62_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_50_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_517 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6761_ _6761_/Q fanout459/X _6761_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3973_ _3973_/X _3975_/S hold58/X _3973_/A1 VPWR VGND VGND VPWR sky130_fd_sc_hd__mux2_4 XFILLER_16_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5712_ _5706_/Y _5712_/X _5711_/Y _5652_/Y _6788_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_6692_ _6692_/D VPWR _6692_/Q fanout470/X _6714_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5643_ _5664_/A _5660_/C _5663_/C _5643_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_31_583 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_460 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_599 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5574_ _5574_/Y _5610_/B _6506_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold201 _5224_/X _6797_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4525_ _5084_/A _4522_/X _4453_/B _4948_/A _4525_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 Xhold212 _5170_/X _6754_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold223 _6837_/Q hold223/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_463 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold234 _4162_/X _6569_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold245 _6923_/Q hold245/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold256 _5181_/X _6762_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_176 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4456_ _4456_/A _4579_/B _4456_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold267 _6661_/Q hold267/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold278 _4300_/X _6691_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold289 _6795_/Q hold289/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3407_ _3408_/D _5238_/A _6913_/Q _6817_/Q _5346_/A VGND VPWR _3406_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7175_ _7175_/A _7175_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_131_157 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4387_ _4400_/B _4661_/A _4441_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_86_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6126_ VPWR VGND _6126_/X _6118_/X _6126_/D _6126_/C _6226_/B VGND VPWR sky130_fd_sc_hd__and4b_2 XFILLER_100_511 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3338_ _3454_/B _3415_/B _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_100_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6057_ _6074_/A _5949_/X _6813_/Q _6933_/Q _5971_/B VGND VPWR _6056_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3269_ VPWR VGND _3269_/X _6396_/B _6390_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_73_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5008_ _5112_/B _5008_/C _5008_/A _5008_/B _5008_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_39_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_107 wb_clk_i VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_118 input38/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_129 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_121_34 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_303 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_483 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6959_ _6959_/Q fanout465/X _6959_/D _6999_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_14_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_282 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold790 _6831_/Q hold790/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_89_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_767 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1490 _6078_/X _7122_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_642 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_601 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_494 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_2_0__f_mgmt_gpio_in[4] _3927_/A1 clkbuf_0_mgmt_gpio_in[4]/X VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_20_509 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput306 _3940_/X serial_load VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput317 hold1353/X hold1354/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput328 hold1315/X hold1316/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4310_ VPWR VGND _4310_/A _4315_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 Xoutput339 hold1369/X hold1370/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5290_ VGND VPWR _5291_/S hold99/X hold141/X _5290_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4241_ VGND VPWR _4243_/S _5493_/A1 _4241_/A0 _4241_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4172_ VPWR VGND _4172_/A _4177_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_95_575 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_631 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6813_ _6813_/Q fanout481/X _6813_/D _7076_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_90_291 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6744_ _6744_/Q _3946_/B _6744_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3956_ VPWR VGND _3956_/X _3956_/B _3956_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_176_330 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6675_ _6675_/Q fanout455/X _6675_/D _7036_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_167_19 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_380 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3887_ _3887_/B _3887_/Y _5606_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_5626_ _6978_/Q _5624_/X _5626_/X _7002_/Q _5625_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_136_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5557_ _5558_/C _5562_/D _7088_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_4508_ VGND VPWR _4508_/C _4507_/X _4508_/X _4508_/D _5027_/A VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_117_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5488_ VGND VPWR hold50/X _5548_/A1 hold894/X _5488_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4439_ _4615_/B _4635_/B _4672_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_132_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_59_712 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7158_ _7158_/Q _6388_/X _7158_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_59_745 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_233 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6109_ _6109_/X _5967_/X _7015_/Q _6855_/Q _5940_/X VGND VPWR _6107_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7089_ _7089_/Q fanout460/X _7089_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_58_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_73_203 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_20 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_31 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_42 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_155_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_64 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_86 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_182_344 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_111_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_173_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_104_680 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_92_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_586 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_686 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3810_ input71/X _3331_/Y _3810_/X _6599_/Q _4196_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4790_ _4556_/A _4632_/B _4482_/A _4672_/A _4789_/X _4791_/D VGND VPWR VGND VPWR + sky130_fd_sc_hd__o41a_1 XANTENNA_18 _5164_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_29 _5166_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3741_ _3742_/D _4310_/A input47/X _6701_/Q _4118_/B VGND VPWR _3740_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_186_650 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_186_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6460_ _6460_/Q _6400_/A _6460_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3672_ _3679_/A _5490_/A _6547_/Q _7036_/Q _4133_/A VGND VPWR _3671_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_185_193 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5411_ VGND VPWR _5417_/S hold13/X _5411_/A0 _5411_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6391_ VPWR VGND _6391_/X _6396_/B _6396_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5342_ VGND VPWR _5345_/S _5519_/A1 hold184/X _5342_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_126_271 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5273_ VGND VPWR _5273_/S _5513_/A1 hold632/X _5273_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7012_ _7012_/Q fanout466/X _7012_/D _7012_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_99_177 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4224_ VGND VPWR _4225_/S _5518_/A1 hold309/X _4224_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_188 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4155_ VGND VPWR _4156_/S _5518_/A1 hold463/X _4155_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_439 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4086_ VGND VPWR _5202_/B _5473_/A1 _5203_/A0 _4086_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_258 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_450 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_601 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_24_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_155 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4988_ _6722_/D _4987_/X _4919_/X _4945_/Y _5006_/A _4988_/B2 VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 XFILLER_51_486 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6727_ _3568_/A1 _6727_/Q _6379_/X _6727_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_3939_ VGND VPWR _6762_/Q _6759_/Q _7103_/Q _3939_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_177_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_149_374 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_160 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6658_ _6658_/Q fanout469/X _6658_/D _6659_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5609_ _5609_/A1 _5606_/B _7105_/D _3886_/B _5608_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6589_ _6589_/Q _7137_/CLK _6589_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_124_208 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_152_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_293 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_143_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout396 VPWR VGND _5521_/A1 hold99/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_143_87 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_143_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_545 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_494 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_403 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_133 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_464 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_175_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_52_62 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_300 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput16 VPWR VGND mask_rev_in[20] input16/X VGND VPWR sky130_fd_sc_hd__dlymetal6s2s_1 XFILLER_168_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput27 VGND VPWR input27/X mask_rev_in[30] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_155_322 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_168_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput38 input38/X mgmt_gpio_in[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_4 Xinput49 mgmt_gpio_in[21] input49/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_183_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_116_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_182_152 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_398 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_282 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_572 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_84_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_269 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5960_ _5969_/A _5966_/A _5981_/C _5960_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_80_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4911_ _4912_/C _4911_/A _4911_/C _4911_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_5891_ _5896_/B _5667_/X _6473_/Q _6558_/Q _5627_/X VGND VPWR _5890_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_80_559 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4842_ _4542_/D _4875_/A _4623_/Y _4947_/B _4694_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_193_406 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4773_ _5002_/B _4928_/A _4773_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6512_ _6512_/Q fanout473/X _6512_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3724_ _3729_/B _4145_/A input53/X _6556_/Q _5193_/A VGND VPWR _3723_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_119_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_119_547 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6443_ _6443_/D VPWR _6443_/Q fanout458/X _7017_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3655_ _6844_/Q _5274_/A _3655_/X _6753_/Q _5166_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_161_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6374_ VPWR VGND _6374_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3586_ _5166_/A _3586_/A _3814_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5325_ VGND VPWR _5327_/S _5538_/A1 hold788/X _5325_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5256_ _5264_/S _5505_/B _5256_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_102_458 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4207_ VGND VPWR _4207_/S _6357_/A1 hold529/X _4207_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5187_ VGND VPWR _5189_/S _5544_/A1 hold441/X _5187_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4138_ VGND VPWR _4138_/S _5546_/A1 hold962/X _4138_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4069_ VGND VPWR _4118_/B _5491_/A1 _4119_/A0 _4069_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_22_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_366 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_54 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_125_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_634 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_180_667 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_648 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_120_233 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_59_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_41 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_35_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_170_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_170_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_762 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_128_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_7_652 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold608 _6544_/Q hold608/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_155_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold619 _5339_/X _6899_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3440_ _6992_/Q _5436_/A _3440_/X _6936_/Q _5373_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3371_ _3981_/A _3586_/A _3717_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5110_ _5110_/X _5006_/A _4484_/Y _4716_/Y _4625_/B _4483_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_88_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6090_ _6902_/Q _5976_/C _6090_/X _6830_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5041_ _5041_/Y _5041_/A _5041_/C _5041_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 Xhold1308 _4134_/X _6545_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_69_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1319 hold1414/X hold1319/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_0_wb_clk_i clkbuf_0_wb_clk_i/X wb_clk_i VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_93_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_375 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6992_ _6992_/Q fanout482/X _6992_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_65_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_53_548 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5943_ _5979_/A _5969_/C _5979_/C _5943_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_34_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_250 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5874_ _5874_/X _5664_/X _6482_/Q _6667_/Q _5643_/X VGND VPWR _5873_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4825_ _4551_/A _4812_/Y _4825_/Y _4815_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_193_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_193_236 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4756_ _4672_/B _4771_/C _4626_/Y _4542_/B _4645_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_3707_ _6851_/Q _5283_/A _3707_/X _6963_/Q _5409_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4687_ _4644_/Y _5108_/A _4663_/Y _4469_/A _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_162_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_161_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6426_ _6426_/D VPWR _6426_/Q fanout449/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3638_ _3638_/D _3638_/C _3639_/C _3638_/A _3638_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_162_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6357_ VGND VPWR _6357_/S _6357_/A1 hold566/X _6357_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3569_ _4008_/A _3573_/A _3692_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_115_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5308_ VGND VPWR _5309_/S _5521_/A1 hold716/X _5308_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6288_ _6289_/C _5975_/C _6464_/Q _6582_/Q _5945_/X VGND VPWR _6287_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_142_391 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_233 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5239_ VGND VPWR _5246_/S hold667/X _5239_/A0 _5239_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_331 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_201 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_212 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_223 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_234 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_256 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_267 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_278 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_289 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_86 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_303 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_358 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_79_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_67_629 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold5 hold5/A hold5/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_121_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_172 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_30_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4610_ VPWR VGND _4753_/B _5010_/B _4611_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5590_ _7098_/D _5979_/A _5610_/B _5978_/A _5568_/Y _5590_/B2 VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 X_4541_ _4724_/A _3962_/A _4661_/A _4959_/B _4541_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_190_217 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xwire380 VGND VPWR wire380/X _4674_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xhold405 hold405/A hold405/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold416 _4246_/X _6646_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4472_ VPWR VGND _4472_/X _4489_/B _4472_/A VGND VPWR sky130_fd_sc_hd__and2_1 Xhold427 _6656_/Q hold427/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_656 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold438 _5423_/X _6974_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold449 _6911_/Q hold449/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6211_ _6225_/B _5976_/D _6691_/Q _6620_/Q _5954_/X VGND VPWR _6210_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_3423_ _6864_/Q _5292_/A _3423_/X _6904_/Q _5337_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_7191_ VGND VPWR _7191_/X _7191_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_6142_ _6142_/X _5948_/X _6912_/Q _6952_/Q _5973_/A VGND VPWR _6141_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3354_ _5247_/A _3571_/A _3373_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_6073_ _6074_/D _5975_/A _7029_/Q _6845_/Q _5944_/X VGND VPWR _6072_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1105 _6917_/Q _5359_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3285_ _3285_/X _3975_/S _3285_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 XFILLER_97_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_57_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1116 _4093_/X _6513_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_100_737 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1127 _6552_/Q _4142_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5024_ _5086_/C _5024_/B _5051_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold1138 _5197_/X _6773_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1149 _6906_/Q _5347_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_66_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6975_ _6975_/Q fanout474/X _6975_/D _7016_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_81_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_13_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5926_ _5926_/X _5638_/X _6479_/Q _6709_/Q _5630_/X VGND VPWR _5925_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_80_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5857_ _5862_/B _5928_/A2 _6651_/Q _6579_/Q _5646_/X VGND VPWR _5856_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_110_69 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4808_ _4884_/C _5068_/B _4964_/A _4805_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a21bo_1 XFILLER_186_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5788_ _6448_/Q _5614_/X _5788_/X _6912_/Q _5814_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_119_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4739_ VPWR VGND _4740_/B _4739_/B _4739_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_5_419 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6409_ hold81/A _6365_/X _6409_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xhold950 _6744_/Q hold950/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold961 _4017_/X _6457_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold972 _6702_/Q hold972/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold983 _4219_/X _6618_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold994 _3984_/X _6428_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_531 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_88_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_76_404 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_130_383 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_470 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_676 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_44_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_231 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_157_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_173_707 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_51 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_173_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_206 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_239 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_153_420 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_678 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_50_csclk _6999_/CLK _7001_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_5_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_103 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_65_csclk _7006_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_94_289 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_62_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6760_ _6760_/Q fanout459/X _6760_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3972_ VGND VPWR _3980_/S _6356_/A1 hold784/X _3972_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_90_495 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5711_ _5711_/C _5711_/Y _5711_/A _5711_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_50_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6691_ _6691_/Q fanout470/X _6691_/D _6712_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_148_214 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5642_ _5664_/A _5657_/B _5660_/C _5642_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_5573_ VPWR VGND _5602_/A _5610_/B _6506_/Q VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_129_483 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold202 _6488_/Q hold202/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4524_ _5084_/A _4724_/A _4584_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold213 _6464_/Q hold213/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold224 _5269_/X _6837_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_leaf_18_csclk _7083_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xhold235 _7038_/Q hold235/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold246 _5366_/X _6923_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4455_ _4498_/A _4579_/B _4948_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold257 _6779_/Q hold257/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold268 _4264_/X _6661_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_188 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold279 _6766_/Q hold279/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3406_ _6881_/Q _5310_/A _3406_/X _6809_/Q _5229_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_7174_ VGND VPWR _7174_/X _7174_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4386_ VPWR VGND _4563_/D _4441_/B _4661_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_131_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6125_ _6125_/D _6125_/C _6126_/D _6125_/A _6125_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_3337_ _3453_/A hold64/X _3415_/B _5186_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_86_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_100_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6056_ _6445_/Q _5601_/X _6056_/X _6965_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3268_ _6764_/Q _3268_/C _6813_/Q _3268_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_4 XFILLER_86_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5007_ _4710_/Y _4576_/Y _4482_/A _5008_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_100_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_73_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3199_ _6981_/Q _3199_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_38_183 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_108 input92/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XANTENNA_119 _3899_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_121_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_518 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6958_ _6958_/Q fanout465/X _6958_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_81_495 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5909_ _5908_/Y _7117_/D _5907_/X _5909_/B2 _6279_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_6889_ _6889_/Q fanout475/X _6889_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_139_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_14_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_559 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_294 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold780 _6847_/Q hold780/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold791 _5262_/X _6831_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_404 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_162_53 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1480 _6638_/Q _3880_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1491 _7121_/Q _6053_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_654 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_73 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_698 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_164 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_158_556 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_375 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput307 _3939_/X serial_resetn VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput318 hold1343/X hold1344/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_153_250 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput329 hold1317/X hold1318/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_114_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4240_ VGND VPWR _4243_/S _5534_/A1 hold425/X _4240_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_434 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_169 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4171_ VGND VPWR _4171_/S _4171_/A1 _3410_/Y _6577_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_95_587 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6812_ _6812_/Q fanout478/X _6812_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_51_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_23_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_168_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6743_ _6743_/Q _6743_/D VPWR _3946_/B _6746_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3955_ VPWR VGND _6637_/D _3961_/B _6643_/Q VGND VPWR sky130_fd_sc_hd__and2_1 X_6674_ _6674_/D VPWR _6674_/Q fanout468/X _6674_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_176_342 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3886_ _3887_/B _7090_/Q _7091_/Q _7088_/Q _3886_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4b_1 X_5625_ _5638_/A _5667_/B _5663_/C _5625_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_164_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5556_ VGND VPWR _5564_/A _3887_/B _5554_/Y _5552_/B _6509_/Q VGND VPWR sky130_fd_sc_hd__a211o_1 X_4507_ VGND VPWR _4472_/X _4507_/X _4450_/Y _4782_/A _4493_/B _4502_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 X_5487_ VGND VPWR hold50/X hold42/X _5487_/A0 hold51/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4438_ _4965_/B _4635_/B _4615_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_116_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7157_ _7157_/Q _7157_/D VPWR _3269_/X _7157_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_59_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4369_ _4454_/A _4441_/A _4556_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_59_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6108_ _7007_/Q _5958_/X _6108_/X _6999_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_58_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7088_ _7088_/Q fanout460/X _7088_/D _7113_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_6039_ _6040_/C _5975_/C _6980_/Q _6836_/Q _5945_/X VGND VPWR _6038_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_58_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_10 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_32 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_43 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_270 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_495 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_54 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_187_607 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_65 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_76 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_87 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_148_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_98 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_22_392 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_150_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_32_112 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_33_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_19 _5164_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 X_3740_ _6795_/Q _3326_/Y _3740_/X _6686_/Q _4292_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3671_ _6932_/Q _5373_/A _3671_/X _6672_/Q _4274_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_186_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5410_ VGND VPWR _5417_/S _5524_/A1 _5410_/A0 _5410_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6390_ VPWR VGND _6390_/X _6396_/B _6390_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5341_ VGND VPWR _5345_/S _5545_/A1 _5341_/A0 _5341_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5272_ VGND VPWR _5273_/S hold99/X hold135/X _5272_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_242 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7011_ _7011_/Q _7011_/D VPWR fanout456/X _7011_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_4223_ VGND VPWR _4225_/S _5544_/A1 hold487/X _4223_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_510 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4154_ VGND VPWR _4156_/S _5544_/A1 hold596/X _4154_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4085_ _4322_/B _6367_/B _3379_/A _5202_/B _4050_/X _4101_/S VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_4 XFILLER_55_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_462 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4987_ _5039_/C _4986_/X _5039_/A _4963_/Y _4987_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 X_6726_ _6726_/Q _6307_/B _6726_/D _7140_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_177_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3938_ VGND VPWR input93/X _6515_/Q _6767_/Q _3938_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_109_206 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6657_ _6657_/Q _6657_/D VPWR fanout468/X _6659_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_177_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3869_ _3869_/A2 _6405_/Q _3911_/B1 _3832_/B _6405_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_164_334 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5608_ VGND VPWR _5608_/X _6509_/Q _7088_/Q _5608_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6588_ _6588_/Q _7137_/CLK _6588_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_5539_ VGND VPWR _5540_/S _5548_/A1 hold898/X _5539_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_127_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_765 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_242 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_160_573 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_33 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xfanout375 VPWR VGND _6279_/S _6304_/S VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_101_662 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_101_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout397 hold108/X hold99/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_19_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_598 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_74_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput17 VGND VPWR input17/X mask_rev_in[21] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput28 VGND VPWR input28/X mask_rev_in[31] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_168_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xinput39 VPWR VGND _3960_/B mgmt_gpio_in[12] VGND VPWR sky130_fd_sc_hd__buf_2 XFILLER_10_373 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_183_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_751 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_6_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_182_164 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_182_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_294 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_111_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_727 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4910_ _4915_/C _4691_/A _4482_/A _4672_/A _4964_/B _4909_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 X_5890_ _6708_/Q _5638_/X _5890_/X _6581_/Q _5928_/A2 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_45_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4841_ _4911_/B _4493_/B _4472_/X _4841_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_21_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_284 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4772_ _4774_/C _4772_/C _4772_/A _5099_/C _4772_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_60_295 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_673 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6511_ _6511_/Q fanout473/X _6511_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3723_ _3723_/X _5190_/B _6671_/Q _4274_/A _6769_/Q _5190_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 X_6442_ _6442_/D VPWR _6442_/Q fanout458/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_146_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3654_ hold85/A _3511_/A _3654_/Y _3562_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_173_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6373_ VPWR VGND _6373_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3585_ _3585_/Y hold48/A _3714_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_161_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_3_0_0_wb_clk_i _7126_/CLK clkbuf_3_1_0_wb_clk_i/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_5324_ VGND VPWR _5327_/S _5528_/A1 hold798/X _5324_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5255_ VGND VPWR _5255_/S _5540_/A1 hold746/X _5255_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_137 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4206_ VGND VPWR _4207_/S _6356_/A1 hold730/X _4206_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5186_ VGND VPWR _5189_/S _5190_/B _5186_/A hold16/X VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_56_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4137_ VGND VPWR _4138_/S _6356_/A1 hold760/X _4137_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_470 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_96_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_95_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4068_ _4322_/B _6396_/B _3546_/A _4118_/B _4050_/X _4084_/S VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_4 XFILLER_71_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_432 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_763 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_51_262 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_487 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6709_ _6709_/Q fanout445/X _6709_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_137_312 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_192_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_137_378 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_125_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_495 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_679 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_30 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_204 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_74_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_248 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_74_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_175_429 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_131 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold609 _4132_/X _6544_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_6_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3370_ _3370_/Y _3370_/A hold74/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_170_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5040_ _4574_/A _4950_/X _5089_/B _4816_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 Xhold1309 _6470_/Q _4033_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_26_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6991_ _6991_/Q fanout484/X _6991_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_93_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5942_ VPWR VGND _5979_/C _7100_/Q _7099_/Q VGND VPWR sky130_fd_sc_hd__and2b_2 X_5873_ _6562_/Q _5631_/X _5873_/X _6652_/Q _5646_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_80_379 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4824_ _4824_/X _4542_/D _4522_/D _4562_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_193_215 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4755_ _4581_/B _4755_/X _4611_/Y _4542_/A _4628_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_3706_ _3709_/B _5301_/A input35/X _6867_/Q _3365_/Y VGND VPWR _3705_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4686_ _4686_/Y _4686_/B _4911_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_134_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_164 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6425_ _6425_/Q _6425_/D VPWR fanout457/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_162_624 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3637_ _3638_/D _4328_/A _7029_/Q _6718_/Q hold49/A VGND VPWR _3636_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_174_495 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_134 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6356_ VGND VPWR _6357_/S _6356_/A1 hold768/X _6356_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3568_ _3580_/A hold37/A _3568_/A1 input48/X _4118_/B VGND VPWR _3567_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_115_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5307_ VGND VPWR _5309_/S _5538_/A1 hold513/X _5307_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6287_ _6669_/Q _5938_/X _6287_/X _6709_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3499_ _4280_/A _3573_/A _3562_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_88_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5238_ _5246_/S _5541_/B _5238_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_5169_ VGND VPWR _5170_/S _5526_/A1 hold367/X _5169_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_29_535 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_29_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_56_343 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_195 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_202 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_201 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_213 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_224 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_235 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_257 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_268 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_149_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_279 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_215 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_226 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_440 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_654 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_149_87 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_180_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_180_487 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_152_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_161_690 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold6 hold6/A hold6/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_8 XFILLER_66_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_59_181 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_516 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_240 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_265 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4540_ _5039_/A _3962_/A _4661_/A _4959_/B _4724_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a31oi_4 XFILLER_156_451 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_190_229 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_698 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xwire381 VGND VPWR _5977_/B _5975_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_171_410 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold406 _4080_/X _6503_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4471_ VGND VPWR _4489_/B _4471_/B _4702_/C _4471_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_183_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold417 _6895_/Q hold417/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_128_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold428 _4258_/X _6656_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold439 _6990_/Q hold439/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6210_ _6661_/Q _5976_/B _6210_/X _6711_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_144_668 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3422_ VGND VPWR _3414_/Y _3431_/A _3421_/X _6840_/Q _5265_/A _3419_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 X_7190_ VGND VPWR _7190_/X _7190_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_143_178 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6141_ _6904_/Q _5976_/C _6141_/X _6832_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3353_ _5532_/A _3814_/A _3373_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_97_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6072_ _7021_/Q _5937_/X _6072_/X _6885_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_85_405 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3284_ _3284_/X hold62/X _3283_/Y hold202/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a21bo_1 Xhold1106 _5359_/X _6917_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1117 _6667_/Q _4271_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1128 _4142_/X _6552_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5023_ _5115_/A _5023_/C _5023_/A _5023_/B _5023_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1139 _6768_/Q _5191_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6974_ _6974_/Q fanout480/X _6974_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5925_ _7155_/Q _5625_/X _5925_/X _6623_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5856_ _6551_/Q _5913_/B1 _5856_/X _5652_/B _5855_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4807_ _4645_/Y _4807_/X _4653_/Y _4846_/B _4689_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_5787_ _5787_/C _5787_/Y _5787_/A _5787_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 XFILLER_119_131 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_119_142 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4738_ _4738_/A _4738_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_119_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4669_ VGND VPWR _4747_/B _4739_/A _4676_/B _4739_/B _5043_/A VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_119_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_174_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_359 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6408_ hold24/A _6364_/X _6408_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 Xhold940 _6896_/Q hold940/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold951 _5157_/X _6744_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold962 _6549_/Q hold962/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold973 _4313_/X _6702_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_370 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold984 _6436_/Q hold984/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6339_ _6339_/X _6339_/B1 _6642_/Q _6350_/A2 _6339_/A2 VGND VPWR _6338_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold995 _6739_/Q hold995/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_89_766 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_95_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_130_395 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_28_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_44 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_151 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_57_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_72_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_307 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_44_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_71_154 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_157_259 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_173_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_125_101 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_96 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_48_630 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3971_ _3975_/S hold154/X VPWR VGND hold93/X _3971_/X VGND VPWR sky130_fd_sc_hd__mux2_8 XFILLER_62_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5710_ _5711_/C _5645_/X _7012_/Q _7028_/Q _5630_/X VGND VPWR _5709_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6690_ _6690_/Q fanout470/X _6690_/D _6714_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5641_ _5641_/C _5670_/A _5641_/A _5641_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_148_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5572_ VPWR VGND _7093_/Q _5667_/B _7092_/Q VGND VPWR sky130_fd_sc_hd__and2_2 Xclkbuf_1_0_1_csclk clkbuf_2_1_0_csclk/A clkbuf_1_0_1_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XFILLER_116_101 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_549 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4523_ _4523_/Y _5042_/B _4584_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_144_421 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold203 _3284_/X _3285_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold214 _4025_/X _6464_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold225 _6789_/Q hold225/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold236 _5495_/X _7038_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4454_ _4454_/A _4626_/B _4947_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold247 _6419_/Q hold247/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_616 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold258 _5204_/X _6779_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold269 _6681_/Q hold269/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3405_ _3408_/C _5337_/A input51/X _6905_/Q _4058_/S VGND VPWR _3404_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_7173_ _7173_/A _7173_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 X_4385_ _4556_/A _4753_/A _4607_/A _4441_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_6124_ _6125_/D _5976_/D _7060_/Q _6879_/Q _5954_/X VGND VPWR _6106_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3336_ _3415_/B hold46/X hold26/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_86_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_682 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6055_ _7005_/Q _5958_/X _6055_/X _6997_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3267_ _3868_/A1 _3265_/X _7158_/D _3251_/A _3870_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_100_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5006_ _5006_/Y _5112_/A _5006_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_54_611 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3198_ _6989_/Q _3198_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XANTENNA_109 _3959_/B VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_26_335 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6957_ _6957_/Q fanout463/X _6957_/D _6997_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_157_8 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5908_ _5552_/B _6103_/B1 _5908_/Y _7116_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_6888_ _6888_/Q fanout473/X _6888_/D _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_22_541 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_179_362 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5839_ VGND VPWR _5839_/X _5632_/X _5835_/X _6685_/Q _5838_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_22_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_10_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_421 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_741 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_30_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_107_189 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_146_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold770 _6429_/Q hold770/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold781 _5280_/X _6847_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold792 _7186_/A hold792/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_39_20 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_416 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_89_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_76_224 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_600 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1470 _7107_/Q _5713_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1481 _6575_/Q _4169_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1492 _6053_/X _7121_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_91_249 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_17_379 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_60_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_158_502 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_185_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_95 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_568 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_173_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput308 _3957_/X spi_sdi VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput319 hold1345/X hold1346/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_5_751 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_487 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_114_638 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_99_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4170_ VGND VPWR _4171_/S _4170_/A1 _3447_/Y _6576_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_92 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_750 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6811_ _6811_/Q fanout479/X _6811_/D _7080_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_23_305 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6742_ _6742_/Q _3946_/B _6742_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3954_ VPWR VGND _6638_/D _3961_/B _3954_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_6673_ _6673_/D VPWR _6673_/Q fanout468/X _6674_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3885_ _3885_/Y _5606_/A _5552_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5624_ _5638_/A _5658_/B _5663_/C _5624_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_31_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_365 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5555_ _5562_/D _5555_/Y _7088_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_4506_ _4508_/D _4672_/A _4469_/A _4887_/A _4846_/A _4672_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 X_5486_ VGND VPWR hold50/X _5528_/A1 hold503/X _5486_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_172_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4437_ _4635_/B _4739_/A _4642_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7156_ _3945_/A1 hold15/A _6387_/X _7156_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtn_1 X_4368_ _5023_/A _4500_/A _6644_/Q _4469_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_86_500 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_59_736 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6107_ _6863_/Q _5943_/X _6107_/X _6919_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_86_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3319_ _3454_/B hold64/X _3453_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_7087_ _7087_/Q fanout460/X _7087_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_59_769 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4299_ VGND VPWR _4303_/S hold667/X _4299_/A0 _4299_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6038_ _6924_/Q _5938_/X _6038_/X _6956_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_100_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_11 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_22 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_33 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_44 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_55 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_88 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_99 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_500 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_10_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_155_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_64_csclk _7049_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_157_32 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_577 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_251 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_79_csclk _6735_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_89_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_103_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_66_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_92_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_17_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_17_csclk _7079_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_45_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_122_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_319 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_13_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3670_ _3670_/D _3670_/C _3670_/Y _3670_/A _3670_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_185_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_158_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5340_ VGND VPWR _5345_/S _5484_/A1 hold862/X _5340_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_114_402 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5271_ VGND VPWR _5273_/S _5469_/A1 hold704/X _5271_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7010_ _7010_/Q _7010_/D VPWR fanout457/X _7049_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_141_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4222_ VGND VPWR _4225_/S _5534_/A1 hold273/X _4222_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_522 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4153_ VGND VPWR _4156_/S _5492_/A1 _4153_/A0 _4153_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_555 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_28_408 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4084_ VGND VPWR _4084_/S _4083_/X hold986/X _4084_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_599 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_110_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_208 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_260 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_24_669 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4986_ _4985_/Y _5005_/B _4229_/X _4986_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_6725_ _6725_/Q _6307_/B _6725_/D _7140_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3937_ VGND VPWR _6765_/Q _3937_/A1 _6516_/Q _3937_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_177_652 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6656_ _6656_/Q fanout469/X _6656_/D _6659_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3868_ VGND VPWR _3868_/S _3868_/A1 _6406_/Q _6406_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_149_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5607_ _5607_/A1 _5606_/B _7104_/D _5552_/B _5606_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6587_ _6587_/Q _7137_/CLK _6587_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3799_ _6737_/Q _5148_/A _3799_/X _6465_/Q hold67/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_164_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5538_ VGND VPWR _5540_/S _5538_/A1 hold411/X _5538_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_11_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_127_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_132_210 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_435 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5469_ VGND VPWR _5471_/S _5469_/A1 hold656/X _5469_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_457 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7139_ _7139_/Q _7140_/CLK _7139_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 Xfanout398 _5469_/A1 hold42/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_101_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_374 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_65 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_160_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_53 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput18 VGND VPWR input18/X mask_rev_in[22] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput29 VGND VPWR input29/X mask_rev_in[3] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_128_549 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_334 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_316 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_184_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_97_639 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_90 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_77_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_374 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_37_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4840_ _5086_/B _4911_/B _5051_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_60_263 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4771_ _4772_/D _4771_/C _4771_/A _4995_/A _4771_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_21_639 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6510_ _6510_/Q fanout473/X _6510_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3722_ _3729_/A _4058_/S _6907_/Q input44/X _5346_/A VGND VPWR _3721_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_119_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6441_ _6441_/Q _6441_/D VPWR fanout449/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3653_ _3661_/A _4151_/A _6860_/Q _6562_/Q _5292_/A VGND VPWR _3652_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_173_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6372_ VPWR VGND _6372_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3584_ VGND VPWR _3829_/B _6731_/Q _3583_/X _6731_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_5323_ VGND VPWR _5327_/S _5509_/A1 hold896/X _5323_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_574 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5254_ VGND VPWR _5255_/S _5521_/A1 hold714/X _5254_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4205_ VGND VPWR _4207_/S _6355_/A1 hold936/X _4205_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_149 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5185_ VGND VPWR _5185_/S _5185_/A1 _6353_/A1 _5185_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_3_6_0_csclk _6888_/CLK clkbuf_3_7_0_csclk/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_4136_ VGND VPWR _4138_/S _5493_/A1 hold866/X _4136_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_56_547 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4067_ VGND VPWR _4067_/S _4066_/X hold732/X _4067_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_517 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_169_405 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_24_444 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_169_449 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_51_274 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_24_499 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4969_ _4969_/B _4969_/Y _4969_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_11_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6708_ _6708_/Q fanout445/X _6708_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_177_460 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_20_672 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6639_ _6639_/Q fanout487/X _6639_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_192_452 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_348 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_133_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_55 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_42 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_62_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_377 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_293 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_725 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_458 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_379 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_170_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_151_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_642 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_38_558 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_92_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6990_ _6990_/Q fanout480/X _6990_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_93_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5941_ _5968_/A _5964_/A _5969_/C _5973_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_5872_ _5614_/X _7036_/Q _5871_/X _5872_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_61_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_263 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_758 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4823_ VPWR VGND _4823_/X _5099_/A _4823_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_147_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4754_ _4456_/Y _4768_/C _4611_/Y _4581_/B _4689_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_3705_ _7056_/Q hold86/A _3705_/X _6987_/Q _5436_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4685_ _4964_/B _4685_/A _5042_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 XFILLER_146_154 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_107_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6424_ _6424_/Q _6424_/D VPWR fanout457/X _6926_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3636_ _3636_/X _4262_/A _3268_/C _6663_/Q _4118_/B VGND VPWR _3635_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_176 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6355_ VGND VPWR _6357_/S _6355_/A1 hold980/X _6355_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3567_ _3960_/B _3331_/Y _3567_/X _6709_/Q _4316_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_115_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_59 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5306_ VGND VPWR _5309_/S _5528_/A1 hold475/X _5306_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6286_ _6289_/B _5965_/X _6454_/Q _6549_/Q _5947_/X VGND VPWR _6285_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_115_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3498_ _6894_/Q _5328_/A _3498_/X _6623_/Q _4220_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_130_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5237_ VGND VPWR _5237_/S _5540_/A1 hold391/X _5237_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_69_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5168_ VGND VPWR _5170_/S _5465_/A1 hold271/X _5168_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_631 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4119_ VGND VPWR _4126_/S _5491_/A1 _4119_/A0 _4119_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5099_ _5099_/X _5099_/C _5099_/A _5099_/B _5099_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_56_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_203 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_247 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_258 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_269 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_184_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_121 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_21 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_79_425 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_58_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold7 hold7/A hold7/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_87_491 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_152 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_689 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_600 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire360 _5906_/Y wire360/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_156_463 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_603 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4470_ _4664_/A _4471_/C _4702_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold407 _6860_/Q hold407/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold418 _5334_/X _6895_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_171_422 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold429 _6903_/Q hold429/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3421_ _3421_/X _3372_/Y _6944_/Q _6440_/Q _5382_/A VGND VPWR _3420_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_143_135 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6140_ _6140_/C _6140_/Y _6140_/A _6140_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_3352_ _5328_/A _3374_/A hold28/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_690 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6071_ _6074_/C _5975_/B _7066_/Q _6869_/Q _5934_/X VGND VPWR _6070_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3283_ _3283_/Y hold202/X hold70/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 Xhold1107 _6462_/Q _4023_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5022_ _5112_/B _5006_/Y _5022_/Y _5021_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 Xhold1118 _4271_/X _6667_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1129 _6567_/Q _4160_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_38_322 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_93_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6973_ _6973_/Q fanout480/X _6973_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_53_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5924_ _6699_/Q _5637_/X _5924_/X _6459_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5855_ _5855_/Y _6656_/Q _5899_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_1 X_4806_ _4964_/C _4504_/X _5039_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 X_5786_ VGND VPWR _5787_/C _5625_/X _5783_/X _7008_/Q _5785_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_4737_ VPWR VGND _4738_/A _4737_/B _4737_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_119_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_316 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4668_ _5002_/A _4921_/A _4668_/C _4928_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_134_124 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6407_ hold44/A _6363_/X _6407_/D _3568_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3619_ _3620_/D _4014_/A _6740_/Q _6458_/Q _5148_/A VGND VPWR _3618_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_162_455 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_134_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold930 _6936_/Q hold930/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold941 _5335_/X _6896_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4599_ _4598_/Y _4396_/A _4563_/A _4739_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a21oi_2 Xhold952 _6542_/Q hold952/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold963 _4138_/X _6549_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_134_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold974 _6634_/Q hold974/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6338_ _6644_/Q _6338_/A2 _6338_/X _6643_/Q _6338_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_1_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold985 _3993_/X _6436_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold996 _5151_/X _6739_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_135_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6269_ _6275_/A _5975_/B _6683_/Q _6617_/Q _5934_/X VGND VPWR _6268_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_103_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_103_588 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_2_3_0_csclk clkbuf_3_7_0_csclk/A clkbuf_2_3_0_csclk/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__clkbuf_8 XFILLER_28_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_72_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_517 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_56_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_151_89 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_734 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_9_716 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_738 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_53 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_625 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_5_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_125_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_127 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_94_214 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_85_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_85_83 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_461 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_453 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3970_ VGND VPWR _3980_/S _6355_/A1 hold988/X _3970_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_16_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_148_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_176_514 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5640_ VGND VPWR _5641_/C _5630_/X _5633_/X _7010_/Q _5639_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_176_558 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5571_ _5576_/B _5658_/B _6508_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_4522_ _4522_/X _4522_/C _4522_/A _4522_/B _4522_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_116_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold204 _3285_/X hold204/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_7_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold215 _7081_/Q hold215/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold226 _5215_/X _6789_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4453_ _4886_/B _4607_/A _4453_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold237 hold237/A hold237/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold248 _3968_/X _6419_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold259 _6995_/Q hold259/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3404_ _6897_/Q _5328_/A _3404_/X _6825_/Q _5247_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_132_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4384_ _4892_/A _4907_/B _4384_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6123_ _6125_/C _5949_/X _6815_/Q _6935_/Q _5971_/B VGND VPWR _6122_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3335_ _5382_/A _3370_/A _3573_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_58_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_86_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_597 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6054_ _6861_/Q _5943_/X _6054_/X _6917_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3266_ _3266_/B _3870_/S _6415_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_85_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5005_ VGND VPWR _5112_/A _5005_/B _5068_/B _5069_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_100_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3197_ _6997_/Q _3197_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_81_420 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6956_ _6956_/Q fanout463/X _6956_/D _6981_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5907_ _5907_/X _5896_/Y _3223_/Y wire360/X _5651_/Y VGND VPWR _5552_/B VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6887_ _6887_/Q fanout474/X _6887_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_139_205 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5838_ VGND VPWR _5838_/X _5614_/X _5836_/X _7034_/Q _5837_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_5769_ _5768_/X _6815_/Q _5764_/X _5765_/X _5769_/X _5667_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a2111o_2 XFILLER_108_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_163_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_123_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold760 _6548_/Q hold760/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold771 _3985_/X _6429_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_424 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold782 _6703_/Q hold782/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold793 _4063_/X _6495_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_131_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_32 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_428 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_236 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1460 _3488_/X _6732_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_29_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1471 _5693_/X _7107_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1482 _7127_/Q _6204_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_185 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1493 _7171_/Q _3233_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_431 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_41 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_126_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_5_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput309 _3952_/X spimemio_flash_io0_di VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_99_306 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_763 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_126_499 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_691 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_458 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_121_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_68_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6810_ _6810_/Q _6810_/D VPWR _6396_/A _7058_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_6741_ _6741_/Q _3946_/B _6741_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_50_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3953_ _3953_/B _3953_/X _6403_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 X_6672_ _6672_/Q fanout468/X _6672_/D _6674_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3884_ _3174_/Y _3894_/B2 _3883_/X _6506_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_5623_ VPWR VGND _5663_/C _7095_/Q _7094_/Q VGND VPWR sky130_fd_sc_hd__and2b_2 XFILLER_164_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5554_ _5562_/D _5554_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4505_ _4912_/A _4972_/A _5010_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_5485_ VGND VPWR hold50/X _5545_/A1 _5485_/A0 _5485_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_263 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4436_ _4615_/B _4631_/D _4633_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_160_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7155_ _7155_/Q fanout450/X _7155_/D _7155_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4367_ _4469_/A _4562_/A _4690_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_6106_ _7084_/Q _5976_/B _6106_/X _7044_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3318_ _5292_/A _3555_/A _3714_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7086_ _7086_/Q fanout483/X hold23/X _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_86_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4298_ VPWR VGND _4298_/A _4303_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_112_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6037_ _6040_/B _5965_/X _6972_/Q _6796_/Q _5947_/X VGND VPWR _6036_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3249_ _3249_/B _3250_/B _3249_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_86_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_472 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_23 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_34 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_45 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_177 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_56 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_42_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_67 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6939_ _6939_/D VPWR _6939_/Q fanout463/X _6981_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XPHY_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_89 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_50_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_0_csclk clkbuf_0_csclk/X _3942_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_135_241 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold590 _7042_/Q hold590/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_96_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_89_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_480 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_534 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_236 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_1_0_0_csclk clkbuf_1_0_1_csclk/A clkbuf_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 Xhold1290 _4281_/X _6675_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_656 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_73_751 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_33_626 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_45_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_82_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_489 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_664 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_152 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_230 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5270_ VGND VPWR _5273_/S hold60/X hold166/X _5270_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_141_211 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4221_ VGND VPWR _4225_/S hold667/X _4221_/A0 _4221_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_87_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4152_ VGND VPWR _4156_/S _6353_/A1 _4152_/A0 _4152_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4083_ VGND VPWR _4083_/S _5513_/A1 hold555/X _4083_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_24_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4985_ _5008_/B _5069_/B _4985_/Y _4985_/D _5068_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 XFILLER_168_119 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6724_ _6724_/Q _6307_/B _6724_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3936_ VGND VPWR _6766_/Q user_clock _6517_/Q _3936_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_149_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_177_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_3_2_0_csclk _6447_/CLK clkbuf_3_3_0_csclk/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 X_6655_ _6655_/Q fanout468/X _6655_/D _6655_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3867_ _3867_/B _3868_/S _3867_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_137_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5606_ _5606_/B _5606_/Y _5606_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6586_ _6586_/Q _7137_/CLK _6586_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3798_ VGND VPWR _3511_/Y _3798_/X _3797_/X _6434_/Q _3372_/Y _3796_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_118_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5537_ VGND VPWR _5540_/S _5546_/A1 hold806/X _5537_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5468_ VGND VPWR _5471_/S hold60/X hold131/X _5468_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_2_9 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4419_ _4561_/B _4556_/A _4563_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_5399_ VGND VPWR _5399_/S _5513_/A1 hold592/X _5399_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7138_ _7138_/Q _7140_/CLK _7138_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_143_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_143_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_504 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7069_ _7069_/Q fanout482/X _7069_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_74_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xfanout399 VPWR VGND _5538_/A1 hold42/X VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_86_386 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_101_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_428 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xinput19 VGND VPWR input19/X mask_rev_in[23] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_168_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_6_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_397 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_586 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_37_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_133_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_710 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_45_261 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_45_272 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_178_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4770_ _4771_/D _5003_/A _4942_/C _4770_/B _4770_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_3721_ _6899_/Q _5337_/A _3721_/X _6752_/Q _5166_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_158_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_517 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6440_ _6440_/Q _6440_/D VPWR fanout447/X _6747_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_3652_ _6657_/Q _4256_/A _3652_/X _6616_/Q _4214_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_174_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3583_ VGND VPWR _3829_/A _3642_/A1 _4192_/A0 _3583_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_127_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6371_ VPWR VGND _6371_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5322_ VGND VPWR _5327_/S _5484_/A1 _5322_/A0 _5322_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5253_ VGND VPWR _5255_/S _5538_/A1 hold800/X _5253_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4204_ VGND VPWR _4207_/S _6354_/A1 hold822/X _4204_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5184_ _5185_/S _6352_/B _5184_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_4135_ VGND VPWR _4138_/S _5492_/A1 _4135_/A0 _4135_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_63_csclk _7011_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4066_ VGND VPWR hold37/X _5540_/A1 _4117_/A0 _4066_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_71_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_78_csclk _6739_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4968_ _5021_/B _4627_/A _4789_/X _5041_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_6707_ _6707_/Q _6707_/D VPWR fanout445/X _6707_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3919_ VGND VPWR input89/X _6522_/Q _3921_/S _3919_/X VGND VPWR sky130_fd_sc_hd__mux2_2 XFILLER_165_601 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4899_ _4877_/A _5118_/A _4899_/A _4899_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3b_1 XFILLER_177_494 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6638_ _6638_/Q fanout487/X _6638_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_137_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6569_ _6569_/Q fanout454/X _6569_/D _6653_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_118_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_16_csclk _7058_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_106_767 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_704 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_101_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_170_55 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_103_82 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_656 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_171_659 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_553 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_654 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5940_ _5964_/A _5981_/A _5981_/C _5940_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_92_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5871_ _6717_/Q _5642_/X _5871_/X _6632_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_61_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4822_ VPWR VGND _5092_/A _4942_/A _5084_/B VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_33_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_21_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4753_ _5062_/C _4753_/A _4753_/C _4753_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_3704_ _3709_/A _4316_/A _6666_/Q _6706_/Q _4268_/A VGND VPWR _3703_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4684_ _4964_/A _4672_/A _4230_/B _4482_/A _4626_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_1 X_6423_ _6423_/Q _6423_/D VPWR fanout457/X _7049_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_3635_ _7074_/Q _5532_/A _3635_/X _6607_/Q _4202_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_147_689 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_380 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6354_ VGND VPWR _6357_/S _6354_/A1 hold836/X _6354_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3566_ _4316_/A _3573_/A hold66/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_115_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5305_ VGND VPWR _5309_/S _5545_/A1 _5305_/A0 _5305_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_130_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_715 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6285_ _6634_/Q _5946_/X _6285_/X _6554_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3497_ _4220_/A _3554_/A _3571_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_115_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5236_ VGND VPWR _5237_/S _5548_/A1 hold908/X _5236_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_651 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5167_ VGND VPWR _5170_/S _5524_/A1 _5167_/A0 _5167_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_69_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_172 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4118_ _6400_/B _4126_/S _6352_/B _4118_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_5098_ _4582_/Y _5099_/D _4616_/Y _4658_/C _4810_/A _4626_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_110_291 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_518 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4049_ VGND VPWR _4049_/S _6357_/A1 hold539/X _4049_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_47 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_204 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_215 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_226 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_24_275 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_248 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_259 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_601 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_34 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_193_751 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_177 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_614 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_165_33 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_3_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_77 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_437 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_59_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold8 hold8/A hold8/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_75_632 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_90_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_28_570 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_15_264 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_188_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire350 VGND VPWR _3700_/B _3661_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_144_615 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire372 _3554_/A _3374_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xhold408 _5295_/X _6860_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold419 _7073_/Q hold419/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3420_ _7085_/Q _5541_/A _3420_/X _7045_/Q hold76/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_143_147 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3351_ _5427_/A _3586_/A _3573_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_98_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_152_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_31_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6070_ _7050_/Q _5971_/A _6070_/X _6989_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_112_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3282_ hold47/X _3313_/A _3586_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold1108 _4023_/X _6462_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5021_ _5021_/X _5021_/C _5021_/A _5021_/B _5021_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1119 _7036_/Q _5493_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_93_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6972_ _6972_/Q fanout479/X _6972_/D _7080_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5923_ VGND VPWR _5923_/X _5648_/X _5910_/X _6608_/Q _5922_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_53_359 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_179_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5854_ _5862_/A _5654_/X _6706_/Q _6676_/Q _5638_/X VGND VPWR _5853_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4805_ _4805_/X _4690_/A _4741_/A _4601_/B _4791_/X _4804_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 XFILLER_167_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5785_ _5785_/X _5645_/X _6904_/Q _7032_/Q _5621_/X VGND VPWR _5784_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_166_239 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4736_ _5010_/B _4644_/B _4737_/B _4921_/A _4735_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_162_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4667_ _4739_/B _4733_/B _4668_/C _4747_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 XFILLER_107_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6406_ _6406_/Q _6362_/X _6406_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 Xhold920 _6816_/Q hold920/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3618_ _6989_/Q _5436_/A _3618_/X _7013_/Q _5463_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_134_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold931 _5380_/X _6936_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4598_ _5043_/A _4598_/Y _4642_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold942 _6603_/Q hold942/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold953 _4130_/X _6542_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_606 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold964 _6674_/Q hold964/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6337_ VGND VPWR _6346_/S _6337_/A1 _6336_/X _7145_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold975 _4243_/X _6634_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3549_ _6822_/Q _5247_/A _3549_/X _7030_/Q hold49/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold986 _7178_/A hold986/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_639 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_135_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold997 _7184_/A hold997/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_142_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6268_ _6703_/Q _5971_/A _6268_/X _6473_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_88_267 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5219_ VGND VPWR hold18/X _5513_/A1 hold660/X _5219_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6199_ _6200_/D _5976_/D _6690_/Q _6619_/Q _5954_/X VGND VPWR _6180_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_151_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_540 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_573 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_44_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_61 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_60_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_4_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_153_434 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_499 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_192_42 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_79_267 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_226 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_85_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_465 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_149_707 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5570_ _5658_/B _7093_/Q _7092_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_191_529 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4521_ _4522_/D _4531_/B _4584_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold205 _3286_/X _3347_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold216 _5544_/X _7081_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4452_ _4454_/A _4753_/A _4453_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_4 Xhold227 _6669_/Q hold227/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold238 _4105_/X _6520_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold249 _6955_/Q hold249/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3403_ _3408_/B _3381_/Y _6977_/Q input33/X _5418_/A VGND VPWR _3402_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_144_489 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7171_ _7171_/Q _6401_/X _7171_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_171_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4383_ _4892_/A _4462_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_6122_ _6447_/Q _5601_/X _6122_/X _6967_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3334_ _5238_/A _3571_/A _3370_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_6053_ VGND VPWR _6279_/S _6052_/X _6053_/A0 _6053_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_58_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3265_ _6415_/Q _7159_/Q _3266_/B _3265_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_86_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5004_ _5074_/B _5004_/B _5004_/Y _5071_/B _5004_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 X_3196_ _7005_/Q _3196_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_451 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_432 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_134 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6955_ _6955_/D VPWR _6955_/Q fanout458/X _7012_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5906_ _5906_/D _5906_/C _5906_/Y _5906_/A _5906_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_6886_ _6886_/Q fanout476/X _6886_/D _6890_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_62_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5837_ _6650_/Q _5646_/X _5837_/X _6555_/Q _5667_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_22_565 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_139_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_148_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5768_ VGND VPWR _5768_/X _5614_/X _5766_/X _6447_/Q _5767_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_154_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_604 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_529 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4719_ _4639_/Y _4719_/X _4673_/B _4469_/A _4694_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_147_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5699_ _5706_/A _5634_/X _6868_/Q _6972_/Q _5628_/X VGND VPWR _5698_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_108_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_135_478 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_162_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold750 _7016_/Q hold750/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold761 _4137_/X _6548_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold772 _6437_/Q hold772/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold783 _4314_/X _6703_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold794 _6686_/Q hold794/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_662 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_131_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_44 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_150 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_130_161 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1450 _3313_/A _3375_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1461 _6733_/Q _3449_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1472 _6576_/Q _4170_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1483 _7125_/Q _6178_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_17_315 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1494 _6571_/Q _4165_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_443 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_359 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_98 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_86 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_318 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_113_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_4_285 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_204 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_194 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_63_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_75_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_432 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_36_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_605 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6740_ _6740_/Q _3946_/B _6740_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_23_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3952_ _3952_/B _3952_/X _6404_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 X_6671_ _6671_/Q fanout468/X _6671_/D _6671_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_189_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3883_ VGND VPWR _6509_/Q _7088_/Q _3883_/X _5608_/C _7089_/Q VGND VPWR sky130_fd_sc_hd__and4b_1 X_5622_ _5641_/A _5621_/X _7018_/Q _6898_/Q _5619_/X VGND VPWR _5617_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5553_ _5562_/D _5552_/B _3885_/Y _6509_/Q _6508_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_1 XFILLER_191_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4504_ VGND VPWR _4504_/X _4984_/A _4969_/A _4965_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_145_754 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5484_ VGND VPWR hold50/X _5484_/A1 hold878/X _5484_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4435_ _4482_/A _4566_/A _4591_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_132_437 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7154_ _7154_/Q fanout449/X _7154_/D _7155_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4366_ _5010_/A _4690_/A _4460_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 X_6105_ _7068_/Q _5934_/X _6105_/X _6871_/Q _5975_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_113_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3317_ hold27/X hold84/X _3714_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7085_ _7085_/Q fanout483/X _7085_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4297_ VGND VPWR _4297_/S _6357_/A1 hold531/X _4297_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_86_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6036_ _6892_/Q _5946_/X _6036_/X _6804_/Q _5955_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3248_ _3249_/B _3248_/X _3247_/Y _3248_/A1 _7168_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_100_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_484 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_59 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3179_ _5610_/B _6508_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__clkinv_2 XPHY_13 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_24 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_35 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6938_ _6938_/D VPWR _6938_/Q fanout463/X _7026_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XPHY_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_68 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_79 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6869_ _6869_/Q fanout477/X _6869_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_50_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_108_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_595 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold580 _6709_/Q hold580/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold591 _5500_/X _7042_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_373 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_88 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_492 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_77_546 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_49_248 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1280 _4021_/X _6460_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1291 _6560_/Q _4152_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_465 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_82_74 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_60_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_373 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_173_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_141_201 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_286 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_757 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4220_ VPWR VGND _4220_/A _4225_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_4151_ VPWR VGND _4151_/A _4156_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_95_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4082_ VGND VPWR _4084_/S _4081_/X hold239/X _4082_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_83_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_687 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_593 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4984_ _4997_/C _4984_/B _4984_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6723_ _6723_/Q _6307_/B _6723_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_177_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3935_ _3935_/X input1/X _3222_/Y input2/X VPWR VGND VGND VPWR sky130_fd_sc_hd__mux2_4 X_6654_ _6654_/Q fanout454/X hold61/X _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3866_ VGND VPWR _3866_/S _3866_/A1 _3865_/X _6407_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_5605_ _5552_/Y _5567_/Y _5606_/B _6509_/Q _5604_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_137_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_175 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6585_ _6585_/Q _7137_/CLK _6585_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3797_ _6882_/Q _5319_/A _3797_/X _6630_/Q _4238_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_11_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5536_ VGND VPWR _5540_/S _5545_/A1 _5536_/A0 _5536_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_540 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_145_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_264 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5467_ VGND VPWR _5471_/S _5545_/A1 _5467_/A0 _5467_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4418_ _4600_/B _4563_/A _4556_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_5398_ VGND VPWR _5399_/S _5521_/A1 hold636/X _5398_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7137_ _7137_/Q _7137_/CLK _7137_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_4349_ VPWR VGND _4911_/A _4591_/A _4471_/B VGND VPWR sky130_fd_sc_hd__and2b_2 XFILLER_86_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7068_ _7068_/Q fanout482/X _7068_/D _7078_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xfanout389 VPWR VGND _4846_/B _4546_/Y VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_143_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_207 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6019_ _6024_/B _5975_/B _7064_/Q _6867_/Q _5934_/X VGND VPWR _6018_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_86_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_175 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_168_11 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_182_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_155_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_182_178 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_170_329 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_123_212 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_418 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_598 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_516 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_402 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_178_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_610 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3720_ _3720_/D _3720_/C _3730_/B _3720_/A _3720_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_9_130 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_153 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_174_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3651_ _3651_/D _3651_/C _3651_/Y _3651_/A _3651_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_158_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6370_ VPWR VGND _6370_/X _6396_/B _6383_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3582_ _3582_/A _3582_/Y _3582_/B _3582_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 XFILLER_127_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5321_ VGND VPWR _5327_/S _5543_/A1 hold535/X _5321_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5252_ VGND VPWR _5255_/S _5519_/A1 hold188/X _5252_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_727 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4203_ VGND VPWR _4207_/S _5491_/A1 _4203_/A0 _4203_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5183_ VPWR VGND _5183_/X _5183_/B hold17/X VGND VPWR sky130_fd_sc_hd__and2_1 X_4134_ VGND VPWR _4138_/S _5491_/A1 _4134_/A0 _4134_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_82 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4065_ VGND VPWR _4067_/S _4064_/X _4065_/A0 _4065_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4967_ VPWR VGND _5066_/A _4967_/B _4967_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3918_ VGND VPWR input91/X _6523_/Q _3921_/S _3918_/X VGND VPWR sky130_fd_sc_hd__mux2_2 X_6706_ _6706_/Q fanout445/X _6706_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4898_ VGND VPWR _4892_/B _4359_/Y _4877_/C _4899_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 XFILLER_165_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_149_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6637_ _6637_/Q fanout487/X _6637_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3849_ _3851_/C _6413_/D _3848_/X _3849_/A1 _3292_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_20_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_657 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6568_ _6568_/Q fanout445/X _6568_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_192_465 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_106_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5519_ VGND VPWR hold87/A _5519_/A1 hold178/X _5519_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6499_ _6499_/Q _6360_/A _6499_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_133_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_267 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_120_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_346 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_188_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_187_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_540 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_145 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_476 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_109_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_565 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_90 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_313 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_93_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_92_165 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_733 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5870_ VGND VPWR _5867_/X _5870_/X _5869_/X _6477_/Q _5630_/X _5868_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_61_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4821_ _4821_/X _4542_/A _4518_/B _4562_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_61_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4752_ _4672_/B _4995_/A _4619_/Y _4413_/Y _4626_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_147_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3703_ _6461_/Q _4020_/A _3703_/X _6456_/Q _4014_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4683_ _4424_/Y _4430_/Y _4504_/X _4682_/Y _4920_/B _4683_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o41a_1 XFILLER_119_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6422_ _6422_/D VPWR _6422_/Q fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3634_ _3638_/C _5364_/A _6973_/Q _6925_/Q _5418_/A VGND VPWR _3633_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_6353_ VGND VPWR _6357_/S _6353_/A1 _6353_/A0 _6353_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_3565_ _3565_/C _3581_/C _3565_/A _3565_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 X_5304_ VGND VPWR _5309_/S _5484_/A1 hold966/X _5304_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6284_ VGND VPWR _6289_/A _5961_/X _6282_/X _6689_/Q _6283_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3496_ _3504_/B _4310_/A _6757_/Q _6704_/Q _5182_/S VGND VPWR _3494_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 XFILLER_0_309 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_130_513 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5235_ VGND VPWR _5237_/S _5538_/A1 hold511/X _5235_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_69_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_29_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5166_ VPWR VGND _5170_/S hold17/X _5166_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_4117_ VGND VPWR hold38/X hold22/X _4117_/A0 hold39/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_184 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_549 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5097_ VGND VPWR _6724_/D _5087_/Y _5096_/X _5115_/A _5078_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_4048_ VGND VPWR _4049_/S _6356_/A1 hold774/X _4048_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_17_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_71_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_205 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_227 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5999_ _6000_/D _5975_/B _6802_/Q _6866_/Q _5955_/X VGND VPWR _5983_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XPHY_238 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_40_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_33_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_613 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_103 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_79_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_79_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput290 _6437_/Q pll_trim[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_58_54 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold9 VPWR VGND hold9/X hold9/A VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_101_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_110 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_644 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_70 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_130_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_287 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_579 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_224 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_207 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_168_270 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_112 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xwire351 VGND VPWR _3700_/A _3651_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xclkbuf_leaf_62_csclk _6963_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_144_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_487 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold409 _7057_/Q hold409/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_137_690 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3350_ _5409_/A hold48/X _3543_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_98_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_97_202 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_77_csclk _6746_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_3281_ _3313_/A hold64/X hold83/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_151_192 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_112_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5020_ VGND VPWR _5135_/A _5021_/B _5021_/A _5021_/D VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1109 _6965_/Q _5413_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_66_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_38_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_493 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6971_ _6971_/Q _6971_/D VPWR fanout480/X _7080_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_93_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5922_ _5922_/X _5654_/X _6649_/Q _6679_/Q _5621_/X VGND VPWR _5921_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xclkbuf_leaf_15_csclk _6712_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5853_ _7152_/Q _5625_/X _5853_/X _6631_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_167_708 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4804_ VGND VPWR _4804_/X _4804_/B _4804_/A _4804_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_61_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5784_ _6944_/Q _5632_/X _5784_/X _6928_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4735_ VGND VPWR _4735_/X _4735_/B _4735_/A _4747_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_9_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_119_123 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4666_ VGND VPWR _4400_/B _4441_/A _4665_/X _4733_/B VGND VPWR sky130_fd_sc_hd__o21ai_1 X_6405_ _6405_/Q _6361_/X _6405_/D _3945_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3617_ _3620_/C _4280_/A _6949_/Q _6678_/Q _3781_/A2 VGND VPWR _3616_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold910 _7045_/Q hold910/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold921 _5245_/X _6816_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4597_ _4747_/B _4735_/B _4735_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 Xhold932 _6904_/Q hold932/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold943 _4201_/X _6603_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold954 _6707_/Q hold954/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6336_ _6336_/X _6336_/B1 _6642_/Q _6350_/A2 _6336_/A2 VGND VPWR _6335_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3548_ _3552_/C _5463_/A input24/X _7014_/Q _3367_/Y VGND VPWR _3547_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold965 _4279_/X _6674_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold976 _6599_/Q hold976/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold987 _4084_/X _6505_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold998 _4059_/X _6493_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6267_ _6267_/X _5960_/X _6563_/Q _6673_/Q _5953_/X VGND VPWR _6266_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3479_ _3484_/B _5301_/A _6807_/Q _6871_/Q _5229_/A VGND VPWR _3478_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5218_ VGND VPWR hold18/X hold99/X hold139/X _5218_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_88_279 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6198_ _6200_/C _5949_/X _6555_/Q _6675_/Q _5971_/B VGND VPWR _6197_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_29_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5149_ VGND VPWR _5153_/S _5491_/A1 _5149_/A0 _5149_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_151_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_625 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_57_699 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_71_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_410 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_432 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_60_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_176_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_487 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_66 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_125_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_69_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_76 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_94_238 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_132 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_62_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_149_719 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_176_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4520_ _4522_/C _4953_/A _4724_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_172_711 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4451_ _4495_/A _4496_/B _4753_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 Xhold206 _3370_/Y _5454_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_172_744 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold217 _6941_/Q hold217/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold228 _4273_/X _6669_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_132_608 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold239 _6504_/Q hold239/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3402_ _6961_/Q _5400_/A _3402_/X _6833_/Q _5256_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_7170_ _7170_/Q _6400_/X _7170_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4382_ _4382_/B _4892_/A _4359_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_2 X_6121_ _6125_/B _5975_/A _7031_/Q _6847_/Q _5944_/X VGND VPWR _6120_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_98_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_170 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3333_ _5445_/A hold85/X hold75/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6052_ VGND VPWR _6303_/S _6051_/X _7120_/Q _6052_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_112_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3264_ _3266_/B _3264_/B _6485_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_39_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5003_ VGND VPWR _5071_/B _5003_/B _5003_/A _5003_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_85_238 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3195_ _7013_/Q _3195_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_463 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6954_ _6954_/D VPWR _6954_/Q fanout458/X _7012_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5905_ _5906_/D _5666_/X _6548_/Q _6633_/Q _5905_/A2 VGND VPWR _5904_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6885_ _6885_/Q fanout475/X _6885_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_14_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5836_ _6715_/Q _5642_/X _5836_/X _6630_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_167_527 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_577 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5767_ _6999_/Q _5643_/X _5767_/X _6927_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4718_ _4717_/X _4716_/Y _4690_/Y _4645_/Y _4721_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_5698_ _6980_/Q _5624_/X _5698_/X _6932_/Q _5654_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4649_ _4613_/Y _4660_/A _4616_/Y _4621_/X _4612_/Y _4609_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 Xhold740 _6708_/Q hold740/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold751 _5470_/X _7016_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold762 _6817_/Q hold762/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold773 _3994_/X _6437_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold784 _6421_/Q hold784/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6319_ _6319_/Y _6319_/B _6320_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold795 _4294_/X _6686_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_459 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_131_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_173 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1440 _6591_/Q _4188_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1451 _3814_/B _3376_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1462 _6721_/Q _4885_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1473 _6572_/Q _4166_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1484 _6154_/X _7125_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_176_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1495 _6589_/Q _4185_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_17_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_455 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_111_83 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_187_10 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_599 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_541 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_140 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_95_547 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_67_249 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_90_263 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_51_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_35_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3951_ VGND VPWR _3251_/A input85/X _6404_/Q _3951_/X VGND VPWR sky130_fd_sc_hd__mux2_2 X_6670_ _6670_/Q fanout468/X _6670_/D _6671_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3882_ _7091_/Q _5608_/C _7090_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_149_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5621_ _5664_/A _5621_/X _5660_/C _5666_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_4 X_5552_ _5552_/B _5552_/Y _6509_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_4503_ _4925_/B _4881_/B _4582_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_191_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_144_221 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_129_295 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5483_ VGND VPWR hold50/X _5543_/A1 hold588/X _5483_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4434_ VPWR VGND _4566_/A _4984_/A _4434_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_132_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_160_736 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7153_ _7153_/D VPWR _7153_/Q fanout449/X _7155_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_132_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4365_ _4563_/A _4556_/A _4460_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2b_4 XFILLER_113_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6104_ _6103_/Y _7123_/D _6102_/X _6104_/B2 _6279_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_3316_ VPWR VGND _5161_/A hold84/X hold27/X VGND VPWR sky130_fd_sc_hd__and2_1 X_7084_ _7084_/Q fanout482/X hold43/X _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_113_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4296_ VGND VPWR _4297_/S _6356_/A1 hold724/X _4296_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_140_493 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6035_ VGND VPWR _6040_/A _5961_/X _6031_/X _6940_/Q _6034_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_3247_ _3250_/A _3247_/Y _3249_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_86_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_463 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_400 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3178_ _5552_/B _3178_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_94_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_39_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_54_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_14 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_36 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_54_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6937_ _6937_/Q fanout483/X _6937_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XPHY_58 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6868_ _6868_/Q fanout475/X _6868_/D _6882_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_167_313 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5819_ _5652_/Y _5819_/X _5811_/X _6303_/S _6793_/Q _5818_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_6799_ _6799_/Q fanout474/X _6799_/D _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_182_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_135_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold570 _6987_/Q hold570/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold581 _4321_/X _6709_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold592 _6953_/Q hold592/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_106_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_65_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_614 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1270 _4239_/X _6630_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_17_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1281 _6650_/Q _4251_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1292 _4152_/X _6560_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_60_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_186_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_301 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_363 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_158_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_700 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_126_221 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_755 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_563 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_574 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_126_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_99_127 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4150_ VGND VPWR _4150_/S _5519_/A1 hold192/X _4150_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4081_ VGND VPWR _4118_/B hold99/X _4125_/A0 _4081_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_110_666 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_208 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_528 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_36_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4983_ VGND VPWR _4985_/D _4983_/B _5066_/A _4983_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6722_ _6722_/Q fanout487/X _6722_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_189_460 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3934_ VGND VPWR _7157_/Q _3221_/Y _6400_/B _3934_/X VGND VPWR sky130_fd_sc_hd__mux2_2 X_6653_ _6653_/Q _6401_/A _6653_/D _6653_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3865_ VGND VPWR _6488_/Q _3251_/A _3167_/Y _3865_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5604_ _5604_/Y _5604_/B _5608_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_118_711 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6584_ _6584_/Q _7137_/CLK _6584_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3796_ _3796_/X _5541_/A _6914_/Q _7079_/Q _5355_/A VGND VPWR _3795_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_118_733 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5535_ VGND VPWR _5540_/S _5544_/A1 hold419/X _5535_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_11_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5466_ VGND VPWR _5471_/S _5526_/A1 hold353/X _5466_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_427 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_105_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4417_ _4542_/B _4459_/B _4456_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_5397_ VGND VPWR _5399_/S _5538_/A1 hold786/X _5397_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7136_ _7136_/Q _7140_/CLK _7136_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 XFILLER_99_683 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4348_ VPWR VGND _4471_/B _4376_/B _4376_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_101_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7067_ _7067_/Q fanout477/X _7067_/D _7067_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_47_709 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4279_ VGND VPWR _4279_/S _5546_/A1 hold964/X _4279_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6018_ _7048_/Q _5971_/A _6018_/X _6987_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_46_219 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_720 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_422 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_100_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_39_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_15_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_160 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_210 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_182_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_18_411 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_433 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_46_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_93_74 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_18_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_414 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_158_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_142 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3650_ _3651_/D _3981_/A _6892_/Q _6428_/Q _5328_/A VGND VPWR _3649_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_159_699 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_173_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_127_530 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3581_ _3582_/C _3581_/C _3581_/A _3581_/B _3581_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_2 X_5320_ VGND VPWR _5327_/S _5473_/A1 _5320_/A0 _5320_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_127_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_114_213 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_142_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5251_ VGND VPWR _5255_/S _5545_/A1 _5251_/A0 _5251_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4202_ VPWR VGND _4202_/A _4207_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5182_ VGND VPWR _5182_/S _5524_/A1 hold990/X _5182_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_739 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_68_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4133_ VPWR VGND _4133_/A _4138_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_68_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4064_ VGND VPWR hold37/X _5548_/A1 hold900/X _4064_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_52_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4966_ VGND VPWR _5008_/B _5114_/A _5088_/A _5088_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6705_ _6705_/Q fanout445/X _6705_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_177_430 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3917_ _6487_/Q _3829_/B _3916_/Y _7157_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_2 X_4897_ VPWR VGND _4899_/A _4911_/C _4900_/B VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_22_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_149_154 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6636_ _6636_/Q fanout487/X _6636_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3848_ _3860_/B _3847_/X _3845_/S _3866_/S _3848_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_164_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6567_ _6567_/D VPWR _6567_/Q _6401_/A _6653_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3779_ _3782_/C _6352_/A _6426_/Q _7151_/Q _3981_/A VGND VPWR _3778_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_164_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5518_ VGND VPWR hold87/A _5518_/A1 hold323/X _5518_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6498_ _6498_/Q _3946_/B _6498_/D _6735_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_145_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5449_ VGND VPWR _5453_/S _5494_/A1 hold219/X _5449_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_333 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7119_ _7119_/Q fanout466/X _7119_/D _7126_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_86_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_87_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_47_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_101_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_358 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_55_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_436 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_1_1__f_wbbd_sck _6347_/A1 clkbuf_0_wbbd_sck/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_63_66 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_42_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_602 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_552 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_155_179 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_488 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_151_330 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_124_577 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_112_728 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_88_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_88_96 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_111_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_34_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_177 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_263 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4820_ _4902_/A _4820_/X _4456_/Y _4542_/A _4562_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_178_216 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4751_ _4948_/C _4768_/B _4611_/Y _4581_/B _4639_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_193_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_119_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3702_ VGND VPWR _3829_/B _3702_/A1 _3701_/X _6729_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_4682_ _4682_/Y _4682_/A _4682_/C _4682_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_119_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6421_ _6421_/D VPWR _6421_/Q fanout449/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3633_ _6957_/Q _5400_/A _3633_/X _6453_/Q _4008_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_174_444 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_146_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_174_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3564_ _3565_/C _5238_/A _6998_/Q _6814_/Q _5445_/A VGND VPWR _3563_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6352_ VPWR VGND _6352_/A _6357_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_127_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5303_ VGND VPWR _5309_/S _5543_/A1 hold551/X _5303_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6283_ _6283_/X _5967_/X _6479_/Q _6608_/Q _5940_/X VGND VPWR _6281_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3495_ _3814_/B _4310_/A hold74/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 X_5234_ VGND VPWR _5237_/S _5528_/A1 hold451/X _5234_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5165_ VGND VPWR _5165_/S _5524_/A1 _5165_/A0 _5165_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_124_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_68_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4116_ VGND VPWR hold38/X _5548_/A1 hold900/X _4116_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5096_ VGND VPWR _5096_/X _5096_/B _5122_/A _5096_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_84_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4047_ VGND VPWR _4049_/S _6355_/A1 hold934/X _4047_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_71_317 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_52_542 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_206 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_228 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5998_ _6000_/C _5952_/X _6858_/Q _6954_/Q _5943_/X VGND VPWR _5997_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XPHY_239 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_185_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4949_ _4456_/Y _4946_/X _4542_/A _4948_/X _4963_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_33_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_149_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_113 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6619_ _6619_/Q fanout470/X _6619_/D _6712_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_165_477 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_106_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_352 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_133_374 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_160 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput280 _6420_/Q pll_trim[18] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput291 _6438_/Q pll_trim[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_87_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_101_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_74_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_90_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_31_715 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_30_214 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_282 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_124 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_472 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_146 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire352 VGND VPWR _3640_/C _3611_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_143_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_144_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_737 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_97_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_112_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3280_ _3975_/S _6723_/Q VPWR VGND hold63/X hold64/A VGND VPWR sky130_fd_sc_hd__mux2_8 XFILLER_97_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_2_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_623 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_336 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6970_ _6970_/D VPWR _6970_/Q fanout463/X _7063_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_19_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_53_317 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_93_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5921_ _5921_/X _5634_/X _6464_/Q _6454_/Q _5624_/X VGND VPWR _5911_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_0_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5852_ _5852_/C _5852_/Y _5852_/A _5852_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_61_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_726 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4803_ VGND VPWR _4804_/C _5088_/C _5088_/A _4803_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_21_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5783_ _6808_/Q _5660_/X _5783_/X _6816_/Q _5667_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_166_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4734_ VPWR VGND _4740_/A _4735_/B _4735_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_147_433 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4665_ _4642_/A _4739_/A _4563_/A _4441_/B _4665_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_190_701 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6404_ _6404_/Q _6360_/X _6404_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 Xhold900 _6530_/Q hold900/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3616_ _6478_/Q _4038_/A _3616_/X _7154_/Q _6352_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_190_734 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold911 _5503_/X _7045_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold922 _6848_/Q hold922/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4596_ VGND VPWR _4595_/A _4627_/B _4562_/Y _4735_/B _4633_/B VGND VPWR sky130_fd_sc_hd__a2bb2o_1 Xhold933 _5344_/X _6904_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold944 _6554_/Q hold944/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6335_ _6644_/Q _6335_/A2 _6335_/X _6643_/Q _6335_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold955 _4319_/X _6707_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3547_ _7051_/Q _5505_/A _3547_/X _6714_/Q _4322_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold966 _6868_/Q hold966/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold977 _4197_/X _6599_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold988 _6420_/Q hold988/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_0_118 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold999 _6578_/Q hold999/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6266_ _6266_/X _5948_/X _6653_/Q _6698_/Q _5973_/A VGND VPWR _6265_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3478_ _6959_/Q _5400_/A _3478_/X hold56/A hold29/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5217_ VGND VPWR hold18/X _5469_/A1 hold683/X _5217_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold1600 _6535_/Q hold243/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6197_ _7034_/Q _5601_/X _6197_/X _6715_/Q _5959_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_69_472 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_9 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5148_ VPWR VGND _5148_/A _5153_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_57_656 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5079_ _4456_/Y _5080_/C _4689_/B _4872_/A _4902_/A _4691_/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_37_380 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_670 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_539 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_138_444 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_263 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_285 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_125_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_330 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_83 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_396 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_236 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_102_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_486 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_62_125 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_681 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_8_730 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_723 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_7_262 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4450_ VGND VPWR _4948_/B _4902_/A _4442_/Y _4450_/Y VGND VPWR sky130_fd_sc_hd__o21ai_1 Xhold207 _5461_/S _5462_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_156_296 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold218 _5386_/X _6941_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_144_447 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold229 _6679_/Q hold229/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3401_ _3408_/A _3981_/A _7062_/Q _6433_/Q hold86/A VGND VPWR _3400_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4381_ _4381_/Y _4492_/D _4739_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6120_ hold56/A _5937_/X _6120_/X _6887_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3332_ _3347_/A hold73/X hold74/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_98_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_112_344 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6051_ _6040_/Y _6051_/X _6050_/X _6226_/B _6788_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__o2bb2a_1 X_3263_ _7159_/D _3834_/B2 _3261_/X _3262_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__a21bo_1 XFILLER_58_409 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_85_206 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5002_ VGND VPWR _5074_/B _5002_/B _5002_/A _5002_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_3194_ _7021_/Q _3194_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_486 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_103 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_54_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6953_ _6953_/Q fanout460/X _6953_/D _6953_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5904_ _6463_/Q _5624_/X _5904_/X _6668_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_53_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6884_ _6884_/Q fanout477/X _6884_/D _6884_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_34_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5835_ _5638_/X _6705_/Q _5834_/X _5835_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_167_539 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5766_ _6823_/Q _5818_/A2 _5766_/X _6911_/Q _5814_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4717_ _4717_/X _4902_/A _4482_/A _4672_/A _4476_/Y _4609_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 XFILLER_163_701 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5697_ _6988_/Q _5627_/X _5697_/X _6828_/Q _5635_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_30_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4648_ _4648_/X _4556_/A _4563_/A _4689_/B _5062_/A _4647_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 XFILLER_123_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold730 _6607_/Q hold730/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold741 _4320_/X _6708_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4579_ _4948_/D _4579_/B _4579_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold752 _6521_/Q hold752/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold763 _5246_/X _6817_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold774 _6483_/Q hold774/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6318_ _6318_/Y _6318_/B _6320_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold785 _3972_/X _6421_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold796 _6476_/Q hold796/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_130_130 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6249_ _6250_/D _5959_/X _7036_/Q _6717_/Q _5601_/X VGND VPWR _6248_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_77_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_57 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_131_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_57_420 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_162_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1430 _7136_/Q _6311_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1441 _7134_/Q _6309_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1452 _3976_/X _6423_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1463 _3303_/Y hold27/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1474 _7139_/Q _6314_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1485 _7129_/Q _6278_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_leaf_61_csclk _7017_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xhold1496 _6639_/Q _3881_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_189_108 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_119 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_32_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_13_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_372 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_76_csclk _6707_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_71_66 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_77 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_745 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_181_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_107_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_126_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_631 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_14_csclk _6629_/CLK clkbuf_3_5_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_106_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_136_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_136_92 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_48_431 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_401 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold90 hold90/A hold90/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_leaf_29_csclk _7080_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_91_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3950_ _3950_/A _3950_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_90_275 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_130 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3881_ _3962_/B _6644_/Q _3881_/B1 _6644_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_149_528 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5620_ VPWR VGND _5660_/C _7093_/Q _7092_/Q VGND VPWR sky130_fd_sc_hd__and2b_2 X_5551_ _7087_/D _3177_/Y _5550_/Y _5551_/B1 _6506_/Q _6763_/Q VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 XFILLER_157_572 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4502_ _4502_/X _4465_/B _4900_/A _4496_/B _4462_/B _4896_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 X_5482_ VGND VPWR hold50/X hold666/X _5482_/A0 _5482_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_184_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_609 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4433_ _4691_/A _4607_/A _4881_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 XFILLER_104_119 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_160_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7152_ _7152_/Q fanout449/X _7152_/D _7155_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4364_ _4690_/B _4556_/A _4441_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_116_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_113_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6103_ _6507_/Q _6103_/B1 _6103_/Y _7122_/Q VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3315_ hold84/A hold83/X hold64/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_112_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7083_ _7083_/Q fanout485/X _7083_/D _7083_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_4295_ VGND VPWR _4297_/S _6355_/A1 hold958/X _4295_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6034_ _6034_/X _5967_/X _7012_/Q _6852_/Q _5940_/X VGND VPWR _6030_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3246_ _3253_/S _3250_/A _7167_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_67_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_39_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_132_39 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3177_ _6509_/Q _3177_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_54_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_54_445 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_15 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_26 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6936_ _6936_/Q fanout482/X _6936_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XPHY_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_48 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_59 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_22_320 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6867_ _6867_/D VPWR _6867_/Q fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5818_ _5815_/X _5812_/X _6825_/Q _5818_/A2 _5818_/X _5817_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a2111o_4 X_6798_ _6798_/Q fanout457/X _6798_/D _7049_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5749_ _5749_/X _5905_/A2 _6846_/Q _6798_/Q _5902_/A2 VGND VPWR _5739_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_136_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_69 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_157_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_2_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold560 _6843_/Q hold560/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold571 _5438_/X _6987_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold582 _6474_/Q hold582/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_1_235 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold593 _5399_/X _6953_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_173_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_131_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1260 _4087_/X _6510_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1271 _6685_/Q _4293_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1282 _4251_/X _6650_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1293 _6715_/Q _4329_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_17_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_33_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_72_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_15_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_122 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_127_712 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_737 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_114_439 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_110_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4080_ VGND VPWR _4084_/S _4079_/X hold405/X _4080_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_656 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_36_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4982_ _4673_/A _4689_/B _4902_/B _4969_/Y _4982_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 X_6721_ _6721_/Q fanout487/X _6721_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3933_ _3933_/X input1/X _6498_/Q input3/X VPWR VGND VGND VPWR sky130_fd_sc_hd__mux2_4 XFILLER_51_459 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6652_ _6652_/D VPWR _6652_/Q fanout454/X _6654_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3864_ _3863_/Y _3866_/A1 _3862_/X _6408_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_5603_ _6508_/Q _5601_/X _7102_/D _7102_/Q _5602_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6583_ _6583_/Q _7137_/CLK _6583_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_3795_ _6460_/Q _4020_/A _3795_/X _6450_/Q _4008_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_191_125 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5534_ VGND VPWR _5540_/S _5534_/A1 hold261/X _5534_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_211 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_118_745 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_11_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5465_ VGND VPWR _5471_/S _5465_/A1 hold275/X _5465_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_105_417 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4416_ VPWR VGND _4551_/A _4456_/A _4549_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_5396_ VGND VPWR _5399_/S _5528_/A1 hold445/X _5396_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7135_ _7135_/Q _7140_/CLK _7135_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_4347_ _4376_/B _4702_/B _4347_/C _4564_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_113_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7066_ _7066_/Q fanout477/X _7066_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4278_ VGND VPWR _4279_/S _5518_/A1 hold481/X _4278_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6017_ _6017_/X _5960_/X _6819_/Q _7072_/Q _5953_/X VGND VPWR _6016_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3229_ _4441_/A _4563_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_6 XFILLER_39_261 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_607 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_1_0__f_wbbd_sck _3942_/A2 clkbuf_0_wbbd_sck/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_15_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6919_ _6919_/Q fanout465/X _6919_/D _6999_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_70_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_334 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_689 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_109_701 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_520 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_692 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_163_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_123_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_533 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold390 _4254_/X _6653_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_132_770 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_104_483 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_58_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1090 _5233_/X _6805_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_97 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_178_409 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_20_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_173_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3580_ _3580_/C _3580_/D _3581_/D _3580_/A _3580_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_2 XFILLER_127_542 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_142_501 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5250_ VGND VPWR _5255_/S _5484_/A1 _5250_/A0 _5250_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4201_ VGND VPWR _4201_/S _5546_/A1 hold942/X _4201_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5181_ VGND VPWR _5181_/S _5465_/A1 hold255/X _5181_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_301 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_3_40 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4132_ VGND VPWR _4132_/S _6357_/A1 hold608/X _4132_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_345 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_153 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4063_ VGND VPWR _4067_/S _4062_/X hold792/X _4063_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_36_264 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4965_ _5069_/B _4984_/A _5051_/A _4965_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 X_6704_ _6704_/Q fanout450/X _6704_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3916_ _6489_/Q _3916_/Y _6486_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_189_291 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_177_442 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4896_ VPWR VGND _4911_/C _4896_/B _4896_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_6635_ _6635_/D VPWR _6635_/Q fanout487/X _7150_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3847_ hold70/A hold32/A _6412_/Q _3854_/S _3847_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_164_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6566_ _6566_/Q fanout445/X _6566_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3778_ _6906_/Q _5346_/A _3778_/X _6700_/Q _4310_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_152_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5517_ VGND VPWR hold87/A _5544_/A1 hold409/X _5517_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6497_ _7188_/A fanout479/X _6497_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_133_512 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_105_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_160_320 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5448_ VGND VPWR _5453_/S _5526_/A1 hold385/X _5448_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_154_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_729 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5379_ VGND VPWR _5381_/S _5469_/A1 hold694/X _5379_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_386 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7118_ _7118_/Q fanout447/X _7118_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_86_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7049_ _7049_/Q fanout456/X _7049_/D _7049_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_47_529 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_101_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_55_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_34 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_179_12 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_234 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_206 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_34 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_42_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_78 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_8_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_153 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_102 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_143_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_501 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_597 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_383 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_353 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_124_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_396 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_144_70 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_65_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_19_743 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_179_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_178_228 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4750_ _4672_/B _4769_/A _4626_/Y _4542_/D _4628_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_3701_ VGND VPWR _3829_/A _3764_/A1 _3700_/Y _3701_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4681_ _4681_/Y _4686_/B _5010_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_186_283 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6420_ _6420_/Q _6420_/D VPWR fanout457/X _6749_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 X_3632_ _3638_/B _3358_/Y _6941_/Q input14/X _5382_/A VGND VPWR _3631_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_134_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6351_ _6351_/X _6351_/A2 _6350_/X _6641_/Q _5006_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o31a_1 XFILLER_115_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3563_ _6966_/Q _5409_/A _3563_/X _6554_/Q _4139_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5302_ VGND VPWR _5309_/S _5473_/A1 _5302_/A0 _5302_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6282_ _7155_/Q _5958_/X _6282_/X _6484_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3494_ _6613_/Q _4208_/A _3494_/X _6569_/Q _4157_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_103_707 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5233_ VGND VPWR _5237_/S _5545_/A1 _5233_/A0 _5233_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_526 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_opt_3_0_csclk clkbuf_opt_3_0_csclk/X _6888_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5164_ VGND VPWR _5164_/X _5164_/B _5171_/B hold17/X VGND VPWR sky130_fd_sc_hd__and3_1 X_4115_ VGND VPWR hold38/X hold42/X _4115_/A0 hold55/A VGND VPWR sky130_fd_sc_hd__mux2_1 X_5095_ _5096_/C _5122_/C _5142_/B _5126_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_84_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4046_ VGND VPWR _4049_/S _6354_/A1 hold848/X _4046_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_17_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_223 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_554 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_207 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5997_ _7002_/Q _5958_/X _5997_/X _6882_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_33_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_229 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4948_ _4948_/X _4948_/C _4948_/A _4948_/B _4948_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_4879_ _4880_/D _4529_/Y _4878_/X _4877_/X _4613_/Y _4902_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_138_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6618_ _6618_/Q fanout469/X _6618_/D _6655_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_192_242 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_253 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_137_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_165_489 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6549_ _6549_/D VPWR _6549_/Q _6383_/A _6674_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_106_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_106_545 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_161_640 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_515 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput270 _6744_/Q pll_sel[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_121_526 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_386 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xoutput281 _6421_/Q pll_trim[19] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput292 _6439_/Q pll_trim[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_45 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_35 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_75_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_181_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_47_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_757 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_90_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_130_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_90_43 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_294 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_183_242 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire353 VGND VPWR _3640_/B _3604_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_128_158 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xwire364 VGND VPWR _6226_/D _6225_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_116_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_81 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_109_361 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_320 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_171_459 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_397 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_97_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_462 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_66_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_38_348 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_19_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5920_ VGND VPWR _5915_/X _5920_/X _5919_/X _6559_/Q _5667_/X _5916_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_80_104 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5851_ VGND VPWR _5852_/C _5637_/X _5848_/X _6696_/Q _5850_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_179_515 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4802_ _4631_/Y _4803_/C _4645_/Y _4689_/A _4846_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 XFILLER_61_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_204 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5782_ _5787_/B _5637_/X _6992_/Q _6952_/Q _5627_/X VGND VPWR _5781_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4733_ _4733_/B _4747_/C _4739_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_174_220 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_147_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4664_ _4664_/B _4928_/A _4664_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6403_ _6403_/Q _6359_/X _6403_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3615_ _3620_/B _5182_/S _7042_/Q _6758_/Q hold76/A VGND VPWR _3614_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_135_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold901 _4116_/X _6530_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4595_ _4735_/A _4595_/B _4595_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold912 _6853_/Q hold912/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold923 _5281_/X _6848_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold934 _6482_/Q hold934/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6334_ VGND VPWR _6346_/S _6334_/A1 _6333_/X _7144_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_127_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold945 _4144_/X _6554_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3546_ _4322_/A _3546_/A hold75/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_89_705 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold956 _6697_/Q hold956/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold967 _5304_/X _6868_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold978 _6454_/Q hold978/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold989 _3970_/X _6420_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6265_ _6648_/Q _5976_/C _6265_/X _6568_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3477_ _3484_/A _5211_/A _6999_/Q _6791_/Q _5445_/A VGND VPWR _3459_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5216_ VGND VPWR hold18/X hold60/X hold118/X _5216_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6196_ _6200_/B _5975_/A _6455_/Q _6599_/Q _5944_/X VGND VPWR _6195_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1601 _7132_/Q _6306_/B2 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_28_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5147_ VGND VPWR _5147_/S _6354_/A1 hold884/X _5147_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_69_484 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_315 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_84_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5078_ _5078_/X _5103_/B _6724_/Q _5077_/Y _4229_/X VGND VPWR _5067_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4029_ VGND VPWR hold68/X _5493_/A1 hold870/X _4029_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_71_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_80_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_166_743 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_456 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_551 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_447 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_342 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_69_33 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_180_278 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_79_204 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_248 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_631 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_85_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_121_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_87_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_48_657 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_90_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_75_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_141_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_693 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_170 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_524 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_389 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_144_404 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_11_292 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_117_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold208 _5458_/X _7005_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_128 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold219 _6997_/Q hold219/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3400_ _7070_/Q _5523_/A _3400_/X _6889_/Q _5319_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4380_ VPWR VGND _4896_/B _4492_/D _4739_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3331_ _3331_/Y _3379_/A hold36/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_125_684 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6050_ VGND VPWR _6043_/X _6301_/C _6050_/X _6050_/C _6045_/X VGND VPWR sky130_fd_sc_hd__and4bb_1 X_3262_ _3262_/C _3262_/Y _6416_/Q _3837_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_112_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5001_ VGND VPWR _5004_/B _5001_/B _5001_/A _5076_/B VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_85_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_66_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3193_ _7029_/Q _3193_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_6952_ _6952_/Q fanout475/X _6952_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_66_498 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5903_ _5906_/C _5661_/X _6617_/Q _6622_/Q _5628_/X VGND VPWR _5902_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_6883_ _6883_/Q _6883_/D VPWR fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_5834_ _7151_/Q _5625_/X _5834_/X _6619_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_61_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5765_ _6967_/Q _5642_/X _5765_/X _6895_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4716_ _4716_/A _4716_/Y _4965_/B _4969_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_5696_ _5711_/A _5638_/X _6940_/Q _6956_/Q _5632_/X VGND VPWR _5694_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_163_713 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_163_724 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4647_ _4673_/A _4628_/Y _4846_/B _4611_/Y _4647_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_107_128 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold720 _6517_/Q hold720/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold731 _4206_/X _6607_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4578_ _4902_/A _4672_/A _4947_/B _4846_/B _4578_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 Xhold742 _6537_/Q hold742/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold753 _4106_/X _6521_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold764 _6815_/Q hold764/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6317_ _6317_/A _6317_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_3529_ _4151_/A _3562_/A _3573_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold775 _4048_/X _6483_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold786 _6951_/Q hold786/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold797 _4040_/X _6476_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6248_ _6557_/Q _5971_/B _6248_/X _6677_/Q _5949_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_39_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6179_ VGND VPWR _6304_/S _6178_/X _6179_/A0 _7126_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1420 _6596_/Q hold1420/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_69_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1431 _6587_/Q _4183_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1442 _6432_/Q hold151/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1453 _6947_/Q _5393_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1464 _6727_/Q _3830_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1475 _6590_/Q _4186_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1486 _6254_/X _7129_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1497 _6583_/Q _4179_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_44_115 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_44_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_25_384 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_71_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_518 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_579 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_185_359 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_138_264 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_138_286 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_576 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_662 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_107_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_95_527 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_443 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold80 hold80/A hold80/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_152_70 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold91 hold91/A hold91/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_75_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_63_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_50_107 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_643 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3880_ _3962_/B _6643_/Q _3880_/B1 _6643_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_43_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5550_ _6506_/Q _3883_/X _5550_/Y _3177_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_191_307 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_561 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4501_ _4535_/B _5051_/B _4782_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_157_584 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_172_521 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5481_ hold50/A _5505_/B hold49/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_172_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4432_ _4969_/A _4460_/A _4632_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_144_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7151_ _7151_/Q fanout450/X _7151_/D _7155_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_132_429 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4363_ _4690_/A _4817_/A _4556_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_98_321 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6102_ VGND VPWR _6102_/X _6100_/X _6101_/Y _6089_/Y _5552_/B VGND VPWR sky130_fd_sc_hd__a211o_1 X_3314_ _4118_/B hold36/X _3546_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_7082_ _7082_/Q fanout479/X _7082_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_113_665 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4294_ VGND VPWR _4297_/S _6354_/A1 hold794/X _4294_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_98_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6033_ _7081_/Q _5976_/B _6049_/B _7041_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_98_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3245_ _3875_/B _3249_/B _3253_/S _3244_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 X_3176_ _3176_/A _3176_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_27_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_54_457 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_42_608 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_16 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6935_ _6935_/Q fanout465/X _6935_/D _6997_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_25_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_38 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_49 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6866_ _6866_/Q _6866_/D VPWR fanout475/X _6908_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_5817_ _5817_/X _5660_/X _6841_/Q _6809_/Q _5657_/X VGND VPWR _5816_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_179_186 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6797_ _6797_/Q fanout458/X _6797_/D _7012_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_41_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5748_ _5748_/D _5748_/C _5748_/Y _5748_/A _5748_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_5679_ _5679_/X _5814_/B1 _6843_/Q _6907_/Q _5902_/A2 VGND VPWR _5678_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_123_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold550 _5330_/X _6891_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold561 _5276_/X _6843_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold572 _6907_/Q hold572/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold583 _4037_/X _6474_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold594 _7019_/Q hold594/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_207 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_89_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1250 _5524_/X _7063_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1261 _6680_/Q _4287_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1272 _4293_/X _6685_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1283 _6735_/Q _5146_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1294 _4329_/X _6715_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_221 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_314 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_41_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_347 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_154_543 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_181_362 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_575 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_110_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput170 wb_we_i _6320_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_36_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_24_619 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4981_ _4983_/C _4981_/C _4981_/A _4981_/B _4981_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_51_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6720_ _6720_/Q fanout487/X _6720_/D _3937_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3932_ _3932_/X _6403_/Q _3931_/X _3953_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__mux2_4 XFILLER_17_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6651_ _6651_/Q fanout452/X _6651_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_31_140 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3863_ hold24/A _3866_/S _3863_/Y _3860_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_149_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5602_ _5602_/B _5602_/Y _5602_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_6582_ _6582_/Q _6360_/A _6582_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_31_195 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3794_ VGND VPWR _3828_/A _3794_/B _3794_/A _3794_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_192_627 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5533_ VGND VPWR _5540_/S hold667/X _5533_/A0 _5533_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_8_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_172_340 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_145_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_leaf_60_csclk _7054_/CLK _6447_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5464_ VGND VPWR _5471_/S _5524_/A1 _5464_/A0 _5464_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_502 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4415_ _4415_/B _4549_/B _4415_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_132_226 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5395_ VGND VPWR _5399_/S _5545_/A1 _5395_/A0 _5395_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7134_ _7134_/Q _7137_/CLK _7134_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_4346_ _4347_/C _4564_/A _4702_/B _4376_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_59_516 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_113_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_75_csclk _6704_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_7065_ _7065_/Q fanout465/X _7065_/D _7065_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xfanout359 _6301_/C _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_4277_ VGND VPWR _4279_/S _5544_/A1 hold612/X _4277_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_86_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6016_ _6016_/X _5948_/X _6907_/Q _6947_/Q _5973_/A VGND VPWR _6015_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3228_ _6921_/Q _3228_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_39_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_27_435 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6918_ _6918_/Q fanout478/X _6918_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_6849_ _6849_/Q fanout464/X _6849_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_23_685 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_10_302 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_23_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_167_156 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xclkbuf_leaf_28_csclk _6990_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_184_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_259 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold380 _5442_/X _6991_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold391 _6809_/Q hold391/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_451 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_44 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_104_495 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_711 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1080 _5242_/X _6813_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1091 _7074_/Q _5536_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_541 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_61_747 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_33_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_454 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_177 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_139_370 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_554 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_142_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_114_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4200_ VGND VPWR _4201_/S _5518_/A1 hold501/X _4200_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5180_ VGND VPWR _5181_/S hold99/X hold129/X _5180_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4131_ VGND VPWR _4132_/S _6356_/A1 hold758/X _4131_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_421 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_3_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_110_432 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_68_357 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4062_ VGND VPWR hold37/X _5538_/A1 _4115_/A0 _4062_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_95_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_83_316 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_276 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4964_ VGND VPWR _5005_/B _4964_/B _4964_/A _4964_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6703_ _6703_/Q fanout450/X _6703_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3915_ _3954_/A _3962_/B _6640_/D _6635_/Q _3908_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_32_460 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4895_ _4918_/A _5029_/B _5084_/D _4895_/B _5085_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_149_134 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6634_ _6634_/Q _6383_/A _6634_/D _6659_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3846_ VGND VPWR _3866_/S _3846_/A1 _3845_/X _6414_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_158_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6565_ _6565_/Q _6360_/A _6565_/D _6755_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3777_ _3782_/B _3358_/Y _6970_/Q input11/X _5418_/A VGND VPWR _3776_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_164_159 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5516_ VGND VPWR hold87/X _5543_/A1 hold600/X _5516_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6496_ _7187_/A fanout479/X _6496_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_5447_ VGND VPWR _5453_/S _5465_/A1 hold259/X _5447_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_172_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_237 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_160_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5378_ VGND VPWR _5381_/S _5528_/A1 hold477/X _5378_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_160_398 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7117_ _7117_/Q fanout447/X _7117_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4329_ VGND VPWR _4333_/S _6353_/A1 _4329_/A0 _4329_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_113_281 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_121 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7048_ _7048_/D VPWR _7048_/Q fanout485/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_15_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_55_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_43_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_103_75 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_42_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_218 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_179_46 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_179_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_10_121 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_168_498 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_114 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_608 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_124_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_163_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_395 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_2_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_77_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_65_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_755 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_221 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_563 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_73_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3700_ _3700_/Y _3700_/A _3700_/B _3700_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 X_4680_ _4774_/B _4737_/A _4773_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_159_476 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_147_627 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3631_ _6703_/Q _4310_/A _3631_/X _6548_/Q _4133_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_146_137 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6350_ _6350_/X _6317_/A _6320_/B _6349_/X _3910_/A _6350_/A2 VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 X_3562_ _4139_/A _3562_/A _3562_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_127_351 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_127_362 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5301_ _5309_/S _5505_/B _5301_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_6281_ _6613_/Q _5943_/X _6281_/X _6659_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3493_ _4157_/A _3571_/A hold66/X VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5232_ VGND VPWR _5237_/S _5484_/A1 hold850/X _5232_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_142_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_674 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_102_207 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5163_ VGND VPWR _5163_/S _6354_/A1 hold852/X _5163_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_68_110 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4114_ VGND VPWR hold38/X _5546_/A1 hold812/X _4114_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_603 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_56_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5094_ _5142_/B _4818_/X _5093_/X _5058_/A _4946_/X _4948_/C VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 X_4045_ VGND VPWR _4049_/S _5491_/A1 _4045_/A0 _4045_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_714 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_208 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5996_ _6000_/B _5975_/C _7079_/Q _6834_/Q _5976_/B VGND VPWR _5995_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_52_566 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_219 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_33_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4947_ _4947_/A _5043_/B _4947_/B _4947_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_4878_ VGND VPWR _4878_/X _5029_/A _5083_/A _4878_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_6617_ _6617_/Q fanout469/X _6617_/D _6769_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3829_ _3829_/B _3829_/Y _3829_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_20_485 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_146_660 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6548_ _6548_/Q _6548_/D VPWR fanout445/X _6735_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_4 XFILLER_192_276 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_192_287 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6479_ _6479_/Q _3946_/B _6479_/D _6707_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_161_652 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput260 _6750_/Q pll_bypass VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput271 _6434_/Q pll_trim[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput282 _6435_/Q pll_trim[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_121_538 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xoutput293 _6440_/Q pll_trim[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_181_14 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_102_752 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_101_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_47_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_669 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_16_747 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_55_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_169_741 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_240 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_30_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_210 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_485 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xwire354 VGND VPWR _3582_/A _3504_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_7_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xwire365 VGND VPWR _6201_/B _6200_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_183_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_93 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_42 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_373 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_99_75 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_86 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_81_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_544 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5850_ _5850_/X _5661_/X _6566_/Q _6620_/Q _5635_/X VGND VPWR _5849_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4801_ _4804_/B _4800_/X _4799_/X _4707_/Y _4700_/Y _4673_/B VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 X_5781_ _6848_/Q _5902_/A2 _5781_/X _6936_/Q _5654_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_61_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_21_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4732_ _4611_/Y _4428_/Y _4500_/A _5114_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_187_571 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_147_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_147_424 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4663_ _4663_/Y _4716_/A _4686_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_2 X_6402_ _6402_/Q _6358_/X _6402_/D _3927_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3614_ _6745_/Q _5154_/A _3614_/X input95/X _3585_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4594_ _4661_/A _4631_/D _4563_/A _4441_/B _4595_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 Xhold902 _6719_/Q hold902/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold913 _5287_/X _6853_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold924 _6968_/Q hold924/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6333_ _6333_/X _6333_/B1 _6642_/Q _6350_/A2 _6333_/A2 VGND VPWR _6332_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3545_ _3552_/B _4127_/A _6958_/Q _6544_/Q _5400_/A VGND VPWR _3544_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_155_490 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold935 _4047_/X _6482_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold946 _6564_/Q hold946/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold957 _4307_/X _6697_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold968 _6477_/Q hold968/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_717 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6264_ _6264_/C _6276_/C _6264_/A _6264_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_142_151 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold979 _4013_/X _6454_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3476_ _3485_/B _3475_/X _6879_/Q _5310_/A _7031_/Q hold49/A VGND VPWR VGND VPWR + sky130_fd_sc_hd__a221oi_1 X_5215_ VGND VPWR hold18/X _5494_/A1 hold225/X _5215_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_335 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6195_ _6465_/Q _5937_/X _6195_/X _6625_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1602 _7123_/Q _6128_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5146_ VGND VPWR _5147_/S _5491_/A1 _5146_/A0 _5146_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_111_571 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_69_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_29_327 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_84_433 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_56_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_28 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5077_ _5077_/Y _5077_/A _5077_/C _5103_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_178_9 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_84_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4028_ VGND VPWR hold68/X _5492_/A1 _4028_/A0 _4028_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_588 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_80_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5979_ _5979_/A _5981_/A _5979_/C _5979_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_166_711 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_40_569 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_100_76 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_165_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_176_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_138_468 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_119_693 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_153_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_630 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_106_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_106_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_216 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_57 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_687 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_47_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_319 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_511 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_141_72 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_16_533 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_188_335 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_31_536 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_182 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_157_711 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_169_571 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_210 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_157_755 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_144_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold209 _6758_/Q hold209/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_166_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_91 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3330_ _5391_/A _3543_/A _3373_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_125_696 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_481 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3261_ _6415_/Q _3164_/Y _6417_/Q _6485_/Q _3261_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_98_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5000_ _4991_/X _4941_/D _4582_/Y _4948_/C _5076_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_22_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3192_ _6445_/Q _3192_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_39_636 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_94_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6951_ _6951_/Q fanout474/X _6951_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_19_371 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_19_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5902_ _6602_/Q _5902_/A2 _5902_/X _6453_/Q _5634_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_6882_ _6882_/D VPWR _6882_/Q fanout475/X _6882_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_5833_ VGND VPWR _5833_/X _5631_/X _5830_/X _6560_/Q _5832_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_14_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5764_ VGND VPWR _5761_/X _5764_/X _5763_/X _7015_/Q _5630_/X _5762_/X VGND VPWR + sky130_fd_sc_hd__a2111o_1 XFILLER_147_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4715_ _4722_/C _5062_/B _5084_/C _4713_/X _4714_/X _4469_/A VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 XFILLER_30_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5695_ _7020_/Q _5619_/X _5695_/X _6860_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4646_ _4646_/Y _4707_/C _4646_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_190_522 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_135_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold710 _6959_/Q hold710/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_544 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold721 _4101_/X _6517_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4577_ _4902_/A _4723_/B _4672_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 Xhold732 _7188_/A hold732/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_408 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold743 _4124_/X _6537_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold754 _6745_/Q hold754/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6316_ _6317_/A _6320_/B _6640_/Q _6316_/A2 VGND VPWR VGND VPWR sky130_fd_sc_hd__a21bo_1 Xhold765 _5244_/X _6815_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3528_ _3538_/B hold76/A _6438_/Q _7043_/Q _3372_/Y VGND VPWR _3527_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_89_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold776 _6478_/Q hold776/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold787 _5397_/X _6951_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold798 _6886_/Q hold798/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6247_ _6250_/C _5975_/A _6457_/Q _6601_/Q _5944_/X VGND VPWR _6246_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3459_ _6799_/Q _3326_/Y _3459_/X _7200_/A _4102_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1410 _6424_/Q _3978_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6178_ VGND VPWR _6303_/S _6177_/X _6178_/A0 _6178_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_69_271 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1421 _6598_/Q hold1421/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1432 _6574_/Q _4168_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1443 _3988_/X _6432_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5129_ _6725_/D _5129_/C _5129_/D _5113_/X _5129_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand4b_1 Xhold1454 _6730_/Q _3642_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1465 _6433_/Q hold557/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1476 _6597_/Q _4194_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_628 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1487 _6414_/Q _3846_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1498 _6486_/Q _3911_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_80_491 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_333 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_71_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_210 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_744 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_61 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_688 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_400 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_539 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_88_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_0_495 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_455 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold70 hold70/A hold70/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold81 hold81/A hold81/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_48_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold92 hold92/A hold92/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_655 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_193 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_380 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_12_580 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4500_ _4689_/A _4500_/Y _4500_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_191_319 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_117_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5480_ VGND VPWR hold30/X hold22/X _5480_/A0 hold31/A VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_184_360 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4431_ _4460_/A _4881_/A _4753_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_2 XANTENNA_1 _7157_/D VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_117_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_85 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7150_ _7150_/Q _6307_/B _7150_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4362_ _4911_/A _4489_/A _4500_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_6101_ _6226_/B _6101_/Y _6790_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 X_3313_ _3313_/A _3454_/A _3546_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_7081_ _7081_/Q fanout485/X _7081_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4293_ VGND VPWR _4297_/S _5491_/A1 _4293_/A0 _4293_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_98_377 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6032_ _7057_/Q _5954_/X _6049_/A _6876_/Q _5976_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3244_ _3260_/S _3244_/Y _3875_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_67_753 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3175_ _7089_/Q _3886_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_82_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_200 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_27_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_233 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_244 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6934_ _6934_/Q fanout478/X _6934_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_54_469 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XPHY_28 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_35_661 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_25_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6865_ _6865_/Q fanout465/X _6865_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5816_ _7025_/Q _5619_/X _5816_/X _6865_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_22_344 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6796_ _6796_/Q fanout456/X _6796_/D _7011_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_22_377 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_41_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5747_ _5748_/D _5814_/B1 _6822_/Q _6910_/Q _5818_/A2 VGND VPWR _5746_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5678_ _6899_/Q _5621_/X _5678_/X _6819_/Q _5818_/A2 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_175_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4629_ _4716_/A _5099_/B _4975_/A _4698_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 Xhold540 _4049_/X _6484_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_151_739 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold551 _6867_/Q hold551/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold562 _6582_/Q hold562/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold573 _5348_/X _6907_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold584 _7009_/Q hold584/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold595 _5474_/X _7019_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_517 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_165 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_106_64 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_742 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1240 _5515_/X _7055_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1251 _6625_/Q _4233_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_572 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1262 _4287_/X _6680_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_17_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold1273 _6705_/Q _4317_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_18_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1284 _5146_/X _6735_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1295 _6604_/Q _4203_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_233 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_72_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_417 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_186_625 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_697 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_173_319 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_585 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_181_374 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_587 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_471 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_107_493 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_110_625 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_1_771 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_110_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_163_81 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_230 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xinput160 VGND VPWR _6342_/B1 wb_dat_i[6] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_64_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4980_ _4970_/Y _4981_/D _4975_/Y _5062_/A _4619_/Y _4644_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 XFILLER_51_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3931_ VGND VPWR _6405_/Q input38/X _3930_/X _3931_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6650_ _6650_/Q fanout452/X _6650_/D _6668_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3862_ hold24/A _3860_/B _3866_/S _3167_/Y _3862_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 X_5601_ _5968_/A _5964_/A _5981_/A _5601_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_176_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6581_ _6581_/Q fanout445/X _6581_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3793_ _3793_/D _3793_/C _3794_/C _3793_/A _3793_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_192_639 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_118_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5532_ _5540_/S _5541_/B _5532_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_191_149 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_9_csclk _6659_/CLK _6601_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_5463_ _5471_/S hold17/X _5463_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_4414_ _4459_/B _4579_/A _4542_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_5394_ VGND VPWR _5399_/S _5526_/A1 hold363/X _5394_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_132_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7133_ _7133_/Q _7137_/CLK _7133_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__dfxtp_1 X_4345_ _4347_/C _4661_/A _4631_/D _4633_/B _4357_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_113_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_59_528 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7064_ _7064_/D VPWR _7064_/Q fanout477/X _7067_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_4276_ VGND VPWR _4279_/S _5534_/A1 hold421/X _4276_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_100_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6015_ _6899_/Q _5976_/C _6015_/X _6827_/Q _5971_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3227_ _6792_/Q _3227_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_82_575 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6917_ _6917_/Q fanout477/X _6917_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_52_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_642 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6848_ _6848_/Q fanout482/X _6848_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_22_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_167_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6779_ _6779_/Q fanout473/X _6779_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_183_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_347 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_109_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_136_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_547 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold370 _5268_/X _6836_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold381 _6796_/Q hold381/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold392 _5237_/X _6809_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_303 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_104_463 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_314 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_77_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_723 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_92_339 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1070 _5377_/X _6933_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1081 _7082_/Q _5545_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1092 _5536_/X _7074_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_73_553 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_60_214 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_14_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_13_185 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_466 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_499 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_115_739 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_142_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_114_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_107_290 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4130_ VGND VPWR _4132_/S _6355_/A1 hold952/X _4130_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_444 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4061_ VGND VPWR _4067_/S _4060_/X _4061_/A0 _4061_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_49_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_83_328 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_91_350 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_288 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_51_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4963_ _4963_/Y _4963_/B _4963_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_6702_ _6702_/D VPWR _6702_/Q fanout450/X _7155_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3914_ VGND VPWR _3875_/B _3837_/B _3875_/X _6487_/D _6488_/Q VGND VPWR sky130_fd_sc_hd__a2bb2o_1 X_4894_ _4518_/C _5034_/B _4631_/Y _4689_/A _5085_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_149_124 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6633_ _6633_/Q fanout469/X _6633_/D _6659_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_149_146 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3845_ VGND VPWR _3845_/S hold33/A _3288_/Y _3845_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_20_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_22_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_165_628 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_164_105 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6564_ _6564_/Q _6383_/A _6564_/D _6674_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3776_ _6994_/Q _5445_/A _3776_/X input20/X _3367_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_138_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_118_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5515_ VGND VPWR hold87/A hold667/X _5515_/A0 _5515_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6495_ _7186_/A fanout478/X _6495_/D _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_173_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_205 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5446_ VGND VPWR _5453_/S _5524_/A1 _5446_/A0 _5446_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_172_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5377_ VGND VPWR _5381_/S _5545_/A1 _5377_/A0 _5377_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_87_601 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_7116_ _7116_/Q fanout447/X _7116_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_59_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4328_ VPWR VGND _4328_/A _4333_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_113_293 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_87_656 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7047_ _7047_/D VPWR _7047_/Q fanout457/X _7049_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_4259_ VGND VPWR _4261_/S _5544_/A1 hold642/X _4259_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_27_266 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_55_597 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_43_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_179_25 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_23_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_10_166 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_155_138 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_6_126 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_163_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_95 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_2_365 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_77_100 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_78_645 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_77_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_77_199 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_80_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_575 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_73_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_18_288 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_709 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_33_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_33_225 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_409 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_159_411 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_422 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_74_csclk _6747_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_41_291 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3630_ _3638_/A _4044_/A _6789_/Q _6483_/Q _5211_/A VGND VPWR _3629_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_147_639 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3561_ _3565_/B _5154_/A _6934_/Q _6746_/Q _5373_/A VGND VPWR _3560_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5300_ VGND VPWR _5300_/S _5513_/A1 hold606/X _5300_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_52_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6280_ _6664_/Q _5976_/B _6280_/X _6714_/Q _5971_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3492_ _4208_/A _3562_/A _3814_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_5231_ VGND VPWR _5237_/S _5543_/A1 hold537/X _5231_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_170_686 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_142_377 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5162_ VGND VPWR _5163_/S _6353_/A1 _5162_/A0 _5162_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xclkbuf_leaf_12_csclk _6671_/CLK _6601_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4113_ VGND VPWR hold38/X _5509_/A1 hold692/X _4113_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5093_ _4496_/Y _4672_/B _4456_/Y _5093_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_84_615 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4044_ VPWR VGND _4044_/A _4049_/S _6352_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_83_136 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_83_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_27_csclk _7081_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_52_501 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_24_236 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5995_ _7055_/Q _5954_/X _5995_/X _6898_/Q _5976_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XPHY_209 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_52_578 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4946_ _4947_/B _4946_/X _4947_/A _4947_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__and3_2 XFILLER_52_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_33_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_177_241 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4877_ _4877_/X _4877_/C _4877_/A _4877_/B _4877_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_6616_ _6616_/D VPWR _6616_/Q fanout469/X _6655_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3828_ _3828_/Y _3828_/A _3828_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 X_6547_ _6547_/Q fanout454/X _6547_/D _6654_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_3759_ _3760_/D _4238_/A input72/X _6631_/Q _3331_/Y VGND VPWR _3758_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_192_266 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_146_672 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_145_160 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_146_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6478_ _6478_/Q fanout448/X _6478_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_145_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5429_ VGND VPWR _5435_/S _5465_/A1 hold299/X _5429_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_161_664 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xoutput250 _3944_/Y pad_flash_csb_oeb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput261 _6736_/Q pll_dco_ena VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput272 _6428_/Q pll_trim[10] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput283 _6422_/Q pll_trim[20] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput294 _6441_/Q pll_trim[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_58_36 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_26 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_58_69 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_62_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_15_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_188_506 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_729 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_90_67 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_129_628 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_200 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_497 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xwire355 VGND VPWR _3486_/A _3467_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xwire366 VGND VPWR _6050_/C _6049_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_99_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_183_266 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_99_65 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xclkbuf_1_1_1_wb_clk_i clkbuf_2_3_0_wb_clk_i/A clkbuf_1_1_1_wb_clk_i/A VGND VPWR VGND + VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_124_344 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_151_130 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_124_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_82 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_93_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_65_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_65_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_34_556 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4800_ _4673_/A _4902_/B _4616_/Y _4800_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_64_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5780_ _5787_/A _5928_/A2 _6832_/Q _6840_/Q _5635_/X VGND VPWR _5779_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_21_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4731_ _6720_/D _4730_/X _4538_/X _4683_/X _5006_/A _4731_/B2 VPWR VGND VGND VPWR + sky130_fd_sc_hd__o32a_1 XFILLER_30_740 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_583 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4662_ _4686_/B _4662_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_147_458 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6401_ VPWR VGND _6401_/X _6401_/B _6401_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3613_ _3620_/A _3367_/Y _6965_/Q input23/X _5409_/A VGND VPWR _3612_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4593_ _4920_/B _4593_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold903 _4333_/X _6719_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold914 _6845_/Q hold914/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6332_ _6644_/Q _6332_/A2 _6332_/X _6643_/Q _6332_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold925 _5416_/X _6968_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3544_ _6878_/Q _5310_/A _3544_/X _6719_/Q _4328_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold936 _6606_/Q hold936/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold947 _4156_/X _6564_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold958 _6687_/Q hold958/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold969 _4041_/X _6477_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6263_ _6264_/C _5975_/C _6463_/Q _6581_/Q _5945_/X VGND VPWR _6262_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_89_729 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3475_ _3475_/X _5238_/A _6919_/Q _6815_/Q _5355_/A VGND VPWR _3474_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_142_163 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5214_ VGND VPWR hold18/X hold6/X _5214_/A0 _5214_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_130_325 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6194_ _6200_/A _5975_/B _6680_/Q _6614_/Q _5934_/X VGND VPWR _6193_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_130_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1603 _7126_/Q _6203_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_604 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5145_ VPWR VGND _5147_/S _6352_/B _5145_/A VGND VPWR sky130_fd_sc_hd__and2_1 XFILLER_151_18 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5076_ VGND VPWR _5077_/C _5076_/B _5076_/A _5076_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_4027_ VGND VPWR hold68/X _6353_/A1 _4027_/A0 _4027_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_44_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_16 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_342 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5978_ _5978_/A _5981_/A _5979_/C _5978_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 X_4929_ _4928_/Y _4772_/A _4613_/Y _4673_/A _5002_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__o211a_1 XFILLER_166_723 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_21_773 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xmgmt_gpio_9_buff_inst mgmt_gpio_out[9] _3927_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_69_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_134_697 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_69_68 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_35_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_63_629 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_40 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_56_681 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_523 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_55_191 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_303 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_71_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_347 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_31_548 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_436 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_575 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_137_491 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_109_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_171_236 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_171_247 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_601 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3260_ VGND VPWR _3260_/S _3260_/A1 _3251_/A _7160_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_140_667 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3191_ _7042_/Q _3191_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_78_261 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_78_272 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_732 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_648 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_242 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_38_158 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6950_ _6950_/Q fanout476/X _6950_/D _7067_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5901_ _5906_/B _5663_/X _6607_/Q _6612_/Q _5648_/X VGND VPWR _5900_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_19_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6881_ _6881_/Q fanout473/X _6881_/D _7070_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_5832_ _5832_/X _5648_/X _6645_/Q _6604_/Q _5621_/X VGND VPWR _5831_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5763_ _6951_/Q _5637_/X _5763_/X _7031_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4714_ _4714_/X _4633_/B _4627_/A _4479_/Y _4619_/Y _4645_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__o311a_1 X_5694_ _7004_/Q _5625_/X _5694_/X _6876_/Q _5661_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_4645_ _4716_/A _4645_/B _4645_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_147_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_30_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_162_214 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_175_597 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold700 _6977_/Q hold700/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold711 _5406_/X _6959_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_146_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_190_556 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4576_ _4576_/Y _4576_/B _4965_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold722 _6800_/Q hold722/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold733 _4067_/X _6497_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold744 _6449_/Q hold744/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6315_ VGND VPWR _6315_/S _6315_/A1 _3410_/Y _7140_/D VGND VPWR sky130_fd_sc_hd__mux2_1 Xhold755 _5158_/X _6745_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3527_ _6942_/Q _5382_/A _3527_/X _6790_/Q _5211_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_190_589 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold766 _6782_/Q hold766/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_115_163 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold777 _4042_/X _6478_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold788 _6887_/Q hold788/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_548 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold799 _5324_/X _6886_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6246_ _6467_/Q _5937_/X _6246_/X _6627_/Q _5975_/D VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3458_ input17/X _3358_/Y _3458_/X _6439_/Q _3372_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_76_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6177_ _6176_/X _6793_/Q _6177_/X _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 Xhold1400 _7031_/Q _5487_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3389_ _3392_/C _3365_/Y _6929_/Q input10/X _5364_/A VGND VPWR _3386_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1411 _7173_/A _5173_/B1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1422 _6585_/Q hold1422/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1433 _7140_/Q _6315_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5128_ _5126_/X _5123_/Y _5142_/A _5142_/C _5129_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_84_220 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_57_445 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1444 _6624_/Q _3963_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_147 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1455 _3642_/X _6730_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1466 _3989_/X _6433_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_55_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1477 _6734_/Q _3413_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_478 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1488 _6636_/Q _6641_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5059_ _5059_/X _5058_/X _5122_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_1 XFILLER_84_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_48 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1499 _3911_/X _6486_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_25_320 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_53_684 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_172 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_13_548 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_138_222 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_178_391 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_756 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_193_383 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_136_40 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_122_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_96_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_48_412 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold60 hold60/A hold60/X VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_75_231 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold71 hold71/A hold71/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_29_93 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold82 hold82/A hold82/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_48_467 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold93 hold93/A hold93/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_48_489 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_35_139 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_312 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_189_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_155 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_345 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_188_166 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_356 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_188_177 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_370 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_381 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_117_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_6_20 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4430_ _5068_/A _4430_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XANTENNA_2 _5190_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_6_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_172_567 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_172_589 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_461 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4361_ VPWR VGND _4685_/A _4489_/A _4911_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_6100_ VGND VPWR _6092_/X _6100_/C _6094_/X _6100_/X _6301_/C VGND VPWR sky130_fd_sc_hd__and4bb_2 X_3312_ hold46/X _3454_/A hold26/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2b_4 X_7080_ _7080_/D VPWR _7080_/Q fanout479/X _7080_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_140_431 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4292_ VPWR VGND _4292_/A _4297_/S _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 X_6031_ _7004_/Q _5958_/X _6031_/X _6996_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_58_209 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3243_ _6487_/Q _3837_/C _3260_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 XFILLER_100_317 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_100_328 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_66_220 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3174_ _6763_/Q _3174_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_212 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6933_ _6933_/Q fanout483/X _6933_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XPHY_18 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_81_256 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6864_ _6864_/Q fanout474/X _6864_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 X_5815_ VGND VPWR _5815_/X _5667_/X _5813_/X _6817_/Q _5814_/X VGND VPWR sky130_fd_sc_hd__a211o_1 X_6795_ _6795_/Q _6795_/D VPWR fanout456/X _6963_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 XFILLER_22_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5746_ _5746_/X _5652_/B _6998_/Q _6918_/Q _5643_/X VGND VPWR _5651_/Y VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_41_39 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_148_553 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_157_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_163_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5677_ _6795_/Q _5905_/A2 _5677_/X _6803_/Q _5660_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_135_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_136_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4628_ _4628_/Y _4661_/A _4716_/A _4653_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 XFILLER_190_331 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold530 _4207_/X _6608_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold541 _6875_/Q hold541/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4559_ VGND VPWR _4559_/X _4559_/B _5088_/B _4721_/A VGND VPWR sky130_fd_sc_hd__and3_1 Xhold552 _5303_/X _6867_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_312 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold563 _4177_/X _6582_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_9_8 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold574 _6439_/Q hold574/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_173_27 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_104_634 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_104_645 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold585 _5462_/X _7009_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold596 _6562_/Q hold596/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_656 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_144 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_106_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6229_ VGND VPWR _6279_/S _6228_/X _6229_/A0 _7128_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_66_25 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold1230 _5497_/X _7039_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1241 _6710_/Q _4323_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_551 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1252 _4233_/X _6625_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1263 _6480_/Q _4045_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_584 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1274 _4317_/X _6705_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1285 _6609_/Q _4209_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1296 _4203_/X _6604_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_72_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_167_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_72_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_103 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_637 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_186 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_40_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_185_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_180 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_331 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_83 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_154_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_72 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_134_280 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_95_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_93 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput150 VGND VPWR _6330_/A2 wb_dat_i[26] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput161 VGND VPWR _6345_/B1 wb_dat_i[7] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_48_253 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_735 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_17_651 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3930_ VGND VPWR _6400_/B _6734_/Q _6499_/Q _3930_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_51_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_470 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_183 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3861_ VGND VPWR _3861_/B _6409_/D _3861_/A VGND VPWR sky130_fd_sc_hd__xnor2_1 XFILLER_189_486 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5600_ _5981_/A _5600_/A _7102_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 X_6580_ _6580_/D VPWR _6580_/Q fanout452/X _6677_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3792_ _3793_/D _5182_/S _6442_/Q _7087_/Q _3999_/A VGND VPWR _3791_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_192_607 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_188_90 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_164_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5531_ VGND VPWR _5531_/S hold22/X hold176/X _5531_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_145_501 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_117_203 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_117_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5462_ VGND VPWR _5462_/S _5513_/A1 hold584/X _5462_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_4413_ _4549_/A _4579_/A _4413_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 X_5393_ VGND VPWR _5399_/S hold13/X _5393_/A0 hold10/A VGND VPWR sky130_fd_sc_hd__mux2_1 X_7132_ _7132_/Q fanout487/X _7132_/D _7150_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_4344_ _4352_/B _4631_/D _4357_/B _4661_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_1 XFILLER_141_740 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_291 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_86_304 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7063_ _7063_/D VPWR _7063_/Q fanout463/X _7063_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_98_164 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4275_ VGND VPWR _4279_/S hold667/X _4275_/A0 _4275_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_101_626 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6014_ _6014_/C _6014_/Y _6014_/A _6014_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 XFILLER_100_136 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3226_ _6919_/Q _3226_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_27_459 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_82_565 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_14_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6916_ _6916_/Q fanout478/X _6916_/D _7081_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_54_289 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_749 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_23_654 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6847_ _6847_/Q fanout474/X _6847_/D _6951_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_168_626 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6778_ _6778_/Q fanout473/X _6778_/D _6969_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_167_147 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_22_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5729_ _7021_/Q _5619_/X _5729_/X _6861_/Q _5663_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_183_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_670 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_182_106 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_108_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_136_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_108_236 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_15 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_191_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold360 _5178_/X _6759_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold371 _7065_/Q hold371/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold382 _5223_/X _6796_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold393 _7180_/A hold393/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_77_337 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_77_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1060 _5341_/X _6901_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1071 _6821_/Q _5251_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1082 _5545_/X _7082_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1093 _6748_/Q _5162_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XANTENNA_200 _4102_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_60_226 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_186_401 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_41_440 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_142 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_473 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_9_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_309 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_158_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_174_629 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_158_71 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_386 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_570 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_635 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_96_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4060_ VGND VPWR hold37/X _5546_/A1 hold812/X _4060_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_456 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_83_307 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_49_573 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_489 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_76_392 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_234 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_91_362 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_470 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4962_ _4950_/X _4962_/B _4963_/B _4962_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__and3b_1 XFILLER_51_237 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6701_ _6701_/Q fanout449/X _6701_/D _7155_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3913_ _6488_/D _3868_/S _6488_/Q _3867_/B _3164_/Y _3165_/Y VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 X_4893_ _4893_/A _5034_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_6632_ _6632_/Q _6632_/D VPWR fanout454/X _6632_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3844_ hold70/A _6412_/Q _3845_/S _3854_/S hold32/A VPWR VGND VGND VPWR sky130_fd_sc_hd__nand4_1 XFILLER_149_169 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6563_ _6563_/Q _6383_/A _6563_/D _6674_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3775_ _3782_/A _5274_/A _6922_/Q _6842_/Q _5364_/A VGND VPWR _3774_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_164_117 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_192_426 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5514_ hold87/A _5541_/B hold86/X VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_157_191 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_118_545 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6494_ _7185_/A fanout478/X _6494_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_118_589 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5445_ _5453_/S hold17/X _5445_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_173_695 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_105_217 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5376_ VGND VPWR _5381_/S _5484_/A1 hold864/X _5376_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_154_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_120_209 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7115_ _7115_/Q fanout447/X _7115_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_87_613 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4327_ VGND VPWR _4327_/S _5546_/A1 hold826/X _4327_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7046_ _7046_/Q fanout483/X _7046_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_86_134 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4258_ VGND VPWR _4261_/S _5534_/A1 hold427/X _4258_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_28_713 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_170_17 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_86_178 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3209_ _6901_/Q _3209_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 X_4189_ VGND VPWR _4195_/S _4189_/A1 _3762_/Y _6592_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_27_245 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_27_256 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_513 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_43_738 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_473 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_456 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_628 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_459 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_12_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_170_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_163_161 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_128_85 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_88_56 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold190 _6830_/Q hold190/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_120_721 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_132_581 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_78_668 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_8_csclk _6769_/CLK _6601_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_160_94 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_61_535 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_33_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_473 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_41_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_81 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_186_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_117 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3560_ _6674_/Q _4274_/A _3560_/X _6549_/Q _4133_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_155_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_115_515 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3491_ _3504_/A _5274_/A input56/X _6846_/Q _5193_/A VGND VPWR _3490_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_6_683 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_185_80 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5230_ VGND VPWR _5237_/S _5473_/A1 _5230_/A0 _5230_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5161_ _5161_/A _5190_/B hold16/X _5163_/S VGND VPWR VGND VPWR sky130_fd_sc_hd__and3_4 XFILLER_96_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4112_ VGND VPWR hold38/A hold6/X _4112_/A0 _4112_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_110_220 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5092_ VGND VPWR _5126_/B _5092_/B _5092_/A _5092_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_4043_ VGND VPWR _4043_/S _6357_/A1 hold533/X _4043_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_96_498 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_275 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_37_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_52_513 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5994_ _6000_/A _5973_/A _7063_/Q _6906_/Q _5934_/X VGND VPWR _5993_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_91_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4945_ _4945_/Y _4930_/X _5069_/A _4944_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21boi_1 X_4876_ _4877_/D _4523_/Y _4875_/X _4864_/X _4700_/Y _4623_/Y VPWR VGND VGND VPWR + sky130_fd_sc_hd__o2111a_1 X_6615_ _6615_/Q fanout455/X _6615_/D _7036_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3827_ VGND VPWR _3827_/C _3798_/X _3828_/B _3827_/D _3827_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_192_223 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6546_ _6546_/Q fanout452/X _6546_/D _6677_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3758_ _6891_/Q _5328_/A _3758_/X _7080_/Q _5541_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_180_407 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_145_150 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6477_ _6477_/D VPWR _6477_/Q fanout450/X _6707_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 X_3689_ _6948_/Q _5391_/A _3689_/X _6956_/Q _5400_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5428_ VGND VPWR _5435_/S _5524_/A1 _5428_/A0 _5428_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_106_559 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xoutput240 _3919_/X mgmt_gpio_out[36] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput251 _3951_/X pad_flash_io0_do VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput262 _6737_/Q pll_div[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput273 _6429_/Q pll_trim[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput284 _6423_/Q pll_trim[21] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5359_ VGND VPWR _5363_/S _5545_/A1 _5359_/A0 _5359_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput295 _6426_/Q pll_trim[8] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_160_197 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_605 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_114_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7029_ _7029_/Q fanout483/X _7029_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_59_189 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_68_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_55_351 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_74_58 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_83_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_598 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_70_321 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_343 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_70_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_43_579 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_754 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_168_231 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_23_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_90_79 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_168_253 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_184_713 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_156_404 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_23_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_7_403 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire356 VGND VPWR _3447_/C _3446_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_137_640 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_139_73 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xwire367 _5748_/Y wire367/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_137_673 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_151_142 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_356 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_141 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_389 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_78_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_65_148 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_81_608 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_19_576 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_74_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_73_181 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_73_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_34_568 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_20 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4730_ _4589_/Y _5039_/A _4729_/X _4730_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 X_4661_ VPWR VGND _4661_/A _4686_/B _4661_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_187_595 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_175_746 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6400_ VPWR VGND _6400_/X _6400_/B _6400_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_3612_ _6445_/Q _3999_/A _3612_/X _6713_/Q _4322_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_4592_ _4920_/B _4565_/X _6643_/Q _4601_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_134_109 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_174_278 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold904 _6781_/Q hold904/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6331_ VGND VPWR _6346_/S _6331_/A1 _6330_/X _7143_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3543_ _4328_/A _3543_/A _3577_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 Xhold915 _5278_/X _6845_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold926 _7085_/Q hold926/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold937 _4205_/X _6606_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold948 _6472_/Q hold948/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold959 _4295_/X _6687_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6262_ _6668_/Q _5938_/X _6262_/X _6708_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3474_ _3474_/X _3999_/A _6927_/Q _6447_/Q _5364_/A VGND VPWR _3473_/X VGND VPWR + sky130_fd_sc_hd__a221o_2 X_5213_ VGND VPWR hold18/X _5465_/A1 hold251/X _5213_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_143_698 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6193_ _6700_/Q _5971_/A _6193_/X _6470_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_142_197 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_97_741 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5144_ VGND VPWR _6726_/D _5142_/Y _5143_/Y _5123_/A _5136_/X VGND VPWR sky130_fd_sc_hd__a211o_1 XFILLER_130_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5075_ _4456_/Y _5076_/C _4846_/B _4768_/A _4428_/Y _4689_/B VGND VPWR VGND VPWR + sky130_fd_sc_hd__o221a_1 X_4026_ VPWR VGND hold67/X hold68/A _5490_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_71_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_52_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_52_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5977_ _6301_/C _5977_/A _5977_/B _5977_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_4 X_4928_ _4928_/Y _4984_/B _4928_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_21_752 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_212 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_166_735 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4859_ _4689_/A _4947_/C _4500_/A _5023_/C VPWR VGND VGND VPWR sky130_fd_sc_hd__a21o_1 XFILLER_176_16 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_125_109 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_119_673 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_118_161 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6529_ _6529_/Q fanout478/X hold55/X _6990_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_161_484 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_121_337 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_0_623 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_73_csclk _7155_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_87_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_56_693 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_31_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_359 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xclkbuf_leaf_11_csclk _6674_/CLK _6601_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_184_521 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_8_723 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_157_768 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_278 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xclkbuf_leaf_26_csclk _7051_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_140_613 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3190_ _7050_/Q _3190_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_38_104 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_284 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_221 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_93_254 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_90 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5900_ _6468_/Q _5619_/X _5900_/X _5899_/Y _5652_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_93_298 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_81_449 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6880_ _6880_/Q fanout482/X _6880_/D _7069_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_34_321 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_315 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5831_ _6614_/Q _5628_/X _5831_/X _6625_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_34_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_348 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5762_ _5762_/X _5638_/X _6943_/Q _6959_/Q _5632_/X VGND VPWR _5759_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4713_ _4576_/Y _4711_/X _5041_/B _4712_/X _4713_/X VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 X_5693_ VGND VPWR _6279_/S _5692_/X _5713_/A0 _5693_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_175_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_768 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4644_ _4644_/Y _4716_/A _4644_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_4 Xhold701 _5426_/X _6977_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4575_ _4574_/A _4551_/A _4575_/Y _4574_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_162_226 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold712 _6943_/Q hold712/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold723 _5227_/X _6800_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold734 _6581_/Q hold734/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6314_ VGND VPWR _6315_/S _6314_/A1 _3447_/Y _7139_/D VGND VPWR sky130_fd_sc_hd__mux2_1 X_3526_ _3538_/A _3981_/A _6798_/Q _6430_/Q _3326_/Y VGND VPWR _3525_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold745 _4007_/X _6449_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_505 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold756 _6458_/Q hold756/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold767 _5207_/X _6782_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold778 _6473_/Q hold778/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6245_ _6250_/B _5975_/B _6682_/Q _6616_/Q _5934_/X VGND VPWR _6244_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold789 _5325_/X _6887_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3457_ input8/X _3365_/Y _3457_/X input25/X _3367_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_103_337 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6176_ VPWR VGND _6176_/X _6168_/X _6176_/D _6176_/C _6226_/B VGND VPWR sky130_fd_sc_hd__and4b_2 XFILLER_162_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3388_ _3392_/B _3326_/Y input60/X _6801_/Q _5193_/A VGND VPWR _3385_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold1401 _6881_/Q _5318_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1412 _6576_/Q hold1412/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5127_ _5042_/Y _5142_/C _5043_/Y _4948_/B _4948_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 Xhold1423 _6590_/Q hold1423/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1434 _7135_/Q _6310_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1445 _3965_/X hold665/A VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_232 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_183_9 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1456 _6728_/Q _3764_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1467 _6440_/Q _3997_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5058_ _5058_/X _5058_/C _5058_/A _5122_/B _5058_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 Xhold1478 _6596_/Q _4193_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_55_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1489 _7122_/Q _6078_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_44_107 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4009_ VGND VPWR _4013_/S _6353_/A1 _4009_/A0 _4009_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_37_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_641 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_25_332 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_354 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_13_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_702 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_40_379 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_166_543 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_138_234 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_20_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_161_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_122_657 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_690 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold50 VPWR VGND hold50/X hold50/A VGND VPWR sky130_fd_sc_hd__buf_6 Xhold61 hold61/A hold61/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_152_51 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold72 hold72/A hold72/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_75_243 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold83 hold83/A hold83/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold94 VPWR VGND hold94/X hold94/A VGND VPWR sky130_fd_sc_hd__buf_6 XFILLER_44_630 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_188_123 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_324 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_360 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_31_368 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_371 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_382 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_117_429 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XANTENNA_3 _5346_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_6_65 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4360_ VGND VPWR _4360_/B _4489_/A _4359_/Y _4379_/B VGND VPWR sky130_fd_sc_hd__and3b_2 X_3311_ hold34/X hold35/A _3323_/B _3311_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 X_4291_ VGND VPWR _4291_/S _5519_/A1 hold186/X _4291_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_140_443 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_193_91 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6030_ _6860_/Q _5943_/X _6030_/X _6916_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_3242_ _3837_/C _6488_/Q _6485_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_79_571 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3173_ _6813_/Q _3173_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_232 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_66_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_725 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_107 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6932_ _6932_/Q fanout476/X _6932_/D _7067_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_47_490 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_19 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_19_192 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6863_ _6863_/Q fanout465/X _6863_/D _6865_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_35_685 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5814_ _6449_/Q _5614_/X _5814_/X _6913_/Q _5814_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_179_156 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6794_ _6794_/D VPWR _6794_/Q fanout458/X _7006_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_10_508 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_167_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_10_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_148_510 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5745_ _5748_/C _5664_/X hold79/A _6926_/Q _5614_/X VGND VPWR _5738_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_148_565 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5676_ _5681_/B _5625_/X _6443_/Q _7003_/Q _5614_/X VGND VPWR _5675_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4627_ _4627_/B _4703_/B _4627_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_190_343 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_557 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold520 _4289_/X _6682_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold531 _6689_/Q hold531/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4558_ _4721_/A _4563_/A _5088_/C _4484_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_190_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold542 _5312_/X _6875_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_150_207 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold553 _6746_/Q hold553/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold564 _6741_/Q hold564/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold575 _3996_/X _6439_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3509_ _3523_/A _4250_/A _6484_/Q _6654_/Q _4044_/A VGND VPWR _3508_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_143_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_173_39 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold586 _6438_/Q hold586/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4489_ _4490_/B _4489_/B _4489_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold597 _4154_/X _6562_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_104_668 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_134 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6228_ VGND VPWR _6303_/S _6227_/X _7127_/Q _6228_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_106_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6159_ _7009_/Q _5958_/X _6159_/X _7001_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1220 _5506_/X _7047_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1231 _7071_/Q _5533_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_66_59 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1242 _4323_/X _6710_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1253 _6778_/Q _5203_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1264 _4045_/X _6480_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1275 _6695_/Q _4305_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_122_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_85_596 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1286 _4209_/X _6609_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_57_298 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1297 hold1589/X _4119_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_38_490 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_26_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_25_184 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_31_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_534 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_181_387 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_421 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_305 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_163_50 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xinput140 VGND VPWR _6326_/A2 wb_dat_i[17] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_95_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput151 VGND VPWR _6332_/A2 wb_dat_i[27] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput162 VGND VPWR _6324_/B1 wb_dat_i[8] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_48_243 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_48_265 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_17_663 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3860_ _3861_/B _3860_/B hold81/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_32_655 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3791_ _3791_/X _5164_/B input34/X _3365_/Y _6750_/Q _3355_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a32o_1 XFILLER_176_148 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_190 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5530_ VGND VPWR _5531_/S _5548_/A1 hold938/X _5530_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_8_350 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5461_ VGND VPWR _5461_/S hold99/X hold164/X _5461_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7200_ VGND VPWR _7200_/X _7200_/A VGND VPWR sky130_fd_sc_hd__clkbuf_1 X_4412_ _4579_/A _4959_/A _4551_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 X_5392_ VGND VPWR _5399_/S _5524_/A1 _5392_/A0 _5392_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_7131_ _7131_/Q fanout459/X _7131_/D _7131_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4343_ _4607_/A _4753_/A _4563_/A _4556_/A _4357_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__o211a_2 XFILLER_141_752 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_7062_ _7062_/Q fanout483/X _7062_/D _7086_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4274_ VPWR VGND _4274_/A _4279_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_98_176 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6013_ _6014_/C _5975_/C _6979_/Q _6835_/Q _5945_/X VGND VPWR _6012_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_101_638 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_98_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3225_ _6659_/Q _3225_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_27_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_82_511 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_94_382 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_54_213 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_533 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6915_ _6915_/D VPWR _6915_/Q fanout463/X _6981_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_35_471 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6846_ _6846_/Q fanout476/X _6846_/D _7051_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_50_441 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_22_132 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_23_666 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_6777_ _7196_/A fanout483/X _6777_/D _6777_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3989_ VGND VPWR _3989_/S _5513_/A1 hold557/X _3989_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_22_187 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_148_340 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5728_ _5727_/X _6973_/Q _5722_/X _5723_/X _5728_/X _5634_/X VGND VPWR VGND VPWR + sky130_fd_sc_hd__a2111o_2 XFILLER_6_309 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_176_682 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_163_310 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5659_ _6834_/Q _5928_/A2 _5659_/X _6882_/Q _5910_/B1 VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_136_557 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_108_248 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_191_663 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_505 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xhold350 _4078_/X _6502_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_117_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold361 _6628_/Q hold361/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_116_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold372 _5526_/X _7065_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_2_559 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold383 _6523_/Q hold383/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold394 _4095_/X _6514_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_273 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_77_349 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1050 _5277_/X _6844_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1061 _6938_/Q _5383_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1072 _5251_/X _6821_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1083 _7029_/Q _5485_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_85_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_46 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_133_97 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1094 _5162_/X _6748_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_93_57 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XANTENNA_201 _5614_/X VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_73_588 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_60_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_26_95 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_14_655 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_413 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_13_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_485 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_41_496 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_9_169 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_154_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_123_752 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_174_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_11 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_95_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_150_582 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_295 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_96_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_67_80 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_511 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_585 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_190_92 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_37_747 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_64_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_36_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_91_374 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_728 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4961_ VGND VPWR _5088_/D _4957_/Y _4962_/C _5039_/D _5046_/B VGND VPWR sky130_fd_sc_hd__and4b_1 XFILLER_17_482 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6700_ _6700_/Q fanout449/X _6700_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3912_ _6485_/Q _3912_/B1 _3912_/A1 _3875_/B _6489_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__a31o_1 XFILLER_51_249 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4892_ _4892_/B _4893_/A _4892_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_149_104 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6631_ _6631_/Q fanout454/X _6631_/D _6632_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3843_ _3854_/S hold24/A hold62/A hold81/A hold44/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 XFILLER_177_468 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6562_ _6562_/Q _6562_/D VPWR _6383_/A _6674_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_2 X_3774_ _6818_/Q _5247_/A _3774_/X _6690_/Q _4298_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 XFILLER_192_438 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5513_ VGND VPWR _5513_/S _5513_/A1 hold650/X _5513_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_6493_ _7184_/A fanout484/X _6493_/D _6527_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_118_557 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_133_505 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5444_ VGND VPWR _5444_/S _5513_/A1 hold685/X _5444_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_133_527 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5375_ VGND VPWR _5381_/S _5465_/A1 hold295/X _5375_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_99_441 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7114_ _7114_/Q fanout448/X _7114_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_99_463 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4326_ VGND VPWR _4327_/S _5518_/A1 hold303/X _4326_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7045_ _7045_/Q fanout485/X _7045_/D _7085_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_4257_ VGND VPWR _4261_/S hold667/X _4257_/A0 _4257_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_59_349 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3208_ _6909_/Q _3208_/Y VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_170_29 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4188_ VGND VPWR _4195_/S _4188_/A1 _3828_/Y _6591_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_55_522 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_67_393 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_34 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_11_603 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6829_ _6829_/Q fanout474/X _6829_/D _6967_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_11_647 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_50_293 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_11_658 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_682 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_148_170 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_12_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_128_42 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_164_685 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_128_75 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_5_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_68 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold180 _6862_/Q hold180/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_105_763 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_603 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold191 _5261_/X _6830_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_78_636 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_77_124 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_120_744 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_93_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_92_116 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_46_533 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_246 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_73_385 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_187_700 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_159_435 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_187_755 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_169_71 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_146_129 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_186_298 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_139_181 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_167_490 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_652 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_10_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_170_600 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3490_ _6902_/Q _5337_/A _3490_/X _6629_/Q _4232_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_115_527 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_154_162 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_6_695 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_5_194 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5160_ VGND VPWR _5160_/S _5469_/A1 hold545/X _5160_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_38_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_111_722 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_4111_ VGND VPWR hold38/X _5543_/A1 hold622/X _4111_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5091_ _4584_/A _5090_/Y _5092_/C _5043_/B VPWR VGND VGND VPWR sky130_fd_sc_hd__a21oi_1 XFILLER_96_455 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_110_232 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_96_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4042_ VGND VPWR _4043_/S _6356_/A1 hold776/X _4042_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_56_319 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_49_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_92_661 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_52_525 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5993_ _6978_/Q _5945_/X _5993_/X _6994_/Q _5978_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_24_249 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4944_ VGND VPWR _4944_/X _4944_/B _4944_/A _4944_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_17_290 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4875_ VGND VPWR _4875_/X _5034_/A _4875_/A _4875_/C VGND VPWR sky130_fd_sc_hd__and3_1 XFILLER_177_254 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6614_ _6614_/Q fanout455/X _6614_/D _7036_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 X_3826_ _3826_/D _3826_/C _3826_/Y _3826_/A _3826_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_165_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_20_455 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_137_129 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_192_235 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_165_449 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6545_ _6545_/Q fanout445/X _6545_/D _6709_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_2 XFILLER_158_490 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3757_ _3760_/C _4038_/A input21/X _6476_/Q _3367_/Y VGND VPWR _3756_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_146_641 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_118_365 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6476_ _6476_/Q _3946_/B _6476_/D _6746_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 X_3688_ _3688_/C _3699_/C _3688_/A _3688_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_1 Xoutput230 _7192_/X mgmt_gpio_out[27] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5427_ _5435_/S hold17/X _5427_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 Xoutput241 _3918_/X mgmt_gpio_out[37] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput252 _3948_/A pad_flash_io0_ieb VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput263 _6738_/Q pll_div[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput274 _6430_/Q pll_trim[12] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 Xoutput285 _6424_/Q pll_trim[22] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 X_5358_ VGND VPWR _5363_/S _5484_/A1 hold874/X _5358_/X VGND VPWR sky130_fd_sc_hd__mux2_1 Xoutput296 _6427_/Q pll_trim[9] VGND VPWR VGND VPWR sky130_fd_sc_hd__buf_12 XFILLER_59_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4309_ VGND VPWR _4309_/S _6357_/A1 hold578/X _4309_/X VGND VPWR sky130_fd_sc_hd__mux2_1 X_5289_ VGND VPWR _5291_/S _5469_/A1 hold702/X _5289_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_75_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_7028_ _7028_/Q fanout479/X _7028_/D _7080_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_47_319 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_28_511 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_28_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_706 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_55_363 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_130_21 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_83_694 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_70_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_169_766 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_23_293 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_156_416 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_184_725 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_7_415 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_156_438 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xwire346 _3538_/Y _3581_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_2 XFILLER_7_437 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xwire357 VGND VPWR wire357/X _3408_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_137_652 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xwire379 VGND VPWR _5977_/C _5976_/Y VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_152_611 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_136_173 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_152_655 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_155_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_62 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_151_154 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_155_95 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_78_433 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_197 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_78_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_93_414 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_48_60 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_46_341 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_32 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_147_405 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_4660_ _4660_/X _4660_/C _4660_/A _4660_/B _4660_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__and4_1 X_3611_ _3611_/D _3611_/C _3611_/Y _3611_/A _3611_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_4591_ _4601_/A _4664_/B _4591_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_190_717 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6330_ _6330_/X _6330_/B1 _6644_/Q _6643_/Q _6330_/A2 VGND VPWR _6329_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 Xhold905 _5206_/X _6781_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3542_ _4127_/A _3546_/A _3714_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_4 XFILLER_143_611 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold916 _6861_/Q hold916/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_128_696 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold927 _5548_/X _7085_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold938 _7069_/Q hold938/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold949 _4035_/X _6472_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6261_ _6264_/B _5965_/X _6453_/Q _6548_/Q _5947_/X VGND VPWR _6260_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_3473_ _7007_/Q _3370_/Y _3473_/X _3450_/X _5182_/S VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 X_5212_ VGND VPWR hold18/X _5524_/A1 _5212_/A0 _5212_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_103_519 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_88_219 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6192_ _6192_/X _5960_/X _6560_/Q _6670_/Q _5953_/X VGND VPWR _6191_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_5143_ _5143_/Y _5143_/B _5143_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 XFILLER_57_617 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5074_ VGND VPWR _5103_/C _5074_/B _5074_/A _5074_/C VGND VPWR sky130_fd_sc_hd__and3_1 X_4025_ VGND VPWR _4025_/S hold60/X hold213/X _4025_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_84_458 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_65_650 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_44_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_64_182 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5976_ _5976_/D _5976_/C _5976_/Y _5981_/A _5976_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 XFILLER_52_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_12_208 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_12_219 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4927_ _4995_/B _4542_/B _4771_/A _4562_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_21_764 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4858_ _4858_/X _4482_/B _4529_/Y _4694_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 XFILLER_119_630 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_3809_ _3817_/A _4151_/A _6930_/Q _6560_/Q _5373_/A VGND VPWR _3808_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_20_285 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4789_ _4620_/Y _4789_/X _4701_/Y _4672_/A _4710_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__o22a_1 X_6528_ _6528_/Q fanout478/X _6528_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 Xclkbuf_leaf_7_csclk _7038_/CLK clkbuf_3_1_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_6459_ _6459_/Q fanout448/X _6459_/D _6704_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_134_677 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_125_21 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_121_349 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_0_657 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_679 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_18_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_18_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_141_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_90_439 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_71_653 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_16_569 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_70_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_129_405 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_184_500 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_129_449 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_757 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_124_121 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_98_506 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_625 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_59_70 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_94_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_39_617 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_78_296 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_47_650 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_93_277 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_46_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5830_ _6480_/Q _5643_/X _5830_/X _6665_/Q _5664_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_34_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5761_ _5761_/X _5905_/A2 _6847_/Q _6799_/Q _5902_/A2 VGND VPWR _5760_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 X_4712_ _4712_/X _4691_/A _4710_/Y _4673_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21a_1 X_5692_ VGND VPWR _6303_/S _5691_/X _7106_/Q _5692_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_175_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4643_ _4643_/Y _4661_/B _4653_/C VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 X_4574_ _4574_/Y _4574_/B _4574_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_1 Xhold702 _6855_/Q hold702/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold713 _5388_/X _6943_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold724 _6688_/Q hold724/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6313_ VGND VPWR _6315_/S _6313_/A1 _3486_/Y _7138_/D VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_143_430 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 Xhold735 _4176_/X _6581_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3525_ input16/X _3358_/Y _3525_/X _6608_/Q _4202_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold746 _6825_/Q hold746/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold757 _4018_/X _6458_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_89_517 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold768 _7154_/Q hold768/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_305 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold779 _4036_/X _6473_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6244_ _6702_/Q _5971_/A _6244_/X _6472_/Q _5979_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 X_3456_ _6991_/Q _5436_/A _3456_/X _7044_/Q hold76/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_115_198 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_6175_ _6175_/D _6175_/C _6176_/D _6175_/A _6175_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor4_1 X_3387_ _3392_/A _5373_/A _7001_/Q _6937_/Q _5445_/A VGND VPWR _3382_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_97_561 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1402 _6468_/Q _4030_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1413 _6577_/Q hold1413/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5126_ VGND VPWR _5126_/X _5126_/B _5126_/A _5126_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1424 _7139_/Q hold1424/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1435 _6570_/Q _4164_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_111_393 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold1446 _7133_/Q _6308_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1457 _3764_/X _6728_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1468 _6577_/Q _4171_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5057_ VGND VPWR _5126_/A _5057_/B _5057_/A _5057_/C VGND VPWR sky130_fd_sc_hd__and3_1 Xhold1479 _6585_/Q _4181_/A1 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_84_288 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4008_ VPWR VGND _4008_/A _4013_/S _4322_/B VGND VPWR sky130_fd_sc_hd__and2_2 XFILLER_37_193 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_53_653 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_52_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_52_185 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_5959_ _5959_/X _5981_/A _5959_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_185_308 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_139_714 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_187_27 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_21_561 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_166_555 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_153_238 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_237 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_105_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_53 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_20_97 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_121_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_122_669 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_76_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_29_51 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 Xhold40 hold40/A hold40/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold51 hold51/A hold51/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold62 hold62/A hold62/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold73 hold73/A hold73/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_152_63 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_75_255 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold84 VPWR VGND hold84/X hold84/A VGND VPWR sky130_fd_sc_hd__buf_6 Xhold95 hold95/A hold95/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_152_85 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_75_299 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_16_300 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_71_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_350 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_361 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_372 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_383 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_169_393 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_8_543 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_129_257 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_157_599 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XANTENNA_4 _5310_/A VGND VPWR VPWR VGND sky130_fd_sc_hd__diode_2 XFILLER_6_77 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_113_603 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_3310_ _5310_/A _3374_/A _3370_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_125_474 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4290_ VGND VPWR _4291_/S _5518_/A1 hold377/X _4290_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_98_336 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_3_281 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_3241_ _7168_/Q _3875_/C _7169_/Q VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_1 XFILLER_112_135 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_140_455 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_140_477 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_67_701 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_20_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_79_583 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_3172_ _6485_/Q _3867_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 XFILLER_66_244 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_66_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_82_737 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_26_119 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6931_ _6931_/D VPWR _6931_/Q fanout458/X _6963_/CLK VGND VGND VPWR sky130_fd_sc_hd__dfstp_1 XFILLER_81_225 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_35_642 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6862_ _6862_/Q fanout480/X _6862_/D _7079_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_4 XFILLER_34_141 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_179_113 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_50_601 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 X_5813_ _6969_/Q _5642_/X _5813_/X _6897_/Q _5666_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 XFILLER_62_494 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_6793_ _6793_/Q fanout459/X _6793_/D _7053_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_50_645 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_179_179 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_5744_ _5748_/B _5666_/X _6854_/Q _6894_/Q _5648_/X VGND VPWR _5743_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_148_533 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_5675_ _6995_/Q _5643_/X _5675_/X _7027_/Q _5645_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xclkbuf_leaf_72_csclk _6749_/CLK clkbuf_3_0_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 X_4626_ _4753_/B _4626_/B _4626_/Y VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold510 _4242_/X _6633_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_355 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold521 _6984_/Q hold521/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_4557_ _4557_/A _4967_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__inv_2 Xhold532 _4297_/X _6689_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold543 _7064_/Q hold543/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_190_377 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold554 _5159_/X _6746_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold565 _5153_/X _6741_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_3508_ _7006_/Q _3370_/Y _3508_/X _6689_/Q _4292_/A VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_2 Xhold576 _6961_/Q hold576/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_103_113 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_4488_ _4600_/B _4611_/B _4672_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand2_8 Xhold587 _3995_/X _6438_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold598 _7050_/Q hold598/X VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_131_444 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6227_ _6226_/X _6541_/Q _6227_/X _6226_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__o21ba_1 X_3439_ _3446_/A _5247_/A _6920_/Q _6824_/Q _5355_/A VGND VPWR _3438_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XFILLER_58_701 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_103_157 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 X_6158_ _6865_/Q _5943_/X _6158_/X _6921_/Q _5981_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 Xhold1210 _5221_/X _6794_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_112_691 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 Xhold1221 _6986_/Q _5437_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xclkbuf_leaf_10_csclk _6655_/CLK _6601_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 Xhold1232 _5533_/X _7071_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1243 _6655_/Q _4257_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_5109_ _5135_/A _5109_/Y _5109_/B _5135_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nand3_2 Xhold1254 _5203_/X _6778_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 X_6089_ _6089_/C _6089_/Y _6089_/A _6089_/B VGND VPWR VGND VPWR sky130_fd_sc_hd__nor3_2 Xhold1265 _6614_/Q _4215_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_45_417 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xhold1276 _4305_/X _6695_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1287 _6450_/Q _4009_/A0 VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 Xhold1298 _4119_/X _6532_/D VGND VPWR VGND VPWR sky130_fd_sc_hd__dlygate4sd3_1 XFILLER_82_37 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 Xclkbuf_leaf_25_csclk _7067_/CLK clkbuf_3_7_0_csclk/X VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_16 XFILLER_122_99 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_53_461 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_15_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_25_196 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_9_329 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_40_166 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_5_546 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_107_430 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_134_260 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_433 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_122_477 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 Xinput130 VGND VPWR _4337_/A wb_adr_i[9] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput141 VGND VPWR _6329_/A2 wb_dat_i[18] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput152 VGND VPWR _6335_/A2 wb_dat_i[28] VGND VPWR sky130_fd_sc_hd__clkbuf_1 Xinput163 VGND VPWR _6326_/B1 wb_dat_i[9] VGND VPWR sky130_fd_sc_hd__clkbuf_1 XFILLER_48_277 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_63_225 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_36_439 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_64_748 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_63_236 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_91_578 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_16_141 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_189_433 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_149_308 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_177_628 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_32_667 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_189_499 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_3790_ _3793_/C _5145_/A _6986_/Q _6735_/Q _5436_/A VGND VPWR _3789_/X VGND VPWR + sky130_fd_sc_hd__a221o_1 XPHY_180 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_191 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_5460_ VGND VPWR _5462_/S _5469_/A1 hold648/X _5460_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_117_238 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_6 XFILLER_184_193 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 X_4411_ VPWR VGND _4959_/A _4415_/A _4739_/A VGND VPWR sky130_fd_sc_hd__and2_1 X_5391_ _5399_/S _5505_/B _5391_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__and2_4 XFILLER_99_612 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_7130_ _7130_/Q fanout486/X _7130_/D _7130_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_172_388 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4342_ _4753_/B _4556_/A _4563_/A VGND VPWR VGND VPWR sky130_fd_sc_hd__nor2_8 XFILLER_98_100 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_141_720 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_99_656 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 X_7061_ _7061_/Q fanout483/X _7061_/D _7082_/CLK VGND VPWR VGND VPWR sky130_fd_sc_hd__dfrtp_1 XFILLER_140_241 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_4273_ VGND VPWR _4273_/S hold60/X hold227/X _4273_/X VGND VPWR sky130_fd_sc_hd__mux2_1 XFILLER_140_263 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 X_6012_ _6923_/Q _5938_/X _6012_/X _6955_/Q _5952_/X VPWR VGND VGND VPWR sky130_fd_sc_hd__a22o_1 .ends .subckt buff_flash_clkrst VPWR in_n[0] in_n[10] in_n[11] in_n[1] in_n[2] in_n[3] in_n[4] + in_n[5] in_n[6] in_n[7] in_n[8] in_n[9] in_s[0] in_s[1] in_s[2] out_n[0] out_n[1] + out_n[2] out_s[0] out_s[10] out_s[11] out_s[1] out_s[2] out_s[3] out_s[4] out_s[5] + out_s[6] out_s[7] out_s[8] out_s[9] VGND XBUF\[10\] out_s[7] in_n[7] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XBUF\[5\] out_s[2] in_n[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_3_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_27 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XBUF\[3\] out_s[0] in_n[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_1_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_0_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_1_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XBUF\[1\] out_n[1] in_s[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_0_19 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_0 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_1 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_41 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XPHY_2 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_4_53 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_4 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_3 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XFILLER_1_32 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XPHY_5 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_6 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XPHY_7 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XBUF\[13\] out_s[10] in_n[10] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XPHY_8 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XBUF\[8\] out_s[5] in_n[5] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_1_47 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XPHY_9 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_3 XBUF\[6\] out_s[3] in_n[3] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_1_17 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XBUF\[11\] out_s[8] in_n[8] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_4_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XFILLER_4_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_4_19 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_2_52 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XBUF\[4\] out_s[1] in_n[1] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_2_3 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XBUF\[2\] out_n[2] in_s[2] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_2_67 VPWR VGND VGND VPWR sky130_fd_sc_hd__decap_8 XFILLER_0_3 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XBUF\[0\] out_n[0] in_s[0] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_0_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XFILLER_3_70 VGND VPWR VGND VPWR sky130_fd_sc_hd__decap_4 XBUF\[9\] out_s[6] in_n[6] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_2_29 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XBUF\[14\] out_s[11] in_n[11] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XFILLER_3_42 VGND VPWR VGND VPWR sky130_ef_sc_hd__decap_12 XBUF\[12\] out_s[9] in_n[9] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 XBUF\[7\] out_s[4] in_n[4] VGND VPWR VGND VPWR sky130_fd_sc_hd__clkbuf_8 .ends .subckt caravel clock flash_clk flash_csb flash_io0 flash_io1 gpio mprj_io[0] mprj_io[10] + mprj_io[11] mprj_io[12] mprj_io[13] mprj_io[14] mprj_io[15] mprj_io[16] mprj_io[17] + mprj_io[18] mprj_io[19] mprj_io[1] mprj_io[20] mprj_io[21] mprj_io[22] mprj_io[23] + mprj_io[24] mprj_io[25] mprj_io[26] mprj_io[27] mprj_io[28] mprj_io[29] mprj_io[2] + mprj_io[30] mprj_io[31] mprj_io[32] mprj_io[33] mprj_io[34] mprj_io[35] mprj_io[36] + mprj_io[37] mprj_io[3] mprj_io[4] mprj_io[5] mprj_io[6] mprj_io[7] mprj_io[8] mprj_io[9] + resetb vccd vccd1 vccd2 vdda vdda1 vdda1_2 vdda2 vddio vddio_2 vssa vssa1 vssa1_2 + vssa2 vssd vssd1 vssd2 vssio vssio_2 Xgpio_control_in_2\[0\] gpio_defaults_block_19/gpio_defaults[0] gpio_defaults_block_19/gpio_defaults[10] + gpio_defaults_block_19/gpio_defaults[11] gpio_defaults_block_19/gpio_defaults[12] + gpio_defaults_block_19/gpio_defaults[1] gpio_defaults_block_19/gpio_defaults[2] + gpio_defaults_block_19/gpio_defaults[3] gpio_defaults_block_19/gpio_defaults[4] + gpio_defaults_block_19/gpio_defaults[5] gpio_defaults_block_19/gpio_defaults[6] + gpio_defaults_block_19/gpio_defaults[7] gpio_defaults_block_19/gpio_defaults[8] + gpio_defaults_block_19/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[12] padframe/mprj_io_one[19] + sigbuf/mgmt_io_out_buf[12] padframe/mprj_io_one[19] padframe/mprj_io_analog_en[19] + padframe/mprj_io_analog_pol[19] padframe/mprj_io_analog_sel[19] padframe/mprj_io_dm[57] + padframe/mprj_io_dm[58] padframe/mprj_io_dm[59] padframe/mprj_io_holdover[19] padframe/mprj_io_ib_mode_sel[19] + padframe/mprj_io_in[19] padframe/mprj_io_inp_dis[19] padframe/mprj_io_out[19] padframe/mprj_io_oeb[19] + padframe/mprj_io_slow_sel[19] padframe/mprj_io_vtrip_sel[19] gpio_control_in_2\[0\]/resetn + gpio_control_in_2\[0\]/resetn_out gpio_control_in_2\[0\]/serial_clock gpio_control_in_2\[0\]/serial_clock_out + gpio_control_in_2\[0\]/serial_data_in gpio_control_in_2\[0\]/serial_data_out gpio_control_in_2\[0\]/serial_load + gpio_control_in_2\[0\]/serial_load_out mprj/io_in[19] mprj/io_oeb[19] mprj/io_out[19] + soc/VPWR mprj/vccd1 gpio_control_in_2\[0\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_33 soc/VPWR gpio_defaults_block_33/gpio_defaults[0] gpio_defaults_block_33/gpio_defaults[10] + gpio_defaults_block_33/gpio_defaults[11] gpio_defaults_block_33/gpio_defaults[12] + gpio_defaults_block_33/gpio_defaults[1] gpio_defaults_block_33/gpio_defaults[2] + gpio_defaults_block_33/gpio_defaults[3] gpio_defaults_block_33/gpio_defaults[4] + gpio_defaults_block_33/gpio_defaults[5] gpio_defaults_block_33/gpio_defaults[6] + gpio_defaults_block_33/gpio_defaults[7] gpio_defaults_block_33/gpio_defaults[8] + gpio_defaults_block_33/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_11 soc/VPWR gpio_defaults_block_11/gpio_defaults[0] gpio_defaults_block_11/gpio_defaults[10] + gpio_defaults_block_11/gpio_defaults[11] gpio_defaults_block_11/gpio_defaults[12] + gpio_defaults_block_11/gpio_defaults[1] gpio_defaults_block_11/gpio_defaults[2] + gpio_defaults_block_11/gpio_defaults[3] gpio_defaults_block_11/gpio_defaults[4] + gpio_defaults_block_11/gpio_defaults[5] gpio_defaults_block_11/gpio_defaults[6] + gpio_defaults_block_11/gpio_defaults[7] gpio_defaults_block_11/gpio_defaults[8] + gpio_defaults_block_11/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_22 soc/VPWR gpio_defaults_block_22/gpio_defaults[0] gpio_defaults_block_22/gpio_defaults[10] + gpio_defaults_block_22/gpio_defaults[11] gpio_defaults_block_22/gpio_defaults[12] + gpio_defaults_block_22/gpio_defaults[1] gpio_defaults_block_22/gpio_defaults[2] + gpio_defaults_block_22/gpio_defaults[3] gpio_defaults_block_22/gpio_defaults[4] + gpio_defaults_block_22/gpio_defaults[5] gpio_defaults_block_22/gpio_defaults[6] + gpio_defaults_block_22/gpio_defaults[7] gpio_defaults_block_22/gpio_defaults[8] + gpio_defaults_block_22/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xpll pll/clockp[1] pll/dco pll/div[0] pll/div[1] pll/div[2] pll/div[3] pll/div[4] + pll/enable pll/ext_trim[0] pll/ext_trim[10] pll/ext_trim[11] pll/ext_trim[12] pll/ext_trim[13] + pll/ext_trim[14] pll/ext_trim[15] pll/ext_trim[16] pll/ext_trim[17] pll/ext_trim[18] + pll/ext_trim[19] pll/ext_trim[1] pll/ext_trim[20] pll/ext_trim[21] pll/ext_trim[22] + pll/ext_trim[23] pll/ext_trim[24] pll/ext_trim[25] pll/ext_trim[2] pll/ext_trim[3] + pll/ext_trim[4] pll/ext_trim[5] pll/ext_trim[6] pll/ext_trim[7] pll/ext_trim[8] + pll/ext_trim[9] pll/osc pll/resetb soc/VPWR pll/clockp[0] VSUBS digital_pll Xgpio_defaults_block_34 soc/VPWR gpio_defaults_block_34/gpio_defaults[0] gpio_defaults_block_34/gpio_defaults[10] + gpio_defaults_block_34/gpio_defaults[11] gpio_defaults_block_34/gpio_defaults[12] + gpio_defaults_block_34/gpio_defaults[1] gpio_defaults_block_34/gpio_defaults[2] + gpio_defaults_block_34/gpio_defaults[3] gpio_defaults_block_34/gpio_defaults[4] + gpio_defaults_block_34/gpio_defaults[5] gpio_defaults_block_34/gpio_defaults[6] + gpio_defaults_block_34/gpio_defaults[7] gpio_defaults_block_34/gpio_defaults[8] + gpio_defaults_block_34/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_12 soc/VPWR gpio_defaults_block_12/gpio_defaults[0] gpio_defaults_block_12/gpio_defaults[10] + gpio_defaults_block_12/gpio_defaults[11] gpio_defaults_block_12/gpio_defaults[12] + gpio_defaults_block_12/gpio_defaults[1] gpio_defaults_block_12/gpio_defaults[2] + gpio_defaults_block_12/gpio_defaults[3] gpio_defaults_block_12/gpio_defaults[4] + gpio_defaults_block_12/gpio_defaults[5] gpio_defaults_block_12/gpio_defaults[6] + gpio_defaults_block_12/gpio_defaults[7] gpio_defaults_block_12/gpio_defaults[8] + gpio_defaults_block_12/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_1\[6\] gpio_defaults_block_14/gpio_defaults[0] gpio_defaults_block_14/gpio_defaults[10] + gpio_defaults_block_14/gpio_defaults[11] gpio_defaults_block_14/gpio_defaults[12] + gpio_defaults_block_14/gpio_defaults[1] gpio_defaults_block_14/gpio_defaults[2] + gpio_defaults_block_14/gpio_defaults[3] gpio_defaults_block_14/gpio_defaults[4] + gpio_defaults_block_14/gpio_defaults[5] gpio_defaults_block_14/gpio_defaults[6] + gpio_defaults_block_14/gpio_defaults[7] gpio_defaults_block_14/gpio_defaults[8] + gpio_defaults_block_14/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[7] padframe/mprj_io_one[14] + sigbuf/mgmt_io_out_buf[7] padframe/mprj_io_one[14] padframe/mprj_io_analog_en[14] + padframe/mprj_io_analog_pol[14] padframe/mprj_io_analog_sel[14] padframe/mprj_io_dm[42] + padframe/mprj_io_dm[43] padframe/mprj_io_dm[44] padframe/mprj_io_holdover[14] padframe/mprj_io_ib_mode_sel[14] + padframe/mprj_io_in[14] padframe/mprj_io_inp_dis[14] padframe/mprj_io_out[14] padframe/mprj_io_oeb[14] + padframe/mprj_io_slow_sel[14] padframe/mprj_io_vtrip_sel[14] gpio_control_in_1\[6\]/resetn + gpio_control_in_1\[7\]/resetn gpio_control_in_1\[6\]/serial_clock gpio_control_in_1\[7\]/serial_clock + gpio_control_in_1\[6\]/serial_data_in gpio_control_in_1\[7\]/serial_data_in gpio_control_in_1\[6\]/serial_load + gpio_control_in_1\[7\]/serial_load mprj/io_in[14] mprj/io_oeb[14] mprj/io_out[14] + soc/VPWR mprj/vccd1 gpio_control_in_1\[6\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_23 soc/VPWR gpio_defaults_block_23/gpio_defaults[0] gpio_defaults_block_23/gpio_defaults[10] + gpio_defaults_block_23/gpio_defaults[11] gpio_defaults_block_23/gpio_defaults[12] + gpio_defaults_block_23/gpio_defaults[1] gpio_defaults_block_23/gpio_defaults[2] + gpio_defaults_block_23/gpio_defaults[3] gpio_defaults_block_23/gpio_defaults[4] + gpio_defaults_block_23/gpio_defaults[5] gpio_defaults_block_23/gpio_defaults[6] + gpio_defaults_block_23/gpio_defaults[7] gpio_defaults_block_23/gpio_defaults[8] + gpio_defaults_block_23/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_1a\[3\] gpio_defaults_block_5/gpio_defaults[0] gpio_defaults_block_5/gpio_defaults[10] + gpio_defaults_block_5/gpio_defaults[11] gpio_defaults_block_5/gpio_defaults[12] + gpio_defaults_block_5/gpio_defaults[1] gpio_defaults_block_5/gpio_defaults[2] gpio_defaults_block_5/gpio_defaults[3] + gpio_defaults_block_5/gpio_defaults[4] gpio_defaults_block_5/gpio_defaults[5] gpio_defaults_block_5/gpio_defaults[6] + gpio_defaults_block_5/gpio_defaults[7] gpio_defaults_block_5/gpio_defaults[8] gpio_defaults_block_5/gpio_defaults[9] + housekeeping/mgmt_gpio_in[5] padframe/mprj_io_one[5] housekeeping/mgmt_gpio_out[5] + padframe/mprj_io_one[5] padframe/mprj_io_analog_en[5] padframe/mprj_io_analog_pol[5] + padframe/mprj_io_analog_sel[5] padframe/mprj_io_dm[15] padframe/mprj_io_dm[16] padframe/mprj_io_dm[17] + padframe/mprj_io_holdover[5] padframe/mprj_io_ib_mode_sel[5] padframe/mprj_io_in[5] + padframe/mprj_io_inp_dis[5] padframe/mprj_io_out[5] padframe/mprj_io_oeb[5] padframe/mprj_io_slow_sel[5] + padframe/mprj_io_vtrip_sel[5] gpio_control_in_1a\[3\]/resetn gpio_control_in_1a\[4\]/resetn + gpio_control_in_1a\[3\]/serial_clock gpio_control_in_1a\[4\]/serial_clock gpio_control_in_1a\[3\]/serial_data_in + gpio_control_in_1a\[4\]/serial_data_in gpio_control_in_1a\[3\]/serial_load gpio_control_in_1a\[4\]/serial_load + mprj/io_in[5] mprj/io_oeb[5] mprj/io_out[5] soc/VPWR mprj/vccd1 gpio_control_in_1a\[3\]/zero + mprj/vssd1 VSUBS gpio_control_block Xpadframe padframe/xresloop padframe/xres_vss_loop clock padframe/clock_core padframe/por + padframe/flash_clk_core padframe/flash_clk_oeb_core flash_csb padframe/flash_csb_core + padframe/flash_csb_oeb_core padframe/flash_io0_di_core padframe/flash_io0_do_core + padframe/flash_io0_ieb_core padframe/flash_io0_oeb_core padframe/flash_io1_di_core + padframe/flash_io1_do_core padframe/flash_io1_ieb_core padframe/flash_io1_oeb_core + gpio soc/gpio_in_pad soc/gpio_inenb_pad soc/gpio_mode0_pad soc/gpio_mode1_pad soc/gpio_out_pad + soc/gpio_outenb_pad vccd vdda vddio vssa vssio vssio_2 mprj_io[0] padframe/mprj_io_analog_en[0] + padframe/mprj_io_analog_pol[0] padframe/mprj_io_analog_sel[0] padframe/mprj_io_dm[0] + padframe/mprj_io_dm[1] padframe/mprj_io_dm[2] padframe/mprj_io_holdover[0] padframe/mprj_io_ib_mode_sel[0] + padframe/mprj_io_inp_dis[0] padframe/mprj_io_oeb[0] padframe/mprj_io_out[0] padframe/mprj_io_slow_sel[0] + padframe/mprj_io_vtrip_sel[0] padframe/mprj_io_in[0] mprj/analog_io[3] padframe/mprj_io_analog_en[10] + padframe/mprj_io_analog_pol[10] padframe/mprj_io_analog_sel[10] padframe/mprj_io_dm[30] + padframe/mprj_io_dm[31] padframe/mprj_io_dm[32] padframe/mprj_io_holdover[10] padframe/mprj_io_ib_mode_sel[10] + padframe/mprj_io_inp_dis[10] padframe/mprj_io_oeb[10] padframe/mprj_io_out[10] padframe/mprj_io_slow_sel[10] + padframe/mprj_io_vtrip_sel[10] padframe/mprj_io_in[10] mprj/analog_io[4] padframe/mprj_io_analog_en[11] + padframe/mprj_io_analog_pol[11] padframe/mprj_io_analog_sel[11] padframe/mprj_io_dm[33] + padframe/mprj_io_dm[34] padframe/mprj_io_dm[35] padframe/mprj_io_holdover[11] padframe/mprj_io_ib_mode_sel[11] + padframe/mprj_io_inp_dis[11] padframe/mprj_io_oeb[11] padframe/mprj_io_out[11] padframe/mprj_io_slow_sel[11] + padframe/mprj_io_vtrip_sel[11] padframe/mprj_io_in[11] mprj/analog_io[5] padframe/mprj_io_analog_en[12] + padframe/mprj_io_analog_pol[12] padframe/mprj_io_analog_sel[12] padframe/mprj_io_dm[36] + padframe/mprj_io_dm[37] padframe/mprj_io_dm[38] padframe/mprj_io_holdover[12] padframe/mprj_io_ib_mode_sel[12] + padframe/mprj_io_inp_dis[12] padframe/mprj_io_oeb[12] padframe/mprj_io_out[12] padframe/mprj_io_slow_sel[12] + padframe/mprj_io_vtrip_sel[12] padframe/mprj_io_in[12] mprj/analog_io[6] padframe/mprj_io_analog_en[13] + padframe/mprj_io_analog_pol[13] padframe/mprj_io_analog_sel[13] padframe/mprj_io_dm[39] + padframe/mprj_io_dm[40] padframe/mprj_io_dm[41] padframe/mprj_io_holdover[13] padframe/mprj_io_ib_mode_sel[13] + padframe/mprj_io_inp_dis[13] padframe/mprj_io_oeb[13] padframe/mprj_io_out[13] padframe/mprj_io_slow_sel[13] + padframe/mprj_io_vtrip_sel[13] padframe/mprj_io_in[13] mprj/analog_io[7] padframe/mprj_io_analog_en[14] + padframe/mprj_io_analog_pol[14] padframe/mprj_io_analog_sel[14] padframe/mprj_io_dm[42] + padframe/mprj_io_dm[43] padframe/mprj_io_dm[44] padframe/mprj_io_holdover[14] padframe/mprj_io_ib_mode_sel[14] + padframe/mprj_io_inp_dis[14] padframe/mprj_io_oeb[14] padframe/mprj_io_out[14] padframe/mprj_io_slow_sel[14] + padframe/mprj_io_vtrip_sel[14] padframe/mprj_io_in[14] mprj/analog_io[8] padframe/mprj_io_analog_en[15] + padframe/mprj_io_analog_pol[15] padframe/mprj_io_analog_sel[15] padframe/mprj_io_dm[45] + padframe/mprj_io_dm[46] padframe/mprj_io_dm[47] padframe/mprj_io_holdover[15] padframe/mprj_io_ib_mode_sel[15] + padframe/mprj_io_inp_dis[15] padframe/mprj_io_oeb[15] padframe/mprj_io_out[15] padframe/mprj_io_slow_sel[15] + padframe/mprj_io_vtrip_sel[15] padframe/mprj_io_in[15] mprj/analog_io[9] mprj_io[16] + padframe/mprj_io_analog_en[16] padframe/mprj_io_analog_pol[16] padframe/mprj_io_analog_sel[16] + padframe/mprj_io_dm[48] padframe/mprj_io_dm[49] padframe/mprj_io_dm[50] padframe/mprj_io_holdover[16] + padframe/mprj_io_ib_mode_sel[16] padframe/mprj_io_inp_dis[16] padframe/mprj_io_oeb[16] + padframe/mprj_io_out[16] padframe/mprj_io_slow_sel[16] padframe/mprj_io_vtrip_sel[16] + padframe/mprj_io_in[16] mprj/analog_io[10] mprj_io[17] padframe/mprj_io_analog_en[17] + padframe/mprj_io_analog_pol[17] padframe/mprj_io_analog_sel[17] padframe/mprj_io_dm[51] + padframe/mprj_io_dm[52] padframe/mprj_io_dm[53] padframe/mprj_io_holdover[17] padframe/mprj_io_ib_mode_sel[17] + padframe/mprj_io_inp_dis[17] padframe/mprj_io_oeb[17] padframe/mprj_io_out[17] padframe/mprj_io_slow_sel[17] + padframe/mprj_io_vtrip_sel[17] padframe/mprj_io_in[17] mprj/analog_io[11] padframe/mprj_io_analog_en[18] + padframe/mprj_io_analog_pol[18] padframe/mprj_io_analog_sel[18] padframe/mprj_io_dm[54] + padframe/mprj_io_dm[55] padframe/mprj_io_dm[56] padframe/mprj_io_holdover[18] padframe/mprj_io_ib_mode_sel[18] + padframe/mprj_io_inp_dis[18] padframe/mprj_io_oeb[18] padframe/mprj_io_out[18] padframe/mprj_io_slow_sel[18] + padframe/mprj_io_vtrip_sel[18] padframe/mprj_io_in[18] mprj_io[1] padframe/mprj_io_analog_en[1] + padframe/mprj_io_analog_pol[1] padframe/mprj_io_analog_sel[1] padframe/mprj_io_dm[3] + padframe/mprj_io_dm[4] padframe/mprj_io_dm[5] padframe/mprj_io_holdover[1] padframe/mprj_io_ib_mode_sel[1] + padframe/mprj_io_inp_dis[1] padframe/mprj_io_oeb[1] padframe/mprj_io_out[1] padframe/mprj_io_slow_sel[1] + padframe/mprj_io_vtrip_sel[1] padframe/mprj_io_in[1] mprj_io[2] padframe/mprj_io_analog_en[2] + padframe/mprj_io_analog_pol[2] padframe/mprj_io_analog_sel[2] padframe/mprj_io_dm[6] + padframe/mprj_io_dm[7] padframe/mprj_io_dm[8] padframe/mprj_io_holdover[2] padframe/mprj_io_ib_mode_sel[2] + padframe/mprj_io_inp_dis[2] padframe/mprj_io_oeb[2] padframe/mprj_io_out[2] padframe/mprj_io_slow_sel[2] + padframe/mprj_io_vtrip_sel[2] padframe/mprj_io_in[2] mprj_io[3] padframe/mprj_io_analog_en[3] + padframe/mprj_io_analog_pol[3] padframe/mprj_io_analog_sel[3] padframe/mprj_io_dm[10] + padframe/mprj_io_dm[11] padframe/mprj_io_dm[9] padframe/mprj_io_holdover[3] padframe/mprj_io_ib_mode_sel[3] + padframe/mprj_io_inp_dis[3] padframe/mprj_io_oeb[3] padframe/mprj_io_out[3] padframe/mprj_io_slow_sel[3] + padframe/mprj_io_vtrip_sel[3] padframe/mprj_io_in[3] mprj_io[4] padframe/mprj_io_analog_en[4] + padframe/mprj_io_analog_pol[4] padframe/mprj_io_analog_sel[4] padframe/mprj_io_dm[12] + padframe/mprj_io_dm[13] padframe/mprj_io_dm[14] padframe/mprj_io_holdover[4] padframe/mprj_io_ib_mode_sel[4] + padframe/mprj_io_inp_dis[4] padframe/mprj_io_oeb[4] padframe/mprj_io_out[4] padframe/mprj_io_slow_sel[4] + padframe/mprj_io_vtrip_sel[4] padframe/mprj_io_in[4] mprj_io[5] padframe/mprj_io_analog_en[5] + padframe/mprj_io_analog_pol[5] padframe/mprj_io_analog_sel[5] padframe/mprj_io_dm[15] + padframe/mprj_io_dm[16] padframe/mprj_io_dm[17] padframe/mprj_io_holdover[5] padframe/mprj_io_ib_mode_sel[5] + padframe/mprj_io_inp_dis[5] padframe/mprj_io_oeb[5] padframe/mprj_io_out[5] padframe/mprj_io_slow_sel[5] + padframe/mprj_io_vtrip_sel[5] padframe/mprj_io_in[5] mprj_io[6] padframe/mprj_io_analog_en[6] + padframe/mprj_io_analog_pol[6] padframe/mprj_io_analog_sel[6] padframe/mprj_io_dm[18] + padframe/mprj_io_dm[19] padframe/mprj_io_dm[20] padframe/mprj_io_holdover[6] padframe/mprj_io_ib_mode_sel[6] + padframe/mprj_io_inp_dis[6] padframe/mprj_io_oeb[6] padframe/mprj_io_out[6] padframe/mprj_io_slow_sel[6] + padframe/mprj_io_vtrip_sel[6] padframe/mprj_io_in[6] mprj/analog_io[0] padframe/mprj_io_analog_en[7] + padframe/mprj_io_analog_pol[7] padframe/mprj_io_analog_sel[7] padframe/mprj_io_dm[21] + padframe/mprj_io_dm[22] padframe/mprj_io_dm[23] padframe/mprj_io_holdover[7] padframe/mprj_io_ib_mode_sel[7] + padframe/mprj_io_inp_dis[7] padframe/mprj_io_oeb[7] padframe/mprj_io_out[7] padframe/mprj_io_slow_sel[7] + padframe/mprj_io_vtrip_sel[7] padframe/mprj_io_in[7] mprj/analog_io[1] padframe/mprj_io_analog_en[8] + padframe/mprj_io_analog_pol[8] padframe/mprj_io_analog_sel[8] padframe/mprj_io_dm[24] + padframe/mprj_io_dm[25] padframe/mprj_io_dm[26] padframe/mprj_io_holdover[8] padframe/mprj_io_ib_mode_sel[8] + padframe/mprj_io_inp_dis[8] padframe/mprj_io_oeb[8] padframe/mprj_io_out[8] padframe/mprj_io_slow_sel[8] + padframe/mprj_io_vtrip_sel[8] padframe/mprj_io_in[8] mprj/analog_io[2] padframe/mprj_io_analog_en[9] + padframe/mprj_io_analog_pol[9] padframe/mprj_io_analog_sel[9] padframe/mprj_io_dm[27] + padframe/mprj_io_dm[28] padframe/mprj_io_dm[29] padframe/mprj_io_holdover[9] padframe/mprj_io_ib_mode_sel[9] + padframe/mprj_io_inp_dis[9] padframe/mprj_io_oeb[9] padframe/mprj_io_out[9] padframe/mprj_io_slow_sel[9] + padframe/mprj_io_vtrip_sel[9] padframe/mprj_io_in[9] mprj/analog_io[12] mprj_io[19] + padframe/mprj_io_analog_en[19] padframe/mprj_io_analog_pol[19] padframe/mprj_io_analog_sel[19] + padframe/mprj_io_dm[57] padframe/mprj_io_dm[58] padframe/mprj_io_dm[59] padframe/mprj_io_holdover[19] + padframe/mprj_io_ib_mode_sel[19] padframe/mprj_io_inp_dis[19] padframe/mprj_io_oeb[19] + padframe/mprj_io_out[19] padframe/mprj_io_slow_sel[19] padframe/mprj_io_vtrip_sel[19] + padframe/mprj_io_in[19] mprj/analog_io[22] padframe/mprj_io_analog_en[29] padframe/mprj_io_analog_pol[29] + padframe/mprj_io_analog_sel[29] padframe/mprj_io_dm[87] padframe/mprj_io_dm[88] + padframe/mprj_io_dm[89] padframe/mprj_io_holdover[29] padframe/mprj_io_ib_mode_sel[29] + padframe/mprj_io_inp_dis[29] padframe/mprj_io_oeb[29] padframe/mprj_io_out[29] padframe/mprj_io_slow_sel[29] + padframe/mprj_io_vtrip_sel[29] padframe/mprj_io_in[29] mprj/analog_io[23] mprj_io[30] + padframe/mprj_io_analog_en[30] padframe/mprj_io_analog_pol[30] padframe/mprj_io_analog_sel[30] + padframe/mprj_io_dm[90] padframe/mprj_io_dm[91] padframe/mprj_io_dm[92] padframe/mprj_io_holdover[30] + padframe/mprj_io_ib_mode_sel[30] padframe/mprj_io_inp_dis[30] padframe/mprj_io_oeb[30] + padframe/mprj_io_out[30] padframe/mprj_io_slow_sel[30] padframe/mprj_io_vtrip_sel[30] + padframe/mprj_io_in[30] mprj/analog_io[24] padframe/mprj_io_analog_en[31] padframe/mprj_io_analog_pol[31] + padframe/mprj_io_analog_sel[31] padframe/mprj_io_dm[93] padframe/mprj_io_dm[94] + padframe/mprj_io_dm[95] padframe/mprj_io_holdover[31] padframe/mprj_io_ib_mode_sel[31] + padframe/mprj_io_inp_dis[31] padframe/mprj_io_oeb[31] padframe/mprj_io_out[31] padframe/mprj_io_slow_sel[31] + padframe/mprj_io_vtrip_sel[31] padframe/mprj_io_in[31] mprj/analog_io[25] mprj_io[32] + padframe/mprj_io_analog_en[32] padframe/mprj_io_analog_pol[32] padframe/mprj_io_analog_sel[32] + padframe/mprj_io_dm[96] padframe/mprj_io_dm[97] padframe/mprj_io_dm[98] padframe/mprj_io_holdover[32] + padframe/mprj_io_ib_mode_sel[32] padframe/mprj_io_inp_dis[32] padframe/mprj_io_oeb[32] + padframe/mprj_io_out[32] padframe/mprj_io_slow_sel[32] padframe/mprj_io_vtrip_sel[32] + padframe/mprj_io_in[32] mprj/analog_io[26] mprj_io[33] padframe/mprj_io_analog_en[33] + padframe/mprj_io_analog_pol[33] padframe/mprj_io_analog_sel[33] padframe/mprj_io_dm[100] + padframe/mprj_io_dm[101] padframe/mprj_io_dm[99] padframe/mprj_io_holdover[33] padframe/mprj_io_ib_mode_sel[33] + padframe/mprj_io_inp_dis[33] padframe/mprj_io_oeb[33] padframe/mprj_io_out[33] padframe/mprj_io_slow_sel[33] + padframe/mprj_io_vtrip_sel[33] padframe/mprj_io_in[33] mprj/analog_io[27] mprj_io[34] + padframe/mprj_io_analog_en[34] padframe/mprj_io_analog_pol[34] padframe/mprj_io_analog_sel[34] + padframe/mprj_io_dm[102] padframe/mprj_io_dm[103] padframe/mprj_io_dm[104] padframe/mprj_io_holdover[34] + padframe/mprj_io_ib_mode_sel[34] padframe/mprj_io_inp_dis[34] padframe/mprj_io_oeb[34] + padframe/mprj_io_out[34] padframe/mprj_io_slow_sel[34] padframe/mprj_io_vtrip_sel[34] + padframe/mprj_io_in[34] mprj/analog_io[28] mprj_io[35] padframe/mprj_io_analog_en[35] + padframe/mprj_io_analog_pol[35] padframe/mprj_io_analog_sel[35] padframe/mprj_io_dm[105] + padframe/mprj_io_dm[106] padframe/mprj_io_dm[107] padframe/mprj_io_holdover[35] + padframe/mprj_io_ib_mode_sel[35] padframe/mprj_io_inp_dis[35] padframe/mprj_io_oeb[35] + padframe/mprj_io_out[35] padframe/mprj_io_slow_sel[35] padframe/mprj_io_vtrip_sel[35] + padframe/mprj_io_in[35] padframe/mprj_io_analog_en[36] padframe/mprj_io_analog_pol[36] + padframe/mprj_io_analog_sel[36] padframe/mprj_io_dm[108] padframe/mprj_io_dm[109] + padframe/mprj_io_dm[110] padframe/mprj_io_holdover[36] padframe/mprj_io_ib_mode_sel[36] + padframe/mprj_io_inp_dis[36] padframe/mprj_io_oeb[36] padframe/mprj_io_out[36] padframe/mprj_io_slow_sel[36] + padframe/mprj_io_vtrip_sel[36] padframe/mprj_io_in[36] padframe/mprj_io_analog_en[37] + padframe/mprj_io_analog_pol[37] padframe/mprj_io_analog_sel[37] padframe/mprj_io_dm[111] + padframe/mprj_io_dm[112] padframe/mprj_io_dm[113] padframe/mprj_io_holdover[37] + padframe/mprj_io_ib_mode_sel[37] padframe/mprj_io_inp_dis[37] padframe/mprj_io_oeb[37] + padframe/mprj_io_out[37] padframe/mprj_io_slow_sel[37] padframe/mprj_io_vtrip_sel[37] + padframe/mprj_io_in[37] mprj/analog_io[13] padframe/mprj_io_analog_en[20] padframe/mprj_io_analog_pol[20] + padframe/mprj_io_analog_sel[20] padframe/mprj_io_dm[60] padframe/mprj_io_dm[61] + padframe/mprj_io_dm[62] padframe/mprj_io_holdover[20] padframe/mprj_io_ib_mode_sel[20] + padframe/mprj_io_inp_dis[20] padframe/mprj_io_oeb[20] padframe/mprj_io_out[20] padframe/mprj_io_slow_sel[20] + padframe/mprj_io_vtrip_sel[20] padframe/mprj_io_in[20] mprj/analog_io[14] padframe/mprj_io_analog_en[21] + padframe/mprj_io_analog_pol[21] padframe/mprj_io_analog_sel[21] padframe/mprj_io_dm[63] + padframe/mprj_io_dm[64] padframe/mprj_io_dm[65] padframe/mprj_io_holdover[21] padframe/mprj_io_ib_mode_sel[21] + padframe/mprj_io_inp_dis[21] padframe/mprj_io_oeb[21] padframe/mprj_io_out[21] padframe/mprj_io_slow_sel[21] + padframe/mprj_io_vtrip_sel[21] padframe/mprj_io_in[21] mprj/analog_io[15] padframe/mprj_io_analog_en[22] + padframe/mprj_io_analog_pol[22] padframe/mprj_io_analog_sel[22] padframe/mprj_io_dm[66] + padframe/mprj_io_dm[67] padframe/mprj_io_dm[68] padframe/mprj_io_holdover[22] padframe/mprj_io_ib_mode_sel[22] + padframe/mprj_io_inp_dis[22] padframe/mprj_io_oeb[22] padframe/mprj_io_out[22] padframe/mprj_io_slow_sel[22] + padframe/mprj_io_vtrip_sel[22] padframe/mprj_io_in[22] mprj/analog_io[16] padframe/mprj_io_analog_en[23] + padframe/mprj_io_analog_pol[23] padframe/mprj_io_analog_sel[23] padframe/mprj_io_dm[69] + padframe/mprj_io_dm[70] padframe/mprj_io_dm[71] padframe/mprj_io_holdover[23] padframe/mprj_io_ib_mode_sel[23] + padframe/mprj_io_inp_dis[23] padframe/mprj_io_oeb[23] padframe/mprj_io_out[23] padframe/mprj_io_slow_sel[23] + padframe/mprj_io_vtrip_sel[23] padframe/mprj_io_in[23] mprj/analog_io[17] padframe/mprj_io_analog_en[24] + padframe/mprj_io_analog_pol[24] padframe/mprj_io_analog_sel[24] padframe/mprj_io_dm[72] + padframe/mprj_io_dm[73] padframe/mprj_io_dm[74] padframe/mprj_io_holdover[24] padframe/mprj_io_ib_mode_sel[24] + padframe/mprj_io_inp_dis[24] padframe/mprj_io_oeb[24] padframe/mprj_io_out[24] padframe/mprj_io_slow_sel[24] + padframe/mprj_io_vtrip_sel[24] padframe/mprj_io_in[24] mprj/analog_io[18] padframe/mprj_io_analog_en[25] + padframe/mprj_io_analog_pol[25] padframe/mprj_io_analog_sel[25] padframe/mprj_io_dm[75] + padframe/mprj_io_dm[76] padframe/mprj_io_dm[77] padframe/mprj_io_holdover[25] padframe/mprj_io_ib_mode_sel[25] + padframe/mprj_io_inp_dis[25] padframe/mprj_io_oeb[25] padframe/mprj_io_out[25] padframe/mprj_io_slow_sel[25] + padframe/mprj_io_vtrip_sel[25] padframe/mprj_io_in[25] mprj/analog_io[19] padframe/mprj_io_analog_en[26] + padframe/mprj_io_analog_pol[26] padframe/mprj_io_analog_sel[26] padframe/mprj_io_dm[78] + padframe/mprj_io_dm[79] padframe/mprj_io_dm[80] padframe/mprj_io_holdover[26] padframe/mprj_io_ib_mode_sel[26] + padframe/mprj_io_inp_dis[26] padframe/mprj_io_oeb[26] padframe/mprj_io_out[26] padframe/mprj_io_slow_sel[26] + padframe/mprj_io_vtrip_sel[26] padframe/mprj_io_in[26] mprj/analog_io[20] padframe/mprj_io_analog_en[27] + padframe/mprj_io_analog_pol[27] padframe/mprj_io_analog_sel[27] padframe/mprj_io_dm[81] + padframe/mprj_io_dm[82] padframe/mprj_io_dm[83] padframe/mprj_io_holdover[27] padframe/mprj_io_ib_mode_sel[27] + padframe/mprj_io_inp_dis[27] padframe/mprj_io_oeb[27] padframe/mprj_io_out[27] padframe/mprj_io_slow_sel[27] + padframe/mprj_io_vtrip_sel[27] padframe/mprj_io_in[27] mprj/analog_io[21] padframe/mprj_io_analog_en[28] + padframe/mprj_io_analog_pol[28] padframe/mprj_io_analog_sel[28] padframe/mprj_io_dm[84] + padframe/mprj_io_dm[85] padframe/mprj_io_dm[86] padframe/mprj_io_holdover[28] padframe/mprj_io_ib_mode_sel[28] + padframe/mprj_io_inp_dis[28] padframe/mprj_io_oeb[28] padframe/mprj_io_out[28] padframe/mprj_io_slow_sel[28] + padframe/mprj_io_vtrip_sel[28] padframe/mprj_io_in[28] resetb rstb_level/A padframe/vdda + vccd1 vdda1_2 mprj/vccd1 vccd2 vdda2 vssa2 mprj/vccd2 mprj/vdda2 vssd2 padframe/mprj_io_one[0] + padframe/mprj_io_one[1] padframe/mprj_io_one[2] padframe/mprj_io_one[3] padframe/mprj_io_one[4] + padframe/mprj_io_one[5] padframe/mprj_io_one[6] padframe/mprj_io_one[7] padframe/mprj_io_one[8] + padframe/mprj_io_one[9] padframe/mprj_io_one[10] padframe/mprj_io_one[11] padframe/mprj_io_one[12] + padframe/mprj_io_one[13] padframe/mprj_io_one[14] padframe/mprj_io_one[15] padframe/mprj_io_one[16] + padframe/mprj_io_one[17] padframe/mprj_io_one[18] padframe/mprj_io_one[19] padframe/mprj_io_one[20] + padframe/mprj_io_one[21] padframe/mprj_io_one[22] padframe/mprj_io_one[23] padframe/mprj_io_one[24] + padframe/mprj_io_one[25] padframe/mprj_io_one[26] padframe/mprj_io_one[27] padframe/mprj_io_one[28] + padframe/mprj_io_one[29] padframe/mprj_io_one[30] padframe/mprj_io_one[31] padframe/mprj_io_one[32] + padframe/mprj_io_one[33] padframe/mprj_io_one[34] padframe/mprj_io_one[35] padframe/mprj_io_one[36] + padframe/mprj_io_one[37] por/porb_h mprj/vdda1 w_694469_865869# w_23367_407274# + w_694469_100152# w_23367_534874# w_137274_1012253# w_188674_1014469# w_404752_21253# + w_459552_23367# w_485565_1014469# w_291674_1014469# w_638765_1014469# w_23367_280765# + w_692253_776670# w_23367_710765# w_692355_547952# w_23367_537965# w_21151_364074# + w_21253_966965# w_694469_145352# w_459552_21253# w_692355_593152# w_485565_1012355# + w_694469_951752# w_694469_190352# w_638765_1012355# w_349952_23367# w_692355_325552# + w_189869_23367# w_21151_794074# w_694469_235552# w_692355_683352# w_21253_194365# + w_85874_1014469# w_694469_280552# w_21253_624365# w_482474_1012253# w_295152_23367# + w_635674_1012253# w_349952_21253# w_23367_578074# w_692253_551270# w_694469_370752# + w_189869_21253# w_21151_277674# w_692253_641470# w_692253_955070# w_294765_1014469# + w_295152_21253# w_21151_707674# w_23367_234474# w_692355_100152# w_694469_776669# + w_393474_1014469# w_21151_963874# w_692253_596470# w_692253_731670# w_21253_280765# + w_692253_328870# w_23367_410365# w_21253_710765# w_294765_1012355# w_462869_23367# + w_23367_237565# w_21253_537965# w_23367_664474# w_692253_686670# w_21151_191274# + w_692253_374070# w_21151_621274# w_692355_145352# w_692355_951752# w_692355_190352# + w_694469_862552# w_88965_1014469# w_188674_1012253# w_291674_1012253# w_462869_21253# + w_23367_667565# w_692355_235552# w_694469_551269# w_23367_320874# w_692355_280552# + w_88965_1012355# w_692253_103470# w_140365_1014469# w_694469_641469# w_694469_955069# + w_692355_370752# w_23367_323965# w_23367_750874# w_396565_1014469# w_240074_1014469# + mprj_io[29] w_694469_596469# w_23367_581165# w_694469_731669# w_21151_407274# w_186552_23367# + w_517669_23367# w_21151_534874# w_85874_1012253# w_694469_328869# w_140365_1012355# + flash_clk w_692253_148670# w_23367_753965# mprj_io[7] w_694469_686669# w_692253_193670# + w_694469_374069# w_396565_1012355# vssd1 mprj_io[20] w_21253_410365# w_694469_638152# + w_186552_21253# w_517669_21253# w_21253_237565# w_692253_238870# w_23367_364074# + mprj/vssd2 w_692253_283870# w_533874_1014469# w_694469_728352# mprj_io[8] w_692355_862552# + w_393474_1012253# w_694469_773352# mprj_io[10] w_23367_367165# w_21253_667565# w_23367_794074# + w_694469_103469# mprj_io[24] w_137274_1014469# w_353269_23367# mprj_io[25] w_21151_578074# + mprj_io[9] flash_io1 w_243165_1014469# w_23367_797165# mprj_io[11] w_21253_323965# + w_353269_21253# mprj_io[21] mprj_io[22] flash_io0 w_23367_277674# w_694469_148669# + w_21253_581165# w_694469_193669# w_23367_707674# vdda1 w_21151_234474# mprj_io[31] + vddio_2 w_243165_1012355# w_23367_963874# mprj_io[27] por/vdd3v3 w_694469_238869# + w_21253_753965# w_694469_283869# mprj_io[12] w_692253_865870# w_536965_1014469# + w_298469_23367# w_191765_1014469# w_482474_1014469# w_694469_547952# w_692355_638152# + w_635674_1014469# mprj_io[23] w_21151_664474# mprj_io[28] w_23367_966965# w_23367_191274# + vssd w_240074_1012253# w_408069_23367# mprj_io[18] w_694469_593152# w_23367_621274# + vssa1 w_692355_728352# w_514352_23367# w_694469_325552# w_536965_1012355# w_692355_773352# + mprj_io[13] w_298469_21253# w_191765_1012355# w_694469_683352# mprj_io[37] w_21253_367165# + w_23367_194365# w_21151_320874# w_408069_21253# w_23367_624365# mprj_io[15] mprj/vssd1 + mprj_io[26] padframe/vssa w_514352_21253# w_533874_1012253# soc/VPWR mprj/vssa1 + w_404752_23367# vssa1_2 mprj_io[14] VSUBS padframe/gpio_pad/VSSIO_Q w_21253_797165# + por/vss3v3 w_21151_750874# mprj/vssa2 mprj_io[36] chip_io Xgpio_control_bidir_2\[0\] gpio_defaults_block_35/gpio_defaults[0] gpio_defaults_block_35/gpio_defaults[10] + gpio_defaults_block_35/gpio_defaults[11] gpio_defaults_block_35/gpio_defaults[12] + gpio_defaults_block_35/gpio_defaults[1] gpio_defaults_block_35/gpio_defaults[2] + gpio_defaults_block_35/gpio_defaults[3] gpio_defaults_block_35/gpio_defaults[4] + gpio_defaults_block_35/gpio_defaults[5] gpio_defaults_block_35/gpio_defaults[6] + gpio_defaults_block_35/gpio_defaults[7] gpio_defaults_block_35/gpio_defaults[8] + gpio_defaults_block_35/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[28] sigbuf/mgmt_io_oeb_buf[0] + sigbuf/mgmt_io_out_buf[28] padframe/mprj_io_one[35] padframe/mprj_io_analog_en[35] + padframe/mprj_io_analog_pol[35] padframe/mprj_io_analog_sel[35] padframe/mprj_io_dm[105] + padframe/mprj_io_dm[106] padframe/mprj_io_dm[107] padframe/mprj_io_holdover[35] + padframe/mprj_io_ib_mode_sel[35] padframe/mprj_io_in[35] padframe/mprj_io_inp_dis[35] + padframe/mprj_io_out[35] padframe/mprj_io_oeb[35] padframe/mprj_io_slow_sel[35] + padframe/mprj_io_vtrip_sel[35] gpio_control_bidir_2\[0\]/resetn gpio_control_in_2\[15\]/resetn + gpio_control_bidir_2\[0\]/serial_clock gpio_control_in_2\[15\]/serial_clock gpio_control_bidir_2\[0\]/serial_data_in + gpio_control_in_2\[15\]/serial_data_in gpio_control_bidir_2\[0\]/serial_load gpio_control_in_2\[15\]/serial_load + mprj/io_in[35] mprj/io_oeb[35] mprj/io_out[35] soc/VPWR mprj/vccd1 gpio_control_bidir_2\[0\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_35 soc/VPWR gpio_defaults_block_35/gpio_defaults[0] gpio_defaults_block_35/gpio_defaults[10] + gpio_defaults_block_35/gpio_defaults[11] gpio_defaults_block_35/gpio_defaults[12] + gpio_defaults_block_35/gpio_defaults[1] gpio_defaults_block_35/gpio_defaults[2] + gpio_defaults_block_35/gpio_defaults[3] gpio_defaults_block_35/gpio_defaults[4] + gpio_defaults_block_35/gpio_defaults[5] gpio_defaults_block_35/gpio_defaults[6] + gpio_defaults_block_35/gpio_defaults[7] gpio_defaults_block_35/gpio_defaults[8] + gpio_defaults_block_35/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_2\[14\] gpio_defaults_block_33/gpio_defaults[0] gpio_defaults_block_33/gpio_defaults[10] + gpio_defaults_block_33/gpio_defaults[11] gpio_defaults_block_33/gpio_defaults[12] + gpio_defaults_block_33/gpio_defaults[1] gpio_defaults_block_33/gpio_defaults[2] + gpio_defaults_block_33/gpio_defaults[3] gpio_defaults_block_33/gpio_defaults[4] + gpio_defaults_block_33/gpio_defaults[5] gpio_defaults_block_33/gpio_defaults[6] + gpio_defaults_block_33/gpio_defaults[7] gpio_defaults_block_33/gpio_defaults[8] + gpio_defaults_block_33/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[26] padframe/mprj_io_one[33] + sigbuf/mgmt_io_out_buf[26] padframe/mprj_io_one[33] padframe/mprj_io_analog_en[33] + padframe/mprj_io_analog_pol[33] padframe/mprj_io_analog_sel[33] padframe/mprj_io_dm[99] + padframe/mprj_io_dm[100] padframe/mprj_io_dm[101] padframe/mprj_io_holdover[33] + padframe/mprj_io_ib_mode_sel[33] padframe/mprj_io_in[33] padframe/mprj_io_inp_dis[33] + padframe/mprj_io_out[33] padframe/mprj_io_oeb[33] padframe/mprj_io_slow_sel[33] + padframe/mprj_io_vtrip_sel[33] gpio_control_in_2\[14\]/resetn gpio_control_in_2\[13\]/resetn + gpio_control_in_2\[14\]/serial_clock gpio_control_in_2\[13\]/serial_clock gpio_control_in_2\[14\]/serial_data_in + gpio_control_in_2\[13\]/serial_data_in gpio_control_in_2\[14\]/serial_load gpio_control_in_2\[13\]/serial_load + mprj/io_in[33] mprj/io_oeb[33] mprj/io_out[33] soc/VPWR mprj/vccd1 gpio_control_in_2\[14\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_13 soc/VPWR gpio_defaults_block_13/gpio_defaults[0] gpio_defaults_block_13/gpio_defaults[10] + gpio_defaults_block_13/gpio_defaults[11] gpio_defaults_block_13/gpio_defaults[12] + gpio_defaults_block_13/gpio_defaults[1] gpio_defaults_block_13/gpio_defaults[2] + gpio_defaults_block_13/gpio_defaults[3] gpio_defaults_block_13/gpio_defaults[4] + gpio_defaults_block_13/gpio_defaults[5] gpio_defaults_block_13/gpio_defaults[6] + gpio_defaults_block_13/gpio_defaults[7] gpio_defaults_block_13/gpio_defaults[8] + gpio_defaults_block_13/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_24 soc/VPWR gpio_defaults_block_24/gpio_defaults[0] gpio_defaults_block_24/gpio_defaults[10] + gpio_defaults_block_24/gpio_defaults[11] gpio_defaults_block_24/gpio_defaults[12] + gpio_defaults_block_24/gpio_defaults[1] gpio_defaults_block_24/gpio_defaults[2] + gpio_defaults_block_24/gpio_defaults[3] gpio_defaults_block_24/gpio_defaults[4] + gpio_defaults_block_24/gpio_defaults[5] gpio_defaults_block_24/gpio_defaults[6] + gpio_defaults_block_24/gpio_defaults[7] gpio_defaults_block_24/gpio_defaults[8] + gpio_defaults_block_24/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xsoc soc/VPWR soc/clk_in soc/clk_out soc/clk_in soc/resetn_in soc/debug_in soc/debug_mode + soc/debug_oeb soc/debug_out soc/flash_clk soc/flash_csb soc/flash_io0_di soc/flash_io0_do + soc/flash_io0_oeb soc/flash_io1_di soc/flash_io1_do soc/flash_io1_oeb soc/flash_io2_di + soc/flash_io2_do soc/flash_io2_oeb soc/flash_io3_di soc/flash_io3_do soc/flash_io3_oeb + soc/gpio_in_pad soc/gpio_inenb_pad soc/gpio_mode0_pad soc/gpio_mode1_pad soc/gpio_out_pad + soc/gpio_outenb_pad soc/hk_ack_i soc/hk_cyc_o soc/hk_dat_i[0] soc/hk_dat_i[10] soc/hk_dat_i[11] + soc/hk_dat_i[12] soc/hk_dat_i[13] soc/hk_dat_i[14] soc/hk_dat_i[15] soc/hk_dat_i[16] + soc/hk_dat_i[17] soc/hk_dat_i[18] soc/hk_dat_i[19] soc/hk_dat_i[1] soc/hk_dat_i[20] + soc/hk_dat_i[21] soc/hk_dat_i[22] soc/hk_dat_i[23] soc/hk_dat_i[24] soc/hk_dat_i[25] + soc/hk_dat_i[26] soc/hk_dat_i[27] soc/hk_dat_i[28] soc/hk_dat_i[29] soc/hk_dat_i[2] + soc/hk_dat_i[30] soc/hk_dat_i[31] soc/hk_dat_i[3] soc/hk_dat_i[4] soc/hk_dat_i[5] + soc/hk_dat_i[6] soc/hk_dat_i[7] soc/hk_dat_i[8] soc/hk_dat_i[9] soc/hk_stb_o soc/irq[0] + soc/irq[1] soc/irq[2] soc/irq[3] soc/irq[4] soc/irq[5] soc/la_iena[0] soc/la_iena[100] + soc/la_iena[101] soc/la_iena[102] soc/la_iena[103] soc/la_iena[104] soc/la_iena[105] + soc/la_iena[106] soc/la_iena[107] soc/la_iena[108] soc/la_iena[109] soc/la_iena[10] + soc/la_iena[110] soc/la_iena[111] soc/la_iena[112] soc/la_iena[113] soc/la_iena[114] + soc/la_iena[115] soc/la_iena[116] soc/la_iena[117] soc/la_iena[118] soc/la_iena[119] + soc/la_iena[11] soc/la_iena[120] soc/la_iena[121] soc/la_iena[122] soc/la_iena[123] + soc/la_iena[124] soc/la_iena[125] soc/la_iena[126] soc/la_iena[127] soc/la_iena[12] + soc/la_iena[13] soc/la_iena[14] soc/la_iena[15] soc/la_iena[16] soc/la_iena[17] + soc/la_iena[18] soc/la_iena[19] soc/la_iena[1] soc/la_iena[20] soc/la_iena[21] soc/la_iena[22] + soc/la_iena[23] soc/la_iena[24] soc/la_iena[25] soc/la_iena[26] soc/la_iena[27] + soc/la_iena[28] soc/la_iena[29] soc/la_iena[2] soc/la_iena[30] soc/la_iena[31] soc/la_iena[32] + soc/la_iena[33] soc/la_iena[34] soc/la_iena[35] soc/la_iena[36] soc/la_iena[37] + soc/la_iena[38] soc/la_iena[39] soc/la_iena[3] soc/la_iena[40] soc/la_iena[41] soc/la_iena[42] + soc/la_iena[43] soc/la_iena[44] soc/la_iena[45] soc/la_iena[46] soc/la_iena[47] + soc/la_iena[48] soc/la_iena[49] soc/la_iena[4] soc/la_iena[50] soc/la_iena[51] soc/la_iena[52] + soc/la_iena[53] soc/la_iena[54] soc/la_iena[55] soc/la_iena[56] soc/la_iena[57] + soc/la_iena[58] soc/la_iena[59] soc/la_iena[5] soc/la_iena[60] soc/la_iena[61] soc/la_iena[62] + soc/la_iena[63] soc/la_iena[64] soc/la_iena[65] soc/la_iena[66] soc/la_iena[67] + soc/la_iena[68] soc/la_iena[69] soc/la_iena[6] soc/la_iena[70] soc/la_iena[71] soc/la_iena[72] + soc/la_iena[73] soc/la_iena[74] soc/la_iena[75] soc/la_iena[76] soc/la_iena[77] + soc/la_iena[78] soc/la_iena[79] soc/la_iena[7] soc/la_iena[80] soc/la_iena[81] soc/la_iena[82] + soc/la_iena[83] soc/la_iena[84] soc/la_iena[85] soc/la_iena[86] soc/la_iena[87] + soc/la_iena[88] soc/la_iena[89] soc/la_iena[8] soc/la_iena[90] soc/la_iena[91] soc/la_iena[92] + soc/la_iena[93] soc/la_iena[94] soc/la_iena[95] soc/la_iena[96] soc/la_iena[97] + soc/la_iena[98] soc/la_iena[99] soc/la_iena[9] soc/la_input[0] soc/la_input[100] + soc/la_input[101] soc/la_input[102] soc/la_input[103] soc/la_input[104] soc/la_input[105] + soc/la_input[106] soc/la_input[107] soc/la_input[108] soc/la_input[109] soc/la_input[10] + soc/la_input[110] soc/la_input[111] soc/la_input[112] soc/la_input[113] soc/la_input[114] + soc/la_input[115] soc/la_input[116] soc/la_input[117] soc/la_input[118] soc/la_input[119] + soc/la_input[11] soc/la_input[120] soc/la_input[121] soc/la_input[122] soc/la_input[123] + soc/la_input[124] soc/la_input[125] soc/la_input[126] soc/la_input[127] soc/la_input[12] + soc/la_input[13] soc/la_input[14] soc/la_input[15] soc/la_input[16] soc/la_input[17] + soc/la_input[18] soc/la_input[19] soc/la_input[1] soc/la_input[20] soc/la_input[21] + soc/la_input[22] soc/la_input[23] soc/la_input[24] soc/la_input[25] soc/la_input[26] + soc/la_input[27] soc/la_input[28] soc/la_input[29] soc/la_input[2] soc/la_input[30] + soc/la_input[31] soc/la_input[32] soc/la_input[33] soc/la_input[34] soc/la_input[35] + soc/la_input[36] soc/la_input[37] soc/la_input[38] soc/la_input[39] soc/la_input[3] + soc/la_input[40] soc/la_input[41] soc/la_input[42] soc/la_input[43] soc/la_input[44] + soc/la_input[45] soc/la_input[46] soc/la_input[47] soc/la_input[48] soc/la_input[49] + soc/la_input[4] soc/la_input[50] soc/la_input[51] soc/la_input[52] soc/la_input[53] + soc/la_input[54] soc/la_input[55] soc/la_input[56] soc/la_input[57] soc/la_input[58] + soc/la_input[59] soc/la_input[5] soc/la_input[60] soc/la_input[61] soc/la_input[62] + soc/la_input[63] soc/la_input[64] soc/la_input[65] soc/la_input[66] soc/la_input[67] + soc/la_input[68] soc/la_input[69] soc/la_input[6] soc/la_input[70] soc/la_input[71] + soc/la_input[72] soc/la_input[73] soc/la_input[74] soc/la_input[75] soc/la_input[76] + soc/la_input[77] soc/la_input[78] soc/la_input[79] soc/la_input[7] soc/la_input[80] + soc/la_input[81] soc/la_input[82] soc/la_input[83] soc/la_input[84] soc/la_input[85] + soc/la_input[86] soc/la_input[87] soc/la_input[88] soc/la_input[89] soc/la_input[8] + soc/la_input[90] soc/la_input[91] soc/la_input[92] soc/la_input[93] soc/la_input[94] + soc/la_input[95] soc/la_input[96] soc/la_input[97] soc/la_input[98] soc/la_input[99] + soc/la_input[9] soc/la_oenb[0] soc/la_oenb[100] soc/la_oenb[101] soc/la_oenb[102] + soc/la_oenb[103] soc/la_oenb[104] soc/la_oenb[105] soc/la_oenb[106] soc/la_oenb[107] + soc/la_oenb[108] soc/la_oenb[109] soc/la_oenb[10] soc/la_oenb[110] soc/la_oenb[111] + soc/la_oenb[112] soc/la_oenb[113] soc/la_oenb[114] soc/la_oenb[115] soc/la_oenb[116] + soc/la_oenb[117] soc/la_oenb[118] soc/la_oenb[119] soc/la_oenb[11] soc/la_oenb[120] + soc/la_oenb[121] soc/la_oenb[122] soc/la_oenb[123] soc/la_oenb[124] soc/la_oenb[125] + soc/la_oenb[126] soc/la_oenb[127] soc/la_oenb[12] soc/la_oenb[13] soc/la_oenb[14] + soc/la_oenb[15] soc/la_oenb[16] soc/la_oenb[17] soc/la_oenb[18] soc/la_oenb[19] + soc/la_oenb[1] soc/la_oenb[20] soc/la_oenb[21] soc/la_oenb[22] soc/la_oenb[23] soc/la_oenb[24] + soc/la_oenb[25] soc/la_oenb[26] soc/la_oenb[27] soc/la_oenb[28] soc/la_oenb[29] + soc/la_oenb[2] soc/la_oenb[30] soc/la_oenb[31] soc/la_oenb[32] soc/la_oenb[33] soc/la_oenb[34] + soc/la_oenb[35] soc/la_oenb[36] soc/la_oenb[37] soc/la_oenb[38] soc/la_oenb[39] + soc/la_oenb[3] soc/la_oenb[40] soc/la_oenb[41] soc/la_oenb[42] soc/la_oenb[43] soc/la_oenb[44] + soc/la_oenb[45] soc/la_oenb[46] soc/la_oenb[47] soc/la_oenb[48] soc/la_oenb[49] + soc/la_oenb[4] soc/la_oenb[50] soc/la_oenb[51] soc/la_oenb[52] soc/la_oenb[53] soc/la_oenb[54] + soc/la_oenb[55] soc/la_oenb[56] soc/la_oenb[57] soc/la_oenb[58] soc/la_oenb[59] + soc/la_oenb[5] soc/la_oenb[60] soc/la_oenb[61] soc/la_oenb[62] soc/la_oenb[63] soc/la_oenb[64] + soc/la_oenb[65] soc/la_oenb[66] soc/la_oenb[67] soc/la_oenb[68] soc/la_oenb[69] + soc/la_oenb[6] soc/la_oenb[70] soc/la_oenb[71] soc/la_oenb[72] soc/la_oenb[73] soc/la_oenb[74] + soc/la_oenb[75] soc/la_oenb[76] soc/la_oenb[77] soc/la_oenb[78] soc/la_oenb[79] + soc/la_oenb[7] soc/la_oenb[80] soc/la_oenb[81] soc/la_oenb[82] soc/la_oenb[83] soc/la_oenb[84] + soc/la_oenb[85] soc/la_oenb[86] soc/la_oenb[87] soc/la_oenb[88] soc/la_oenb[89] + soc/la_oenb[8] soc/la_oenb[90] soc/la_oenb[91] soc/la_oenb[92] soc/la_oenb[93] soc/la_oenb[94] + soc/la_oenb[95] soc/la_oenb[96] soc/la_oenb[97] soc/la_oenb[98] soc/la_oenb[99] + soc/la_oenb[9] soc/la_output[0] soc/la_output[100] soc/la_output[101] soc/la_output[102] + soc/la_output[103] soc/la_output[104] soc/la_output[105] soc/la_output[106] soc/la_output[107] + soc/la_output[108] soc/la_output[109] soc/la_output[10] soc/la_output[110] soc/la_output[111] + soc/la_output[112] soc/la_output[113] soc/la_output[114] soc/la_output[115] soc/la_output[116] + soc/la_output[117] soc/la_output[118] soc/la_output[119] soc/la_output[11] soc/la_output[120] + soc/la_output[121] soc/la_output[122] soc/la_output[123] soc/la_output[124] soc/la_output[125] + soc/la_output[126] soc/la_output[127] soc/la_output[12] soc/la_output[13] soc/la_output[14] + soc/la_output[15] soc/la_output[16] soc/la_output[17] soc/la_output[18] soc/la_output[19] + soc/la_output[1] soc/la_output[20] soc/la_output[21] soc/la_output[22] soc/la_output[23] + soc/la_output[24] soc/la_output[25] soc/la_output[26] soc/la_output[27] soc/la_output[28] + soc/la_output[29] soc/la_output[2] soc/la_output[30] soc/la_output[31] soc/la_output[32] + soc/la_output[33] soc/la_output[34] soc/la_output[35] soc/la_output[36] soc/la_output[37] + soc/la_output[38] soc/la_output[39] soc/la_output[3] soc/la_output[40] soc/la_output[41] + soc/la_output[42] soc/la_output[43] soc/la_output[44] soc/la_output[45] soc/la_output[46] + soc/la_output[47] soc/la_output[48] soc/la_output[49] soc/la_output[4] soc/la_output[50] + soc/la_output[51] soc/la_output[52] soc/la_output[53] soc/la_output[54] soc/la_output[55] + soc/la_output[56] soc/la_output[57] soc/la_output[58] soc/la_output[59] soc/la_output[5] + soc/la_output[60] soc/la_output[61] soc/la_output[62] soc/la_output[63] soc/la_output[64] + soc/la_output[65] soc/la_output[66] soc/la_output[67] soc/la_output[68] soc/la_output[69] + soc/la_output[6] soc/la_output[70] soc/la_output[71] soc/la_output[72] soc/la_output[73] + soc/la_output[74] soc/la_output[75] soc/la_output[76] soc/la_output[77] soc/la_output[78] + soc/la_output[79] soc/la_output[7] soc/la_output[80] soc/la_output[81] soc/la_output[82] + soc/la_output[83] soc/la_output[84] soc/la_output[85] soc/la_output[86] soc/la_output[87] + soc/la_output[88] soc/la_output[89] soc/la_output[8] soc/la_output[90] soc/la_output[91] + soc/la_output[92] soc/la_output[93] soc/la_output[94] soc/la_output[95] soc/la_output[96] + soc/la_output[97] soc/la_output[98] soc/la_output[99] soc/la_output[9] soc/mprj_ack_i + soc/mprj_adr_o[0] soc/mprj_adr_o[10] soc/mprj_adr_o[11] soc/mprj_adr_o[12] soc/mprj_adr_o[13] + soc/mprj_adr_o[14] soc/mprj_adr_o[15] soc/mprj_adr_o[16] soc/mprj_adr_o[17] soc/mprj_adr_o[18] + soc/mprj_adr_o[19] soc/mprj_adr_o[1] soc/mprj_adr_o[20] soc/mprj_adr_o[21] soc/mprj_adr_o[22] + soc/mprj_adr_o[23] soc/mprj_adr_o[24] soc/mprj_adr_o[25] soc/mprj_adr_o[26] soc/mprj_adr_o[27] + soc/mprj_adr_o[28] soc/mprj_adr_o[29] soc/mprj_adr_o[2] soc/mprj_adr_o[30] soc/mprj_adr_o[31] + soc/mprj_adr_o[3] soc/mprj_adr_o[4] soc/mprj_adr_o[5] soc/mprj_adr_o[6] soc/mprj_adr_o[7] + soc/mprj_adr_o[8] soc/mprj_adr_o[9] soc/mprj_cyc_o soc/mprj_dat_i[0] soc/mprj_dat_i[10] + soc/mprj_dat_i[11] soc/mprj_dat_i[12] soc/mprj_dat_i[13] soc/mprj_dat_i[14] soc/mprj_dat_i[15] + soc/mprj_dat_i[16] soc/mprj_dat_i[17] soc/mprj_dat_i[18] soc/mprj_dat_i[19] soc/mprj_dat_i[1] + soc/mprj_dat_i[20] soc/mprj_dat_i[21] soc/mprj_dat_i[22] soc/mprj_dat_i[23] soc/mprj_dat_i[24] + soc/mprj_dat_i[25] soc/mprj_dat_i[26] soc/mprj_dat_i[27] soc/mprj_dat_i[28] soc/mprj_dat_i[29] + soc/mprj_dat_i[2] soc/mprj_dat_i[30] soc/mprj_dat_i[31] soc/mprj_dat_i[3] soc/mprj_dat_i[4] + soc/mprj_dat_i[5] soc/mprj_dat_i[6] soc/mprj_dat_i[7] soc/mprj_dat_i[8] soc/mprj_dat_i[9] + soc/mprj_dat_o[0] soc/mprj_dat_o[10] soc/mprj_dat_o[11] soc/mprj_dat_o[12] soc/mprj_dat_o[13] + soc/mprj_dat_o[14] soc/mprj_dat_o[15] soc/mprj_dat_o[16] soc/mprj_dat_o[17] soc/mprj_dat_o[18] + soc/mprj_dat_o[19] soc/mprj_dat_o[1] soc/mprj_dat_o[20] soc/mprj_dat_o[21] soc/mprj_dat_o[22] + soc/mprj_dat_o[23] soc/mprj_dat_o[24] soc/mprj_dat_o[25] soc/mprj_dat_o[26] soc/mprj_dat_o[27] + soc/mprj_dat_o[28] soc/mprj_dat_o[29] soc/mprj_dat_o[2] soc/mprj_dat_o[30] soc/mprj_dat_o[31] + soc/mprj_dat_o[3] soc/mprj_dat_o[4] soc/mprj_dat_o[5] soc/mprj_dat_o[6] soc/mprj_dat_o[7] + soc/mprj_dat_o[8] soc/mprj_dat_o[9] soc/mprj_sel_o[0] soc/mprj_sel_o[1] soc/mprj_sel_o[2] + soc/mprj_sel_o[3] soc/mprj_stb_o soc/mprj_wb_iena soc/mprj_we_o por/por_l padframe/por + por/por_l soc/porb_h_out soc/qspi_enabled soc/resetn_in soc/resetn_out rstb_level/X + pll/resetb soc/ser_rx soc/ser_tx soc/serial_clock_in soc/serial_clock_out soc/serial_data_2_in + soc/serial_data_2_out soc/serial_load_in soc/serial_load_out soc/serial_resetn_in + soc/serial_resetn_out soc/spi_csb soc/spi_enabled soc/spi_sck soc/spi_sdi soc/spi_sdo + soc/spi_sdoenb soc/trap soc/uart_enabled soc/user_irq_ena[0] soc/user_irq_ena[1] + soc/user_irq_ena[2] VSUBS mgmt_core_wrapper Xgpio_control_in_2\[9\] gpio_defaults_block_28/gpio_defaults[0] gpio_defaults_block_28/gpio_defaults[10] + gpio_defaults_block_28/gpio_defaults[11] gpio_defaults_block_28/gpio_defaults[12] + gpio_defaults_block_28/gpio_defaults[1] gpio_defaults_block_28/gpio_defaults[2] + gpio_defaults_block_28/gpio_defaults[3] gpio_defaults_block_28/gpio_defaults[4] + gpio_defaults_block_28/gpio_defaults[5] gpio_defaults_block_28/gpio_defaults[6] + gpio_defaults_block_28/gpio_defaults[7] gpio_defaults_block_28/gpio_defaults[8] + gpio_defaults_block_28/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[21] padframe/mprj_io_one[28] + sigbuf/mgmt_io_out_buf[21] padframe/mprj_io_one[28] padframe/mprj_io_analog_en[28] + padframe/mprj_io_analog_pol[28] padframe/mprj_io_analog_sel[28] padframe/mprj_io_dm[84] + padframe/mprj_io_dm[85] padframe/mprj_io_dm[86] padframe/mprj_io_holdover[28] padframe/mprj_io_ib_mode_sel[28] + padframe/mprj_io_in[28] padframe/mprj_io_inp_dis[28] padframe/mprj_io_out[28] padframe/mprj_io_oeb[28] + padframe/mprj_io_slow_sel[28] padframe/mprj_io_vtrip_sel[28] gpio_control_in_2\[9\]/resetn + gpio_control_in_2\[8\]/resetn gpio_control_in_2\[9\]/serial_clock gpio_control_in_2\[8\]/serial_clock + gpio_control_in_2\[9\]/serial_data_in gpio_control_in_2\[8\]/serial_data_in gpio_control_in_2\[9\]/serial_load + gpio_control_in_2\[8\]/serial_load mprj/io_in[28] mprj/io_oeb[28] mprj/io_out[28] + soc/VPWR mprj/vccd1 gpio_control_in_2\[9\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_36 soc/VPWR gpio_defaults_block_36/gpio_defaults[0] gpio_defaults_block_36/gpio_defaults[10] + gpio_defaults_block_36/gpio_defaults[11] gpio_defaults_block_36/gpio_defaults[12] + gpio_defaults_block_36/gpio_defaults[1] gpio_defaults_block_36/gpio_defaults[2] + gpio_defaults_block_36/gpio_defaults[3] gpio_defaults_block_36/gpio_defaults[4] + gpio_defaults_block_36/gpio_defaults[5] gpio_defaults_block_36/gpio_defaults[6] + gpio_defaults_block_36/gpio_defaults[7] gpio_defaults_block_36/gpio_defaults[8] + gpio_defaults_block_36/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_25 soc/VPWR gpio_defaults_block_25/gpio_defaults[0] gpio_defaults_block_25/gpio_defaults[10] + gpio_defaults_block_25/gpio_defaults[11] gpio_defaults_block_25/gpio_defaults[12] + gpio_defaults_block_25/gpio_defaults[1] gpio_defaults_block_25/gpio_defaults[2] + gpio_defaults_block_25/gpio_defaults[3] gpio_defaults_block_25/gpio_defaults[4] + gpio_defaults_block_25/gpio_defaults[5] gpio_defaults_block_25/gpio_defaults[6] + gpio_defaults_block_25/gpio_defaults[7] gpio_defaults_block_25/gpio_defaults[8] + gpio_defaults_block_25/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_14 soc/VPWR gpio_defaults_block_14/gpio_defaults[0] gpio_defaults_block_14/gpio_defaults[10] + gpio_defaults_block_14/gpio_defaults[11] gpio_defaults_block_14/gpio_defaults[12] + gpio_defaults_block_14/gpio_defaults[1] gpio_defaults_block_14/gpio_defaults[2] + gpio_defaults_block_14/gpio_defaults[3] gpio_defaults_block_14/gpio_defaults[4] + gpio_defaults_block_14/gpio_defaults[5] gpio_defaults_block_14/gpio_defaults[6] + gpio_defaults_block_14/gpio_defaults[7] gpio_defaults_block_14/gpio_defaults[8] + gpio_defaults_block_14/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xpor por/vdd3v3 soc/VPWR por/porb_h por/por_l por/porb_l VSUBS por/vss3v3 simple_por Xgpio_defaults_block_37 soc/VPWR gpio_defaults_block_37/gpio_defaults[0] gpio_defaults_block_37/gpio_defaults[10] + gpio_defaults_block_37/gpio_defaults[11] gpio_defaults_block_37/gpio_defaults[12] + gpio_defaults_block_37/gpio_defaults[1] gpio_defaults_block_37/gpio_defaults[2] + gpio_defaults_block_37/gpio_defaults[3] gpio_defaults_block_37/gpio_defaults[4] + gpio_defaults_block_37/gpio_defaults[5] gpio_defaults_block_37/gpio_defaults[6] + gpio_defaults_block_37/gpio_defaults[7] gpio_defaults_block_37/gpio_defaults[8] + gpio_defaults_block_37/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_26 soc/VPWR gpio_defaults_block_26/gpio_defaults[0] gpio_defaults_block_26/gpio_defaults[10] + gpio_defaults_block_26/gpio_defaults[11] gpio_defaults_block_26/gpio_defaults[12] + gpio_defaults_block_26/gpio_defaults[1] gpio_defaults_block_26/gpio_defaults[2] + gpio_defaults_block_26/gpio_defaults[3] gpio_defaults_block_26/gpio_defaults[4] + gpio_defaults_block_26/gpio_defaults[5] gpio_defaults_block_26/gpio_defaults[6] + gpio_defaults_block_26/gpio_defaults[7] gpio_defaults_block_26/gpio_defaults[8] + gpio_defaults_block_26/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_1\[4\] gpio_defaults_block_12/gpio_defaults[0] gpio_defaults_block_12/gpio_defaults[10] + gpio_defaults_block_12/gpio_defaults[11] gpio_defaults_block_12/gpio_defaults[12] + gpio_defaults_block_12/gpio_defaults[1] gpio_defaults_block_12/gpio_defaults[2] + gpio_defaults_block_12/gpio_defaults[3] gpio_defaults_block_12/gpio_defaults[4] + gpio_defaults_block_12/gpio_defaults[5] gpio_defaults_block_12/gpio_defaults[6] + gpio_defaults_block_12/gpio_defaults[7] gpio_defaults_block_12/gpio_defaults[8] + gpio_defaults_block_12/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[5] padframe/mprj_io_one[12] + sigbuf/mgmt_io_out_buf[5] padframe/mprj_io_one[12] padframe/mprj_io_analog_en[12] + padframe/mprj_io_analog_pol[12] padframe/mprj_io_analog_sel[12] padframe/mprj_io_dm[36] + padframe/mprj_io_dm[37] padframe/mprj_io_dm[38] padframe/mprj_io_holdover[12] padframe/mprj_io_ib_mode_sel[12] + padframe/mprj_io_in[12] padframe/mprj_io_inp_dis[12] padframe/mprj_io_out[12] padframe/mprj_io_oeb[12] + padframe/mprj_io_slow_sel[12] padframe/mprj_io_vtrip_sel[12] gpio_control_in_1\[4\]/resetn + gpio_control_in_1\[5\]/resetn gpio_control_in_1\[4\]/serial_clock gpio_control_in_1\[5\]/serial_clock + gpio_control_in_1\[4\]/serial_data_in gpio_control_in_1\[5\]/serial_data_in gpio_control_in_1\[4\]/serial_load + gpio_control_in_1\[5\]/serial_load mprj/io_in[12] mprj/io_oeb[12] mprj/io_out[12] + soc/VPWR mprj/vccd1 gpio_control_in_1\[4\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_15 soc/VPWR gpio_defaults_block_15/gpio_defaults[0] gpio_defaults_block_15/gpio_defaults[10] + gpio_defaults_block_15/gpio_defaults[11] gpio_defaults_block_15/gpio_defaults[12] + gpio_defaults_block_15/gpio_defaults[1] gpio_defaults_block_15/gpio_defaults[2] + gpio_defaults_block_15/gpio_defaults[3] gpio_defaults_block_15/gpio_defaults[4] + gpio_defaults_block_15/gpio_defaults[5] gpio_defaults_block_15/gpio_defaults[6] + gpio_defaults_block_15/gpio_defaults[7] gpio_defaults_block_15/gpio_defaults[8] + gpio_defaults_block_15/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_1a\[1\] gpio_defaults_block_3/gpio_defaults[0] gpio_defaults_block_3/gpio_defaults[10] + gpio_defaults_block_3/gpio_defaults[11] gpio_defaults_block_3/gpio_defaults[12] + gpio_defaults_block_3/gpio_defaults[1] gpio_defaults_block_3/gpio_defaults[2] gpio_defaults_block_3/gpio_defaults[3] + gpio_defaults_block_3/gpio_defaults[4] gpio_defaults_block_3/gpio_defaults[5] gpio_defaults_block_3/gpio_defaults[6] + gpio_defaults_block_3/gpio_defaults[7] gpio_defaults_block_3/gpio_defaults[8] gpio_defaults_block_3/gpio_defaults[9] + housekeeping/mgmt_gpio_in[3] padframe/mprj_io_one[3] housekeeping/mgmt_gpio_out[3] + padframe/mprj_io_one[3] padframe/mprj_io_analog_en[3] padframe/mprj_io_analog_pol[3] + padframe/mprj_io_analog_sel[3] padframe/mprj_io_dm[9] padframe/mprj_io_dm[10] padframe/mprj_io_dm[11] + padframe/mprj_io_holdover[3] padframe/mprj_io_ib_mode_sel[3] padframe/mprj_io_in[3] + padframe/mprj_io_inp_dis[3] padframe/mprj_io_out[3] padframe/mprj_io_oeb[3] padframe/mprj_io_slow_sel[3] + padframe/mprj_io_vtrip_sel[3] gpio_control_in_1a\[1\]/resetn gpio_control_in_1a\[2\]/resetn + gpio_control_in_1a\[1\]/serial_clock gpio_control_in_1a\[2\]/serial_clock gpio_control_in_1a\[1\]/serial_data_in + gpio_control_in_1a\[2\]/serial_data_in gpio_control_in_1a\[1\]/serial_load gpio_control_in_1a\[2\]/serial_load + mprj/io_in[3] mprj/io_oeb[3] mprj/io_out[3] soc/VPWR mprj/vccd1 gpio_control_in_1a\[1\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[12\] gpio_defaults_block_31/gpio_defaults[0] gpio_defaults_block_31/gpio_defaults[10] + gpio_defaults_block_31/gpio_defaults[11] gpio_defaults_block_31/gpio_defaults[12] + gpio_defaults_block_31/gpio_defaults[1] gpio_defaults_block_31/gpio_defaults[2] + gpio_defaults_block_31/gpio_defaults[3] gpio_defaults_block_31/gpio_defaults[4] + gpio_defaults_block_31/gpio_defaults[5] gpio_defaults_block_31/gpio_defaults[6] + gpio_defaults_block_31/gpio_defaults[7] gpio_defaults_block_31/gpio_defaults[8] + gpio_defaults_block_31/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[24] padframe/mprj_io_one[31] + sigbuf/mgmt_io_out_buf[24] padframe/mprj_io_one[31] padframe/mprj_io_analog_en[31] + padframe/mprj_io_analog_pol[31] padframe/mprj_io_analog_sel[31] padframe/mprj_io_dm[93] + padframe/mprj_io_dm[94] padframe/mprj_io_dm[95] padframe/mprj_io_holdover[31] padframe/mprj_io_ib_mode_sel[31] + padframe/mprj_io_in[31] padframe/mprj_io_inp_dis[31] padframe/mprj_io_out[31] padframe/mprj_io_oeb[31] + padframe/mprj_io_slow_sel[31] padframe/mprj_io_vtrip_sel[31] gpio_control_in_2\[12\]/resetn + gpio_control_in_2\[11\]/resetn gpio_control_in_2\[12\]/serial_clock gpio_control_in_2\[11\]/serial_clock + gpio_control_in_2\[12\]/serial_data_in gpio_control_in_2\[11\]/serial_data_in gpio_control_in_2\[12\]/serial_load + gpio_control_in_2\[11\]/serial_load mprj/io_in[31] mprj/io_oeb[31] mprj/io_out[31] + soc/VPWR mprj/vccd1 gpio_control_in_2\[12\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_27 soc/VPWR gpio_defaults_block_27/gpio_defaults[0] gpio_defaults_block_27/gpio_defaults[10] + gpio_defaults_block_27/gpio_defaults[11] gpio_defaults_block_27/gpio_defaults[12] + gpio_defaults_block_27/gpio_defaults[1] gpio_defaults_block_27/gpio_defaults[2] + gpio_defaults_block_27/gpio_defaults[3] gpio_defaults_block_27/gpio_defaults[4] + gpio_defaults_block_27/gpio_defaults[5] gpio_defaults_block_27/gpio_defaults[6] + gpio_defaults_block_27/gpio_defaults[7] gpio_defaults_block_27/gpio_defaults[8] + gpio_defaults_block_27/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_16 soc/VPWR gpio_defaults_block_16/gpio_defaults[0] gpio_defaults_block_16/gpio_defaults[10] + gpio_defaults_block_16/gpio_defaults[11] gpio_defaults_block_16/gpio_defaults[12] + gpio_defaults_block_16/gpio_defaults[1] gpio_defaults_block_16/gpio_defaults[2] + gpio_defaults_block_16/gpio_defaults[3] gpio_defaults_block_16/gpio_defaults[4] + gpio_defaults_block_16/gpio_defaults[5] gpio_defaults_block_16/gpio_defaults[6] + gpio_defaults_block_16/gpio_defaults[7] gpio_defaults_block_16/gpio_defaults[8] + gpio_defaults_block_16/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xclock_ctrl clock_ctrl/core_clk pll/osc clock_ctrl/ext_clk_sel housekeeping/reset + pll/clockp[1] pll/clockp[0] pll/resetb housekeeping/wb_rstn_i clock_ctrl/sel2[0] + clock_ctrl/sel2[1] clock_ctrl/sel2[2] clock_ctrl/sel[0] clock_ctrl/sel[1] clock_ctrl/sel[2] + clock_ctrl/user_clk soc/VPWR VSUBS caravel_clocking Xgpio_defaults_block_28 soc/VPWR gpio_defaults_block_28/gpio_defaults[0] gpio_defaults_block_28/gpio_defaults[10] + gpio_defaults_block_28/gpio_defaults[11] gpio_defaults_block_28/gpio_defaults[12] + gpio_defaults_block_28/gpio_defaults[1] gpio_defaults_block_28/gpio_defaults[2] + gpio_defaults_block_28/gpio_defaults[3] gpio_defaults_block_28/gpio_defaults[4] + gpio_defaults_block_28/gpio_defaults[5] gpio_defaults_block_28/gpio_defaults[6] + gpio_defaults_block_28/gpio_defaults[7] gpio_defaults_block_28/gpio_defaults[8] + gpio_defaults_block_28/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_2\[7\] gpio_defaults_block_26/gpio_defaults[0] gpio_defaults_block_26/gpio_defaults[10] + gpio_defaults_block_26/gpio_defaults[11] gpio_defaults_block_26/gpio_defaults[12] + gpio_defaults_block_26/gpio_defaults[1] gpio_defaults_block_26/gpio_defaults[2] + gpio_defaults_block_26/gpio_defaults[3] gpio_defaults_block_26/gpio_defaults[4] + gpio_defaults_block_26/gpio_defaults[5] gpio_defaults_block_26/gpio_defaults[6] + gpio_defaults_block_26/gpio_defaults[7] gpio_defaults_block_26/gpio_defaults[8] + gpio_defaults_block_26/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[19] padframe/mprj_io_one[26] + sigbuf/mgmt_io_out_buf[19] padframe/mprj_io_one[26] padframe/mprj_io_analog_en[26] + padframe/mprj_io_analog_pol[26] padframe/mprj_io_analog_sel[26] padframe/mprj_io_dm[78] + padframe/mprj_io_dm[79] padframe/mprj_io_dm[80] padframe/mprj_io_holdover[26] padframe/mprj_io_ib_mode_sel[26] + padframe/mprj_io_in[26] padframe/mprj_io_inp_dis[26] padframe/mprj_io_out[26] padframe/mprj_io_oeb[26] + padframe/mprj_io_slow_sel[26] padframe/mprj_io_vtrip_sel[26] gpio_control_in_2\[7\]/resetn + gpio_control_in_2\[6\]/resetn gpio_control_in_2\[7\]/serial_clock gpio_control_in_2\[6\]/serial_clock + gpio_control_in_2\[7\]/serial_data_in gpio_control_in_2\[6\]/serial_data_in gpio_control_in_2\[7\]/serial_load + gpio_control_in_2\[6\]/serial_load mprj/io_in[26] mprj/io_oeb[26] mprj/io_out[26] + soc/VPWR mprj/vccd1 gpio_control_in_2\[7\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_17 soc/VPWR gpio_defaults_block_17/gpio_defaults[0] gpio_defaults_block_17/gpio_defaults[10] + gpio_defaults_block_17/gpio_defaults[11] gpio_defaults_block_17/gpio_defaults[12] + gpio_defaults_block_17/gpio_defaults[1] gpio_defaults_block_17/gpio_defaults[2] + gpio_defaults_block_17/gpio_defaults[3] gpio_defaults_block_17/gpio_defaults[4] + gpio_defaults_block_17/gpio_defaults[5] gpio_defaults_block_17/gpio_defaults[6] + gpio_defaults_block_17/gpio_defaults[7] gpio_defaults_block_17/gpio_defaults[8] + gpio_defaults_block_17/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_29 soc/VPWR gpio_defaults_block_29/gpio_defaults[0] gpio_defaults_block_29/gpio_defaults[10] + gpio_defaults_block_29/gpio_defaults[11] gpio_defaults_block_29/gpio_defaults[12] + gpio_defaults_block_29/gpio_defaults[1] gpio_defaults_block_29/gpio_defaults[2] + gpio_defaults_block_29/gpio_defaults[3] gpio_defaults_block_29/gpio_defaults[4] + gpio_defaults_block_29/gpio_defaults[5] gpio_defaults_block_29/gpio_defaults[6] + gpio_defaults_block_29/gpio_defaults[7] gpio_defaults_block_29/gpio_defaults[8] + gpio_defaults_block_29/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_1\[2\] gpio_defaults_block_10/gpio_defaults[0] gpio_defaults_block_10/gpio_defaults[10] + gpio_defaults_block_10/gpio_defaults[11] gpio_defaults_block_10/gpio_defaults[12] + gpio_defaults_block_10/gpio_defaults[1] gpio_defaults_block_10/gpio_defaults[2] + gpio_defaults_block_10/gpio_defaults[3] gpio_defaults_block_10/gpio_defaults[4] + gpio_defaults_block_10/gpio_defaults[5] gpio_defaults_block_10/gpio_defaults[6] + gpio_defaults_block_10/gpio_defaults[7] gpio_defaults_block_10/gpio_defaults[8] + gpio_defaults_block_10/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[3] padframe/mprj_io_one[10] + sigbuf/mgmt_io_out_buf[3] padframe/mprj_io_one[10] padframe/mprj_io_analog_en[10] + padframe/mprj_io_analog_pol[10] padframe/mprj_io_analog_sel[10] padframe/mprj_io_dm[30] + padframe/mprj_io_dm[31] padframe/mprj_io_dm[32] padframe/mprj_io_holdover[10] padframe/mprj_io_ib_mode_sel[10] + padframe/mprj_io_in[10] padframe/mprj_io_inp_dis[10] padframe/mprj_io_out[10] padframe/mprj_io_oeb[10] + padframe/mprj_io_slow_sel[10] padframe/mprj_io_vtrip_sel[10] gpio_control_in_1\[2\]/resetn + gpio_control_in_1\[3\]/resetn gpio_control_in_1\[2\]/serial_clock gpio_control_in_1\[3\]/serial_clock + gpio_control_in_1\[2\]/serial_data_in gpio_control_in_1\[3\]/serial_data_in gpio_control_in_1\[2\]/serial_load + gpio_control_in_1\[3\]/serial_load mprj/io_in[10] mprj/io_oeb[10] mprj/io_out[10] + soc/VPWR mprj/vccd1 gpio_control_in_1\[2\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_18 soc/VPWR gpio_defaults_block_18/gpio_defaults[0] gpio_defaults_block_18/gpio_defaults[10] + gpio_defaults_block_18/gpio_defaults[11] gpio_defaults_block_18/gpio_defaults[12] + gpio_defaults_block_18/gpio_defaults[1] gpio_defaults_block_18/gpio_defaults[2] + gpio_defaults_block_18/gpio_defaults[3] gpio_defaults_block_18/gpio_defaults[4] + gpio_defaults_block_18/gpio_defaults[5] gpio_defaults_block_18/gpio_defaults[6] + gpio_defaults_block_18/gpio_defaults[7] gpio_defaults_block_18/gpio_defaults[8] + gpio_defaults_block_18/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_19 soc/VPWR gpio_defaults_block_19/gpio_defaults[0] gpio_defaults_block_19/gpio_defaults[10] + gpio_defaults_block_19/gpio_defaults[11] gpio_defaults_block_19/gpio_defaults[12] + gpio_defaults_block_19/gpio_defaults[1] gpio_defaults_block_19/gpio_defaults[2] + gpio_defaults_block_19/gpio_defaults[3] gpio_defaults_block_19/gpio_defaults[4] + gpio_defaults_block_19/gpio_defaults[5] gpio_defaults_block_19/gpio_defaults[6] + gpio_defaults_block_19/gpio_defaults[7] gpio_defaults_block_19/gpio_defaults[8] + gpio_defaults_block_19/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_2\[10\] gpio_defaults_block_29/gpio_defaults[0] gpio_defaults_block_29/gpio_defaults[10] + gpio_defaults_block_29/gpio_defaults[11] gpio_defaults_block_29/gpio_defaults[12] + gpio_defaults_block_29/gpio_defaults[1] gpio_defaults_block_29/gpio_defaults[2] + gpio_defaults_block_29/gpio_defaults[3] gpio_defaults_block_29/gpio_defaults[4] + gpio_defaults_block_29/gpio_defaults[5] gpio_defaults_block_29/gpio_defaults[6] + gpio_defaults_block_29/gpio_defaults[7] gpio_defaults_block_29/gpio_defaults[8] + gpio_defaults_block_29/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[22] padframe/mprj_io_one[29] + sigbuf/mgmt_io_out_buf[22] padframe/mprj_io_one[29] padframe/mprj_io_analog_en[29] + padframe/mprj_io_analog_pol[29] padframe/mprj_io_analog_sel[29] padframe/mprj_io_dm[87] + padframe/mprj_io_dm[88] padframe/mprj_io_dm[89] padframe/mprj_io_holdover[29] padframe/mprj_io_ib_mode_sel[29] + padframe/mprj_io_in[29] padframe/mprj_io_inp_dis[29] padframe/mprj_io_out[29] padframe/mprj_io_oeb[29] + padframe/mprj_io_slow_sel[29] padframe/mprj_io_vtrip_sel[29] gpio_control_in_2\[10\]/resetn + gpio_control_in_2\[9\]/resetn gpio_control_in_2\[10\]/serial_clock gpio_control_in_2\[9\]/serial_clock + gpio_control_in_2\[10\]/serial_data_in gpio_control_in_2\[9\]/serial_data_in gpio_control_in_2\[10\]/serial_load + gpio_control_in_2\[9\]/serial_load mprj/io_in[29] mprj/io_oeb[29] mprj/io_out[29] + soc/VPWR mprj/vccd1 gpio_control_in_2\[10\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[5\] gpio_defaults_block_24/gpio_defaults[0] gpio_defaults_block_24/gpio_defaults[10] + gpio_defaults_block_24/gpio_defaults[11] gpio_defaults_block_24/gpio_defaults[12] + gpio_defaults_block_24/gpio_defaults[1] gpio_defaults_block_24/gpio_defaults[2] + gpio_defaults_block_24/gpio_defaults[3] gpio_defaults_block_24/gpio_defaults[4] + gpio_defaults_block_24/gpio_defaults[5] gpio_defaults_block_24/gpio_defaults[6] + gpio_defaults_block_24/gpio_defaults[7] gpio_defaults_block_24/gpio_defaults[8] + gpio_defaults_block_24/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[17] padframe/mprj_io_one[24] + sigbuf/mgmt_io_out_buf[17] padframe/mprj_io_one[24] padframe/mprj_io_analog_en[24] + padframe/mprj_io_analog_pol[24] padframe/mprj_io_analog_sel[24] padframe/mprj_io_dm[72] + padframe/mprj_io_dm[73] padframe/mprj_io_dm[74] padframe/mprj_io_holdover[24] padframe/mprj_io_ib_mode_sel[24] + padframe/mprj_io_in[24] padframe/mprj_io_inp_dis[24] padframe/mprj_io_out[24] padframe/mprj_io_oeb[24] + padframe/mprj_io_slow_sel[24] padframe/mprj_io_vtrip_sel[24] gpio_control_in_2\[5\]/resetn + gpio_control_in_2\[4\]/resetn gpio_control_in_2\[5\]/serial_clock gpio_control_in_2\[4\]/serial_clock + gpio_control_in_2\[5\]/serial_data_in gpio_control_in_2\[4\]/serial_data_in gpio_control_in_2\[5\]/serial_load + gpio_control_in_2\[4\]/serial_load mprj/io_in[24] mprj/io_oeb[24] mprj/io_out[24] + soc/VPWR mprj/vccd1 gpio_control_in_2\[5\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_1\[10\] gpio_defaults_block_18/gpio_defaults[0] gpio_defaults_block_18/gpio_defaults[10] + gpio_defaults_block_18/gpio_defaults[11] gpio_defaults_block_18/gpio_defaults[12] + gpio_defaults_block_18/gpio_defaults[1] gpio_defaults_block_18/gpio_defaults[2] + gpio_defaults_block_18/gpio_defaults[3] gpio_defaults_block_18/gpio_defaults[4] + gpio_defaults_block_18/gpio_defaults[5] gpio_defaults_block_18/gpio_defaults[6] + gpio_defaults_block_18/gpio_defaults[7] gpio_defaults_block_18/gpio_defaults[8] + gpio_defaults_block_18/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[11] padframe/mprj_io_one[18] + sigbuf/mgmt_io_out_buf[11] padframe/mprj_io_one[18] padframe/mprj_io_analog_en[18] + padframe/mprj_io_analog_pol[18] padframe/mprj_io_analog_sel[18] padframe/mprj_io_dm[54] + padframe/mprj_io_dm[55] padframe/mprj_io_dm[56] padframe/mprj_io_holdover[18] padframe/mprj_io_ib_mode_sel[18] + padframe/mprj_io_in[18] padframe/mprj_io_inp_dis[18] padframe/mprj_io_out[18] padframe/mprj_io_oeb[18] + padframe/mprj_io_slow_sel[18] padframe/mprj_io_vtrip_sel[18] gpio_control_in_1\[10\]/resetn + gpio_control_in_1\[10\]/resetn_out gpio_control_in_1\[10\]/serial_clock gpio_control_in_1\[10\]/serial_clock_out + gpio_control_in_1\[9\]/serial_data_out gpio_control_in_1\[10\]/serial_data_out gpio_control_in_1\[10\]/serial_load + gpio_control_in_1\[10\]/serial_load_out mprj/io_in[18] mprj/io_oeb[18] mprj/io_out[18] + soc/VPWR mprj/vccd1 gpio_control_in_1\[10\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_0 soc/VPWR gpio_defaults_block_0/gpio_defaults[0] gpio_defaults_block_0/gpio_defaults[10] + gpio_defaults_block_0/gpio_defaults[11] gpio_defaults_block_0/gpio_defaults[12] + gpio_defaults_block_0/gpio_defaults[1] gpio_defaults_block_0/gpio_defaults[2] gpio_defaults_block_0/gpio_defaults[3] + gpio_defaults_block_0/gpio_defaults[4] gpio_defaults_block_0/gpio_defaults[5] gpio_defaults_block_0/gpio_defaults[6] + gpio_defaults_block_0/gpio_defaults[7] gpio_defaults_block_0/gpio_defaults[8] gpio_defaults_block_0/gpio_defaults[9] + VSUBS gpio_defaults_block_1803 Xgpio_control_in_1\[0\] gpio_defaults_block_8/gpio_defaults[0] gpio_defaults_block_8/gpio_defaults[10] + gpio_defaults_block_8/gpio_defaults[11] gpio_defaults_block_8/gpio_defaults[12] + gpio_defaults_block_8/gpio_defaults[1] gpio_defaults_block_8/gpio_defaults[2] gpio_defaults_block_8/gpio_defaults[3] + gpio_defaults_block_8/gpio_defaults[4] gpio_defaults_block_8/gpio_defaults[5] gpio_defaults_block_8/gpio_defaults[6] + gpio_defaults_block_8/gpio_defaults[7] gpio_defaults_block_8/gpio_defaults[8] gpio_defaults_block_8/gpio_defaults[9] + sigbuf/mgmt_io_in_unbuf[1] padframe/mprj_io_one[8] sigbuf/mgmt_io_out_buf[1] padframe/mprj_io_one[8] + padframe/mprj_io_analog_en[8] padframe/mprj_io_analog_pol[8] padframe/mprj_io_analog_sel[8] + padframe/mprj_io_dm[24] padframe/mprj_io_dm[25] padframe/mprj_io_dm[26] padframe/mprj_io_holdover[8] + padframe/mprj_io_ib_mode_sel[8] padframe/mprj_io_in[8] padframe/mprj_io_inp_dis[8] + padframe/mprj_io_out[8] padframe/mprj_io_oeb[8] padframe/mprj_io_slow_sel[8] padframe/mprj_io_vtrip_sel[8] + gpio_control_in_1\[0\]/resetn gpio_control_in_1\[1\]/resetn gpio_control_in_1\[0\]/serial_clock + gpio_control_in_1\[1\]/serial_clock gpio_control_in_1\[0\]/serial_data_in gpio_control_in_1\[1\]/serial_data_in + gpio_control_in_1\[0\]/serial_load gpio_control_in_1\[1\]/serial_load mprj/io_in[8] + mprj/io_oeb[8] mprj/io_out[8] soc/VPWR mprj/vccd1 gpio_control_in_1\[0\]/zero mprj/vssd1 + VSUBS gpio_control_block Xgpio_defaults_block_1 soc/VPWR gpio_defaults_block_1/gpio_defaults[0] gpio_defaults_block_1/gpio_defaults[10] + gpio_defaults_block_1/gpio_defaults[11] gpio_defaults_block_1/gpio_defaults[12] + gpio_defaults_block_1/gpio_defaults[1] gpio_defaults_block_1/gpio_defaults[2] gpio_defaults_block_1/gpio_defaults[3] + gpio_defaults_block_1/gpio_defaults[4] gpio_defaults_block_1/gpio_defaults[5] gpio_defaults_block_1/gpio_defaults[6] + gpio_defaults_block_1/gpio_defaults[7] gpio_defaults_block_1/gpio_defaults[8] gpio_defaults_block_1/gpio_defaults[9] + VSUBS gpio_defaults_block_1803 Xspare_logic\[3\] spare_logic\[3\]/spare_xfq[0] spare_logic\[3\]/spare_xfq[1] spare_logic\[3\]/spare_xfqn[0] + spare_logic\[3\]/spare_xfqn[1] spare_logic\[3\]/spare_xi[0] spare_logic\[3\]/spare_xi[1] + spare_logic\[3\]/spare_xi[2] spare_logic\[3\]/spare_xi[3] spare_logic\[3\]/spare_xib + spare_logic\[3\]/spare_xmx[0] spare_logic\[3\]/spare_xmx[1] spare_logic\[3\]/spare_xna[0] + spare_logic\[3\]/spare_xna[1] spare_logic\[3\]/spare_xno[0] spare_logic\[3\]/spare_xno[1] + spare_logic\[3\]/spare_xz[0] spare_logic\[3\]/spare_xz[10] spare_logic\[3\]/spare_xz[11] + spare_logic\[3\]/spare_xz[12] spare_logic\[3\]/spare_xz[13] spare_logic\[3\]/spare_xz[14] + spare_logic\[3\]/spare_xz[15] spare_logic\[3\]/spare_xz[16] spare_logic\[3\]/spare_xz[17] + spare_logic\[3\]/spare_xz[18] spare_logic\[3\]/spare_xz[19] spare_logic\[3\]/spare_xz[1] + spare_logic\[3\]/spare_xz[20] spare_logic\[3\]/spare_xz[21] spare_logic\[3\]/spare_xz[22] + spare_logic\[3\]/spare_xz[23] spare_logic\[3\]/spare_xz[24] spare_logic\[3\]/spare_xz[25] + spare_logic\[3\]/spare_xz[26] spare_logic\[3\]/spare_xz[2] spare_logic\[3\]/spare_xz[3] + spare_logic\[3\]/spare_xz[4] spare_logic\[3\]/spare_xz[5] spare_logic\[3\]/spare_xz[6] + spare_logic\[3\]/spare_xz[7] spare_logic\[3\]/spare_xz[8] spare_logic\[3\]/spare_xz[9] + soc/VPWR VSUBS spare_logic_block Xuser_id_value user_id_value/mask_rev[0] user_id_value/mask_rev[10] user_id_value/mask_rev[11] + user_id_value/mask_rev[12] user_id_value/mask_rev[13] user_id_value/mask_rev[14] + user_id_value/mask_rev[15] user_id_value/mask_rev[16] user_id_value/mask_rev[17] + user_id_value/mask_rev[18] user_id_value/mask_rev[19] user_id_value/mask_rev[1] + user_id_value/mask_rev[20] user_id_value/mask_rev[21] user_id_value/mask_rev[22] + user_id_value/mask_rev[23] user_id_value/mask_rev[24] user_id_value/mask_rev[25] + user_id_value/mask_rev[26] user_id_value/mask_rev[27] user_id_value/mask_rev[28] + user_id_value/mask_rev[29] user_id_value/mask_rev[2] user_id_value/mask_rev[30] + user_id_value/mask_rev[31] user_id_value/mask_rev[3] user_id_value/mask_rev[4] user_id_value/mask_rev[5] + user_id_value/mask_rev[6] user_id_value/mask_rev[7] user_id_value/mask_rev[8] user_id_value/mask_rev[9] + soc/VPWR VSUBS user_id_programming Xgpio_defaults_block_2 soc/VPWR gpio_defaults_block_2/gpio_defaults[0] gpio_defaults_block_2/gpio_defaults[10] + gpio_defaults_block_2/gpio_defaults[11] gpio_defaults_block_2/gpio_defaults[12] + gpio_defaults_block_2/gpio_defaults[1] gpio_defaults_block_2/gpio_defaults[2] gpio_defaults_block_2/gpio_defaults[3] + gpio_defaults_block_2/gpio_defaults[4] gpio_defaults_block_2/gpio_defaults[5] gpio_defaults_block_2/gpio_defaults[6] + gpio_defaults_block_2/gpio_defaults[7] gpio_defaults_block_2/gpio_defaults[8] gpio_defaults_block_2/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xgpio_control_in_2\[3\] gpio_defaults_block_22/gpio_defaults[0] gpio_defaults_block_22/gpio_defaults[10] + gpio_defaults_block_22/gpio_defaults[11] gpio_defaults_block_22/gpio_defaults[12] + gpio_defaults_block_22/gpio_defaults[1] gpio_defaults_block_22/gpio_defaults[2] + gpio_defaults_block_22/gpio_defaults[3] gpio_defaults_block_22/gpio_defaults[4] + gpio_defaults_block_22/gpio_defaults[5] gpio_defaults_block_22/gpio_defaults[6] + gpio_defaults_block_22/gpio_defaults[7] gpio_defaults_block_22/gpio_defaults[8] + gpio_defaults_block_22/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[15] padframe/mprj_io_one[22] + sigbuf/mgmt_io_out_buf[15] padframe/mprj_io_one[22] padframe/mprj_io_analog_en[22] + padframe/mprj_io_analog_pol[22] padframe/mprj_io_analog_sel[22] padframe/mprj_io_dm[66] + padframe/mprj_io_dm[67] padframe/mprj_io_dm[68] padframe/mprj_io_holdover[22] padframe/mprj_io_ib_mode_sel[22] + padframe/mprj_io_in[22] padframe/mprj_io_inp_dis[22] padframe/mprj_io_out[22] padframe/mprj_io_oeb[22] + padframe/mprj_io_slow_sel[22] padframe/mprj_io_vtrip_sel[22] gpio_control_in_2\[3\]/resetn + gpio_control_in_2\[2\]/resetn gpio_control_in_2\[3\]/serial_clock gpio_control_in_2\[2\]/serial_clock + gpio_control_in_2\[3\]/serial_data_in gpio_control_in_2\[2\]/serial_data_in gpio_control_in_2\[3\]/serial_load + gpio_control_in_2\[2\]/serial_load mprj/io_in[22] mprj/io_oeb[22] mprj/io_out[22] + soc/VPWR mprj/vccd1 gpio_control_in_2\[3\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_3 soc/VPWR gpio_defaults_block_3/gpio_defaults[0] gpio_defaults_block_3/gpio_defaults[10] + gpio_defaults_block_3/gpio_defaults[11] gpio_defaults_block_3/gpio_defaults[12] + gpio_defaults_block_3/gpio_defaults[1] gpio_defaults_block_3/gpio_defaults[2] gpio_defaults_block_3/gpio_defaults[3] + gpio_defaults_block_3/gpio_defaults[4] gpio_defaults_block_3/gpio_defaults[5] gpio_defaults_block_3/gpio_defaults[6] + gpio_defaults_block_3/gpio_defaults[7] gpio_defaults_block_3/gpio_defaults[8] gpio_defaults_block_3/gpio_defaults[9] + VSUBS gpio_defaults_block_0801 Xgpio_control_bidir_1\[0\] gpio_defaults_block_0/gpio_defaults[0] gpio_defaults_block_0/gpio_defaults[10] + gpio_defaults_block_0/gpio_defaults[11] gpio_defaults_block_0/gpio_defaults[12] + gpio_defaults_block_0/gpio_defaults[1] gpio_defaults_block_0/gpio_defaults[2] gpio_defaults_block_0/gpio_defaults[3] + gpio_defaults_block_0/gpio_defaults[4] gpio_defaults_block_0/gpio_defaults[5] gpio_defaults_block_0/gpio_defaults[6] + gpio_defaults_block_0/gpio_defaults[7] gpio_defaults_block_0/gpio_defaults[8] gpio_defaults_block_0/gpio_defaults[9] + housekeeping/mgmt_gpio_in[0] housekeeping/mgmt_gpio_oeb[0] housekeeping/mgmt_gpio_out[0] + padframe/mprj_io_one[0] padframe/mprj_io_analog_en[0] padframe/mprj_io_analog_pol[0] + padframe/mprj_io_analog_sel[0] padframe/mprj_io_dm[0] padframe/mprj_io_dm[1] padframe/mprj_io_dm[2] + padframe/mprj_io_holdover[0] padframe/mprj_io_ib_mode_sel[0] padframe/mprj_io_in[0] + padframe/mprj_io_inp_dis[0] padframe/mprj_io_out[0] padframe/mprj_io_oeb[0] padframe/mprj_io_slow_sel[0] + padframe/mprj_io_vtrip_sel[0] soc/serial_resetn_in gpio_control_bidir_1\[1\]/resetn + soc/serial_clock_in gpio_control_bidir_1\[1\]/serial_clock housekeeping/serial_data_1 + gpio_control_bidir_1\[1\]/serial_data_in soc/serial_load_in gpio_control_bidir_1\[1\]/serial_load + mprj/io_in[0] mprj/io_oeb[0] mprj/io_out[0] soc/VPWR mprj/vccd1 gpio_control_bidir_1\[0\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_4 soc/VPWR gpio_defaults_block_4/gpio_defaults[0] gpio_defaults_block_4/gpio_defaults[10] + gpio_defaults_block_4/gpio_defaults[11] gpio_defaults_block_4/gpio_defaults[12] + gpio_defaults_block_4/gpio_defaults[1] gpio_defaults_block_4/gpio_defaults[2] gpio_defaults_block_4/gpio_defaults[3] + gpio_defaults_block_4/gpio_defaults[4] gpio_defaults_block_4/gpio_defaults[5] gpio_defaults_block_4/gpio_defaults[6] + gpio_defaults_block_4/gpio_defaults[7] gpio_defaults_block_4/gpio_defaults[8] gpio_defaults_block_4/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xspare_logic\[1\] spare_logic\[1\]/spare_xfq[0] spare_logic\[1\]/spare_xfq[1] spare_logic\[1\]/spare_xfqn[0] + spare_logic\[1\]/spare_xfqn[1] spare_logic\[1\]/spare_xi[0] spare_logic\[1\]/spare_xi[1] + spare_logic\[1\]/spare_xi[2] spare_logic\[1\]/spare_xi[3] spare_logic\[1\]/spare_xib + spare_logic\[1\]/spare_xmx[0] spare_logic\[1\]/spare_xmx[1] spare_logic\[1\]/spare_xna[0] + spare_logic\[1\]/spare_xna[1] spare_logic\[1\]/spare_xno[0] spare_logic\[1\]/spare_xno[1] + spare_logic\[1\]/spare_xz[0] spare_logic\[1\]/spare_xz[10] spare_logic\[1\]/spare_xz[11] + spare_logic\[1\]/spare_xz[12] spare_logic\[1\]/spare_xz[13] spare_logic\[1\]/spare_xz[14] + spare_logic\[1\]/spare_xz[15] spare_logic\[1\]/spare_xz[16] spare_logic\[1\]/spare_xz[17] + spare_logic\[1\]/spare_xz[18] spare_logic\[1\]/spare_xz[19] spare_logic\[1\]/spare_xz[1] + spare_logic\[1\]/spare_xz[20] spare_logic\[1\]/spare_xz[21] spare_logic\[1\]/spare_xz[22] + spare_logic\[1\]/spare_xz[23] spare_logic\[1\]/spare_xz[24] spare_logic\[1\]/spare_xz[25] + spare_logic\[1\]/spare_xz[26] spare_logic\[1\]/spare_xz[2] spare_logic\[1\]/spare_xz[3] + spare_logic\[1\]/spare_xz[4] spare_logic\[1\]/spare_xz[5] spare_logic\[1\]/spare_xz[6] + spare_logic\[1\]/spare_xz[7] spare_logic\[1\]/spare_xz[8] spare_logic\[1\]/spare_xz[9] + soc/VPWR VSUBS spare_logic_block Xgpio_control_in_1\[9\] gpio_defaults_block_17/gpio_defaults[0] gpio_defaults_block_17/gpio_defaults[10] + gpio_defaults_block_17/gpio_defaults[11] gpio_defaults_block_17/gpio_defaults[12] + gpio_defaults_block_17/gpio_defaults[1] gpio_defaults_block_17/gpio_defaults[2] + gpio_defaults_block_17/gpio_defaults[3] gpio_defaults_block_17/gpio_defaults[4] + gpio_defaults_block_17/gpio_defaults[5] gpio_defaults_block_17/gpio_defaults[6] + gpio_defaults_block_17/gpio_defaults[7] gpio_defaults_block_17/gpio_defaults[8] + gpio_defaults_block_17/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[10] padframe/mprj_io_one[17] + sigbuf/mgmt_io_out_buf[10] padframe/mprj_io_one[17] padframe/mprj_io_analog_en[17] + padframe/mprj_io_analog_pol[17] padframe/mprj_io_analog_sel[17] padframe/mprj_io_dm[51] + padframe/mprj_io_dm[52] padframe/mprj_io_dm[53] padframe/mprj_io_holdover[17] padframe/mprj_io_ib_mode_sel[17] + padframe/mprj_io_in[17] padframe/mprj_io_inp_dis[17] padframe/mprj_io_out[17] padframe/mprj_io_oeb[17] + padframe/mprj_io_slow_sel[17] padframe/mprj_io_vtrip_sel[17] gpio_control_in_1\[9\]/resetn + gpio_control_in_1\[10\]/resetn gpio_control_in_1\[9\]/serial_clock gpio_control_in_1\[10\]/serial_clock + gpio_control_in_1\[9\]/serial_data_in gpio_control_in_1\[9\]/serial_data_out gpio_control_in_1\[9\]/serial_load + gpio_control_in_1\[10\]/serial_load mprj/io_in[17] mprj/io_oeb[17] mprj/io_out[17] + soc/VPWR mprj/vccd1 gpio_control_in_1\[9\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_5 soc/VPWR gpio_defaults_block_5/gpio_defaults[0] gpio_defaults_block_5/gpio_defaults[10] + gpio_defaults_block_5/gpio_defaults[11] gpio_defaults_block_5/gpio_defaults[12] + gpio_defaults_block_5/gpio_defaults[1] gpio_defaults_block_5/gpio_defaults[2] gpio_defaults_block_5/gpio_defaults[3] + gpio_defaults_block_5/gpio_defaults[4] gpio_defaults_block_5/gpio_defaults[5] gpio_defaults_block_5/gpio_defaults[6] + gpio_defaults_block_5/gpio_defaults[7] gpio_defaults_block_5/gpio_defaults[8] gpio_defaults_block_5/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xgpio_control_in_2\[1\] gpio_defaults_block_20/gpio_defaults[0] gpio_defaults_block_20/gpio_defaults[10] + gpio_defaults_block_20/gpio_defaults[11] gpio_defaults_block_20/gpio_defaults[12] + gpio_defaults_block_20/gpio_defaults[1] gpio_defaults_block_20/gpio_defaults[2] + gpio_defaults_block_20/gpio_defaults[3] gpio_defaults_block_20/gpio_defaults[4] + gpio_defaults_block_20/gpio_defaults[5] gpio_defaults_block_20/gpio_defaults[6] + gpio_defaults_block_20/gpio_defaults[7] gpio_defaults_block_20/gpio_defaults[8] + gpio_defaults_block_20/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[13] padframe/mprj_io_one[20] + sigbuf/mgmt_io_out_buf[13] padframe/mprj_io_one[20] padframe/mprj_io_analog_en[20] + padframe/mprj_io_analog_pol[20] padframe/mprj_io_analog_sel[20] padframe/mprj_io_dm[60] + padframe/mprj_io_dm[61] padframe/mprj_io_dm[62] padframe/mprj_io_holdover[20] padframe/mprj_io_ib_mode_sel[20] + padframe/mprj_io_in[20] padframe/mprj_io_inp_dis[20] padframe/mprj_io_out[20] padframe/mprj_io_oeb[20] + padframe/mprj_io_slow_sel[20] padframe/mprj_io_vtrip_sel[20] gpio_control_in_2\[1\]/resetn + gpio_control_in_2\[0\]/resetn gpio_control_in_2\[1\]/serial_clock gpio_control_in_2\[0\]/serial_clock + gpio_control_in_2\[1\]/serial_data_in gpio_control_in_2\[0\]/serial_data_in gpio_control_in_2\[1\]/serial_load + gpio_control_in_2\[0\]/serial_load mprj/io_in[20] mprj/io_oeb[20] mprj/io_out[20] + soc/VPWR mprj/vccd1 gpio_control_in_2\[1\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_6 soc/VPWR gpio_defaults_block_6/gpio_defaults[0] gpio_defaults_block_6/gpio_defaults[10] + gpio_defaults_block_6/gpio_defaults[11] gpio_defaults_block_6/gpio_defaults[12] + gpio_defaults_block_6/gpio_defaults[1] gpio_defaults_block_6/gpio_defaults[2] gpio_defaults_block_6/gpio_defaults[3] + gpio_defaults_block_6/gpio_defaults[4] gpio_defaults_block_6/gpio_defaults[5] gpio_defaults_block_6/gpio_defaults[6] + gpio_defaults_block_6/gpio_defaults[7] gpio_defaults_block_6/gpio_defaults[8] gpio_defaults_block_6/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_7 soc/VPWR gpio_defaults_block_7/gpio_defaults[0] gpio_defaults_block_7/gpio_defaults[10] + gpio_defaults_block_7/gpio_defaults[11] gpio_defaults_block_7/gpio_defaults[12] + gpio_defaults_block_7/gpio_defaults[1] gpio_defaults_block_7/gpio_defaults[2] gpio_defaults_block_7/gpio_defaults[3] + gpio_defaults_block_7/gpio_defaults[4] gpio_defaults_block_7/gpio_defaults[5] gpio_defaults_block_7/gpio_defaults[6] + gpio_defaults_block_7/gpio_defaults[7] gpio_defaults_block_7/gpio_defaults[8] gpio_defaults_block_7/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xrstb_level rstb_level/A rstb_level/X por/vdd3v3 soc/VPWR VSUBS por/vss3v3 xres_buf Xgpio_control_in_1\[7\] gpio_defaults_block_15/gpio_defaults[0] gpio_defaults_block_15/gpio_defaults[10] + gpio_defaults_block_15/gpio_defaults[11] gpio_defaults_block_15/gpio_defaults[12] + gpio_defaults_block_15/gpio_defaults[1] gpio_defaults_block_15/gpio_defaults[2] + gpio_defaults_block_15/gpio_defaults[3] gpio_defaults_block_15/gpio_defaults[4] + gpio_defaults_block_15/gpio_defaults[5] gpio_defaults_block_15/gpio_defaults[6] + gpio_defaults_block_15/gpio_defaults[7] gpio_defaults_block_15/gpio_defaults[8] + gpio_defaults_block_15/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[8] padframe/mprj_io_one[15] + sigbuf/mgmt_io_out_buf[8] padframe/mprj_io_one[15] padframe/mprj_io_analog_en[15] + padframe/mprj_io_analog_pol[15] padframe/mprj_io_analog_sel[15] padframe/mprj_io_dm[45] + padframe/mprj_io_dm[46] padframe/mprj_io_dm[47] padframe/mprj_io_holdover[15] padframe/mprj_io_ib_mode_sel[15] + padframe/mprj_io_in[15] padframe/mprj_io_inp_dis[15] padframe/mprj_io_out[15] padframe/mprj_io_oeb[15] + padframe/mprj_io_slow_sel[15] padframe/mprj_io_vtrip_sel[15] gpio_control_in_1\[7\]/resetn + gpio_control_in_1\[8\]/resetn gpio_control_in_1\[7\]/serial_clock gpio_control_in_1\[8\]/serial_clock + gpio_control_in_1\[7\]/serial_data_in gpio_control_in_1\[8\]/serial_data_in gpio_control_in_1\[7\]/serial_load + gpio_control_in_1\[8\]/serial_load mprj/io_in[15] mprj/io_oeb[15] mprj/io_out[15] + soc/VPWR mprj/vccd1 gpio_control_in_1\[7\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_8 soc/VPWR gpio_defaults_block_8/gpio_defaults[0] gpio_defaults_block_8/gpio_defaults[10] + gpio_defaults_block_8/gpio_defaults[11] gpio_defaults_block_8/gpio_defaults[12] + gpio_defaults_block_8/gpio_defaults[1] gpio_defaults_block_8/gpio_defaults[2] gpio_defaults_block_8/gpio_defaults[3] + gpio_defaults_block_8/gpio_defaults[4] gpio_defaults_block_8/gpio_defaults[5] gpio_defaults_block_8/gpio_defaults[6] + gpio_defaults_block_8/gpio_defaults[7] gpio_defaults_block_8/gpio_defaults[8] gpio_defaults_block_8/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xsigbuf sigbuf/mgmt_io_in_unbuf[11] sigbuf/mgmt_io_out_buf[11] sigbuf/mgmt_io_out_buf[10] + sigbuf/mgmt_io_out_buf[9] sigbuf/mgmt_io_in_unbuf[10] sigbuf/mgmt_io_in_unbuf[9] + sigbuf/mgmt_io_in_unbuf[8] sigbuf/mgmt_io_out_buf[8] sigbuf/mgmt_io_in_unbuf[7] + sigbuf/mgmt_io_in_unbuf[6] sigbuf/mgmt_io_out_buf[7] sigbuf/mgmt_io_out_buf[6] sigbuf/mgmt_io_in_unbuf[5] + sigbuf/mgmt_io_in_unbuf[4] sigbuf/mgmt_io_in_unbuf[3] sigbuf/mgmt_io_in_unbuf[2] + sigbuf/mgmt_io_in_unbuf[1] sigbuf/mgmt_io_in_unbuf[0] sigbuf/mgmt_io_out_buf[0] + sigbuf/mgmt_io_out_buf[1] sigbuf/mgmt_io_out_buf[2] sigbuf/mgmt_io_out_buf[3] sigbuf/mgmt_io_out_buf[4] + sigbuf/mgmt_io_out_buf[5] sigbuf/mgmt_io_out_unbuf[0] sigbuf/mgmt_io_out_unbuf[1] + sigbuf/mgmt_io_out_unbuf[2] sigbuf/mgmt_io_out_unbuf[3] sigbuf/mgmt_io_out_unbuf[4] + sigbuf/mgmt_io_out_unbuf[5] sigbuf/mgmt_io_out_unbuf[6] sigbuf/mgmt_io_out_unbuf[7] + sigbuf/mgmt_io_out_unbuf[8] sigbuf/mgmt_io_out_unbuf[9] sigbuf/mgmt_io_out_unbuf[10] + sigbuf/mgmt_io_out_unbuf[11] sigbuf/mgmt_io_in_buf[11] sigbuf/mgmt_io_in_buf[10] + sigbuf/mgmt_io_in_buf[9] sigbuf/mgmt_io_in_buf[8] sigbuf/mgmt_io_in_buf[7] sigbuf/mgmt_io_in_buf[6] + sigbuf/mgmt_io_in_buf[5] sigbuf/mgmt_io_in_buf[4] sigbuf/mgmt_io_in_buf[3] sigbuf/mgmt_io_in_buf[2] + sigbuf/mgmt_io_in_buf[1] sigbuf/mgmt_io_in_buf[0] sigbuf/mgmt_io_in_unbuf[12] sigbuf/mgmt_io_in_unbuf[13] + sigbuf/mgmt_io_in_unbuf[14] sigbuf/mgmt_io_out_buf[14] sigbuf/mgmt_io_out_buf[13] + sigbuf/mgmt_io_out_buf[12] sigbuf/mgmt_io_out_buf[15] sigbuf/mgmt_io_out_buf[16] + sigbuf/mgmt_io_in_unbuf[16] sigbuf/mgmt_io_in_unbuf[15] sigbuf/mgmt_io_out_buf[17] + sigbuf/mgmt_io_out_buf[18] sigbuf/mgmt_io_out_buf[19] sigbuf/mgmt_io_out_buf[20] + sigbuf/mgmt_io_out_buf[21] sigbuf/mgmt_io_out_buf[22] sigbuf/mgmt_io_in_unbuf[22] + sigbuf/mgmt_io_in_unbuf[21] sigbuf/mgmt_io_in_unbuf[20] sigbuf/mgmt_io_in_unbuf[19] + sigbuf/mgmt_io_in_unbuf[18] sigbuf/mgmt_io_in_unbuf[17] sigbuf/mgmt_io_out_buf[23] + sigbuf/mgmt_io_out_buf[24] sigbuf/mgmt_io_out_buf[25] sigbuf/mgmt_io_out_buf[26] + sigbuf/mgmt_io_in_unbuf[26] sigbuf/mgmt_io_in_unbuf[25] sigbuf/mgmt_io_in_unbuf[24] + sigbuf/mgmt_io_in_unbuf[23] sigbuf/mgmt_io_out_buf[27] sigbuf/mgmt_io_out_buf[28] + sigbuf/mgmt_io_out_buf[29] sigbuf/mgmt_io_out_buf[30] sigbuf/mgmt_io_in_unbuf[30] + sigbuf/mgmt_io_in_unbuf[29] sigbuf/mgmt_io_in_unbuf[28] sigbuf/mgmt_io_in_unbuf[27] + sigbuf/mgmt_io_oeb_buf[0] sigbuf/mgmt_io_oeb_buf[1] sigbuf/mgmt_io_oeb_buf[2] sigbuf/mgmt_io_oeb_unbuf[2] + sigbuf/mgmt_io_oeb_unbuf[1] sigbuf/mgmt_io_oeb_unbuf[0] sigbuf/mgmt_io_in_buf[30] + sigbuf/mgmt_io_in_buf[29] sigbuf/mgmt_io_in_buf[28] sigbuf/mgmt_io_in_buf[27] sigbuf/mgmt_io_out_unbuf[27] + sigbuf/mgmt_io_out_unbuf[28] sigbuf/mgmt_io_out_unbuf[29] sigbuf/mgmt_io_out_unbuf[30] + sigbuf/mgmt_io_out_unbuf[26] sigbuf/mgmt_io_out_unbuf[25] sigbuf/mgmt_io_out_unbuf[24] + sigbuf/mgmt_io_out_unbuf[23] sigbuf/mgmt_io_out_unbuf[22] sigbuf/mgmt_io_out_unbuf[21] + sigbuf/mgmt_io_out_unbuf[20] sigbuf/mgmt_io_out_unbuf[19] sigbuf/mgmt_io_out_unbuf[18] + sigbuf/mgmt_io_out_unbuf[17] sigbuf/mgmt_io_out_unbuf[16] sigbuf/mgmt_io_out_unbuf[15] + sigbuf/mgmt_io_out_unbuf[14] sigbuf/mgmt_io_out_unbuf[13] sigbuf/mgmt_io_out_unbuf[12] + sigbuf/mgmt_io_in_buf[12] sigbuf/mgmt_io_in_buf[13] sigbuf/mgmt_io_in_buf[14] sigbuf/mgmt_io_in_buf[15] + sigbuf/mgmt_io_in_buf[16] sigbuf/mgmt_io_in_buf[17] sigbuf/mgmt_io_in_buf[18] sigbuf/mgmt_io_in_buf[19] + sigbuf/mgmt_io_in_buf[20] sigbuf/mgmt_io_in_buf[21] sigbuf/mgmt_io_in_buf[22] sigbuf/mgmt_io_in_buf[23] + sigbuf/mgmt_io_in_buf[24] sigbuf/mgmt_io_in_buf[25] sigbuf/mgmt_io_in_buf[26] soc/VPWR + soc/VPWR soc/VPWR soc/VPWR soc/VPWR soc/VPWR soc/VPWR soc/VPWR soc/VPWR soc/VPWR + VSUBS gpio_signal_buffering Xmgmt_buffers clock_ctrl/user_clk housekeeping/usr1_vcc_pwrgood housekeeping/usr1_vdd_pwrgood + housekeeping/usr2_vcc_pwrgood housekeeping/usr2_vdd_pwrgood soc/irq[0] soc/irq[1] + soc/irq[2] mprj/user_irq[0] mprj/user_irq[1] mprj/user_irq[2] soc/user_irq_ena[0] + soc/user_irq_ena[1] soc/user_irq_ena[2] mprj/la_data_in[108] mprj/la_data_in[109] + mprj/la_data_in[110] mprj/la_data_in[111] mprj/la_data_in[112] mprj/la_data_in[113] + mprj/la_data_in[114] mprj/la_data_in[115] mprj/la_data_in[116] mprj/la_data_in[117] + mprj/la_data_in[118] mprj/la_data_in[119] mprj/la_data_in[120] mprj/la_data_in[121] + mprj/la_data_in[122] mprj/la_data_in[123] mprj/la_data_in[124] mprj/la_data_in[125] + mprj/la_data_in[126] mprj/la_data_in[127] mprj/la_data_out[108] mprj/la_data_out[109] + mprj/la_data_out[110] mprj/la_data_out[111] mprj/la_data_out[112] mprj/la_data_out[113] + mprj/la_data_out[114] mprj/la_data_out[115] mprj/la_data_out[116] mprj/la_data_out[117] + mprj/la_data_out[118] mprj/la_data_out[119] mprj/la_data_out[120] mprj/la_data_out[121] + mprj/la_data_out[122] mprj/la_data_out[123] mprj/la_data_out[124] mprj/la_data_out[125] + mprj/la_data_out[126] mprj/la_data_out[127] mprj/la_oenb[107] mprj/la_oenb[108] + mprj/la_oenb[109] mprj/la_oenb[110] mprj/la_oenb[111] mprj/la_oenb[112] mprj/la_oenb[113] + mprj/la_oenb[114] mprj/la_oenb[115] mprj/la_oenb[116] mprj/la_oenb[117] mprj/la_oenb[118] + mprj/la_oenb[119] mprj/la_oenb[120] mprj/la_oenb[121] mprj/la_oenb[122] mprj/la_oenb[123] + mprj/la_oenb[124] mprj/la_oenb[125] mprj/la_oenb[126] mprj/la_oenb[127] mprj/user_clock2 + mprj/la_data_in[94] mprj/la_data_in[95] mprj/la_data_in[96] mprj/la_data_in[97] + mprj/la_data_in[98] mprj/la_data_in[99] mprj/la_data_out[87] mprj/la_data_out[88] + mprj/la_data_out[89] mprj/la_data_out[90] mprj/la_data_out[91] mprj/la_data_out[92] + mprj/la_data_out[93] mprj/la_data_out[94] mprj/la_data_out[95] mprj/la_data_out[96] + mprj/la_data_out[97] mprj/la_data_out[98] mprj/la_data_out[99] mprj/la_oenb[100] + mprj/la_oenb[101] mprj/la_oenb[102] mprj/la_oenb[103] mprj/la_oenb[104] mprj/la_oenb[105] + mprj/la_oenb[106] mprj/la_data_out[100] mprj/la_data_out[101] mprj/la_data_out[102] + mprj/la_data_out[103] mprj/la_data_out[104] mprj/la_data_out[105] mprj/la_data_out[106] + mprj/la_data_out[107] mprj/la_data_in[104] mprj/la_data_in[105] mprj/la_data_in[106] + mprj/la_data_in[107] mprj/la_data_in[100] mprj/la_data_in[101] mprj/la_data_in[102] + mprj/la_data_in[103] mprj/la_data_in[88] mprj/la_data_in[89] mprj/la_data_in[90] + mprj/la_data_in[91] mprj/la_data_in[92] mprj/la_oenb[87] mprj/la_oenb[88] mprj/la_oenb[89] + mprj/la_oenb[90] mprj/la_oenb[91] mprj/la_oenb[92] mprj/la_oenb[93] mprj/la_oenb[94] + mprj/la_oenb[95] mprj/la_oenb[96] mprj/la_oenb[97] mprj/la_oenb[98] mprj/la_oenb[99] + mprj/la_data_in[93] mprj/la_data_out[67] mprj/la_data_out[68] mprj/la_data_out[69] + mprj/la_data_out[70] mprj/la_data_out[71] mprj/la_data_out[72] mprj/la_data_out[73] + mprj/la_data_out[74] mprj/la_data_out[75] mprj/la_data_out[76] mprj/la_data_out[77] + mprj/la_data_out[78] mprj/la_data_out[79] mprj/la_data_out[80] mprj/la_data_out[81] + mprj/la_data_out[82] mprj/la_data_out[83] mprj/la_data_out[84] mprj/la_data_out[85] + mprj/la_data_out[86] mprj/la_data_in[87] mprj/la_data_in[67] mprj/la_data_in[68] + mprj/la_data_in[69] mprj/la_data_in[70] mprj/la_data_in[71] mprj/la_data_in[72] + mprj/la_data_in[73] mprj/la_data_in[74] mprj/la_data_in[75] mprj/la_data_in[76] + mprj/la_data_in[77] mprj/la_data_in[78] mprj/la_data_in[79] mprj/la_data_in[80] + mprj/la_data_in[81] mprj/la_data_in[82] mprj/la_data_in[83] mprj/la_data_in[84] + mprj/la_data_in[85] mprj/la_data_in[86] mprj/la_oenb[67] mprj/la_oenb[68] mprj/la_oenb[69] + mprj/la_oenb[70] mprj/la_oenb[71] mprj/la_oenb[72] mprj/la_oenb[73] mprj/la_oenb[74] + mprj/la_oenb[75] mprj/la_oenb[76] mprj/la_oenb[77] mprj/la_oenb[78] mprj/la_oenb[79] + mprj/la_oenb[80] mprj/la_oenb[81] mprj/la_oenb[82] mprj/la_oenb[83] mprj/la_oenb[84] + mprj/la_oenb[85] mprj/la_oenb[86] mprj/la_data_in[55] mprj/la_data_in[56] mprj/la_data_in[57] + mprj/la_data_in[58] mprj/la_data_in[59] mprj/la_data_in[60] mprj/la_oenb[46] mprj/la_oenb[47] + mprj/la_oenb[48] mprj/la_oenb[49] mprj/la_oenb[50] mprj/la_oenb[51] mprj/la_oenb[52] + mprj/la_oenb[53] mprj/la_oenb[54] mprj/la_oenb[55] mprj/la_oenb[56] mprj/la_oenb[57] + mprj/la_oenb[58] mprj/la_oenb[59] mprj/la_oenb[60] mprj/la_oenb[61] mprj/la_oenb[62] + mprj/la_oenb[63] mprj/la_oenb[64] mprj/la_oenb[65] mprj/la_oenb[66] mprj/la_data_in[61] + mprj/la_data_in[62] mprj/la_data_in[63] mprj/la_data_in[64] mprj/la_data_in[65] + mprj/la_data_in[66] mprj/la_data_out[64] mprj/la_data_out[65] mprj/la_data_out[66] + mprj/la_data_out[61] mprj/la_data_out[62] mprj/la_data_out[63] mprj/la_data_in[47] + mprj/la_data_in[48] mprj/la_data_in[49] mprj/la_data_in[50] mprj/la_data_in[51] + mprj/la_data_in[52] mprj/la_data_in[53] mprj/la_data_in[54] mprj/la_data_out[47] + mprj/la_data_out[48] mprj/la_data_out[49] mprj/la_data_out[50] mprj/la_data_out[51] + mprj/la_data_out[52] mprj/la_data_out[53] mprj/la_data_out[54] mprj/la_data_out[55] + mprj/la_data_out[56] mprj/la_data_out[57] mprj/la_data_out[58] mprj/la_data_out[59] + mprj/la_data_out[60] mprj/la_data_in[37] mprj/la_data_in[38] mprj/la_data_in[39] + mprj/la_data_in[40] mprj/la_data_in[41] mprj/la_data_out[26] mprj/la_data_out[27] + mprj/la_data_out[28] mprj/la_data_out[29] mprj/la_data_out[30] mprj/la_data_out[31] + mprj/la_data_out[32] mprj/la_data_out[33] mprj/la_data_out[34] mprj/la_data_out[35] + mprj/la_data_out[36] mprj/la_data_out[37] mprj/la_data_out[38] mprj/la_data_out[39] + mprj/la_oenb[26] mprj/la_oenb[27] mprj/la_oenb[28] mprj/la_oenb[29] mprj/la_oenb[30] + mprj/la_oenb[31] mprj/la_oenb[32] mprj/la_oenb[33] mprj/la_oenb[34] mprj/la_oenb[35] + mprj/la_oenb[36] mprj/la_oenb[37] mprj/la_oenb[38] mprj/la_oenb[39] mprj/la_oenb[40] + mprj/la_oenb[41] mprj/la_oenb[42] mprj/la_oenb[43] mprj/la_oenb[44] mprj/la_oenb[45] + mprj/la_data_out[40] mprj/la_data_out[41] mprj/la_data_out[42] mprj/la_data_out[43] + mprj/la_data_out[44] mprj/la_data_out[45] mprj/la_data_out[46] mprj/la_data_in[42] + mprj/la_data_in[43] mprj/la_data_in[44] mprj/la_data_in[45] mprj/la_data_in[46] + mprj/la_data_in[26] mprj/la_data_in[27] mprj/la_data_in[28] mprj/la_data_in[29] + mprj/la_data_in[30] mprj/la_data_in[31] mprj/la_data_in[32] mprj/la_data_in[33] + mprj/la_data_in[34] mprj/la_data_in[35] mprj/la_data_in[36] mprj/la_data_out[17] + mprj/la_data_out[18] mprj/la_data_out[19] mprj/la_data_out[20] mprj/la_data_out[21] + mprj/la_data_out[22] mprj/la_data_out[23] mprj/la_oenb[12] mprj/la_oenb[13] mprj/la_oenb[14] + mprj/la_oenb[15] mprj/la_oenb[16] mprj/la_oenb[17] mprj/la_oenb[18] mprj/la_oenb[19] + mprj/la_oenb[20] mprj/la_oenb[21] mprj/la_oenb[22] mprj/la_oenb[23] mprj/la_oenb[24] + mprj/la_oenb[25] mprj/la_data_in[11] mprj/la_oenb[5] mprj/la_data_in[8] mprj/la_data_in[10] + mprj/la_data_in[12] mprj/la_data_in[13] mprj/la_data_in[14] mprj/la_data_in[15] + mprj/la_data_in[16] mprj/la_oenb[6] mprj/la_data_in[17] mprj/la_data_in[18] mprj/la_data_in[19] + mprj/la_data_in[9] mprj/la_data_in[20] mprj/la_data_out[6] mprj/la_data_in[21] mprj/la_oenb[7] + mprj/la_data_in[22] mprj/la_data_in[23] mprj/la_data_in[24] mprj/la_data_in[25] + mprj/la_oenb[10] mprj/la_data_out[24] mprj/la_data_out[10] mprj/la_data_out[25] + mprj/la_data_in[7] mprj/la_data_out[7] mprj/la_oenb[8] mprj/la_data_in[6] mprj/la_data_out[12] + mprj/la_data_out[13] mprj/la_data_out[14] mprj/la_data_out[9] mprj/la_data_out[15] + mprj/la_data_out[16] mprj/la_data_out[11] mprj/la_oenb[11] mprj/la_oenb[9] mprj/la_data_out[8] + mprj/la_data_out[1] mprj/la_data_in[0] mprj/la_oenb[2] mprj/la_data_out[0] mprj/la_data_in[1] + mprj/la_data_in[2] mprj/la_oenb[0] mprj/la_data_in[5] mprj/la_data_in[4] mprj/la_oenb[1] + mprj/la_data_in[3] mprj/la_oenb[3] mprj/la_data_out[5] mprj/la_data_out[4] mprj/la_data_out[3] + mprj/la_data_out[2] mprj/wbs_adr_i[18] mprj/wbs_adr_i[19] mprj/wbs_adr_i[20] mprj/wbs_adr_i[21] + mprj/wbs_adr_i[22] mprj/wbs_adr_i[23] mprj/wbs_adr_i[24] mprj/wbs_adr_i[25] mprj/wbs_adr_i[26] + mprj/wbs_adr_i[27] mprj/wbs_adr_i[28] mprj/wbs_adr_i[29] mprj/wbs_adr_i[30] mprj/wbs_adr_i[31] + mprj/wbs_dat_o[17] mprj/wbs_dat_o[18] mprj/wbs_dat_o[19] mprj/wbs_dat_o[20] mprj/wbs_dat_o[21] + mprj/wbs_dat_o[22] mprj/wbs_dat_o[23] mprj/wbs_dat_o[24] mprj/wbs_dat_o[25] mprj/wbs_dat_o[26] + mprj/wbs_dat_o[27] mprj/wbs_dat_o[28] mprj/wbs_dat_o[29] mprj/wbs_dat_o[30] mprj/wbs_dat_o[31] + mprj/wbs_dat_i[17] mprj/wbs_dat_i[18] mprj/wbs_dat_i[19] mprj/wbs_dat_i[20] mprj/wbs_dat_i[21] + mprj/wbs_dat_i[22] mprj/wbs_dat_i[23] mprj/wbs_dat_i[24] mprj/wbs_dat_i[25] mprj/wbs_dat_i[26] + mprj/wbs_dat_i[27] mprj/wbs_dat_i[28] mprj/wbs_dat_i[29] mprj/wbs_dat_i[30] mprj/wbs_dat_i[31] + mprj/la_oenb[4] mprj/wbs_dat_o[1] mprj/wbs_adr_i[14] mprj/wbs_adr_i[15] mprj/wbs_adr_i[16] + mprj/wbs_adr_i[17] mprj/wbs_ack_o mprj/wbs_adr_i[0] mprj/wbs_adr_i[2] mprj/wbs_adr_i[1] + mprj/wbs_adr_i[10] mprj/wbs_adr_i[3] mprj/wbs_dat_o[2] mprj/wbs_adr_i[4] mprj/wbs_adr_i[5] + mprj/wbs_dat_o[3] mprj/wbs_dat_o[4] mprj/wbs_dat_o[5] mprj/wbs_dat_o[6] mprj/wbs_dat_o[7] + mprj/wbs_dat_o[8] mprj/wbs_dat_o[9] mprj/wbs_dat_i[0] mprj/wbs_dat_i[10] mprj/wbs_dat_i[11] + mprj/wbs_dat_i[12] mprj/wbs_dat_i[13] mprj/wbs_dat_i[14] mprj/wbs_dat_i[15] mprj/wbs_dat_i[16] + mprj/wbs_adr_i[6] mprj/wbs_adr_i[7] mprj/wbs_adr_i[8] mprj/wbs_dat_i[1] mprj/wbs_adr_i[9] + mprj/wbs_cyc_i mprj/wbs_dat_o[0] mprj/wbs_dat_o[10] mprj/wbs_dat_o[11] mprj/wbs_dat_o[12] + mprj/wbs_dat_o[13] mprj/wbs_dat_o[14] mprj/wbs_dat_o[15] mprj/wbs_dat_o[16] mprj/wbs_dat_i[2] + mprj/wbs_adr_i[11] mprj/wbs_adr_i[12] mprj/wbs_dat_i[3] mprj/wbs_dat_i[4] mprj/wbs_dat_i[5] + mprj/wbs_dat_i[6] mprj/wbs_dat_i[7] mprj/wbs_dat_i[8] mprj/wbs_dat_i[9] mprj/wbs_sel_i[0] + mprj/wbs_sel_i[1] mprj/wbs_sel_i[2] mprj/wbs_sel_i[3] mprj/wbs_stb_i mprj/wbs_we_i + mprj/wb_clk_i mprj/wbs_adr_i[13] mprj/wb_rst_i soc/la_input[5] soc/la_input[6] soc/la_input[7] + soc/la_input[8] soc/la_input[9] soc/la_input[0] soc/la_input[10] soc/la_input[11] + soc/la_input[12] soc/la_input[13] soc/la_input[14] soc/la_input[15] soc/la_input[16] + soc/la_input[17] soc/la_input[18] soc/la_input[1] soc/la_input[2] soc/la_input[3] + soc/la_input[4] soc/la_output[0] soc/la_output[10] soc/la_output[11] soc/la_output[12] + soc/la_output[13] soc/la_output[14] soc/la_output[15] soc/la_output[16] soc/la_output[17] + soc/la_output[1] soc/la_output[2] soc/la_output[3] soc/la_output[4] soc/la_oenb[0] + soc/la_oenb[10] soc/la_oenb[11] soc/la_oenb[12] soc/la_oenb[13] soc/la_oenb[14] + soc/la_oenb[15] soc/la_oenb[16] soc/la_oenb[17] soc/la_oenb[1] soc/la_oenb[2] soc/la_oenb[3] + soc/la_oenb[4] soc/la_oenb[5] soc/la_oenb[6] soc/la_oenb[7] soc/la_oenb[8] soc/la_oenb[9] + soc/la_output[5] soc/la_output[6] soc/la_output[7] soc/la_output[8] soc/la_output[9] + soc/la_iena[0] soc/la_iena[10] soc/la_iena[11] soc/la_iena[12] soc/la_iena[13] soc/la_iena[14] + soc/la_iena[15] soc/la_iena[16] soc/la_iena[17] soc/la_iena[1] soc/la_iena[2] soc/la_iena[3] + soc/la_iena[4] soc/la_iena[5] soc/la_iena[6] soc/la_iena[7] soc/la_iena[8] soc/la_iena[9] + soc/la_input[36] soc/la_input[37] soc/la_input[20] soc/la_input[21] soc/la_input[22] + soc/la_input[23] soc/la_input[24] soc/la_oenb[18] soc/la_oenb[19] soc/la_input[25] + soc/la_oenb[20] soc/la_oenb[21] soc/la_oenb[22] soc/la_oenb[23] soc/la_oenb[24] + soc/la_oenb[25] soc/la_oenb[26] soc/la_oenb[27] soc/la_oenb[28] soc/la_oenb[29] + soc/la_input[26] soc/la_oenb[30] soc/la_oenb[31] soc/la_oenb[32] soc/la_oenb[33] + soc/la_oenb[34] soc/la_oenb[35] soc/la_oenb[36] soc/la_oenb[37] soc/la_input[27] + soc/la_input[28] soc/la_input[29] soc/la_input[19] soc/la_output[18] soc/la_output[19] + soc/la_input[30] soc/la_output[20] soc/la_output[21] soc/la_output[22] soc/la_output[23] + soc/la_output[24] soc/la_output[25] soc/la_output[26] soc/la_output[27] soc/la_output[28] + soc/la_output[29] soc/la_input[31] soc/la_output[30] soc/la_output[31] soc/la_output[32] + soc/la_iena[18] soc/la_iena[19] soc/la_output[33] soc/la_iena[20] soc/la_iena[21] + soc/la_iena[22] soc/la_iena[23] soc/la_iena[24] soc/la_iena[25] soc/la_iena[26] + soc/la_iena[27] soc/la_iena[28] soc/la_iena[29] soc/la_output[34] soc/la_iena[30] + soc/la_iena[31] soc/la_iena[32] soc/la_iena[33] soc/la_iena[34] soc/la_iena[35] + soc/la_iena[36] soc/la_iena[37] soc/la_output[35] soc/la_output[36] soc/la_output[37] + soc/la_input[32] soc/la_input[33] soc/la_input[34] soc/la_input[35] soc/la_input[38] + soc/la_input[39] soc/la_oenb[38] soc/la_oenb[39] soc/la_oenb[40] soc/la_oenb[41] + soc/la_oenb[42] soc/la_oenb[43] soc/la_oenb[44] soc/la_oenb[45] soc/la_oenb[46] + soc/la_oenb[47] soc/la_oenb[48] soc/la_oenb[49] soc/la_input[40] soc/la_oenb[50] + soc/la_oenb[51] soc/la_oenb[52] soc/la_oenb[53] soc/la_oenb[54] soc/la_oenb[55] + soc/la_oenb[56] soc/la_input[41] soc/la_input[42] soc/la_input[43] soc/la_input[44] + soc/la_output[38] soc/la_output[54] soc/la_output[55] soc/la_output[56] soc/la_output[57] + soc/la_output[39] soc/la_input[45] soc/la_output[40] soc/la_output[41] soc/la_output[42] + soc/la_output[43] soc/la_output[44] soc/la_output[45] soc/la_output[46] soc/la_output[47] + soc/la_output[48] soc/la_output[49] soc/la_input[46] soc/la_output[50] soc/la_output[51] + soc/la_output[52] soc/la_output[53] soc/la_input[47] soc/la_input[48] soc/la_input[49] + soc/la_input[50] soc/la_input[51] soc/la_input[55] soc/la_input[56] soc/la_iena[38] + soc/la_iena[39] soc/la_input[57] soc/la_iena[40] soc/la_iena[41] soc/la_iena[42] + soc/la_iena[43] soc/la_iena[44] soc/la_iena[45] soc/la_iena[46] soc/la_iena[47] + soc/la_iena[48] soc/la_iena[49] soc/la_iena[50] soc/la_iena[51] soc/la_iena[52] + soc/la_iena[53] soc/la_iena[54] soc/la_iena[55] soc/la_iena[56] soc/la_iena[57] + soc/la_input[54] soc/la_input[52] soc/la_input[53] soc/la_oenb[66] soc/la_oenb[67] + soc/la_oenb[68] soc/la_oenb[69] soc/la_input[64] soc/la_oenb[70] soc/la_oenb[71] + soc/la_oenb[72] soc/la_oenb[73] soc/la_oenb[74] soc/la_oenb[75] soc/la_oenb[76] + soc/la_input[62] soc/la_input[63] soc/la_oenb[57] soc/la_input[65] soc/la_oenb[58] + soc/la_oenb[59] soc/la_input[66] soc/la_input[67] soc/la_input[68] soc/la_input[69] + soc/la_input[61] soc/la_input[70] soc/la_input[71] soc/la_input[72] soc/la_input[73] + soc/la_input[74] soc/la_input[75] soc/la_input[76] soc/la_oenb[60] soc/la_output[58] + soc/la_output[59] soc/la_oenb[61] soc/la_output[60] soc/la_output[61] soc/la_output[62] + soc/la_output[63] soc/la_output[64] soc/la_output[65] soc/la_output[66] soc/la_output[67] + soc/la_output[68] soc/la_output[69] soc/la_input[58] soc/la_oenb[62] soc/la_output[70] + soc/la_output[71] soc/la_output[72] soc/la_output[73] soc/la_output[74] soc/la_output[75] + soc/la_output[76] soc/la_iena[58] soc/la_iena[59] soc/clk_out soc/la_iena[60] soc/la_iena[61] + soc/la_iena[62] soc/la_iena[63] soc/la_iena[64] soc/la_iena[65] soc/la_iena[66] + soc/la_iena[67] soc/la_iena[68] soc/la_iena[69] soc/resetn_out soc/la_iena[70] soc/la_iena[71] + soc/la_iena[72] soc/la_iena[73] soc/la_iena[74] soc/la_iena[75] soc/la_iena[76] + soc/la_input[59] soc/la_oenb[63] soc/la_input[60] soc/la_oenb[64] soc/la_oenb[65] + soc/la_iena[80] soc/la_iena[81] soc/la_iena[82] soc/la_iena[83] soc/la_iena[84] + soc/la_iena[85] soc/la_iena[86] soc/la_iena[87] soc/la_iena[88] soc/la_iena[89] + soc/la_iena[90] soc/la_iena[91] soc/la_iena[92] soc/la_iena[93] soc/la_iena[94] + soc/la_iena[95] soc/la_output[77] soc/la_output[78] soc/la_output[79] soc/la_output[80] + soc/la_output[81] soc/la_output[82] soc/la_output[83] soc/la_output[84] soc/la_output[85] + soc/la_output[86] soc/la_output[87] soc/la_output[88] soc/la_output[89] soc/la_output[90] + soc/la_output[91] soc/la_output[92] soc/la_output[93] soc/la_output[94] soc/la_output[95] + soc/la_output[96] soc/la_oenb[77] soc/la_oenb[78] soc/la_oenb[79] soc/la_oenb[80] + soc/la_oenb[81] soc/la_oenb[82] soc/la_oenb[83] soc/la_oenb[84] soc/la_oenb[85] + soc/la_oenb[86] soc/la_oenb[87] soc/la_oenb[88] soc/la_oenb[89] soc/la_oenb[90] + soc/la_oenb[91] soc/la_oenb[92] soc/la_oenb[93] soc/la_oenb[94] soc/la_oenb[95] + soc/la_input[80] soc/la_input[81] soc/la_input[82] soc/la_input[83] soc/la_input[84] + soc/la_input[85] soc/la_input[86] soc/la_input[87] soc/la_input[88] soc/la_input[89] + soc/la_input[90] soc/la_input[91] soc/la_input[92] soc/la_input[93] soc/la_input[94] + soc/la_input[95] soc/la_input[96] soc/la_input[77] soc/la_input[78] soc/la_input[79] + soc/la_iena[77] soc/la_iena[78] soc/la_iena[79] soc/la_iena[110] soc/la_oenb[96] + soc/la_oenb[97] soc/la_oenb[98] soc/la_oenb[99] soc/la_iena[111] soc/la_iena[112] + soc/la_iena[113] soc/la_iena[114] soc/la_iena[115] soc/la_input[116] soc/la_iena[96] + soc/la_iena[97] soc/la_iena[98] soc/la_iena[99] soc/la_output[97] soc/la_output[98] + soc/la_output[99] soc/la_iena[100] soc/la_iena[101] soc/la_iena[102] soc/la_iena[103] + soc/la_input[97] soc/la_input[98] soc/la_input[99] soc/la_input[101] soc/la_input[102] + soc/la_input[103] soc/la_input[104] soc/la_input[105] soc/la_input[106] soc/la_input[107] + soc/la_input[108] soc/la_input[109] soc/la_input[100] soc/la_input[110] soc/la_input[111] + soc/la_input[112] soc/la_input[113] soc/la_input[114] soc/la_input[115] soc/la_iena[104] + soc/la_iena[105] soc/la_output[100] soc/la_output[101] soc/la_output[102] soc/la_output[103] + soc/la_output[104] soc/la_output[105] soc/la_output[106] soc/la_output[107] soc/la_output[108] + soc/la_output[109] soc/la_iena[106] soc/la_output[110] soc/la_output[111] soc/la_output[112] + soc/la_output[113] soc/la_output[114] soc/la_output[115] soc/la_iena[107] soc/la_iena[108] + soc/la_oenb[100] soc/la_oenb[101] soc/la_oenb[102] soc/la_oenb[103] soc/la_oenb[104] + soc/la_oenb[105] soc/la_oenb[106] soc/la_oenb[107] soc/la_oenb[108] soc/la_oenb[109] + soc/la_iena[109] soc/la_oenb[110] soc/la_oenb[111] soc/la_oenb[112] soc/la_oenb[113] + soc/la_oenb[114] soc/la_oenb[115] soc/la_input[118] soc/la_input[119] soc/la_input[120] + soc/la_input[121] soc/la_input[122] soc/mprj_cyc_o soc/la_input[123] soc/mprj_dat_i[0] + soc/mprj_dat_i[1] soc/mprj_dat_i[2] soc/mprj_dat_i[3] soc/mprj_dat_i[4] soc/mprj_dat_i[5] + soc/mprj_dat_i[6] soc/mprj_dat_i[7] soc/la_input[124] soc/la_input[125] soc/la_input[126] + soc/la_input[127] soc/mprj_adr_o[1] soc/mprj_adr_o[2] soc/mprj_adr_o[3] soc/mprj_adr_o[4] + soc/mprj_adr_o[5] soc/mprj_adr_o[6] soc/mprj_adr_o[7] soc/la_iena[125] soc/mprj_dat_o[0] + soc/mprj_dat_o[1] soc/mprj_dat_o[2] soc/mprj_dat_o[3] soc/mprj_dat_o[4] soc/mprj_dat_o[5] + soc/mprj_dat_o[6] soc/mprj_dat_o[7] soc/la_iena[126] soc/la_iena[127] soc/la_output[126] + soc/la_output[127] soc/la_output[123] soc/la_output[120] soc/la_output[116] soc/la_output[117] + soc/la_output[118] soc/la_iena[122] soc/la_output[121] soc/la_iena[121] soc/la_output[124] + soc/la_output[122] soc/la_iena[116] soc/la_iena[117] soc/la_iena[118] soc/la_input[117] + soc/la_iena[119] soc/la_output[125] soc/la_iena[120] soc/la_iena[123] soc/mprj_ack_i + soc/la_iena[124] soc/mprj_adr_o[0] soc/la_oenb[116] soc/la_oenb[117] soc/la_oenb[118] + soc/la_oenb[119] soc/mprj_sel_o[0] soc/mprj_sel_o[1] soc/mprj_sel_o[2] soc/mprj_sel_o[3] + soc/la_output[119] soc/la_oenb[120] soc/la_oenb[121] soc/la_oenb[122] soc/mprj_stb_o + soc/la_oenb[123] soc/mprj_we_o soc/la_oenb[124] soc/la_oenb[125] soc/la_oenb[126] + soc/la_oenb[127] soc/mprj_dat_o[16] soc/mprj_dat_o[17] soc/mprj_dat_o[18] soc/mprj_dat_o[19] + soc/mprj_dat_i[28] soc/mprj_dat_o[20] soc/mprj_dat_o[21] soc/mprj_dat_o[22] soc/mprj_dat_o[23] + soc/mprj_dat_o[24] soc/mprj_dat_o[25] soc/mprj_dat_o[26] soc/mprj_dat_o[27] soc/mprj_dat_o[28] + soc/mprj_dat_o[29] soc/mprj_dat_i[29] soc/mprj_dat_o[30] soc/mprj_dat_o[31] soc/mprj_dat_i[10] + soc/mprj_dat_i[30] soc/mprj_dat_i[31] soc/mprj_dat_i[11] soc/mprj_dat_i[12] soc/mprj_dat_o[8] + soc/mprj_dat_o[9] soc/mprj_dat_i[13] soc/mprj_dat_i[14] soc/mprj_dat_i[15] soc/mprj_dat_i[8] + soc/mprj_dat_i[9] soc/mprj_dat_i[16] soc/mprj_dat_i[17] soc/mprj_dat_i[18] soc/mprj_dat_i[19] + soc/mprj_adr_o[14] soc/mprj_adr_o[15] soc/mprj_adr_o[16] soc/mprj_adr_o[17] soc/mprj_adr_o[18] + soc/mprj_adr_o[19] soc/mprj_adr_o[13] soc/mprj_adr_o[20] soc/mprj_adr_o[21] soc/mprj_adr_o[22] + soc/mprj_adr_o[23] soc/mprj_adr_o[24] soc/mprj_adr_o[25] soc/mprj_adr_o[26] soc/mprj_adr_o[27] + soc/mprj_adr_o[28] soc/mprj_adr_o[10] soc/mprj_adr_o[11] soc/mprj_adr_o[12] soc/mprj_adr_o[29] + soc/mprj_dat_i[20] soc/mprj_adr_o[30] soc/mprj_adr_o[31] soc/mprj_wb_iena soc/mprj_dat_i[21] + soc/mprj_dat_i[22] soc/mprj_dat_i[23] soc/mprj_dat_i[24] soc/mprj_dat_i[25] soc/mprj_adr_o[8] + soc/mprj_adr_o[9] soc/mprj_dat_i[26] soc/mprj_dat_i[27] soc/mprj_dat_o[10] soc/mprj_dat_o[11] + soc/mprj_dat_o[12] soc/mprj_dat_o[13] soc/mprj_dat_o[14] soc/mprj_dat_o[15] mprj/vccd1 + mprj/vccd2 mprj/vdda1 mprj/vdda2 mprj/vssa1 mprj/vssa2 mprj/vssd2 soc/VPWR VSUBS + mprj/vssd1 mgmt_protect Xgpio_control_in_1a\[4\] gpio_defaults_block_6/gpio_defaults[0] gpio_defaults_block_6/gpio_defaults[10] + gpio_defaults_block_6/gpio_defaults[11] gpio_defaults_block_6/gpio_defaults[12] + gpio_defaults_block_6/gpio_defaults[1] gpio_defaults_block_6/gpio_defaults[2] gpio_defaults_block_6/gpio_defaults[3] + gpio_defaults_block_6/gpio_defaults[4] gpio_defaults_block_6/gpio_defaults[5] gpio_defaults_block_6/gpio_defaults[6] + gpio_defaults_block_6/gpio_defaults[7] gpio_defaults_block_6/gpio_defaults[8] gpio_defaults_block_6/gpio_defaults[9] + housekeeping/mgmt_gpio_in[6] padframe/mprj_io_one[6] housekeeping/mgmt_gpio_out[6] + padframe/mprj_io_one[6] padframe/mprj_io_analog_en[6] padframe/mprj_io_analog_pol[6] + padframe/mprj_io_analog_sel[6] padframe/mprj_io_dm[18] padframe/mprj_io_dm[19] padframe/mprj_io_dm[20] + padframe/mprj_io_holdover[6] padframe/mprj_io_ib_mode_sel[6] padframe/mprj_io_in[6] + padframe/mprj_io_inp_dis[6] padframe/mprj_io_out[6] padframe/mprj_io_oeb[6] padframe/mprj_io_slow_sel[6] + padframe/mprj_io_vtrip_sel[6] gpio_control_in_1a\[4\]/resetn gpio_control_in_1a\[5\]/resetn + gpio_control_in_1a\[4\]/serial_clock gpio_control_in_1a\[5\]/serial_clock gpio_control_in_1a\[4\]/serial_data_in + gpio_control_in_1a\[5\]/serial_data_in gpio_control_in_1a\[4\]/serial_load gpio_control_in_1a\[5\]/serial_load + mprj/io_in[6] mprj/io_oeb[6] mprj/io_out[6] soc/VPWR mprj/vccd1 gpio_control_in_1a\[4\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_control_bidir_2\[1\] gpio_defaults_block_36/gpio_defaults[0] gpio_defaults_block_36/gpio_defaults[10] + gpio_defaults_block_36/gpio_defaults[11] gpio_defaults_block_36/gpio_defaults[12] + gpio_defaults_block_36/gpio_defaults[1] gpio_defaults_block_36/gpio_defaults[2] + gpio_defaults_block_36/gpio_defaults[3] gpio_defaults_block_36/gpio_defaults[4] + gpio_defaults_block_36/gpio_defaults[5] gpio_defaults_block_36/gpio_defaults[6] + gpio_defaults_block_36/gpio_defaults[7] gpio_defaults_block_36/gpio_defaults[8] + gpio_defaults_block_36/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[29] sigbuf/mgmt_io_oeb_buf[1] + sigbuf/mgmt_io_out_buf[29] padframe/mprj_io_one[36] padframe/mprj_io_analog_en[36] + padframe/mprj_io_analog_pol[36] padframe/mprj_io_analog_sel[36] padframe/mprj_io_dm[108] + padframe/mprj_io_dm[109] padframe/mprj_io_dm[110] padframe/mprj_io_holdover[36] + padframe/mprj_io_ib_mode_sel[36] padframe/mprj_io_in[36] padframe/mprj_io_inp_dis[36] + padframe/mprj_io_out[36] padframe/mprj_io_oeb[36] padframe/mprj_io_slow_sel[36] + padframe/mprj_io_vtrip_sel[36] gpio_control_bidir_2\[1\]/resetn gpio_control_bidir_2\[0\]/resetn + gpio_control_bidir_2\[1\]/serial_clock gpio_control_bidir_2\[0\]/serial_clock gpio_control_bidir_2\[1\]/serial_data_in + gpio_control_bidir_2\[0\]/serial_data_in gpio_control_bidir_2\[1\]/serial_load gpio_control_bidir_2\[0\]/serial_load + mprj/io_in[36] mprj/io_oeb[36] mprj/io_out[36] soc/VPWR mprj/vccd1 gpio_control_bidir_2\[1\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[15\] gpio_defaults_block_34/gpio_defaults[0] gpio_defaults_block_34/gpio_defaults[10] + gpio_defaults_block_34/gpio_defaults[11] gpio_defaults_block_34/gpio_defaults[12] + gpio_defaults_block_34/gpio_defaults[1] gpio_defaults_block_34/gpio_defaults[2] + gpio_defaults_block_34/gpio_defaults[3] gpio_defaults_block_34/gpio_defaults[4] + gpio_defaults_block_34/gpio_defaults[5] gpio_defaults_block_34/gpio_defaults[6] + gpio_defaults_block_34/gpio_defaults[7] gpio_defaults_block_34/gpio_defaults[8] + gpio_defaults_block_34/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[27] padframe/mprj_io_one[34] + sigbuf/mgmt_io_out_buf[27] padframe/mprj_io_one[34] padframe/mprj_io_analog_en[34] + padframe/mprj_io_analog_pol[34] padframe/mprj_io_analog_sel[34] padframe/mprj_io_dm[102] + padframe/mprj_io_dm[103] padframe/mprj_io_dm[104] padframe/mprj_io_holdover[34] + padframe/mprj_io_ib_mode_sel[34] padframe/mprj_io_in[34] padframe/mprj_io_inp_dis[34] + padframe/mprj_io_out[34] padframe/mprj_io_oeb[34] padframe/mprj_io_slow_sel[34] + padframe/mprj_io_vtrip_sel[34] gpio_control_in_2\[15\]/resetn gpio_control_in_2\[14\]/resetn + gpio_control_in_2\[15\]/serial_clock gpio_control_in_2\[14\]/serial_clock gpio_control_in_2\[15\]/serial_data_in + gpio_control_in_2\[14\]/serial_data_in gpio_control_in_2\[15\]/serial_load gpio_control_in_2\[14\]/serial_load + mprj/io_in[34] mprj/io_oeb[34] mprj/io_out[34] soc/VPWR mprj/vccd1 gpio_control_in_2\[15\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_9 soc/VPWR gpio_defaults_block_9/gpio_defaults[0] gpio_defaults_block_9/gpio_defaults[10] + gpio_defaults_block_9/gpio_defaults[11] gpio_defaults_block_9/gpio_defaults[12] + gpio_defaults_block_9/gpio_defaults[1] gpio_defaults_block_9/gpio_defaults[2] gpio_defaults_block_9/gpio_defaults[3] + gpio_defaults_block_9/gpio_defaults[4] gpio_defaults_block_9/gpio_defaults[5] gpio_defaults_block_9/gpio_defaults[6] + gpio_defaults_block_9/gpio_defaults[7] gpio_defaults_block_9/gpio_defaults[8] gpio_defaults_block_9/gpio_defaults[9] + VSUBS gpio_defaults_block_0403 Xgpio_control_in_1\[5\] gpio_defaults_block_13/gpio_defaults[0] gpio_defaults_block_13/gpio_defaults[10] + gpio_defaults_block_13/gpio_defaults[11] gpio_defaults_block_13/gpio_defaults[12] + gpio_defaults_block_13/gpio_defaults[1] gpio_defaults_block_13/gpio_defaults[2] + gpio_defaults_block_13/gpio_defaults[3] gpio_defaults_block_13/gpio_defaults[4] + gpio_defaults_block_13/gpio_defaults[5] gpio_defaults_block_13/gpio_defaults[6] + gpio_defaults_block_13/gpio_defaults[7] gpio_defaults_block_13/gpio_defaults[8] + gpio_defaults_block_13/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[6] padframe/mprj_io_one[13] + sigbuf/mgmt_io_out_buf[6] padframe/mprj_io_one[13] padframe/mprj_io_analog_en[13] + padframe/mprj_io_analog_pol[13] padframe/mprj_io_analog_sel[13] padframe/mprj_io_dm[39] + padframe/mprj_io_dm[40] padframe/mprj_io_dm[41] padframe/mprj_io_holdover[13] padframe/mprj_io_ib_mode_sel[13] + padframe/mprj_io_in[13] padframe/mprj_io_inp_dis[13] padframe/mprj_io_out[13] padframe/mprj_io_oeb[13] + padframe/mprj_io_slow_sel[13] padframe/mprj_io_vtrip_sel[13] gpio_control_in_1\[5\]/resetn + gpio_control_in_1\[6\]/resetn gpio_control_in_1\[5\]/serial_clock gpio_control_in_1\[6\]/serial_clock + gpio_control_in_1\[5\]/serial_data_in gpio_control_in_1\[6\]/serial_data_in gpio_control_in_1\[5\]/serial_load + gpio_control_in_1\[6\]/serial_load mprj/io_in[13] mprj/io_oeb[13] mprj/io_out[13] + soc/VPWR mprj/vccd1 gpio_control_in_1\[5\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_1a\[2\] gpio_defaults_block_4/gpio_defaults[0] gpio_defaults_block_4/gpio_defaults[10] + gpio_defaults_block_4/gpio_defaults[11] gpio_defaults_block_4/gpio_defaults[12] + gpio_defaults_block_4/gpio_defaults[1] gpio_defaults_block_4/gpio_defaults[2] gpio_defaults_block_4/gpio_defaults[3] + gpio_defaults_block_4/gpio_defaults[4] gpio_defaults_block_4/gpio_defaults[5] gpio_defaults_block_4/gpio_defaults[6] + gpio_defaults_block_4/gpio_defaults[7] gpio_defaults_block_4/gpio_defaults[8] gpio_defaults_block_4/gpio_defaults[9] + housekeeping/mgmt_gpio_in[4] padframe/mprj_io_one[4] housekeeping/mgmt_gpio_out[4] + padframe/mprj_io_one[4] padframe/mprj_io_analog_en[4] padframe/mprj_io_analog_pol[4] + padframe/mprj_io_analog_sel[4] padframe/mprj_io_dm[12] padframe/mprj_io_dm[13] padframe/mprj_io_dm[14] + padframe/mprj_io_holdover[4] padframe/mprj_io_ib_mode_sel[4] padframe/mprj_io_in[4] + padframe/mprj_io_inp_dis[4] padframe/mprj_io_out[4] padframe/mprj_io_oeb[4] padframe/mprj_io_slow_sel[4] + padframe/mprj_io_vtrip_sel[4] gpio_control_in_1a\[2\]/resetn gpio_control_in_1a\[3\]/resetn + gpio_control_in_1a\[2\]/serial_clock gpio_control_in_1a\[3\]/serial_clock gpio_control_in_1a\[2\]/serial_data_in + gpio_control_in_1a\[3\]/serial_data_in gpio_control_in_1a\[2\]/serial_load gpio_control_in_1a\[3\]/serial_load + mprj/io_in[4] mprj/io_oeb[4] mprj/io_out[4] soc/VPWR mprj/vccd1 gpio_control_in_1a\[2\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[13\] gpio_defaults_block_32/gpio_defaults[0] gpio_defaults_block_32/gpio_defaults[10] + gpio_defaults_block_32/gpio_defaults[11] gpio_defaults_block_32/gpio_defaults[12] + gpio_defaults_block_32/gpio_defaults[1] gpio_defaults_block_32/gpio_defaults[2] + gpio_defaults_block_32/gpio_defaults[3] gpio_defaults_block_32/gpio_defaults[4] + gpio_defaults_block_32/gpio_defaults[5] gpio_defaults_block_32/gpio_defaults[6] + gpio_defaults_block_32/gpio_defaults[7] gpio_defaults_block_32/gpio_defaults[8] + gpio_defaults_block_32/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[25] padframe/mprj_io_one[32] + sigbuf/mgmt_io_out_buf[25] padframe/mprj_io_one[32] padframe/mprj_io_analog_en[32] + padframe/mprj_io_analog_pol[32] padframe/mprj_io_analog_sel[32] padframe/mprj_io_dm[96] + padframe/mprj_io_dm[97] padframe/mprj_io_dm[98] padframe/mprj_io_holdover[32] padframe/mprj_io_ib_mode_sel[32] + padframe/mprj_io_in[32] padframe/mprj_io_inp_dis[32] padframe/mprj_io_out[32] padframe/mprj_io_oeb[32] + padframe/mprj_io_slow_sel[32] padframe/mprj_io_vtrip_sel[32] gpio_control_in_2\[13\]/resetn + gpio_control_in_2\[12\]/resetn gpio_control_in_2\[13\]/serial_clock gpio_control_in_2\[12\]/serial_clock + gpio_control_in_2\[13\]/serial_data_in gpio_control_in_2\[12\]/serial_data_in gpio_control_in_2\[13\]/serial_load + gpio_control_in_2\[12\]/serial_load mprj/io_in[32] mprj/io_oeb[32] mprj/io_out[32] + soc/VPWR mprj/vccd1 gpio_control_in_2\[13\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[8\] gpio_defaults_block_27/gpio_defaults[0] gpio_defaults_block_27/gpio_defaults[10] + gpio_defaults_block_27/gpio_defaults[11] gpio_defaults_block_27/gpio_defaults[12] + gpio_defaults_block_27/gpio_defaults[1] gpio_defaults_block_27/gpio_defaults[2] + gpio_defaults_block_27/gpio_defaults[3] gpio_defaults_block_27/gpio_defaults[4] + gpio_defaults_block_27/gpio_defaults[5] gpio_defaults_block_27/gpio_defaults[6] + gpio_defaults_block_27/gpio_defaults[7] gpio_defaults_block_27/gpio_defaults[8] + gpio_defaults_block_27/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[20] padframe/mprj_io_one[27] + sigbuf/mgmt_io_out_buf[20] padframe/mprj_io_one[27] padframe/mprj_io_analog_en[27] + padframe/mprj_io_analog_pol[27] padframe/mprj_io_analog_sel[27] padframe/mprj_io_dm[81] + padframe/mprj_io_dm[82] padframe/mprj_io_dm[83] padframe/mprj_io_holdover[27] padframe/mprj_io_ib_mode_sel[27] + padframe/mprj_io_in[27] padframe/mprj_io_inp_dis[27] padframe/mprj_io_out[27] padframe/mprj_io_oeb[27] + padframe/mprj_io_slow_sel[27] padframe/mprj_io_vtrip_sel[27] gpio_control_in_2\[8\]/resetn + gpio_control_in_2\[7\]/resetn gpio_control_in_2\[8\]/serial_clock gpio_control_in_2\[7\]/serial_clock + gpio_control_in_2\[8\]/serial_data_in gpio_control_in_2\[7\]/serial_data_in gpio_control_in_2\[8\]/serial_load + gpio_control_in_2\[7\]/serial_load mprj/io_in[27] mprj/io_oeb[27] mprj/io_out[27] + soc/VPWR mprj/vccd1 gpio_control_in_2\[8\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_1\[3\] gpio_defaults_block_11/gpio_defaults[0] gpio_defaults_block_11/gpio_defaults[10] + gpio_defaults_block_11/gpio_defaults[11] gpio_defaults_block_11/gpio_defaults[12] + gpio_defaults_block_11/gpio_defaults[1] gpio_defaults_block_11/gpio_defaults[2] + gpio_defaults_block_11/gpio_defaults[3] gpio_defaults_block_11/gpio_defaults[4] + gpio_defaults_block_11/gpio_defaults[5] gpio_defaults_block_11/gpio_defaults[6] + gpio_defaults_block_11/gpio_defaults[7] gpio_defaults_block_11/gpio_defaults[8] + gpio_defaults_block_11/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[4] padframe/mprj_io_one[11] + sigbuf/mgmt_io_out_buf[4] padframe/mprj_io_one[11] padframe/mprj_io_analog_en[11] + padframe/mprj_io_analog_pol[11] padframe/mprj_io_analog_sel[11] padframe/mprj_io_dm[33] + padframe/mprj_io_dm[34] padframe/mprj_io_dm[35] padframe/mprj_io_holdover[11] padframe/mprj_io_ib_mode_sel[11] + padframe/mprj_io_in[11] padframe/mprj_io_inp_dis[11] padframe/mprj_io_out[11] padframe/mprj_io_oeb[11] + padframe/mprj_io_slow_sel[11] padframe/mprj_io_vtrip_sel[11] gpio_control_in_1\[3\]/resetn + gpio_control_in_1\[4\]/resetn gpio_control_in_1\[3\]/serial_clock gpio_control_in_1\[4\]/serial_clock + gpio_control_in_1\[3\]/serial_data_in gpio_control_in_1\[4\]/serial_data_in gpio_control_in_1\[3\]/serial_load + gpio_control_in_1\[4\]/serial_load mprj/io_in[11] mprj/io_oeb[11] mprj/io_out[11] + soc/VPWR mprj/vccd1 gpio_control_in_1\[3\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_1a\[0\] gpio_defaults_block_2/gpio_defaults[0] gpio_defaults_block_2/gpio_defaults[10] + gpio_defaults_block_2/gpio_defaults[11] gpio_defaults_block_2/gpio_defaults[12] + gpio_defaults_block_2/gpio_defaults[1] gpio_defaults_block_2/gpio_defaults[2] gpio_defaults_block_2/gpio_defaults[3] + gpio_defaults_block_2/gpio_defaults[4] gpio_defaults_block_2/gpio_defaults[5] gpio_defaults_block_2/gpio_defaults[6] + gpio_defaults_block_2/gpio_defaults[7] gpio_defaults_block_2/gpio_defaults[8] gpio_defaults_block_2/gpio_defaults[9] + housekeeping/mgmt_gpio_in[2] padframe/mprj_io_one[2] housekeeping/mgmt_gpio_out[2] + padframe/mprj_io_one[2] padframe/mprj_io_analog_en[2] padframe/mprj_io_analog_pol[2] + padframe/mprj_io_analog_sel[2] padframe/mprj_io_dm[6] padframe/mprj_io_dm[7] padframe/mprj_io_dm[8] + padframe/mprj_io_holdover[2] padframe/mprj_io_ib_mode_sel[2] padframe/mprj_io_in[2] + padframe/mprj_io_inp_dis[2] padframe/mprj_io_out[2] padframe/mprj_io_oeb[2] padframe/mprj_io_slow_sel[2] + padframe/mprj_io_vtrip_sel[2] gpio_control_in_1a\[0\]/resetn gpio_control_in_1a\[1\]/resetn + gpio_control_in_1a\[0\]/serial_clock gpio_control_in_1a\[1\]/serial_clock gpio_control_in_1a\[0\]/serial_data_in + gpio_control_in_1a\[1\]/serial_data_in gpio_control_in_1a\[0\]/serial_load gpio_control_in_1a\[1\]/serial_load + mprj/io_in[2] mprj/io_oeb[2] mprj/io_out[2] soc/VPWR mprj/vccd1 gpio_control_in_1a\[0\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[11\] gpio_defaults_block_30/gpio_defaults[0] gpio_defaults_block_30/gpio_defaults[10] + gpio_defaults_block_30/gpio_defaults[11] gpio_defaults_block_30/gpio_defaults[12] + gpio_defaults_block_30/gpio_defaults[1] gpio_defaults_block_30/gpio_defaults[2] + gpio_defaults_block_30/gpio_defaults[3] gpio_defaults_block_30/gpio_defaults[4] + gpio_defaults_block_30/gpio_defaults[5] gpio_defaults_block_30/gpio_defaults[6] + gpio_defaults_block_30/gpio_defaults[7] gpio_defaults_block_30/gpio_defaults[8] + gpio_defaults_block_30/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[23] padframe/mprj_io_one[30] + sigbuf/mgmt_io_out_buf[23] padframe/mprj_io_one[30] padframe/mprj_io_analog_en[30] + padframe/mprj_io_analog_pol[30] padframe/mprj_io_analog_sel[30] padframe/mprj_io_dm[90] + padframe/mprj_io_dm[91] padframe/mprj_io_dm[92] padframe/mprj_io_holdover[30] padframe/mprj_io_ib_mode_sel[30] + padframe/mprj_io_in[30] padframe/mprj_io_inp_dis[30] padframe/mprj_io_out[30] padframe/mprj_io_oeb[30] + padframe/mprj_io_slow_sel[30] padframe/mprj_io_vtrip_sel[30] gpio_control_in_2\[11\]/resetn + gpio_control_in_2\[10\]/resetn gpio_control_in_2\[11\]/serial_clock gpio_control_in_2\[10\]/serial_clock + gpio_control_in_2\[11\]/serial_data_in gpio_control_in_2\[10\]/serial_data_in gpio_control_in_2\[11\]/serial_load + gpio_control_in_2\[10\]/serial_load mprj/io_in[30] mprj/io_oeb[30] mprj/io_out[30] + soc/VPWR mprj/vccd1 gpio_control_in_2\[11\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_2\[6\] gpio_defaults_block_25/gpio_defaults[0] gpio_defaults_block_25/gpio_defaults[10] + gpio_defaults_block_25/gpio_defaults[11] gpio_defaults_block_25/gpio_defaults[12] + gpio_defaults_block_25/gpio_defaults[1] gpio_defaults_block_25/gpio_defaults[2] + gpio_defaults_block_25/gpio_defaults[3] gpio_defaults_block_25/gpio_defaults[4] + gpio_defaults_block_25/gpio_defaults[5] gpio_defaults_block_25/gpio_defaults[6] + gpio_defaults_block_25/gpio_defaults[7] gpio_defaults_block_25/gpio_defaults[8] + gpio_defaults_block_25/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[18] padframe/mprj_io_one[25] + sigbuf/mgmt_io_out_buf[18] padframe/mprj_io_one[25] padframe/mprj_io_analog_en[25] + padframe/mprj_io_analog_pol[25] padframe/mprj_io_analog_sel[25] padframe/mprj_io_dm[75] + padframe/mprj_io_dm[76] padframe/mprj_io_dm[77] padframe/mprj_io_holdover[25] padframe/mprj_io_ib_mode_sel[25] + padframe/mprj_io_in[25] padframe/mprj_io_inp_dis[25] padframe/mprj_io_out[25] padframe/mprj_io_oeb[25] + padframe/mprj_io_slow_sel[25] padframe/mprj_io_vtrip_sel[25] gpio_control_in_2\[6\]/resetn + gpio_control_in_2\[5\]/resetn gpio_control_in_2\[6\]/serial_clock gpio_control_in_2\[5\]/serial_clock + gpio_control_in_2\[6\]/serial_data_in gpio_control_in_2\[5\]/serial_data_in gpio_control_in_2\[6\]/serial_load + gpio_control_in_2\[5\]/serial_load mprj/io_in[25] mprj/io_oeb[25] mprj/io_out[25] + soc/VPWR mprj/vccd1 gpio_control_in_2\[6\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_in_1\[1\] gpio_defaults_block_9/gpio_defaults[0] gpio_defaults_block_9/gpio_defaults[10] + gpio_defaults_block_9/gpio_defaults[11] gpio_defaults_block_9/gpio_defaults[12] + gpio_defaults_block_9/gpio_defaults[1] gpio_defaults_block_9/gpio_defaults[2] gpio_defaults_block_9/gpio_defaults[3] + gpio_defaults_block_9/gpio_defaults[4] gpio_defaults_block_9/gpio_defaults[5] gpio_defaults_block_9/gpio_defaults[6] + gpio_defaults_block_9/gpio_defaults[7] gpio_defaults_block_9/gpio_defaults[8] gpio_defaults_block_9/gpio_defaults[9] + sigbuf/mgmt_io_in_unbuf[2] padframe/mprj_io_one[9] sigbuf/mgmt_io_out_buf[2] padframe/mprj_io_one[9] + padframe/mprj_io_analog_en[9] padframe/mprj_io_analog_pol[9] padframe/mprj_io_analog_sel[9] + padframe/mprj_io_dm[27] padframe/mprj_io_dm[28] padframe/mprj_io_dm[29] padframe/mprj_io_holdover[9] + padframe/mprj_io_ib_mode_sel[9] padframe/mprj_io_in[9] padframe/mprj_io_inp_dis[9] + padframe/mprj_io_out[9] padframe/mprj_io_oeb[9] padframe/mprj_io_slow_sel[9] padframe/mprj_io_vtrip_sel[9] + gpio_control_in_1\[1\]/resetn gpio_control_in_1\[2\]/resetn gpio_control_in_1\[1\]/serial_clock + gpio_control_in_1\[2\]/serial_clock gpio_control_in_1\[1\]/serial_data_in gpio_control_in_1\[2\]/serial_data_in + gpio_control_in_1\[1\]/serial_load gpio_control_in_1\[2\]/serial_load mprj/io_in[9] + mprj/io_oeb[9] mprj/io_out[9] soc/VPWR mprj/vccd1 gpio_control_in_1\[1\]/zero mprj/vssd1 + VSUBS gpio_control_block Xgpio_control_in_2\[4\] gpio_defaults_block_23/gpio_defaults[0] gpio_defaults_block_23/gpio_defaults[10] + gpio_defaults_block_23/gpio_defaults[11] gpio_defaults_block_23/gpio_defaults[12] + gpio_defaults_block_23/gpio_defaults[1] gpio_defaults_block_23/gpio_defaults[2] + gpio_defaults_block_23/gpio_defaults[3] gpio_defaults_block_23/gpio_defaults[4] + gpio_defaults_block_23/gpio_defaults[5] gpio_defaults_block_23/gpio_defaults[6] + gpio_defaults_block_23/gpio_defaults[7] gpio_defaults_block_23/gpio_defaults[8] + gpio_defaults_block_23/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[16] padframe/mprj_io_one[23] + sigbuf/mgmt_io_out_buf[16] padframe/mprj_io_one[23] padframe/mprj_io_analog_en[23] + padframe/mprj_io_analog_pol[23] padframe/mprj_io_analog_sel[23] padframe/mprj_io_dm[69] + padframe/mprj_io_dm[70] padframe/mprj_io_dm[71] padframe/mprj_io_holdover[23] padframe/mprj_io_ib_mode_sel[23] + padframe/mprj_io_in[23] padframe/mprj_io_inp_dis[23] padframe/mprj_io_out[23] padframe/mprj_io_oeb[23] + padframe/mprj_io_slow_sel[23] padframe/mprj_io_vtrip_sel[23] gpio_control_in_2\[4\]/resetn + gpio_control_in_2\[3\]/resetn gpio_control_in_2\[4\]/serial_clock gpio_control_in_2\[3\]/serial_clock + gpio_control_in_2\[4\]/serial_data_in gpio_control_in_2\[3\]/serial_data_in gpio_control_in_2\[4\]/serial_load + gpio_control_in_2\[3\]/serial_load mprj/io_in[23] mprj/io_oeb[23] mprj/io_out[23] + soc/VPWR mprj/vccd1 gpio_control_in_2\[4\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_control_bidir_1\[1\] gpio_defaults_block_1/gpio_defaults[0] gpio_defaults_block_1/gpio_defaults[10] + gpio_defaults_block_1/gpio_defaults[11] gpio_defaults_block_1/gpio_defaults[12] + gpio_defaults_block_1/gpio_defaults[1] gpio_defaults_block_1/gpio_defaults[2] gpio_defaults_block_1/gpio_defaults[3] + gpio_defaults_block_1/gpio_defaults[4] gpio_defaults_block_1/gpio_defaults[5] gpio_defaults_block_1/gpio_defaults[6] + gpio_defaults_block_1/gpio_defaults[7] gpio_defaults_block_1/gpio_defaults[8] gpio_defaults_block_1/gpio_defaults[9] + housekeeping/mgmt_gpio_in[1] housekeeping/mgmt_gpio_oeb[1] housekeeping/mgmt_gpio_out[1] + padframe/mprj_io_one[1] padframe/mprj_io_analog_en[1] padframe/mprj_io_analog_pol[1] + padframe/mprj_io_analog_sel[1] padframe/mprj_io_dm[3] padframe/mprj_io_dm[4] padframe/mprj_io_dm[5] + padframe/mprj_io_holdover[1] padframe/mprj_io_ib_mode_sel[1] padframe/mprj_io_in[1] + padframe/mprj_io_inp_dis[1] padframe/mprj_io_out[1] padframe/mprj_io_oeb[1] padframe/mprj_io_slow_sel[1] + padframe/mprj_io_vtrip_sel[1] gpio_control_bidir_1\[1\]/resetn gpio_control_in_1a\[0\]/resetn + gpio_control_bidir_1\[1\]/serial_clock gpio_control_in_1a\[0\]/serial_clock gpio_control_bidir_1\[1\]/serial_data_in + gpio_control_in_1a\[0\]/serial_data_in gpio_control_bidir_1\[1\]/serial_load gpio_control_in_1a\[0\]/serial_load + mprj/io_in[1] mprj/io_oeb[1] mprj/io_out[1] soc/VPWR mprj/vccd1 gpio_control_bidir_1\[1\]/zero + mprj/vssd1 VSUBS gpio_control_block Xspare_logic\[2\] spare_logic\[2\]/spare_xfq[0] spare_logic\[2\]/spare_xfq[1] spare_logic\[2\]/spare_xfqn[0] + spare_logic\[2\]/spare_xfqn[1] spare_logic\[2\]/spare_xi[0] spare_logic\[2\]/spare_xi[1] + spare_logic\[2\]/spare_xi[2] spare_logic\[2\]/spare_xi[3] spare_logic\[2\]/spare_xib + spare_logic\[2\]/spare_xmx[0] spare_logic\[2\]/spare_xmx[1] spare_logic\[2\]/spare_xna[0] + spare_logic\[2\]/spare_xna[1] spare_logic\[2\]/spare_xno[0] spare_logic\[2\]/spare_xno[1] + spare_logic\[2\]/spare_xz[0] spare_logic\[2\]/spare_xz[10] spare_logic\[2\]/spare_xz[11] + spare_logic\[2\]/spare_xz[12] spare_logic\[2\]/spare_xz[13] spare_logic\[2\]/spare_xz[14] + spare_logic\[2\]/spare_xz[15] spare_logic\[2\]/spare_xz[16] spare_logic\[2\]/spare_xz[17] + spare_logic\[2\]/spare_xz[18] spare_logic\[2\]/spare_xz[19] spare_logic\[2\]/spare_xz[1] + spare_logic\[2\]/spare_xz[20] spare_logic\[2\]/spare_xz[21] spare_logic\[2\]/spare_xz[22] + spare_logic\[2\]/spare_xz[23] spare_logic\[2\]/spare_xz[24] spare_logic\[2\]/spare_xz[25] + spare_logic\[2\]/spare_xz[26] spare_logic\[2\]/spare_xz[2] spare_logic\[2\]/spare_xz[3] + spare_logic\[2\]/spare_xz[4] spare_logic\[2\]/spare_xz[5] spare_logic\[2\]/spare_xz[6] + spare_logic\[2\]/spare_xz[7] spare_logic\[2\]/spare_xz[8] spare_logic\[2\]/spare_xz[9] + soc/VPWR VSUBS spare_logic_block Xhousekeeping soc/VPWR soc/debug_in soc/debug_mode soc/debug_oeb soc/debug_out soc/irq[3] + soc/irq[4] soc/irq[5] user_id_value/mask_rev[0] user_id_value/mask_rev[10] user_id_value/mask_rev[11] + user_id_value/mask_rev[12] user_id_value/mask_rev[13] user_id_value/mask_rev[14] + user_id_value/mask_rev[15] user_id_value/mask_rev[16] user_id_value/mask_rev[17] + user_id_value/mask_rev[18] user_id_value/mask_rev[19] user_id_value/mask_rev[1] + user_id_value/mask_rev[20] user_id_value/mask_rev[21] user_id_value/mask_rev[22] + user_id_value/mask_rev[23] user_id_value/mask_rev[24] user_id_value/mask_rev[25] + user_id_value/mask_rev[26] user_id_value/mask_rev[27] user_id_value/mask_rev[28] + user_id_value/mask_rev[29] user_id_value/mask_rev[2] user_id_value/mask_rev[30] + user_id_value/mask_rev[31] user_id_value/mask_rev[3] user_id_value/mask_rev[4] user_id_value/mask_rev[5] + user_id_value/mask_rev[6] user_id_value/mask_rev[7] user_id_value/mask_rev[8] user_id_value/mask_rev[9] + housekeeping/mgmt_gpio_in[0] sigbuf/mgmt_io_in_buf[3] sigbuf/mgmt_io_in_buf[4] sigbuf/mgmt_io_in_buf[5] + sigbuf/mgmt_io_in_buf[6] sigbuf/mgmt_io_in_buf[7] sigbuf/mgmt_io_in_buf[8] sigbuf/mgmt_io_in_buf[9] + sigbuf/mgmt_io_in_buf[10] sigbuf/mgmt_io_in_buf[11] sigbuf/mgmt_io_in_buf[12] housekeeping/mgmt_gpio_in[1] + sigbuf/mgmt_io_in_buf[13] sigbuf/mgmt_io_in_buf[14] sigbuf/mgmt_io_in_buf[15] sigbuf/mgmt_io_in_buf[16] + sigbuf/mgmt_io_in_buf[17] sigbuf/mgmt_io_in_buf[18] sigbuf/mgmt_io_in_buf[19] sigbuf/mgmt_io_in_buf[20] + sigbuf/mgmt_io_in_buf[21] sigbuf/mgmt_io_in_buf[22] housekeeping/mgmt_gpio_in[2] + sigbuf/mgmt_io_in_buf[23] sigbuf/mgmt_io_in_buf[24] sigbuf/mgmt_io_in_buf[25] sigbuf/mgmt_io_in_buf[26] + sigbuf/mgmt_io_in_buf[27] sigbuf/mgmt_io_in_buf[28] sigbuf/mgmt_io_in_buf[29] sigbuf/mgmt_io_in_buf[30] + housekeeping/mgmt_gpio_in[3] housekeeping/mgmt_gpio_in[4] housekeeping/mgmt_gpio_in[5] + housekeeping/mgmt_gpio_in[6] sigbuf/mgmt_io_in_buf[0] sigbuf/mgmt_io_in_buf[1] sigbuf/mgmt_io_in_buf[2] + housekeeping/mgmt_gpio_oeb[0] housekeeping/mgmt_gpio_oeb[10] housekeeping/mgmt_gpio_oeb[11] + housekeeping/mgmt_gpio_oeb[12] housekeeping/mgmt_gpio_oeb[13] housekeeping/mgmt_gpio_oeb[14] + housekeeping/mgmt_gpio_oeb[15] housekeeping/mgmt_gpio_oeb[16] housekeeping/mgmt_gpio_oeb[17] + housekeeping/mgmt_gpio_oeb[18] housekeeping/mgmt_gpio_oeb[19] housekeeping/mgmt_gpio_oeb[1] + housekeeping/mgmt_gpio_oeb[20] housekeeping/mgmt_gpio_oeb[21] housekeeping/mgmt_gpio_oeb[22] + housekeeping/mgmt_gpio_oeb[23] housekeeping/mgmt_gpio_oeb[24] housekeeping/mgmt_gpio_oeb[25] + housekeeping/mgmt_gpio_oeb[26] housekeeping/mgmt_gpio_oeb[27] housekeeping/mgmt_gpio_oeb[28] + housekeeping/mgmt_gpio_oeb[29] housekeeping/mgmt_gpio_oeb[2] housekeeping/mgmt_gpio_oeb[30] + housekeeping/mgmt_gpio_oeb[31] housekeeping/mgmt_gpio_oeb[32] housekeeping/mgmt_gpio_oeb[33] + housekeeping/mgmt_gpio_oeb[34] sigbuf/mgmt_io_oeb_unbuf[0] sigbuf/mgmt_io_oeb_unbuf[1] + sigbuf/mgmt_io_oeb_unbuf[2] housekeeping/mgmt_gpio_oeb[3] housekeeping/mgmt_gpio_oeb[4] + housekeeping/mgmt_gpio_oeb[5] housekeeping/mgmt_gpio_oeb[6] housekeeping/mgmt_gpio_oeb[7] + housekeeping/mgmt_gpio_oeb[8] housekeeping/mgmt_gpio_oeb[9] housekeeping/mgmt_gpio_out[0] + sigbuf/mgmt_io_out_unbuf[3] sigbuf/mgmt_io_out_unbuf[4] sigbuf/mgmt_io_out_unbuf[5] + sigbuf/mgmt_io_out_unbuf[6] sigbuf/mgmt_io_out_unbuf[7] sigbuf/mgmt_io_out_unbuf[8] + sigbuf/mgmt_io_out_unbuf[9] sigbuf/mgmt_io_out_unbuf[10] sigbuf/mgmt_io_out_unbuf[11] + sigbuf/mgmt_io_out_unbuf[12] housekeeping/mgmt_gpio_out[1] sigbuf/mgmt_io_out_unbuf[13] + sigbuf/mgmt_io_out_unbuf[14] sigbuf/mgmt_io_out_unbuf[15] sigbuf/mgmt_io_out_unbuf[16] + sigbuf/mgmt_io_out_unbuf[17] sigbuf/mgmt_io_out_unbuf[18] sigbuf/mgmt_io_out_unbuf[19] + sigbuf/mgmt_io_out_unbuf[20] sigbuf/mgmt_io_out_unbuf[21] sigbuf/mgmt_io_out_unbuf[22] + housekeeping/mgmt_gpio_out[2] sigbuf/mgmt_io_out_unbuf[23] sigbuf/mgmt_io_out_unbuf[24] + sigbuf/mgmt_io_out_unbuf[25] sigbuf/mgmt_io_out_unbuf[26] sigbuf/mgmt_io_out_unbuf[27] + sigbuf/mgmt_io_out_unbuf[28] sigbuf/mgmt_io_out_unbuf[29] sigbuf/mgmt_io_out_unbuf[30] + housekeeping/mgmt_gpio_out[3] housekeeping/mgmt_gpio_out[4] housekeeping/mgmt_gpio_out[5] + housekeeping/mgmt_gpio_out[6] sigbuf/mgmt_io_out_unbuf[0] sigbuf/mgmt_io_out_unbuf[1] + sigbuf/mgmt_io_out_unbuf[2] housekeeping/pad_flash_clk flash_clkrst_buffers/in_n[7] + housekeeping/pad_flash_csb flash_clkrst_buffers/in_n[6] housekeeping/pad_flash_io0_di + flash_clkrst_buffers/in_n[1] flash_clkrst_buffers/in_n[3] flash_clkrst_buffers/in_n[5] + housekeeping/pad_flash_io1_di flash_clkrst_buffers/in_n[0] flash_clkrst_buffers/in_n[2] + flash_clkrst_buffers/in_n[4] clock_ctrl/sel2[0] clock_ctrl/sel2[1] clock_ctrl/sel2[2] + clock_ctrl/ext_clk_sel pll/dco pll/div[0] pll/div[1] pll/div[2] pll/div[3] pll/div[4] + pll/enable clock_ctrl/sel[0] clock_ctrl/sel[1] clock_ctrl/sel[2] pll/ext_trim[0] + pll/ext_trim[10] pll/ext_trim[11] pll/ext_trim[12] pll/ext_trim[13] pll/ext_trim[14] + pll/ext_trim[15] pll/ext_trim[16] pll/ext_trim[17] pll/ext_trim[18] pll/ext_trim[19] + pll/ext_trim[1] pll/ext_trim[20] pll/ext_trim[21] pll/ext_trim[22] pll/ext_trim[23] + pll/ext_trim[24] pll/ext_trim[25] pll/ext_trim[2] pll/ext_trim[3] pll/ext_trim[4] + pll/ext_trim[5] pll/ext_trim[6] pll/ext_trim[7] pll/ext_trim[8] pll/ext_trim[9] + por/porb_l housekeeping/pwr_ctrl_out[0] housekeeping/pwr_ctrl_out[1] housekeeping/pwr_ctrl_out[2] + housekeeping/pwr_ctrl_out[3] soc/qspi_enabled housekeeping/reset soc/ser_rx soc/ser_tx + soc/serial_clock_in housekeeping/serial_data_1 soc/serial_data_2_in soc/serial_load_in + soc/serial_resetn_in soc/spi_csb soc/spi_enabled soc/spi_sck soc/spi_sdi soc/spi_sdo + soc/spi_sdoenb soc/flash_clk soc/flash_csb soc/flash_io0_di soc/flash_io0_do soc/flash_io0_oeb + soc/flash_io1_di soc/flash_io1_do soc/flash_io1_oeb soc/flash_io2_di soc/flash_io2_do + soc/flash_io2_oeb soc/flash_io3_di soc/flash_io3_do soc/flash_io3_oeb soc/trap soc/uart_enabled + clock_ctrl/user_clk housekeeping/usr1_vcc_pwrgood housekeeping/usr1_vdd_pwrgood + housekeeping/usr2_vcc_pwrgood housekeeping/usr2_vdd_pwrgood soc/hk_ack_i soc/mprj_adr_o[0] + soc/mprj_adr_o[10] soc/mprj_adr_o[11] soc/mprj_adr_o[12] soc/mprj_adr_o[13] soc/mprj_adr_o[14] + soc/mprj_adr_o[15] soc/mprj_adr_o[16] soc/mprj_adr_o[17] soc/mprj_adr_o[18] soc/mprj_adr_o[19] + soc/mprj_adr_o[1] soc/mprj_adr_o[20] soc/mprj_adr_o[21] soc/mprj_adr_o[22] soc/mprj_adr_o[23] + soc/mprj_adr_o[24] soc/mprj_adr_o[25] soc/mprj_adr_o[26] soc/mprj_adr_o[27] soc/mprj_adr_o[28] + soc/mprj_adr_o[29] soc/mprj_adr_o[2] soc/mprj_adr_o[30] soc/mprj_adr_o[31] soc/mprj_adr_o[3] + soc/mprj_adr_o[4] soc/mprj_adr_o[5] soc/mprj_adr_o[6] soc/mprj_adr_o[7] soc/mprj_adr_o[8] + soc/mprj_adr_o[9] clock_ctrl/core_clk soc/hk_cyc_o soc/mprj_dat_o[0] soc/mprj_dat_o[10] + soc/mprj_dat_o[11] soc/mprj_dat_o[12] soc/mprj_dat_o[13] soc/mprj_dat_o[14] soc/mprj_dat_o[15] + soc/mprj_dat_o[16] soc/mprj_dat_o[17] soc/mprj_dat_o[18] soc/mprj_dat_o[19] soc/mprj_dat_o[1] + soc/mprj_dat_o[20] soc/mprj_dat_o[21] soc/mprj_dat_o[22] soc/mprj_dat_o[23] soc/mprj_dat_o[24] + soc/mprj_dat_o[25] soc/mprj_dat_o[26] soc/mprj_dat_o[27] soc/mprj_dat_o[28] soc/mprj_dat_o[29] + soc/mprj_dat_o[2] soc/mprj_dat_o[30] soc/mprj_dat_o[31] soc/mprj_dat_o[3] soc/mprj_dat_o[4] + soc/mprj_dat_o[5] soc/mprj_dat_o[6] soc/mprj_dat_o[7] soc/mprj_dat_o[8] soc/mprj_dat_o[9] + soc/hk_dat_i[0] soc/hk_dat_i[10] soc/hk_dat_i[11] soc/hk_dat_i[12] soc/hk_dat_i[13] + soc/hk_dat_i[14] soc/hk_dat_i[15] soc/hk_dat_i[16] soc/hk_dat_i[17] soc/hk_dat_i[18] + soc/hk_dat_i[19] soc/hk_dat_i[1] soc/hk_dat_i[20] soc/hk_dat_i[21] soc/hk_dat_i[22] + soc/hk_dat_i[23] soc/hk_dat_i[24] soc/hk_dat_i[25] soc/hk_dat_i[26] soc/hk_dat_i[27] + soc/hk_dat_i[28] soc/hk_dat_i[29] soc/hk_dat_i[2] soc/hk_dat_i[30] soc/hk_dat_i[31] + soc/hk_dat_i[3] soc/hk_dat_i[4] soc/hk_dat_i[5] soc/hk_dat_i[6] soc/hk_dat_i[7] + soc/hk_dat_i[8] soc/hk_dat_i[9] housekeeping/wb_rstn_i soc/mprj_sel_o[0] soc/mprj_sel_o[1] + soc/mprj_sel_o[2] soc/mprj_sel_o[3] soc/hk_stb_o soc/mprj_we_o VSUBS housekeeping Xgpio_control_in_2\[2\] gpio_defaults_block_21/gpio_defaults[0] gpio_defaults_block_21/gpio_defaults[10] + gpio_defaults_block_21/gpio_defaults[11] gpio_defaults_block_21/gpio_defaults[12] + gpio_defaults_block_21/gpio_defaults[1] gpio_defaults_block_21/gpio_defaults[2] + gpio_defaults_block_21/gpio_defaults[3] gpio_defaults_block_21/gpio_defaults[4] + gpio_defaults_block_21/gpio_defaults[5] gpio_defaults_block_21/gpio_defaults[6] + gpio_defaults_block_21/gpio_defaults[7] gpio_defaults_block_21/gpio_defaults[8] + gpio_defaults_block_21/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[14] padframe/mprj_io_one[21] + sigbuf/mgmt_io_out_buf[14] padframe/mprj_io_one[21] padframe/mprj_io_analog_en[21] + padframe/mprj_io_analog_pol[21] padframe/mprj_io_analog_sel[21] padframe/mprj_io_dm[63] + padframe/mprj_io_dm[64] padframe/mprj_io_dm[65] padframe/mprj_io_holdover[21] padframe/mprj_io_ib_mode_sel[21] + padframe/mprj_io_in[21] padframe/mprj_io_inp_dis[21] padframe/mprj_io_out[21] padframe/mprj_io_oeb[21] + padframe/mprj_io_slow_sel[21] padframe/mprj_io_vtrip_sel[21] gpio_control_in_2\[2\]/resetn + gpio_control_in_2\[1\]/resetn gpio_control_in_2\[2\]/serial_clock gpio_control_in_2\[1\]/serial_clock + gpio_control_in_2\[2\]/serial_data_in gpio_control_in_2\[1\]/serial_data_in gpio_control_in_2\[2\]/serial_load + gpio_control_in_2\[1\]/serial_load mprj/io_in[21] mprj/io_oeb[21] mprj/io_out[21] + soc/VPWR mprj/vccd1 gpio_control_in_2\[2\]/zero mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_30 soc/VPWR gpio_defaults_block_30/gpio_defaults[0] gpio_defaults_block_30/gpio_defaults[10] + gpio_defaults_block_30/gpio_defaults[11] gpio_defaults_block_30/gpio_defaults[12] + gpio_defaults_block_30/gpio_defaults[1] gpio_defaults_block_30/gpio_defaults[2] + gpio_defaults_block_30/gpio_defaults[3] gpio_defaults_block_30/gpio_defaults[4] + gpio_defaults_block_30/gpio_defaults[5] gpio_defaults_block_30/gpio_defaults[6] + gpio_defaults_block_30/gpio_defaults[7] gpio_defaults_block_30/gpio_defaults[8] + gpio_defaults_block_30/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xspare_logic\[0\] spare_logic\[0\]/spare_xfq[0] spare_logic\[0\]/spare_xfq[1] spare_logic\[0\]/spare_xfqn[0] + spare_logic\[0\]/spare_xfqn[1] spare_logic\[0\]/spare_xi[0] spare_logic\[0\]/spare_xi[1] + spare_logic\[0\]/spare_xi[2] spare_logic\[0\]/spare_xi[3] spare_logic\[0\]/spare_xib + spare_logic\[0\]/spare_xmx[0] spare_logic\[0\]/spare_xmx[1] spare_logic\[0\]/spare_xna[0] + spare_logic\[0\]/spare_xna[1] spare_logic\[0\]/spare_xno[0] spare_logic\[0\]/spare_xno[1] + spare_logic\[0\]/spare_xz[0] spare_logic\[0\]/spare_xz[10] spare_logic\[0\]/spare_xz[11] + spare_logic\[0\]/spare_xz[12] spare_logic\[0\]/spare_xz[13] spare_logic\[0\]/spare_xz[14] + spare_logic\[0\]/spare_xz[15] spare_logic\[0\]/spare_xz[16] spare_logic\[0\]/spare_xz[17] + spare_logic\[0\]/spare_xz[18] spare_logic\[0\]/spare_xz[19] spare_logic\[0\]/spare_xz[1] + spare_logic\[0\]/spare_xz[20] spare_logic\[0\]/spare_xz[21] spare_logic\[0\]/spare_xz[22] + spare_logic\[0\]/spare_xz[23] spare_logic\[0\]/spare_xz[24] spare_logic\[0\]/spare_xz[25] + spare_logic\[0\]/spare_xz[26] spare_logic\[0\]/spare_xz[2] spare_logic\[0\]/spare_xz[3] + spare_logic\[0\]/spare_xz[4] spare_logic\[0\]/spare_xz[5] spare_logic\[0\]/spare_xz[6] + spare_logic\[0\]/spare_xz[7] spare_logic\[0\]/spare_xz[8] spare_logic\[0\]/spare_xz[9] + soc/VPWR VSUBS spare_logic_block Xgpio_control_in_1\[8\] gpio_defaults_block_16/gpio_defaults[0] gpio_defaults_block_16/gpio_defaults[10] + gpio_defaults_block_16/gpio_defaults[11] gpio_defaults_block_16/gpio_defaults[12] + gpio_defaults_block_16/gpio_defaults[1] gpio_defaults_block_16/gpio_defaults[2] + gpio_defaults_block_16/gpio_defaults[3] gpio_defaults_block_16/gpio_defaults[4] + gpio_defaults_block_16/gpio_defaults[5] gpio_defaults_block_16/gpio_defaults[6] + gpio_defaults_block_16/gpio_defaults[7] gpio_defaults_block_16/gpio_defaults[8] + gpio_defaults_block_16/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[9] padframe/mprj_io_one[16] + sigbuf/mgmt_io_out_buf[9] padframe/mprj_io_one[16] padframe/mprj_io_analog_en[16] + padframe/mprj_io_analog_pol[16] padframe/mprj_io_analog_sel[16] padframe/mprj_io_dm[48] + padframe/mprj_io_dm[49] padframe/mprj_io_dm[50] padframe/mprj_io_holdover[16] padframe/mprj_io_ib_mode_sel[16] + padframe/mprj_io_in[16] padframe/mprj_io_inp_dis[16] padframe/mprj_io_out[16] padframe/mprj_io_oeb[16] + padframe/mprj_io_slow_sel[16] padframe/mprj_io_vtrip_sel[16] gpio_control_in_1\[8\]/resetn + gpio_control_in_1\[9\]/resetn gpio_control_in_1\[8\]/serial_clock gpio_control_in_1\[9\]/serial_clock + gpio_control_in_1\[8\]/serial_data_in gpio_control_in_1\[9\]/serial_data_in gpio_control_in_1\[8\]/serial_load + gpio_control_in_1\[9\]/serial_load mprj/io_in[16] mprj/io_oeb[16] mprj/io_out[16] + soc/VPWR mprj/vccd1 gpio_control_in_1\[8\]/zero mprj/vssd1 VSUBS gpio_control_block Xflash_clkrst_buffers soc/VPWR flash_clkrst_buffers/in_n[0] housekeeping/wb_rstn_i + clock_ctrl/core_clk flash_clkrst_buffers/in_n[1] flash_clkrst_buffers/in_n[2] flash_clkrst_buffers/in_n[3] + flash_clkrst_buffers/in_n[4] flash_clkrst_buffers/in_n[5] flash_clkrst_buffers/in_n[6] + flash_clkrst_buffers/in_n[7] housekeeping/pad_flash_csb housekeeping/pad_flash_clk + padframe/flash_io0_di_core padframe/flash_io1_di_core padframe/clock_core housekeeping/pad_flash_io0_di + housekeeping/pad_flash_io1_di pll/osc padframe/flash_io1_do_core soc/resetn_in soc/clk_in + padframe/flash_io0_do_core padframe/flash_io1_ieb_core padframe/flash_io0_ieb_core + padframe/flash_io1_oeb_core padframe/flash_io0_oeb_core padframe/flash_csb_oeb_core + padframe/flash_clk_oeb_core padframe/flash_csb_core padframe/flash_clk_core VSUBS + buff_flash_clkrst Xgpio_defaults_block_31 soc/VPWR gpio_defaults_block_31/gpio_defaults[0] gpio_defaults_block_31/gpio_defaults[10] + gpio_defaults_block_31/gpio_defaults[11] gpio_defaults_block_31/gpio_defaults[12] + gpio_defaults_block_31/gpio_defaults[1] gpio_defaults_block_31/gpio_defaults[2] + gpio_defaults_block_31/gpio_defaults[3] gpio_defaults_block_31/gpio_defaults[4] + gpio_defaults_block_31/gpio_defaults[5] gpio_defaults_block_31/gpio_defaults[6] + gpio_defaults_block_31/gpio_defaults[7] gpio_defaults_block_31/gpio_defaults[8] + gpio_defaults_block_31/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_20 soc/VPWR gpio_defaults_block_20/gpio_defaults[0] gpio_defaults_block_20/gpio_defaults[10] + gpio_defaults_block_20/gpio_defaults[11] gpio_defaults_block_20/gpio_defaults[12] + gpio_defaults_block_20/gpio_defaults[1] gpio_defaults_block_20/gpio_defaults[2] + gpio_defaults_block_20/gpio_defaults[3] gpio_defaults_block_20/gpio_defaults[4] + gpio_defaults_block_20/gpio_defaults[5] gpio_defaults_block_20/gpio_defaults[6] + gpio_defaults_block_20/gpio_defaults[7] gpio_defaults_block_20/gpio_defaults[8] + gpio_defaults_block_20/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_control_in_1a\[5\] gpio_defaults_block_7/gpio_defaults[0] gpio_defaults_block_7/gpio_defaults[10] + gpio_defaults_block_7/gpio_defaults[11] gpio_defaults_block_7/gpio_defaults[12] + gpio_defaults_block_7/gpio_defaults[1] gpio_defaults_block_7/gpio_defaults[2] gpio_defaults_block_7/gpio_defaults[3] + gpio_defaults_block_7/gpio_defaults[4] gpio_defaults_block_7/gpio_defaults[5] gpio_defaults_block_7/gpio_defaults[6] + gpio_defaults_block_7/gpio_defaults[7] gpio_defaults_block_7/gpio_defaults[8] gpio_defaults_block_7/gpio_defaults[9] + sigbuf/mgmt_io_in_unbuf[0] padframe/mprj_io_one[7] sigbuf/mgmt_io_out_buf[0] padframe/mprj_io_one[7] + padframe/mprj_io_analog_en[7] padframe/mprj_io_analog_pol[7] padframe/mprj_io_analog_sel[7] + padframe/mprj_io_dm[21] padframe/mprj_io_dm[22] padframe/mprj_io_dm[23] padframe/mprj_io_holdover[7] + padframe/mprj_io_ib_mode_sel[7] padframe/mprj_io_in[7] padframe/mprj_io_inp_dis[7] + padframe/mprj_io_out[7] padframe/mprj_io_oeb[7] padframe/mprj_io_slow_sel[7] padframe/mprj_io_vtrip_sel[7] + gpio_control_in_1a\[5\]/resetn gpio_control_in_1\[0\]/resetn gpio_control_in_1a\[5\]/serial_clock + gpio_control_in_1\[0\]/serial_clock gpio_control_in_1a\[5\]/serial_data_in gpio_control_in_1\[0\]/serial_data_in + gpio_control_in_1a\[5\]/serial_load gpio_control_in_1\[0\]/serial_load mprj/io_in[7] + mprj/io_oeb[7] mprj/io_out[7] soc/VPWR mprj/vccd1 gpio_control_in_1a\[5\]/zero mprj/vssd1 + VSUBS gpio_control_block Xgpio_control_bidir_2\[2\] gpio_defaults_block_37/gpio_defaults[0] gpio_defaults_block_37/gpio_defaults[10] + gpio_defaults_block_37/gpio_defaults[11] gpio_defaults_block_37/gpio_defaults[12] + gpio_defaults_block_37/gpio_defaults[1] gpio_defaults_block_37/gpio_defaults[2] + gpio_defaults_block_37/gpio_defaults[3] gpio_defaults_block_37/gpio_defaults[4] + gpio_defaults_block_37/gpio_defaults[5] gpio_defaults_block_37/gpio_defaults[6] + gpio_defaults_block_37/gpio_defaults[7] gpio_defaults_block_37/gpio_defaults[8] + gpio_defaults_block_37/gpio_defaults[9] sigbuf/mgmt_io_in_unbuf[30] sigbuf/mgmt_io_oeb_buf[2] + sigbuf/mgmt_io_out_buf[30] padframe/mprj_io_one[37] padframe/mprj_io_analog_en[37] + padframe/mprj_io_analog_pol[37] padframe/mprj_io_analog_sel[37] padframe/mprj_io_dm[111] + padframe/mprj_io_dm[112] padframe/mprj_io_dm[113] padframe/mprj_io_holdover[37] + padframe/mprj_io_ib_mode_sel[37] padframe/mprj_io_in[37] padframe/mprj_io_inp_dis[37] + padframe/mprj_io_out[37] padframe/mprj_io_oeb[37] padframe/mprj_io_slow_sel[37] + padframe/mprj_io_vtrip_sel[37] soc/serial_resetn_out gpio_control_bidir_2\[1\]/resetn + soc/serial_clock_out gpio_control_bidir_2\[1\]/serial_clock soc/serial_data_2_out + gpio_control_bidir_2\[1\]/serial_data_in soc/serial_load_out gpio_control_bidir_2\[1\]/serial_load + mprj/io_in[37] mprj/io_oeb[37] mprj/io_out[37] soc/VPWR mprj/vccd1 gpio_control_bidir_2\[2\]/zero + mprj/vssd1 VSUBS gpio_control_block Xgpio_defaults_block_32 soc/VPWR gpio_defaults_block_32/gpio_defaults[0] gpio_defaults_block_32/gpio_defaults[10] + gpio_defaults_block_32/gpio_defaults[11] gpio_defaults_block_32/gpio_defaults[12] + gpio_defaults_block_32/gpio_defaults[1] gpio_defaults_block_32/gpio_defaults[2] + gpio_defaults_block_32/gpio_defaults[3] gpio_defaults_block_32/gpio_defaults[4] + gpio_defaults_block_32/gpio_defaults[5] gpio_defaults_block_32/gpio_defaults[6] + gpio_defaults_block_32/gpio_defaults[7] gpio_defaults_block_32/gpio_defaults[8] + gpio_defaults_block_32/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_10 soc/VPWR gpio_defaults_block_10/gpio_defaults[0] gpio_defaults_block_10/gpio_defaults[10] + gpio_defaults_block_10/gpio_defaults[11] gpio_defaults_block_10/gpio_defaults[12] + gpio_defaults_block_10/gpio_defaults[1] gpio_defaults_block_10/gpio_defaults[2] + gpio_defaults_block_10/gpio_defaults[3] gpio_defaults_block_10/gpio_defaults[4] + gpio_defaults_block_10/gpio_defaults[5] gpio_defaults_block_10/gpio_defaults[6] + gpio_defaults_block_10/gpio_defaults[7] gpio_defaults_block_10/gpio_defaults[8] + gpio_defaults_block_10/gpio_defaults[9] VSUBS gpio_defaults_block_0403 Xgpio_defaults_block_21 soc/VPWR gpio_defaults_block_21/gpio_defaults[0] gpio_defaults_block_21/gpio_defaults[10] + gpio_defaults_block_21/gpio_defaults[11] gpio_defaults_block_21/gpio_defaults[12] + gpio_defaults_block_21/gpio_defaults[1] gpio_defaults_block_21/gpio_defaults[2] + gpio_defaults_block_21/gpio_defaults[3] gpio_defaults_block_21/gpio_defaults[4] + gpio_defaults_block_21/gpio_defaults[5] gpio_defaults_block_21/gpio_defaults[6] + gpio_defaults_block_21/gpio_defaults[7] gpio_defaults_block_21/gpio_defaults[8] + gpio_defaults_block_21/gpio_defaults[9] VSUBS gpio_defaults_block_0403 .ends